diff --git a/DE1_SoC.qsf b/DE1_SoC.qsf
new file mode 100644
index 0000000000000000000000000000000000000000..5b9445d8236906c9b7c8b2e99992869913d49106
--- /dev/null
+++ b/DE1_SoC.qsf
@@ -0,0 +1,953 @@
+#============================================================
+# Altera DE1-SoC board settings
+#============================================================
+
+
+set_global_assignment -name FAMILY "Cyclone V"
+set_global_assignment -name DEVICE 5CSEMA5F31C6
+set_global_assignment -name TOP_LEVEL_ENTITY "DE1_SoC"
+set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
+set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name SDC_FILE DE1_SoC.sdc
+
+
+#============================================================
+# ADC
+#============================================================
+set_location_assignment PIN_AJ4 -to ADC_CS_N
+set_location_assignment PIN_AK4 -to ADC_DIN
+set_location_assignment PIN_AK3 -to ADC_DOUT
+set_location_assignment PIN_AK2 -to ADC_SCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CS_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_DIN
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_DOUT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SCLK
+
+#============================================================
+# AUD
+#============================================================
+set_location_assignment PIN_K7 -to AUD_ADCDAT
+set_location_assignment PIN_K8 -to AUD_ADCLRCK
+set_location_assignment PIN_H7 -to AUD_BCLK
+set_location_assignment PIN_J7 -to AUD_DACDAT
+set_location_assignment PIN_H8 -to AUD_DACLRCK
+set_location_assignment PIN_G7 -to AUD_XCK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_ADCDAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_ADCLRCK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_BCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_DACDAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_DACLRCK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_XCK
+
+#============================================================
+# CLOCK
+#============================================================
+set_location_assignment PIN_AF14 -to CLOCK_50
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
+
+#============================================================
+# CLOCK2
+#============================================================
+set_location_assignment PIN_AA16 -to CLOCK2_50
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK2_50
+
+#============================================================
+# CLOCK3
+#============================================================
+set_location_assignment PIN_Y26 -to CLOCK3_50
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK3_50
+
+#============================================================
+# CLOCK4
+#============================================================
+set_location_assignment PIN_K14 -to CLOCK4_50
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK4_50
+
+#============================================================
+# DRAM
+#============================================================
+set_location_assignment PIN_AK14 -to DRAM_ADDR[0]
+set_location_assignment PIN_AH14 -to DRAM_ADDR[1]
+set_location_assignment PIN_AG15 -to DRAM_ADDR[2]
+set_location_assignment PIN_AE14 -to DRAM_ADDR[3]
+set_location_assignment PIN_AB15 -to DRAM_ADDR[4]
+set_location_assignment PIN_AC14 -to DRAM_ADDR[5]
+set_location_assignment PIN_AD14 -to DRAM_ADDR[6]
+set_location_assignment PIN_AF15 -to DRAM_ADDR[7]
+set_location_assignment PIN_AH15 -to DRAM_ADDR[8]
+set_location_assignment PIN_AG13 -to DRAM_ADDR[9]
+set_location_assignment PIN_AG12 -to DRAM_ADDR[10]
+set_location_assignment PIN_AH13 -to DRAM_ADDR[11]
+set_location_assignment PIN_AJ14 -to DRAM_ADDR[12]
+set_location_assignment PIN_AF13 -to DRAM_BA[0]
+set_location_assignment PIN_AJ12 -to DRAM_BA[1]
+set_location_assignment PIN_AF11 -to DRAM_CAS_N
+set_location_assignment PIN_AK13 -to DRAM_CKE
+set_location_assignment PIN_AH12 -to DRAM_CLK
+set_location_assignment PIN_AG11 -to DRAM_CS_N
+set_location_assignment PIN_AK6 -to DRAM_DQ[0]
+set_location_assignment PIN_AJ7 -to DRAM_DQ[1]
+set_location_assignment PIN_AK7 -to DRAM_DQ[2]
+set_location_assignment PIN_AK8 -to DRAM_DQ[3]
+set_location_assignment PIN_AK9 -to DRAM_DQ[4]
+set_location_assignment PIN_AG10 -to DRAM_DQ[5]
+set_location_assignment PIN_AK11 -to DRAM_DQ[6]
+set_location_assignment PIN_AJ11 -to DRAM_DQ[7]
+set_location_assignment PIN_AH10 -to DRAM_DQ[8]
+set_location_assignment PIN_AJ10 -to DRAM_DQ[9]
+set_location_assignment PIN_AJ9 -to DRAM_DQ[10]
+set_location_assignment PIN_AH9 -to DRAM_DQ[11]
+set_location_assignment PIN_AH8 -to DRAM_DQ[12]
+set_location_assignment PIN_AH7 -to DRAM_DQ[13]
+set_location_assignment PIN_AJ6 -to DRAM_DQ[14]
+set_location_assignment PIN_AJ5 -to DRAM_DQ[15]
+set_location_assignment PIN_AB13 -to DRAM_LDQM
+set_location_assignment PIN_AE13 -to DRAM_RAS_N
+set_location_assignment PIN_AK12 -to DRAM_UDQM
+set_location_assignment PIN_AA13 -to DRAM_WE_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[10]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[11]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[12]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CAS_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CKE
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CS_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[10]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[11]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[12]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[13]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[14]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[15]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_LDQM
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_RAS_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_UDQM
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_WE_N
+
+#============================================================
+# FAN
+#============================================================
+set_location_assignment PIN_AA12 -to FAN_CTRL
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FAN_CTRL
+
+#============================================================
+# FPGA
+#============================================================
+set_location_assignment PIN_J12 -to FPGA_I2C_SCLK
+set_location_assignment PIN_K12 -to FPGA_I2C_SDAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_I2C_SCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_I2C_SDAT
+
+#============================================================
+# GPIO
+#============================================================
+set_location_assignment PIN_AC18 -to GPIO_0[0]
+set_location_assignment PIN_AH18 -to GPIO_0[10]
+set_location_assignment PIN_AH17 -to GPIO_0[11]
+set_location_assignment PIN_AG16 -to GPIO_0[12]
+set_location_assignment PIN_AE16 -to GPIO_0[13]
+set_location_assignment PIN_AF16 -to GPIO_0[14]
+set_location_assignment PIN_AG17 -to GPIO_0[15]
+set_location_assignment PIN_AA18 -to GPIO_0[16]
+set_location_assignment PIN_AA19 -to GPIO_0[17]
+set_location_assignment PIN_AE17 -to GPIO_0[18]
+set_location_assignment PIN_AC20 -to GPIO_0[19]
+set_location_assignment PIN_Y17 -to GPIO_0[1]
+set_location_assignment PIN_AH19 -to GPIO_0[20]
+set_location_assignment PIN_AJ20 -to GPIO_0[21]
+set_location_assignment PIN_AH20 -to GPIO_0[22]
+set_location_assignment PIN_AK21 -to GPIO_0[23]
+set_location_assignment PIN_AD19 -to GPIO_0[24]
+set_location_assignment PIN_AD20 -to GPIO_0[25]
+set_location_assignment PIN_AE18 -to GPIO_0[26]
+set_location_assignment PIN_AE19 -to GPIO_0[27]
+set_location_assignment PIN_AF20 -to GPIO_0[28]
+set_location_assignment PIN_AF21 -to GPIO_0[29]
+set_location_assignment PIN_AD17 -to GPIO_0[2]
+set_location_assignment PIN_AF19 -to GPIO_0[30]
+set_location_assignment PIN_AG21 -to GPIO_0[31]
+set_location_assignment PIN_AF18 -to GPIO_0[32]
+set_location_assignment PIN_AG20 -to GPIO_0[33]
+set_location_assignment PIN_AG18 -to GPIO_0[34]
+set_location_assignment PIN_AJ21 -to GPIO_0[35]
+set_location_assignment PIN_Y18 -to GPIO_0[3]
+set_location_assignment PIN_AK16 -to GPIO_0[4]
+set_location_assignment PIN_AK18 -to GPIO_0[5]
+set_location_assignment PIN_AK19 -to GPIO_0[6]
+set_location_assignment PIN_AJ19 -to GPIO_0[7]
+set_location_assignment PIN_AJ17 -to GPIO_0[8]
+set_location_assignment PIN_AJ16 -to GPIO_0[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[10]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[11]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[12]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[13]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[14]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[15]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[16]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[17]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[18]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[19]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[20]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[21]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[22]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[23]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[24]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[25]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[26]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[27]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[28]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[29]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[30]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[31]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[32]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[33]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[34]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[35]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[9]
+
+set_location_assignment PIN_AB17 -to GPIO_1[0]
+set_location_assignment PIN_AG26 -to GPIO_1[10]
+set_location_assignment PIN_AH24 -to GPIO_1[11]
+set_location_assignment PIN_AH27 -to GPIO_1[12]
+set_location_assignment PIN_AJ27 -to GPIO_1[13]
+set_location_assignment PIN_AK29 -to GPIO_1[14]
+set_location_assignment PIN_AK28 -to GPIO_1[15]
+set_location_assignment PIN_AK27 -to GPIO_1[16]
+set_location_assignment PIN_AJ26 -to GPIO_1[17]
+set_location_assignment PIN_AK26 -to GPIO_1[18]
+set_location_assignment PIN_AH25 -to GPIO_1[19]
+set_location_assignment PIN_AA21 -to GPIO_1[1]
+set_location_assignment PIN_AJ25 -to GPIO_1[20]
+set_location_assignment PIN_AJ24 -to GPIO_1[21]
+set_location_assignment PIN_AK24 -to GPIO_1[22]
+set_location_assignment PIN_AG23 -to GPIO_1[23]
+set_location_assignment PIN_AK23 -to GPIO_1[24]
+set_location_assignment PIN_AH23 -to GPIO_1[25]
+set_location_assignment PIN_AK22 -to GPIO_1[26]
+set_location_assignment PIN_AJ22 -to GPIO_1[27]
+set_location_assignment PIN_AH22 -to GPIO_1[28]
+set_location_assignment PIN_AG22 -to GPIO_1[29]
+set_location_assignment PIN_AB21 -to GPIO_1[2]
+set_location_assignment PIN_AF24 -to GPIO_1[30]
+set_location_assignment PIN_AF23 -to GPIO_1[31]
+set_location_assignment PIN_AE22 -to GPIO_1[32]
+set_location_assignment PIN_AD21 -to GPIO_1[33]
+set_location_assignment PIN_AA20 -to GPIO_1[34]
+set_location_assignment PIN_AC22 -to GPIO_1[35]
+set_location_assignment PIN_AC23 -to GPIO_1[3]
+set_location_assignment PIN_AD24 -to GPIO_1[4]
+set_location_assignment PIN_AE23 -to GPIO_1[5]
+set_location_assignment PIN_AE24 -to GPIO_1[6]
+set_location_assignment PIN_AF25 -to GPIO_1[7]
+set_location_assignment PIN_AF26 -to GPIO_1[8]
+set_location_assignment PIN_AG25 -to GPIO_1[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[10]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[11]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[12]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[13]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[14]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[15]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[16]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[17]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[18]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[19]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[20]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[21]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[22]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[23]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[24]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[25]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[26]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[27]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[28]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[29]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[30]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[31]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[32]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[33]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[34]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[35]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[9]
+
+#============================================================
+# HEX0
+#============================================================
+set_location_assignment PIN_AE26 -to HEX0[0]
+set_location_assignment PIN_AE27 -to HEX0[1]
+set_location_assignment PIN_AE28 -to HEX0[2]
+set_location_assignment PIN_AG27 -to HEX0[3]
+set_location_assignment PIN_AF28 -to HEX0[4]
+set_location_assignment PIN_AG28 -to HEX0[5]
+set_location_assignment PIN_AH28 -to HEX0[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[6]
+
+#============================================================
+# HEX1
+#============================================================
+set_location_assignment PIN_AJ29 -to HEX1[0]
+set_location_assignment PIN_AH29 -to HEX1[1]
+set_location_assignment PIN_AH30 -to HEX1[2]
+set_location_assignment PIN_AG30 -to HEX1[3]
+set_location_assignment PIN_AF29 -to HEX1[4]
+set_location_assignment PIN_AF30 -to HEX1[5]
+set_location_assignment PIN_AD27 -to HEX1[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[6]
+
+#============================================================
+# HEX2
+#============================================================
+set_location_assignment PIN_AB23 -to HEX2[0]
+set_location_assignment PIN_AE29 -to HEX2[1]
+set_location_assignment PIN_AD29 -to HEX2[2]
+set_location_assignment PIN_AC28 -to HEX2[3]
+set_location_assignment PIN_AD30 -to HEX2[4]
+set_location_assignment PIN_AC29 -to HEX2[5]
+set_location_assignment PIN_AC30 -to HEX2[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[6]
+
+#============================================================
+# HEX3
+#============================================================
+set_location_assignment PIN_AD26 -to HEX3[0]
+set_location_assignment PIN_AC27 -to HEX3[1]
+set_location_assignment PIN_AD25 -to HEX3[2]
+set_location_assignment PIN_AC25 -to HEX3[3]
+set_location_assignment PIN_AB28 -to HEX3[4]
+set_location_assignment PIN_AB25 -to HEX3[5]
+set_location_assignment PIN_AB22 -to HEX3[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[6]
+
+#============================================================
+# HEX4
+#============================================================
+set_location_assignment PIN_AA24 -to HEX4[0]
+set_location_assignment PIN_Y23 -to HEX4[1]
+set_location_assignment PIN_Y24 -to HEX4[2]
+set_location_assignment PIN_W22 -to HEX4[3]
+set_location_assignment PIN_W24 -to HEX4[4]
+set_location_assignment PIN_V23 -to HEX4[5]
+set_location_assignment PIN_W25 -to HEX4[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[6]
+
+#============================================================
+# HEX5
+#============================================================
+set_location_assignment PIN_V25 -to HEX5[0]
+set_location_assignment PIN_AA28 -to HEX5[1]
+set_location_assignment PIN_Y27 -to HEX5[2]
+set_location_assignment PIN_AB27 -to HEX5[3]
+set_location_assignment PIN_AB26 -to HEX5[4]
+set_location_assignment PIN_AA26 -to HEX5[5]
+set_location_assignment PIN_AA25 -to HEX5[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[6]
+
+#============================================================
+# IRDA
+#============================================================
+set_location_assignment PIN_AA30 -to IRDA_RXD
+set_location_assignment PIN_AB30 -to IRDA_TXD
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to IRDA_RXD
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to IRDA_TXD
+
+#============================================================
+# KEY
+#============================================================
+set_location_assignment PIN_AA14 -to KEY[0]
+set_location_assignment PIN_AA15 -to KEY[1]
+set_location_assignment PIN_W15 -to KEY[2]
+set_location_assignment PIN_Y16 -to KEY[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[3]
+
+#============================================================
+# LEDR
+#============================================================
+set_location_assignment PIN_V16 -to LEDR[0]
+set_location_assignment PIN_W16 -to LEDR[1]
+set_location_assignment PIN_V17 -to LEDR[2]
+set_location_assignment PIN_V18 -to LEDR[3]
+set_location_assignment PIN_W17 -to LEDR[4]
+set_location_assignment PIN_W19 -to LEDR[5]
+set_location_assignment PIN_Y19 -to LEDR[6]
+set_location_assignment PIN_W20 -to LEDR[7]
+set_location_assignment PIN_W21 -to LEDR[8]
+set_location_assignment PIN_Y21 -to LEDR[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[9]
+
+#============================================================
+# PS2
+#============================================================
+set_location_assignment PIN_AD7 -to PS2_CLK
+set_location_assignment PIN_AE7 -to PS2_DAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_DAT
+
+set_location_assignment PIN_AD9 -to PS2_CLK2
+set_location_assignment PIN_AE9 -to PS2_DAT2
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_CLK2
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_DAT2
+
+#============================================================
+# SW
+#============================================================
+set_location_assignment PIN_AB12 -to SW[0]
+set_location_assignment PIN_AC12 -to SW[1]
+set_location_assignment PIN_AF9 -to SW[2]
+set_location_assignment PIN_AF10 -to SW[3]
+set_location_assignment PIN_AD11 -to SW[4]
+set_location_assignment PIN_AD12 -to SW[5]
+set_location_assignment PIN_AE11 -to SW[6]
+set_location_assignment PIN_AC9 -to SW[7]
+set_location_assignment PIN_AD10 -to SW[8]
+set_location_assignment PIN_AE12 -to SW[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[9]
+
+#============================================================
+# TD
+#============================================================
+set_location_assignment PIN_H15 -to TD_CLK27
+set_location_assignment PIN_D2 -to TD_DATA[0]
+set_location_assignment PIN_B1 -to TD_DATA[1]
+set_location_assignment PIN_E2 -to TD_DATA[2]
+set_location_assignment PIN_B2 -to TD_DATA[3]
+set_location_assignment PIN_D1 -to TD_DATA[4]
+set_location_assignment PIN_E1 -to TD_DATA[5]
+set_location_assignment PIN_C2 -to TD_DATA[6]
+set_location_assignment PIN_B3 -to TD_DATA[7]
+set_location_assignment PIN_A5 -to TD_HS
+set_location_assignment PIN_F6 -to TD_RESET_N
+set_location_assignment PIN_A3 -to TD_VS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_CLK27
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_HS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_RESET_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_VS
+
+#============================================================
+# USB
+#============================================================
+set_location_assignment PIN_AF4 -to USB_B2_CLK
+set_location_assignment PIN_AH4 -to USB_B2_DATA[0]
+set_location_assignment PIN_AH3 -to USB_B2_DATA[1]
+set_location_assignment PIN_AJ2 -to USB_B2_DATA[2]
+set_location_assignment PIN_AJ1 -to USB_B2_DATA[3]
+set_location_assignment PIN_AH2 -to USB_B2_DATA[4]
+set_location_assignment PIN_AG3 -to USB_B2_DATA[5]
+set_location_assignment PIN_AG2 -to USB_B2_DATA[6]
+set_location_assignment PIN_AG1 -to USB_B2_DATA[7]
+set_location_assignment PIN_AF5 -to USB_EMPTY
+set_location_assignment PIN_AG5 -to USB_FULL
+set_location_assignment PIN_AF6 -to USB_OE_N
+set_location_assignment PIN_AG6 -to USB_RD_N
+set_location_assignment PIN_AG7 -to USB_RESET_N
+set_location_assignment PIN_AG8 -to USB_SCL
+set_location_assignment PIN_AF8 -to USB_SDA
+set_location_assignment PIN_AH5 -to USB_WR_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_EMPTY
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_FULL
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_OE_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_RD_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_RESET_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_SCL
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_SDA
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_WR_N
+
+#============================================================
+# VGA
+#============================================================
+set_location_assignment PIN_B13 -to VGA_B[0]
+set_location_assignment PIN_G13 -to VGA_B[1]
+set_location_assignment PIN_H13 -to VGA_B[2]
+set_location_assignment PIN_F14 -to VGA_B[3]
+set_location_assignment PIN_H14 -to VGA_B[4]
+set_location_assignment PIN_F15 -to VGA_B[5]
+set_location_assignment PIN_G15 -to VGA_B[6]
+set_location_assignment PIN_J14 -to VGA_B[7]
+set_location_assignment PIN_F10 -to VGA_BLANK_N
+set_location_assignment PIN_A11 -to VGA_CLK
+set_location_assignment PIN_J9 -to VGA_G[0]
+set_location_assignment PIN_J10 -to VGA_G[1]
+set_location_assignment PIN_H12 -to VGA_G[2]
+set_location_assignment PIN_G10 -to VGA_G[3]
+set_location_assignment PIN_G11 -to VGA_G[4]
+set_location_assignment PIN_G12 -to VGA_G[5]
+set_location_assignment PIN_F11 -to VGA_G[6]
+set_location_assignment PIN_E11 -to VGA_G[7]
+set_location_assignment PIN_B11 -to VGA_HS
+set_location_assignment PIN_A13 -to VGA_R[0]
+set_location_assignment PIN_C13 -to VGA_R[1]
+set_location_assignment PIN_E13 -to VGA_R[2]
+set_location_assignment PIN_B12 -to VGA_R[3]
+set_location_assignment PIN_C12 -to VGA_R[4]
+set_location_assignment PIN_D12 -to VGA_R[5]
+set_location_assignment PIN_E12 -to VGA_R[6]
+set_location_assignment PIN_F13 -to VGA_R[7]
+set_location_assignment PIN_C10 -to VGA_SYNC_N
+set_location_assignment PIN_D11 -to VGA_VS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_BLANK_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_HS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_SYNC_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_VS
+
+#============================================================
+# HPS
+#============================================================
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_CONV_USB_N
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[0]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[1]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[2]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[3]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[4]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[5]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[6]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[7]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[8]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[9]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[10]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[11]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[12]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[13]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[14]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_BA[0]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_BA[1]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_BA[2]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_CAS_N
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_CKE
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_CK_N
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_CK_P
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_CS_N
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DM[0]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DM[1]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DM[2]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DM[3]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[0]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[1]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[2]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[3]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[4]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[5]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[6]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[7]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[8]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[9]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[10]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[11]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[12]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[13]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[14]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[15]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[16]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[17]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[18]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[19]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[20]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[21]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[22]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[23]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[24]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[25]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[26]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[27]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[28]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[29]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[30]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[31]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_N[0]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_N[1]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_N[2]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_N[3]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_P[0]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_P[1]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_P[2]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_P[3]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ODT
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_RAS_N
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_RESET_N
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_RZQ
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_WE_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_GTX_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_INT_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_MDC
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_MDIO
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DV
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_EN
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_DCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_NCSO
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_GSENSOR_INT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C1_SCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C1_SDAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C2_SCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C2_SDAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C_CONTROL
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_KEY
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_LED
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_LTC_GPIO
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_CMD
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_MISO
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_MOSI
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_SS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_UART_RX
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_UART_TX
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_CLKOUT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DIR
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_NXT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_STP
+set_instance_assignment -name io_standard "3.3-V LVTTL" -to HPS_GPIO[0]
+set_instance_assignment -name io_standard "3.3-V LVTTL" -to HPS_GPIO[1]
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[10]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[11]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[12]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[13]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[14]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[6]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[7]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[8]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[9]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_BA[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_BA[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_BA[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_CAS_N
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_CKE
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_CS_N
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ODT
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_RAS_N
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_WE_N
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_RESET_N
+
+set_instance_assignment -name D5_DELAY 2 -to HPS_DDR3_CK_P
+set_instance_assignment -name D5_DELAY 2 -to HPS_DDR3_CK_N
+
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[0]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[1]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[2]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[3]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[4]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[5]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[6]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[7]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[8]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[9]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[10]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[11]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[12]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[13]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[14]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[15]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[16]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[17]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[18]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[19]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[20]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[21]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[22]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[23]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[24]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[25]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[26]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[27]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[28]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[29]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[30]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[31]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[0]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[1]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[2]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[3]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[0]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[1]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[2]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[3]
+
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[0]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[1]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[2]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[3]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[4]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[5]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[6]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[7]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[8]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[9]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[10]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[11]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[12]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[13]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[14]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[15]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[16]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[17]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[18]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[19]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[20]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[21]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[22]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[23]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[24]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[25]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[26]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[27]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[28]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[29]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[30]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[31]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[0]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[1]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[2]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[3]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[0]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[1]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[2]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[3]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to HPS_DDR3_CK_P
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to HPS_DDR3_CK_N
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DM[0]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DM[1]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DM[2]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DM[3]
+
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[3]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[4]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[5]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[6]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[7]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[8]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[9]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[10]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[11]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[12]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[13]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[14]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[15]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[16]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[17]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[18]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[19]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[20]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[21]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[22]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[23]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[24]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[25]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[26]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[27]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[28]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[29]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[30]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[31]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DM[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DM[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DM[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DM[3]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_P[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_P[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_P[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_P[3]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_N[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_N[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_N[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_N[3]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[10]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[11]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[12]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[13]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[14]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[3]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[4]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[5]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[6]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[7]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[8]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[9]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_BA[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_BA[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_BA[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_CAS_N
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_CKE
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_CS_N
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ODT
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_RAS_N
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_WE_N
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_RESET_N
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_CK_P
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_CK_N
+
+#============================================================
+# End of pin and io_standard assignments
+#============================================================
+
diff --git a/db/.cmp.kpt b/db/.cmp.kpt
index 8bde8b93d9b1b36f2537cba1258ce27e165eaef0..88ae147d4cf8232bf019111cf04c2a30c37e9a29 100644
Binary files a/db/.cmp.kpt and b/db/.cmp.kpt differ
diff --git a/db/de1_soc_wrapper.(5).cnf.cdb b/db/de1_soc_wrapper.(5).cnf.cdb
index eba7804513a7ba22ea3dc82863e83ebc7cbec6ba..b23d05071c6edee4391643bf1fc11728fa439253 100644
Binary files a/db/de1_soc_wrapper.(5).cnf.cdb and b/db/de1_soc_wrapper.(5).cnf.cdb differ
diff --git a/db/de1_soc_wrapper.(5).cnf.hdb b/db/de1_soc_wrapper.(5).cnf.hdb
index c78cdb78d2082b0b156e00736cdd9bcd609c192a..bc8914707bb7c3b8c59c16b143afeaef56b98de8 100644
Binary files a/db/de1_soc_wrapper.(5).cnf.hdb and b/db/de1_soc_wrapper.(5).cnf.hdb differ
diff --git a/db/de1_soc_wrapper.asm.qmsg b/db/de1_soc_wrapper.asm.qmsg
index 992db77e36458257f02e8ea4e65bb49e76db9c14..a24e8969196f658f244a0b8b0698100348123437 100644
--- a/db/de1_soc_wrapper.asm.qmsg
+++ b/db/de1_soc_wrapper.asm.qmsg
@@ -1,6 +1,6 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600942868516 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600942868519 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 11:21:08 2020 " "Processing started: Thu Sep 24 11:21:08 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600942868519 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1600942868519 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1600942868519 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1600942869656 ""}
-{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1600942876963 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1  Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1108 " "Peak virtual memory: 1108 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942877585 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 11:21:17 2020 " "Processing ended: Thu Sep 24 11:21:17 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942877585 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942877585 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:09 " "Total CPU time (on all processors): 00:00:09" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942877585 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1600942877585 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600948421285 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600948421287 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 12:53:41 2020 " "Processing started: Thu Sep 24 12:53:41 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600948421287 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1600948421287 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1600948421288 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1600948422390 ""}
+{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1600948429583 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1  Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1114 " "Peak virtual memory: 1114 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600948430198 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 12:53:50 2020 " "Processing ended: Thu Sep 24 12:53:50 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600948430198 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600948430198 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:09 " "Total CPU time (on all processors): 00:00:09" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600948430198 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1600948430198 ""}
diff --git a/db/de1_soc_wrapper.asm.rdb b/db/de1_soc_wrapper.asm.rdb
index c7eaf09befe1ca1ad9b2e59422c920e3678397af..314c2669ea52bdd8ef7a7471310299701c8174b0 100644
Binary files a/db/de1_soc_wrapper.asm.rdb and b/db/de1_soc_wrapper.asm.rdb differ
diff --git a/db/de1_soc_wrapper.cmp.bpm b/db/de1_soc_wrapper.cmp.bpm
index 4a5f706e572bec095eb04720c1eaf41812522f27..4b55462318104aac52a024aa2e03bb8f99adabf7 100644
Binary files a/db/de1_soc_wrapper.cmp.bpm and b/db/de1_soc_wrapper.cmp.bpm differ
diff --git a/db/de1_soc_wrapper.cmp.cdb b/db/de1_soc_wrapper.cmp.cdb
index f7991969e6275c03747fb4b23dfd67c2746abb66..98098c0dc28d3b1fd60d7ac0bebeac035d37faa5 100644
Binary files a/db/de1_soc_wrapper.cmp.cdb and b/db/de1_soc_wrapper.cmp.cdb differ
diff --git a/db/de1_soc_wrapper.cmp.hdb b/db/de1_soc_wrapper.cmp.hdb
index 73d73ebe9a5486a853b6b5b9e888d1df06f2f222..c692b280b71b2cece48886134ce6c5a4de46147a 100644
Binary files a/db/de1_soc_wrapper.cmp.hdb and b/db/de1_soc_wrapper.cmp.hdb differ
diff --git a/db/de1_soc_wrapper.cmp.idb b/db/de1_soc_wrapper.cmp.idb
index 8beca67c241fd223a2379c758016622902ad4e3d..fc21ff84368bd28a799e60506bd12fbb09ae1286 100644
Binary files a/db/de1_soc_wrapper.cmp.idb and b/db/de1_soc_wrapper.cmp.idb differ
diff --git a/db/de1_soc_wrapper.cmp.logdb b/db/de1_soc_wrapper.cmp.logdb
index 2a8817be965a0ba156c5d41fd7c5bd69c55c41f0..8b64b1f3f02bbabc575f0d1081f92d6354a790fc 100644
--- a/db/de1_soc_wrapper.cmp.logdb
+++ b/db/de1_soc_wrapper.cmp.logdb
@@ -1,11 +1,11 @@
 v1
 IO_RULES,NUM_CLKS_NOT_EXCEED_CLKS_AVAILABLE,INAPPLICABLE,IO_000002,Capacity Checks,Number of clocks in an I/O bank should not exceed the number of clocks available.,Critical,No Global Signal assignments found.,,I/O,,
-IO_RULES,NUM_VREF_NOT_EXCEED_LOC_AVAILABLE,INAPPLICABLE,IO_000003,Capacity Checks,Number of pins in a Vrefgroup should not exceed the number of locations available.,Critical,No Location assignments found.,,I/O,,
-IO_RULES,NUM_PINS_NOT_EXCEED_LOC_AVAILABLE,INAPPLICABLE,IO_000001,Capacity Checks,Number of pins in an I/O bank should not exceed the number of locations available.,Critical,No Location assignments found.,,I/O,,
+IO_RULES,NUM_VREF_NOT_EXCEED_LOC_AVAILABLE,PASS,IO_000003,Capacity Checks,Number of pins in a Vrefgroup should not exceed the number of locations available.,Critical,0 such failures found.,,I/O,,
+IO_RULES,NUM_PINS_NOT_EXCEED_LOC_AVAILABLE,PASS,IO_000001,Capacity Checks,Number of pins in an I/O bank should not exceed the number of locations available.,Critical,0 such failures found.,,I/O,,
 IO_RULES,IO_BANK_SUPPORT_VCCIO,INAPPLICABLE,IO_000004,Voltage Compatibility Checks,The I/O bank should support the requested VCCIO.,Critical,No IOBANK_VCCIO assignments found.,,I/O,,
 IO_RULES,IO_BANK_NOT_HAVE_COMPETING_VREF,INAPPLICABLE,IO_000005,Voltage Compatibility Checks,The I/O bank should not have competing VREF values.,Critical,No VREF I/O Standard assignments found.,,I/O,,
 IO_RULES,IO_BANK_NOT_HAVE_COMPETING_VCCIO,PASS,IO_000006,Voltage Compatibility Checks,The I/O bank should not have competing VCCIO values.,Critical,0 such failures found.,,I/O,,
-IO_RULES,CHECK_UNAVAILABLE_LOC,INAPPLICABLE,IO_000007,Valid Location Checks,Checks for unavailable locations.,Critical,No Location assignments found.,,I/O,,
+IO_RULES,CHECK_UNAVAILABLE_LOC,PASS,IO_000007,Valid Location Checks,Checks for unavailable locations.,Critical,0 such failures found.,,I/O,,
 IO_RULES,CHECK_RESERVED_LOC,INAPPLICABLE,IO_000008,Valid Location Checks,Checks for reserved locations.,Critical,No reserved LogicLock region found.,,I/O,,
 IO_RULES,IO_STD_SUPPORT_BUS_HOLD_VALUE,INAPPLICABLE,IO_000022,I/O Properties Checks for One I/O,The I/O standard should support the requested Bus Hold value.,Critical,No Enable Bus-Hold Circuitry assignments found.,,I/O,,
 IO_RULES,IO_STD_SUPPORT_WEAK_PULL_UP_VALUE,INAPPLICABLE,IO_000021,I/O Properties Checks for One I/O,The I/O standard should support the requested Weak Pull Up value.,Critical,No Weak Pull-Up Resistor assignments found.,,I/O,,
@@ -29,93 +29,93 @@ IO_RULES,LOC_SUPPORT_IO_STD,PASS,IO_000009,I/O Properties Checks for One I/O,The
 IO_RULES,SINGLE_ENDED_OUTPUTS_LAB_ROWS_FROM_DIFF_IO,INAPPLICABLE,IO_000034,SI Related Distance Checks,Single-ended outputs should be 0 LAB row(s) away from a differential I/O.,High,No Differential I/O Standard assignments found.,,I/O,,
 IO_RULES,DEV_IO_RULE_OCT_DISCLAIMER,,,,,,,,,,
 IO_RULES_MATRIX,Pin/Rules,IO_000002;IO_000003;IO_000001;IO_000004;IO_000005;IO_000006;IO_000007;IO_000008;IO_000022;IO_000021;IO_000046;IO_000023;IO_000024;IO_000026;IO_000027;IO_000045;IO_000047;IO_000020;IO_000019;IO_000018;IO_000015;IO_000014;IO_000013;IO_000012;IO_000011;IO_000010;IO_000009;IO_000034,
-IO_RULES_MATRIX,Total Pass,0;0;0;0;0;81;0;0;0;0;0;0;66;0;0;0;0;0;66;0;0;0;0;66;0;81;81;0,
+IO_RULES_MATRIX,Total Pass,0;81;81;0;0;81;81;0;0;0;0;0;66;0;0;0;0;0;66;0;0;0;0;66;0;81;81;0,
 IO_RULES_MATRIX,Total Unchecked,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0,
-IO_RULES_MATRIX,Total Inapplicable,81;81;81;81;81;0;81;81;81;81;81;81;15;81;81;81;81;81;15;81;81;81;81;15;81;0;0;81,
+IO_RULES_MATRIX,Total Inapplicable,81;0;0;81;81;0;0;81;81;81;81;81;15;81;81;81;81;81;15;81;81;81;81;15;81;0;0;81,
 IO_RULES_MATRIX,Total Fail,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0,
-IO_RULES_MATRIX,KEY[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,LEDR[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,LEDR[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,LEDR[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,LEDR[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,LEDR[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,LEDR[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,LEDR[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,LEDR[7],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,LEDR[8],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,LEDR[9],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX0[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX0[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX0[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX0[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX0[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX0[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX0[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX1[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX1[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX1[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX1[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX1[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX1[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX1[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX2[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX2[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX2[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX2[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX2[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX2[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX2[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX3[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX3[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX3[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX3[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX3[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX3[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,HEX3[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_R[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_R[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_R[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_R[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_R[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_R[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_R[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_R[7],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_G[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_G[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_G[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_G[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_G[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_G[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_G[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_G[7],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_B[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_B[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_B[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_B[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_B[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_B[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_B[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_B[7],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_HS,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_VS,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_CLK,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,VGA_BLANK_N,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,CLOCK_50,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,KEY[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,SW[7],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,KEY[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,KEY[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,SW[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,SW[9],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,SW[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,SW[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,SW[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,SW[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,SW[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,SW[8],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
-IO_RULES_MATRIX,SW[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,KEY[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[8],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[9],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_HS,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_VS,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_CLK,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_BLANK_N,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,CLOCK_50,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,KEY[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,KEY[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,KEY[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[9],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[8],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
 IO_RULES_SUMMARY,Total I/O Rules,28,
-IO_RULES_SUMMARY,Number of I/O Rules Passed,6,
+IO_RULES_SUMMARY,Number of I/O Rules Passed,9,
 IO_RULES_SUMMARY,Number of I/O Rules Failed,0,
 IO_RULES_SUMMARY,Number of I/O Rules Unchecked,0,
-IO_RULES_SUMMARY,Number of I/O Rules Inapplicable,22,
+IO_RULES_SUMMARY,Number of I/O Rules Inapplicable,19,
diff --git a/db/de1_soc_wrapper.cmp.rdb b/db/de1_soc_wrapper.cmp.rdb
index 1581ddb846fccfb892b15209c757a6c58e975485..74e512b1ec1364777438290c0a52908e1511097c 100644
Binary files a/db/de1_soc_wrapper.cmp.rdb and b/db/de1_soc_wrapper.cmp.rdb differ
diff --git a/db/de1_soc_wrapper.cyclonev_io_sim_cache.ff_0c_fast.hsd b/db/de1_soc_wrapper.cyclonev_io_sim_cache.ff_0c_fast.hsd
index fec2c9f4847c658ffed7135e24bce1d98cafe778..ba5c31cd69d5deefea500d816a134b42561fef13 100644
Binary files a/db/de1_soc_wrapper.cyclonev_io_sim_cache.ff_0c_fast.hsd and b/db/de1_soc_wrapper.cyclonev_io_sim_cache.ff_0c_fast.hsd differ
diff --git a/db/de1_soc_wrapper.cyclonev_io_sim_cache.tt_85c_slow.hsd b/db/de1_soc_wrapper.cyclonev_io_sim_cache.tt_85c_slow.hsd
index e197f90d59b93576918a9c0c113c2fb07ced993f..b5158f058f9f7656152d7ea56e459bb8be5e065f 100644
Binary files a/db/de1_soc_wrapper.cyclonev_io_sim_cache.tt_85c_slow.hsd and b/db/de1_soc_wrapper.cyclonev_io_sim_cache.tt_85c_slow.hsd differ
diff --git a/db/de1_soc_wrapper.db_info b/db/de1_soc_wrapper.db_info
index 98b26586160ea13254423bf381a3fd7375f4b3d8..38f93e2173d9d030d290af40c7618ff020f14d1c 100644
--- a/db/de1_soc_wrapper.db_info
+++ b/db/de1_soc_wrapper.db_info
@@ -1,3 +1,3 @@
 Quartus_Version = Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 Version_Index = 419482368
-Creation_Time = Thu Sep 24 10:53:11 2020
+Creation_Time = Thu Sep 24 12:46:55 2020
diff --git a/db/de1_soc_wrapper.eda.qmsg b/db/de1_soc_wrapper.eda.qmsg
index 471edfa0177d2f2d272c3878a7d1140c59f23f1c..f2c0d6a6ee96f8da66496741d16f996d51545a08 100644
--- a/db/de1_soc_wrapper.eda.qmsg
+++ b/db/de1_soc_wrapper.eda.qmsg
@@ -1,7 +1,7 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600942892206 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600942892209 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 11:21:31 2020 " "Processing started: Thu Sep 24 11:21:31 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600942892209 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1600942892209 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1600942892209 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "EDA Netlist Writer" 0 -1 1600942893250 ""}
-{ "Warning" "WQNETO_SWITCH_TO_FUNCTIONAL_SIMULATION" "" "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." {  } {  } 0 10905 "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." 0 0 "EDA Netlist Writer" 0 -1 1600942893358 ""}
-{ "Info" "IWSC_DONE_HDL_GENERATION" "de1_soc_wrapper.vo /home/ks6n19/Documents/project/simulation/modelsim/ simulation " "Generated file de1_soc_wrapper.vo in folder \"/home/ks6n19/Documents/project/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1600942894528 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 2 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1316 " "Peak virtual memory: 1316 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942894704 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 11:21:34 2020 " "Processing ended: Thu Sep 24 11:21:34 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942894704 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942894704 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Total CPU time (on all processors): 00:00:03" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942894704 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1600942894704 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600948444164 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600948444167 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 12:54:03 2020 " "Processing started: Thu Sep 24 12:54:03 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600948444167 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1600948444167 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1600948444167 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "EDA Netlist Writer" 0 -1 1600948445197 ""}
+{ "Warning" "WQNETO_SWITCH_TO_FUNCTIONAL_SIMULATION" "" "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." {  } {  } 0 10905 "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." 0 0 "EDA Netlist Writer" 0 -1 1600948445298 ""}
+{ "Info" "IWSC_DONE_HDL_GENERATION" "de1_soc_wrapper.vo /home/ks6n19/Documents/project/simulation/modelsim/ simulation " "Generated file de1_soc_wrapper.vo in folder \"/home/ks6n19/Documents/project/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1600948446376 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 2 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1316 " "Peak virtual memory: 1316 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600948446539 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 12:54:06 2020 " "Processing ended: Thu Sep 24 12:54:06 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600948446539 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600948446539 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600948446539 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1600948446539 ""}
diff --git a/db/de1_soc_wrapper.fit.qmsg b/db/de1_soc_wrapper.fit.qmsg
index 9d96a069948fc3f3a2e5ec4b65bd28fb07773d76..ec67e39304b745c884af9a7fc1853b929b17b8a2 100644
--- a/db/de1_soc_wrapper.fit.qmsg
+++ b/db/de1_soc_wrapper.fit.qmsg
@@ -1,44 +1,46 @@
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Fitter" 0 -1 1600942742508 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1600942742510 ""}
-{ "Info" "IMPP_MPP_USER_DEVICE" "de1_soc_wrapper 5CSEMA5F31C6 " "Selected device 5CSEMA5F31C6 for design \"de1_soc_wrapper\"" {  } {  } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1600942742555 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1600942742598 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1600942742598 ""}
-{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1600942743116 ""}
-{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" {  } {  } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1600942743307 ""}
-{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1600942743379 ""}
-{ "Critical Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "81 81 " "No exact pin location assignment(s) for 81 pins of 81 total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report." {  } {  } 1 169085 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report." 0 0 "Fitter" 0 -1 1600942743507 ""}
-{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" {  } {  } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1600942756454 ""}
-{ "Info" "ICCLK_CLOCKS_TOP" "1  (1 global) " "Promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "CLOCK_50~inputCLKENA0 1020 global CLKCTRL_G8 " "CLOCK_50~inputCLKENA0 with 1020 fanout uses global clock CLKCTRL_G8" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1600942756804 ""}  } {  } 0 11178 "Promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1600942756804 ""}
-{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "1  (1 global) " "Automatically promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "KEY\[2\]~inputCLKENA0 942 global CLKCTRL_G10 " "KEY\[2\]~inputCLKENA0 with 942 fanout uses global clock CLKCTRL_G10" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1600942756804 ""}  } {  } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1600942756804 ""}
-{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" {  } {  } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942756804 ""}
-{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" {  } {  } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1600942756833 ""}
-{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" {  } {  } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1600942756838 ""}
-{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" {  } {  } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1600942756846 ""}
-{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" {  } {  } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1600942756855 ""}
-{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" {  } {  } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1600942756855 ""}
-{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" {  } {  } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1600942756860 ""}
-{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1600942758132 ""}
-{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" {  } {  } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1600942758132 ""}
-{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1600942758193 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1600942758193 ""}
-{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." {  } {  } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1600942758194 ""}
-{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" {  } {  } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1600942758477 ""}
-{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" {  } {  } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1600942758483 ""}  } {  } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1600942758483 ""}
-{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:15 " "Fitter preparation operations ending: elapsed time is 00:00:15" {  } {  } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942758634 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" {  } {  } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1600942763957 ""}
-{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." {  } {  } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1600942764744 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:17 " "Fitter placement preparation operations ending: elapsed time is 00:00:17" {  } {  } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942780943 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" {  } {  } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1600942799017 ""}
-{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" {  } {  } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1600942810183 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:11 " "Fitter placement operations ending: elapsed time is 00:00:11" {  } {  } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942810183 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" {  } {  } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1600942812110 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Router estimated average interconnect usage is 2% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "27 X22_Y0 X32_Y10 " "Router estimated peak interconnect usage is 27% of the available device resources in the region that extends from location X22_Y0 to location X32_Y10" {  } { { "loc" "" { Generic "/home/ks6n19/Documents/project/" { { 1 { 0 "Router estimated peak interconnect usage is 27% of the available device resources in the region that extends from location X22_Y0 to location X32_Y10"} { { 12 { 0 ""} 22 0 11 11 }  }  }  }  } }  } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1600942819956 ""}  } {  } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1600942819956 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" {  } {  } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1600942847341 ""}  } {  } 0 170199 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1600942847341 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:32 " "Fitter routing operations ending: elapsed time is 00:00:32" {  } {  } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942847345 ""}
-{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 5.94 " "Total time spent on timing analysis during the Fitter is 5.94 seconds." {  } {  } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1600942854925 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1600942855027 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1600942856234 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1600942856237 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1600942857403 ""}
-{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:10 " "Fitter post-fit operations ending: elapsed time is 00:00:10" {  } {  } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942864634 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 4 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "2652 " "Peak virtual memory: 2652 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942866872 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 11:21:06 2020 " "Processing ended: Thu Sep 24 11:21:06 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942866872 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:02:05 " "Elapsed time: 00:02:05" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942866872 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:12:16 " "Total CPU time (on all processors): 00:12:16" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942866872 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1600942866872 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Fitter" 0 -1 1600948302670 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1600948302672 ""}
+{ "Info" "IMPP_MPP_USER_DEVICE" "de1_soc_wrapper 5CSEMA5F31C6 " "Selected device 5CSEMA5F31C6 for design \"de1_soc_wrapper\"" {  } {  } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1600948302717 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1600948302756 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1600948302756 ""}
+{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1600948303257 ""}
+{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" {  } {  } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1600948303453 ""}
+{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1600948303519 ""}
+{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" {  } {  } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1600948316438 ""}
+{ "Info" "ICCLK_CLOCKS_TOP" "1  (1 global) " "Promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "CLOCK_50~inputCLKENA0 1020 global CLKCTRL_G6 " "CLOCK_50~inputCLKENA0 with 1020 fanout uses global clock CLKCTRL_G6" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1600948316672 ""}  } {  } 0 11178 "Promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1600948316672 ""}
+{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "1  (1 global) " "Automatically promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "KEY\[2\]~inputCLKENA0 942 global CLKCTRL_G4 " "KEY\[2\]~inputCLKENA0 with 942 fanout uses global clock CLKCTRL_G4" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1600948316672 ""}  } {  } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1600948316672 ""}
+{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" {  } {  } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600948316672 ""}
+{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" {  } {  } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1600948316702 ""}
+{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" {  } {  } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1600948316706 ""}
+{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" {  } {  } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1600948316714 ""}
+{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" {  } {  } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1600948316723 ""}
+{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" {  } {  } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1600948316723 ""}
+{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" {  } {  } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1600948316727 ""}
+{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1600948317971 ""}
+{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" {  } {  } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1600948317972 ""}
+{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1600948318027 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1600948318027 ""}
+{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." {  } {  } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1600948318028 ""}
+{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" {  } {  } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1600948318320 ""}
+{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" {  } {  } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1600948318325 ""}  } {  } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1600948318325 ""}
+{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_CS_N " "Node \"ADC_CS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_CS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_DIN " "Node \"ADC_DIN\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_DIN" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_DOUT " "Node \"ADC_DOUT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_DOUT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_SCLK " "Node \"ADC_SCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_SCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_ADCDAT " "Node \"AUD_ADCDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_ADCDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_ADCLRCK " "Node \"AUD_ADCLRCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_ADCLRCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_BCLK " "Node \"AUD_BCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_BCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_DACDAT " "Node \"AUD_DACDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_DACDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_DACLRCK " "Node \"AUD_DACLRCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_DACLRCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_XCK " "Node \"AUD_XCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_XCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK2_50 " "Node \"CLOCK2_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK2_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK3_50 " "Node \"CLOCK3_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK3_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK4_50 " "Node \"CLOCK4_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK4_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[0\] " "Node \"DRAM_ADDR\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[10\] " "Node \"DRAM_ADDR\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[11\] " "Node \"DRAM_ADDR\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[12\] " "Node \"DRAM_ADDR\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[1\] " "Node \"DRAM_ADDR\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[2\] " "Node \"DRAM_ADDR\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[3\] " "Node \"DRAM_ADDR\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[4\] " "Node \"DRAM_ADDR\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[5\] " "Node \"DRAM_ADDR\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[6\] " "Node \"DRAM_ADDR\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[7\] " "Node \"DRAM_ADDR\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[8\] " "Node \"DRAM_ADDR\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[9\] " "Node \"DRAM_ADDR\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_BA\[0\] " "Node \"DRAM_BA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_BA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_BA\[1\] " "Node \"DRAM_BA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_BA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CAS_N " "Node \"DRAM_CAS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CAS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CKE " "Node \"DRAM_CKE\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CKE" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CLK " "Node \"DRAM_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CS_N " "Node \"DRAM_CS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[0\] " "Node \"DRAM_DQ\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[10\] " "Node \"DRAM_DQ\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[11\] " "Node \"DRAM_DQ\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[12\] " "Node \"DRAM_DQ\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[13\] " "Node \"DRAM_DQ\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[14\] " "Node \"DRAM_DQ\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[15\] " "Node \"DRAM_DQ\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[1\] " "Node \"DRAM_DQ\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[2\] " "Node \"DRAM_DQ\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[3\] " "Node \"DRAM_DQ\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[4\] " "Node \"DRAM_DQ\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[5\] " "Node \"DRAM_DQ\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[6\] " "Node \"DRAM_DQ\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[7\] " "Node \"DRAM_DQ\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[8\] " "Node \"DRAM_DQ\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[9\] " "Node \"DRAM_DQ\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_LDQM " "Node \"DRAM_LDQM\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_LDQM" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_RAS_N " "Node \"DRAM_RAS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_RAS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_UDQM " "Node \"DRAM_UDQM\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_UDQM" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_WE_N " "Node \"DRAM_WE_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_WE_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FAN_CTRL " "Node \"FAN_CTRL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FAN_CTRL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FPGA_I2C_SCLK " "Node \"FPGA_I2C_SCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FPGA_I2C_SCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FPGA_I2C_SDAT " "Node \"FPGA_I2C_SDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FPGA_I2C_SDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[0\] " "Node \"GPIO_0\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[10\] " "Node \"GPIO_0\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[11\] " "Node \"GPIO_0\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[12\] " "Node \"GPIO_0\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[13\] " "Node \"GPIO_0\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[14\] " "Node \"GPIO_0\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[15\] " "Node \"GPIO_0\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[16\] " "Node \"GPIO_0\[16\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[16\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[17\] " "Node \"GPIO_0\[17\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[17\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[18\] " "Node \"GPIO_0\[18\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[18\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[19\] " "Node \"GPIO_0\[19\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[19\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[1\] " "Node \"GPIO_0\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[20\] " "Node \"GPIO_0\[20\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[20\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[21\] " "Node \"GPIO_0\[21\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[21\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[22\] " "Node \"GPIO_0\[22\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[22\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[23\] " "Node \"GPIO_0\[23\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[23\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[24\] " "Node \"GPIO_0\[24\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[24\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[25\] " "Node \"GPIO_0\[25\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[25\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[26\] " "Node \"GPIO_0\[26\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[26\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[27\] " "Node \"GPIO_0\[27\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[27\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[28\] " "Node \"GPIO_0\[28\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[28\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[29\] " "Node \"GPIO_0\[29\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[29\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[2\] " "Node \"GPIO_0\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[30\] " "Node \"GPIO_0\[30\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[30\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[31\] " "Node \"GPIO_0\[31\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[31\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[32\] " "Node \"GPIO_0\[32\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[32\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[33\] " "Node \"GPIO_0\[33\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[33\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[34\] " "Node \"GPIO_0\[34\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[34\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[35\] " "Node \"GPIO_0\[35\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[35\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[3\] " "Node \"GPIO_0\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[4\] " "Node \"GPIO_0\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[5\] " "Node \"GPIO_0\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[6\] " "Node \"GPIO_0\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[7\] " "Node \"GPIO_0\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[8\] " "Node \"GPIO_0\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[9\] " "Node \"GPIO_0\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[0\] " "Node \"GPIO_1\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[10\] " "Node \"GPIO_1\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[11\] " "Node \"GPIO_1\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[12\] " "Node \"GPIO_1\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[13\] " "Node \"GPIO_1\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[14\] " "Node \"GPIO_1\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[15\] " "Node \"GPIO_1\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[16\] " "Node \"GPIO_1\[16\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[16\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[17\] " "Node \"GPIO_1\[17\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[17\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[18\] " "Node \"GPIO_1\[18\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[18\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[19\] " "Node \"GPIO_1\[19\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[19\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[1\] " "Node \"GPIO_1\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[20\] " "Node \"GPIO_1\[20\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[20\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[21\] " "Node \"GPIO_1\[21\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[21\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[22\] " "Node \"GPIO_1\[22\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[22\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[23\] " "Node \"GPIO_1\[23\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[23\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[24\] " "Node \"GPIO_1\[24\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[24\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[25\] " "Node \"GPIO_1\[25\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[25\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[26\] " "Node \"GPIO_1\[26\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[26\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[27\] " "Node \"GPIO_1\[27\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[27\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[28\] " "Node \"GPIO_1\[28\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[28\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[29\] " "Node \"GPIO_1\[29\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[29\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[2\] " "Node \"GPIO_1\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[30\] " "Node \"GPIO_1\[30\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[30\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[31\] " "Node \"GPIO_1\[31\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[31\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[32\] " "Node \"GPIO_1\[32\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[32\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[33\] " "Node \"GPIO_1\[33\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[33\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[34\] " "Node \"GPIO_1\[34\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[34\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[35\] " "Node \"GPIO_1\[35\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[35\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[3\] " "Node \"GPIO_1\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[4\] " "Node \"GPIO_1\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[5\] " "Node \"GPIO_1\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[6\] " "Node \"GPIO_1\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[7\] " "Node \"GPIO_1\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[8\] " "Node \"GPIO_1\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[9\] " "Node \"GPIO_1\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[0\] " "Node \"HEX4\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[1\] " "Node \"HEX4\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[2\] " "Node \"HEX4\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[3\] " "Node \"HEX4\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[4\] " "Node \"HEX4\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[5\] " "Node \"HEX4\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[6\] " "Node \"HEX4\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[0\] " "Node \"HEX5\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[1\] " "Node \"HEX5\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[2\] " "Node \"HEX5\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[3\] " "Node \"HEX5\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[4\] " "Node \"HEX5\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[5\] " "Node \"HEX5\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[6\] " "Node \"HEX5\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "IRDA_RXD " "Node \"IRDA_RXD\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "IRDA_RXD" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "IRDA_TXD " "Node \"IRDA_TXD\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "IRDA_TXD" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_CLK " "Node \"PS2_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_CLK2 " "Node \"PS2_CLK2\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_CLK2" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_DAT " "Node \"PS2_DAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_DAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_DAT2 " "Node \"PS2_DAT2\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_DAT2" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_CLK27 " "Node \"TD_CLK27\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_CLK27" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[0\] " "Node \"TD_DATA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[1\] " "Node \"TD_DATA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[2\] " "Node \"TD_DATA\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[3\] " "Node \"TD_DATA\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[4\] " "Node \"TD_DATA\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[5\] " "Node \"TD_DATA\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[6\] " "Node \"TD_DATA\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[7\] " "Node \"TD_DATA\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_HS " "Node \"TD_HS\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_HS" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_RESET_N " "Node \"TD_RESET_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_RESET_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_VS " "Node \"TD_VS\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_VS" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_CLK " "Node \"USB_B2_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[0\] " "Node \"USB_B2_DATA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[1\] " "Node \"USB_B2_DATA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[2\] " "Node \"USB_B2_DATA\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[3\] " "Node \"USB_B2_DATA\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[4\] " "Node \"USB_B2_DATA\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[5\] " "Node \"USB_B2_DATA\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[6\] " "Node \"USB_B2_DATA\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[7\] " "Node \"USB_B2_DATA\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_EMPTY " "Node \"USB_EMPTY\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_EMPTY" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_FULL " "Node \"USB_FULL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_FULL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_OE_N " "Node \"USB_OE_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_OE_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_RD_N " "Node \"USB_RD_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_RD_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_RESET_N " "Node \"USB_RESET_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_RESET_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_SCL " "Node \"USB_SCL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_SCL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_SDA " "Node \"USB_SDA\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_SDA" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_WR_N " "Node \"USB_WR_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_WR_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "VGA_SYNC_N " "Node \"VGA_SYNC_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "VGA_SYNC_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1600948318497 ""}  } {  } 0 15705 "Ignored locations or region assignments to the following nodes" 0 0 "Fitter" 0 -1 1600948318497 ""}
+{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:15 " "Fitter preparation operations ending: elapsed time is 00:00:15" {  } {  } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600948318503 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" {  } {  } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1600948323699 ""}
+{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." {  } {  } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1600948324478 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:15 " "Fitter placement preparation operations ending: elapsed time is 00:00:15" {  } {  } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600948338926 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" {  } {  } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1600948354804 ""}
+{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" {  } {  } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1600948363608 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:09 " "Fitter placement operations ending: elapsed time is 00:00:09" {  } {  } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600948363608 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" {  } {  } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1600948365554 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Router estimated average interconnect usage is 2% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "35 X22_Y11 X32_Y22 " "Router estimated peak interconnect usage is 35% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22" {  } { { "loc" "" { Generic "/home/ks6n19/Documents/project/" { { 1 { 0 "Router estimated peak interconnect usage is 35% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22"} { { 12 { 0 ""} 22 11 11 12 }  }  }  }  } }  } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1600948373766 ""}  } {  } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1600948373766 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" {  } {  } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1600948399436 ""}  } {  } 0 170199 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1600948399436 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:30 " "Fitter routing operations ending: elapsed time is 00:00:30" {  } {  } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600948399440 ""}
+{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 5.76 " "Total time spent on timing analysis during the Fitter is 5.76 seconds." {  } {  } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1600948407156 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1600948407256 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1600948408442 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1600948408446 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1600948409590 ""}
+{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:09 " "Fitter post-fit operations ending: elapsed time is 00:00:09" {  } {  } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600948416839 ""}
+{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." {  } {  } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1600948417110 ""}
+{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1600948417444 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 182 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 182 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "2658 " "Peak virtual memory: 2658 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600948419223 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 12:53:39 2020 " "Processing ended: Thu Sep 24 12:53:39 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600948419223 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:01:58 " "Elapsed time: 00:01:58" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600948419223 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:11:00 " "Total CPU time (on all processors): 00:11:00" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600948419223 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1600948419223 ""}
diff --git a/db/de1_soc_wrapper.hier_info b/db/de1_soc_wrapper.hier_info
index 5ace155ddb0cfdb99fd3c4db256b0320ecb2cd3c..e6b6abcbfc42a3859620ae049e614beb21115c54 100644
--- a/db/de1_soc_wrapper.hier_info
+++ b/db/de1_soc_wrapper.hier_info
@@ -14,72 +14,72 @@ KEY[0] => KEY[0].IN1
 KEY[1] => KEY[1].IN1
 KEY[2] => HRESETn.IN1
 KEY[3] => KEY[3].IN1
-LEDR[0] <= <GND>
-LEDR[1] <= <GND>
-LEDR[2] <= <GND>
-LEDR[3] <= <GND>
-LEDR[4] <= <GND>
-LEDR[5] <= <GND>
-LEDR[6] <= <GND>
-LEDR[7] <= <GND>
-LEDR[8] <= <GND>
-LEDR[9] <= <GND>
-HEX0[0] <= <VCC>
-HEX0[1] <= <VCC>
-HEX0[2] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
-HEX0[3] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
-HEX0[4] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
-HEX0[5] <= <VCC>
-HEX0[6] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
-HEX1[0] <= arm_soc:soc_inst.LOCKUP
-HEX1[1] <= <VCC>
-HEX1[2] <= <VCC>
-HEX1[3] <= <VCC>
-HEX1[4] <= <VCC>
-HEX1[5] <= <VCC>
-HEX1[6] <= <VCC>
-HEX2[0] <= <VCC>
-HEX2[1] <= <VCC>
-HEX2[2] <= <VCC>
-HEX2[3] <= <VCC>
-HEX2[4] <= running.DB_MAX_OUTPUT_PORT_TYPE
-HEX2[5] <= <VCC>
-HEX2[6] <= running.DB_MAX_OUTPUT_PORT_TYPE
-HEX3[0] <= <VCC>
-HEX3[1] <= <VCC>
-HEX3[2] <= <VCC>
-HEX3[3] <= arm_soc:soc_inst.LOCKUP
-HEX3[4] <= arm_soc:soc_inst.LOCKUP
-HEX3[5] <= arm_soc:soc_inst.LOCKUP
-HEX3[6] <= <VCC>
-VGA_R[0] <= razzle:raz_inst.VGA_R
-VGA_R[1] <= razzle:raz_inst.VGA_R
-VGA_R[2] <= razzle:raz_inst.VGA_R
-VGA_R[3] <= razzle:raz_inst.VGA_R
-VGA_R[4] <= razzle:raz_inst.VGA_R
-VGA_R[5] <= razzle:raz_inst.VGA_R
-VGA_R[6] <= razzle:raz_inst.VGA_R
-VGA_R[7] <= razzle:raz_inst.VGA_R
-VGA_G[0] <= razzle:raz_inst.VGA_G
-VGA_G[1] <= razzle:raz_inst.VGA_G
-VGA_G[2] <= razzle:raz_inst.VGA_G
-VGA_G[3] <= razzle:raz_inst.VGA_G
-VGA_G[4] <= razzle:raz_inst.VGA_G
-VGA_G[5] <= razzle:raz_inst.VGA_G
-VGA_G[6] <= razzle:raz_inst.VGA_G
-VGA_G[7] <= razzle:raz_inst.VGA_G
-VGA_B[0] <= razzle:raz_inst.VGA_B
-VGA_B[1] <= razzle:raz_inst.VGA_B
-VGA_B[2] <= razzle:raz_inst.VGA_B
-VGA_B[3] <= razzle:raz_inst.VGA_B
-VGA_B[4] <= razzle:raz_inst.VGA_B
-VGA_B[5] <= razzle:raz_inst.VGA_B
-VGA_B[6] <= razzle:raz_inst.VGA_B
-VGA_B[7] <= razzle:raz_inst.VGA_B
-VGA_HS <= razzle:raz_inst.VGA_HS
-VGA_VS <= razzle:raz_inst.VGA_VS
-VGA_CLK <= razzle:raz_inst.VGA_CLK
-VGA_BLANK_N <= razzle:raz_inst.VGA_BLANK_N
+LEDR[0] << <GND>
+LEDR[1] << <GND>
+LEDR[2] << <GND>
+LEDR[3] << <GND>
+LEDR[4] << <GND>
+LEDR[5] << <GND>
+LEDR[6] << <GND>
+LEDR[7] << <GND>
+LEDR[8] << <GND>
+LEDR[9] << <GND>
+HEX0[0] << <VCC>
+HEX0[1] << <VCC>
+HEX0[2] << heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX0[3] << heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX0[4] << heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX0[5] << <VCC>
+HEX0[6] << heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX1[0] << arm_soc:soc_inst.LOCKUP
+HEX1[1] << <VCC>
+HEX1[2] << <VCC>
+HEX1[3] << <VCC>
+HEX1[4] << <VCC>
+HEX1[5] << <VCC>
+HEX1[6] << <VCC>
+HEX2[0] << <VCC>
+HEX2[1] << <VCC>
+HEX2[2] << <VCC>
+HEX2[3] << <VCC>
+HEX2[4] << running.DB_MAX_OUTPUT_PORT_TYPE
+HEX2[5] << <VCC>
+HEX2[6] << running.DB_MAX_OUTPUT_PORT_TYPE
+HEX3[0] << <VCC>
+HEX3[1] << <VCC>
+HEX3[2] << <VCC>
+HEX3[3] << arm_soc:soc_inst.LOCKUP
+HEX3[4] << arm_soc:soc_inst.LOCKUP
+HEX3[5] << arm_soc:soc_inst.LOCKUP
+HEX3[6] << <VCC>
+VGA_R[0] << razzle:raz_inst.VGA_R
+VGA_R[1] << razzle:raz_inst.VGA_R
+VGA_R[2] << razzle:raz_inst.VGA_R
+VGA_R[3] << razzle:raz_inst.VGA_R
+VGA_R[4] << razzle:raz_inst.VGA_R
+VGA_R[5] << razzle:raz_inst.VGA_R
+VGA_R[6] << razzle:raz_inst.VGA_R
+VGA_R[7] << razzle:raz_inst.VGA_R
+VGA_G[0] << razzle:raz_inst.VGA_G
+VGA_G[1] << razzle:raz_inst.VGA_G
+VGA_G[2] << razzle:raz_inst.VGA_G
+VGA_G[3] << razzle:raz_inst.VGA_G
+VGA_G[4] << razzle:raz_inst.VGA_G
+VGA_G[5] << razzle:raz_inst.VGA_G
+VGA_G[6] << razzle:raz_inst.VGA_G
+VGA_G[7] << razzle:raz_inst.VGA_G
+VGA_B[0] << razzle:raz_inst.VGA_B
+VGA_B[1] << razzle:raz_inst.VGA_B
+VGA_B[2] << razzle:raz_inst.VGA_B
+VGA_B[3] << razzle:raz_inst.VGA_B
+VGA_B[4] << razzle:raz_inst.VGA_B
+VGA_B[5] << razzle:raz_inst.VGA_B
+VGA_B[6] << razzle:raz_inst.VGA_B
+VGA_B[7] << razzle:raz_inst.VGA_B
+VGA_HS << razzle:raz_inst.VGA_HS
+VGA_VS << razzle:raz_inst.VGA_VS
+VGA_CLK << razzle:raz_inst.VGA_CLK
+VGA_BLANK_N << razzle:raz_inst.VGA_BLANK_N
 
 
 |de1_soc_wrapper|arm_soc:soc_inst
diff --git a/db/de1_soc_wrapper.hif b/db/de1_soc_wrapper.hif
index 4a677983222f4be16726857841f58666fd493fec..06d4b5999d79d71e12fd69e40b6a4f0b9e1409f7 100644
Binary files a/db/de1_soc_wrapper.hif and b/db/de1_soc_wrapper.hif differ
diff --git a/db/de1_soc_wrapper.map.bpm b/db/de1_soc_wrapper.map.bpm
index b513d9c2dabe2df3c4e047cb9c1bc8bf0b6caa3d..0451adac0221d1a75ff17c3c69f2bfc59dbd8662 100644
Binary files a/db/de1_soc_wrapper.map.bpm and b/db/de1_soc_wrapper.map.bpm differ
diff --git a/db/de1_soc_wrapper.map.cdb b/db/de1_soc_wrapper.map.cdb
index d46c07e2f8aac72fcbe2a2ca94869ac47ff3159c..f72959156741346a86a6c002343f47f2b6ca633f 100644
Binary files a/db/de1_soc_wrapper.map.cdb and b/db/de1_soc_wrapper.map.cdb differ
diff --git a/db/de1_soc_wrapper.map.hdb b/db/de1_soc_wrapper.map.hdb
index 2148ca4a58eab4b6a87bace0925b31036394e40a..a1258ca3d0c93ac2d156af83bf4c4eea7d47815f 100644
Binary files a/db/de1_soc_wrapper.map.hdb and b/db/de1_soc_wrapper.map.hdb differ
diff --git a/db/de1_soc_wrapper.map.kpt b/db/de1_soc_wrapper.map.kpt
index 6291962feadf28a3a616e7f5ce4c74ebc00f3048..cab027c2a14de8936112d6b4713e42bcc2ce15d1 100644
Binary files a/db/de1_soc_wrapper.map.kpt and b/db/de1_soc_wrapper.map.kpt differ
diff --git a/db/de1_soc_wrapper.map.qmsg b/db/de1_soc_wrapper.map.qmsg
index c202d25d1a79975e9977a0fcbd5d8606e8b3c6ac..fe16d233aaf141afb534f194ccdfd6e14b9791ee 100644
--- a/db/de1_soc_wrapper.map.qmsg
+++ b/db/de1_soc_wrapper.map.qmsg
@@ -1,72 +1,70 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600942713587 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600942713589 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 11:18:33 2020 " "Processing started: Thu Sep 24 11:18:33 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600942713589 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942713589 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942713590 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1600942713910 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1600942713910 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/razzle.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/razzle.sv" { { "Info" "ISGN_ENTITY_NAME" "1 razzle " "Found entity 1: razzle" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942722999 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942722999 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_interconnect.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_interconnect.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_interconnect " "Found entity 1: ahb_interconnect" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723004 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723004 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_pixel_memory.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_pixel_memory.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_pixel_memory " "Found entity 1: ahb_pixel_memory" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 23 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723007 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723007 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_ram.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_ram.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_ram " "Found entity 1: ahb_ram" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 24 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723011 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723011 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_switches.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_switches.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_switches " "Found entity 1: ahb_switches" {  } { { "behavioural/ahb_switches.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_switches.sv" 32 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723014 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723014 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/arm_soc.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/arm_soc.sv" { { "Info" "ISGN_ENTITY_NAME" "1 arm_soc " "Found entity 1: arm_soc" {  } { { "behavioural/arm_soc.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 4 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723018 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723018 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/CORTEXM0DS.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/CORTEXM0DS.sv" { { "Info" "ISGN_ENTITY_NAME" "1 CORTEXM0DS " "Found entity 1: CORTEXM0DS" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723022 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723022 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/cortexm0ds_logic.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/cortexm0ds_logic.sv" { { "Info" "ISGN_ENTITY_NAME" "1 cortexm0ds_logic " "Found entity 1: cortexm0ds_logic" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723071 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723071 ""}
-{ "Warning" "WVRFX_L3_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "de1_soc_wrapper.sv(64) " "Verilog HDL information at de1_soc_wrapper.sv(64): always construct contains both blocking and non-blocking assignments" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 64 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: always construct contains both blocking and non-blocking assignments" 1 0 "Analysis & Synthesis" 0 -1 1600942723074 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/de1_soc_wrapper.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/de1_soc_wrapper.sv" { { "Info" "ISGN_ENTITY_NAME" "1 de1_soc_wrapper " "Found entity 1: de1_soc_wrapper" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723075 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723075 ""}
-{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Green_Data razzle.sv(44) " "Verilog HDL Implicit Net warning at razzle.sv(44): created implicit net for \"Green_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 44 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723075 ""}
-{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Blue_Data razzle.sv(45) " "Verilog HDL Implicit Net warning at razzle.sv(45): created implicit net for \"Blue_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 45 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723075 ""}
-{ "Info" "ISGN_START_ELABORATION_TOP" "de1_soc_wrapper " "Elaborating entity \"de1_soc_wrapper\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1600942723482 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 26 de1_soc_wrapper.sv(75) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(75): truncated value with size 32 to match size of target (26)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 75 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942723485 "|de1_soc_wrapper"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 7 de1_soc_wrapper.sv(87) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(87): truncated value with size 8 to match size of target (7)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 87 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942723485 "|de1_soc_wrapper"}
-{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR de1_soc_wrapper.sv(15) " "Output port \"LEDR\" at de1_soc_wrapper.sv(15) has no driver" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1600942723486 "|de1_soc_wrapper"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "arm_soc arm_soc:soc_inst " "Elaborating entity \"arm_soc\" for hierarchy \"arm_soc:soc_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "soc_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 42 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723506 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CORTEXM0DS arm_soc:soc_inst\|CORTEXM0DS:m0_1 " "Elaborating entity \"CORTEXM0DS\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\"" {  } { { "behavioural/arm_soc.sv" "m0_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 56 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723522 ""}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_msp CORTEXM0DS.sv(76) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(76): object \"cm0_msp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 76 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723524 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_psp CORTEXM0DS.sv(77) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(77): object \"cm0_psp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 77 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723524 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_pc CORTEXM0DS.sv(79) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(79): object \"cm0_pc\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 79 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723524 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_xpsr CORTEXM0DS.sv(80) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(80): object \"cm0_xpsr\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 80 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723524 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_control CORTEXM0DS.sv(81) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(81): object \"cm0_control\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 81 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723524 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_primask CORTEXM0DS.sv(82) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(82): object \"cm0_primask\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 82 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723525 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cortexm0ds_logic arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic " "Elaborating entity \"cortexm0ds_logic\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic\"" {  } { { "behavioural/CORTEXM0DS.sv" "u_logic" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 144 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723525 ""}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "N4i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"N4i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723553 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "L5i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"L5i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723553 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_interconnect arm_soc:soc_inst\|ahb_interconnect:interconnect_1 " "Elaborating entity \"ahb_interconnect\" for hierarchy \"arm_soc:soc_inst\|ahb_interconnect:interconnect_1\"" {  } { { "behavioural/arm_soc.sv" "interconnect_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 68 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723559 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(39) " "Verilog HDL assignment warning at ahb_interconnect.sv(39): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 39 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942723561 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(41) " "Verilog HDL assignment warning at ahb_interconnect.sv(41): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 41 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942723561 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(43) " "Verilog HDL assignment warning at ahb_interconnect.sv(43): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 43 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942723561 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_ram arm_soc:soc_inst\|ahb_ram:ram_1 " "Elaborating entity \"ahb_ram\" for hierarchy \"arm_soc:soc_inst\|ahb_ram:ram_1\"" {  } { { "behavioural/arm_soc.sv" "ram_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 79 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723564 ""}
-{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "199 0 4095 ahb_ram.sv(69) " "Verilog HDL warning at ahb_ram.sv(69): number of words (199) in memory file does not match the number of elements in the address range \[0:4095\]" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 69 0 0 } }  } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1600942723596 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_switches arm_soc:soc_inst\|ahb_switches:switches_1 " "Elaborating entity \"ahb_switches\" for hierarchy \"arm_soc:soc_inst\|ahb_switches:switches_1\"" {  } { { "behavioural/arm_soc.sv" "switches_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 89 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723981 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_pixel_memory arm_soc:soc_inst\|ahb_pixel_memory:pix1 " "Elaborating entity \"ahb_pixel_memory\" for hierarchy \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\"" {  } { { "behavioural/arm_soc.sv" "pix1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 95 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723984 ""}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "read_enable ahb_pixel_memory.sv(62) " "Verilog HDL or VHDL warning at ahb_pixel_memory.sv(62): object \"read_enable\" assigned a value but never read" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 62 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942724116 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ahb_pixel_memory.sv(94) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(94): truncated value with size 32 to match size of target (1)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 94 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724127 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 19 ahb_pixel_memory.sv(98) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(98): truncated value with size 32 to match size of target (19)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 98 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724128 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "razzle razzle:raz_inst " "Elaborating entity \"razzle\" for hierarchy \"razzle:raz_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "raz_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 49 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942724315 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(34) " "Verilog HDL assignment warning at razzle.sv(34): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 34 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(35) " "Verilog HDL assignment warning at razzle.sv(35): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 35 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(36) " "Verilog HDL assignment warning at razzle.sv(36): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 36 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "10 1 razzle.sv(43) " "Verilog HDL assignment warning at razzle.sv(43): truncated value with size 10 to match size of target (1)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 43 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 10 razzle.sv(55) " "Verilog HDL assignment warning at razzle.sv(55): truncated value with size 11 to match size of target (10)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 55 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 9 razzle.sv(56) " "Verilog HDL assignment warning at razzle.sv(56): truncated value with size 11 to match size of target (9)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 56 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(95) " "Verilog HDL assignment warning at razzle.sv(95): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 95 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(112) " "Verilog HDL assignment warning at razzle.sv(112): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 112 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Inferred 2 megafunctions from design logic" { { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 1 " "Parameter WIDTH_A set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 19 " "Parameter WIDTHAD_A set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 307200 " "Parameter NUMWORDS_A set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 1 " "Parameter WIDTH_B set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 19 " "Parameter WIDTHAD_B set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 307200 " "Parameter NUMWORDS_B set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 32 " "Parameter WIDTH_A set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 12 " "Parameter WIDTHAD_A set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 4096 " "Parameter NUMWORDS_A set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 32 " "Parameter WIDTH_B set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 12 " "Parameter WIDTHAD_B set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 4096 " "Parameter NUMWORDS_B set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1600942728516 ""}  } {  } 0 19000 "Inferred %1!d! megafunctions from design logic" 0 0 "Analysis & Synthesis" 0 -1 1600942728516 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942728702 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 1 " "Parameter \"WIDTH_A\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 19 " "Parameter \"WIDTHAD_A\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 307200 " "Parameter \"NUMWORDS_A\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 1 " "Parameter \"WIDTH_B\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 19 " "Parameter \"WIDTHAD_B\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 307200 " "Parameter \"NUMWORDS_B\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1600942728702 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_efn1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_efn1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_efn1 " "Found entity 1: altsyncram_efn1" {  } { { "db/altsyncram_efn1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_efn1.tdf" 32 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942728783 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942728783 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_3na.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_3na.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_3na " "Found entity 1: decode_3na" {  } { { "db/decode_3na.tdf" "" { Text "/home/ks6n19/Documents/project/db/decode_3na.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942728889 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942728889 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_chb.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mux_chb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_chb " "Found entity 1: mux_chb" {  } { { "db/mux_chb.tdf" "" { Text "/home/ks6n19/Documents/project/db/mux_chb.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942728971 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942728971 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942729007 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 32 " "Parameter \"WIDTH_A\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 12 " "Parameter \"WIDTHAD_A\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 4096 " "Parameter \"NUMWORDS_A\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 32 " "Parameter \"WIDTH_B\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 12 " "Parameter \"WIDTHAD_B\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 4096 " "Parameter \"NUMWORDS_B\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1600942729007 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_nms1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_nms1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_nms1 " "Found entity 1: altsyncram_nms1" {  } { { "db/altsyncram_nms1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_nms1.tdf" 28 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942729084 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942729084 ""}
-{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" {  } { { "altsyncram.tdf" "" { Text "/srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } }  } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1600942729114 ""}
-{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" {  } { { "altsyncram.tdf" "" { Text "/srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } }  } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1600942729118 ""}
-{ "Warning" "WSGN_CONNECTIVITY_WARNINGS" "1 " "1 hierarchies have connectivity warnings - see the Connectivity Checks report folder" {  } {  } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Analysis & Synthesis" 0 -1 1600942729551 ""}
-{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[0\] GND " "Pin \"LEDR\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[1\] GND " "Pin \"LEDR\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[2\] GND " "Pin \"LEDR\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[3\] GND " "Pin \"LEDR\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[4\] GND " "Pin \"LEDR\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[5\] GND " "Pin \"LEDR\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[6\] GND " "Pin \"LEDR\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[7\] GND " "Pin \"LEDR\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[8\] GND " "Pin \"LEDR\[8\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[8]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[9\] GND " "Pin \"LEDR\[9\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[9]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[0\] VCC " "Pin \"HEX0\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX0[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[1\] VCC " "Pin \"HEX0\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX0[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[5\] VCC " "Pin \"HEX0\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX0[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[1\] VCC " "Pin \"HEX1\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[2\] VCC " "Pin \"HEX1\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[3\] VCC " "Pin \"HEX1\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[4\] VCC " "Pin \"HEX1\[4\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[5\] VCC " "Pin \"HEX1\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[6\] VCC " "Pin \"HEX1\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[0\] VCC " "Pin \"HEX2\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[1\] VCC " "Pin \"HEX2\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX2[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[2\] VCC " "Pin \"HEX2\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX2[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[3\] VCC " "Pin \"HEX2\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX2[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[5\] VCC " "Pin \"HEX2\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX2[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[0\] VCC " "Pin \"HEX3\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX3[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[1\] VCC " "Pin \"HEX3\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX3[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[2\] VCC " "Pin \"HEX3\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX3[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[6\] VCC " "Pin \"HEX3\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX3[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[0\] GND " "Pin \"VGA_G\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[1\] GND " "Pin \"VGA_G\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[2\] GND " "Pin \"VGA_G\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[3\] GND " "Pin \"VGA_G\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[4\] GND " "Pin \"VGA_G\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[5\] GND " "Pin \"VGA_G\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[6\] GND " "Pin \"VGA_G\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[7\] GND " "Pin \"VGA_G\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[0\] GND " "Pin \"VGA_B\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[1\] GND " "Pin \"VGA_B\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[2\] GND " "Pin \"VGA_B\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[3\] GND " "Pin \"VGA_B\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[4\] GND " "Pin \"VGA_B\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[5\] GND " "Pin \"VGA_B\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[6\] GND " "Pin \"VGA_B\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[7\] GND " "Pin \"VGA_B\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[7]"}  } {  } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1600942732803 ""}
-{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" {  } {  } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1600942733024 ""}
-{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "17 " "17 registers lost all their fanouts during netlist optimizations." {  } {  } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1600942739907 ""}
-{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942740055 ""}
-{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" {  } {  } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1600942740418 ""}  } {  } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942740418 ""}
-{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[3\] " "No output dependent on input pin \"KEY\[3\]\"" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 13 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1600942740767 "|de1_soc_wrapper|KEY[3]"}  } {  } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1600942740767 ""}
-{ "Info" "ICUT_CUT_TM_SUMMARY" "3988 " "Implemented 3988 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1600942740780 ""} { "Info" "ICUT_CUT_TM_OPINS" "66 " "Implemented 66 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1600942740780 ""} { "Info" "ICUT_CUT_TM_LCELLS" "3837 " "Implemented 3837 logic cells" {  } {  } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1600942740780 ""} { "Info" "ICUT_CUT_TM_RAMS" "70 " "Implemented 70 RAM segments" {  } {  } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1600942740780 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1600942740780 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 79 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 79 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1276 " "Peak virtual memory: 1276 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942740817 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 11:19:00 2020 " "Processing ended: Thu Sep 24 11:19:00 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942740817 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:27 " "Elapsed time: 00:00:27" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942740817 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:42 " "Total CPU time (on all processors): 00:00:42" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942740817 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942740817 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600948274723 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600948274726 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 12:51:14 2020 " "Processing started: Thu Sep 24 12:51:14 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600948274726 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948274726 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948274726 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1600948275287 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1600948275287 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/razzle.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/razzle.sv" { { "Info" "ISGN_ENTITY_NAME" "1 razzle " "Found entity 1: razzle" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948284642 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948284642 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_interconnect.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_interconnect.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_interconnect " "Found entity 1: ahb_interconnect" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948284646 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948284646 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_pixel_memory.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_pixel_memory.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_pixel_memory " "Found entity 1: ahb_pixel_memory" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 23 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948284649 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948284649 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_ram.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_ram.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_ram " "Found entity 1: ahb_ram" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 24 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948284652 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948284652 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_switches.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_switches.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_switches " "Found entity 1: ahb_switches" {  } { { "behavioural/ahb_switches.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_switches.sv" 32 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948284656 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948284656 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/arm_soc.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/arm_soc.sv" { { "Info" "ISGN_ENTITY_NAME" "1 arm_soc " "Found entity 1: arm_soc" {  } { { "behavioural/arm_soc.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 4 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948284659 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948284659 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/CORTEXM0DS.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/CORTEXM0DS.sv" { { "Info" "ISGN_ENTITY_NAME" "1 CORTEXM0DS " "Found entity 1: CORTEXM0DS" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948284662 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948284662 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/cortexm0ds_logic.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/cortexm0ds_logic.sv" { { "Info" "ISGN_ENTITY_NAME" "1 cortexm0ds_logic " "Found entity 1: cortexm0ds_logic" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948284705 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948284705 ""}
+{ "Warning" "WVRFX_L3_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "de1_soc_wrapper.sv(64) " "Verilog HDL information at de1_soc_wrapper.sv(64): always construct contains both blocking and non-blocking assignments" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 64 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: always construct contains both blocking and non-blocking assignments" 1 0 "Analysis & Synthesis" 0 -1 1600948284708 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/de1_soc_wrapper.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/de1_soc_wrapper.sv" { { "Info" "ISGN_ENTITY_NAME" "1 de1_soc_wrapper " "Found entity 1: de1_soc_wrapper" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948284708 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948284708 ""}
+{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Green_Data razzle.sv(44) " "Verilog HDL Implicit Net warning at razzle.sv(44): created implicit net for \"Green_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 44 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948284709 ""}
+{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Blue_Data razzle.sv(45) " "Verilog HDL Implicit Net warning at razzle.sv(45): created implicit net for \"Blue_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 45 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948284709 ""}
+{ "Info" "ISGN_START_ELABORATION_TOP" "de1_soc_wrapper " "Elaborating entity \"de1_soc_wrapper\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1600948284923 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 26 de1_soc_wrapper.sv(75) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(75): truncated value with size 32 to match size of target (26)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 75 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948284926 "|de1_soc_wrapper"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 7 de1_soc_wrapper.sv(87) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(87): truncated value with size 8 to match size of target (7)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 87 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948284926 "|de1_soc_wrapper"}
+{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR de1_soc_wrapper.sv(15) " "Output port \"LEDR\" at de1_soc_wrapper.sv(15) has no driver" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1600948284926 "|de1_soc_wrapper"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "arm_soc arm_soc:soc_inst " "Elaborating entity \"arm_soc\" for hierarchy \"arm_soc:soc_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "soc_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 42 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948284928 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CORTEXM0DS arm_soc:soc_inst\|CORTEXM0DS:m0_1 " "Elaborating entity \"CORTEXM0DS\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\"" {  } { { "behavioural/arm_soc.sv" "m0_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 56 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948284930 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_msp CORTEXM0DS.sv(76) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(76): object \"cm0_msp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 76 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600948284932 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_psp CORTEXM0DS.sv(77) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(77): object \"cm0_psp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 77 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600948284932 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_pc CORTEXM0DS.sv(79) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(79): object \"cm0_pc\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 79 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600948284932 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_xpsr CORTEXM0DS.sv(80) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(80): object \"cm0_xpsr\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 80 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600948284932 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_control CORTEXM0DS.sv(81) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(81): object \"cm0_control\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 81 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600948284932 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_primask CORTEXM0DS.sv(82) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(82): object \"cm0_primask\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 82 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600948284932 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cortexm0ds_logic arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic " "Elaborating entity \"cortexm0ds_logic\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic\"" {  } { { "behavioural/CORTEXM0DS.sv" "u_logic" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 144 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948284933 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "N4i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"N4i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600948284960 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "L5i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"L5i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600948284960 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_interconnect arm_soc:soc_inst\|ahb_interconnect:interconnect_1 " "Elaborating entity \"ahb_interconnect\" for hierarchy \"arm_soc:soc_inst\|ahb_interconnect:interconnect_1\"" {  } { { "behavioural/arm_soc.sv" "interconnect_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 68 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948284962 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(39) " "Verilog HDL assignment warning at ahb_interconnect.sv(39): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 39 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948284964 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(41) " "Verilog HDL assignment warning at ahb_interconnect.sv(41): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 41 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948284964 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(43) " "Verilog HDL assignment warning at ahb_interconnect.sv(43): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 43 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948284964 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_ram arm_soc:soc_inst\|ahb_ram:ram_1 " "Elaborating entity \"ahb_ram\" for hierarchy \"arm_soc:soc_inst\|ahb_ram:ram_1\"" {  } { { "behavioural/arm_soc.sv" "ram_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 79 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948284965 ""}
+{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "199 0 4095 ahb_ram.sv(69) " "Verilog HDL warning at ahb_ram.sv(69): number of words (199) in memory file does not match the number of elements in the address range \[0:4095\]" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 69 0 0 } }  } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1600948284997 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_switches arm_soc:soc_inst\|ahb_switches:switches_1 " "Elaborating entity \"ahb_switches\" for hierarchy \"arm_soc:soc_inst\|ahb_switches:switches_1\"" {  } { { "behavioural/arm_soc.sv" "switches_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 89 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948285382 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_pixel_memory arm_soc:soc_inst\|ahb_pixel_memory:pix1 " "Elaborating entity \"ahb_pixel_memory\" for hierarchy \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\"" {  } { { "behavioural/arm_soc.sv" "pix1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 95 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948285385 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "read_enable ahb_pixel_memory.sv(62) " "Verilog HDL or VHDL warning at ahb_pixel_memory.sv(62): object \"read_enable\" assigned a value but never read" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 62 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600948285386 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ahb_pixel_memory.sv(94) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(94): truncated value with size 32 to match size of target (1)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 94 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948285386 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 19 ahb_pixel_memory.sv(98) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(98): truncated value with size 32 to match size of target (19)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 98 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948285386 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "razzle razzle:raz_inst " "Elaborating entity \"razzle\" for hierarchy \"razzle:raz_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "raz_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 49 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948285387 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(34) " "Verilog HDL assignment warning at razzle.sv(34): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 34 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948285390 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(35) " "Verilog HDL assignment warning at razzle.sv(35): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 35 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948285390 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(36) " "Verilog HDL assignment warning at razzle.sv(36): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 36 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948285390 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "10 1 razzle.sv(43) " "Verilog HDL assignment warning at razzle.sv(43): truncated value with size 10 to match size of target (1)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 43 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948285390 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 10 razzle.sv(55) " "Verilog HDL assignment warning at razzle.sv(55): truncated value with size 11 to match size of target (10)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 55 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948285390 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 9 razzle.sv(56) " "Verilog HDL assignment warning at razzle.sv(56): truncated value with size 11 to match size of target (9)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 56 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948285390 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(95) " "Verilog HDL assignment warning at razzle.sv(95): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 95 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948285390 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(112) " "Verilog HDL assignment warning at razzle.sv(112): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 112 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600948285390 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Inferred 2 megafunctions from design logic" { { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 1 " "Parameter WIDTH_A set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 19 " "Parameter WIDTHAD_A set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 307200 " "Parameter NUMWORDS_A set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 1 " "Parameter WIDTH_B set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 19 " "Parameter WIDTHAD_B set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 307200 " "Parameter NUMWORDS_B set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 32 " "Parameter WIDTH_A set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 12 " "Parameter WIDTHAD_A set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 4096 " "Parameter NUMWORDS_A set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 32 " "Parameter WIDTH_B set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 12 " "Parameter WIDTHAD_B set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 4096 " "Parameter NUMWORDS_B set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600948289602 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1600948289602 ""}  } {  } 0 19000 "Inferred %1!d! megafunctions from design logic" 0 0 "Analysis & Synthesis" 0 -1 1600948289602 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948289683 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 1 " "Parameter \"WIDTH_A\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 19 " "Parameter \"WIDTHAD_A\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 307200 " "Parameter \"NUMWORDS_A\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 1 " "Parameter \"WIDTH_B\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 19 " "Parameter \"WIDTHAD_B\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 307200 " "Parameter \"NUMWORDS_B\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289684 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1600948289684 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_efn1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_efn1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_efn1 " "Found entity 1: altsyncram_efn1" {  } { { "db/altsyncram_efn1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_efn1.tdf" 32 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948289736 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948289736 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_3na.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_3na.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_3na " "Found entity 1: decode_3na" {  } { { "db/decode_3na.tdf" "" { Text "/home/ks6n19/Documents/project/db/decode_3na.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948289784 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948289784 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_chb.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mux_chb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_chb " "Found entity 1: mux_chb" {  } { { "db/mux_chb.tdf" "" { Text "/home/ks6n19/Documents/project/db/mux_chb.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948289828 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948289828 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948289838 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 32 " "Parameter \"WIDTH_A\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 12 " "Parameter \"WIDTHAD_A\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 4096 " "Parameter \"NUMWORDS_A\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 32 " "Parameter \"WIDTH_B\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 12 " "Parameter \"WIDTHAD_B\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 4096 " "Parameter \"NUMWORDS_B\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600948289838 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1600948289838 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_nms1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_nms1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_nms1 " "Found entity 1: altsyncram_nms1" {  } { { "db/altsyncram_nms1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_nms1.tdf" 28 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600948289884 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948289884 ""}
+{ "Warning" "WSGN_CONNECTIVITY_WARNINGS" "1 " "1 hierarchies have connectivity warnings - see the Connectivity Checks report folder" {  } {  } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Analysis & Synthesis" 0 -1 1600948290193 ""}
+{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[0\] GND " "Pin \"LEDR\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|LEDR[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[1\] GND " "Pin \"LEDR\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|LEDR[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[2\] GND " "Pin \"LEDR\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|LEDR[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[3\] GND " "Pin \"LEDR\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|LEDR[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[4\] GND " "Pin \"LEDR\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|LEDR[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[5\] GND " "Pin \"LEDR\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|LEDR[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[6\] GND " "Pin \"LEDR\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|LEDR[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[7\] GND " "Pin \"LEDR\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|LEDR[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[8\] GND " "Pin \"LEDR\[8\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|LEDR[8]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[9\] GND " "Pin \"LEDR\[9\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|LEDR[9]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[0\] VCC " "Pin \"HEX0\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX0[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[1\] VCC " "Pin \"HEX0\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX0[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[5\] VCC " "Pin \"HEX0\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX0[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[1\] VCC " "Pin \"HEX1\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX1[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[2\] VCC " "Pin \"HEX1\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX1[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[3\] VCC " "Pin \"HEX1\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX1[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[4\] VCC " "Pin \"HEX1\[4\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX1[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[5\] VCC " "Pin \"HEX1\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX1[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[6\] VCC " "Pin \"HEX1\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX1[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[0\] VCC " "Pin \"HEX2\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[1\] VCC " "Pin \"HEX2\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX2[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[2\] VCC " "Pin \"HEX2\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX2[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[3\] VCC " "Pin \"HEX2\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX2[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[5\] VCC " "Pin \"HEX2\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX2[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[0\] VCC " "Pin \"HEX3\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX3[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[1\] VCC " "Pin \"HEX3\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX3[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[2\] VCC " "Pin \"HEX3\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX3[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[6\] VCC " "Pin \"HEX3\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|HEX3[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[0\] GND " "Pin \"VGA_G\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_G[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[1\] GND " "Pin \"VGA_G\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_G[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[2\] GND " "Pin \"VGA_G\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_G[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[3\] GND " "Pin \"VGA_G\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_G[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[4\] GND " "Pin \"VGA_G\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_G[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[5\] GND " "Pin \"VGA_G\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_G[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[6\] GND " "Pin \"VGA_G\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_G[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[7\] GND " "Pin \"VGA_G\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_G[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[0\] GND " "Pin \"VGA_B\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_B[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[1\] GND " "Pin \"VGA_B\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_B[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[2\] GND " "Pin \"VGA_B\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_B[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[3\] GND " "Pin \"VGA_B\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_B[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[4\] GND " "Pin \"VGA_B\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_B[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[5\] GND " "Pin \"VGA_B\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_B[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[6\] GND " "Pin \"VGA_B\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_B[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[7\] GND " "Pin \"VGA_B\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600948293278 "|de1_soc_wrapper|VGA_B[7]"}  } {  } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1600948293278 ""}
+{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" {  } {  } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1600948293484 ""}
+{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "17 " "17 registers lost all their fanouts during netlist optimizations." {  } {  } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1600948300274 ""}
+{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948300425 ""}
+{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" {  } {  } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1600948300828 ""}  } {  } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600948300828 ""}
+{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[3\] " "No output dependent on input pin \"KEY\[3\]\"" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 13 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1600948301176 "|de1_soc_wrapper|KEY[3]"}  } {  } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1600948301176 ""}
+{ "Info" "ICUT_CUT_TM_SUMMARY" "3988 " "Implemented 3988 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1600948301188 ""} { "Info" "ICUT_CUT_TM_OPINS" "66 " "Implemented 66 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1600948301188 ""} { "Info" "ICUT_CUT_TM_LCELLS" "3837 " "Implemented 3837 logic cells" {  } {  } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1600948301188 ""} { "Info" "ICUT_CUT_TM_RAMS" "70 " "Implemented 70 RAM segments" {  } {  } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1600948301188 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1600948301188 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 77 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 77 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1267 " "Peak virtual memory: 1267 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600948301229 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 12:51:41 2020 " "Processing ended: Thu Sep 24 12:51:41 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600948301229 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:27 " "Elapsed time: 00:00:27" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600948301229 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:41 " "Total CPU time (on all processors): 00:00:41" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600948301229 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1600948301229 ""}
diff --git a/db/de1_soc_wrapper.map.rdb b/db/de1_soc_wrapper.map.rdb
index 861499598c7df1a139451bcf9091d5d5a9077d25..c8cfdde9eace52ef1450c2244e3067cd9d7e324f 100644
Binary files a/db/de1_soc_wrapper.map.rdb and b/db/de1_soc_wrapper.map.rdb differ
diff --git a/db/de1_soc_wrapper.map_bb.cdb b/db/de1_soc_wrapper.map_bb.cdb
index 780ea26913c633a17f93a90d36711af592bc09f5..c6ca84706e7406e7d167c066e17f0c49e06074c7 100644
Binary files a/db/de1_soc_wrapper.map_bb.cdb and b/db/de1_soc_wrapper.map_bb.cdb differ
diff --git a/db/de1_soc_wrapper.map_bb.hdb b/db/de1_soc_wrapper.map_bb.hdb
index 04da0d4df06e7a80ebf09468e062fba53e49ec5e..727478ab0c7a094ef01c7bc0ef239f879a1cd25d 100644
Binary files a/db/de1_soc_wrapper.map_bb.hdb and b/db/de1_soc_wrapper.map_bb.hdb differ
diff --git a/db/de1_soc_wrapper.pre_map.hdb b/db/de1_soc_wrapper.pre_map.hdb
index 497d65efb9f7ce1863e7b3e2970ab1ea4b05bbb7..a3b8867a8e25a9f8f61b2ad90ad6c2f382326ecd 100644
Binary files a/db/de1_soc_wrapper.pre_map.hdb and b/db/de1_soc_wrapper.pre_map.hdb differ
diff --git a/db/de1_soc_wrapper.root_partition.map.reg_db.cdb b/db/de1_soc_wrapper.root_partition.map.reg_db.cdb
index 2dff706b095b2086ec73ea662ea1db9c8d59e5ad..2c330a8e260b29ca51076f597741cb524e7dfdd0 100644
Binary files a/db/de1_soc_wrapper.root_partition.map.reg_db.cdb and b/db/de1_soc_wrapper.root_partition.map.reg_db.cdb differ
diff --git a/db/de1_soc_wrapper.routing.rdb b/db/de1_soc_wrapper.routing.rdb
index 2fb090c1e6356304c23329e2d45a55e2575303ff..f67a1a924ed4574a44531936cdf2d1bc530f7356 100644
Binary files a/db/de1_soc_wrapper.routing.rdb and b/db/de1_soc_wrapper.routing.rdb differ
diff --git a/db/de1_soc_wrapper.rtlv.hdb b/db/de1_soc_wrapper.rtlv.hdb
index cb77e2ba359eb182b995d88927c0ad77a71bd466..14ae52f3d5a647ee4633aa54b92bb4048d108f4a 100644
Binary files a/db/de1_soc_wrapper.rtlv.hdb and b/db/de1_soc_wrapper.rtlv.hdb differ
diff --git a/db/de1_soc_wrapper.rtlv_sg.cdb b/db/de1_soc_wrapper.rtlv_sg.cdb
index 3ea3326838fad6faac6e72942969a8c4017ea8fe..abcd8880bafe494eab7111ef7e7de85627d53b87 100644
Binary files a/db/de1_soc_wrapper.rtlv_sg.cdb and b/db/de1_soc_wrapper.rtlv_sg.cdb differ
diff --git a/db/de1_soc_wrapper.rtlv_sg_swap.cdb b/db/de1_soc_wrapper.rtlv_sg_swap.cdb
index 7a0019dd27b49f120524f7d629f7449bed39fb68..8ba7f277a300ff9f6dc21f85e03c6f8bae005fa4 100644
Binary files a/db/de1_soc_wrapper.rtlv_sg_swap.cdb and b/db/de1_soc_wrapper.rtlv_sg_swap.cdb differ
diff --git a/db/de1_soc_wrapper.sta.qmsg b/db/de1_soc_wrapper.sta.qmsg
index 6b9ffb0d9daee368ea2d641bbffc5b2fc5cce45d..605240ec92bfbbe7319a3465e67956332082d028 100644
--- a/db/de1_soc_wrapper.sta.qmsg
+++ b/db/de1_soc_wrapper.sta.qmsg
@@ -1,52 +1,52 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600942879279 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus Prime " "Running Quartus Prime TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600942879281 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 11:21:18 2020 " "Processing started: Thu Sep 24 11:21:18 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600942879281 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942879281 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta project24_09 -c de1_soc_wrapper " "Command: quartus_sta project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942879281 ""}
-{ "Info" "0" "" "qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942879574 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942880404 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942880405 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942880458 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942880458 ""}
-{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942881460 ""}
-{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942881461 ""}
-{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLOCK_50 CLOCK_50 " "create_clock -period 1.000 -name CLOCK_50 CLOCK_50" {  } {  } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1600942881486 ""}  } {  } 0 332105 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942881486 ""}
-{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942881512 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942881512 ""}
-{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" {  } {  } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942881514 ""}
-{ "Info" "0" "" "Analyzing Slow 1100mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942881533 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600942882580 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882580 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -12.117 " "Worst-case setup slack is -12.117" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882589 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882589 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -12.117          -23738.417 CLOCK_50  " "  -12.117          -23738.417 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882589 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882589 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.360 " "Worst-case hold slack is 0.360" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882645 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882645 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.360               0.000 CLOCK_50  " "    0.360               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882645 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882645 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882653 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882661 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882671 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882671 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9178.515 CLOCK_50  " "   -2.636           -9178.515 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882671 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882671 ""}
-{ "Info" "0" "" "Analyzing Slow 1100mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942882711 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882765 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942884841 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885167 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600942885298 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885298 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -11.922 " "Worst-case setup slack is -11.922" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -11.922          -23014.909 CLOCK_50  " "  -11.922          -23014.909 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885305 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885305 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.320 " "Worst-case hold slack is 0.320" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885353 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885353 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.320               0.000 CLOCK_50  " "    0.320               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885353 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885353 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885360 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885367 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885377 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885377 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9227.462 CLOCK_50  " "   -2.636           -9227.462 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885377 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885377 ""}
-{ "Info" "0" "" "Analyzing Fast 1100mV 85C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942885410 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885618 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887492 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887829 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600942887874 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887874 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -7.015 " "Worst-case setup slack is -7.015" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887883 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887883 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -7.015          -13385.378 CLOCK_50  " "   -7.015          -13385.378 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887883 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887883 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.180 " "Worst-case hold slack is 0.180" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887933 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887933 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.180               0.000 CLOCK_50  " "    0.180               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887933 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887933 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887941 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887948 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887957 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887957 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8567.649 CLOCK_50  " "   -2.636           -8567.649 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887957 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887957 ""}
-{ "Info" "0" "" "Analyzing Fast 1100mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942887993 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888348 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600942888393 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888393 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -6.180 " "Worst-case setup slack is -6.180" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888402 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888402 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -6.180          -11655.282 CLOCK_50  " "   -6.180          -11655.282 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888402 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888402 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.172 " "Worst-case hold slack is 0.172" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888451 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888451 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.172               0.000 CLOCK_50  " "    0.172               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888451 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888451 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888473 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888481 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888491 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888491 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8570.738 CLOCK_50  " "   -2.636           -8570.738 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888491 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888491 ""}
-{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942890628 ""}
-{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942890631 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 6 s Quartus Prime " "Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1570 " "Peak virtual memory: 1570 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942890789 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 11:21:30 2020 " "Processing ended: Thu Sep 24 11:21:30 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942890789 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:12 " "Elapsed time: 00:00:12" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942890789 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:30 " "Total CPU time (on all processors): 00:00:30" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942890789 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942890789 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600948431767 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus Prime " "Running Quartus Prime TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600948431770 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 12:53:51 2020 " "Processing started: Thu Sep 24 12:53:51 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600948431770 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948431770 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta project24_09 -c de1_soc_wrapper " "Command: quartus_sta project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948431770 ""}
+{ "Info" "0" "" "qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "TimeQuest Timing Analyzer" 0 0 1600948432064 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948432879 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948432879 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948432922 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948432922 ""}
+{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948433907 ""}
+{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948433908 ""}
+{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLOCK_50 CLOCK_50 " "create_clock -period 1.000 -name CLOCK_50 CLOCK_50" {  } {  } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1600948433933 ""}  } {  } 0 332105 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948433933 ""}
+{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948433959 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948433959 ""}
+{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" {  } {  } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "TimeQuest Timing Analyzer" 0 0 1600948433961 ""}
+{ "Info" "0" "" "Analyzing Slow 1100mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600948433985 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600948434984 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948434984 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -10.717 " "Worst-case setup slack is -10.717" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948434992 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948434992 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -10.717          -21621.074 CLOCK_50  " "  -10.717          -21621.074 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948434992 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948434992 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.372 " "Worst-case hold slack is 0.372" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948435042 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948435042 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.372               0.000 CLOCK_50  " "    0.372               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948435042 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948435042 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948435050 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948435057 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948435067 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948435067 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9168.793 CLOCK_50  " "   -2.636           -9168.793 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948435067 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948435067 ""}
+{ "Info" "0" "" "Analyzing Slow 1100mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600948435101 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948435153 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948437133 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948437452 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600948437590 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948437590 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -10.487 " "Worst-case setup slack is -10.487" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948437597 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948437597 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -10.487          -20926.712 CLOCK_50  " "  -10.487          -20926.712 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948437597 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948437597 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.369 " "Worst-case hold slack is 0.369" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948437648 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948437648 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.369               0.000 CLOCK_50  " "    0.369               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948437648 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948437648 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948437655 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948437662 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948437671 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948437671 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9200.409 CLOCK_50  " "   -2.636           -9200.409 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948437671 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948437671 ""}
+{ "Info" "0" "" "Analyzing Fast 1100mV 85C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600948437705 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948437917 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948439744 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440071 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600948440116 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440116 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -6.177 " "Worst-case setup slack is -6.177" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440124 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440124 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -6.177          -12052.251 CLOCK_50  " "   -6.177          -12052.251 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440124 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440124 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.180 " "Worst-case hold slack is 0.180" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440178 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440178 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.180               0.000 CLOCK_50  " "    0.180               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440178 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440178 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440185 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440192 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440201 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440201 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8584.106 CLOCK_50  " "   -2.636           -8584.106 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440201 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440201 ""}
+{ "Info" "0" "" "Analyzing Fast 1100mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600948440236 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440591 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600948440637 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440637 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -5.437 " "Worst-case setup slack is -5.437" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440645 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440645 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -5.437          -10407.325 CLOCK_50  " "   -5.437          -10407.325 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440645 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440645 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.171 " "Worst-case hold slack is 0.171" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440695 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440695 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.171               0.000 CLOCK_50  " "    0.171               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440695 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440695 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440703 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440711 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440720 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440720 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8588.168 CLOCK_50  " "   -2.636           -8588.168 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600948440720 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948440720 ""}
+{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948442817 ""}
+{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948442821 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 6 s Quartus Prime " "Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1572 " "Peak virtual memory: 1572 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600948442958 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 12:54:02 2020 " "Processing ended: Thu Sep 24 12:54:02 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600948442958 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:11 " "Elapsed time: 00:00:11" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600948442958 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:29 " "Total CPU time (on all processors): 00:00:29" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600948442958 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600948442958 ""}
diff --git a/db/de1_soc_wrapper.sta.rdb b/db/de1_soc_wrapper.sta.rdb
index f32b1012396bbbadf622561b1271bbea20c56056..f6e29f801d8180ee80a25f3aad31822781ad9946 100644
Binary files a/db/de1_soc_wrapper.sta.rdb and b/db/de1_soc_wrapper.sta.rdb differ
diff --git a/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb b/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb
index 1a4a45436cfbffccef13648b38986f2890bcce6e..e5726545188ebf372b6b4c942092cd6fc1fbf537 100644
Binary files a/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb and b/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb differ
diff --git a/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb b/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb
index e3e2a90b5be27b34b7a49e877528c6336f57d43a..1c85d88757b4bce4a01d74656d7d7ce956ccb144 100644
Binary files a/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb and b/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb differ
diff --git a/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb b/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb
index 5abf09f33889a2549402979632d194f4b9290404..709e26f11526f3f1e17a1146827cfea0ed779b57 100644
Binary files a/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb and b/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb differ
diff --git a/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb b/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb
index 1c7c4265ad7e3bef73eeb02792edd2647b6f29c8..b0cd251acf7857186f0b3894fe352249cb03b1c5 100644
Binary files a/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb and b/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb differ
diff --git a/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb b/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb
index cf06cd6f21a6d78ad91b45ce2b54e3f135ae9e4f..9e7a2bb5b140eb51826b10603339fc7d14fabfb6 100644
Binary files a/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb and b/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb differ
diff --git a/db/de1_soc_wrapper.tmw_info b/db/de1_soc_wrapper.tmw_info
index 01188ba7a9c5e3209cfc8524c25c8264c9976c6f..a791d191666787d2adc833e494c6734bb30d220f 100644
--- a/db/de1_soc_wrapper.tmw_info
+++ b/db/de1_soc_wrapper.tmw_info
@@ -1,7 +1,7 @@
-start_full_compilation:s:00:03:02
+start_full_compilation:s:00:02:54
 start_analysis_synthesis:s:00:00:28-start_full_compilation
 start_analysis_elaboration:s-start_full_compilation
-start_fitter:s:00:02:07-start_full_compilation
-start_assembler:s:00:00:11-start_full_compilation
+start_fitter:s:00:01:59-start_full_compilation
+start_assembler:s:00:00:10-start_full_compilation
 start_timing_analyzer:s:00:00:13-start_full_compilation
-start_eda_netlist_writer:s:00:00:03-start_full_compilation
+start_eda_netlist_writer:s:00:00:04-start_full_compilation
diff --git a/db/de1_soc_wrapper.vpr.ammdb b/db/de1_soc_wrapper.vpr.ammdb
index c828a874bc0284b4dedd690030dc535d016a9d54..8be932c90f47926d7620c6bf0565798187dfff9b 100644
Binary files a/db/de1_soc_wrapper.vpr.ammdb and b/db/de1_soc_wrapper.vpr.ammdb differ
diff --git a/de1_soc_wrapper.qsf b/de1_soc_wrapper.qsf
index c36c9d96f39f3c871613c58cf8111d31632c9f1e..bc3678629a340fd21d545372e1265427fe07bf4f 100644
--- a/de1_soc_wrapper.qsf
+++ b/de1_soc_wrapper.qsf
@@ -62,4 +62,262 @@ set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda
 set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
 set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_location_assignment PIN_AJ4 -to ADC_CS_N
+set_location_assignment PIN_AK4 -to ADC_DIN
+set_location_assignment PIN_AK3 -to ADC_DOUT
+set_location_assignment PIN_AK2 -to ADC_SCLK
+set_location_assignment PIN_K7 -to AUD_ADCDAT
+set_location_assignment PIN_K8 -to AUD_ADCLRCK
+set_location_assignment PIN_H7 -to AUD_BCLK
+set_location_assignment PIN_J7 -to AUD_DACDAT
+set_location_assignment PIN_H8 -to AUD_DACLRCK
+set_location_assignment PIN_G7 -to AUD_XCK
+set_location_assignment PIN_AF14 -to CLOCK_50
+set_location_assignment PIN_AA16 -to CLOCK2_50
+set_location_assignment PIN_Y26 -to CLOCK3_50
+set_location_assignment PIN_K14 -to CLOCK4_50
+set_location_assignment PIN_AK14 -to DRAM_ADDR[0]
+set_location_assignment PIN_AH14 -to DRAM_ADDR[1]
+set_location_assignment PIN_AG15 -to DRAM_ADDR[2]
+set_location_assignment PIN_AE14 -to DRAM_ADDR[3]
+set_location_assignment PIN_AB15 -to DRAM_ADDR[4]
+set_location_assignment PIN_AC14 -to DRAM_ADDR[5]
+set_location_assignment PIN_AD14 -to DRAM_ADDR[6]
+set_location_assignment PIN_AF15 -to DRAM_ADDR[7]
+set_location_assignment PIN_AH15 -to DRAM_ADDR[8]
+set_location_assignment PIN_AG13 -to DRAM_ADDR[9]
+set_location_assignment PIN_AG12 -to DRAM_ADDR[10]
+set_location_assignment PIN_AH13 -to DRAM_ADDR[11]
+set_location_assignment PIN_AJ14 -to DRAM_ADDR[12]
+set_location_assignment PIN_AF13 -to DRAM_BA[0]
+set_location_assignment PIN_AJ12 -to DRAM_BA[1]
+set_location_assignment PIN_AF11 -to DRAM_CAS_N
+set_location_assignment PIN_AK13 -to DRAM_CKE
+set_location_assignment PIN_AH12 -to DRAM_CLK
+set_location_assignment PIN_AG11 -to DRAM_CS_N
+set_location_assignment PIN_AK6 -to DRAM_DQ[0]
+set_location_assignment PIN_AJ7 -to DRAM_DQ[1]
+set_location_assignment PIN_AK7 -to DRAM_DQ[2]
+set_location_assignment PIN_AK8 -to DRAM_DQ[3]
+set_location_assignment PIN_AK9 -to DRAM_DQ[4]
+set_location_assignment PIN_AG10 -to DRAM_DQ[5]
+set_location_assignment PIN_AK11 -to DRAM_DQ[6]
+set_location_assignment PIN_AJ11 -to DRAM_DQ[7]
+set_location_assignment PIN_AH10 -to DRAM_DQ[8]
+set_location_assignment PIN_AJ10 -to DRAM_DQ[9]
+set_location_assignment PIN_AJ9 -to DRAM_DQ[10]
+set_location_assignment PIN_AH9 -to DRAM_DQ[11]
+set_location_assignment PIN_AH8 -to DRAM_DQ[12]
+set_location_assignment PIN_AH7 -to DRAM_DQ[13]
+set_location_assignment PIN_AJ6 -to DRAM_DQ[14]
+set_location_assignment PIN_AJ5 -to DRAM_DQ[15]
+set_location_assignment PIN_AB13 -to DRAM_LDQM
+set_location_assignment PIN_AE13 -to DRAM_RAS_N
+set_location_assignment PIN_AK12 -to DRAM_UDQM
+set_location_assignment PIN_AA13 -to DRAM_WE_N
+set_location_assignment PIN_AA12 -to FAN_CTRL
+set_location_assignment PIN_J12 -to FPGA_I2C_SCLK
+set_location_assignment PIN_K12 -to FPGA_I2C_SDAT
+set_location_assignment PIN_AC18 -to GPIO_0[0]
+set_location_assignment PIN_AH18 -to GPIO_0[10]
+set_location_assignment PIN_AH17 -to GPIO_0[11]
+set_location_assignment PIN_AG16 -to GPIO_0[12]
+set_location_assignment PIN_AE16 -to GPIO_0[13]
+set_location_assignment PIN_AF16 -to GPIO_0[14]
+set_location_assignment PIN_AG17 -to GPIO_0[15]
+set_location_assignment PIN_AA18 -to GPIO_0[16]
+set_location_assignment PIN_AA19 -to GPIO_0[17]
+set_location_assignment PIN_AE17 -to GPIO_0[18]
+set_location_assignment PIN_AC20 -to GPIO_0[19]
+set_location_assignment PIN_Y17 -to GPIO_0[1]
+set_location_assignment PIN_AH19 -to GPIO_0[20]
+set_location_assignment PIN_AJ20 -to GPIO_0[21]
+set_location_assignment PIN_AH20 -to GPIO_0[22]
+set_location_assignment PIN_AK21 -to GPIO_0[23]
+set_location_assignment PIN_AD19 -to GPIO_0[24]
+set_location_assignment PIN_AD20 -to GPIO_0[25]
+set_location_assignment PIN_AE18 -to GPIO_0[26]
+set_location_assignment PIN_AE19 -to GPIO_0[27]
+set_location_assignment PIN_AF20 -to GPIO_0[28]
+set_location_assignment PIN_AF21 -to GPIO_0[29]
+set_location_assignment PIN_AD17 -to GPIO_0[2]
+set_location_assignment PIN_AF19 -to GPIO_0[30]
+set_location_assignment PIN_AG21 -to GPIO_0[31]
+set_location_assignment PIN_AF18 -to GPIO_0[32]
+set_location_assignment PIN_AG20 -to GPIO_0[33]
+set_location_assignment PIN_AG18 -to GPIO_0[34]
+set_location_assignment PIN_AJ21 -to GPIO_0[35]
+set_location_assignment PIN_Y18 -to GPIO_0[3]
+set_location_assignment PIN_AK16 -to GPIO_0[4]
+set_location_assignment PIN_AK18 -to GPIO_0[5]
+set_location_assignment PIN_AK19 -to GPIO_0[6]
+set_location_assignment PIN_AJ19 -to GPIO_0[7]
+set_location_assignment PIN_AJ17 -to GPIO_0[8]
+set_location_assignment PIN_AJ16 -to GPIO_0[9]
+set_location_assignment PIN_AB17 -to GPIO_1[0]
+set_location_assignment PIN_AG26 -to GPIO_1[10]
+set_location_assignment PIN_AH24 -to GPIO_1[11]
+set_location_assignment PIN_AH27 -to GPIO_1[12]
+set_location_assignment PIN_AJ27 -to GPIO_1[13]
+set_location_assignment PIN_AK29 -to GPIO_1[14]
+set_location_assignment PIN_AK28 -to GPIO_1[15]
+set_location_assignment PIN_AK27 -to GPIO_1[16]
+set_location_assignment PIN_AJ26 -to GPIO_1[17]
+set_location_assignment PIN_AK26 -to GPIO_1[18]
+set_location_assignment PIN_AH25 -to GPIO_1[19]
+set_location_assignment PIN_AA21 -to GPIO_1[1]
+set_location_assignment PIN_AJ25 -to GPIO_1[20]
+set_location_assignment PIN_AJ24 -to GPIO_1[21]
+set_location_assignment PIN_AK24 -to GPIO_1[22]
+set_location_assignment PIN_AG23 -to GPIO_1[23]
+set_location_assignment PIN_AK23 -to GPIO_1[24]
+set_location_assignment PIN_AH23 -to GPIO_1[25]
+set_location_assignment PIN_AK22 -to GPIO_1[26]
+set_location_assignment PIN_AJ22 -to GPIO_1[27]
+set_location_assignment PIN_AH22 -to GPIO_1[28]
+set_location_assignment PIN_AG22 -to GPIO_1[29]
+set_location_assignment PIN_AB21 -to GPIO_1[2]
+set_location_assignment PIN_AF24 -to GPIO_1[30]
+set_location_assignment PIN_AF23 -to GPIO_1[31]
+set_location_assignment PIN_AE22 -to GPIO_1[32]
+set_location_assignment PIN_AD21 -to GPIO_1[33]
+set_location_assignment PIN_AA20 -to GPIO_1[34]
+set_location_assignment PIN_AC22 -to GPIO_1[35]
+set_location_assignment PIN_AC23 -to GPIO_1[3]
+set_location_assignment PIN_AD24 -to GPIO_1[4]
+set_location_assignment PIN_AE23 -to GPIO_1[5]
+set_location_assignment PIN_AE24 -to GPIO_1[6]
+set_location_assignment PIN_AF25 -to GPIO_1[7]
+set_location_assignment PIN_AF26 -to GPIO_1[8]
+set_location_assignment PIN_AG25 -to GPIO_1[9]
+set_location_assignment PIN_AE26 -to HEX0[0]
+set_location_assignment PIN_AE27 -to HEX0[1]
+set_location_assignment PIN_AE28 -to HEX0[2]
+set_location_assignment PIN_AG27 -to HEX0[3]
+set_location_assignment PIN_AF28 -to HEX0[4]
+set_location_assignment PIN_AG28 -to HEX0[5]
+set_location_assignment PIN_AH28 -to HEX0[6]
+set_location_assignment PIN_AJ29 -to HEX1[0]
+set_location_assignment PIN_AH29 -to HEX1[1]
+set_location_assignment PIN_AH30 -to HEX1[2]
+set_location_assignment PIN_AG30 -to HEX1[3]
+set_location_assignment PIN_AF29 -to HEX1[4]
+set_location_assignment PIN_AF30 -to HEX1[5]
+set_location_assignment PIN_AD27 -to HEX1[6]
+set_location_assignment PIN_AB23 -to HEX2[0]
+set_location_assignment PIN_AE29 -to HEX2[1]
+set_location_assignment PIN_AD29 -to HEX2[2]
+set_location_assignment PIN_AC28 -to HEX2[3]
+set_location_assignment PIN_AD30 -to HEX2[4]
+set_location_assignment PIN_AC29 -to HEX2[5]
+set_location_assignment PIN_AC30 -to HEX2[6]
+set_location_assignment PIN_AD26 -to HEX3[0]
+set_location_assignment PIN_AC27 -to HEX3[1]
+set_location_assignment PIN_AD25 -to HEX3[2]
+set_location_assignment PIN_AC25 -to HEX3[3]
+set_location_assignment PIN_AB28 -to HEX3[4]
+set_location_assignment PIN_AB25 -to HEX3[5]
+set_location_assignment PIN_AB22 -to HEX3[6]
+set_location_assignment PIN_AA24 -to HEX4[0]
+set_location_assignment PIN_Y23 -to HEX4[1]
+set_location_assignment PIN_Y24 -to HEX4[2]
+set_location_assignment PIN_W22 -to HEX4[3]
+set_location_assignment PIN_W24 -to HEX4[4]
+set_location_assignment PIN_V23 -to HEX4[5]
+set_location_assignment PIN_W25 -to HEX4[6]
+set_location_assignment PIN_V25 -to HEX5[0]
+set_location_assignment PIN_AA28 -to HEX5[1]
+set_location_assignment PIN_Y27 -to HEX5[2]
+set_location_assignment PIN_AB27 -to HEX5[3]
+set_location_assignment PIN_AB26 -to HEX5[4]
+set_location_assignment PIN_AA26 -to HEX5[5]
+set_location_assignment PIN_AA25 -to HEX5[6]
+set_location_assignment PIN_AA30 -to IRDA_RXD
+set_location_assignment PIN_AB30 -to IRDA_TXD
+set_location_assignment PIN_AA14 -to KEY[0]
+set_location_assignment PIN_AA15 -to KEY[1]
+set_location_assignment PIN_W15 -to KEY[2]
+set_location_assignment PIN_Y16 -to KEY[3]
+set_location_assignment PIN_V16 -to LEDR[0]
+set_location_assignment PIN_W16 -to LEDR[1]
+set_location_assignment PIN_V17 -to LEDR[2]
+set_location_assignment PIN_V18 -to LEDR[3]
+set_location_assignment PIN_W17 -to LEDR[4]
+set_location_assignment PIN_W19 -to LEDR[5]
+set_location_assignment PIN_Y19 -to LEDR[6]
+set_location_assignment PIN_W20 -to LEDR[7]
+set_location_assignment PIN_W21 -to LEDR[8]
+set_location_assignment PIN_Y21 -to LEDR[9]
+set_location_assignment PIN_AD7 -to PS2_CLK
+set_location_assignment PIN_AE7 -to PS2_DAT
+set_location_assignment PIN_AD9 -to PS2_CLK2
+set_location_assignment PIN_AE9 -to PS2_DAT2
+set_location_assignment PIN_AB12 -to SW[0]
+set_location_assignment PIN_AC12 -to SW[1]
+set_location_assignment PIN_AF9 -to SW[2]
+set_location_assignment PIN_AF10 -to SW[3]
+set_location_assignment PIN_AD11 -to SW[4]
+set_location_assignment PIN_AD12 -to SW[5]
+set_location_assignment PIN_AE11 -to SW[6]
+set_location_assignment PIN_AC9 -to SW[7]
+set_location_assignment PIN_AD10 -to SW[8]
+set_location_assignment PIN_AE12 -to SW[9]
+set_location_assignment PIN_H15 -to TD_CLK27
+set_location_assignment PIN_D2 -to TD_DATA[0]
+set_location_assignment PIN_B1 -to TD_DATA[1]
+set_location_assignment PIN_E2 -to TD_DATA[2]
+set_location_assignment PIN_B2 -to TD_DATA[3]
+set_location_assignment PIN_D1 -to TD_DATA[4]
+set_location_assignment PIN_E1 -to TD_DATA[5]
+set_location_assignment PIN_C2 -to TD_DATA[6]
+set_location_assignment PIN_B3 -to TD_DATA[7]
+set_location_assignment PIN_A5 -to TD_HS
+set_location_assignment PIN_F6 -to TD_RESET_N
+set_location_assignment PIN_A3 -to TD_VS
+set_location_assignment PIN_AF4 -to USB_B2_CLK
+set_location_assignment PIN_AH4 -to USB_B2_DATA[0]
+set_location_assignment PIN_AH3 -to USB_B2_DATA[1]
+set_location_assignment PIN_AJ2 -to USB_B2_DATA[2]
+set_location_assignment PIN_AJ1 -to USB_B2_DATA[3]
+set_location_assignment PIN_AH2 -to USB_B2_DATA[4]
+set_location_assignment PIN_AG3 -to USB_B2_DATA[5]
+set_location_assignment PIN_AG2 -to USB_B2_DATA[6]
+set_location_assignment PIN_AG1 -to USB_B2_DATA[7]
+set_location_assignment PIN_AF5 -to USB_EMPTY
+set_location_assignment PIN_AG5 -to USB_FULL
+set_location_assignment PIN_AF6 -to USB_OE_N
+set_location_assignment PIN_AG6 -to USB_RD_N
+set_location_assignment PIN_AG7 -to USB_RESET_N
+set_location_assignment PIN_AG8 -to USB_SCL
+set_location_assignment PIN_AF8 -to USB_SDA
+set_location_assignment PIN_AH5 -to USB_WR_N
+set_location_assignment PIN_B13 -to VGA_B[0]
+set_location_assignment PIN_G13 -to VGA_B[1]
+set_location_assignment PIN_H13 -to VGA_B[2]
+set_location_assignment PIN_F14 -to VGA_B[3]
+set_location_assignment PIN_H14 -to VGA_B[4]
+set_location_assignment PIN_F15 -to VGA_B[5]
+set_location_assignment PIN_G15 -to VGA_B[6]
+set_location_assignment PIN_J14 -to VGA_B[7]
+set_location_assignment PIN_F10 -to VGA_BLANK_N
+set_location_assignment PIN_A11 -to VGA_CLK
+set_location_assignment PIN_J9 -to VGA_G[0]
+set_location_assignment PIN_J10 -to VGA_G[1]
+set_location_assignment PIN_H12 -to VGA_G[2]
+set_location_assignment PIN_G10 -to VGA_G[3]
+set_location_assignment PIN_G11 -to VGA_G[4]
+set_location_assignment PIN_G12 -to VGA_G[5]
+set_location_assignment PIN_F11 -to VGA_G[6]
+set_location_assignment PIN_E11 -to VGA_G[7]
+set_location_assignment PIN_B11 -to VGA_HS
+set_location_assignment PIN_A13 -to VGA_R[0]
+set_location_assignment PIN_C13 -to VGA_R[1]
+set_location_assignment PIN_E13 -to VGA_R[2]
+set_location_assignment PIN_B12 -to VGA_R[3]
+set_location_assignment PIN_C12 -to VGA_R[4]
+set_location_assignment PIN_D12 -to VGA_R[5]
+set_location_assignment PIN_E12 -to VGA_R[6]
+set_location_assignment PIN_F13 -to VGA_R[7]
+set_location_assignment PIN_C10 -to VGA_SYNC_N
+set_location_assignment PIN_D11 -to VGA_VS
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/de1_soc_wrapper.qsf.bak b/de1_soc_wrapper.qsf.bak
new file mode 100644
index 0000000000000000000000000000000000000000..c36c9d96f39f3c871613c58cf8111d31632c9f1e
--- /dev/null
+++ b/de1_soc_wrapper.qsf.bak
@@ -0,0 +1,65 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 2017  Intel Corporation. All rights reserved.
+# Your use of Intel Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Intel Program License 
+# Subscription Agreement, the Intel Quartus Prime License Agreement,
+# the Intel MegaCore Function License Agreement, or other 
+# applicable license agreement, including, without limitation, 
+# that your use is for the sole purpose of programming logic 
+# devices manufactured by Intel and sold by Intel or its 
+# authorized distributors.  Please refer to the applicable 
+# agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus Prime
+# Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+# Date created = 17:49:50  September 17, 2020
+#
+# -------------------------------------------------------------------------- #
+#
+# Notes:
+#
+# 1) The default values for assignments are stored in the file:
+#		de1_soc_wrapper_assignment_defaults.qdf
+#    If this file doesn't exist, see file:
+#		assignment_defaults.qdf
+#
+# 2) Altera recommends that you do not modify this file. This
+#    file is updated automatically by the Quartus Prime software
+#    and any changes you make may be lost or overwritten.
+#
+# -------------------------------------------------------------------------- #
+
+
+set_global_assignment -name FAMILY "Cyclone V"
+set_global_assignment -name DEVICE 5CSEMA5F31C6
+set_global_assignment -name TOP_LEVEL_ENTITY de1_soc_wrapper
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.2
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:49:50  SEPTEMBER 17, 2020"
+set_global_assignment -name LAST_QUARTUS_VERSION "16.1.2 Standard Edition"
+set_global_assignment -name SYSTEMVERILOG_FILE behavioural/razzle.sv
+set_global_assignment -name SYSTEMVERILOG_FILE behavioural/ahb_interconnect.sv
+set_global_assignment -name SYSTEMVERILOG_FILE behavioural/ahb_pixel_memory.sv
+set_global_assignment -name SYSTEMVERILOG_FILE behavioural/ahb_ram.sv
+set_global_assignment -name SYSTEMVERILOG_FILE behavioural/ahb_switches.sv
+set_global_assignment -name SYSTEMVERILOG_FILE behavioural/arm_soc.sv
+set_global_assignment -name SYSTEMVERILOG_FILE behavioural/CORTEXM0DS.sv
+set_global_assignment -name SYSTEMVERILOG_FILE behavioural/cortexm0ds_logic.sv
+set_global_assignment -name SYSTEMVERILOG_FILE behavioural/de1_soc_wrapper.sv
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
+set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
+set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/de1_soc_wrapper.qws b/de1_soc_wrapper.qws
index efbb83b6eb0f8fb2ed108a9b65533a7edae3f999..d00c0289013881d1417ad0fed3eaf5ffa0a0cd3a 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.ammdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.ammdb
index 100ca5ed0f91ff51284fb5e52e53cf70609096de..88b04564740e6d03d7464cb5a2705e9177438ae5 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.cdb
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.cdb
index 2758a06332af5a8ef59a8fe185f3debe8bde21dc..122e748ba2adf6d8f3dcaf5c4a6d1dcc1d9f091d 100644
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index 70c84c9cd241e22c4d942f49113c05d1410c7603..1726146d25c3a40d059806e21129e8416d069fd1 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hdb
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.rcfdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.rcfdb
index 4e409e4bb8976d040ad2c9edefe3c366760a33c3..022a93f0baf0a793d9b7561890050d899b572aff 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.cdb
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.dpi b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.dpi
index 6534d3f81ff3351121f17b9f2c68409276237168..cfb317148a332f56a319c267790a9c40e84664e7 100644
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index be8ef78bc6f337314ca7c221690ee26ef47562b7..8a798daa284af6875df551e3719c679e90d89594 100644
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index 4ba8650f390d08cf2044165376742426a5ef0833..0417b6fc742be118a15048b731f2a198aa93f549 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.kpt b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.kpt
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index b7643ccae1cf021b5154532c1d19c8ac16d6e022..db626847d4e24f0bd087b78fbe4bf08fabc717aa 100644
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index c6605c99723a61c68be4c7e99615c71615f0be2c..df544c35fd78c8846bac648676b5f01a35e931e8 100644
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index be8ef78bc6f337314ca7c221690ee26ef47562b7..8a798daa284af6875df551e3719c679e90d89594 100644
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index 4ba8650f390d08cf2044165376742426a5ef0833..0417b6fc742be118a15048b731f2a198aa93f549 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.rrs.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.rrs.cdb
index a6c764c448977063f943c56c05bc81861621d944..e06cd457ecadceec1ea75fd1567e20e805d91ab2 100644
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diff --git a/new file b/new file
index 29311d7a17c25d7b26c9d5afc4b5123d05453d4a..5b9445d8236906c9b7c8b2e99992869913d49106 100644
--- a/new file	
+++ b/new file	
@@ -1 +1,953 @@
-This one outputs 0x64 and 0xA as ahb_pix memory output 32 bit 
+#============================================================
+# Altera DE1-SoC board settings
+#============================================================
+
+
+set_global_assignment -name FAMILY "Cyclone V"
+set_global_assignment -name DEVICE 5CSEMA5F31C6
+set_global_assignment -name TOP_LEVEL_ENTITY "DE1_SoC"
+set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
+set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name SDC_FILE DE1_SoC.sdc
+
+
+#============================================================
+# ADC
+#============================================================
+set_location_assignment PIN_AJ4 -to ADC_CS_N
+set_location_assignment PIN_AK4 -to ADC_DIN
+set_location_assignment PIN_AK3 -to ADC_DOUT
+set_location_assignment PIN_AK2 -to ADC_SCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CS_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_DIN
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_DOUT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SCLK
+
+#============================================================
+# AUD
+#============================================================
+set_location_assignment PIN_K7 -to AUD_ADCDAT
+set_location_assignment PIN_K8 -to AUD_ADCLRCK
+set_location_assignment PIN_H7 -to AUD_BCLK
+set_location_assignment PIN_J7 -to AUD_DACDAT
+set_location_assignment PIN_H8 -to AUD_DACLRCK
+set_location_assignment PIN_G7 -to AUD_XCK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_ADCDAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_ADCLRCK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_BCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_DACDAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_DACLRCK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUD_XCK
+
+#============================================================
+# CLOCK
+#============================================================
+set_location_assignment PIN_AF14 -to CLOCK_50
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
+
+#============================================================
+# CLOCK2
+#============================================================
+set_location_assignment PIN_AA16 -to CLOCK2_50
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK2_50
+
+#============================================================
+# CLOCK3
+#============================================================
+set_location_assignment PIN_Y26 -to CLOCK3_50
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK3_50
+
+#============================================================
+# CLOCK4
+#============================================================
+set_location_assignment PIN_K14 -to CLOCK4_50
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK4_50
+
+#============================================================
+# DRAM
+#============================================================
+set_location_assignment PIN_AK14 -to DRAM_ADDR[0]
+set_location_assignment PIN_AH14 -to DRAM_ADDR[1]
+set_location_assignment PIN_AG15 -to DRAM_ADDR[2]
+set_location_assignment PIN_AE14 -to DRAM_ADDR[3]
+set_location_assignment PIN_AB15 -to DRAM_ADDR[4]
+set_location_assignment PIN_AC14 -to DRAM_ADDR[5]
+set_location_assignment PIN_AD14 -to DRAM_ADDR[6]
+set_location_assignment PIN_AF15 -to DRAM_ADDR[7]
+set_location_assignment PIN_AH15 -to DRAM_ADDR[8]
+set_location_assignment PIN_AG13 -to DRAM_ADDR[9]
+set_location_assignment PIN_AG12 -to DRAM_ADDR[10]
+set_location_assignment PIN_AH13 -to DRAM_ADDR[11]
+set_location_assignment PIN_AJ14 -to DRAM_ADDR[12]
+set_location_assignment PIN_AF13 -to DRAM_BA[0]
+set_location_assignment PIN_AJ12 -to DRAM_BA[1]
+set_location_assignment PIN_AF11 -to DRAM_CAS_N
+set_location_assignment PIN_AK13 -to DRAM_CKE
+set_location_assignment PIN_AH12 -to DRAM_CLK
+set_location_assignment PIN_AG11 -to DRAM_CS_N
+set_location_assignment PIN_AK6 -to DRAM_DQ[0]
+set_location_assignment PIN_AJ7 -to DRAM_DQ[1]
+set_location_assignment PIN_AK7 -to DRAM_DQ[2]
+set_location_assignment PIN_AK8 -to DRAM_DQ[3]
+set_location_assignment PIN_AK9 -to DRAM_DQ[4]
+set_location_assignment PIN_AG10 -to DRAM_DQ[5]
+set_location_assignment PIN_AK11 -to DRAM_DQ[6]
+set_location_assignment PIN_AJ11 -to DRAM_DQ[7]
+set_location_assignment PIN_AH10 -to DRAM_DQ[8]
+set_location_assignment PIN_AJ10 -to DRAM_DQ[9]
+set_location_assignment PIN_AJ9 -to DRAM_DQ[10]
+set_location_assignment PIN_AH9 -to DRAM_DQ[11]
+set_location_assignment PIN_AH8 -to DRAM_DQ[12]
+set_location_assignment PIN_AH7 -to DRAM_DQ[13]
+set_location_assignment PIN_AJ6 -to DRAM_DQ[14]
+set_location_assignment PIN_AJ5 -to DRAM_DQ[15]
+set_location_assignment PIN_AB13 -to DRAM_LDQM
+set_location_assignment PIN_AE13 -to DRAM_RAS_N
+set_location_assignment PIN_AK12 -to DRAM_UDQM
+set_location_assignment PIN_AA13 -to DRAM_WE_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[10]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[11]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[12]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CAS_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CKE
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CS_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[10]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[11]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[12]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[13]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[14]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[15]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_LDQM
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_RAS_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_UDQM
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_WE_N
+
+#============================================================
+# FAN
+#============================================================
+set_location_assignment PIN_AA12 -to FAN_CTRL
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FAN_CTRL
+
+#============================================================
+# FPGA
+#============================================================
+set_location_assignment PIN_J12 -to FPGA_I2C_SCLK
+set_location_assignment PIN_K12 -to FPGA_I2C_SDAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_I2C_SCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_I2C_SDAT
+
+#============================================================
+# GPIO
+#============================================================
+set_location_assignment PIN_AC18 -to GPIO_0[0]
+set_location_assignment PIN_AH18 -to GPIO_0[10]
+set_location_assignment PIN_AH17 -to GPIO_0[11]
+set_location_assignment PIN_AG16 -to GPIO_0[12]
+set_location_assignment PIN_AE16 -to GPIO_0[13]
+set_location_assignment PIN_AF16 -to GPIO_0[14]
+set_location_assignment PIN_AG17 -to GPIO_0[15]
+set_location_assignment PIN_AA18 -to GPIO_0[16]
+set_location_assignment PIN_AA19 -to GPIO_0[17]
+set_location_assignment PIN_AE17 -to GPIO_0[18]
+set_location_assignment PIN_AC20 -to GPIO_0[19]
+set_location_assignment PIN_Y17 -to GPIO_0[1]
+set_location_assignment PIN_AH19 -to GPIO_0[20]
+set_location_assignment PIN_AJ20 -to GPIO_0[21]
+set_location_assignment PIN_AH20 -to GPIO_0[22]
+set_location_assignment PIN_AK21 -to GPIO_0[23]
+set_location_assignment PIN_AD19 -to GPIO_0[24]
+set_location_assignment PIN_AD20 -to GPIO_0[25]
+set_location_assignment PIN_AE18 -to GPIO_0[26]
+set_location_assignment PIN_AE19 -to GPIO_0[27]
+set_location_assignment PIN_AF20 -to GPIO_0[28]
+set_location_assignment PIN_AF21 -to GPIO_0[29]
+set_location_assignment PIN_AD17 -to GPIO_0[2]
+set_location_assignment PIN_AF19 -to GPIO_0[30]
+set_location_assignment PIN_AG21 -to GPIO_0[31]
+set_location_assignment PIN_AF18 -to GPIO_0[32]
+set_location_assignment PIN_AG20 -to GPIO_0[33]
+set_location_assignment PIN_AG18 -to GPIO_0[34]
+set_location_assignment PIN_AJ21 -to GPIO_0[35]
+set_location_assignment PIN_Y18 -to GPIO_0[3]
+set_location_assignment PIN_AK16 -to GPIO_0[4]
+set_location_assignment PIN_AK18 -to GPIO_0[5]
+set_location_assignment PIN_AK19 -to GPIO_0[6]
+set_location_assignment PIN_AJ19 -to GPIO_0[7]
+set_location_assignment PIN_AJ17 -to GPIO_0[8]
+set_location_assignment PIN_AJ16 -to GPIO_0[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[10]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[11]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[12]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[13]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[14]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[15]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[16]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[17]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[18]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[19]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[20]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[21]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[22]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[23]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[24]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[25]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[26]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[27]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[28]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[29]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[30]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[31]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[32]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[33]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[34]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[35]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[9]
+
+set_location_assignment PIN_AB17 -to GPIO_1[0]
+set_location_assignment PIN_AG26 -to GPIO_1[10]
+set_location_assignment PIN_AH24 -to GPIO_1[11]
+set_location_assignment PIN_AH27 -to GPIO_1[12]
+set_location_assignment PIN_AJ27 -to GPIO_1[13]
+set_location_assignment PIN_AK29 -to GPIO_1[14]
+set_location_assignment PIN_AK28 -to GPIO_1[15]
+set_location_assignment PIN_AK27 -to GPIO_1[16]
+set_location_assignment PIN_AJ26 -to GPIO_1[17]
+set_location_assignment PIN_AK26 -to GPIO_1[18]
+set_location_assignment PIN_AH25 -to GPIO_1[19]
+set_location_assignment PIN_AA21 -to GPIO_1[1]
+set_location_assignment PIN_AJ25 -to GPIO_1[20]
+set_location_assignment PIN_AJ24 -to GPIO_1[21]
+set_location_assignment PIN_AK24 -to GPIO_1[22]
+set_location_assignment PIN_AG23 -to GPIO_1[23]
+set_location_assignment PIN_AK23 -to GPIO_1[24]
+set_location_assignment PIN_AH23 -to GPIO_1[25]
+set_location_assignment PIN_AK22 -to GPIO_1[26]
+set_location_assignment PIN_AJ22 -to GPIO_1[27]
+set_location_assignment PIN_AH22 -to GPIO_1[28]
+set_location_assignment PIN_AG22 -to GPIO_1[29]
+set_location_assignment PIN_AB21 -to GPIO_1[2]
+set_location_assignment PIN_AF24 -to GPIO_1[30]
+set_location_assignment PIN_AF23 -to GPIO_1[31]
+set_location_assignment PIN_AE22 -to GPIO_1[32]
+set_location_assignment PIN_AD21 -to GPIO_1[33]
+set_location_assignment PIN_AA20 -to GPIO_1[34]
+set_location_assignment PIN_AC22 -to GPIO_1[35]
+set_location_assignment PIN_AC23 -to GPIO_1[3]
+set_location_assignment PIN_AD24 -to GPIO_1[4]
+set_location_assignment PIN_AE23 -to GPIO_1[5]
+set_location_assignment PIN_AE24 -to GPIO_1[6]
+set_location_assignment PIN_AF25 -to GPIO_1[7]
+set_location_assignment PIN_AF26 -to GPIO_1[8]
+set_location_assignment PIN_AG25 -to GPIO_1[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[10]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[11]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[12]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[13]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[14]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[15]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[16]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[17]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[18]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[19]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[20]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[21]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[22]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[23]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[24]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[25]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[26]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[27]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[28]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[29]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[30]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[31]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[32]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[33]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[34]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[35]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[9]
+
+#============================================================
+# HEX0
+#============================================================
+set_location_assignment PIN_AE26 -to HEX0[0]
+set_location_assignment PIN_AE27 -to HEX0[1]
+set_location_assignment PIN_AE28 -to HEX0[2]
+set_location_assignment PIN_AG27 -to HEX0[3]
+set_location_assignment PIN_AF28 -to HEX0[4]
+set_location_assignment PIN_AG28 -to HEX0[5]
+set_location_assignment PIN_AH28 -to HEX0[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[6]
+
+#============================================================
+# HEX1
+#============================================================
+set_location_assignment PIN_AJ29 -to HEX1[0]
+set_location_assignment PIN_AH29 -to HEX1[1]
+set_location_assignment PIN_AH30 -to HEX1[2]
+set_location_assignment PIN_AG30 -to HEX1[3]
+set_location_assignment PIN_AF29 -to HEX1[4]
+set_location_assignment PIN_AF30 -to HEX1[5]
+set_location_assignment PIN_AD27 -to HEX1[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[6]
+
+#============================================================
+# HEX2
+#============================================================
+set_location_assignment PIN_AB23 -to HEX2[0]
+set_location_assignment PIN_AE29 -to HEX2[1]
+set_location_assignment PIN_AD29 -to HEX2[2]
+set_location_assignment PIN_AC28 -to HEX2[3]
+set_location_assignment PIN_AD30 -to HEX2[4]
+set_location_assignment PIN_AC29 -to HEX2[5]
+set_location_assignment PIN_AC30 -to HEX2[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[6]
+
+#============================================================
+# HEX3
+#============================================================
+set_location_assignment PIN_AD26 -to HEX3[0]
+set_location_assignment PIN_AC27 -to HEX3[1]
+set_location_assignment PIN_AD25 -to HEX3[2]
+set_location_assignment PIN_AC25 -to HEX3[3]
+set_location_assignment PIN_AB28 -to HEX3[4]
+set_location_assignment PIN_AB25 -to HEX3[5]
+set_location_assignment PIN_AB22 -to HEX3[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[6]
+
+#============================================================
+# HEX4
+#============================================================
+set_location_assignment PIN_AA24 -to HEX4[0]
+set_location_assignment PIN_Y23 -to HEX4[1]
+set_location_assignment PIN_Y24 -to HEX4[2]
+set_location_assignment PIN_W22 -to HEX4[3]
+set_location_assignment PIN_W24 -to HEX4[4]
+set_location_assignment PIN_V23 -to HEX4[5]
+set_location_assignment PIN_W25 -to HEX4[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[6]
+
+#============================================================
+# HEX5
+#============================================================
+set_location_assignment PIN_V25 -to HEX5[0]
+set_location_assignment PIN_AA28 -to HEX5[1]
+set_location_assignment PIN_Y27 -to HEX5[2]
+set_location_assignment PIN_AB27 -to HEX5[3]
+set_location_assignment PIN_AB26 -to HEX5[4]
+set_location_assignment PIN_AA26 -to HEX5[5]
+set_location_assignment PIN_AA25 -to HEX5[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[6]
+
+#============================================================
+# IRDA
+#============================================================
+set_location_assignment PIN_AA30 -to IRDA_RXD
+set_location_assignment PIN_AB30 -to IRDA_TXD
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to IRDA_RXD
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to IRDA_TXD
+
+#============================================================
+# KEY
+#============================================================
+set_location_assignment PIN_AA14 -to KEY[0]
+set_location_assignment PIN_AA15 -to KEY[1]
+set_location_assignment PIN_W15 -to KEY[2]
+set_location_assignment PIN_Y16 -to KEY[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[3]
+
+#============================================================
+# LEDR
+#============================================================
+set_location_assignment PIN_V16 -to LEDR[0]
+set_location_assignment PIN_W16 -to LEDR[1]
+set_location_assignment PIN_V17 -to LEDR[2]
+set_location_assignment PIN_V18 -to LEDR[3]
+set_location_assignment PIN_W17 -to LEDR[4]
+set_location_assignment PIN_W19 -to LEDR[5]
+set_location_assignment PIN_Y19 -to LEDR[6]
+set_location_assignment PIN_W20 -to LEDR[7]
+set_location_assignment PIN_W21 -to LEDR[8]
+set_location_assignment PIN_Y21 -to LEDR[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[9]
+
+#============================================================
+# PS2
+#============================================================
+set_location_assignment PIN_AD7 -to PS2_CLK
+set_location_assignment PIN_AE7 -to PS2_DAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_DAT
+
+set_location_assignment PIN_AD9 -to PS2_CLK2
+set_location_assignment PIN_AE9 -to PS2_DAT2
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_CLK2
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_DAT2
+
+#============================================================
+# SW
+#============================================================
+set_location_assignment PIN_AB12 -to SW[0]
+set_location_assignment PIN_AC12 -to SW[1]
+set_location_assignment PIN_AF9 -to SW[2]
+set_location_assignment PIN_AF10 -to SW[3]
+set_location_assignment PIN_AD11 -to SW[4]
+set_location_assignment PIN_AD12 -to SW[5]
+set_location_assignment PIN_AE11 -to SW[6]
+set_location_assignment PIN_AC9 -to SW[7]
+set_location_assignment PIN_AD10 -to SW[8]
+set_location_assignment PIN_AE12 -to SW[9]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[8]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[9]
+
+#============================================================
+# TD
+#============================================================
+set_location_assignment PIN_H15 -to TD_CLK27
+set_location_assignment PIN_D2 -to TD_DATA[0]
+set_location_assignment PIN_B1 -to TD_DATA[1]
+set_location_assignment PIN_E2 -to TD_DATA[2]
+set_location_assignment PIN_B2 -to TD_DATA[3]
+set_location_assignment PIN_D1 -to TD_DATA[4]
+set_location_assignment PIN_E1 -to TD_DATA[5]
+set_location_assignment PIN_C2 -to TD_DATA[6]
+set_location_assignment PIN_B3 -to TD_DATA[7]
+set_location_assignment PIN_A5 -to TD_HS
+set_location_assignment PIN_F6 -to TD_RESET_N
+set_location_assignment PIN_A3 -to TD_VS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_CLK27
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_HS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_RESET_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_VS
+
+#============================================================
+# USB
+#============================================================
+set_location_assignment PIN_AF4 -to USB_B2_CLK
+set_location_assignment PIN_AH4 -to USB_B2_DATA[0]
+set_location_assignment PIN_AH3 -to USB_B2_DATA[1]
+set_location_assignment PIN_AJ2 -to USB_B2_DATA[2]
+set_location_assignment PIN_AJ1 -to USB_B2_DATA[3]
+set_location_assignment PIN_AH2 -to USB_B2_DATA[4]
+set_location_assignment PIN_AG3 -to USB_B2_DATA[5]
+set_location_assignment PIN_AG2 -to USB_B2_DATA[6]
+set_location_assignment PIN_AG1 -to USB_B2_DATA[7]
+set_location_assignment PIN_AF5 -to USB_EMPTY
+set_location_assignment PIN_AG5 -to USB_FULL
+set_location_assignment PIN_AF6 -to USB_OE_N
+set_location_assignment PIN_AG6 -to USB_RD_N
+set_location_assignment PIN_AG7 -to USB_RESET_N
+set_location_assignment PIN_AG8 -to USB_SCL
+set_location_assignment PIN_AF8 -to USB_SDA
+set_location_assignment PIN_AH5 -to USB_WR_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_B2_DATA[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_EMPTY
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_FULL
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_OE_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_RD_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_RESET_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_SCL
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_SDA
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_WR_N
+
+#============================================================
+# VGA
+#============================================================
+set_location_assignment PIN_B13 -to VGA_B[0]
+set_location_assignment PIN_G13 -to VGA_B[1]
+set_location_assignment PIN_H13 -to VGA_B[2]
+set_location_assignment PIN_F14 -to VGA_B[3]
+set_location_assignment PIN_H14 -to VGA_B[4]
+set_location_assignment PIN_F15 -to VGA_B[5]
+set_location_assignment PIN_G15 -to VGA_B[6]
+set_location_assignment PIN_J14 -to VGA_B[7]
+set_location_assignment PIN_F10 -to VGA_BLANK_N
+set_location_assignment PIN_A11 -to VGA_CLK
+set_location_assignment PIN_J9 -to VGA_G[0]
+set_location_assignment PIN_J10 -to VGA_G[1]
+set_location_assignment PIN_H12 -to VGA_G[2]
+set_location_assignment PIN_G10 -to VGA_G[3]
+set_location_assignment PIN_G11 -to VGA_G[4]
+set_location_assignment PIN_G12 -to VGA_G[5]
+set_location_assignment PIN_F11 -to VGA_G[6]
+set_location_assignment PIN_E11 -to VGA_G[7]
+set_location_assignment PIN_B11 -to VGA_HS
+set_location_assignment PIN_A13 -to VGA_R[0]
+set_location_assignment PIN_C13 -to VGA_R[1]
+set_location_assignment PIN_E13 -to VGA_R[2]
+set_location_assignment PIN_B12 -to VGA_R[3]
+set_location_assignment PIN_C12 -to VGA_R[4]
+set_location_assignment PIN_D12 -to VGA_R[5]
+set_location_assignment PIN_E12 -to VGA_R[6]
+set_location_assignment PIN_F13 -to VGA_R[7]
+set_location_assignment PIN_C10 -to VGA_SYNC_N
+set_location_assignment PIN_D11 -to VGA_VS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_BLANK_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_HS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_SYNC_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_VS
+
+#============================================================
+# HPS
+#============================================================
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_CONV_USB_N
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[0]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[1]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[2]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[3]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[4]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[5]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[6]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[7]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[8]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[9]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[10]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[11]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[12]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[13]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ADDR[14]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_BA[0]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_BA[1]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_BA[2]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_CAS_N
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_CKE
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_CK_N
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_CK_P
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_CS_N
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DM[0]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DM[1]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DM[2]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DM[3]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[0]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[1]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[2]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[3]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[4]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[5]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[6]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[7]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[8]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[9]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[10]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[11]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[12]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[13]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[14]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[15]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[16]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[17]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[18]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[19]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[20]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[21]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[22]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[23]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[24]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[25]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[26]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[27]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[28]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[29]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[30]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_DQ[31]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_N[0]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_N[1]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_N[2]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_N[3]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_P[0]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_P[1]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_P[2]
+set_instance_assignment -name IO_STANDARD "Differential 1.5-V SSTL Class I" -to HPS_DDR3_DQS_P[3]
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_ODT
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_RAS_N
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_RESET_N
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_RZQ
+set_instance_assignment -name IO_STANDARD "SSTL-15 Class I" -to HPS_DDR3_WE_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_GTX_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_INT_N
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_MDC
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_MDIO
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DV
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_EN
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_DCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_FLASH_NCSO
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_GSENSOR_INT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C1_SCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C1_SDAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C2_SCLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C2_SDAT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C_CONTROL
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_KEY
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_LED
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_LTC_GPIO
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_CMD
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_CLK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_MISO
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_MOSI
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_SS
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_UART_RX
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_UART_TX
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_CLKOUT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[7]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DIR
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_NXT
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_STP
+set_instance_assignment -name io_standard "3.3-V LVTTL" -to HPS_GPIO[0]
+set_instance_assignment -name io_standard "3.3-V LVTTL" -to HPS_GPIO[1]
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[10]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[11]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[12]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[13]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[14]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[6]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[7]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[8]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ADDR[9]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_BA[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_BA[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_BA[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_CAS_N
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_CKE
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_CS_N
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_ODT
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_RAS_N
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_WE_N
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to HPS_DDR3_RESET_N
+
+set_instance_assignment -name D5_DELAY 2 -to HPS_DDR3_CK_P
+set_instance_assignment -name D5_DELAY 2 -to HPS_DDR3_CK_N
+
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[0]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[1]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[2]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[3]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[4]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[5]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[6]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[7]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[8]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[9]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[10]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[11]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[12]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[13]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[14]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[15]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[16]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[17]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[18]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[19]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[20]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[21]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[22]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[23]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[24]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[25]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[26]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[27]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[28]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[29]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[30]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[31]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[0]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[1]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[2]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[3]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[0]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[1]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[2]
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[3]
+
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[0]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[1]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[2]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[3]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[4]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[5]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[6]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[7]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[8]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[9]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[10]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[11]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[12]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[13]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[14]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[15]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[16]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[17]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[18]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[19]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[20]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[21]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[22]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[23]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[24]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[25]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[26]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[27]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[28]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[29]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[30]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQ[31]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[0]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[1]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[2]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_P[3]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[0]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[1]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[2]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DQS_N[3]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to HPS_DDR3_CK_P
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to HPS_DDR3_CK_N
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DM[0]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DM[1]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DM[2]
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to HPS_DDR3_DM[3]
+
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[3]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[4]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[5]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[6]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[7]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[8]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[9]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[10]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[11]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[12]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[13]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[14]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[15]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[16]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[17]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[18]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[19]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[20]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[21]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[22]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[23]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[24]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[25]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[26]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[27]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[28]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[29]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[30]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQ[31]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DM[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DM[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DM[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DM[3]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_P[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_P[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_P[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_P[3]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_N[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_N[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_N[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_DQS_N[3]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[10]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[11]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[12]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[13]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[14]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[3]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[4]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[5]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[6]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[7]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[8]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ADDR[9]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_BA[0]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_BA[1]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_BA[2]
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_CAS_N
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_CKE
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_CS_N
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_ODT
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_RAS_N
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_WE_N
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_RESET_N
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_CK_P
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to HPS_DDR3_CK_N
+
+#============================================================
+# End of pin and io_standard assignments
+#============================================================
+
diff --git a/output_files/de1_soc_wrapper.asm.rpt b/output_files/de1_soc_wrapper.asm.rpt
index e630645bae88de4953fbbf73a47bcb28de15a2da..ed826f79ebaed3d17ab6c67eb104274f0b62a566 100644
--- a/output_files/de1_soc_wrapper.asm.rpt
+++ b/output_files/de1_soc_wrapper.asm.rpt
@@ -1,5 +1,5 @@
 Assembler report for de1_soc_wrapper
-Thu Sep 24 11:21:17 2020
+Thu Sep 24 12:53:50 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -38,7 +38,7 @@ agreement for further details.
 +---------------------------------------------------------------+
 ; Assembler Summary                                             ;
 +-----------------------+---------------------------------------+
-; Assembler Status      ; Successful - Thu Sep 24 11:21:17 2020 ;
+; Assembler Status      ; Successful - Thu Sep 24 12:53:50 2020 ;
 ; Revision Name         ; de1_soc_wrapper                       ;
 ; Top-level Entity Name ; de1_soc_wrapper                       ;
 ; Family                ; Cyclone V                             ;
@@ -68,8 +68,8 @@ agreement for further details.
 ; Option         ; Setting                      ;
 +----------------+------------------------------+
 ; Device         ; 5CSEMA5F31C6                 ;
-; JTAG usercode  ; 0x02172EEB                   ;
-; Checksum       ; 0x02172EEB                   ;
+; JTAG usercode  ; 0x02171DFA                   ;
+; Checksum       ; 0x02171DFA                   ;
 +----------------+------------------------------+
 
 
@@ -79,13 +79,13 @@ agreement for further details.
 Info: *******************************************************************
 Info: Running Quartus Prime Assembler
     Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
-    Info: Processing started: Thu Sep 24 11:21:08 2020
+    Info: Processing started: Thu Sep 24 12:53:41 2020
 Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (115030): Assembler is generating device programming files
 Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
-    Info: Peak virtual memory: 1108 megabytes
-    Info: Processing ended: Thu Sep 24 11:21:17 2020
+    Info: Peak virtual memory: 1114 megabytes
+    Info: Processing ended: Thu Sep 24 12:53:50 2020
     Info: Elapsed time: 00:00:09
     Info: Total CPU time (on all processors): 00:00:09
 
diff --git a/output_files/de1_soc_wrapper.done b/output_files/de1_soc_wrapper.done
index 99ecef0528348d908abde279871e0bd3e0797f27..cad4d1f5d94fcab76a0159192373eb86cb2b90c5 100644
--- a/output_files/de1_soc_wrapper.done
+++ b/output_files/de1_soc_wrapper.done
@@ -1 +1 @@
-Thu Sep 24 12:09:43 2020
+Thu Sep 24 12:54:07 2020
diff --git a/output_files/de1_soc_wrapper.eda.rpt b/output_files/de1_soc_wrapper.eda.rpt
index bdcbaf444a3f7e30e6e831fecc6e369d8d3d8727..05b59070cbe11a8a351cd5358422ab8c9d4f2226 100644
--- a/output_files/de1_soc_wrapper.eda.rpt
+++ b/output_files/de1_soc_wrapper.eda.rpt
@@ -1,5 +1,5 @@
 EDA Netlist Writer report for de1_soc_wrapper
-Thu Sep 24 11:21:34 2020
+Thu Sep 24 12:54:06 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -37,7 +37,7 @@ agreement for further details.
 +-------------------------------------------------------------------+
 ; EDA Netlist Writer Summary                                        ;
 +---------------------------+---------------------------------------+
-; EDA Netlist Writer Status ; Successful - Thu Sep 24 11:21:34 2020 ;
+; EDA Netlist Writer Status ; Successful - Thu Sep 24 12:54:06 2020 ;
 ; Revision Name             ; de1_soc_wrapper                       ;
 ; Top-level Entity Name     ; de1_soc_wrapper                       ;
 ; Family                    ; Cyclone V                             ;
@@ -82,15 +82,15 @@ agreement for further details.
 Info: *******************************************************************
 Info: Running Quartus Prime EDA Netlist Writer
     Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
-    Info: Processing started: Thu Sep 24 11:21:31 2020
+    Info: Processing started: Thu Sep 24 12:54:03 2020
 Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Warning (10905): Generated the EDA functional simulation netlist because it is the only supported netlist type for this device.
 Info (204019): Generated file de1_soc_wrapper.vo in folder "/home/ks6n19/Documents/project/simulation/modelsim/" for EDA simulation tool
 Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings
     Info: Peak virtual memory: 1316 megabytes
-    Info: Processing ended: Thu Sep 24 11:21:34 2020
+    Info: Processing ended: Thu Sep 24 12:54:06 2020
     Info: Elapsed time: 00:00:03
-    Info: Total CPU time (on all processors): 00:00:03
+    Info: Total CPU time (on all processors): 00:00:02
 
 
diff --git a/output_files/de1_soc_wrapper.fit.rpt b/output_files/de1_soc_wrapper.fit.rpt
index fef31e85cb2fe373721ce644e3be3bac78d059d6..5248cac8c2924773ae81174ffdc94f73f565bd2c 100644
--- a/output_files/de1_soc_wrapper.fit.rpt
+++ b/output_files/de1_soc_wrapper.fit.rpt
@@ -1,5 +1,5 @@
 Fitter report for de1_soc_wrapper
-Thu Sep 24 11:21:05 2020
+Thu Sep 24 12:53:37 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -11,33 +11,35 @@ Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
   3. Fitter Settings
   4. Parallel Compilation
   5. Fitter Netlist Optimizations
-  6. Incremental Compilation Preservation Summary
-  7. Incremental Compilation Partition Settings
-  8. Incremental Compilation Placement Preservation
-  9. Pin-Out File
- 10. Fitter Resource Usage Summary
- 11. Fitter Partition Statistics
- 12. Input Pins
- 13. Output Pins
- 14. I/O Bank Usage
- 15. All Package Pins
- 16. I/O Assignment Warnings
- 17. Fitter Resource Utilization by Entity
- 18. Delay Chain Summary
- 19. Pad To Core Delay Chain Fanout
- 20. Control Signals
- 21. Global & Other Fast Signals
- 22. Non-Global High Fan-Out Signals
- 23. Fitter RAM Summary
- 24. Routing Usage Summary
- 25. I/O Rules Summary
- 26. I/O Rules Details
- 27. I/O Rules Matrix
- 28. Fitter Device Options
- 29. Operating Settings and Conditions
- 30. Estimated Delay Added for Hold Timing Summary
- 31. Estimated Delay Added for Hold Timing Details
- 32. Fitter Messages
+  6. Ignored Assignments
+  7. Incremental Compilation Preservation Summary
+  8. Incremental Compilation Partition Settings
+  9. Incremental Compilation Placement Preservation
+ 10. Pin-Out File
+ 11. Fitter Resource Usage Summary
+ 12. Fitter Partition Statistics
+ 13. Input Pins
+ 14. Output Pins
+ 15. I/O Bank Usage
+ 16. All Package Pins
+ 17. I/O Assignment Warnings
+ 18. Fitter Resource Utilization by Entity
+ 19. Delay Chain Summary
+ 20. Pad To Core Delay Chain Fanout
+ 21. Control Signals
+ 22. Global & Other Fast Signals
+ 23. Non-Global High Fan-Out Signals
+ 24. Fitter RAM Summary
+ 25. Routing Usage Summary
+ 26. I/O Rules Summary
+ 27. I/O Rules Details
+ 28. I/O Rules Matrix
+ 29. Fitter Device Options
+ 30. Operating Settings and Conditions
+ 31. Estimated Delay Added for Hold Timing Summary
+ 32. Estimated Delay Added for Hold Timing Details
+ 33. Fitter Messages
+ 34. Fitter Suppressed Messages
 
 
 
@@ -64,15 +66,15 @@ agreement for further details.
 +-----------------------------------------------------------------------------------+
 ; Fitter Summary                                                                    ;
 +---------------------------------+-------------------------------------------------+
-; Fitter Status                   ; Successful - Thu Sep 24 11:21:05 2020           ;
+; Fitter Status                   ; Successful - Thu Sep 24 12:53:37 2020           ;
 ; Quartus Prime Version           ; 16.1.2 Build 203 01/18/2017 SJ Standard Edition ;
 ; Revision Name                   ; de1_soc_wrapper                                 ;
 ; Top-level Entity Name           ; de1_soc_wrapper                                 ;
 ; Family                          ; Cyclone V                                       ;
 ; Device                          ; 5CSEMA5F31C6                                    ;
 ; Timing Models                   ; Final                                           ;
-; Logic utilization (in ALMs)     ; 2,040 / 32,070 ( 6 % )                          ;
-; Total registers                 ; 1256                                            ;
+; Logic utilization (in ALMs)     ; 2,031 / 32,070 ( 6 % )                          ;
+; Total registers                 ; 1270                                            ;
 ; Total pins                      ; 81 / 457 ( 18 % )                               ;
 ; Total virtual pins              ; 0                                               ;
 ; Total block memory bits         ; 438,272 / 4,065,280 ( 11 % )                    ;
@@ -159,9 +161,9 @@ agreement for further details.
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;   2.6%      ;
-;     Processor 3            ;   2.5%      ;
-;     Processor 4            ;   2.4%      ;
+;     Processor 2            ;   2.8%      ;
+;     Processor 3            ;   2.6%      ;
+;     Processor 4            ;   2.6%      ;
 ;     Processor 5            ;   2.1%      ;
 ;     Processor 6            ;   2.1%      ;
 ;     Processor 7            ;   2.0%      ;
@@ -177,320 +179,519 @@ agreement for further details.
 +----------------------------+-------------+
 
 
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter Netlist Optimizations                                                                                                                                                                                                                                                                                                                                                                                    ;
-+----------------------------------------------------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+--------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
-; Node                                                                                                           ; Action     ; Operation                                         ; Reason                     ; Node Port ; Node Port Name ; Destination Node                                                                                                         ; Destination Port ; Destination Port Name ;
-+----------------------------------------------------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+--------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
-; CLOCK_50~inputCLKENA0                                                                                          ; Created    ; Placement                                         ; Fitter Periphery Placement ;           ;                ;                                                                                                                          ;                  ;                       ;
-; KEY[2]~inputCLKENA0                                                                                            ; Created    ; Placement                                         ; Fitter Periphery Placement ;           ;                ;                                                                                                                          ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aez2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aez2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An63z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Anq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Anq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aru2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aru2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ay53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ay53z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aze3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aze3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B1a3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B1a3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5e3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5e3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B6j2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B6j2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bjd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bjd3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk13z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk23z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5v2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5v2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C183z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C183z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cam2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cam2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc53z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ccg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ccg3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ccq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ccq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgt2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgt2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgu2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgu2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ch03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ch03z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cmn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cmn2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy33z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D1p2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D1p2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D7k2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D7k2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D603z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D603z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D923z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D923z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dcs2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dcs2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ddi3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ddi3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Df83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Df83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dtj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dtj2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duu2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duu2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duv2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duv2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dy23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dy23z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E1r2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E1r2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E153z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E153z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E913z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E913z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Efp2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Efp2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eif3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eif3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ek03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ek03z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eqq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eqq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Euh3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Euh3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Exd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Exd3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eyg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eyg3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eyr2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eyr2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4c3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4c3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F8u2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F8u2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fed3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fed3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffs2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffs2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fhx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fhx2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fn13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fn13z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Foe3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Foe3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fre3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fre3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ftf3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ftf3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fxv2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fxv2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G1s2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G1s2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G4r2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G4r2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G6d3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G6d3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G493z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G493z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf43z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gfq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gfq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ggk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ggk2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Glj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Glj2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmm2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmm2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gto2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gto2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gza3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gza3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2m2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2m2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H8l2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H8l2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H133z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H133z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H783z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H783z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H903z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H903z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hi83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hi83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hmv2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hmv2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hn03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hn03z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hnr2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hnr2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hq33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hq33z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hqg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hqg3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ht53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ht53z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hub3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hub3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hzj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hzj2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I0e3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I0e3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I463z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I463z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|If33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|If33z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igl2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igl2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ikz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ikz2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imt2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imt2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imu2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imu2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Isi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Isi2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|It63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|It63z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Iwp2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Iwp2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixn2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixt2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixt2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5m2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5m2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7b3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7b3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J9d3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J9d3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ji43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ji43z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jky2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jky2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jl93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jl93z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jlo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jlo2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Joi3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Joi3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jsc3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jsc3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw73z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jwf3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jwf3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K7g3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K7g3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K423z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K423z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kev2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kev2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf23z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt43z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kwo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kwo2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kyi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kyi2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L733z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L733z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L753z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L753z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lhd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lhd3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ll83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ll83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Llq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Llq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpu2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpu2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M2b3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M2b3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3e3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3e3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M5f3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M5f3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M413z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M413z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mcc3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mcc3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mhn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mhn2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mof3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mof3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mt13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mt13z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N7c3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N7c3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N8i3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N8i3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na63z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na73z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Naq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Naq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nbx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nbx2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Neu2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Neu2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nf03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nf03z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Noo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Noo2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqy2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqy2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqz2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nz83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nz83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O403z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O403z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O723z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O723z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Oas2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Oas2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ogo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ogo2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ohv2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ohv2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Okn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Okn2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Olg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Olg3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Otr2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Otr2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ovc3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ovc3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow43z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|P2a3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|P2a3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pa33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pa33z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pab3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pab3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pap2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pap2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pcd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pcd3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pfz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pfz2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po53z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po63z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psn2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psv2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psv2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pty2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pty2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q2q2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q2q2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6u2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6u2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q273z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q273z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qa43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qa43z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qji3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qji3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql13z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql23z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz33z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz43z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qzq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qzq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rbo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rbo2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd63z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rds2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rds2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhi2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhu2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhu2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rix2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rix2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ro43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ro43z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr93z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rsa3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rsa3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S2p2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S2p2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S2r2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S2r2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa13z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sg83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sg83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgj2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgp2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgp2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Snd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Snd3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Szr2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Szr2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T8f3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T8f3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T253z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T253z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tch3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tch3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Td33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Td33z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tel2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tel2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tiz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tiz2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To33z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqc3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqc3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Twz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Twz2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyd3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyx2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U4z2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U4z2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5q2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5q2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9e3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9e3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9u2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9u2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U573z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U573z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ufx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ufx2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug63z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uj93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uj93z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ujo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ujo2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Unm2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Unm2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu73z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uuf3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uuf3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyv2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyv2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V3m2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V3m2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V233z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V233z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vac3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vac3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vhk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vhk2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Viy2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Viy2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vr43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vr43z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vu93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vu93z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vve3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vve3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W0b3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W0b3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W4y2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W4y2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wa03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wa03z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbf3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbf3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wce3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wce3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnh3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnh3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wo03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wo03z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wor2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wor2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wqd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wqd3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wu53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wu53z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wuq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wuq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X6m2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X6m2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xmf3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xmf3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xx93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xx93z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xyh3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xyh3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1u2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1u2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9l2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9l2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yg23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yg23z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yj43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yj43z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ywi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ywi2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx63z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx73z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0g3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0g3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z2h3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z2h3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8s2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8s2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z863z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z863z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zb83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zb83z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zgr2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zgr2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjg3z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjq2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zpj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zpj2z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu23z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu43z4~DUPLICATE                                               ;                  ;                       ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[0]~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[1]~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[2]~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[3]~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle                                                                     ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle~DUPLICATE                                                                     ;                  ;                       ;
-; razzle:raz_inst|H_count[0]                                                                                     ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; razzle:raz_inst|H_count[0]~DUPLICATE                                                                                     ;                  ;                       ;
-; razzle:raz_inst|H_count[1]                                                                                     ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; razzle:raz_inst|H_count[1]~DUPLICATE                                                                                     ;                  ;                       ;
-+----------------------------------------------------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+--------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Fitter Netlist Optimizations                                                                                                                                                                                                                                                                                        ;
++------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+----------------------------------------------------------------------------+------------------+-----------------------+
+; Node                                                             ; Action     ; Operation                                         ; Reason                     ; Node Port ; Node Port Name ; Destination Node                                                           ; Destination Port ; Destination Port Name ;
++------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+----------------------------------------------------------------------------+------------------+-----------------------+
+; CLOCK_50~inputCLKENA0                                            ; Created    ; Placement                                         ; Fitter Periphery Placement ;           ;                ;                                                                            ;                  ;                       ;
+; KEY[2]~inputCLKENA0                                              ; Created    ; Placement                                         ; Fitter Periphery Placement ;           ;                ;                                                                            ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aez2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aez2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ajn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ajn2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An73z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Anq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Anq2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aok2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aok2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ara3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ara3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aru2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aru2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Axm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Axm2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Azs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Azs2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B1a3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B1a3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5e3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5e3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B173z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B173z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B943z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B943z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bec3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bec3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk23z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk33z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bmb3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bmb3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bn53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bn53z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C9a3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C9a3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cam2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cam2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc53z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ch03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ch03z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cll2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cll2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cma3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cma3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cps2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cps2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cqo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cqo2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Csz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Csz2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cvr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cvr2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy33z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D1p2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D1p2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D4g3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D4g3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D7k2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D7k2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dcs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dcs2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dhb3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dhb3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Djv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Djv2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dkr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dkr2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dpc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dpc3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq53z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq83z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dvy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dvy2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E163z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E163z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ebh3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ebh3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ec43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ec43z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Edl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Edl2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Efp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Efp2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ejm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ejm2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eut2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eut2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ey03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ey03z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4q2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4q2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F8u2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F8u2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F9j2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F9j2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffs2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fgm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fgm2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fhx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fhx2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fi93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fi93z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fij2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fij2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ft73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ft73z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ft83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ft83z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ftf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ftf3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fxu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fxu2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fzl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fzl2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G1s2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G1s2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G8n2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G8n2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcb3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcb3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcr2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf43z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf53z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf63z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ggk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ggk2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmd3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Grl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Grl2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gtp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gtp2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gxk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gxk2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2f3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2f3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hc23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hc23z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hn03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hn03z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hnr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hnr2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hpd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hpd3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hxx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hxx2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyz2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hzj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hzj2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I453z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I453z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ibe3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ibe3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Idk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Idk2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igi2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igl2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ikz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ikz2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imu2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ipb3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ipb3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ipn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ipn2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Iwp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Iwp2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixh3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixh3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5i3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5i3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5m2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5m2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5o2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5o2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J9d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J9d3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J433z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J433z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jca3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jca3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jex2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jex2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jkc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jkc3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jky2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jky2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jl93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jl93z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Joi3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Joi3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jq13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jq13z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw83z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw93z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jwf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jwf3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K2k2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K2k2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K103z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K103z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ka83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ka83z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kc03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kc03z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf13z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf23z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kfr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kfr2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Knz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Knz2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kop2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kop2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt23z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt33z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt43z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kzf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kzf3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ldf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ldf3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lee3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lee3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ll63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ll63z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpu2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lq03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lq03z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lz93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lz93z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M0i3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M0i3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3e3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3e3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M4j2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M4j2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M413z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M413z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mcz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mcz2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mi23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mi23z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mis2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mis2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mvm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mvm2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mzp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mzp2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N3n2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N3n2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N8o2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N8o2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nbm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nbm2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nl53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nl53z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Noo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Noo2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Npk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Npk2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqy2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nz73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nz73z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O2g3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O2g3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5k2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5k2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5t2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O723z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O723z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Oar2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Oar2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Od83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Od83z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ohv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ohv2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Okn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Okn2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ozo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ozo2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|P2a3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|P2a3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pa33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pa33z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pbl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pbl2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pet2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pet2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pgf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pgf3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Plx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Plx2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po83z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pvd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pvd3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pwg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pwg3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pz53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pz53z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q2q2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q2q2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q7j2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q7j2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qfc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qfc3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qg93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qg93z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qji3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qji3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql23z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qwr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qwr2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz43z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qzq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qzq2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rbo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rbo2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd53z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd73z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rdg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rdg3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhi2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rkd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rkd3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr73z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr83z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr93z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvv2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rxl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rxl2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S4w2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S4w2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa23z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sog3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sog3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sr53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sr53z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Swy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Swy2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Szr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Szr2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T1d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T1d3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T243z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T243z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T253z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T253z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T583z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T583z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Td33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Td33z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tel2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tel2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Thm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Thm2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tiz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tiz2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tme3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tme3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To33z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqs2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tr63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tr63z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tse3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tse3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Twz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Twz2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2s2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2s2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U4z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U4z2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5a3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5a3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5q2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5q2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U7w2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U7w2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9u2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9u2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U593z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U593z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ufx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ufx2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug43z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ujp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ujp2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uku2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uku2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uo13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uo13z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uqi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uqi2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu73z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uup2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uup2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V3m2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V3m2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V233z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V233z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vg53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vg53z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vgg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vgg3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vgs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vgs2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vr33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vr33z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vu93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vu93z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vuo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vuo2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vxf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vxf3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wa03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wa03z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbk2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wd23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wd23z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wia3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wia3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj73z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wmp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wmp2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnt2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnt2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wo03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wo03z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wqm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wqm2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wuq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wuq2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X1e3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X1e3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X2j2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X2j2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X6m2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X6m2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X213z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X213z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X533z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X533z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X543z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X543z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xg33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xg33z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xsx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xsx2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xti2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xti2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xx93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xx93z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1v2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1v2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y6o2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y6o2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yb93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yb93z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ycu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ycu2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ycx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ycx2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yd03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yd03z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yg13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yg13z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ylc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ylc3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ytm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ytm2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx73z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yzi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yzi2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0g3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0g3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z3k2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z3k2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z4l2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z4l2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z853z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z853z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zad3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zad3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zb83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zb83z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zfv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zfv2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zj53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zj53z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjg3z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjq2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zkk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zkk2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zoy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zoy2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zr03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zr03z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu23z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu43z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zxo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zxo2z4~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[7]           ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[7]~DUPLICATE           ;                  ;                       ;
+; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[2]                    ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[2]~DUPLICATE                    ;                  ;                       ;
+; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[3]                    ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[3]~DUPLICATE                    ;                  ;                       ;
+; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle                       ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle~DUPLICATE                       ;                  ;                       ;
+; arm_soc:soc_inst|ahb_switches:switches_1|half_word_address[0]    ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_switches:switches_1|half_word_address[0]~DUPLICATE    ;                  ;                       ;
+; arm_soc:soc_inst|ahb_switches:switches_1|half_word_address[1]    ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_switches:switches_1|half_word_address[1]~DUPLICATE    ;                  ;                       ;
+; razzle:raz_inst|H_count[0]                                       ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; razzle:raz_inst|H_count[0]~DUPLICATE                                       ;                  ;                       ;
+; razzle:raz_inst|H_count[1]                                       ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; razzle:raz_inst|H_count[1]~DUPLICATE                                       ;                  ;                       ;
+; razzle:raz_inst|H_count[2]                                       ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; razzle:raz_inst|H_count[2]~DUPLICATE                                       ;                  ;                       ;
++------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+----------------------------------------------------------------------------+------------------+-----------------------+
+
+
++--------------------------------------------------------------------------------------------+
+; Ignored Assignments                                                                        ;
++----------+----------------+--------------+----------------+---------------+----------------+
+; Name     ; Ignored Entity ; Ignored From ; Ignored To     ; Ignored Value ; Ignored Source ;
++----------+----------------+--------------+----------------+---------------+----------------+
+; Location ;                ;              ; ADC_CS_N       ; PIN_AJ4       ; QSF Assignment ;
+; Location ;                ;              ; ADC_DIN        ; PIN_AK4       ; QSF Assignment ;
+; Location ;                ;              ; ADC_DOUT       ; PIN_AK3       ; QSF Assignment ;
+; Location ;                ;              ; ADC_SCLK       ; PIN_AK2       ; QSF Assignment ;
+; Location ;                ;              ; AUD_ADCDAT     ; PIN_K7        ; QSF Assignment ;
+; Location ;                ;              ; AUD_ADCLRCK    ; PIN_K8        ; QSF Assignment ;
+; Location ;                ;              ; AUD_BCLK       ; PIN_H7        ; QSF Assignment ;
+; Location ;                ;              ; AUD_DACDAT     ; PIN_J7        ; QSF Assignment ;
+; Location ;                ;              ; AUD_DACLRCK    ; PIN_H8        ; QSF Assignment ;
+; Location ;                ;              ; AUD_XCK        ; PIN_G7        ; QSF Assignment ;
+; Location ;                ;              ; CLOCK2_50      ; PIN_AA16      ; QSF Assignment ;
+; Location ;                ;              ; CLOCK3_50      ; PIN_Y26       ; QSF Assignment ;
+; Location ;                ;              ; CLOCK4_50      ; PIN_K14       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[0]   ; PIN_AK14      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[10]  ; PIN_AG12      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[11]  ; PIN_AH13      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[12]  ; PIN_AJ14      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[1]   ; PIN_AH14      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[2]   ; PIN_AG15      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[3]   ; PIN_AE14      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[4]   ; PIN_AB15      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[5]   ; PIN_AC14      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[6]   ; PIN_AD14      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[7]   ; PIN_AF15      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[8]   ; PIN_AH15      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_ADDR[9]   ; PIN_AG13      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_BA[0]     ; PIN_AF13      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_BA[1]     ; PIN_AJ12      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_CAS_N     ; PIN_AF11      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_CKE       ; PIN_AK13      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_CLK       ; PIN_AH12      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_CS_N      ; PIN_AG11      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[0]     ; PIN_AK6       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[10]    ; PIN_AJ9       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[11]    ; PIN_AH9       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[12]    ; PIN_AH8       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[13]    ; PIN_AH7       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[14]    ; PIN_AJ6       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[15]    ; PIN_AJ5       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[1]     ; PIN_AJ7       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[2]     ; PIN_AK7       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[3]     ; PIN_AK8       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[4]     ; PIN_AK9       ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[5]     ; PIN_AG10      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[6]     ; PIN_AK11      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[7]     ; PIN_AJ11      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[8]     ; PIN_AH10      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_DQ[9]     ; PIN_AJ10      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_LDQM      ; PIN_AB13      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_RAS_N     ; PIN_AE13      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_UDQM      ; PIN_AK12      ; QSF Assignment ;
+; Location ;                ;              ; DRAM_WE_N      ; PIN_AA13      ; QSF Assignment ;
+; Location ;                ;              ; FAN_CTRL       ; PIN_AA12      ; QSF Assignment ;
+; Location ;                ;              ; FPGA_I2C_SCLK  ; PIN_J12       ; QSF Assignment ;
+; Location ;                ;              ; FPGA_I2C_SDAT  ; PIN_K12       ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[0]      ; PIN_AC18      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[10]     ; PIN_AH18      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[11]     ; PIN_AH17      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[12]     ; PIN_AG16      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[13]     ; PIN_AE16      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[14]     ; PIN_AF16      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[15]     ; PIN_AG17      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[16]     ; PIN_AA18      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[17]     ; PIN_AA19      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[18]     ; PIN_AE17      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[19]     ; PIN_AC20      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[1]      ; PIN_Y17       ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[20]     ; PIN_AH19      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[21]     ; PIN_AJ20      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[22]     ; PIN_AH20      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[23]     ; PIN_AK21      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[24]     ; PIN_AD19      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[25]     ; PIN_AD20      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[26]     ; PIN_AE18      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[27]     ; PIN_AE19      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[28]     ; PIN_AF20      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[29]     ; PIN_AF21      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[2]      ; PIN_AD17      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[30]     ; PIN_AF19      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[31]     ; PIN_AG21      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[32]     ; PIN_AF18      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[33]     ; PIN_AG20      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[34]     ; PIN_AG18      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[35]     ; PIN_AJ21      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[3]      ; PIN_Y18       ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[4]      ; PIN_AK16      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[5]      ; PIN_AK18      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[6]      ; PIN_AK19      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[7]      ; PIN_AJ19      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[8]      ; PIN_AJ17      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_0[9]      ; PIN_AJ16      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[0]      ; PIN_AB17      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[10]     ; PIN_AG26      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[11]     ; PIN_AH24      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[12]     ; PIN_AH27      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[13]     ; PIN_AJ27      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[14]     ; PIN_AK29      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[15]     ; PIN_AK28      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[16]     ; PIN_AK27      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[17]     ; PIN_AJ26      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[18]     ; PIN_AK26      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[19]     ; PIN_AH25      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[1]      ; PIN_AA21      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[20]     ; PIN_AJ25      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[21]     ; PIN_AJ24      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[22]     ; PIN_AK24      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[23]     ; PIN_AG23      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[24]     ; PIN_AK23      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[25]     ; PIN_AH23      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[26]     ; PIN_AK22      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[27]     ; PIN_AJ22      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[28]     ; PIN_AH22      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[29]     ; PIN_AG22      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[2]      ; PIN_AB21      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[30]     ; PIN_AF24      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[31]     ; PIN_AF23      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[32]     ; PIN_AE22      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[33]     ; PIN_AD21      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[34]     ; PIN_AA20      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[35]     ; PIN_AC22      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[3]      ; PIN_AC23      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[4]      ; PIN_AD24      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[5]      ; PIN_AE23      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[6]      ; PIN_AE24      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[7]      ; PIN_AF25      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[8]      ; PIN_AF26      ; QSF Assignment ;
+; Location ;                ;              ; GPIO_1[9]      ; PIN_AG25      ; QSF Assignment ;
+; Location ;                ;              ; HEX4[0]        ; PIN_AA24      ; QSF Assignment ;
+; Location ;                ;              ; HEX4[1]        ; PIN_Y23       ; QSF Assignment ;
+; Location ;                ;              ; HEX4[2]        ; PIN_Y24       ; QSF Assignment ;
+; Location ;                ;              ; HEX4[3]        ; PIN_W22       ; QSF Assignment ;
+; Location ;                ;              ; HEX4[4]        ; PIN_W24       ; QSF Assignment ;
+; Location ;                ;              ; HEX4[5]        ; PIN_V23       ; QSF Assignment ;
+; Location ;                ;              ; HEX4[6]        ; PIN_W25       ; QSF Assignment ;
+; Location ;                ;              ; HEX5[0]        ; PIN_V25       ; QSF Assignment ;
+; Location ;                ;              ; HEX5[1]        ; PIN_AA28      ; QSF Assignment ;
+; Location ;                ;              ; HEX5[2]        ; PIN_Y27       ; QSF Assignment ;
+; Location ;                ;              ; HEX5[3]        ; PIN_AB27      ; QSF Assignment ;
+; Location ;                ;              ; HEX5[4]        ; PIN_AB26      ; QSF Assignment ;
+; Location ;                ;              ; HEX5[5]        ; PIN_AA26      ; QSF Assignment ;
+; Location ;                ;              ; HEX5[6]        ; PIN_AA25      ; QSF Assignment ;
+; Location ;                ;              ; IRDA_RXD       ; PIN_AA30      ; QSF Assignment ;
+; Location ;                ;              ; IRDA_TXD       ; PIN_AB30      ; QSF Assignment ;
+; Location ;                ;              ; PS2_CLK        ; PIN_AD7       ; QSF Assignment ;
+; Location ;                ;              ; PS2_CLK2       ; PIN_AD9       ; QSF Assignment ;
+; Location ;                ;              ; PS2_DAT        ; PIN_AE7       ; QSF Assignment ;
+; Location ;                ;              ; PS2_DAT2       ; PIN_AE9       ; QSF Assignment ;
+; Location ;                ;              ; TD_CLK27       ; PIN_H15       ; QSF Assignment ;
+; Location ;                ;              ; TD_DATA[0]     ; PIN_D2        ; QSF Assignment ;
+; Location ;                ;              ; TD_DATA[1]     ; PIN_B1        ; QSF Assignment ;
+; Location ;                ;              ; TD_DATA[2]     ; PIN_E2        ; QSF Assignment ;
+; Location ;                ;              ; TD_DATA[3]     ; PIN_B2        ; QSF Assignment ;
+; Location ;                ;              ; TD_DATA[4]     ; PIN_D1        ; QSF Assignment ;
+; Location ;                ;              ; TD_DATA[5]     ; PIN_E1        ; QSF Assignment ;
+; Location ;                ;              ; TD_DATA[6]     ; PIN_C2        ; QSF Assignment ;
+; Location ;                ;              ; TD_DATA[7]     ; PIN_B3        ; QSF Assignment ;
+; Location ;                ;              ; TD_HS          ; PIN_A5        ; QSF Assignment ;
+; Location ;                ;              ; TD_RESET_N     ; PIN_F6        ; QSF Assignment ;
+; Location ;                ;              ; TD_VS          ; PIN_A3        ; QSF Assignment ;
+; Location ;                ;              ; USB_B2_CLK     ; PIN_AF4       ; QSF Assignment ;
+; Location ;                ;              ; USB_B2_DATA[0] ; PIN_AH4       ; QSF Assignment ;
+; Location ;                ;              ; USB_B2_DATA[1] ; PIN_AH3       ; QSF Assignment ;
+; Location ;                ;              ; USB_B2_DATA[2] ; PIN_AJ2       ; QSF Assignment ;
+; Location ;                ;              ; USB_B2_DATA[3] ; PIN_AJ1       ; QSF Assignment ;
+; Location ;                ;              ; USB_B2_DATA[4] ; PIN_AH2       ; QSF Assignment ;
+; Location ;                ;              ; USB_B2_DATA[5] ; PIN_AG3       ; QSF Assignment ;
+; Location ;                ;              ; USB_B2_DATA[6] ; PIN_AG2       ; QSF Assignment ;
+; Location ;                ;              ; USB_B2_DATA[7] ; PIN_AG1       ; QSF Assignment ;
+; Location ;                ;              ; USB_EMPTY      ; PIN_AF5       ; QSF Assignment ;
+; Location ;                ;              ; USB_FULL       ; PIN_AG5       ; QSF Assignment ;
+; Location ;                ;              ; USB_OE_N       ; PIN_AF6       ; QSF Assignment ;
+; Location ;                ;              ; USB_RD_N       ; PIN_AG6       ; QSF Assignment ;
+; Location ;                ;              ; USB_RESET_N    ; PIN_AG7       ; QSF Assignment ;
+; Location ;                ;              ; USB_SCL        ; PIN_AG8       ; QSF Assignment ;
+; Location ;                ;              ; USB_SDA        ; PIN_AF8       ; QSF Assignment ;
+; Location ;                ;              ; USB_WR_N       ; PIN_AH5       ; QSF Assignment ;
+; Location ;                ;              ; VGA_SYNC_N     ; PIN_C10       ; QSF Assignment ;
++----------+----------------+--------------+----------------+---------------+----------------+
 
 
 +---------------------------------------------------------------------------------------------------+
@@ -539,24 +740,24 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 +-------------------------------------------------------------+-----------------------+-------+
 ; Resource                                                    ; Usage                 ; %     ;
 +-------------------------------------------------------------+-----------------------+-------+
-; Logic utilization (ALMs needed / total ALMs on device)      ; 2,040 / 32,070        ; 6 %   ;
-; ALMs needed [=A-B+C]                                        ; 2,040                 ;       ;
-;     [A] ALMs used in final placement [=a+b+c+d]             ; 2,259 / 32,070        ; 7 %   ;
-;         [a] ALMs used for LUT logic and registers           ; 219                   ;       ;
-;         [b] ALMs used for LUT logic                         ; 1,784                 ;       ;
-;         [c] ALMs used for registers                         ; 256                   ;       ;
+; Logic utilization (ALMs needed / total ALMs on device)      ; 2,031 / 32,070        ; 6 %   ;
+; ALMs needed [=A-B+C]                                        ; 2,031                 ;       ;
+;     [A] ALMs used in final placement [=a+b+c+d]             ; 2,278 / 32,070        ; 7 %   ;
+;         [a] ALMs used for LUT logic and registers           ; 212                   ;       ;
+;         [b] ALMs used for LUT logic                         ; 1,803                 ;       ;
+;         [c] ALMs used for registers                         ; 263                   ;       ;
 ;         [d] ALMs used for memory (up to half of total ALMs) ; 0                     ;       ;
-;     [B] Estimate of ALMs recoverable by dense packing       ; 261 / 32,070          ; < 1 % ;
-;     [C] Estimate of ALMs unavailable [=a+b+c+d]             ; 42 / 32,070           ; < 1 % ;
+;     [B] Estimate of ALMs recoverable by dense packing       ; 283 / 32,070          ; < 1 % ;
+;     [C] Estimate of ALMs unavailable [=a+b+c+d]             ; 36 / 32,070           ; < 1 % ;
 ;         [a] Due to location constrained logic               ; 0                     ;       ;
-;         [b] Due to LAB-wide signal conflicts                ; 2                     ;       ;
-;         [c] Due to LAB input limits                         ; 40                    ;       ;
+;         [b] Due to LAB-wide signal conflicts                ; 1                     ;       ;
+;         [c] Due to LAB input limits                         ; 35                    ;       ;
 ;         [d] Due to virtual I/Os                             ; 0                     ;       ;
 ;                                                             ;                       ;       ;
 ; Difficulty packing design                                   ; Low                   ;       ;
 ;                                                             ;                       ;       ;
-; Total LABs:  partially or completely used                   ; 276 / 3,207           ; 9 %   ;
-;     -- Logic LABs                                           ; 276                   ;       ;
+; Total LABs:  partially or completely used                   ; 274 / 3,207           ; 9 %   ;
+;     -- Logic LABs                                           ; 274                   ;       ;
 ;     -- Memory LABs (up to half of total LABs)               ; 0                     ;       ;
 ;                                                             ;                       ;       ;
 ; Combinational ALUT usage for logic                          ; 3,176                 ;       ;
@@ -565,19 +766,19 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ;     -- 5 input functions                                    ; 744                   ;       ;
 ;     -- 4 input functions                                    ; 688                   ;       ;
 ;     -- <=3 input functions                                  ; 686                   ;       ;
-; Combinational ALUT usage for route-throughs                 ; 53                    ;       ;
+; Combinational ALUT usage for route-throughs                 ; 58                    ;       ;
 ;                                                             ;                       ;       ;
-; Dedicated logic registers                                   ; 1,256                 ;       ;
+; Dedicated logic registers                                   ; 1,270                 ;       ;
 ;     -- By type:                                             ;                       ;       ;
 ;         -- Primary logic registers                          ; 950 / 64,140          ; 1 %   ;
-;         -- Secondary logic registers                        ; 306 / 64,140          ; < 1 % ;
+;         -- Secondary logic registers                        ; 320 / 64,140          ; < 1 % ;
 ;     -- By function:                                         ;                       ;       ;
 ;         -- Design implementation registers                  ; 950                   ;       ;
-;         -- Routing optimization registers                   ; 306                   ;       ;
+;         -- Routing optimization registers                   ; 320                   ;       ;
 ;                                                             ;                       ;       ;
 ; Virtual pins                                                ; 0                     ;       ;
 ; I/O pins                                                    ; 81 / 457              ; 18 %  ;
-;     -- Clock pins                                           ; 5 / 8                 ; 63 %  ;
+;     -- Clock pins                                           ; 4 / 8                 ; 50 %  ;
 ;     -- Dedicated input pins                                 ; 0 / 21                ; 0 %   ;
 ;                                                             ;                       ;       ;
 ; Hard processor system peripheral utilization                ;                       ;       ;
@@ -628,11 +829,11 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; Oscillator blocks                                           ; 0 / 1                 ; 0 %   ;
 ; Impedance control blocks                                    ; 0 / 4                 ; 0 %   ;
 ; Hard Memory Controllers                                     ; 0 / 2                 ; 0 %   ;
-; Average interconnect usage (total/H/V)                      ; 2.8% / 3.0% / 2.5%    ;       ;
-; Peak interconnect usage (total/H/V)                         ; 32.7% / 34.8% / 28.2% ;       ;
-; Maximum fan-out                                             ; 1310                  ;       ;
+; Average interconnect usage (total/H/V)                      ; 2.8% / 2.8% / 2.7%    ;       ;
+; Peak interconnect usage (total/H/V)                         ; 42.6% / 43.1% / 41.0% ;       ;
+; Maximum fan-out                                             ; 1324                  ;       ;
 ; Highest non-global fan-out                                  ; 605                   ;       ;
-; Total fan-out                                               ; 20789                 ;       ;
+; Total fan-out                                               ; 20854                 ;       ;
 ; Average fan-out                                             ; 4.42                  ;       ;
 +-------------------------------------------------------------+-----------------------+-------+
 
@@ -642,24 +843,24 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 +-------------------------------------------------------------+-----------------------+--------------------------------+
 ; Statistic                                                   ; Top                   ; hard_block:auto_generated_inst ;
 +-------------------------------------------------------------+-----------------------+--------------------------------+
-; Logic utilization (ALMs needed / total ALMs on device)      ; 2040 / 32070 ( 6 % )  ; 0 / 32070 ( 0 % )              ;
-; ALMs needed [=A-B+C]                                        ; 2040                  ; 0                              ;
-;     [A] ALMs used in final placement [=a+b+c+d]             ; 2259 / 32070 ( 7 % )  ; 0 / 32070 ( 0 % )              ;
-;         [a] ALMs used for LUT logic and registers           ; 219                   ; 0                              ;
-;         [b] ALMs used for LUT logic                         ; 1784                  ; 0                              ;
-;         [c] ALMs used for registers                         ; 256                   ; 0                              ;
+; Logic utilization (ALMs needed / total ALMs on device)      ; 2031 / 32070 ( 6 % )  ; 0 / 32070 ( 0 % )              ;
+; ALMs needed [=A-B+C]                                        ; 2031                  ; 0                              ;
+;     [A] ALMs used in final placement [=a+b+c+d]             ; 2278 / 32070 ( 7 % )  ; 0 / 32070 ( 0 % )              ;
+;         [a] ALMs used for LUT logic and registers           ; 212                   ; 0                              ;
+;         [b] ALMs used for LUT logic                         ; 1803                  ; 0                              ;
+;         [c] ALMs used for registers                         ; 263                   ; 0                              ;
 ;         [d] ALMs used for memory (up to half of total ALMs) ; 0                     ; 0                              ;
-;     [B] Estimate of ALMs recoverable by dense packing       ; 261 / 32070 ( < 1 % ) ; 0 / 32070 ( 0 % )              ;
-;     [C] Estimate of ALMs unavailable [=a+b+c+d]             ; 42 / 32070 ( < 1 % )  ; 0 / 32070 ( 0 % )              ;
+;     [B] Estimate of ALMs recoverable by dense packing       ; 283 / 32070 ( < 1 % ) ; 0 / 32070 ( 0 % )              ;
+;     [C] Estimate of ALMs unavailable [=a+b+c+d]             ; 36 / 32070 ( < 1 % )  ; 0 / 32070 ( 0 % )              ;
 ;         [a] Due to location constrained logic               ; 0                     ; 0                              ;
-;         [b] Due to LAB-wide signal conflicts                ; 2                     ; 0                              ;
-;         [c] Due to LAB input limits                         ; 40                    ; 0                              ;
+;         [b] Due to LAB-wide signal conflicts                ; 1                     ; 0                              ;
+;         [c] Due to LAB input limits                         ; 35                    ; 0                              ;
 ;         [d] Due to virtual I/Os                             ; 0                     ; 0                              ;
 ;                                                             ;                       ;                                ;
 ; Difficulty packing design                                   ; Low                   ; Low                            ;
 ;                                                             ;                       ;                                ;
-; Total LABs:  partially or completely used                   ; 276 / 3207 ( 9 % )    ; 0 / 3207 ( 0 % )               ;
-;     -- Logic LABs                                           ; 276                   ; 0                              ;
+; Total LABs:  partially or completely used                   ; 274 / 3207 ( 9 % )    ; 0 / 3207 ( 0 % )               ;
+;     -- Logic LABs                                           ; 274                   ; 0                              ;
 ;     -- Memory LABs (up to half of total LABs)               ; 0                     ; 0                              ;
 ;                                                             ;                       ;                                ;
 ; Combinational ALUT usage for logic                          ; 3176                  ; 0                              ;
@@ -668,7 +869,7 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ;     -- 5 input functions                                    ; 744                   ; 0                              ;
 ;     -- 4 input functions                                    ; 688                   ; 0                              ;
 ;     -- <=3 input functions                                  ; 686                   ; 0                              ;
-; Combinational ALUT usage for route-throughs                 ; 53                    ; 0                              ;
+; Combinational ALUT usage for route-throughs                 ; 58                    ; 0                              ;
 ; Memory ALUT usage                                           ; 0                     ; 0                              ;
 ;     -- 64-address deep                                      ; 0                     ; 0                              ;
 ;     -- 32-address deep                                      ; 0                     ; 0                              ;
@@ -676,10 +877,10 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; Dedicated logic registers                                   ; 0                     ; 0                              ;
 ;     -- By type:                                             ;                       ;                                ;
 ;         -- Primary logic registers                          ; 950 / 64140 ( 1 % )   ; 0 / 64140 ( 0 % )              ;
-;         -- Secondary logic registers                        ; 306 / 64140 ( < 1 % ) ; 0 / 64140 ( 0 % )              ;
+;         -- Secondary logic registers                        ; 320 / 64140 ( < 1 % ) ; 0 / 64140 ( 0 % )              ;
 ;     -- By function:                                         ;                       ;                                ;
 ;         -- Design implementation registers                  ; 950                   ; 0                              ;
-;         -- Routing optimization registers                   ; 306                   ; 0                              ;
+;         -- Routing optimization registers                   ; 320                   ; 0                              ;
 ;                                                             ;                       ;                                ;
 ;                                                             ;                       ;                                ;
 ; Virtual pins                                                ; 0                     ; 0                              ;
@@ -697,8 +898,8 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ;     -- Registered Output Connections                        ; 0                     ; 0                              ;
 ;                                                             ;                       ;                                ;
 ; Internal Connections                                        ;                       ;                                ;
-;     -- Total Connections                                    ; 21778                 ; 0                              ;
-;     -- Registered Connections                               ; 7517                  ; 0                              ;
+;     -- Total Connections                                    ; 21843                 ; 0                              ;
+;     -- Registered Connections                               ; 7518                  ; 0                              ;
 ;                                                             ;                       ;                                ;
 ; External Connections                                        ;                       ;                                ;
 ;     -- Top                                                  ; 0                     ; 0                              ;
@@ -730,21 +931,21 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 +----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
 ; Name     ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination ; Termination Control Block ; Location assigned by ; Slew Rate ;
 +----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
-; CLOCK_50 ; AB27  ; 5B       ; 89           ; 23           ; 20           ; 1310                  ; 0                  ; yes    ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; KEY[0]   ; AG5   ; 3A       ; 14           ; 0            ; 34           ; 3                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; KEY[1]   ; AH9   ; 3B       ; 18           ; 0            ; 91           ; 3                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; KEY[2]   ; Y27   ; 5B       ; 89           ; 25           ; 20           ; 1245                  ; 0                  ; yes    ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; KEY[3]   ; Y26   ; 5B       ; 89           ; 25           ; 3            ; 0                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; SW[0]    ; AG12  ; 3B       ; 26           ; 0            ; 40           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; SW[1]    ; AC12  ; 3A       ; 16           ; 0            ; 0            ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; SW[2]    ; AG10  ; 3B       ; 18           ; 0            ; 74           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; SW[3]    ; AJ5   ; 3B       ; 24           ; 0            ; 34           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; SW[4]    ; AK3   ; 3B       ; 20           ; 0            ; 51           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; SW[5]    ; AD12  ; 3A       ; 16           ; 0            ; 17           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; SW[6]    ; AK4   ; 3B       ; 22           ; 0            ; 51           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; SW[7]    ; AK2   ; 3B       ; 20           ; 0            ; 34           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; SW[8]    ; AK7   ; 3B       ; 28           ; 0            ; 34           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
-; SW[9]    ; AH8   ; 3B       ; 32           ; 0            ; 51           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; Fitter               ; no        ;
+; CLOCK_50 ; AF14  ; 3B       ; 32           ; 0            ; 0            ; 1324                  ; 0                  ; yes    ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; KEY[0]   ; AA14  ; 3B       ; 36           ; 0            ; 0            ; 3                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; KEY[1]   ; AA15  ; 3B       ; 36           ; 0            ; 17           ; 3                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; KEY[2]   ; W15   ; 3B       ; 40           ; 0            ; 0            ; 1263                  ; 0                  ; yes    ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; KEY[3]   ; Y16   ; 3B       ; 40           ; 0            ; 17           ; 0                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; SW[0]    ; AB12  ; 3A       ; 12           ; 0            ; 17           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; SW[1]    ; AC12  ; 3A       ; 16           ; 0            ; 0            ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; SW[2]    ; AF9   ; 3A       ; 8            ; 0            ; 34           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; SW[3]    ; AF10  ; 3A       ; 4            ; 0            ; 51           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; SW[4]    ; AD11  ; 3A       ; 2            ; 0            ; 40           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; SW[5]    ; AD12  ; 3A       ; 16           ; 0            ; 17           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; SW[6]    ; AE11  ; 3A       ; 4            ; 0            ; 34           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; SW[7]    ; AC9   ; 3A       ; 4            ; 0            ; 0            ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; SW[8]    ; AD10  ; 3A       ; 4            ; 0            ; 17           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; SW[9]    ; AE12  ; 3A       ; 2            ; 0            ; 57           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
 +----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
 
 
@@ -753,72 +954,72 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 +-------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+
 ; Name        ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Output Register ; Output Enable Register ; Slew Rate ; PCI I/O Enabled ; Open Drain ; TRI Primitive ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Termination                       ; Termination Control Block ; Output Buffer Pre-emphasis ; Voltage Output Differential ; Output Buffer Delay ; Output Buffer Delay Control ; Location assigned by ; Output Enable Source ; Output Enable Group ;
 +-------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+
-; HEX0[0]     ; AB13  ; 3B       ; 20           ; 0            ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX0[1]     ; E6    ; 8A       ; 4            ; 81           ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX0[2]     ; W16   ; 4A       ; 52           ; 0            ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX0[3]     ; AA16  ; 4A       ; 56           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX0[4]     ; AB17  ; 4A       ; 56           ; 0            ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX0[5]     ; J14   ; 8A       ; 32           ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX0[6]     ; AE16  ; 4A       ; 52           ; 0            ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX1[0]     ; AJ7   ; 3B       ; 26           ; 0            ; 91           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX1[1]     ; AB28  ; 5B       ; 89           ; 21           ; 37           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX1[2]     ; V16   ; 4A       ; 52           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX1[3]     ; G11   ; 8A       ; 10           ; 81           ; 57           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX1[4]     ; AG8   ; 3A       ; 8            ; 0            ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX1[5]     ; AB30  ; 5B       ; 89           ; 21           ; 3            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX1[6]     ; AJ9   ; 3B       ; 30           ; 0            ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX2[0]     ; AD11  ; 3A       ; 2            ; 0            ; 40           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX2[1]     ; AE17  ; 4A       ; 50           ; 0            ; 40           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX2[2]     ; E12   ; 8A       ; 22           ; 81           ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX2[3]     ; H7    ; 8A       ; 16           ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX2[4]     ; AC29  ; 5B       ; 89           ; 20           ; 94           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX2[5]     ; Y17   ; 4A       ; 68           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX2[6]     ; AC28  ; 5B       ; 89           ; 20           ; 77           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX3[0]     ; AG27  ; 5A       ; 89           ; 4            ; 77           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX3[1]     ; AF13  ; 3B       ; 22           ; 0            ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX3[2]     ; AD20  ; 4A       ; 82           ; 0            ; 40           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX3[3]     ; AK11  ; 3B       ; 34           ; 0            ; 57           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX3[4]     ; AK8   ; 3B       ; 28           ; 0            ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX3[5]     ; AJ10  ; 3B       ; 34           ; 0            ; 91           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; HEX3[6]     ; AA30  ; 5B       ; 89           ; 21           ; 20           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; LEDR[0]     ; H8    ; 8A       ; 24           ; 81           ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; LEDR[1]     ; G7    ; 8A       ; 2            ; 81           ; 74           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; LEDR[2]     ; A8    ; 8A       ; 34           ; 81           ; 91           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; LEDR[3]     ; AH23  ; 4A       ; 70           ; 0            ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; LEDR[4]     ; AD29  ; 5B       ; 89           ; 23           ; 54           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; LEDR[5]     ; AA21  ; 4A       ; 88           ; 0            ; 1            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; LEDR[6]     ; AG1   ; 3A       ; 10           ; 0            ; 40           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; LEDR[7]     ; AK16  ; 4A       ; 54           ; 0            ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; LEDR[8]     ; Y21   ; 5A       ; 89           ; 6            ; 20           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; LEDR[9]     ; A5    ; 8A       ; 26           ; 81           ; 91           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_BLANK_N ; AF15  ; 3B       ; 32           ; 0            ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_B[0]    ; AB15  ; 3B       ; 28           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_B[1]    ; D4    ; 8A       ; 10           ; 81           ; 91           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_B[2]    ; AF9   ; 3A       ; 8            ; 0            ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_B[3]    ; D5    ; 8A       ; 20           ; 81           ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_B[4]    ; AH30  ; 5A       ; 89           ; 16           ; 37           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_B[5]    ; AE13  ; 3B       ; 22           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_B[6]    ; E4    ; 8A       ; 10           ; 81           ; 74           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_B[7]    ; E2    ; 8A       ; 8            ; 81           ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_CLK     ; AF16  ; 4A       ; 52           ; 0            ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_G[0]    ; Y18   ; 4A       ; 72           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_G[1]    ; AH17  ; 4A       ; 56           ; 0            ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_G[2]    ; AE18  ; 4A       ; 66           ; 0            ; 40           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_G[3]    ; C7    ; 8A       ; 32           ; 81           ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_G[4]    ; Y24   ; 5A       ; 89           ; 13           ; 20           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_G[5]    ; AK9   ; 3B       ; 30           ; 0            ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_G[6]    ; H14   ; 8A       ; 28           ; 81           ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_G[7]    ; AH22  ; 4A       ; 66           ; 0            ; 91           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_HS      ; AK12  ; 3B       ; 36           ; 0            ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_R[0]    ; AH14  ; 3B       ; 30           ; 0            ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_R[1]    ; AB12  ; 3A       ; 12           ; 0            ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_R[2]    ; AH13  ; 3B       ; 30           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_R[3]    ; AG6   ; 3A       ; 12           ; 0            ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_R[4]    ; AJ4   ; 3B       ; 22           ; 0            ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_R[5]    ; AJ1   ; 3A       ; 14           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_R[6]    ; AK6   ; 3B       ; 24           ; 0            ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_R[7]    ; AA13  ; 3B       ; 20           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
-; VGA_VS      ; AF14  ; 3B       ; 32           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; Fitter               ; -                    ; -                   ;
+; HEX0[0]     ; AE26  ; 5A       ; 89           ; 8            ; 37           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX0[1]     ; AE27  ; 5A       ; 89           ; 11           ; 77           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX0[2]     ; AE28  ; 5A       ; 89           ; 11           ; 94           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX0[3]     ; AG27  ; 5A       ; 89           ; 4            ; 77           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX0[4]     ; AF28  ; 5A       ; 89           ; 13           ; 54           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX0[5]     ; AG28  ; 5A       ; 89           ; 13           ; 37           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX0[6]     ; AH28  ; 5A       ; 89           ; 4            ; 94           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX1[0]     ; AJ29  ; 5A       ; 89           ; 6            ; 37           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX1[1]     ; AH29  ; 5A       ; 89           ; 6            ; 54           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX1[2]     ; AH30  ; 5A       ; 89           ; 16           ; 37           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX1[3]     ; AG30  ; 5A       ; 89           ; 16           ; 54           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX1[4]     ; AF29  ; 5A       ; 89           ; 15           ; 37           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX1[5]     ; AF30  ; 5A       ; 89           ; 15           ; 54           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX1[6]     ; AD27  ; 5A       ; 89           ; 8            ; 54           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX2[0]     ; AB23  ; 5A       ; 89           ; 9            ; 20           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX2[1]     ; AE29  ; 5B       ; 89           ; 23           ; 37           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX2[2]     ; AD29  ; 5B       ; 89           ; 23           ; 54           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX2[3]     ; AC28  ; 5B       ; 89           ; 20           ; 77           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX2[4]     ; AD30  ; 5B       ; 89           ; 25           ; 37           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX2[5]     ; AC29  ; 5B       ; 89           ; 20           ; 94           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX2[6]     ; AC30  ; 5B       ; 89           ; 25           ; 54           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX3[0]     ; AD26  ; 5A       ; 89           ; 16           ; 3            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX3[1]     ; AC27  ; 5A       ; 89           ; 16           ; 20           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX3[2]     ; AD25  ; 5A       ; 89           ; 4            ; 43           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX3[3]     ; AC25  ; 5A       ; 89           ; 4            ; 60           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX3[4]     ; AB28  ; 5B       ; 89           ; 21           ; 37           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX3[5]     ; AB25  ; 5A       ; 89           ; 11           ; 60           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; HEX3[6]     ; AB22  ; 5A       ; 89           ; 9            ; 3            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; LEDR[0]     ; V16   ; 4A       ; 52           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; LEDR[1]     ; W16   ; 4A       ; 52           ; 0            ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; LEDR[2]     ; V17   ; 4A       ; 60           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; LEDR[3]     ; V18   ; 4A       ; 80           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; LEDR[4]     ; W17   ; 4A       ; 60           ; 0            ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; LEDR[5]     ; W19   ; 4A       ; 80           ; 0            ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; LEDR[6]     ; Y19   ; 4A       ; 84           ; 0            ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; LEDR[7]     ; W20   ; 5A       ; 89           ; 6            ; 3            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; LEDR[8]     ; W21   ; 5A       ; 89           ; 8            ; 3            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; LEDR[9]     ; Y21   ; 5A       ; 89           ; 6            ; 20           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_BLANK_N ; F10   ; 8A       ; 6            ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_B[0]    ; B13   ; 8A       ; 40           ; 81           ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_B[1]    ; G13   ; 8A       ; 28           ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_B[2]    ; H13   ; 8A       ; 20           ; 81           ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_B[3]    ; F14   ; 8A       ; 36           ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_B[4]    ; H14   ; 8A       ; 28           ; 81           ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_B[5]    ; F15   ; 8A       ; 36           ; 81           ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_B[6]    ; G15   ; 8A       ; 40           ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_B[7]    ; J14   ; 8A       ; 32           ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_CLK     ; A11   ; 8A       ; 38           ; 81           ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_G[0]    ; J9    ; 8A       ; 4            ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_G[1]    ; J10   ; 8A       ; 4            ; 81           ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_G[2]    ; H12   ; 8A       ; 20           ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_G[3]    ; G10   ; 8A       ; 6            ; 81           ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_G[4]    ; G11   ; 8A       ; 10           ; 81           ; 57           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_G[5]    ; G12   ; 8A       ; 10           ; 81           ; 40           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_G[6]    ; F11   ; 8A       ; 18           ; 81           ; 40           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_G[7]    ; E11   ; 8A       ; 18           ; 81           ; 57           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_HS      ; B11   ; 8A       ; 36           ; 81           ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_R[0]    ; A13   ; 8A       ; 40           ; 81           ; 51           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_R[1]    ; C13   ; 8A       ; 38           ; 81           ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_R[2]    ; E13   ; 8A       ; 26           ; 81           ; 57           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_R[3]    ; B12   ; 8A       ; 38           ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_R[4]    ; C12   ; 8A       ; 36           ; 81           ; 34           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_R[5]    ; D12   ; 8A       ; 22           ; 81           ; 17           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_R[6]    ; E12   ; 8A       ; 22           ; 81           ; 0            ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_R[7]    ; F13   ; 8A       ; 26           ; 81           ; 40           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
+; VGA_VS      ; D11   ; 8A       ; 34           ; 81           ; 40           ; no              ; no                     ; 1         ; no              ; no         ; no            ; no       ; Off          ; 2.5 V        ; Default          ; Series 50 Ohm without Calibration ; --                        ; no                         ; no                          ; 0                   ; Off                         ; User                 ; -                    ; -                   ;
 +-------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+
 
 
@@ -830,17 +1031,17 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; B2L      ; 0 / 0 ( -- )     ; --            ; --           ; --            ;
 ; B1L      ; 0 / 0 ( -- )     ; --            ; --           ; --            ;
 ; 3A       ; 10 / 32 ( 31 % ) ; 2.5V          ; --           ; 2.5V          ;
-; 3B       ; 27 / 48 ( 56 % ) ; 2.5V          ; --           ; 2.5V          ;
-; 4A       ; 16 / 80 ( 20 % ) ; 2.5V          ; --           ; 2.5V          ;
-; 5A       ; 4 / 32 ( 13 % )  ; 2.5V          ; --           ; 2.5V          ;
-; 5B       ; 9 / 16 ( 56 % )  ; 2.5V          ; --           ; 2.5V          ;
+; 3B       ; 5 / 48 ( 10 % )  ; 2.5V          ; --           ; 2.5V          ;
+; 4A       ; 7 / 80 ( 9 % )   ; 2.5V          ; --           ; 2.5V          ;
+; 5A       ; 24 / 32 ( 75 % ) ; 2.5V          ; --           ; 2.5V          ;
+; 5B       ; 7 / 16 ( 44 % )  ; 2.5V          ; --           ; 2.5V          ;
 ; 6B       ; 0 / 44 ( 0 % )   ; 2.5V          ; --           ; 2.5V          ;
 ; 6A       ; 0 / 56 ( 0 % )   ; 2.5V          ; --           ; 2.5V          ;
 ; 7A       ; 0 / 19 ( 0 % )   ; 2.5V          ; --           ; 2.5V          ;
 ; 7B       ; 0 / 22 ( 0 % )   ; 2.5V          ; --           ; 2.5V          ;
 ; 7C       ; 0 / 12 ( 0 % )   ; 2.5V          ; --           ; 2.5V          ;
 ; 7D       ; 0 / 14 ( 0 % )   ; 2.5V          ; --           ; 2.5V          ;
-; 8A       ; 15 / 80 ( 19 % ) ; 2.5V          ; --           ; 2.5V          ;
+; 8A       ; 28 / 80 ( 35 % ) ; 2.5V          ; --           ; 2.5V          ;
 +----------+------------------+---------------+--------------+---------------+
 
 
@@ -852,15 +1053,15 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; A2       ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; A3       ; 493        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; A4       ; 491        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; A5       ; 489        ; 8A             ; LEDR[9]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; A5       ; 489        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; A6       ; 487        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; A7       ;            ; 8A             ; VCCIO8A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; A8       ; 473        ; 8A             ; LEDR[2]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; A8       ; 473        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; A9       ; 471        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; A10      ; 465        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; A11      ; 463        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; A11      ; 463        ; 8A             ; VGA_CLK                         ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; A12      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; A13      ; 461        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; A13      ; 461        ; 8A             ; VGA_R[0]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; A14      ; 455        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; A15      ; 447        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; A16      ; 439        ; 7C             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -889,15 +1090,15 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AA10     ;            ; 3A             ; VCCPD3A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AA11     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AA12     ; 74         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AA13     ; 90         ; 3B             ; VGA_R[7]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AA14     ; 122        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AA15     ; 120        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AA16     ; 146        ; 4A             ; HEX0[3]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AA13     ; 90         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AA14     ; 122        ; 3B             ; KEY[0]                          ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; AA15     ; 120        ; 3B             ; KEY[1]                          ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; AA16     ; 146        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AA17     ;            ; 4A             ; VCCIO4A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AA18     ; 168        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AA19     ; 176        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AA20     ; 200        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AA21     ; 210        ; 4A             ; LEDR[5]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AA21     ; 210        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AA22     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AA23     ;            ; --             ; VCCPGM                          ; power  ;              ; 1.8V/2.5V/3.0V/3.3V ; --           ;                 ; --       ; --           ;
 ; AA24     ; 228        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
@@ -906,7 +1107,7 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AA27     ;            ; 5B             ; VCCIO5B                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AA28     ; 251        ; 5B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; AA29     ;            ; 5B             ; VREFB5BN0                       ; power  ;              ;                     ; --           ;                 ; --       ; --           ;
-; AA30     ; 250        ; 5B             ; HEX3[6]                         ; output ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
+; AA30     ; 250        ; 5B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; AB1      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AB2      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AB3      ;            ;                ; DNU                             ;        ;              ;                     ; --           ;                 ; --       ; --           ;
@@ -918,25 +1119,25 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AB9      ; 42         ; 3A             ; #TDO                            ; output ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AB10     ;            ; --             ; VCCPGM                          ; power  ;              ; 1.8V/2.5V/3.0V/3.3V ; --           ;                 ; --       ; --           ;
 ; AB11     ;            ; --             ; VCC_AUX                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AB12     ; 72         ; 3A             ; VGA_R[1]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AB13     ; 88         ; 3B             ; HEX0[0]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AB12     ; 72         ; 3A             ; SW[0]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; AB13     ; 88         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AB14     ;            ; 3B             ; VCCIO3B                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AB15     ; 106        ; 3B             ; VGA_B[0]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AB15     ; 106        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AB16     ;            ; --             ; VCC_AUX                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AB17     ; 144        ; 4A             ; HEX0[4]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AB17     ; 144        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AB18     ;            ; 3B, 4A         ; VCCPD3B4A                       ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AB19     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AB20     ;            ; 3B, 4A         ; VCCPD3B4A                       ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AB21     ; 208        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AB22     ; 225        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AB23     ; 227        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AB22     ; 225        ; 5A             ; HEX3[6]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AB23     ; 227        ; 5A             ; HEX2[0]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AB24     ;            ; 5A             ; VCCIO5A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AB25     ; 230        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AB25     ; 230        ; 5A             ; HEX3[5]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AB26     ; 226        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AB27     ; 254        ; 5B             ; CLOCK_50                        ; input  ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
-; AB28     ; 249        ; 5B             ; HEX1[1]                         ; output ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
+; AB27     ; 254        ; 5B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AB28     ; 249        ; 5B             ; HEX3[4]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AB29     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AB30     ; 248        ; 5B             ; HEX1[5]                         ; output ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
+; AB30     ; 248        ; 5B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; AC1      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AC2      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AC3      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
@@ -945,10 +1146,10 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AC6      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AC7      ; 45         ; 3A             ; ^AS_DATA3, DATA3                ;        ;              ;                     ; Weak Pull Up ;                 ; --       ; On           ;
 ; AC8      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AC9      ; 58         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AC9      ; 58         ; 3A             ; SW[7]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; AC10     ;            ; 3A             ; VCCPD3A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AC11     ;            ; 3A             ; VCCIO3A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AC12     ; 82         ; 3A             ; SW[1]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AC12     ; 82         ; 3A             ; SW[1]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; AC13     ;            ; 3B, 4A         ; VCCPD3B4A                       ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AC14     ; 104        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AC15     ;            ; 3B, 4A         ; VCCPD3B4A                       ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
@@ -961,12 +1162,12 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AC22     ; 207        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AC23     ; 205        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AC24     ;            ; 5A             ; VREFB5AN0                       ; power  ;              ;                     ; --           ;                 ; --       ; --           ;
-; AC25     ; 215        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AC25     ; 215        ; 5A             ; HEX3[3]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AC26     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AC27     ; 242        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AC28     ; 245        ; 5B             ; HEX2[6]                         ; output ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
-; AC29     ; 247        ; 5B             ; HEX2[4]                         ; output ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
-; AC30     ; 259        ; 5B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AC27     ; 242        ; 5A             ; HEX3[1]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AC28     ; 245        ; 5B             ; HEX2[3]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AC29     ; 247        ; 5B             ; HEX2[5]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AC30     ; 259        ; 5B             ; HEX2[6]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AD1      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AD2      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AD3      ;            ;                ; DNU                             ;        ;              ;                     ; --           ;                 ; --       ; --           ;
@@ -976,9 +1177,9 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AD7      ; 62         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AD8      ;            ; 3A             ; VCCIO3A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AD9      ; 55         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AD10     ; 56         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AD11     ; 54         ; 3A             ; HEX2[0]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AD12     ; 80         ; 3A             ; SW[5]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AD10     ; 56         ; 3A             ; SW[8]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; AD11     ; 54         ; 3A             ; SW[4]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; AD12     ; 80         ; 3A             ; SW[5]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; AD13     ;            ; 3B             ; VCCIO3B                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AD14     ; 98         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AD15     ;            ;                ; DNU                             ;        ;              ;                     ; --           ;                 ; --       ; --           ;
@@ -986,17 +1187,17 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AD17     ; 160        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AD18     ;            ; 4A             ; VCCIO4A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AD19     ; 184        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AD20     ; 199        ; 4A             ; HEX3[2]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AD20     ; 199        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AD21     ; 197        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AD22     ;            ; --             ; VCC_AUX                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AD23     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AD24     ; 211        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AD25     ; 213        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AD26     ; 240        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AD27     ; 222        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AD25     ; 213        ; 5A             ; HEX3[2]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AD26     ; 240        ; 5A             ; HEX3[0]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AD27     ; 222        ; 5A             ; HEX1[6]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AD28     ;            ; 5A             ; VCCIO5A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AD29     ; 255        ; 5B             ; LEDR[4]                         ; output ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
-; AD30     ; 257        ; 5B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AD29     ; 255        ; 5B             ; HEX2[2]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AD30     ; 257        ; 5B             ; HEX2[4]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AE1      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AE2      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AE3      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
@@ -1007,14 +1208,14 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AE8      ; 47         ; 3A             ; ^AS_DATA2, DATA2                ;        ;              ;                     ; Weak Pull Up ;                 ; --       ; On           ;
 ; AE9      ; 53         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AE10     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AE11     ; 59         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AE12     ; 52         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AE13     ; 95         ; 3B             ; VGA_B[5]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AE11     ; 59         ; 3A             ; SW[6]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; AE12     ; 52         ; 3A             ; SW[9]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; AE13     ; 95         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AE14     ; 96         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AE15     ;            ; 3B             ; VCCIO3B                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AE16     ; 139        ; 4A             ; HEX0[6]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AE17     ; 135        ; 4A             ; HEX2[1]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AE18     ; 167        ; 4A             ; VGA_G[2]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AE16     ; 139        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AE17     ; 135        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AE18     ; 167        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AE19     ; 165        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AE20     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AE21     ;            ; 3B, 4A         ; VCCPD3B4A                       ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
@@ -1022,10 +1223,10 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AE23     ; 189        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AE24     ; 209        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AE25     ;            ; 4A             ; VCCIO4A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AE26     ; 220        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AE27     ; 229        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AE28     ; 231        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AE29     ; 253        ; 5B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AE26     ; 220        ; 5A             ; HEX0[0]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AE27     ; 229        ; 5A             ; HEX0[1]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AE28     ; 231        ; 5A             ; HEX0[2]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AE29     ; 253        ; 5B             ; HEX2[1]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AE30     ;            ; 5B             ; VCCIO5B                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AF1      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AF2      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
@@ -1035,14 +1236,14 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AF6      ; 75         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AF7      ;            ; 3A             ; VCCIO3A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AF8      ; 70         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AF9      ; 67         ; 3A             ; VGA_B[2]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AF10     ; 57         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AF9      ; 67         ; 3A             ; SW[2]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; AF10     ; 57         ; 3A             ; SW[3]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; AF11     ; 87         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AF12     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AF13     ; 93         ; 3B             ; HEX3[1]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AF14     ; 114        ; 3B             ; VGA_VS                          ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AF15     ; 112        ; 3B             ; VGA_BLANK_N                     ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AF16     ; 137        ; 4A             ; VGA_CLK                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AF13     ; 93         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AF14     ; 114        ; 3B             ; CLOCK_50                        ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; AF15     ; 112        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AF16     ; 137        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AF17     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AF18     ; 133        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AF19     ; 159        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -1054,21 +1255,21 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AF25     ; 206        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AF26     ; 204        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AF27     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AF28     ; 235        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AF29     ; 237        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AF30     ; 239        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AG1      ; 71         ; 3A             ; LEDR[6]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AF28     ; 235        ; 5A             ; HEX0[4]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AF29     ; 237        ; 5A             ; HEX1[4]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AF30     ; 239        ; 5A             ; HEX1[5]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AG1      ; 71         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AG2      ; 83         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AG3      ; 63         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AG4      ;            ; 3A             ; VCCIO3A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AG5      ; 78         ; 3A             ; KEY[0]                          ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AG6      ; 73         ; 3A             ; VGA_R[3]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AG5      ; 78         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AG6      ; 73         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AG7      ; 68         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AG8      ; 65         ; 3A             ; HEX1[4]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AG8      ; 65         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AG9      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AG10     ; 86         ; 3B             ; SW[2]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AG10     ; 86         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AG11     ; 85         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AG12     ; 103        ; 3B             ; SW[0]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AG12     ; 103        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AG13     ; 101        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AG14     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AG15     ; 127        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -1083,10 +1284,10 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AG24     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AG25     ; 190        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AG26     ; 203        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AG27     ; 212        ; 5A             ; HEX3[0]                         ; output ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
-; AG28     ; 233        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AG27     ; 212        ; 5A             ; HEX0[3]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AG28     ; 233        ; 5A             ; HEX0[5]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AG29     ;            ; 5A             ; VCCIO5A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AG30     ; 243        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AG30     ; 243        ; 5A             ; HEX1[3]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AH1      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AH2      ; 69         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH3      ; 81         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -1094,39 +1295,39 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AH5      ; 76         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH6      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AH7      ; 115        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AH8      ; 113        ; 3B             ; SW[9]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AH9      ; 84         ; 3B             ; KEY[1]                          ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AH8      ; 113        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AH9      ; 84         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH10     ; 118        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH11     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AH12     ; 126        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AH13     ; 111        ; 3B             ; VGA_R[2]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AH14     ; 109        ; 3B             ; VGA_R[0]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AH13     ; 111        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AH14     ; 109        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH15     ; 125        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH16     ;            ; 4A             ; VCCIO4A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AH17     ; 147        ; 4A             ; VGA_G[1]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AH17     ; 147        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH18     ; 145        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH19     ; 148        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH20     ; 141        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH21     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AH22     ; 164        ; 4A             ; VGA_G[7]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AH23     ; 174        ; 4A             ; LEDR[3]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AH22     ; 164        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AH23     ; 174        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH24     ; 161        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH25     ; 188        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AH26     ;            ; 4A             ; VCCIO4A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; AH27     ; 201        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AH28     ; 214        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AH29     ; 218        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; AH30     ; 241        ; 5A             ; VGA_B[4]                        ; output ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
-; AJ1      ; 79         ; 3A             ; VGA_R[5]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AH28     ; 214        ; 5A             ; HEX0[6]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AH29     ; 218        ; 5A             ; HEX1[1]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AH30     ; 241        ; 5A             ; HEX1[2]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; AJ1      ; 79         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AJ2      ; 77         ; 3A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AJ3      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AJ4      ; 94         ; 3B             ; VGA_R[4]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AJ5      ; 99         ; 3B             ; SW[3]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AJ4      ; 94         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AJ5      ; 99         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AJ6      ; 102        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; AJ7      ; 100        ; 3B             ; HEX1[0]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AJ7      ; 100        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AJ8      ;            ; 3B             ; VCCIO3B                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AJ9      ; 110        ; 3B             ; HEX1[6]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AJ10     ; 116        ; 3B             ; HEX3[5]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AJ9      ; 110        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AJ10     ; 116        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AJ11     ; 119        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AJ12     ; 124        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AJ13     ;            ; 3B             ; VCCIO3B                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
@@ -1145,23 +1346,23 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; AJ26     ; 187        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AJ27     ; 195        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AJ28     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AJ29     ; 216        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; AJ29     ; 216        ; 5A             ; HEX1[0]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; AJ30     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AK2      ; 91         ; 3B             ; SW[7]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AK3      ; 89         ; 3B             ; SW[4]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AK4      ; 92         ; 3B             ; SW[6]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AK2      ; 91         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AK3      ; 89         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AK4      ; 92         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AK5      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AK6      ; 97         ; 3B             ; VGA_R[6]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AK7      ; 107        ; 3B             ; SW[8]                           ; input  ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AK8      ; 105        ; 3B             ; HEX3[4]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AK9      ; 108        ; 3B             ; VGA_G[5]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AK6      ; 97         ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AK7      ; 107        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AK8      ; 105        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AK9      ; 108        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AK10     ;            ; 3B             ; VCCIO3B                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; AK11     ; 117        ; 3B             ; HEX3[3]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; AK12     ; 123        ; 3B             ; VGA_HS                          ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AK11     ; 117        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; AK12     ; 123        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AK13     ; 121        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AK14     ; 129        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AK15     ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; AK16     ; 140        ; 4A             ; LEDR[7]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; AK16     ; 140        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AK17     ;            ; 4A             ; VREFB4AN0                       ; power  ;              ;                     ; --           ;                 ; --       ; --           ;
 ; AK18     ; 149        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; AK19     ; 153        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -1185,9 +1386,9 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; B8       ; 481        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; B9       ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; B10      ;            ; 8A             ; VREFB8AN0                       ; power  ;              ;                     ; --           ;                 ; --       ; --           ;
-; B11      ; 469        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; B12      ; 464        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; B13      ; 459        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; B11      ; 469        ; 8A             ; VGA_HS                          ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; B12      ; 464        ; 8A             ; VGA_R[3]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; B13      ; 459        ; 8A             ; VGA_B[0]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; B14      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; B15      ; 451        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; B16      ; 441        ; 7C             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -1211,13 +1412,13 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; C4       ; 501        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; C5       ; 497        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; C6       ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; C7       ; 475        ; 8A             ; VGA_G[3]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; C7       ; 475        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; C8       ; 479        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; C9       ; 485        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; C10      ; 483        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; C11      ;            ; 8A             ; VCCIO8A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; C12      ; 467        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; C13      ; 462        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; C12      ; 467        ; 8A             ; VGA_R[4]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; C13      ; 462        ; 8A             ; VGA_R[1]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; C14      ; 448        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; C15      ; 453        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; C16      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
@@ -1238,15 +1439,15 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; D1       ; 529        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; D2       ; 515        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; D3       ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; D4       ; 521        ; 8A             ; VGA_B[1]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; D5       ; 499        ; 8A             ; VGA_B[3]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; D4       ; 521        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; D5       ; 499        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; D6       ; 495        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; D7       ; 505        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; D8       ;            ; 8A             ; VCCIO8A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; D9       ; 480        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; D10      ; 472        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; D11      ; 470        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; D12      ; 496        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; D11      ; 470        ; 8A             ; VGA_VS                          ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; D12      ; 496        ; 8A             ; VGA_R[5]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; D13      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; D14      ; 446        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; D15      ; 449        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -1266,18 +1467,18 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; D29      ; 361        ; 6A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; D30      ; 359        ; 6A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; E1       ; 527        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; E2       ; 525        ; 8A             ; VGA_B[7]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; E2       ; 525        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; E3       ; 523        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; E4       ; 519        ; 8A             ; VGA_B[6]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; E4       ; 519        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; E5       ;            ; 8A             ; VCCIO8A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; E6       ; 533        ; 8A             ; HEX0[1]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; E6       ; 533        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; E7       ; 531        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; E8       ; 503        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; E9       ; 478        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; E10      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; E11      ; 504        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; E12      ; 494        ; 8A             ; HEX2[2]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; E13      ; 488        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; E11      ; 504        ; 8A             ; VGA_G[7]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; E12      ; 494        ; 8A             ; VGA_R[6]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; E13      ; 488        ; 8A             ; VGA_R[2]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; E14      ; 454        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; E15      ;            ; 7D             ; VCCIO7D_HPS                     ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; E16      ; 443        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -1304,12 +1505,12 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; F7       ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; F8       ; 536        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; F9       ; 534        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; F10      ; 528        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; F11      ; 502        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; F10      ; 528        ; 8A             ; VGA_BLANK_N                     ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; F11      ; 502        ; 8A             ; VGA_G[6]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; F12      ;            ; 8A             ; VCCIO8A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; F13      ; 486        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; F14      ; 468        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; F15      ; 466        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; F13      ; 486        ; 8A             ; VGA_R[7]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; F14      ; 468        ; 8A             ; VGA_B[3]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; F15      ; 466        ; 8A             ; VGA_B[5]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; F16      ; 442        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; F17      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; F18      ; 430        ; 7C             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -1331,15 +1532,15 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; G4       ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; G5       ; 542        ; 9A             ; ^nCE                            ;        ;              ;                     ; --           ;                 ; --       ; --           ;
 ; G6       ; 543        ; 9A             ; ^MSEL2                          ;        ;              ;                     ; --           ;                 ; --       ; --           ;
-; G7       ; 535        ; 8A             ; LEDR[1]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; G7       ; 535        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; G8       ; 492        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; G9       ;            ; 8A             ; VCCIO8A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; G10      ; 526        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; G11      ; 520        ; 8A             ; HEX1[3]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; G12      ; 518        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; G13      ; 484        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; G10      ; 526        ; 8A             ; VGA_G[3]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; G11      ; 520        ; 8A             ; VGA_G[4]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; G12      ; 518        ; 8A             ; VGA_G[5]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; G13      ; 484        ; 8A             ; VGA_B[1]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; G14      ;            ; 8A             ; VCCIO8A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; G15      ; 460        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; G15      ; 460        ; 8A             ; VGA_B[6]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; G16      ; 444        ; 7D             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; G17      ; 436        ; 7C             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; G18      ; 432        ; 7C             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -1361,14 +1562,14 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; H4       ;            ;                ; DNU                             ;        ;              ;                     ; --           ;                 ; --       ; --           ;
 ; H5       ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; H6       ;            ; 8A             ; VCCIO8A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; H7       ; 508        ; 8A             ; HEX2[3]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; H8       ; 490        ; 8A             ; LEDR[0]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; H7       ; 508        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; H8       ; 490        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; H9       ;            ; --             ; VCCBAT                          ; power  ;              ; 1.2V                ; --           ;                 ; --       ; --           ;
 ; H10      ;            ; --             ; VCC_AUX                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; H11      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; H12      ; 500        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; H13      ; 498        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; H14      ; 482        ; 8A             ; VGA_G[6]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; H12      ; 500        ; 8A             ; VGA_G[2]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; H13      ; 498        ; 8A             ; VGA_B[2]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; H14      ; 482        ; 8A             ; VGA_B[4]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; H15      ; 458        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; H16      ;            ; 7D             ; VCCIO7D_HPS                     ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; H17      ; 434        ; 7C             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
@@ -1393,12 +1594,12 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; J6       ; 547        ; 9A             ; ^GND                            ;        ;              ;                     ; --           ;                 ; --       ; --           ;
 ; J7       ; 506        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; J8       ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; J9       ; 532        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; J10      ; 530        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; J9       ; 532        ; 8A             ; VGA_G[0]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; J10      ; 530        ; 8A             ; VGA_G[1]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; J11      ;            ; --             ; VCCPGM                          ; power  ;              ; 1.8V/2.5V/3.0V/3.3V ; --           ;                 ; --       ; --           ;
 ; J12      ; 516        ; 8A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
 ; J13      ;            ; 8A             ; VCCIO8A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
-; J14      ; 476        ; 8A             ; HEX0[5]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
+; J14      ; 476        ; 8A             ; VGA_B[7]                        ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; J15      ;            ;                ; DNU                             ;        ;              ;                     ; --           ;                 ; --       ; --           ;
 ; J16      ;            ; --             ; VCC_AUX                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; J17      ;            ; 7C             ; VCCPD7C_HPS                     ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
@@ -1670,9 +1871,9 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; V13      ;            ; --             ; VCC                             ; power  ;              ; 1.1V                ; --           ;                 ; --       ; --           ;
 ; V14      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; V15      ;            ; --             ; VCC                             ; power  ;              ; 1.1V                ; --           ;                 ; --       ; --           ;
-; V16      ; 138        ; 4A             ; HEX1[2]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; V17      ; 154        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; V18      ; 194        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; V16      ; 138        ; 4A             ; LEDR[0]                         ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; V17      ; 154        ; 4A             ; LEDR[2]                         ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; V18      ; 194        ; 4A             ; LEDR[3]                         ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; V19      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; V20      ; 292        ; 6B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; V21      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
@@ -1699,13 +1900,13 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; W12      ;            ; --             ; VCC                             ; power  ;              ; 1.1V                ; --           ;                 ; --       ; --           ;
 ; W13      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; W14      ;            ; --             ; VCC                             ; power  ;              ; 1.1V                ; --           ;                 ; --       ; --           ;
-; W15      ; 130        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; W16      ; 136        ; 4A             ; HEX0[2]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; W17      ; 152        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; W15      ; 130        ; 3B             ; KEY[2]                          ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; W16      ; 136        ; 4A             ; LEDR[1]                         ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; W17      ; 152        ; 4A             ; LEDR[4]                         ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; W18      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; W19      ; 192        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; W20      ; 217        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; W21      ; 221        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; W19      ; 192        ; 4A             ; LEDR[5]                         ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; W20      ; 217        ; 5A             ; LEDR[7]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
+; W21      ; 221        ; 5A             ; LEDR[8]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; W22      ; 223        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; W23      ;            ; 5A             ; VCCIO5A                         ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; W24      ; 238        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
@@ -1730,18 +1931,18 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; Y13      ;            ; --             ; VCC                             ; power  ;              ; 1.1V                ; --           ;                 ; --       ; --           ;
 ; Y14      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
 ; Y15      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; Y16      ; 128        ; 3B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
-; Y17      ; 170        ; 4A             ; HEX2[5]                         ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; Y18      ; 178        ; 4A             ; VGA_G[0]                        ; output ; 2.5 V        ;                     ; Column I/O   ; N               ; no       ; Off          ;
-; Y19      ; 202        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; Y16      ; 128        ; 3B             ; KEY[3]                          ; input  ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
+; Y17      ; 170        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; Y18      ; 178        ; 4A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Column I/O   ;                 ; no       ; On           ;
+; Y19      ; 202        ; 4A             ; LEDR[6]                         ; output ; 2.5 V        ;                     ; Column I/O   ; Y               ; no       ; Off          ;
 ; Y20      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; Y21      ; 219        ; 5A             ; LEDR[8]                         ; output ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
+; Y21      ; 219        ; 5A             ; LEDR[9]                         ; output ; 2.5 V        ;                     ; Row I/O      ; Y               ; no       ; Off          ;
 ; Y22      ;            ; --             ; VCCA_FPLL                       ; power  ;              ; 2.5V                ; --           ;                 ; --       ; --           ;
 ; Y23      ; 232        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
-; Y24      ; 234        ; 5A             ; VGA_G[4]                        ; output ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
+; Y24      ; 234        ; 5A             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; Y25      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
-; Y26      ; 256        ; 5B             ; KEY[3]                          ; input  ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
-; Y27      ; 258        ; 5B             ; KEY[2]                          ; input  ; 2.5 V        ;                     ; Row I/O      ; N               ; no       ; Off          ;
+; Y26      ; 256        ; 5B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
+; Y27      ; 258        ; 5B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; Y28      ; 269        ; 6B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; Y29      ; 263        ; 6B             ; RESERVED_INPUT_WITH_WEAK_PULLUP ;        ;              ;                     ; Row I/O      ;                 ; no       ; On           ;
 ; Y30      ;            ;                ; GND                             ; gnd    ;              ;                     ; --           ;                 ; --       ; --           ;
@@ -1835,87 +2036,6 @@ Note: Pin directions (input, output or bidir) are based on device operating in u
 ; SW[0]       ; Incomplete set of assignments ;
 ; SW[8]       ; Incomplete set of assignments ;
 ; SW[6]       ; Incomplete set of assignments ;
-; KEY[3]      ; Missing location assignment   ;
-; LEDR[0]     ; Missing location assignment   ;
-; LEDR[1]     ; Missing location assignment   ;
-; LEDR[2]     ; Missing location assignment   ;
-; LEDR[3]     ; Missing location assignment   ;
-; LEDR[4]     ; Missing location assignment   ;
-; LEDR[5]     ; Missing location assignment   ;
-; LEDR[6]     ; Missing location assignment   ;
-; LEDR[7]     ; Missing location assignment   ;
-; LEDR[8]     ; Missing location assignment   ;
-; LEDR[9]     ; Missing location assignment   ;
-; HEX0[0]     ; Missing location assignment   ;
-; HEX0[1]     ; Missing location assignment   ;
-; HEX0[2]     ; Missing location assignment   ;
-; HEX0[3]     ; Missing location assignment   ;
-; HEX0[4]     ; Missing location assignment   ;
-; HEX0[5]     ; Missing location assignment   ;
-; HEX0[6]     ; Missing location assignment   ;
-; HEX1[0]     ; Missing location assignment   ;
-; HEX1[1]     ; Missing location assignment   ;
-; HEX1[2]     ; Missing location assignment   ;
-; HEX1[3]     ; Missing location assignment   ;
-; HEX1[4]     ; Missing location assignment   ;
-; HEX1[5]     ; Missing location assignment   ;
-; HEX1[6]     ; Missing location assignment   ;
-; HEX2[0]     ; Missing location assignment   ;
-; HEX2[1]     ; Missing location assignment   ;
-; HEX2[2]     ; Missing location assignment   ;
-; HEX2[3]     ; Missing location assignment   ;
-; HEX2[4]     ; Missing location assignment   ;
-; HEX2[5]     ; Missing location assignment   ;
-; HEX2[6]     ; Missing location assignment   ;
-; HEX3[0]     ; Missing location assignment   ;
-; HEX3[1]     ; Missing location assignment   ;
-; HEX3[2]     ; Missing location assignment   ;
-; HEX3[3]     ; Missing location assignment   ;
-; HEX3[4]     ; Missing location assignment   ;
-; HEX3[5]     ; Missing location assignment   ;
-; HEX3[6]     ; Missing location assignment   ;
-; VGA_R[0]    ; Missing location assignment   ;
-; VGA_R[1]    ; Missing location assignment   ;
-; VGA_R[2]    ; Missing location assignment   ;
-; VGA_R[3]    ; Missing location assignment   ;
-; VGA_R[4]    ; Missing location assignment   ;
-; VGA_R[5]    ; Missing location assignment   ;
-; VGA_R[6]    ; Missing location assignment   ;
-; VGA_R[7]    ; Missing location assignment   ;
-; VGA_G[0]    ; Missing location assignment   ;
-; VGA_G[1]    ; Missing location assignment   ;
-; VGA_G[2]    ; Missing location assignment   ;
-; VGA_G[3]    ; Missing location assignment   ;
-; VGA_G[4]    ; Missing location assignment   ;
-; VGA_G[5]    ; Missing location assignment   ;
-; VGA_G[6]    ; Missing location assignment   ;
-; VGA_G[7]    ; Missing location assignment   ;
-; VGA_B[0]    ; Missing location assignment   ;
-; VGA_B[1]    ; Missing location assignment   ;
-; VGA_B[2]    ; Missing location assignment   ;
-; VGA_B[3]    ; Missing location assignment   ;
-; VGA_B[4]    ; Missing location assignment   ;
-; VGA_B[5]    ; Missing location assignment   ;
-; VGA_B[6]    ; Missing location assignment   ;
-; VGA_B[7]    ; Missing location assignment   ;
-; VGA_HS      ; Missing location assignment   ;
-; VGA_VS      ; Missing location assignment   ;
-; VGA_CLK     ; Missing location assignment   ;
-; VGA_BLANK_N ; Missing location assignment   ;
-; CLOCK_50    ; Missing location assignment   ;
-; KEY[2]      ; Missing location assignment   ;
-; SW[7]       ; Missing location assignment   ;
-; KEY[1]      ; Missing location assignment   ;
-; KEY[0]      ; Missing location assignment   ;
-; SW[2]       ; Missing location assignment   ;
-; SW[9]       ; Missing location assignment   ;
-; SW[1]       ; Missing location assignment   ;
-; SW[4]       ; Missing location assignment   ;
-; SW[3]       ; Missing location assignment   ;
-; SW[5]       ; Missing location assignment   ;
-; SW[0]       ; Missing location assignment   ;
-; SW[8]       ; Missing location assignment   ;
-; SW[6]       ; Missing location assignment   ;
 +-------------+-------------------------------+
 
 
@@ -1924,21 +2044,21 @@ Note: Pin directions (input, output or bidir) are based on device operating in u
 +----------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
 ; Compilation Hierarchy Node                   ; ALMs needed [=A-B+C] ; [A] ALMs used in final placement ; [B] Estimate of ALMs recoverable by dense packing ; [C] Estimate of ALMs unavailable ; ALMs used for memory ; Combinational ALUTs ; Dedicated Logic Registers ; I/O Registers ; Block Memory Bits ; M10Ks ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name                                                                                                               ; Entity Name      ; Library Name ;
 +----------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
-; |de1_soc_wrapper                             ; 2039.5 (14.0)        ; 2258.5 (14.5)                    ; 260.5 (0.5)                                       ; 41.5 (0.0)                       ; 0.0 (0.0)            ; 3176 (29)           ; 1256 (28)                 ; 0 (0)         ; 438272            ; 54    ; 0          ; 81   ; 0            ; |de1_soc_wrapper                                                                                                                  ; de1_soc_wrapper  ; work         ;
-;    |arm_soc:soc_inst|                        ; 1986.2 (0.0)         ; 2205.0 (0.0)                     ; 259.5 (0.0)                                       ; 40.6 (0.0)                       ; 0.0 (0.0)            ; 3087 (0)            ; 1200 (0)                  ; 0 (0)         ; 438272            ; 54    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst                                                                                                 ; arm_soc          ; work         ;
-;       |CORTEXM0DS:m0_1|                      ; 1880.3 (0.0)         ; 2091.9 (0.0)                     ; 252.0 (0.0)                                       ; 40.4 (0.0)                       ; 0.0 (0.0)            ; 2912 (0)            ; 1121 (0)                  ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1                                                                                 ; CORTEXM0DS       ; work         ;
-;          |cortexm0ds_logic:u_logic|          ; 1880.3 (1880.3)      ; 2091.9 (2091.9)                  ; 252.0 (252.0)                                     ; 40.4 (40.4)                      ; 0.0 (0.0)            ; 2912 (2912)         ; 1121 (1121)               ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic                                                        ; cortexm0ds_logic ; work         ;
-;       |ahb_interconnect:interconnect_1|      ; 17.8 (17.8)          ; 23.3 (23.3)                      ; 5.4 (5.4)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 43 (43)             ; 3 (3)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1                                                                 ; ahb_interconnect ; work         ;
-;       |ahb_pixel_memory:pix1|                ; 45.8 (10.9)          ; 45.7 (10.9)                      ; 0.0 (0.0)                                         ; 0.1 (0.0)                        ; 0.0 (0.0)            ; 69 (13)             ; 30 (20)                   ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1                                                                           ; ahb_pixel_memory ; work         ;
-;          |altsyncram:memory_rtl_0|           ; 35.0 (0.0)           ; 34.8 (0.0)                       ; 0.0 (0.0)                                         ; 0.1 (0.0)                        ; 0.0 (0.0)            ; 56 (0)              ; 10 (0)                    ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0                                                   ; altsyncram       ; work         ;
-;             |altsyncram_efn1:auto_generated| ; 35.0 (1.5)           ; 34.8 (1.8)                       ; 0.0 (0.3)                                         ; 0.1 (0.0)                        ; 0.0 (0.0)            ; 56 (0)              ; 10 (10)                   ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated                    ; altsyncram_efn1  ; work         ;
-;                |decode_3na:decode2|          ; 22.0 (22.0)          ; 22.0 (22.0)                      ; 0.0 (0.0)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 45 (45)             ; 0 (0)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2 ; decode_3na       ; work         ;
-;                |mux_chb:mux3|                ; 11.1 (11.1)          ; 11.0 (11.0)                      ; 0.0 (0.0)                                         ; 0.1 (0.1)                        ; 0.0 (0.0)            ; 11 (11)             ; 0 (0)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|mux_chb:mux3       ; mux_chb          ; work         ;
-;       |ahb_ram:ram_1|                        ; 29.6 (29.6)          ; 30.3 (30.3)                      ; 0.8 (0.8)                                         ; 0.1 (0.1)                        ; 0.0 (0.0)            ; 52 (52)             ; 19 (19)                   ; 0 (0)         ; 131072            ; 16    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1                                                                                   ; ahb_ram          ; work         ;
+; |de1_soc_wrapper                             ; 2031.0 (14.0)        ; 2277.5 (14.5)                    ; 282.0 (0.5)                                       ; 35.5 (0.0)                       ; 0.0 (0.0)            ; 3176 (29)           ; 1270 (28)                 ; 0 (0)         ; 438272            ; 54    ; 0          ; 81   ; 0            ; |de1_soc_wrapper                                                                                                                  ; de1_soc_wrapper  ; work         ;
+;    |arm_soc:soc_inst|                        ; 1977.0 (0.0)         ; 2223.5 (0.0)                     ; 280.5 (0.0)                                       ; 34.0 (0.0)                       ; 0.0 (0.0)            ; 3087 (0)            ; 1213 (0)                  ; 0 (0)         ; 438272            ; 54    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst                                                                                                 ; arm_soc          ; work         ;
+;       |CORTEXM0DS:m0_1|                      ; 1869.2 (0.0)         ; 2105.7 (0.0)                     ; 269.2 (0.0)                                       ; 32.7 (0.0)                       ; 0.0 (0.0)            ; 2912 (0)            ; 1133 (0)                  ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1                                                                                 ; CORTEXM0DS       ; work         ;
+;          |cortexm0ds_logic:u_logic|          ; 1869.2 (1869.2)      ; 2105.7 (2105.7)                  ; 269.2 (269.2)                                     ; 32.7 (32.7)                      ; 0.0 (0.0)            ; 2912 (2912)         ; 1133 (1133)               ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic                                                        ; cortexm0ds_logic ; work         ;
+;       |ahb_interconnect:interconnect_1|      ; 19.2 (19.2)          ; 24.3 (24.3)                      ; 5.3 (5.3)                                         ; 0.1 (0.1)                        ; 0.0 (0.0)            ; 43 (43)             ; 3 (3)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1                                                                 ; ahb_interconnect ; work         ;
+;       |ahb_pixel_memory:pix1|                ; 45.2 (11.8)          ; 48.3 (12.3)                      ; 3.2 (0.5)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 69 (13)             ; 27 (21)                   ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1                                                                           ; ahb_pixel_memory ; work         ;
+;          |altsyncram:memory_rtl_0|           ; 33.3 (0.0)           ; 36.0 (0.0)                       ; 2.7 (0.0)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 56 (0)              ; 6 (0)                     ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0                                                   ; altsyncram       ; work         ;
+;             |altsyncram_efn1:auto_generated| ; 33.3 (1.5)           ; 36.0 (2.5)                       ; 2.7 (1.0)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 56 (0)              ; 6 (6)                     ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated                    ; altsyncram_efn1  ; work         ;
+;                |decode_3na:decode2|          ; 22.2 (22.2)          ; 22.5 (22.5)                      ; 0.3 (0.3)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 45 (45)             ; 0 (0)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2 ; decode_3na       ; work         ;
+;                |mux_chb:mux3|                ; 9.7 (9.7)            ; 11.0 (11.0)                      ; 1.3 (1.3)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 11 (11)             ; 0 (0)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|mux_chb:mux3       ; mux_chb          ; work         ;
+;       |ahb_ram:ram_1|                        ; 30.9 (30.9)          ; 31.8 (31.8)                      ; 2.0 (2.0)                                         ; 1.1 (1.1)                        ; 0.0 (0.0)            ; 52 (52)             ; 21 (21)                   ; 0 (0)         ; 131072            ; 16    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1                                                                                   ; ahb_ram          ; work         ;
 ;          |altsyncram:memory_rtl_0|           ; 0.0 (0.0)            ; 0.0 (0.0)                        ; 0.0 (0.0)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 0 (0)               ; 0 (0)                     ; 0 (0)         ; 131072            ; 16    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0                                                           ; altsyncram       ; work         ;
 ;             |altsyncram_nms1:auto_generated| ; 0.0 (0.0)            ; 0.0 (0.0)                        ; 0.0 (0.0)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 0 (0)               ; 0 (0)                     ; 0 (0)         ; 131072            ; 16    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated                            ; altsyncram_nms1  ; work         ;
-;       |ahb_switches:switches_1|              ; 11.7 (11.7)          ; 13.8 (13.8)                      ; 2.2 (2.2)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 11 (11)             ; 27 (27)                   ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_switches:switches_1                                                                         ; ahb_switches     ; work         ;
-;    |razzle:raz_inst|                         ; 39.4 (39.4)          ; 39.0 (39.0)                      ; 0.5 (0.5)                                         ; 0.9 (0.9)                        ; 0.0 (0.0)            ; 60 (60)             ; 28 (28)                   ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|razzle:raz_inst                                                                                                  ; razzle           ; work         ;
+;       |ahb_switches:switches_1|              ; 12.6 (12.6)          ; 13.3 (13.3)                      ; 0.8 (0.8)                                         ; 0.1 (0.1)                        ; 0.0 (0.0)            ; 11 (11)             ; 29 (29)                   ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_switches:switches_1                                                                         ; ahb_switches     ; work         ;
+;    |razzle:raz_inst|                         ; 40.0 (40.0)          ; 39.5 (39.5)                      ; 1.0 (1.0)                                         ; 1.5 (1.5)                        ; 0.0 (0.0)            ; 60 (60)             ; 29 (29)                   ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|razzle:raz_inst                                                                                                  ; razzle           ; work         ;
 +----------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
 Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
 
@@ -2016,70 +2136,70 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 ; VGA_CLK     ; Output   ; -- ; --   ; --   ; -- ; (0)  ; (31)  ; --     ; --                     ; --                       ;
 ; VGA_BLANK_N ; Output   ; -- ; --   ; --   ; -- ; (0)  ; (31)  ; --     ; --                     ; --                       ;
 ; CLOCK_50    ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; KEY[2]      ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; KEY[2]      ; Input    ; -- ; (0)  ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[7]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; KEY[1]      ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; KEY[0]      ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; KEY[0]      ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[2]       ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[9]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[1]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[4]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[3]       ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; SW[5]       ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; SW[0]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; SW[8]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; SW[6]       ; Input    ; -- ; (0)  ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; SW[5]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; SW[0]       ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; SW[8]       ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; SW[6]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 +-------------+----------+----+------+------+----+------+-------+--------+------------------------+--------------------------+
 
 
-+---------------------------------------------------------------------------------------------------------+
-; Pad To Core Delay Chain Fanout                                                                          ;
-+---------------------------------------------------------------------------+-------------------+---------+
-; Source Pin / Fanout                                                       ; Pad To Core Index ; Setting ;
-+---------------------------------------------------------------------------+-------------------+---------+
-; KEY[3]                                                                    ;                   ;         ;
-; CLOCK_50                                                                  ;                   ;         ;
-; KEY[2]                                                                    ;                   ;         ;
-;      - razzle:raz_inst|VGA_HS~0                                           ; 0                 ; 0       ;
-; SW[7]                                                                     ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][7]        ; 0                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][7]        ; 0                 ; 0       ;
-; KEY[1]                                                                    ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|always0~0                 ; 0                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|DataValid~0               ; 0                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|last_buttons[1]~0         ; 0                 ; 0       ;
-; KEY[0]                                                                    ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|always0~1                 ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|DataValid~1               ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|last_buttons[0]~1         ; 1                 ; 0       ;
-; SW[2]                                                                     ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][2]        ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][2]~feeder ; 1                 ; 0       ;
-; SW[9]                                                                     ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][9]        ; 0                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][9]        ; 0                 ; 0       ;
-; SW[1]                                                                     ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][1]        ; 0                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][1]        ; 0                 ; 0       ;
-; SW[4]                                                                     ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][4]        ; 0                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][4]        ; 0                 ; 0       ;
-; SW[3]                                                                     ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][3]        ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][3]        ; 1                 ; 0       ;
-; SW[5]                                                                     ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][5]        ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][5]        ; 1                 ; 0       ;
-; SW[0]                                                                     ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][0]        ; 0                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][0]        ; 0                 ; 0       ;
-; SW[8]                                                                     ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][8]        ; 0                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][8]        ; 0                 ; 0       ;
-; SW[6]                                                                     ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][6]        ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][6]~feeder ; 0                 ; 0       ;
-+---------------------------------------------------------------------------+-------------------+---------+
++--------------------------------------------------------------------------------------------------+
+; Pad To Core Delay Chain Fanout                                                                   ;
++--------------------------------------------------------------------+-------------------+---------+
+; Source Pin / Fanout                                                ; Pad To Core Index ; Setting ;
++--------------------------------------------------------------------+-------------------+---------+
+; KEY[3]                                                             ;                   ;         ;
+; CLOCK_50                                                           ;                   ;         ;
+; KEY[2]                                                             ;                   ;         ;
+;      - razzle:raz_inst|VGA_HS~0                                    ; 1                 ; 0       ;
+; SW[7]                                                              ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][7] ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][7] ; 0                 ; 0       ;
+; KEY[1]                                                             ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|always0~0          ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|DataValid~0        ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|last_buttons[1]~0  ; 0                 ; 0       ;
+; KEY[0]                                                             ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|always0~1          ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|DataValid~1        ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|last_buttons[0]~1  ; 0                 ; 0       ;
+; SW[2]                                                              ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][2] ; 1                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][2] ; 1                 ; 0       ;
+; SW[9]                                                              ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][9] ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][9] ; 0                 ; 0       ;
+; SW[1]                                                              ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][1] ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][1] ; 0                 ; 0       ;
+; SW[4]                                                              ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][4] ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][4] ; 0                 ; 0       ;
+; SW[3]                                                              ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][3] ; 1                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][3] ; 1                 ; 0       ;
+; SW[5]                                                              ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][5] ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][5] ; 0                 ; 0       ;
+; SW[0]                                                              ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][0] ; 1                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][0] ; 1                 ; 0       ;
+; SW[8]                                                              ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][8] ; 1                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][8] ; 1                 ; 0       ;
+; SW[6]                                                              ;                   ;         ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][6] ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][6] ; 0                 ; 0       ;
++--------------------------------------------------------------------+-------------------+---------+
 
 
 +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
@@ -2087,91 +2207,90 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 +------------------------------------------------------------------------------------------------------------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+
 ; Name                                                                                                                               ; Location             ; Fan-Out ; Usage        ; Global ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
 +------------------------------------------------------------------------------------------------------------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+
-; CLOCK_50                                                                                                                           ; PIN_AB27             ; 1310    ; Clock        ; yes    ; Global Clock         ; GCLK8            ; --                        ;
-; KEY[2]                                                                                                                             ; PIN_Y27              ; 1244    ; Async. clear ; yes    ; Global Clock         ; GCLK10           ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ax1wx4~0                                                                 ; LABCELL_X50_Y11_N24  ; 42      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bpsvx4~0                                                                 ; LABCELL_X24_Y6_N33   ; 19      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5ovx4                                                                   ; MLABCELL_X25_Y10_N51 ; 25      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dv1wx4~0                                                                 ; LABCELL_X46_Y8_N3    ; 42      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Edovx4                                                                   ; MLABCELL_X25_Y8_N33  ; 11      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fw1wx4~1                                                                 ; LABCELL_X50_Y8_N39   ; 46      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G02wx4                                                                   ; LABCELL_X45_Y7_N36   ; 48      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hfyvx4~2                                                                 ; MLABCELL_X52_Y8_N54  ; 45      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hx1wx4~1                                                                 ; MLABCELL_X52_Y8_N12  ; 44      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2uvx4~0                                                                 ; LABCELL_X22_Y12_N36  ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5vvx4                                                                   ; LABCELL_X30_Y7_N48   ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K6yvx4~10                                                                ; MLABCELL_X28_Y4_N30  ; 7       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kv1wx4~0                                                                 ; LABCELL_X48_Y8_N45   ; 47      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L0uvx4                                                                   ; MLABCELL_X25_Y12_N18 ; 11      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Meyvx4                                                                   ; LABCELL_X50_Y8_N42   ; 41      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mw1wx4~1                                                                 ; LABCELL_X51_Y9_N24   ; 42      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pu1wx4                                                                   ; LABCELL_X51_Y8_N30   ; 40      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qztvx4                                                                   ; LABCELL_X24_Y12_N45  ; 9       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rfpvx4~5                                                                 ; LABCELL_X31_Y4_N36   ; 6       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rv1wx4~1                                                                 ; LABCELL_X50_Y8_N21   ; 44      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T5tvx4                                                                   ; MLABCELL_X28_Y9_N21  ; 2       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tw1wx4~1                                                                 ; LABCELL_X50_Y8_N30   ; 41      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U1uvx4                                                                   ; LABCELL_X24_Y10_N33  ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5qvx4                                                                   ; MLABCELL_X21_Y5_N42  ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vytvx4                                                                   ; MLABCELL_X25_Y12_N51 ; 9       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W2uvx4                                                                   ; LABCELL_X24_Y12_N54  ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wcyvx4~3                                                                 ; MLABCELL_X52_Y8_N36  ; 49      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wu1wx4~1                                                                 ; LABCELL_X50_Y8_N57   ; 41      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yafwx4~5                                                                 ; LABCELL_X30_Y4_N45   ; 7       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ydyvx4                                                                   ; LABCELL_X50_Y9_N33   ; 46      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yv1wx4~1                                                                 ; LABCELL_X50_Y8_N12   ; 44      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0uvx4                                                                   ; LABCELL_X24_Y12_N24  ; 15      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z9zvx4~0                                                                 ; LABCELL_X33_Y11_N48  ; 2       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_interconnect:interconnect_1|HREADY~0                                                                          ; LABCELL_X33_Y9_N48   ; 64      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2699w[3]~1 ; LABCELL_X35_Y17_N48  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2716w[3]~1 ; LABCELL_X35_Y17_N21  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2726w[3]~0 ; LABCELL_X35_Y17_N54  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2736w[3]~0 ; LABCELL_X35_Y17_N27  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2746w[3]~1 ; LABCELL_X27_Y14_N51  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2756w[3]~1 ; LABCELL_X29_Y15_N33  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2766w[3]~1 ; LABCELL_X29_Y15_N3   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2776w[3]~1 ; LABCELL_X35_Y17_N30  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2799w[3]~0 ; LABCELL_X35_Y17_N51  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2810w[3]~0 ; LABCELL_X35_Y17_N24  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2820w[3]~0 ; LABCELL_X35_Y17_N57  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2830w[3]~0 ; LABCELL_X35_Y17_N18  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2840w[3]~0 ; LABCELL_X29_Y15_N6   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2850w[3]~0 ; LABCELL_X29_Y15_N30  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2860w[3]~0 ; LABCELL_X29_Y15_N36  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2870w[3]~0 ; LABCELL_X35_Y17_N45  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2892w[3]~0 ; LABCELL_X35_Y17_N12  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2903w[3]~0 ; LABCELL_X35_Y17_N6   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2913w[3]~0 ; LABCELL_X35_Y17_N15  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2923w[3]~0 ; LABCELL_X35_Y17_N36  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2933w[3]~0 ; LABCELL_X29_Y15_N51  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2943w[3]~0 ; LABCELL_X29_Y15_N42  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2953w[3]~0 ; LABCELL_X29_Y15_N39  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2963w[3]~0 ; LABCELL_X35_Y17_N33  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2985w[3]~0 ; LABCELL_X35_Y17_N0   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2996w[3]~0 ; LABCELL_X35_Y17_N9   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3006w[3]~0 ; LABCELL_X35_Y17_N3   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3016w[3]~0 ; LABCELL_X35_Y17_N39  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3026w[3]~0 ; LABCELL_X29_Y15_N21  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3036w[3]~0 ; LABCELL_X29_Y15_N45  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3046w[3]~0 ; LABCELL_X29_Y15_N0   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3056w[3]~0 ; LABCELL_X35_Y17_N42  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3078w[3]~0 ; LABCELL_X22_Y11_N42  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3089w[3]~0 ; LABCELL_X22_Y11_N51  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3099w[3]~1 ; LABCELL_X22_Y11_N33  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3109w[3]~0 ; LABCELL_X22_Y11_N48  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3119w[3]~0 ; LABCELL_X29_Y15_N27  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3129w[3]~0 ; LABCELL_X22_Y11_N30  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|always0~0                                                                                   ; LABCELL_X19_Y5_N6    ; 20      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_ram:ram_1|always1~0                                                                                           ; LABCELL_X18_Y5_N18   ; 30      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle                                                                                         ; FF_X19_Y5_N17        ; 15      ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle~DUPLICATE                                                                               ; FF_X19_Y5_N16        ; 46      ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_switches:switches_1|always0~0                                                                                 ; LABCELL_X22_Y11_N24  ; 10      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_switches:switches_1|always0~1                                                                                 ; LABCELL_X22_Y11_N9   ; 10      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; razzle:raz_inst|Equal0~4                                                                                                           ; LABCELL_X33_Y15_N45  ; 11      ; Sync. load   ; no     ; --                   ; --               ; --                        ;
-; razzle:raz_inst|LessThan0~3                                                                                                        ; LABCELL_X35_Y15_N42  ; 22      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
-; razzle:raz_inst|VGA_HS~0                                                                                                           ; LABCELL_X33_Y15_N42  ; 2       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; razzle:raz_inst|always0~14                                                                                                         ; LABCELL_X33_Y15_N6   ; 11      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
-; tick_count[0]                                                                                                                      ; FF_X52_Y4_N14        ; 30      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; CLOCK_50                                                                                                                           ; PIN_AF14             ; 1324    ; Clock        ; yes    ; Global Clock         ; GCLK6            ; --                        ;
+; KEY[2]                                                                                                                             ; PIN_W15              ; 1262    ; Async. clear ; yes    ; Global Clock         ; GCLK4            ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ax1wx4~0                                                                 ; LABCELL_X27_Y8_N36   ; 40      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bpsvx4~0                                                                 ; LABCELL_X30_Y17_N39  ; 19      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5ovx4                                                                   ; MLABCELL_X28_Y16_N45 ; 29      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dv1wx4~0                                                                 ; LABCELL_X27_Y7_N39   ; 46      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Edovx4                                                                   ; LABCELL_X31_Y19_N57  ; 11      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fw1wx4~1                                                                 ; LABCELL_X27_Y7_N54   ; 44      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G02wx4                                                                   ; MLABCELL_X34_Y8_N15  ; 43      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hfyvx4~2                                                                 ; LABCELL_X29_Y7_N57   ; 40      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hx1wx4~1                                                                 ; MLABCELL_X28_Y6_N45  ; 43      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2uvx4~0                                                                 ; LABCELL_X23_Y20_N0   ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5vvx4                                                                   ; MLABCELL_X28_Y20_N27 ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K6yvx4~10                                                                ; MLABCELL_X39_Y18_N24 ; 8       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kv1wx4~0                                                                 ; LABCELL_X30_Y8_N12   ; 41      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L0uvx4                                                                   ; MLABCELL_X28_Y18_N54 ; 13      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Meyvx4                                                                   ; LABCELL_X29_Y7_N24   ; 44      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mw1wx4~1                                                                 ; MLABCELL_X28_Y6_N12  ; 48      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pu1wx4                                                                   ; MLABCELL_X34_Y9_N39  ; 46      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qztvx4                                                                   ; LABCELL_X24_Y18_N42  ; 12      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rfpvx4~5                                                                 ; MLABCELL_X39_Y17_N36 ; 8       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rv1wx4~1                                                                 ; LABCELL_X30_Y8_N21   ; 40      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T5tvx4                                                                   ; LABCELL_X24_Y21_N6   ; 2       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tw1wx4~1                                                                 ; LABCELL_X27_Y7_N45   ; 38      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U1uvx4                                                                   ; LABCELL_X24_Y21_N33  ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5qvx4                                                                   ; LABCELL_X36_Y17_N54  ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vytvx4                                                                   ; LABCELL_X27_Y19_N51  ; 11      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W2uvx4                                                                   ; MLABCELL_X28_Y18_N21 ; 5       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wcyvx4~3                                                                 ; LABCELL_X29_Y7_N45   ; 49      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wu1wx4~1                                                                 ; LABCELL_X27_Y7_N3    ; 44      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yafwx4~5                                                                 ; MLABCELL_X39_Y14_N54 ; 8       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ydyvx4                                                                   ; MLABCELL_X28_Y6_N42  ; 46      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yv1wx4~1                                                                 ; LABCELL_X27_Y7_N42   ; 42      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0uvx4                                                                   ; LABCELL_X24_Y20_N27  ; 12      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z9zvx4~0                                                                 ; MLABCELL_X34_Y13_N57 ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_interconnect:interconnect_1|HREADY~0                                                                          ; LABCELL_X29_Y17_N18  ; 66      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2699w[3]~1 ; LABCELL_X46_Y15_N3   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2716w[3]~1 ; LABCELL_X46_Y15_N42  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2726w[3]~0 ; LABCELL_X46_Y15_N51  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2736w[3]~0 ; LABCELL_X46_Y15_N39  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2746w[3]~1 ; MLABCELL_X47_Y16_N12 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2756w[3]~1 ; LABCELL_X46_Y15_N30  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2766w[3]~1 ; LABCELL_X46_Y16_N24  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2776w[3]~1 ; LABCELL_X45_Y15_N0   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2799w[3]~0 ; LABCELL_X46_Y16_N48  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2810w[3]~0 ; LABCELL_X46_Y15_N36  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2820w[3]~0 ; LABCELL_X46_Y16_N33  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2830w[3]~0 ; LABCELL_X46_Y16_N39  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2840w[3]~0 ; MLABCELL_X47_Y16_N9  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2850w[3]~0 ; LABCELL_X46_Y15_N6   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2860w[3]~0 ; LABCELL_X46_Y16_N30  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2870w[3]~0 ; LABCELL_X45_Y15_N30  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2892w[3]~0 ; LABCELL_X46_Y15_N24  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2903w[3]~0 ; LABCELL_X46_Y15_N21  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2913w[3]~0 ; LABCELL_X46_Y15_N15  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2923w[3]~0 ; LABCELL_X46_Y15_N57  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2933w[3]~0 ; MLABCELL_X47_Y16_N48 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2943w[3]~0 ; LABCELL_X46_Y15_N48  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2953w[3]~0 ; LABCELL_X46_Y16_N18  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2963w[3]~0 ; LABCELL_X45_Y15_N12  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2985w[3]~0 ; LABCELL_X46_Y15_N12  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2996w[3]~0 ; LABCELL_X46_Y15_N54  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3006w[3]~0 ; LABCELL_X46_Y15_N45  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3016w[3]~0 ; LABCELL_X46_Y15_N0   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3026w[3]~0 ; MLABCELL_X47_Y16_N57 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3036w[3]~0 ; LABCELL_X46_Y15_N33  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3046w[3]~0 ; LABCELL_X46_Y16_N21  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3056w[3]~0 ; LABCELL_X45_Y15_N21  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3078w[3]~0 ; LABCELL_X46_Y16_N42  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3089w[3]~0 ; LABCELL_X46_Y16_N12  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3099w[3]~1 ; LABCELL_X46_Y16_N15  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3109w[3]~0 ; LABCELL_X46_Y16_N45  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3119w[3]~0 ; LABCELL_X46_Y16_N36  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3129w[3]~0 ; LABCELL_X46_Y16_N57  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|always0~0                                                                                   ; LABCELL_X30_Y16_N48  ; 21      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_ram:ram_1|always1~0                                                                                           ; LABCELL_X30_Y13_N18  ; 32      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle~DUPLICATE                                                                               ; FF_X29_Y13_N7        ; 54      ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_switches:switches_1|always0~0                                                                                 ; LABCELL_X30_Y19_N24  ; 10      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_switches:switches_1|always0~1                                                                                 ; LABCELL_X30_Y19_N30  ; 10      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; razzle:raz_inst|Equal0~4                                                                                                           ; MLABCELL_X47_Y12_N57 ; 11      ; Sync. load   ; no     ; --                   ; --               ; --                        ;
+; razzle:raz_inst|LessThan0~3                                                                                                        ; LABCELL_X43_Y12_N39  ; 23      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
+; razzle:raz_inst|VGA_HS~0                                                                                                           ; LABCELL_X46_Y12_N12  ; 2       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; razzle:raz_inst|always0~14                                                                                                         ; LABCELL_X46_Y12_N45  ; 11      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
+; tick_count[0]                                                                                                                      ; FF_X57_Y20_N17       ; 31      ; Clock enable ; no     ; --                   ; --               ; --                        ;
 +------------------------------------------------------------------------------------------------------------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+
 
 
@@ -2180,8 +2299,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 +----------+----------+---------+----------------------+------------------+---------------------------+
 ; Name     ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
 +----------+----------+---------+----------------------+------------------+---------------------------+
-; CLOCK_50 ; PIN_AB27 ; 1310    ; Global Clock         ; GCLK8            ; --                        ;
-; KEY[2]   ; PIN_Y27  ; 1244    ; Global Clock         ; GCLK10           ; --                        ;
+; CLOCK_50 ; PIN_AF14 ; 1324    ; Global Clock         ; GCLK6            ; --                        ;
+; KEY[2]   ; PIN_W15  ; 1262    ; Global Clock         ; GCLK4            ; --                        ;
 +----------+----------+---------+----------------------+------------------+---------------------------+
 
 
@@ -2194,14 +2313,14 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 +----------------------------------------------------------------------+---------+
 
 
-+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter RAM Summary                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
-+----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+--------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
-; Name                                                                                                     ; Type ; Mode             ; Clock Mode   ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size   ; Implementation Port A Depth ; Implementation Port A Width ; Implementation Port B Depth ; Implementation Port B Width ; Implementation Bits ; M10K blocks ; MLAB cells ; MIF                                              ; Location                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             ; Mixed Width RDW Mode ; Port A RDW Mode ; Port B RDW Mode ; ECC Mode ; ECC Pipeline Registers ; Fits in MLABs         ;
-+----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+--------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 307200       ; 1            ; 307200       ; 1            ; yes                    ; no                      ; yes                    ; no                      ; 307200 ; 307200                      ; 1                           ; 307200                      ; 1                           ; 307200              ; 38          ; 0          ; None                                             ; M10K_X14_Y14_N0, M10K_X14_Y13_N0, M10K_X26_Y12_N0, M10K_X26_Y11_N0, M10K_X26_Y10_N0, M10K_X41_Y15_N0, M10K_X26_Y20_N0, M10K_X41_Y12_N0, M10K_X41_Y20_N0, M10K_X38_Y20_N0, M10K_X38_Y12_N0, M10K_X26_Y18_N0, M10K_X26_Y19_N0, M10K_X41_Y21_N0, M10K_X41_Y13_N0, M10K_X41_Y16_N0, M10K_X41_Y19_N0, M10K_X41_Y14_N0, M10K_X26_Y13_N0, M10K_X38_Y14_N0, M10K_X26_Y16_N0, M10K_X38_Y17_N0, M10K_X38_Y18_N0, M10K_X26_Y14_N0, M10K_X26_Y21_N0, M10K_X14_Y15_N0, M10K_X14_Y16_N0, M10K_X38_Y15_N0, M10K_X14_Y17_N0, M10K_X26_Y15_N0, M10K_X38_Y13_N0, M10K_X26_Y17_N0, M10K_X38_Y16_N0, M10K_X38_Y19_N0, M10K_X14_Y19_N0, M10K_X41_Y17_N0, M10K_X38_Y21_N0, M10K_X41_Y18_N0 ; Old data             ; New data        ; New data        ; Off      ; No                     ; No - Address Too Wide ;
-; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM         ; AUTO ; Simple Dual Port ; Single Clock ; 4096         ; 32           ; 4096         ; 32           ; yes                    ; no                      ; yes                    ; no                      ; 131072 ; 4096                        ; 32                          ; 4096                        ; 32                          ; 131072              ; 16          ; 0          ; db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif ; M10K_X26_Y7_N0, M10K_X14_Y9_N0, M10K_X26_Y3_N0, M10K_X26_Y8_N0, M10K_X26_Y5_N0, M10K_X14_Y3_N0, M10K_X26_Y6_N0, M10K_X14_Y4_N0, M10K_X26_Y9_N0, M10K_X5_Y5_N0, M10K_X14_Y7_N0, M10K_X14_Y5_N0, M10K_X26_Y4_N0, M10K_X14_Y2_N0, M10K_X14_Y6_N0, M10K_X14_Y8_N0                                                                                                                                                                                                                                                                                                                                                                                                        ; Old data             ; New data        ; New data        ; Off      ; No                     ; No - Address Too Wide ;
-+----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+--------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Fitter RAM Summary                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                ;
++----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+--------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
+; Name                                                                                                     ; Type ; Mode             ; Clock Mode   ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size   ; Implementation Port A Depth ; Implementation Port A Width ; Implementation Port B Depth ; Implementation Port B Width ; Implementation Bits ; M10K blocks ; MLAB cells ; MIF                                              ; Location                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                        ; Mixed Width RDW Mode ; Port A RDW Mode ; Port B RDW Mode ; ECC Mode ; ECC Pipeline Registers ; Fits in MLABs         ;
++----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+--------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 307200       ; 1            ; 307200       ; 1            ; yes                    ; no                      ; yes                    ; no                      ; 307200 ; 307200                      ; 1                           ; 307200                      ; 1                           ; 307200              ; 38          ; 0          ; None                                             ; M10K_X49_Y18_N0, M10K_X41_Y18_N0, M10K_X58_Y16_N0, M10K_X41_Y19_N0, M10K_X58_Y19_N0, M10K_X41_Y16_N0, M10K_X41_Y7_N0, M10K_X41_Y8_N0, M10K_X41_Y11_N0, M10K_X38_Y9_N0, M10K_X49_Y12_N0, M10K_X49_Y14_N0, M10K_X49_Y16_N0, M10K_X38_Y17_N0, M10K_X38_Y10_N0, M10K_X38_Y11_N0, M10K_X41_Y10_N0, M10K_X41_Y9_N0, M10K_X41_Y12_N0, M10K_X49_Y10_N0, M10K_X41_Y14_N0, M10K_X38_Y12_N0, M10K_X41_Y17_N0, M10K_X58_Y17_N0, M10K_X38_Y16_N0, M10K_X58_Y14_N0, M10K_X49_Y13_N0, M10K_X41_Y15_N0, M10K_X49_Y11_N0, M10K_X58_Y15_N0, M10K_X49_Y15_N0, M10K_X38_Y18_N0, M10K_X58_Y18_N0, M10K_X49_Y17_N0, M10K_X49_Y9_N0, M10K_X38_Y19_N0, M10K_X49_Y19_N0, M10K_X38_Y15_N0 ; Old data             ; New data        ; New data        ; Off      ; No                     ; No - Address Too Wide ;
+; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM         ; AUTO ; Simple Dual Port ; Single Clock ; 4096         ; 32           ; 4096         ; 32           ; yes                    ; no                      ; yes                    ; no                      ; 131072 ; 4096                        ; 32                          ; 4096                        ; 32                          ; 131072              ; 16          ; 0          ; db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif ; M10K_X26_Y17_N0, M10K_X26_Y13_N0, M10K_X26_Y15_N0, M10K_X26_Y19_N0, M10K_X14_Y12_N0, M10K_X26_Y14_N0, M10K_X14_Y13_N0, M10K_X41_Y13_N0, M10K_X26_Y9_N0, M10K_X26_Y18_N0, M10K_X26_Y10_N0, M10K_X26_Y12_N0, M10K_X26_Y16_N0, M10K_X26_Y11_N0, M10K_X38_Y14_N0, M10K_X38_Y13_N0                                                                                                                                                                                                                                                                                                                                                                                   ; Old data             ; New data        ; New data        ; Off      ; No                     ; No - Address Too Wide ;
++----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+--------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
 Note: Fitter may spread logical memories into multiple blocks to improve timing. The actual required RAM blocks can be found in the Fitter Resource Usage section.
 
 
@@ -2210,14 +2329,14 @@ Note: Fitter may spread logical memories into multiple blocks to improve timing.
 +---------------------------------------------+-------------------------+
 ; Routing Resource Type                       ; Usage                   ;
 +---------------------------------------------+-------------------------+
-; Block interconnects                         ; 9,669 / 289,320 ( 3 % ) ;
-; C12 interconnects                           ; 124 / 13,420 ( < 1 % )  ;
-; C2 interconnects                            ; 3,308 / 119,108 ( 3 % ) ;
-; C4 interconnects                            ; 1,600 / 56,300 ( 3 % )  ;
+; Block interconnects                         ; 9,723 / 289,320 ( 3 % ) ;
+; C12 interconnects                           ; 172 / 13,420 ( 1 % )    ;
+; C2 interconnects                            ; 3,303 / 119,108 ( 3 % ) ;
+; C4 interconnects                            ; 1,696 / 56,300 ( 3 % )  ;
 ; DQS bus muxes                               ; 0 / 25 ( 0 % )          ;
 ; DQS-18 I/O buses                            ; 0 / 25 ( 0 % )          ;
 ; DQS-9 I/O buses                             ; 0 / 25 ( 0 % )          ;
-; Direct links                                ; 524 / 289,320 ( < 1 % ) ;
+; Direct links                                ; 582 / 289,320 ( < 1 % ) ;
 ; Global clocks                               ; 2 / 16 ( 13 % )         ;
 ; HPS SDRAM PLL inputs                        ; 0 / 1 ( 0 % )           ;
 ; HPS SDRAM PLL outputs                       ; 0 / 1 ( 0 % )           ;
@@ -2273,13 +2392,13 @@ Note: Fitter may spread logical memories into multiple blocks to improve timing.
 ; HPS_INTERFACE_TPIU_TRACE_INPUTs             ; 0 / 2 ( 0 % )           ;
 ; HPS_INTERFACE_TPIU_TRACE_OUTPUTs            ; 0 / 33 ( 0 % )          ;
 ; Horizontal periphery clocks                 ; 0 / 72 ( 0 % )          ;
-; Local interconnects                         ; 1,793 / 84,580 ( 2 % )  ;
+; Local interconnects                         ; 1,806 / 84,580 ( 2 % )  ;
 ; Quadrant clocks                             ; 0 / 66 ( 0 % )          ;
-; R14 interconnects                           ; 431 / 12,676 ( 3 % )    ;
-; R14/C12 interconnect drivers                ; 501 / 20,720 ( 2 % )    ;
-; R3 interconnects                            ; 3,850 / 130,992 ( 3 % ) ;
-; R6 interconnects                            ; 7,282 / 266,960 ( 3 % ) ;
-; Spine clocks                                ; 10 / 360 ( 3 % )        ;
+; R14 interconnects                           ; 305 / 12,676 ( 2 % )    ;
+; R14/C12 interconnect drivers                ; 420 / 20,720 ( 2 % )    ;
+; R3 interconnects                            ; 4,014 / 130,992 ( 3 % ) ;
+; R6 interconnects                            ; 5,989 / 266,960 ( 2 % ) ;
+; Spine clocks                                ; 14 / 360 ( 4 % )        ;
 ; Wire stub REs                               ; 0 / 15,858 ( 0 % )      ;
 +---------------------------------------------+-------------------------+
 
@@ -2290,10 +2409,10 @@ Note: Fitter may spread logical memories into multiple blocks to improve timing.
 ; I/O Rules Statistic              ; Total ;
 +----------------------------------+-------+
 ; Total I/O Rules                  ; 28    ;
-; Number of I/O Rules Passed       ; 6     ;
+; Number of I/O Rules Passed       ; 9     ;
 ; Number of I/O Rules Failed       ; 0     ;
 ; Number of I/O Rules Unchecked    ; 0     ;
-; Number of I/O Rules Inapplicable ; 22    ;
+; Number of I/O Rules Inapplicable ; 19    ;
 +----------------------------------+-------+
 
 
@@ -2303,12 +2422,12 @@ Note: Fitter may spread logical memories into multiple blocks to improve timing.
 ; Status       ; ID        ; Category                          ; Rule Description                                                                   ; Severity ; Information                                                              ; Area                ; Extra Information ;
 +--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
 ; Inapplicable ; IO_000002 ; Capacity Checks                   ; Number of clocks in an I/O bank should not exceed the number of clocks available.  ; Critical ; No Global Signal assignments found.                                      ; I/O                 ;                   ;
-; Inapplicable ; IO_000003 ; Capacity Checks                   ; Number of pins in a Vrefgroup should not exceed the number of locations available. ; Critical ; No Location assignments found.                                           ; I/O                 ;                   ;
-; Inapplicable ; IO_000001 ; Capacity Checks                   ; Number of pins in an I/O bank should not exceed the number of locations available. ; Critical ; No Location assignments found.                                           ; I/O                 ;                   ;
+; Pass         ; IO_000003 ; Capacity Checks                   ; Number of pins in a Vrefgroup should not exceed the number of locations available. ; Critical ; 0 such failures found.                                                   ; I/O                 ;                   ;
+; Pass         ; IO_000001 ; Capacity Checks                   ; Number of pins in an I/O bank should not exceed the number of locations available. ; Critical ; 0 such failures found.                                                   ; I/O                 ;                   ;
 ; Inapplicable ; IO_000004 ; Voltage Compatibility Checks      ; The I/O bank should support the requested VCCIO.                                   ; Critical ; No IOBANK_VCCIO assignments found.                                       ; I/O                 ;                   ;
 ; Inapplicable ; IO_000005 ; Voltage Compatibility Checks      ; The I/O bank should not have competing VREF values.                                ; Critical ; No VREF I/O Standard assignments found.                                  ; I/O                 ;                   ;
 ; Pass         ; IO_000006 ; Voltage Compatibility Checks      ; The I/O bank should not have competing VCCIO values.                               ; Critical ; 0 such failures found.                                                   ; I/O                 ;                   ;
-; Inapplicable ; IO_000007 ; Valid Location Checks             ; Checks for unavailable locations.                                                  ; Critical ; No Location assignments found.                                           ; I/O                 ;                   ;
+; Pass         ; IO_000007 ; Valid Location Checks             ; Checks for unavailable locations.                                                  ; Critical ; 0 such failures found.                                                   ; I/O                 ;                   ;
 ; Inapplicable ; IO_000008 ; Valid Location Checks             ; Checks for reserved locations.                                                     ; Critical ; No reserved LogicLock region found.                                      ; I/O                 ;                   ;
 ; Inapplicable ; IO_000022 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Bus Hold value.                      ; Critical ; No Enable Bus-Hold Circuitry assignments found.                          ; I/O                 ;                   ;
 ; Inapplicable ; IO_000021 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Weak Pull Up value.                  ; Critical ; No Weak Pull-Up Resistor assignments found.                              ; I/O                 ;                   ;
@@ -2334,97 +2453,97 @@ Note: Fitter may spread logical memories into multiple blocks to improve timing.
 +--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
 
 
-+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; I/O Rules Matrix                                                                                                                                                                                                                                                                                                                                                                                                                              ;
-+--------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
-; Pin/Rules          ; IO_000002    ; IO_000003    ; IO_000001    ; IO_000004    ; IO_000005    ; IO_000006 ; IO_000007    ; IO_000008    ; IO_000022    ; IO_000021    ; IO_000046    ; IO_000023    ; IO_000024    ; IO_000026    ; IO_000027    ; IO_000045    ; IO_000047    ; IO_000020    ; IO_000019    ; IO_000018    ; IO_000015    ; IO_000014    ; IO_000013    ; IO_000012    ; IO_000011    ; IO_000010 ; IO_000009 ; IO_000034    ;
-+--------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
-; Total Pass         ; 0            ; 0            ; 0            ; 0            ; 0            ; 81        ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 66           ; 0            ; 0            ; 0            ; 0            ; 0            ; 66           ; 0            ; 0            ; 0            ; 0            ; 66           ; 0            ; 81        ; 81        ; 0            ;
-; Total Unchecked    ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0         ; 0            ;
-; Total Inapplicable ; 81           ; 81           ; 81           ; 81           ; 81           ; 0         ; 81           ; 81           ; 81           ; 81           ; 81           ; 81           ; 15           ; 81           ; 81           ; 81           ; 81           ; 81           ; 15           ; 81           ; 81           ; 81           ; 81           ; 15           ; 81           ; 0         ; 0         ; 81           ;
-; Total Fail         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0         ; 0            ;
-; KEY[3]             ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; LEDR[0]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; LEDR[1]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; LEDR[2]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; LEDR[3]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; LEDR[4]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; LEDR[5]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; LEDR[6]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; LEDR[7]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; LEDR[8]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; LEDR[9]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX0[0]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX0[1]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX0[2]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX0[3]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX0[4]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX0[5]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX0[6]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX1[0]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX1[1]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX1[2]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX1[3]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX1[4]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX1[5]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX1[6]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX2[0]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX2[1]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX2[2]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX2[3]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX2[4]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX2[5]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX2[6]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX3[0]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX3[1]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX3[2]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX3[3]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX3[4]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX3[5]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; HEX3[6]            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_R[0]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_R[1]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_R[2]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_R[3]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_R[4]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_R[5]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_R[6]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_R[7]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_G[0]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_G[1]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_G[2]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_G[3]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_G[4]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_G[5]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_G[6]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_G[7]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_B[0]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_B[1]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_B[2]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_B[3]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_B[4]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_B[5]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_B[6]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_B[7]           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_HS             ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_VS             ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_CLK            ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; VGA_BLANK_N        ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; CLOCK_50           ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; KEY[2]             ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; SW[7]              ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; KEY[1]             ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; KEY[0]             ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; SW[2]              ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; SW[9]              ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; SW[1]              ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; SW[4]              ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; SW[3]              ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; SW[5]              ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; SW[0]              ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; SW[8]              ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-; SW[6]              ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
-+--------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; I/O Rules Matrix                                                                                                                                                                                                                                                                                                                                                                                                                     ;
++--------------------+--------------+-----------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
+; Pin/Rules          ; IO_000002    ; IO_000003 ; IO_000001 ; IO_000004    ; IO_000005    ; IO_000006 ; IO_000007 ; IO_000008    ; IO_000022    ; IO_000021    ; IO_000046    ; IO_000023    ; IO_000024    ; IO_000026    ; IO_000027    ; IO_000045    ; IO_000047    ; IO_000020    ; IO_000019    ; IO_000018    ; IO_000015    ; IO_000014    ; IO_000013    ; IO_000012    ; IO_000011    ; IO_000010 ; IO_000009 ; IO_000034    ;
++--------------------+--------------+-----------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
+; Total Pass         ; 0            ; 81        ; 81        ; 0            ; 0            ; 81        ; 81        ; 0            ; 0            ; 0            ; 0            ; 0            ; 66           ; 0            ; 0            ; 0            ; 0            ; 0            ; 66           ; 0            ; 0            ; 0            ; 0            ; 66           ; 0            ; 81        ; 81        ; 0            ;
+; Total Unchecked    ; 0            ; 0         ; 0         ; 0            ; 0            ; 0         ; 0         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0         ; 0            ;
+; Total Inapplicable ; 81           ; 0         ; 0         ; 81           ; 81           ; 0         ; 0         ; 81           ; 81           ; 81           ; 81           ; 81           ; 15           ; 81           ; 81           ; 81           ; 81           ; 81           ; 15           ; 81           ; 81           ; 81           ; 81           ; 15           ; 81           ; 0         ; 0         ; 81           ;
+; Total Fail         ; 0            ; 0         ; 0         ; 0            ; 0            ; 0         ; 0         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0         ; 0            ;
+; KEY[3]             ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; LEDR[0]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; LEDR[1]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; LEDR[2]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; LEDR[3]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; LEDR[4]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; LEDR[5]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; LEDR[6]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; LEDR[7]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; LEDR[8]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; LEDR[9]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX0[0]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX0[1]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX0[2]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX0[3]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX0[4]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX0[5]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX0[6]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX1[0]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX1[1]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX1[2]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX1[3]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX1[4]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX1[5]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX1[6]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX2[0]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX2[1]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX2[2]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX2[3]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX2[4]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX2[5]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX2[6]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX3[0]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX3[1]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX3[2]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX3[3]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX3[4]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX3[5]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; HEX3[6]            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_R[0]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_R[1]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_R[2]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_R[3]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_R[4]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_R[5]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_R[6]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_R[7]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_G[0]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_G[1]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_G[2]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_G[3]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_G[4]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_G[5]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_G[6]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_G[7]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_B[0]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_B[1]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_B[2]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_B[3]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_B[4]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_B[5]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_B[6]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_B[7]           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_HS             ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_VS             ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_CLK            ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; VGA_BLANK_N        ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; CLOCK_50           ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; KEY[2]             ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; SW[7]              ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; KEY[1]             ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; KEY[0]             ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; SW[2]              ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; SW[9]              ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; SW[1]              ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; SW[4]              ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; SW[3]              ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; SW[5]              ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; SW[0]              ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; SW[8]              ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
+; SW[6]              ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ;
++--------------------+--------------+-----------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
 
 
 +------------------------------------------------------------------------------------------------+
@@ -2475,118 +2594,118 @@ Note: Fitter may spread logical memories into multiple blocks to improve timing.
 +-----------------+----------------------+-------------------+
 ; Source Clock(s) ; Destination Clock(s) ; Delay Added in ns ;
 +-----------------+----------------------+-------------------+
-; CLOCK_50        ; CLOCK_50             ; 35.4              ;
+; CLOCK_50        ; CLOCK_50             ; 31.4              ;
 +-----------------+----------------------+-------------------+
 Note: For more information on problematic transfers, consider running the Fitter again with the Optimize hold timing option (Settings Menu) turned off.
 This will disable optimization of problematic paths and expose them for further analysis using the TimeQuest Timing Analyzer.
 
 
-+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Estimated Delay Added for Hold Timing Details                                                                                                                                                                                                                     ;
-+-----------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------+-------------------+
-; Source Register                                                                                                       ; Destination Register                                                                                                  ; Delay Added in ns ;
-+-----------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------+-------------------+
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9t2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gji2z4                                                      ; 0.650             ;
-; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle                                                                            ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a9~porta_address_reg0 ; 0.495             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.468             ;
-; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[11]                                                                 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a9~porta_address_reg0 ; 0.429             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7b3z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8b3z4                                                      ; 0.420             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ywi2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Owq2z4                                                      ; 0.390             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tna3z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S3i3z4                                                      ; 0.353             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U7w2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Owq2z4                                                      ; 0.353             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5a3z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rsa3z4                                                      ; 0.352             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mww2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4                                                      ; 0.351             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmd3z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wce3z4                                                      ; 0.339             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vaw2z4                                                      ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a9~porta_address_reg0 ; 0.334             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4                                                      ; 0.326             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T5g3z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K7g3z4                                                      ; 0.322             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qfa3z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4                                                      ; 0.319             ;
-; tick_count[25]                                                                                                        ; heartbeat                                                                                                             ; 0.317             ;
-; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][6]                                                           ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4                                                      ; 0.313             ;
-; arm_soc:soc_inst|ahb_switches:switches_1|read_enable                                                                  ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4                                                      ; 0.313             ;
-; arm_soc:soc_inst|ahb_switches:switches_1|half_word_address[1]                                                         ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4                                                      ; 0.313             ;
-; arm_soc:soc_inst|ahb_switches:switches_1|half_word_address[0]                                                         ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4                                                      ; 0.313             ;
-; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[1]                                                           ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4                                                      ; 0.313             ;
-; arm_soc:soc_inst|ahb_ram:ram_1|read_cycle                                                                             ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4                                                      ; 0.313             ;
-; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[2]                                                           ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4                                                      ; 0.313             ;
-; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a6~portb_address_reg0 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4                                                      ; 0.313             ;
-; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[0]                                                                         ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4                                                      ; 0.313             ;
-; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[0]                                                           ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4                                                      ; 0.313             ;
-; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[10]                                                                 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a9~porta_address_reg0 ; 0.311             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jlo2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ujo2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fio2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu73z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ll63z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw83z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpt2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vhk2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ggk2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kjk2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An73z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd63z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zkk2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aru2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbk2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[3]                                                                         ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rht2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyu2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj63z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vuo2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rro2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu83z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ft73z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnt2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gto2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fxu2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc63z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Isi2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Koj2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xti2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ll73z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgt2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Glj2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yfn2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vu93z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mhn2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psv2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf73z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ajn2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po83z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fwj2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dtj2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duu2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug63z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ruj2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ukt2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpu2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fzl2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx63z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V3m2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T0m2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yb93z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H783z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2m2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hbv2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ii63z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Skm2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmm2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr73z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imt2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ejm2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvu2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Unm2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gju2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1u2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E1r2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ka93z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S2r2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T9v2z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kw63z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T583z4                                                      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                      ; 0.305             ;
-+-----------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------+-------------------+
++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Estimated Delay Added for Hold Timing Details                                                                                                                                                                                                                       ;
++------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+-------------------+
+; Source Register                                                                                                        ; Destination Register                                                                                                   ; Delay Added in ns ;
++------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+-------------------+
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gji2z4                                                       ; 0.626             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gji2z4                                                       ; 0.626             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gji2z4                                                       ; 0.626             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cam2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gji2z4                                                       ; 0.626             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gji2z4                                                       ; 0.626             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gji2z4                                                       ; 0.626             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W7z2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4                                                       ; 0.569             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4                                                       ; 0.569             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4                                                       ; 0.569             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4                                                       ; 0.569             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4                                                       ; 0.569             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4                                                       ; 0.569             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4                                                       ; 0.569             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jhy2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jky2z4                                                       ; 0.508             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bby2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Swy2z4                                                       ; 0.466             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vaw2z4                                                       ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a23~porta_address_reg0 ; 0.463             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Thm2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.432             ;
+; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[1]                                                            ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.417             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G9w2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.404             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R0t2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.404             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G7x2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.404             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xuw2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Swy2z4                                                       ; 0.361             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M5f3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gji2z4                                                       ; 0.359             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svs2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aqp2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uqi2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B1a3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vgs2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uls2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lns2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pab3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jxs2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqs2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcb3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z4l2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6l2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lhd3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J9d3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bjd3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H8l2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qrp2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Azs2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|P2a3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pcd3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Axm2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mis2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a13~portb_address_reg0 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cps2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|read_cycle                                                                              ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                          ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fed3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G8n2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X9n2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zad3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bmb3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tib3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kkb3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dks2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z7i2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J0l2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[2]                                                            ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle                                                                             ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pet2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zoy2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqy2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2x2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Omk2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rbi3z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vvx2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S4w2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyx2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hxx2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aok2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5t2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y6t2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fij2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Npk2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bus2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgj2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fcj2z4                                                       ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4                                                       ; 0.354             ;
++------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------+-------------------+
 Note: This table only shows the top 100 path(s) that have the largest delay added for hold.
 
 
@@ -2601,12 +2720,11 @@ Info (21077): High junction temperature is 85 degrees C
 Info (171003): Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
 Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
 Info (176045): Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements.
-Critical Warning (169085): No exact pin location assignment(s) for 81 pins of 81 total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report.
 Info (184020): Starting Fitter periphery placement operations
 Info (11178): Promoted 1 clock (1 global)
-    Info (11162): CLOCK_50~inputCLKENA0 with 1020 fanout uses global clock CLKCTRL_G8
+    Info (11162): CLOCK_50~inputCLKENA0 with 1020 fanout uses global clock CLKCTRL_G6
 Info (11191): Automatically promoted 1 clock (1 global)
-    Info (11162): KEY[2]~inputCLKENA0 with 942 fanout uses global clock CLKCTRL_G10
+    Info (11162): KEY[2]~inputCLKENA0 with 942 fanout uses global clock CLKCTRL_G4
 Info (184021): Fitter periphery placement operations ending: elapsed time is 00:00:00
 Info (176233): Starting register packing
 Critical Warning (332012): Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
@@ -2616,29 +2734,215 @@ Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQue
 Info (332130): Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time.
 Info (176235): Finished register packing
     Extra Info (176219): No registers were packed into other blocks
+Warning (15705): Ignored locations or region assignments to the following nodes
+    Warning (15706): Node "ADC_CS_N" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "ADC_DIN" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "ADC_DOUT" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "ADC_SCLK" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "AUD_ADCDAT" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "AUD_ADCLRCK" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "AUD_BCLK" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "AUD_DACDAT" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "AUD_DACLRCK" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "AUD_XCK" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "CLOCK2_50" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "CLOCK3_50" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "CLOCK4_50" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[0]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[10]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[11]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[12]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[1]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[2]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[3]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[4]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[5]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[6]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[7]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[8]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_ADDR[9]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_BA[0]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_BA[1]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_CAS_N" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_CKE" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_CLK" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_CS_N" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[0]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[10]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[11]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[12]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[13]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[14]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[15]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[1]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[2]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[3]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[4]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[5]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[6]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[7]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[8]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_DQ[9]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_LDQM" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_RAS_N" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_UDQM" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "DRAM_WE_N" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "FAN_CTRL" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "FPGA_I2C_SCLK" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "FPGA_I2C_SDAT" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[0]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[10]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[11]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[12]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[13]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[14]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[15]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[16]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[17]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[18]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[19]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[1]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[20]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[21]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[22]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[23]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[24]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[25]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[26]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[27]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[28]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[29]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[2]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[30]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[31]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[32]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[33]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[34]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[35]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[3]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[4]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[5]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[6]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[7]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[8]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_0[9]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[0]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[10]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[11]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[12]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[13]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[14]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[15]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[16]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[17]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[18]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[19]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[1]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[20]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[21]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[22]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[23]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[24]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[25]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[26]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[27]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[28]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[29]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[2]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[30]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[31]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[32]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[33]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[34]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[35]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[3]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[4]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[5]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[6]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[7]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[8]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "GPIO_1[9]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX4[0]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX4[1]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX4[2]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX4[3]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX4[4]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX4[5]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX4[6]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX5[0]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX5[1]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX5[2]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX5[3]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX5[4]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX5[5]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "HEX5[6]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "IRDA_RXD" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "IRDA_TXD" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "PS2_CLK" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "PS2_CLK2" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "PS2_DAT" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "PS2_DAT2" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_CLK27" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_DATA[0]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_DATA[1]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_DATA[2]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_DATA[3]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_DATA[4]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_DATA[5]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_DATA[6]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_DATA[7]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_HS" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_RESET_N" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "TD_VS" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_B2_CLK" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_B2_DATA[0]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_B2_DATA[1]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_B2_DATA[2]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_B2_DATA[3]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_B2_DATA[4]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_B2_DATA[5]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_B2_DATA[6]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_B2_DATA[7]" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_EMPTY" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_FULL" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_OE_N" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_RD_N" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_RESET_N" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_SCL" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_SDA" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "USB_WR_N" is assigned to location or region, but does not exist in design
+    Warning (15706): Node "VGA_SYNC_N" is assigned to location or region, but does not exist in design
 Info (11798): Fitter preparation operations ending: elapsed time is 00:00:15
 Info (170189): Fitter placement preparation operations beginning
 Info (14951): The Fitter is using Advanced Physical Optimization.
-Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:17
+Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:15
 Info (170191): Fitter placement operations beginning
 Info (170137): Fitter placement was successful
-Info (170192): Fitter placement operations ending: elapsed time is 00:00:11
+Info (170192): Fitter placement operations ending: elapsed time is 00:00:09
 Info (170193): Fitter routing operations beginning
 Info (170195): Router estimated average interconnect usage is 2% of the available device resources
-    Info (170196): Router estimated peak interconnect usage is 27% of the available device resources in the region that extends from location X22_Y0 to location X32_Y10
+    Info (170196): Router estimated peak interconnect usage is 35% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22
 Info (170199): The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time.
     Info (170201): Optimizations that may affect the design's routability were skipped
-Info (170194): Fitter routing operations ending: elapsed time is 00:00:32
-Info (11888): Total time spent on timing analysis during the Fitter is 5.94 seconds.
+Info (170194): Fitter routing operations ending: elapsed time is 00:00:30
+Info (11888): Total time spent on timing analysis during the Fitter is 5.76 seconds.
 Info (334003): Started post-fitting delay annotation
 Info (334004): Delay annotation completed successfully
 Info (334003): Started post-fitting delay annotation
 Info (334004): Delay annotation completed successfully
-Info (11801): Fitter post-fit operations ending: elapsed time is 00:00:10
-Info: Quartus Prime Fitter was successful. 0 errors, 4 warnings
-    Info: Peak virtual memory: 2652 megabytes
-    Info: Processing ended: Thu Sep 24 11:21:06 2020
-    Info: Elapsed time: 00:02:05
-    Info: Total CPU time (on all processors): 00:12:16
+Info (11801): Fitter post-fit operations ending: elapsed time is 00:00:09
+Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
+Info (144001): Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg
+Info: Quartus Prime Fitter was successful. 0 errors, 182 warnings
+    Info: Peak virtual memory: 2658 megabytes
+    Info: Processing ended: Thu Sep 24 12:53:39 2020
+    Info: Elapsed time: 00:01:58
+    Info: Total CPU time (on all processors): 00:11:00
+
+
++----------------------------+
+; Fitter Suppressed Messages ;
++----------------------------+
+The suppressed messages can be found in /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg.
 
 
diff --git a/output_files/de1_soc_wrapper.fit.smsg b/output_files/de1_soc_wrapper.fit.smsg
new file mode 100644
index 0000000000000000000000000000000000000000..930291945870c27fa8ede0009c58b1d66c8d95a3
--- /dev/null
+++ b/output_files/de1_soc_wrapper.fit.smsg
@@ -0,0 +1,6 @@
+Extra Info (176236): Started Fast Input/Output/OE register processing
+Extra Info (176237): Finished Fast Input/Output/OE register processing
+Extra Info (176238): Start inferring scan chains for DSP blocks
+Extra Info (176239): Inferring scan chains for DSP blocks is complete
+Extra Info (176246): Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density
+Extra Info (176247): Finished moving registers into I/O cells, DSP blocks, and RAM blocks
diff --git a/output_files/de1_soc_wrapper.fit.summary b/output_files/de1_soc_wrapper.fit.summary
index c6b37de4f9b43e4cae2bb8f4f402d6fcb25ef688..dda9648856ac0681b76c29d5032d0181149c8a12 100644
--- a/output_files/de1_soc_wrapper.fit.summary
+++ b/output_files/de1_soc_wrapper.fit.summary
@@ -1,12 +1,12 @@
-Fitter Status : Successful - Thu Sep 24 11:21:05 2020
+Fitter Status : Successful - Thu Sep 24 12:53:37 2020
 Quartus Prime Version : 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 Revision Name : de1_soc_wrapper
 Top-level Entity Name : de1_soc_wrapper
 Family : Cyclone V
 Device : 5CSEMA5F31C6
 Timing Models : Final
-Logic utilization (in ALMs) : 2,040 / 32,070 ( 6 % )
-Total registers : 1256
+Logic utilization (in ALMs) : 2,031 / 32,070 ( 6 % )
+Total registers : 1270
 Total pins : 81 / 457 ( 18 % )
 Total virtual pins : 0
 Total block memory bits : 438,272 / 4,065,280 ( 11 % )
diff --git a/output_files/de1_soc_wrapper.flow.rpt b/output_files/de1_soc_wrapper.flow.rpt
index 2136c6cb73d725d1b2f24983cea0769c2a13761f..e9b771d1b203c9632835db9f7dca11a4a6a7629b 100644
--- a/output_files/de1_soc_wrapper.flow.rpt
+++ b/output_files/de1_soc_wrapper.flow.rpt
@@ -1,5 +1,5 @@
 Flow report for de1_soc_wrapper
-Thu Sep 24 11:21:34 2020
+Thu Sep 24 12:54:06 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -41,15 +41,15 @@ agreement for further details.
 +-----------------------------------------------------------------------------------+
 ; Flow Summary                                                                      ;
 +---------------------------------+-------------------------------------------------+
-; Flow Status                     ; Successful - Thu Sep 24 11:21:34 2020           ;
+; Flow Status                     ; Successful - Thu Sep 24 12:54:06 2020           ;
 ; Quartus Prime Version           ; 16.1.2 Build 203 01/18/2017 SJ Standard Edition ;
 ; Revision Name                   ; de1_soc_wrapper                                 ;
 ; Top-level Entity Name           ; de1_soc_wrapper                                 ;
 ; Family                          ; Cyclone V                                       ;
 ; Device                          ; 5CSEMA5F31C6                                    ;
 ; Timing Models                   ; Final                                           ;
-; Logic utilization (in ALMs)     ; 2,040 / 32,070 ( 6 % )                          ;
-; Total registers                 ; 1256                                            ;
+; Logic utilization (in ALMs)     ; 2,031 / 32,070 ( 6 % )                          ;
+; Total registers                 ; 1270                                            ;
 ; Total pins                      ; 81 / 457 ( 18 % )                               ;
 ; Total virtual pins              ; 0                                               ;
 ; Total block memory bits         ; 438,272 / 4,065,280 ( 11 % )                    ;
@@ -68,7 +68,7 @@ agreement for further details.
 +-------------------+---------------------+
 ; Option            ; Setting             ;
 +-------------------+---------------------+
-; Start date & time ; 09/24/2020 11:18:33 ;
+; Start date & time ; 09/24/2020 12:51:15 ;
 ; Main task         ; Compilation         ;
 ; Revision Name     ; de1_soc_wrapper     ;
 +-------------------+---------------------+
@@ -79,7 +79,7 @@ agreement for further details.
 +-------------------------------------+----------------------------------------+---------------+-------------+----------------+
 ; Assignment Name                     ; Value                                  ; Default Value ; Entity Name ; Section Id     ;
 +-------------------------------------+----------------------------------------+---------------+-------------+----------------+
-; COMPILER_SIGNATURE_ID               ; 345050572627.160094271348685           ; --            ; --          ; --             ;
+; COMPILER_SIGNATURE_ID               ; 345050572627.160094827563039           ; --            ; --          ; --             ;
 ; EDA_OUTPUT_DATA_FORMAT              ; Verilog Hdl                            ; --            ; --          ; eda_simulation ;
 ; EDA_SIMULATION_TOOL                 ; ModelSim-Altera (Verilog)              ; <None>        ; --          ; --             ;
 ; EDA_TIME_SCALE                      ; 1 ps                                   ; --            ; --          ; eda_simulation ;
@@ -97,12 +97,12 @@ agreement for further details.
 +---------------------------+--------------+-------------------------+---------------------+------------------------------------+
 ; Module Name               ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
 +---------------------------+--------------+-------------------------+---------------------+------------------------------------+
-; Analysis & Synthesis      ; 00:00:27     ; 1.0                     ; 1275 MB             ; 00:00:41                           ;
-; Fitter                    ; 00:02:04     ; 1.3                     ; 2652 MB             ; 00:12:15                           ;
-; Assembler                 ; 00:00:09     ; 1.0                     ; 1108 MB             ; 00:00:09                           ;
-; TimeQuest Timing Analyzer ; 00:00:12     ; 3.3                     ; 1570 MB             ; 00:00:30                           ;
+; Analysis & Synthesis      ; 00:00:26     ; 1.0                     ; 1255 MB             ; 00:00:40                           ;
+; Fitter                    ; 00:01:56     ; 1.3                     ; 2658 MB             ; 00:10:59                           ;
+; Assembler                 ; 00:00:09     ; 1.0                     ; 1114 MB             ; 00:00:08                           ;
+; TimeQuest Timing Analyzer ; 00:00:11     ; 3.3                     ; 1572 MB             ; 00:00:29                           ;
 ; EDA Netlist Writer        ; 00:00:03     ; 1.0                     ; 1316 MB             ; 00:00:02                           ;
-; Total                     ; 00:02:55     ; --                      ; --                  ; 00:13:37                           ;
+; Total                     ; 00:02:45     ; --                      ; --                  ; 00:12:18                           ;
 +---------------------------+--------------+-------------------------+---------------------+------------------------------------+
 
 
diff --git a/output_files/de1_soc_wrapper.map.rpt b/output_files/de1_soc_wrapper.map.rpt
index ef0fe77a96943b6ec1697af8d7fd6dc2c9e0acb7..4f59dfda7e095bbc166db3389d45e82834e6a341 100644
--- a/output_files/de1_soc_wrapper.map.rpt
+++ b/output_files/de1_soc_wrapper.map.rpt
@@ -1,5 +1,5 @@
 Analysis & Synthesis report for de1_soc_wrapper
-Thu Sep 24 11:19:00 2020
+Thu Sep 24 12:51:41 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -60,7 +60,7 @@ agreement for further details.
 +-----------------------------------------------------------------------------------+
 ; Analysis & Synthesis Summary                                                      ;
 +---------------------------------+-------------------------------------------------+
-; Analysis & Synthesis Status     ; Successful - Thu Sep 24 11:19:00 2020           ;
+; Analysis & Synthesis Status     ; Successful - Thu Sep 24 12:51:41 2020           ;
 ; Quartus Prime Version           ; 16.1.2 Build 203 01/18/2017 SJ Standard Edition ;
 ; Revision Name                   ; de1_soc_wrapper                                 ;
 ; Top-level Entity Name           ; de1_soc_wrapper                                 ;
@@ -193,7 +193,8 @@ agreement for further details.
 ;     Processor 12           ;   0.0%      ;
 ;     Processor 13           ;   0.0%      ;
 ;     Processor 14           ;   0.0%      ;
-;     Processors 15-16       ;   0.0%      ;
+;     Processor 15           ;   0.0%      ;
+;     Processor 16           ;   0.0%      ;
 +----------------------------+-------------+
 
 
@@ -801,7 +802,7 @@ Note: In order to hide this table in the UI and the text report file, please set
 Info: *******************************************************************
 Info: Running Quartus Prime Analysis & Synthesis
     Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
-    Info: Processing started: Thu Sep 24 11:18:33 2020
+    Info: Processing started: Thu Sep 24 12:51:14 2020
 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (20030): Parallel compilation is enabled and will use 16 of the 24 processors detected
@@ -937,8 +938,6 @@ Info (12133): Instantiated megafunction "arm_soc:soc_inst|ahb_ram:ram_1|altsyncr
     Info (12134): Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA"
 Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_nms1.tdf
     Info (12023): Found entity 1: altsyncram_nms1 File: /home/ks6n19/Documents/project/db/altsyncram_nms1.tdf Line: 28
-Warning (127007): Memory Initialization File or Hexadecimal (Intel-Format) File "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" contains "don't care" values -- overwriting them with 0s File: /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf Line: 792
-Warning (127007): Memory Initialization File or Hexadecimal (Intel-Format) File "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" contains "don't care" values -- overwriting them with 0s File: /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf Line: 792
 Warning (12241): 1 hierarchies have connectivity warnings - see the Connectivity Checks report folder
 Warning (13024): Output pins are stuck at VCC or GND
     Warning (13410): Pin "LEDR[0]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
@@ -997,11 +996,11 @@ Info (21057): Implemented 3988 device resources after synthesis - the final reso
     Info (21059): Implemented 66 output pins
     Info (21061): Implemented 3837 logic cells
     Info (21064): Implemented 70 RAM segments
-Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 79 warnings
-    Info: Peak virtual memory: 1276 megabytes
-    Info: Processing ended: Thu Sep 24 11:19:00 2020
+Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 77 warnings
+    Info: Peak virtual memory: 1267 megabytes
+    Info: Processing ended: Thu Sep 24 12:51:41 2020
     Info: Elapsed time: 00:00:27
-    Info: Total CPU time (on all processors): 00:00:42
+    Info: Total CPU time (on all processors): 00:00:41
 
 
 +------------------------------------------+
diff --git a/output_files/de1_soc_wrapper.map.summary b/output_files/de1_soc_wrapper.map.summary
index abf6da532ef559d822c1ebdab3c15fea402affd7..f5fc82dd17131a5a35e5f75f468074544d66bda5 100644
--- a/output_files/de1_soc_wrapper.map.summary
+++ b/output_files/de1_soc_wrapper.map.summary
@@ -1,4 +1,4 @@
-Analysis & Synthesis Status : Successful - Thu Sep 24 11:19:00 2020
+Analysis & Synthesis Status : Successful - Thu Sep 24 12:51:41 2020
 Quartus Prime Version : 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 Revision Name : de1_soc_wrapper
 Top-level Entity Name : de1_soc_wrapper
diff --git a/output_files/de1_soc_wrapper.pin b/output_files/de1_soc_wrapper.pin
index 982825e8c2720708940615a9982d831cca78c2d0..3c83e36f130935f040a2b387f9d024128f3133a3 100644
--- a/output_files/de1_soc_wrapper.pin
+++ b/output_files/de1_soc_wrapper.pin
@@ -82,15 +82,15 @@ Pin Name/Usage               : Location  : Dir.   : I/O Standard      : Voltage
 GND                          : A2        : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : A3        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : A4        :        :                   :         : 8A        :                
-LEDR[9]                      : A5        : output : 2.5 V             :         : 8A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : A5        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : A6        :        :                   :         : 8A        :                
 VCCIO8A                      : A7        : power  :                   : 2.5V    : 8A        :                
-LEDR[2]                      : A8        : output : 2.5 V             :         : 8A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : A8        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : A9        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : A10       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : A11       :        :                   :         : 8A        :                
+VGA_CLK                      : A11       : output : 2.5 V             :         : 8A        : Y              
 GND                          : A12       : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : A13       :        :                   :         : 8A        :                
+VGA_R[0]                     : A13       : output : 2.5 V             :         : 8A        : Y              
 RESERVED_INPUT_WITH_WEAK_PULLUP : A14       :        :                   :         : 7D        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : A15       :        :                   :         : 7D        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : A16       :        :                   :         : 7C        :                
@@ -119,15 +119,15 @@ GND                          : AA9       : gnd    :                   :
 VCCPD3A                      : AA10      : power  :                   : 2.5V    : 3A        :                
 GND                          : AA11      : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AA12      :        :                   :         : 3A        :                
-VGA_R[7]                     : AA13      : output : 2.5 V             :         : 3B        : N              
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA14      :        :                   :         : 3B        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AA15      :        :                   :         : 3B        :                
-HEX0[3]                      : AA16      : output : 2.5 V             :         : 4A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA13      :        :                   :         : 3B        :                
+KEY[0]                       : AA14      : input  : 2.5 V             :         : 3B        : Y              
+KEY[1]                       : AA15      : input  : 2.5 V             :         : 3B        : Y              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA16      :        :                   :         : 4A        :                
 VCCIO4A                      : AA17      : power  :                   : 2.5V    : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AA18      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AA19      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AA20      :        :                   :         : 4A        :                
-LEDR[5]                      : AA21      : output : 2.5 V             :         : 4A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA21      :        :                   :         : 4A        :                
 GND                          : AA22      : gnd    :                   :         :           :                
 VCCPGM                       : AA23      : power  :                   : 1.8V/2.5V/3.0V/3.3V :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AA24      :        :                   :         : 5A        :                
@@ -136,7 +136,7 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : AA26      :        :                   :
 VCCIO5B                      : AA27      : power  :                   : 2.5V    : 5B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AA28      :        :                   :         : 5B        :                
 VREFB5BN0                    : AA29      : power  :                   :         : 5B        :                
-HEX3[6]                      : AA30      : output : 2.5 V             :         : 5B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA30      :        :                   :         : 5B        :                
 GND                          : AB1       : gnd    :                   :         :           :                
 GND                          : AB2       : gnd    :                   :         :           :                
 DNU                          : AB3       :        :                   :         :           :                
@@ -148,25 +148,25 @@ nCSO, DATA4                  : AB8       :        :                   :
 TDO                          : AB9       : output :                   :         : 3A        :                
 VCCPGM                       : AB10      : power  :                   : 1.8V/2.5V/3.0V/3.3V :           :                
 VCC_AUX                      : AB11      : power  :                   : 2.5V    :           :                
-VGA_R[1]                     : AB12      : output : 2.5 V             :         : 3A        : N              
-HEX0[0]                      : AB13      : output : 2.5 V             :         : 3B        : N              
+SW[0]                        : AB12      : input  : 2.5 V             :         : 3A        : Y              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AB13      :        :                   :         : 3B        :                
 VCCIO3B                      : AB14      : power  :                   : 2.5V    : 3B        :                
-VGA_B[0]                     : AB15      : output : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AB15      :        :                   :         : 3B        :                
 VCC_AUX                      : AB16      : power  :                   : 2.5V    :           :                
-HEX0[4]                      : AB17      : output : 2.5 V             :         : 4A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AB17      :        :                   :         : 4A        :                
 VCCPD3B4A                    : AB18      : power  :                   : 2.5V    : 3B, 4A    :                
 GND                          : AB19      : gnd    :                   :         :           :                
 VCCPD3B4A                    : AB20      : power  :                   : 2.5V    : 3B, 4A    :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AB21      :        :                   :         : 4A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AB22      :        :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AB23      :        :                   :         : 5A        :                
+HEX3[6]                      : AB22      : output : 2.5 V             :         : 5A        : Y              
+HEX2[0]                      : AB23      : output : 2.5 V             :         : 5A        : Y              
 VCCIO5A                      : AB24      : power  :                   : 2.5V    : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AB25      :        :                   :         : 5A        :                
+HEX3[5]                      : AB25      : output : 2.5 V             :         : 5A        : Y              
 RESERVED_INPUT_WITH_WEAK_PULLUP : AB26      :        :                   :         : 5A        :                
-CLOCK_50                     : AB27      : input  : 2.5 V             :         : 5B        : N              
-HEX1[1]                      : AB28      : output : 2.5 V             :         : 5B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AB27      :        :                   :         : 5B        :                
+HEX3[4]                      : AB28      : output : 2.5 V             :         : 5B        : Y              
 GND                          : AB29      : gnd    :                   :         :           :                
-HEX1[5]                      : AB30      : output : 2.5 V             :         : 5B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AB30      :        :                   :         : 5B        :                
 GND                          : AC1       : gnd    :                   :         :           :                
 GND                          : AC2       : gnd    :                   :         :           :                
 GND                          : AC3       : gnd    :                   :         :           :                
@@ -175,10 +175,10 @@ TCK                          : AC5       : input  :                   :
 GND                          : AC6       : gnd    :                   :         :           :                
 AS_DATA3, DATA3              : AC7       :        :                   :         : 3A        :                
 GND                          : AC8       : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AC9       :        :                   :         : 3A        :                
+SW[7]                        : AC9       : input  : 2.5 V             :         : 3A        : Y              
 VCCPD3A                      : AC10      : power  :                   : 2.5V    : 3A        :                
 VCCIO3A                      : AC11      : power  :                   : 2.5V    : 3A        :                
-SW[1]                        : AC12      : input  : 2.5 V             :         : 3A        : N              
+SW[1]                        : AC12      : input  : 2.5 V             :         : 3A        : Y              
 VCCPD3B4A                    : AC13      : power  :                   : 2.5V    : 3B, 4A    :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AC14      :        :                   :         : 3B        :                
 VCCPD3B4A                    : AC15      : power  :                   : 2.5V    : 3B, 4A    :                
@@ -191,12 +191,12 @@ VCCIO4A                      : AC21      : power  :                   : 2.5V
 RESERVED_INPUT_WITH_WEAK_PULLUP : AC22      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AC23      :        :                   :         : 4A        :                
 VREFB5AN0                    : AC24      : power  :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AC25      :        :                   :         : 5A        :                
+HEX3[3]                      : AC25      : output : 2.5 V             :         : 5A        : Y              
 GND                          : AC26      : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AC27      :        :                   :         : 5A        :                
-HEX2[6]                      : AC28      : output : 2.5 V             :         : 5B        : N              
-HEX2[4]                      : AC29      : output : 2.5 V             :         : 5B        : N              
-RESERVED_INPUT_WITH_WEAK_PULLUP : AC30      :        :                   :         : 5B        :                
+HEX3[1]                      : AC27      : output : 2.5 V             :         : 5A        : Y              
+HEX2[3]                      : AC28      : output : 2.5 V             :         : 5B        : Y              
+HEX2[5]                      : AC29      : output : 2.5 V             :         : 5B        : Y              
+HEX2[6]                      : AC30      : output : 2.5 V             :         : 5B        : Y              
 GND                          : AD1       : gnd    :                   :         :           :                
 GND                          : AD2       : gnd    :                   :         :           :                
 DNU                          : AD3       :        :                   :         :           :                
@@ -206,9 +206,9 @@ VREFB3AN0                    : AD6       : power  :                   :
 RESERVED_INPUT_WITH_WEAK_PULLUP : AD7       :        :                   :         : 3A        :                
 VCCIO3A                      : AD8       : power  :                   : 2.5V    : 3A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AD9       :        :                   :         : 3A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD10      :        :                   :         : 3A        :                
-HEX2[0]                      : AD11      : output : 2.5 V             :         : 3A        : N              
-SW[5]                        : AD12      : input  : 2.5 V             :         : 3A        : N              
+SW[8]                        : AD10      : input  : 2.5 V             :         : 3A        : Y              
+SW[4]                        : AD11      : input  : 2.5 V             :         : 3A        : Y              
+SW[5]                        : AD12      : input  : 2.5 V             :         : 3A        : Y              
 VCCIO3B                      : AD13      : power  :                   : 2.5V    : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AD14      :        :                   :         : 3B        :                
 DNU                          : AD15      :        :                   :         :           :                
@@ -216,17 +216,17 @@ VCCPD3B4A                    : AD16      : power  :                   : 2.5V
 RESERVED_INPUT_WITH_WEAK_PULLUP : AD17      :        :                   :         : 4A        :                
 VCCIO4A                      : AD18      : power  :                   : 2.5V    : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AD19      :        :                   :         : 4A        :                
-HEX3[2]                      : AD20      : output : 2.5 V             :         : 4A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD20      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AD21      :        :                   :         : 4A        :                
 VCC_AUX                      : AD22      : power  :                   : 2.5V    :           :                
 GND                          : AD23      : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AD24      :        :                   :         : 4A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD25      :        :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD26      :        :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD27      :        :                   :         : 5A        :                
+HEX3[2]                      : AD25      : output : 2.5 V             :         : 5A        : Y              
+HEX3[0]                      : AD26      : output : 2.5 V             :         : 5A        : Y              
+HEX1[6]                      : AD27      : output : 2.5 V             :         : 5A        : Y              
 VCCIO5A                      : AD28      : power  :                   : 2.5V    : 5A        :                
-LEDR[4]                      : AD29      : output : 2.5 V             :         : 5B        : N              
-RESERVED_INPUT_WITH_WEAK_PULLUP : AD30      :        :                   :         : 5B        :                
+HEX2[2]                      : AD29      : output : 2.5 V             :         : 5B        : Y              
+HEX2[4]                      : AD30      : output : 2.5 V             :         : 5B        : Y              
 GND                          : AE1       : gnd    :                   :         :           :                
 GND                          : AE2       : gnd    :                   :         :           :                
 GND                          : AE3       : gnd    :                   :         :           :                
@@ -237,14 +237,14 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : AE7       :        :                   :
 AS_DATA2, DATA2              : AE8       :        :                   :         : 3A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AE9       :        :                   :         : 3A        :                
 GND                          : AE10      : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE11      :        :                   :         : 3A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE12      :        :                   :         : 3A        :                
-VGA_B[5]                     : AE13      : output : 2.5 V             :         : 3B        : N              
+SW[6]                        : AE11      : input  : 2.5 V             :         : 3A        : Y              
+SW[9]                        : AE12      : input  : 2.5 V             :         : 3A        : Y              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE13      :        :                   :         : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AE14      :        :                   :         : 3B        :                
 VCCIO3B                      : AE15      : power  :                   : 2.5V    : 3B        :                
-HEX0[6]                      : AE16      : output : 2.5 V             :         : 4A        : N              
-HEX2[1]                      : AE17      : output : 2.5 V             :         : 4A        : N              
-VGA_G[2]                     : AE18      : output : 2.5 V             :         : 4A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE16      :        :                   :         : 4A        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE17      :        :                   :         : 4A        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE18      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AE19      :        :                   :         : 4A        :                
 GND                          : AE20      : gnd    :                   :         :           :                
 VCCPD3B4A                    : AE21      : power  :                   : 2.5V    : 3B, 4A    :                
@@ -252,10 +252,10 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : AE22      :        :                   :
 RESERVED_INPUT_WITH_WEAK_PULLUP : AE23      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AE24      :        :                   :         : 4A        :                
 VCCIO4A                      : AE25      : power  :                   : 2.5V    : 4A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE26      :        :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE27      :        :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE28      :        :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AE29      :        :                   :         : 5B        :                
+HEX0[0]                      : AE26      : output : 2.5 V             :         : 5A        : Y              
+HEX0[1]                      : AE27      : output : 2.5 V             :         : 5A        : Y              
+HEX0[2]                      : AE28      : output : 2.5 V             :         : 5A        : Y              
+HEX2[1]                      : AE29      : output : 2.5 V             :         : 5B        : Y              
 VCCIO5B                      : AE30      : power  :                   : 2.5V    : 5B        :                
 GND                          : AF1       : gnd    :                   :         :           :                
 GND                          : AF2       : gnd    :                   :         :           :                
@@ -265,14 +265,14 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : AF5       :        :                   :
 RESERVED_INPUT_WITH_WEAK_PULLUP : AF6       :        :                   :         : 3A        :                
 VCCIO3A                      : AF7       : power  :                   : 2.5V    : 3A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AF8       :        :                   :         : 3A        :                
-VGA_B[2]                     : AF9       : output : 2.5 V             :         : 3A        : N              
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF10      :        :                   :         : 3A        :                
+SW[2]                        : AF9       : input  : 2.5 V             :         : 3A        : Y              
+SW[3]                        : AF10      : input  : 2.5 V             :         : 3A        : Y              
 RESERVED_INPUT_WITH_WEAK_PULLUP : AF11      :        :                   :         : 3B        :                
 GND                          : AF12      : gnd    :                   :         :           :                
-HEX3[1]                      : AF13      : output : 2.5 V             :         : 3B        : N              
-VGA_VS                       : AF14      : output : 2.5 V             :         : 3B        : N              
-VGA_BLANK_N                  : AF15      : output : 2.5 V             :         : 3B        : N              
-VGA_CLK                      : AF16      : output : 2.5 V             :         : 4A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF13      :        :                   :         : 3B        :                
+CLOCK_50                     : AF14      : input  : 2.5 V             :         : 3B        : Y              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF15      :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF16      :        :                   :         : 4A        :                
 GND                          : AF17      : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AF18      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AF19      :        :                   :         : 4A        :                
@@ -284,21 +284,21 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : AF24      :        :                   :
 RESERVED_INPUT_WITH_WEAK_PULLUP : AF25      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AF26      :        :                   :         : 4A        :                
 GND                          : AF27      : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF28      :        :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF29      :        :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AF30      :        :                   :         : 5A        :                
-LEDR[6]                      : AG1       : output : 2.5 V             :         : 3A        : N              
+HEX0[4]                      : AF28      : output : 2.5 V             :         : 5A        : Y              
+HEX1[4]                      : AF29      : output : 2.5 V             :         : 5A        : Y              
+HEX1[5]                      : AF30      : output : 2.5 V             :         : 5A        : Y              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG1       :        :                   :         : 3A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AG2       :        :                   :         : 3A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AG3       :        :                   :         : 3A        :                
 VCCIO3A                      : AG4       : power  :                   : 2.5V    : 3A        :                
-KEY[0]                       : AG5       : input  : 2.5 V             :         : 3A        : N              
-VGA_R[3]                     : AG6       : output : 2.5 V             :         : 3A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG5       :        :                   :         : 3A        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG6       :        :                   :         : 3A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AG7       :        :                   :         : 3A        :                
-HEX1[4]                      : AG8       : output : 2.5 V             :         : 3A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG8       :        :                   :         : 3A        :                
 GND                          : AG9       : gnd    :                   :         :           :                
-SW[2]                        : AG10      : input  : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG10      :        :                   :         : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AG11      :        :                   :         : 3B        :                
-SW[0]                        : AG12      : input  : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG12      :        :                   :         : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AG13      :        :                   :         : 3B        :                
 GND                          : AG14      : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AG15      :        :                   :         : 3B        :                
@@ -313,10 +313,10 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : AG23      :        :                   :
 GND                          : AG24      : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AG25      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AG26      :        :                   :         : 4A        :                
-HEX3[0]                      : AG27      : output : 2.5 V             :         : 5A        : N              
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG28      :        :                   :         : 5A        :                
+HEX0[3]                      : AG27      : output : 2.5 V             :         : 5A        : Y              
+HEX0[5]                      : AG28      : output : 2.5 V             :         : 5A        : Y              
 VCCIO5A                      : AG29      : power  :                   : 2.5V    : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AG30      :        :                   :         : 5A        :                
+HEX1[3]                      : AG30      : output : 2.5 V             :         : 5A        : Y              
 GND                          : AH1       : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH2       :        :                   :         : 3A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH3       :        :                   :         : 3A        :                
@@ -324,39 +324,39 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : AH4       :        :                   :
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH5       :        :                   :         : 3A        :                
 GND                          : AH6       : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH7       :        :                   :         : 3B        :                
-SW[9]                        : AH8       : input  : 2.5 V             :         : 3B        : N              
-KEY[1]                       : AH9       : input  : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH8       :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH9       :        :                   :         : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH10      :        :                   :         : 3B        :                
 GND                          : AH11      : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH12      :        :                   :         : 3B        :                
-VGA_R[2]                     : AH13      : output : 2.5 V             :         : 3B        : N              
-VGA_R[0]                     : AH14      : output : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH13      :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH14      :        :                   :         : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH15      :        :                   :         : 3B        :                
 VCCIO4A                      : AH16      : power  :                   : 2.5V    : 4A        :                
-VGA_G[1]                     : AH17      : output : 2.5 V             :         : 4A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH17      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH18      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH19      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH20      :        :                   :         : 4A        :                
 GND                          : AH21      : gnd    :                   :         :           :                
-VGA_G[7]                     : AH22      : output : 2.5 V             :         : 4A        : N              
-LEDR[3]                      : AH23      : output : 2.5 V             :         : 4A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH22      :        :                   :         : 4A        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH23      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH24      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH25      :        :                   :         : 4A        :                
 VCCIO4A                      : AH26      : power  :                   : 2.5V    : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AH27      :        :                   :         : 4A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH28      :        :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AH29      :        :                   :         : 5A        :                
-VGA_B[4]                     : AH30      : output : 2.5 V             :         : 5A        : N              
-VGA_R[5]                     : AJ1       : output : 2.5 V             :         : 3A        : N              
+HEX0[6]                      : AH28      : output : 2.5 V             :         : 5A        : Y              
+HEX1[1]                      : AH29      : output : 2.5 V             :         : 5A        : Y              
+HEX1[2]                      : AH30      : output : 2.5 V             :         : 5A        : Y              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ1       :        :                   :         : 3A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AJ2       :        :                   :         : 3A        :                
 GND                          : AJ3       : gnd    :                   :         :           :                
-VGA_R[4]                     : AJ4       : output : 2.5 V             :         : 3B        : N              
-SW[3]                        : AJ5       : input  : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ4       :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ5       :        :                   :         : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AJ6       :        :                   :         : 3B        :                
-HEX1[0]                      : AJ7       : output : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ7       :        :                   :         : 3B        :                
 VCCIO3B                      : AJ8       : power  :                   : 2.5V    : 3B        :                
-HEX1[6]                      : AJ9       : output : 2.5 V             :         : 3B        : N              
-HEX3[5]                      : AJ10      : output : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ9       :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ10      :        :                   :         : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AJ11      :        :                   :         : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AJ12      :        :                   :         : 3B        :                
 VCCIO3B                      : AJ13      : power  :                   : 2.5V    : 3B        :                
@@ -375,23 +375,23 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : AJ25      :        :                   :
 RESERVED_INPUT_WITH_WEAK_PULLUP : AJ26      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AJ27      :        :                   :         : 4A        :                
 GND                          : AJ28      : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : AJ29      :        :                   :         : 5A        :                
+HEX1[0]                      : AJ29      : output : 2.5 V             :         : 5A        : Y              
 GND                          : AJ30      : gnd    :                   :         :           :                
-SW[7]                        : AK2       : input  : 2.5 V             :         : 3B        : N              
-SW[4]                        : AK3       : input  : 2.5 V             :         : 3B        : N              
-SW[6]                        : AK4       : input  : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK2       :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK3       :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK4       :        :                   :         : 3B        :                
 GND                          : AK5       : gnd    :                   :         :           :                
-VGA_R[6]                     : AK6       : output : 2.5 V             :         : 3B        : N              
-SW[8]                        : AK7       : input  : 2.5 V             :         : 3B        : N              
-HEX3[4]                      : AK8       : output : 2.5 V             :         : 3B        : N              
-VGA_G[5]                     : AK9       : output : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK6       :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK7       :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK8       :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK9       :        :                   :         : 3B        :                
 VCCIO3B                      : AK10      : power  :                   : 2.5V    : 3B        :                
-HEX3[3]                      : AK11      : output : 2.5 V             :         : 3B        : N              
-VGA_HS                       : AK12      : output : 2.5 V             :         : 3B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK11      :        :                   :         : 3B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK12      :        :                   :         : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AK13      :        :                   :         : 3B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AK14      :        :                   :         : 3B        :                
 GND                          : AK15      : gnd    :                   :         :           :                
-LEDR[7]                      : AK16      : output : 2.5 V             :         : 4A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK16      :        :                   :         : 4A        :                
 VREFB4AN0                    : AK17      : power  :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AK18      :        :                   :         : 4A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : AK19      :        :                   :         : 4A        :                
@@ -415,9 +415,9 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : B7        :        :                   :
 RESERVED_INPUT_WITH_WEAK_PULLUP : B8        :        :                   :         : 8A        :                
 GND                          : B9        : gnd    :                   :         :           :                
 VREFB8AN0                    : B10       : power  :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : B11       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : B12       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : B13       :        :                   :         : 8A        :                
+VGA_HS                       : B11       : output : 2.5 V             :         : 8A        : Y              
+VGA_R[3]                     : B12       : output : 2.5 V             :         : 8A        : Y              
+VGA_B[0]                     : B13       : output : 2.5 V             :         : 8A        : Y              
 GND                          : B14       : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : B15       :        :                   :         : 7D        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : B16       :        :                   :         : 7C        :                
@@ -441,13 +441,13 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : C3        :        :                   :
 RESERVED_INPUT_WITH_WEAK_PULLUP : C4        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : C5        :        :                   :         : 8A        :                
 GND                          : C6        : gnd    :                   :         :           :                
-VGA_G[3]                     : C7        : output : 2.5 V             :         : 8A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : C7        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : C8        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : C9        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : C10       :        :                   :         : 8A        :                
 VCCIO8A                      : C11       : power  :                   : 2.5V    : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : C12       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : C13       :        :                   :         : 8A        :                
+VGA_R[4]                     : C12       : output : 2.5 V             :         : 8A        : Y              
+VGA_R[1]                     : C13       : output : 2.5 V             :         : 8A        : Y              
 RESERVED_INPUT_WITH_WEAK_PULLUP : C14       :        :                   :         : 7D        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : C15       :        :                   :         : 7D        :                
 GND                          : C16       : gnd    :                   :         :           :                
@@ -468,15 +468,15 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : C30       :        :                   :
 RESERVED_INPUT_WITH_WEAK_PULLUP : D1        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : D2        :        :                   :         : 8A        :                
 GND                          : D3        : gnd    :                   :         :           :                
-VGA_B[1]                     : D4        : output : 2.5 V             :         : 8A        : N              
-VGA_B[3]                     : D5        : output : 2.5 V             :         : 8A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : D4        :        :                   :         : 8A        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : D5        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : D6        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : D7        :        :                   :         : 8A        :                
 VCCIO8A                      : D8        : power  :                   : 2.5V    : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : D9        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : D10       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : D11       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : D12       :        :                   :         : 8A        :                
+VGA_VS                       : D11       : output : 2.5 V             :         : 8A        : Y              
+VGA_R[5]                     : D12       : output : 2.5 V             :         : 8A        : Y              
 GND                          : D13       : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : D14       :        :                   :         : 7D        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : D15       :        :                   :         : 7D        :                
@@ -496,18 +496,18 @@ VCCIO6A_HPS                  : D28       : power  :                   : 2.5V
 RESERVED_INPUT_WITH_WEAK_PULLUP : D29       :        :                   :         : 6A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : D30       :        :                   :         : 6A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : E1        :        :                   :         : 8A        :                
-VGA_B[7]                     : E2        : output : 2.5 V             :         : 8A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : E2        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : E3        :        :                   :         : 8A        :                
-VGA_B[6]                     : E4        : output : 2.5 V             :         : 8A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : E4        :        :                   :         : 8A        :                
 VCCIO8A                      : E5        : power  :                   : 2.5V    : 8A        :                
-HEX0[1]                      : E6        : output : 2.5 V             :         : 8A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : E6        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : E7        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : E8        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : E9        :        :                   :         : 8A        :                
 GND                          : E10       : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : E11       :        :                   :         : 8A        :                
-HEX2[2]                      : E12       : output : 2.5 V             :         : 8A        : N              
-RESERVED_INPUT_WITH_WEAK_PULLUP : E13       :        :                   :         : 8A        :                
+VGA_G[7]                     : E11       : output : 2.5 V             :         : 8A        : Y              
+VGA_R[6]                     : E12       : output : 2.5 V             :         : 8A        : Y              
+VGA_R[2]                     : E13       : output : 2.5 V             :         : 8A        : Y              
 RESERVED_INPUT_WITH_WEAK_PULLUP : E14       :        :                   :         : 7D        :                
 VCCIO7D_HPS                  : E15       : power  :                   : 2.5V    : 7D        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : E16       :        :                   :         : 7D        :                
@@ -534,12 +534,12 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : F6        :        :                   :
 GND                          : F7        : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : F8        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : F9        :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : F10       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : F11       :        :                   :         : 8A        :                
+VGA_BLANK_N                  : F10       : output : 2.5 V             :         : 8A        : Y              
+VGA_G[6]                     : F11       : output : 2.5 V             :         : 8A        : Y              
 VCCIO8A                      : F12       : power  :                   : 2.5V    : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : F13       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : F14       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : F15       :        :                   :         : 8A        :                
+VGA_R[7]                     : F13       : output : 2.5 V             :         : 8A        : Y              
+VGA_B[3]                     : F14       : output : 2.5 V             :         : 8A        : Y              
+VGA_B[5]                     : F15       : output : 2.5 V             :         : 8A        : Y              
 RESERVED_INPUT_WITH_WEAK_PULLUP : F16       :        :                   :         : 7D        :                
 GND                          : F17       : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : F18       :        :                   :         : 7C        :                
@@ -561,15 +561,15 @@ GND                          : G3        : gnd    :                   :
 GND                          : G4        : gnd    :                   :         :           :                
 nCE                          : G5        :        :                   :         : 9A        :                
 MSEL2                        : G6        :        :                   :         : 9A        :                
-LEDR[1]                      : G7        : output : 2.5 V             :         : 8A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : G7        :        :                   :         : 8A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : G8        :        :                   :         : 8A        :                
 VCCIO8A                      : G9        : power  :                   : 2.5V    : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : G10       :        :                   :         : 8A        :                
-HEX1[3]                      : G11       : output : 2.5 V             :         : 8A        : N              
-RESERVED_INPUT_WITH_WEAK_PULLUP : G12       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : G13       :        :                   :         : 8A        :                
+VGA_G[3]                     : G10       : output : 2.5 V             :         : 8A        : Y              
+VGA_G[4]                     : G11       : output : 2.5 V             :         : 8A        : Y              
+VGA_G[5]                     : G12       : output : 2.5 V             :         : 8A        : Y              
+VGA_B[1]                     : G13       : output : 2.5 V             :         : 8A        : Y              
 VCCIO8A                      : G14       : power  :                   : 2.5V    : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : G15       :        :                   :         : 8A        :                
+VGA_B[6]                     : G15       : output : 2.5 V             :         : 8A        : Y              
 RESERVED_INPUT_WITH_WEAK_PULLUP : G16       :        :                   :         : 7D        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : G17       :        :                   :         : 7C        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : G18       :        :                   :         : 7C        :                
@@ -591,14 +591,14 @@ DNU                          : H3        :        :                   :
 DNU                          : H4        :        :                   :         :           :                
 GND                          : H5        : gnd    :                   :         :           :                
 VCCIO8A                      : H6        : power  :                   : 2.5V    : 8A        :                
-HEX2[3]                      : H7        : output : 2.5 V             :         : 8A        : N              
-LEDR[0]                      : H8        : output : 2.5 V             :         : 8A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : H7        :        :                   :         : 8A        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : H8        :        :                   :         : 8A        :                
 VCCBAT                       : H9        : power  :                   : 1.2V    :           :                
 VCC_AUX                      : H10       : power  :                   : 2.5V    :           :                
 GND                          : H11       : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : H12       :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : H13       :        :                   :         : 8A        :                
-VGA_G[6]                     : H14       : output : 2.5 V             :         : 8A        : N              
+VGA_G[2]                     : H12       : output : 2.5 V             :         : 8A        : Y              
+VGA_B[2]                     : H13       : output : 2.5 V             :         : 8A        : Y              
+VGA_B[4]                     : H14       : output : 2.5 V             :         : 8A        : Y              
 RESERVED_INPUT_WITH_WEAK_PULLUP : H15       :        :                   :         : 8A        :                
 VCCIO7D_HPS                  : H16       : power  :                   : 2.5V    : 7D        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : H17       :        :                   :         : 7C        :                
@@ -623,12 +623,12 @@ nCONFIG                      : J5        :        :                   :
 GND                          : J6        :        :                   :         : 9A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : J7        :        :                   :         : 8A        :                
 GND                          : J8        : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : J9        :        :                   :         : 8A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : J10       :        :                   :         : 8A        :                
+VGA_G[0]                     : J9        : output : 2.5 V             :         : 8A        : Y              
+VGA_G[1]                     : J10       : output : 2.5 V             :         : 8A        : Y              
 VCCPGM                       : J11       : power  :                   : 1.8V/2.5V/3.0V/3.3V :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : J12       :        :                   :         : 8A        :                
 VCCIO8A                      : J13       : power  :                   : 2.5V    : 8A        :                
-HEX0[5]                      : J14       : output : 2.5 V             :         : 8A        : N              
+VGA_B[7]                     : J14       : output : 2.5 V             :         : 8A        : Y              
 DNU                          : J15       :        :                   :         :           :                
 VCC_AUX                      : J16       : power  :                   : 2.5V    :           :                
 VCCPD7C_HPS                  : J17       : power  :                   : 2.5V    : 7C        :                
@@ -900,9 +900,9 @@ GND                          : V12       : gnd    :                   :
 VCC                          : V13       : power  :                   : 1.1V    :           :                
 GND                          : V14       : gnd    :                   :         :           :                
 VCC                          : V15       : power  :                   : 1.1V    :           :                
-HEX1[2]                      : V16       : output : 2.5 V             :         : 4A        : N              
-RESERVED_INPUT_WITH_WEAK_PULLUP : V17       :        :                   :         : 4A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : V18       :        :                   :         : 4A        :                
+LEDR[0]                      : V16       : output : 2.5 V             :         : 4A        : Y              
+LEDR[2]                      : V17       : output : 2.5 V             :         : 4A        : Y              
+LEDR[3]                      : V18       : output : 2.5 V             :         : 4A        : Y              
 GND                          : V19       : gnd    :                   :         :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : V20       :        :                   :         : 6B        :                
 GND                          : V21       : gnd    :                   :         :           :                
@@ -929,13 +929,13 @@ GND                          : W11       : gnd    :                   :
 VCC                          : W12       : power  :                   : 1.1V    :           :                
 GND                          : W13       : gnd    :                   :         :           :                
 VCC                          : W14       : power  :                   : 1.1V    :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : W15       :        :                   :         : 3B        :                
-HEX0[2]                      : W16       : output : 2.5 V             :         : 4A        : N              
-RESERVED_INPUT_WITH_WEAK_PULLUP : W17       :        :                   :         : 4A        :                
+KEY[2]                       : W15       : input  : 2.5 V             :         : 3B        : Y              
+LEDR[1]                      : W16       : output : 2.5 V             :         : 4A        : Y              
+LEDR[4]                      : W17       : output : 2.5 V             :         : 4A        : Y              
 GND                          : W18       : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : W19       :        :                   :         : 4A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : W20       :        :                   :         : 5A        :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : W21       :        :                   :         : 5A        :                
+LEDR[5]                      : W19       : output : 2.5 V             :         : 4A        : Y              
+LEDR[7]                      : W20       : output : 2.5 V             :         : 5A        : Y              
+LEDR[8]                      : W21       : output : 2.5 V             :         : 5A        : Y              
 RESERVED_INPUT_WITH_WEAK_PULLUP : W22       :        :                   :         : 5A        :                
 VCCIO5A                      : W23       : power  :                   : 2.5V    : 5A        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : W24       :        :                   :         : 5A        :                
@@ -960,18 +960,18 @@ GND                          : Y12       : gnd    :                   :
 VCC                          : Y13       : power  :                   : 1.1V    :           :                
 GND                          : Y14       : gnd    :                   :         :           :                
 GND                          : Y15       : gnd    :                   :         :           :                
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y16       :        :                   :         : 3B        :                
-HEX2[5]                      : Y17       : output : 2.5 V             :         : 4A        : N              
-VGA_G[0]                     : Y18       : output : 2.5 V             :         : 4A        : N              
-RESERVED_INPUT_WITH_WEAK_PULLUP : Y19       :        :                   :         : 4A        :                
+KEY[3]                       : Y16       : input  : 2.5 V             :         : 3B        : Y              
+RESERVED_INPUT_WITH_WEAK_PULLUP : Y17       :        :                   :         : 4A        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : Y18       :        :                   :         : 4A        :                
+LEDR[6]                      : Y19       : output : 2.5 V             :         : 4A        : Y              
 GND                          : Y20       : gnd    :                   :         :           :                
-LEDR[8]                      : Y21       : output : 2.5 V             :         : 5A        : N              
+LEDR[9]                      : Y21       : output : 2.5 V             :         : 5A        : Y              
 VCCA_FPLL                    : Y22       : power  :                   : 2.5V    :           :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : Y23       :        :                   :         : 5A        :                
-VGA_G[4]                     : Y24       : output : 2.5 V             :         : 5A        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : Y24       :        :                   :         : 5A        :                
 GND                          : Y25       : gnd    :                   :         :           :                
-KEY[3]                       : Y26       : input  : 2.5 V             :         : 5B        : N              
-KEY[2]                       : Y27       : input  : 2.5 V             :         : 5B        : N              
+RESERVED_INPUT_WITH_WEAK_PULLUP : Y26       :        :                   :         : 5B        :                
+RESERVED_INPUT_WITH_WEAK_PULLUP : Y27       :        :                   :         : 5B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : Y28       :        :                   :         : 6B        :                
 RESERVED_INPUT_WITH_WEAK_PULLUP : Y29       :        :                   :         : 6B        :                
 GND                          : Y30       : gnd    :                   :         :           :                
diff --git a/output_files/de1_soc_wrapper.sof b/output_files/de1_soc_wrapper.sof
index e39618132809e86a144907ea8f473e6c8f1094a0..c9764a8c3a9269425b12a1ac1a13c044c9716332 100644
Binary files a/output_files/de1_soc_wrapper.sof and b/output_files/de1_soc_wrapper.sof differ
diff --git a/output_files/de1_soc_wrapper.sta.rpt b/output_files/de1_soc_wrapper.sta.rpt
index bb1c2dbcd90d83f6b5d09f00397413f99b183cb1..9a25cb9fb1386e6e1af006549e95213f58b3e696 100644
--- a/output_files/de1_soc_wrapper.sta.rpt
+++ b/output_files/de1_soc_wrapper.sta.rpt
@@ -1,5 +1,5 @@
 TimeQuest Timing Analyzer report for de1_soc_wrapper
-Thu Sep 24 11:21:30 2020
+Thu Sep 24 12:54:02 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -100,21 +100,21 @@ agreement for further details.
 ; Number detected on machine ; 24          ;
 ; Maximum allowed            ; 16          ;
 ;                            ;             ;
-; Average used               ; 3.26        ;
+; Average used               ; 3.27        ;
 ; Maximum used               ; 16          ;
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;  25.0%      ;
-;     Processor 3            ;  24.8%      ;
-;     Processor 4            ;  24.7%      ;
-;     Processor 5            ;  12.6%      ;
-;     Processor 6            ;  12.6%      ;
-;     Processor 7            ;  12.6%      ;
-;     Processor 8            ;  12.6%      ;
-;     Processor 9            ;  12.6%      ;
-;     Processor 10           ;  12.6%      ;
-;     Processor 11           ;  12.6%      ;
+;     Processor 2            ;  25.1%      ;
+;     Processor 3            ;  25.0%      ;
+;     Processor 4            ;  24.9%      ;
+;     Processor 5            ;  12.7%      ;
+;     Processor 6            ;  12.7%      ;
+;     Processor 7            ;  12.7%      ;
+;     Processor 8            ;  12.7%      ;
+;     Processor 9            ;  12.7%      ;
+;     Processor 10           ;  12.7%      ;
+;     Processor 11           ;  12.7%      ;
 ;     Processor 12           ;  12.6%      ;
 ;     Processor 13           ;  12.6%      ;
 ;     Processor 14           ;  12.6%      ;
@@ -137,7 +137,7 @@ agreement for further details.
 +-----------+-----------------+------------+------+
 ; Fmax      ; Restricted Fmax ; Clock Name ; Note ;
 +-----------+-----------------+------------+------+
-; 76.24 MHz ; 76.24 MHz       ; CLOCK_50   ;      ;
+; 85.35 MHz ; 85.35 MHz       ; CLOCK_50   ;      ;
 +-----------+-----------------+------------+------+
 This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
 
@@ -153,7 +153,7 @@ HTML report is unavailable in plain text report export.
 +----------+---------+----------------+
 ; Clock    ; Slack   ; End Point TNS  ;
 +----------+---------+----------------+
-; CLOCK_50 ; -12.117 ; -23738.417     ;
+; CLOCK_50 ; -10.717 ; -21621.074     ;
 +----------+---------+----------------+
 
 
@@ -162,7 +162,7 @@ HTML report is unavailable in plain text report export.
 +----------+-------+-----------------+
 ; Clock    ; Slack ; End Point TNS   ;
 +----------+-------+-----------------+
-; CLOCK_50 ; 0.360 ; 0.000           ;
+; CLOCK_50 ; 0.372 ; 0.000           ;
 +----------+-------+-----------------+
 
 
@@ -183,7 +183,7 @@ No paths to report.
 +----------+--------+-------------------------------+
 ; Clock    ; Slack  ; End Point TNS                 ;
 +----------+--------+-------------------------------+
-; CLOCK_50 ; -2.636 ; -9178.515                     ;
+; CLOCK_50 ; -2.636 ; -9168.793                     ;
 +----------+--------+-------------------------------+
 
 
@@ -198,7 +198,7 @@ No synchronizer chains to report.
 +-----------+-----------------+------------+------+
 ; Fmax      ; Restricted Fmax ; Clock Name ; Note ;
 +-----------+-----------------+------------+------+
-; 77.39 MHz ; 77.39 MHz       ; CLOCK_50   ;      ;
+; 87.05 MHz ; 87.05 MHz       ; CLOCK_50   ;      ;
 +-----------+-----------------+------------+------+
 This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
 
@@ -208,7 +208,7 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp
 +----------+---------+---------------+
 ; Clock    ; Slack   ; End Point TNS ;
 +----------+---------+---------------+
-; CLOCK_50 ; -11.922 ; -23014.909    ;
+; CLOCK_50 ; -10.487 ; -20926.712    ;
 +----------+---------+---------------+
 
 
@@ -217,7 +217,7 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp
 +----------+-------+----------------+
 ; Clock    ; Slack ; End Point TNS  ;
 +----------+-------+----------------+
-; CLOCK_50 ; 0.320 ; 0.000          ;
+; CLOCK_50 ; 0.369 ; 0.000          ;
 +----------+-------+----------------+
 
 
@@ -238,7 +238,7 @@ No paths to report.
 +----------+--------+------------------------------+
 ; Clock    ; Slack  ; End Point TNS                ;
 +----------+--------+------------------------------+
-; CLOCK_50 ; -2.636 ; -9227.462                    ;
+; CLOCK_50 ; -2.636 ; -9200.409                    ;
 +----------+--------+------------------------------+
 
 
@@ -253,7 +253,7 @@ No synchronizer chains to report.
 +----------+--------+-----------------+
 ; Clock    ; Slack  ; End Point TNS   ;
 +----------+--------+-----------------+
-; CLOCK_50 ; -7.015 ; -13385.378      ;
+; CLOCK_50 ; -6.177 ; -12052.251      ;
 +----------+--------+-----------------+
 
 
@@ -283,7 +283,7 @@ No paths to report.
 +----------+--------+-------------------------------+
 ; Clock    ; Slack  ; End Point TNS                 ;
 +----------+--------+-------------------------------+
-; CLOCK_50 ; -2.636 ; -8567.649                     ;
+; CLOCK_50 ; -2.636 ; -8584.106                     ;
 +----------+--------+-------------------------------+
 
 
@@ -298,7 +298,7 @@ No synchronizer chains to report.
 +----------+--------+----------------+
 ; Clock    ; Slack  ; End Point TNS  ;
 +----------+--------+----------------+
-; CLOCK_50 ; -6.180 ; -11655.282     ;
+; CLOCK_50 ; -5.437 ; -10407.325     ;
 +----------+--------+----------------+
 
 
@@ -307,7 +307,7 @@ No synchronizer chains to report.
 +----------+-------+----------------+
 ; Clock    ; Slack ; End Point TNS  ;
 +----------+-------+----------------+
-; CLOCK_50 ; 0.172 ; 0.000          ;
+; CLOCK_50 ; 0.171 ; 0.000          ;
 +----------+-------+----------------+
 
 
@@ -328,7 +328,7 @@ No paths to report.
 +----------+--------+------------------------------+
 ; Clock    ; Slack  ; End Point TNS                ;
 +----------+--------+------------------------------+
-; CLOCK_50 ; -2.636 ; -8570.738                    ;
+; CLOCK_50 ; -2.636 ; -8588.168                    ;
 +----------+--------+------------------------------+
 
 
@@ -343,10 +343,10 @@ No synchronizer chains to report.
 +------------------+------------+-------+----------+---------+---------------------+
 ; Clock            ; Setup      ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
 +------------------+------------+-------+----------+---------+---------------------+
-; Worst-case Slack ; -12.117    ; 0.172 ; N/A      ; N/A     ; -2.636              ;
-;  CLOCK_50        ; -12.117    ; 0.172 ; N/A      ; N/A     ; -2.636              ;
-; Design-wide TNS  ; -23738.417 ; 0.0   ; 0.0      ; 0.0     ; -9227.462           ;
-;  CLOCK_50        ; -23738.417 ; 0.000 ; N/A      ; N/A     ; -9227.462           ;
+; Worst-case Slack ; -10.717    ; 0.171 ; N/A      ; N/A     ; -2.636              ;
+;  CLOCK_50        ; -10.717    ; 0.171 ; N/A      ; N/A     ; -2.636              ;
+; Design-wide TNS  ; -21621.074 ; 0.0   ; 0.0      ; 0.0     ; -9200.409           ;
+;  CLOCK_50        ; -21621.074 ; 0.000 ; N/A      ; N/A     ; -9200.409           ;
 +------------------+------------+-------+----------+---------+---------------------+
 
 
@@ -453,70 +453,70 @@ No synchronizer chains to report.
 ; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
 +-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
 ; LEDR[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; LEDR[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; LEDR[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; LEDR[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; LEDR[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; LEDR[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
+; LEDR[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; LEDR[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
+; LEDR[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
+; LEDR[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; LEDR[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
 ; LEDR[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; LEDR[7]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; LEDR[8]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; LEDR[9]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX0[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; HEX0[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX0[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; HEX0[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; HEX0[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; HEX0[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; HEX0[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX1[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX1[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX1[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; HEX1[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; HEX1[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX1[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; HEX1[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX2[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; HEX2[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; HEX2[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; HEX2[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; HEX2[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX2[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; HEX2[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX3[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; LEDR[7]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
+; LEDR[8]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
+; LEDR[9]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; HEX0[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX0[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX0[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX0[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX0[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX0[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX0[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX1[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX1[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX1[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX1[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX1[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX1[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX1[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX2[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; HEX2[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX2[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX2[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX2[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX2[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX2[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX3[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
 ; HEX3[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
 ; HEX3[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
 ; HEX3[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; HEX3[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX3[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; HEX3[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX3[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; HEX3[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; HEX3[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
+; VGA_R[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; VGA_R[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
+; VGA_R[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; VGA_R[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
 ; VGA_R[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; VGA_R[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; VGA_R[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; VGA_R[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
 ; VGA_R[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; VGA_G[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; VGA_G[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; VGA_G[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
+; VGA_G[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; VGA_G[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
 ; VGA_G[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; VGA_G[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
 ; VGA_G[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; VGA_B[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; VGA_B[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; VGA_B[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; VGA_B[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; VGA_B[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; VGA_G[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; VGA_B[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
 ; VGA_B[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; VGA_B[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; VGA_B[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
-; VGA_HS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; VGA_B[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
+; VGA_HS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
 ; VGA_VS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.6e-07 V                    ; 2.41 V              ; -0.0463 V           ; 0.201 V                              ; 0.131 V                              ; 4.61e-10 s                  ; 4.53e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.6e-07 V                   ; 2.41 V             ; -0.0463 V          ; 0.201 V                             ; 0.131 V                             ; 4.61e-10 s                 ; 4.53e-10 s                 ; No                        ; Yes                       ;
-; VGA_CLK     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0557 V           ; 0.175 V                              ; 0.114 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0557 V          ; 0.175 V                             ; 0.114 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
+; VGA_CLK     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.52e-07 V                   ; 2.42 V              ; -0.0568 V           ; 0.173 V                              ; 0.113 V                              ; 4.5e-10 s                   ; 4.35e-10 s                  ; No                         ; No                         ; 2.32 V                      ; 3.52e-07 V                  ; 2.42 V             ; -0.0568 V          ; 0.173 V                             ; 0.113 V                             ; 4.5e-10 s                  ; 4.35e-10 s                 ; No                        ; No                        ;
 ; VGA_BLANK_N ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.07e-07 V                   ; 2.36 V              ; -0.0231 V           ; 0.14 V                               ; 0.089 V                              ; 4.52e-10 s                  ; 4.35e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.07e-07 V                  ; 2.36 V             ; -0.0231 V          ; 0.14 V                              ; 0.089 V                             ; 4.52e-10 s                 ; 4.35e-10 s                 ; No                        ; Yes                       ;
 +-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
 
@@ -527,70 +527,70 @@ No synchronizer chains to report.
 ; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
 +-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
 ; LEDR[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; LEDR[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; LEDR[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; LEDR[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; LEDR[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; LEDR[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
+; LEDR[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; LEDR[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
+; LEDR[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
+; LEDR[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; LEDR[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
 ; LEDR[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; LEDR[7]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; LEDR[8]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; LEDR[9]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX0[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; HEX0[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX0[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; HEX0[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; HEX0[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; HEX0[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; HEX0[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX1[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX1[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX1[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; HEX1[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; HEX1[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX1[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; HEX1[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX2[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; HEX2[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; HEX2[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; HEX2[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; HEX2[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX2[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; HEX2[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX3[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; LEDR[7]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
+; LEDR[8]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
+; LEDR[9]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; HEX0[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX0[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX0[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX0[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX0[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX0[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX0[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX1[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX1[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX1[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX1[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX1[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX1[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX1[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX2[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; HEX2[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX2[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX2[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX2[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX2[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX2[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX3[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
 ; HEX3[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
 ; HEX3[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
 ; HEX3[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; HEX3[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX3[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; HEX3[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; VGA_R[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; VGA_R[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; VGA_R[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX3[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; HEX3[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; HEX3[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
+; VGA_R[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; VGA_R[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
+; VGA_R[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; VGA_R[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
 ; VGA_R[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; VGA_R[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; VGA_R[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
 ; VGA_R[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; VGA_G[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; VGA_G[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
+; VGA_G[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; VGA_G[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
 ; VGA_G[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
-; VGA_G[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; VGA_G[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
 ; VGA_G[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; VGA_B[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; VGA_B[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; VGA_B[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; VGA_B[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; VGA_B[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; VGA_G[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; VGA_B[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; VGA_B[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; VGA_B[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
 ; VGA_B[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; VGA_B[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; VGA_B[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
-; VGA_HS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; VGA_B[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
+; VGA_HS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
 ; VGA_VS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.96e-05 V                   ; 2.38 V              ; -0.0306 V           ; 0.23 V                               ; 0.206 V                              ; 4.83e-10 s                  ; 5.01e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.96e-05 V                  ; 2.38 V             ; -0.0306 V          ; 0.23 V                              ; 0.206 V                             ; 4.83e-10 s                 ; 5.01e-10 s                 ; No                        ; Yes                       ;
-; VGA_CLK     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.037 V            ; 0.188 V                              ; 0.158 V                              ; 4.67e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.037 V           ; 0.188 V                             ; 0.158 V                             ; 4.67e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
+; VGA_CLK     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.88e-05 V                   ; 2.39 V              ; -0.0374 V           ; 0.189 V                              ; 0.158 V                              ; 4.66e-10 s                  ; 4.67e-10 s                  ; No                         ; Yes                        ; 2.32 V                      ; 3.88e-05 V                  ; 2.39 V             ; -0.0374 V          ; 0.189 V                             ; 0.158 V                             ; 4.66e-10 s                 ; 4.67e-10 s                 ; No                        ; Yes                       ;
 ; VGA_BLANK_N ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.49e-05 V                   ; 2.34 V              ; -0.0118 V           ; 0.182 V                              ; 0.051 V                              ; 4.81e-10 s                  ; 4.83e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.49e-05 V                  ; 2.34 V             ; -0.0118 V          ; 0.182 V                             ; 0.051 V                             ; 4.81e-10 s                 ; 4.83e-10 s                 ; Yes                       ; Yes                       ;
 +-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
 
@@ -601,70 +601,70 @@ No synchronizer chains to report.
 ; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
 +-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
 ; LEDR[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; LEDR[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; LEDR[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; LEDR[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; LEDR[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; LEDR[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
+; LEDR[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; LEDR[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
+; LEDR[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
+; LEDR[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; LEDR[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
 ; LEDR[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; LEDR[7]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; LEDR[8]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; LEDR[9]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX0[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; HEX0[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX0[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; HEX0[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; HEX0[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; HEX0[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; HEX0[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX1[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX1[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX1[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; HEX1[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; HEX1[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX1[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; HEX1[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX2[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; HEX2[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; HEX2[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; HEX2[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; HEX2[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX2[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; HEX2[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX3[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; LEDR[7]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
+; LEDR[8]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
+; LEDR[9]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; HEX0[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX0[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX0[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX0[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX0[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX0[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX0[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX1[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX1[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX1[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX1[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX1[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX1[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX1[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX2[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; HEX2[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX2[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX2[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX2[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX2[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX2[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX3[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
 ; HEX3[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
 ; HEX3[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
 ; HEX3[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; HEX3[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX3[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; HEX3[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; VGA_R[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; VGA_R[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; VGA_R[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; VGA_R[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX3[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; HEX3[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; HEX3[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
+; VGA_R[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; VGA_R[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
+; VGA_R[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; VGA_R[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
 ; VGA_R[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; VGA_R[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; VGA_R[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; VGA_R[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; VGA_R[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
 ; VGA_R[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; VGA_G[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; VGA_G[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; VGA_G[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; VGA_G[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; VGA_G[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; VGA_G[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
+; VGA_G[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; VGA_G[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
 ; VGA_G[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
-; VGA_G[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; VGA_G[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
 ; VGA_G[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; VGA_G[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; VGA_B[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; VGA_B[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; VGA_B[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; VGA_B[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; VGA_B[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; VGA_G[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; VGA_B[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; VGA_B[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; VGA_B[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
+; VGA_B[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; VGA_B[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
 ; VGA_B[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; VGA_B[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; VGA_B[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
-; VGA_HS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; VGA_B[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; VGA_B[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
+; VGA_HS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
 ; VGA_VS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.25e-06 V                   ; 2.9 V               ; -0.107 V            ; 0.378 V                              ; 0.16 V                               ; 2.87e-10 s                  ; 4.28e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 4.25e-06 V                  ; 2.9 V              ; -0.107 V           ; 0.378 V                             ; 0.16 V                              ; 2.87e-10 s                 ; 4.28e-10 s                 ; No                        ; No                        ;
-; VGA_CLK     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.121 V            ; 0.326 V                              ; 0.297 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.121 V           ; 0.326 V                             ; 0.297 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
+; VGA_CLK     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 4.14e-06 V                   ; 2.91 V              ; -0.119 V            ; 0.326 V                              ; 0.298 V                              ; 2.74e-10 s                  ; 2.8e-10 s                   ; No                         ; No                         ; 2.75 V                      ; 4.14e-06 V                  ; 2.91 V             ; -0.119 V           ; 0.326 V                             ; 0.298 V                             ; 2.74e-10 s                 ; 2.8e-10 s                  ; No                        ; No                        ;
 ; VGA_BLANK_N ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 3.54e-06 V                   ; 2.81 V              ; -0.0578 V           ; 0.303 V                              ; 0.28 V                               ; 2.93e-10 s                  ; 3.01e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 3.54e-06 V                  ; 2.81 V             ; -0.0578 V          ; 0.303 V                             ; 0.28 V                              ; 2.93e-10 s                 ; 3.01e-10 s                 ; No                        ; No                        ;
 +-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
 
@@ -675,70 +675,70 @@ No synchronizer chains to report.
 ; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
 +-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
 ; LEDR[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; LEDR[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; LEDR[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; LEDR[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; LEDR[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; LEDR[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
+; LEDR[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; LEDR[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
+; LEDR[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
+; LEDR[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; LEDR[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
 ; LEDR[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; LEDR[7]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; LEDR[8]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; LEDR[9]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX0[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; HEX0[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX0[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; HEX0[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; HEX0[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; HEX0[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; HEX0[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX1[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX1[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX1[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; HEX1[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; HEX1[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX1[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; HEX1[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX2[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; HEX2[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; HEX2[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; HEX2[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; HEX2[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX2[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; HEX2[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX3[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; LEDR[7]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
+; LEDR[8]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
+; LEDR[9]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; HEX0[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX0[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX0[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX0[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX0[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX0[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX0[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX1[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX1[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX1[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX1[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX1[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX1[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX1[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX2[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; HEX2[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX2[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX2[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX2[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX2[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX2[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX3[0]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
 ; HEX3[1]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
 ; HEX3[2]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
 ; HEX3[3]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; HEX3[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX3[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; HEX3[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; VGA_R[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; VGA_R[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX3[4]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; HEX3[5]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; HEX3[6]     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
+; VGA_R[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; VGA_R[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
+; VGA_R[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; VGA_R[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
 ; VGA_R[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; VGA_R[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; VGA_R[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; VGA_R[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; VGA_R[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
 ; VGA_R[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; VGA_G[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; VGA_G[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; VGA_G[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; VGA_G[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; VGA_G[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; VGA_G[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
+; VGA_G[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; VGA_G[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
 ; VGA_G[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
-; VGA_G[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; VGA_G[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
 ; VGA_G[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; VGA_G[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; VGA_B[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; VGA_B[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; VGA_B[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; VGA_B[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; VGA_B[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; VGA_G[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; VGA_B[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
+; VGA_B[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[4]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
 ; VGA_B[5]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; VGA_B[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
-; VGA_B[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
-; VGA_HS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
+; VGA_B[6]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; VGA_B[7]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
+; VGA_HS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
 ; VGA_VS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000247 V                   ; 2.85 V              ; -0.0711 V           ; 0.204 V                              ; 0.181 V                              ; 4.55e-10 s                  ; 4.49e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000247 V                  ; 2.85 V             ; -0.0711 V          ; 0.204 V                             ; 0.181 V                             ; 4.55e-10 s                 ; 4.49e-10 s                 ; No                        ; No                        ;
-; VGA_CLK     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0814 V           ; 0.36 V                               ; 0.156 V                              ; 3e-10 s                     ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0814 V          ; 0.36 V                              ; 0.156 V                             ; 3e-10 s                    ; 4.34e-10 s                 ; No                        ; No                        ;
+; VGA_CLK     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000242 V                   ; 2.86 V              ; -0.0805 V           ; 0.358 V                              ; 0.156 V                              ; 3.01e-10 s                  ; 4.34e-10 s                  ; No                         ; No                         ; 2.75 V                      ; 0.000242 V                  ; 2.86 V             ; -0.0805 V          ; 0.358 V                             ; 0.156 V                             ; 3.01e-10 s                 ; 4.34e-10 s                 ; No                        ; No                        ;
 ; VGA_BLANK_N ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.75 V                       ; 0.000213 V                   ; 2.79 V              ; -0.0324 V           ; 0.139 V                              ; 0.119 V                              ; 4.42e-10 s                  ; 4.33e-10 s                  ; No                         ; Yes                        ; 2.75 V                      ; 0.000213 V                  ; 2.79 V             ; -0.0324 V          ; 0.139 V                             ; 0.119 V                             ; 4.42e-10 s                 ; 4.33e-10 s                 ; No                        ; Yes                       ;
 +-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
 
@@ -748,7 +748,7 @@ No synchronizer chains to report.
 +------------+----------+----------+----------+----------+----------+
 ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
 +------------+----------+----------+----------+----------+----------+
-; CLOCK_50   ; CLOCK_50 ; 81578657 ; 0        ; 0        ; 0        ;
+; CLOCK_50   ; CLOCK_50 ; 82862636 ; 0        ; 0        ; 0        ;
 +------------+----------+----------+----------+----------+----------+
 Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
 
@@ -758,7 +758,7 @@ Entries labeled "false path" only account for clock-to-clock false paths and not
 +------------+----------+----------+----------+----------+----------+
 ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
 +------------+----------+----------+----------+----------+----------+
-; CLOCK_50   ; CLOCK_50 ; 81578657 ; 0        ; 0        ; 0        ;
+; CLOCK_50   ; CLOCK_50 ; 82862636 ; 0        ; 0        ; 0        ;
 +------------+----------+----------+----------+----------+----------+
 Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
 
@@ -783,9 +783,9 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
 ; Illegal Clocks                  ; 0     ; 0    ;
 ; Unconstrained Clocks            ; 0     ; 0    ;
 ; Unconstrained Input Ports       ; 13    ; 13   ;
-; Unconstrained Input Port Paths  ; 1290  ; 1290 ;
+; Unconstrained Input Port Paths  ; 1308  ; 1308 ;
 ; Unconstrained Output Ports      ; 22    ; 22   ;
-; Unconstrained Output Port Paths ; 723   ; 723  ;
+; Unconstrained Output Port Paths ; 707   ; 707  ;
 +---------------------------------+-------+------+
 
 
@@ -906,7 +906,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
 Info: *******************************************************************
 Info: Running Quartus Prime TimeQuest Timing Analyzer
     Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
-    Info: Processing started: Thu Sep 24 11:21:18 2020
+    Info: Processing started: Thu Sep 24 12:53:51 2020
 Info: Command: quartus_sta project24_09 -c de1_soc_wrapper
 Info: qsta_default_script.tcl version: #1
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
@@ -923,50 +923,50 @@ Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
 Info: Analyzing Slow 1100mV 85C Model
 Critical Warning (332148): Timing requirements not met
     Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
-Info (332146): Worst-case setup slack is -12.117
+Info (332146): Worst-case setup slack is -10.717
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):   -12.117          -23738.417 CLOCK_50 
-Info (332146): Worst-case hold slack is 0.360
+    Info (332119):   -10.717          -21621.074 CLOCK_50 
+Info (332146): Worst-case hold slack is 0.372
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):     0.360               0.000 CLOCK_50 
+    Info (332119):     0.372               0.000 CLOCK_50 
 Info (332140): No Recovery paths to report
 Info (332140): No Removal paths to report
 Info (332146): Worst-case minimum pulse width slack is -2.636
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -2.636           -9178.515 CLOCK_50 
+    Info (332119):    -2.636           -9168.793 CLOCK_50 
 Info: Analyzing Slow 1100mV 0C Model
 Info (334003): Started post-fitting delay annotation
 Info (334004): Delay annotation completed successfully
 Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
 Critical Warning (332148): Timing requirements not met
     Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
-Info (332146): Worst-case setup slack is -11.922
+Info (332146): Worst-case setup slack is -10.487
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):   -11.922          -23014.909 CLOCK_50 
-Info (332146): Worst-case hold slack is 0.320
+    Info (332119):   -10.487          -20926.712 CLOCK_50 
+Info (332146): Worst-case hold slack is 0.369
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):     0.320               0.000 CLOCK_50 
+    Info (332119):     0.369               0.000 CLOCK_50 
 Info (332140): No Recovery paths to report
 Info (332140): No Removal paths to report
 Info (332146): Worst-case minimum pulse width slack is -2.636
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -2.636           -9227.462 CLOCK_50 
+    Info (332119):    -2.636           -9200.409 CLOCK_50 
 Info: Analyzing Fast 1100mV 85C Model
 Info (334003): Started post-fitting delay annotation
 Info (334004): Delay annotation completed successfully
 Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
 Critical Warning (332148): Timing requirements not met
     Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
-Info (332146): Worst-case setup slack is -7.015
+Info (332146): Worst-case setup slack is -6.177
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -7.015          -13385.378 CLOCK_50 
+    Info (332119):    -6.177          -12052.251 CLOCK_50 
 Info (332146): Worst-case hold slack is 0.180
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
@@ -976,31 +976,31 @@ Info (332140): No Removal paths to report
 Info (332146): Worst-case minimum pulse width slack is -2.636
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -2.636           -8567.649 CLOCK_50 
+    Info (332119):    -2.636           -8584.106 CLOCK_50 
 Info: Analyzing Fast 1100mV 0C Model
 Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
 Critical Warning (332148): Timing requirements not met
     Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
-Info (332146): Worst-case setup slack is -6.180
+Info (332146): Worst-case setup slack is -5.437
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -6.180          -11655.282 CLOCK_50 
-Info (332146): Worst-case hold slack is 0.172
+    Info (332119):    -5.437          -10407.325 CLOCK_50 
+Info (332146): Worst-case hold slack is 0.171
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):     0.172               0.000 CLOCK_50 
+    Info (332119):     0.171               0.000 CLOCK_50 
 Info (332140): No Recovery paths to report
 Info (332140): No Removal paths to report
 Info (332146): Worst-case minimum pulse width slack is -2.636
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -2.636           -8570.738 CLOCK_50 
+    Info (332119):    -2.636           -8588.168 CLOCK_50 
 Info (332102): Design is not fully constrained for setup requirements
 Info (332102): Design is not fully constrained for hold requirements
 Info: Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings
-    Info: Peak virtual memory: 1570 megabytes
-    Info: Processing ended: Thu Sep 24 11:21:30 2020
-    Info: Elapsed time: 00:00:12
-    Info: Total CPU time (on all processors): 00:00:30
+    Info: Peak virtual memory: 1572 megabytes
+    Info: Processing ended: Thu Sep 24 12:54:02 2020
+    Info: Elapsed time: 00:00:11
+    Info: Total CPU time (on all processors): 00:00:29
 
 
diff --git a/output_files/de1_soc_wrapper.sta.summary b/output_files/de1_soc_wrapper.sta.summary
index 6291c8ce221745ac4dd97785fae51738a9dcb422..7baa04c91c0b632a00652592c47884d8e648192a 100644
--- a/output_files/de1_soc_wrapper.sta.summary
+++ b/output_files/de1_soc_wrapper.sta.summary
@@ -3,32 +3,32 @@ TimeQuest Timing Analyzer Summary
 ------------------------------------------------------------
 
 Type  : Slow 1100mV 85C Model Setup 'CLOCK_50'
-Slack : -12.117
-TNS   : -23738.417
+Slack : -10.717
+TNS   : -21621.074
 
 Type  : Slow 1100mV 85C Model Hold 'CLOCK_50'
-Slack : 0.360
+Slack : 0.372
 TNS   : 0.000
 
 Type  : Slow 1100mV 85C Model Minimum Pulse Width 'CLOCK_50'
 Slack : -2.636
-TNS   : -9178.515
+TNS   : -9168.793
 
 Type  : Slow 1100mV 0C Model Setup 'CLOCK_50'
-Slack : -11.922
-TNS   : -23014.909
+Slack : -10.487
+TNS   : -20926.712
 
 Type  : Slow 1100mV 0C Model Hold 'CLOCK_50'
-Slack : 0.320
+Slack : 0.369
 TNS   : 0.000
 
 Type  : Slow 1100mV 0C Model Minimum Pulse Width 'CLOCK_50'
 Slack : -2.636
-TNS   : -9227.462
+TNS   : -9200.409
 
 Type  : Fast 1100mV 85C Model Setup 'CLOCK_50'
-Slack : -7.015
-TNS   : -13385.378
+Slack : -6.177
+TNS   : -12052.251
 
 Type  : Fast 1100mV 85C Model Hold 'CLOCK_50'
 Slack : 0.180
@@ -36,18 +36,18 @@ TNS   : 0.000
 
 Type  : Fast 1100mV 85C Model Minimum Pulse Width 'CLOCK_50'
 Slack : -2.636
-TNS   : -8567.649
+TNS   : -8584.106
 
 Type  : Fast 1100mV 0C Model Setup 'CLOCK_50'
-Slack : -6.180
-TNS   : -11655.282
+Slack : -5.437
+TNS   : -10407.325
 
 Type  : Fast 1100mV 0C Model Hold 'CLOCK_50'
-Slack : 0.172
+Slack : 0.171
 TNS   : 0.000
 
 Type  : Fast 1100mV 0C Model Minimum Pulse Width 'CLOCK_50'
 Slack : -2.636
-TNS   : -8570.738
+TNS   : -8588.168
 
 ------------------------------------------------------------
diff --git a/simulation/modelsim/de1_soc_wrapper.vo b/simulation/modelsim/de1_soc_wrapper.vo
index 9e0ef17390d499301fc4f256eb01f8dc66b3fa9d..7293e590cadbecfcd0c248057cfb048301acbf67 100644
--- a/simulation/modelsim/de1_soc_wrapper.vo
+++ b/simulation/modelsim/de1_soc_wrapper.vo
@@ -17,7 +17,7 @@
 // PROGRAM "Quartus Prime"
 // VERSION "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition"
 
-// DATE "09/24/2020 11:21:33"
+// DATE "09/24/2020 12:54:05"
 
 // 
 // Device: Altera 5CSEMA5F31C6 Package FBGA896
@@ -62,87 +62,87 @@ output 	VGA_CLK;
 output 	VGA_BLANK_N;
 
 // Design Ports Information
-// KEY[3]	=>  Location: PIN_Y26,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// LEDR[0]	=>  Location: PIN_H8,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// LEDR[1]	=>  Location: PIN_G7,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// LEDR[2]	=>  Location: PIN_A8,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// LEDR[3]	=>  Location: PIN_AH23,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// LEDR[4]	=>  Location: PIN_AD29,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// LEDR[5]	=>  Location: PIN_AA21,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// LEDR[6]	=>  Location: PIN_AG1,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// LEDR[7]	=>  Location: PIN_AK16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// LEDR[8]	=>  Location: PIN_Y21,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// LEDR[9]	=>  Location: PIN_A5,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX0[0]	=>  Location: PIN_AB13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX0[1]	=>  Location: PIN_E6,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX0[2]	=>  Location: PIN_W16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX0[3]	=>  Location: PIN_AA16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX0[4]	=>  Location: PIN_AB17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX0[5]	=>  Location: PIN_J14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX0[6]	=>  Location: PIN_AE16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX1[0]	=>  Location: PIN_AJ7,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX1[1]	=>  Location: PIN_AB28,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX1[2]	=>  Location: PIN_V16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX1[3]	=>  Location: PIN_G11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX1[4]	=>  Location: PIN_AG8,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX1[5]	=>  Location: PIN_AB30,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX1[6]	=>  Location: PIN_AJ9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX2[0]	=>  Location: PIN_AD11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX2[1]	=>  Location: PIN_AE17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX2[2]	=>  Location: PIN_E12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX2[3]	=>  Location: PIN_H7,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX2[4]	=>  Location: PIN_AC29,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX2[5]	=>  Location: PIN_Y17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX2[6]	=>  Location: PIN_AC28,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX3[0]	=>  Location: PIN_AG27,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX3[1]	=>  Location: PIN_AF13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX3[2]	=>  Location: PIN_AD20,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX3[3]	=>  Location: PIN_AK11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX3[4]	=>  Location: PIN_AK8,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX3[5]	=>  Location: PIN_AJ10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// HEX3[6]	=>  Location: PIN_AA30,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_R[0]	=>  Location: PIN_AH14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_R[1]	=>  Location: PIN_AB12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_R[2]	=>  Location: PIN_AH13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_R[3]	=>  Location: PIN_AG6,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_R[4]	=>  Location: PIN_AJ4,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_R[5]	=>  Location: PIN_AJ1,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_R[6]	=>  Location: PIN_AK6,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_R[7]	=>  Location: PIN_AA13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_G[0]	=>  Location: PIN_Y18,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_G[1]	=>  Location: PIN_AH17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_G[2]	=>  Location: PIN_AE18,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_G[3]	=>  Location: PIN_C7,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_G[4]	=>  Location: PIN_Y24,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_G[5]	=>  Location: PIN_AK9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_G[6]	=>  Location: PIN_H14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_G[7]	=>  Location: PIN_AH22,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_B[0]	=>  Location: PIN_AB15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_B[1]	=>  Location: PIN_D4,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_B[2]	=>  Location: PIN_AF9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_B[3]	=>  Location: PIN_D5,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_B[4]	=>  Location: PIN_AH30,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_B[5]	=>  Location: PIN_AE13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_B[6]	=>  Location: PIN_E4,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_B[7]	=>  Location: PIN_E2,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_HS	=>  Location: PIN_AK12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_VS	=>  Location: PIN_AF14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_CLK	=>  Location: PIN_AF16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// VGA_BLANK_N	=>  Location: PIN_AF15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// CLOCK_50	=>  Location: PIN_AB27,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// KEY[2]	=>  Location: PIN_Y27,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// SW[7]	=>  Location: PIN_AK2,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// KEY[1]	=>  Location: PIN_AH9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// KEY[0]	=>  Location: PIN_AG5,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// SW[2]	=>  Location: PIN_AG10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// SW[9]	=>  Location: PIN_AH8,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// KEY[3]	=>  Location: PIN_Y16,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// LEDR[0]	=>  Location: PIN_V16,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// LEDR[1]	=>  Location: PIN_W16,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// LEDR[2]	=>  Location: PIN_V17,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// LEDR[3]	=>  Location: PIN_V18,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// LEDR[4]	=>  Location: PIN_W17,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// LEDR[5]	=>  Location: PIN_W19,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// LEDR[6]	=>  Location: PIN_Y19,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// LEDR[7]	=>  Location: PIN_W20,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// LEDR[8]	=>  Location: PIN_W21,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// LEDR[9]	=>  Location: PIN_Y21,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX0[0]	=>  Location: PIN_AE26,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX0[1]	=>  Location: PIN_AE27,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX0[2]	=>  Location: PIN_AE28,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX0[3]	=>  Location: PIN_AG27,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX0[4]	=>  Location: PIN_AF28,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX0[5]	=>  Location: PIN_AG28,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX0[6]	=>  Location: PIN_AH28,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX1[0]	=>  Location: PIN_AJ29,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX1[1]	=>  Location: PIN_AH29,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX1[2]	=>  Location: PIN_AH30,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX1[3]	=>  Location: PIN_AG30,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX1[4]	=>  Location: PIN_AF29,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX1[5]	=>  Location: PIN_AF30,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX1[6]	=>  Location: PIN_AD27,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX2[0]	=>  Location: PIN_AB23,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX2[1]	=>  Location: PIN_AE29,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX2[2]	=>  Location: PIN_AD29,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX2[3]	=>  Location: PIN_AC28,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX2[4]	=>  Location: PIN_AD30,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX2[5]	=>  Location: PIN_AC29,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX2[6]	=>  Location: PIN_AC30,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX3[0]	=>  Location: PIN_AD26,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX3[1]	=>  Location: PIN_AC27,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX3[2]	=>  Location: PIN_AD25,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX3[3]	=>  Location: PIN_AC25,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX3[4]	=>  Location: PIN_AB28,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX3[5]	=>  Location: PIN_AB25,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// HEX3[6]	=>  Location: PIN_AB22,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_R[0]	=>  Location: PIN_A13,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_R[1]	=>  Location: PIN_C13,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_R[2]	=>  Location: PIN_E13,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_R[3]	=>  Location: PIN_B12,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_R[4]	=>  Location: PIN_C12,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_R[5]	=>  Location: PIN_D12,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_R[6]	=>  Location: PIN_E12,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_R[7]	=>  Location: PIN_F13,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_G[0]	=>  Location: PIN_J9,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_G[1]	=>  Location: PIN_J10,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_G[2]	=>  Location: PIN_H12,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_G[3]	=>  Location: PIN_G10,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_G[4]	=>  Location: PIN_G11,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_G[5]	=>  Location: PIN_G12,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_G[6]	=>  Location: PIN_F11,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_G[7]	=>  Location: PIN_E11,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_B[0]	=>  Location: PIN_B13,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_B[1]	=>  Location: PIN_G13,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_B[2]	=>  Location: PIN_H13,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_B[3]	=>  Location: PIN_F14,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_B[4]	=>  Location: PIN_H14,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_B[5]	=>  Location: PIN_F15,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_B[6]	=>  Location: PIN_G15,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_B[7]	=>  Location: PIN_J14,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_HS	=>  Location: PIN_B11,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_VS	=>  Location: PIN_D11,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_CLK	=>  Location: PIN_A11,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// VGA_BLANK_N	=>  Location: PIN_F10,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// CLOCK_50	=>  Location: PIN_AF14,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// KEY[2]	=>  Location: PIN_W15,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// SW[7]	=>  Location: PIN_AC9,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// KEY[1]	=>  Location: PIN_AA15,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// KEY[0]	=>  Location: PIN_AA14,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// SW[2]	=>  Location: PIN_AF9,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// SW[9]	=>  Location: PIN_AE12,	 I/O Standard: 2.5 V,	 Current Strength: Default
 // SW[1]	=>  Location: PIN_AC12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// SW[4]	=>  Location: PIN_AK3,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// SW[3]	=>  Location: PIN_AJ5,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// SW[4]	=>  Location: PIN_AD11,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// SW[3]	=>  Location: PIN_AF10,	 I/O Standard: 2.5 V,	 Current Strength: Default
 // SW[5]	=>  Location: PIN_AD12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// SW[0]	=>  Location: PIN_AG12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// SW[8]	=>  Location: PIN_AK7,	 I/O Standard: 2.5 V,	 Current Strength: Default
-// SW[6]	=>  Location: PIN_AK4,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// SW[0]	=>  Location: PIN_AB12,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// SW[8]	=>  Location: PIN_AD10,	 I/O Standard: 2.5 V,	 Current Strength: Default
+// SW[6]	=>  Location: PIN_AE11,	 I/O Standard: 2.5 V,	 Current Strength: Default
 
 
 wire gnd;
@@ -214,344 +214,484 @@ wire \Add0~10 ;
 wire \Add0~1_sumout ;
 wire \heartbeat~0_combout ;
 wire \heartbeat~q ;
-wire \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|M66wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jppvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tki2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ptgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ilpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Itgwx4~0_combout ;
-wire \soc_inst|interconnect_1|HRDATA[25]~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|A4t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ffj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Orewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sy52z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Huqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kzxvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Nsk2z4~q ;
+wire \soc_inst|m0_1|u_logic|L8t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ucqvx4~combout ;
+wire \soc_inst|m0_1|u_logic|T7jwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xhxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Icyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kfd2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pcyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ark2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qfdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Duc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pkxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R8d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P7d2z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ju5wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vbovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y9t2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Y9t2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wq5wx4~combout ;
-wire \soc_inst|m0_1|u_logic|G2lwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Howvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G2lwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Rbi3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wmc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L7fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Socwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L5d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z5d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jppvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I2mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B73wx4~combout ;
+wire \soc_inst|m0_1|u_logic|G1mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A4c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z0mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1vvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qaqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aok2z4~q ;
+wire \soc_inst|m0_1|u_logic|G97wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P2mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pa7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hwrite_o~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xx2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Wdqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A4t2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mhc2z4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Mhc2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Kzxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wmc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Mhc2z4~4_combout ;
-wire \soc_inst|m0_1|u_logic|O9qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rsqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ag4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mtqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P03wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Og4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mtqvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kgc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mac2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|X77wx4~combout ;
+wire \soc_inst|m0_1|u_logic|G0w2z4~q ;
 wire \soc_inst|m0_1|u_logic|Nxqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H1rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qp3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jp3wx4~combout ;
+wire \soc_inst|m0_1|u_logic|M9pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Howvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y8pvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|S5pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Hxx2z4~q ;
 wire \soc_inst|m0_1|u_logic|Yghvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Tyx2z4~q ;
 wire \soc_inst|m0_1|u_logic|Ibrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hxx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|B8c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vaw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bpsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xnrvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jvqvx4~1_combout ;
-wire \soc_inst|ram_1|write_cycle~q ;
-wire \soc_inst|m0_1|u_logic|Wpsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H4nwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Y9t2z4~q ;
+wire \soc_inst|m0_1|u_logic|F5mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Egkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O9qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O76wx4~combout ;
+wire \soc_inst|m0_1|u_logic|A76wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W46wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G36wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ;
+wire \soc_inst|ram_1|write_cycle~0_combout ;
+wire \soc_inst|ram_1|write_cycle~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J5vvx4~combout ;
+wire \soc_inst|m0_1|u_logic|S4w2z4~q ;
 wire \soc_inst|m0_1|u_logic|I1c2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Wpsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A0zvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|C9yvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|P1c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xhiwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|G0c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Jyb2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xhiwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Jyb2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Jyb2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|O092z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K1z2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bxcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lu6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E6nwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q8rwx4~0_combout ;
+wire \soc_inst|interconnect_1|mux_sel[2]~feeder_combout ;
+wire \soc_inst|interconnect_1|HRDATA[25]~1_combout ;
+wire \soc_inst|switches_1|half_word_address~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z1ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X4pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|J4pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J4pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dfd2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Wa7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pdi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eyhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ffxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wfovx4~combout ;
 wire \soc_inst|m0_1|u_logic|Slnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xnrvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Edovx4~combout ;
 wire \soc_inst|m0_1|u_logic|T1y2z4~q ;
 wire \soc_inst|m0_1|u_logic|Jcw2z4~q ;
 wire \soc_inst|m0_1|u_logic|Llnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Llnvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Socwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lhyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qxc2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Lhyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ps3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|X8zvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Evcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Evcwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|T3ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qdj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wxcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sknwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kswwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rngwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jbhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ry5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~0_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~1_combout ;
+wire \soc_inst|m0_1|u_logic|T1xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Na6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wdxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yy5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qx52z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~4_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sy52z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~3_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~5_combout ;
+wire \soc_inst|m0_1|u_logic|U5qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wxp2z4~q ;
+wire \soc_inst|m0_1|u_logic|W28wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R1pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jux2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kryvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K0qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Shyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pmgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ez8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rmawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jucwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Otcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fuawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fuawx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|H4ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Evcwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fzcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T3ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Evcwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Wzawx4~combout ;
-wire \soc_inst|m0_1|u_logic|Glnwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fuhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L8t2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qaqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E6nwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G36wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qfdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mn3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ucqvx4~combout ;
-wire \soc_inst|m0_1|u_logic|X77wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Una2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C5c2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C5c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H0zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z6c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C5c2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ppsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ppsvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ppsvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ppsvx4~combout ;
-wire \soc_inst|m0_1|u_logic|S6ovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xhxvx4~combout ;
-wire \soc_inst|m0_1|u_logic|X5gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|D4mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J4pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J4pvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|X4pvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Z1ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ahwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C2yvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ohwvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Z3yvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ukpvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Rmpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rngwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Rmpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wvewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H5fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Icyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zpqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lwqvx4~0_combout ;
-wire \soc_inst|switches_1|read_enable~0_combout ;
-wire \soc_inst|switches_1|read_enable~q ;
-wire \soc_inst|interconnect_1|HRDATA[1]~37_combout ;
-wire \soc_inst|m0_1|u_logic|Evcwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wa7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G97wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Donvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Donvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G97wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Donvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|J3iwx4~0_combout ;
-wire \soc_inst|ram_1|memory.raddr_a[0]~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bnnvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Viy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vapvx4~combout ;
-wire \SW[2]~input_o ;
-wire \soc_inst|switches_1|switch_store[0][2]~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Mddwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mddwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kcdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jfdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kcdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W19wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pm9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y29wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ilpvx4~0_combout ;
+wire \SW[3]~input_o ;
 wire \KEY[0]~input_o ;
 wire \soc_inst|switches_1|last_buttons[0]~1_combout ;
 wire \soc_inst|switches_1|always0~1_combout ;
-wire \soc_inst|switches_1|switch_store[0][2]~q ;
-wire \soc_inst|m0_1|u_logic|Bpzvx4~1_combout ;
+wire \soc_inst|switches_1|switch_store[0][3]~q ;
+wire \soc_inst|m0_1|u_logic|Evcwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L4bwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|hsize_o~0_combout ;
-wire \soc_inst|switches_1|half_word_address~0_combout ;
 wire \soc_inst|ram_1|byte2~0_combout ;
+wire \soc_inst|ram_1|byte_select[2]~DUPLICATE_q ;
+wire \soc_inst|switches_1|read_enable~0_combout ;
+wire \soc_inst|switches_1|read_enable~q ;
+wire \soc_inst|switches_1|half_word_address[1]~DUPLICATE_q ;
+wire \soc_inst|interconnect_1|HRDATA[8]~5_combout ;
+wire \soc_inst|interconnect_1|HRDATA[24]~6_combout ;
 wire \soc_inst|interconnect_1|HRDATA[20]~7_combout ;
-wire \SW[5]~input_o ;
+wire \SW[1]~input_o ;
 wire \KEY[1]~input_o ;
 wire \soc_inst|switches_1|last_buttons[1]~0_combout ;
 wire \soc_inst|switches_1|always0~0_combout ;
-wire \soc_inst|switches_1|switch_store[1][5]~q ;
-wire \soc_inst|m0_1|u_logic|W28wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Egkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Qp3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jp3wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Xiwvx4~0_combout ;
+wire \soc_inst|switches_1|switch_store[1][1]~q ;
+wire \soc_inst|ram_1|write_cycle~q ;
+wire \soc_inst|ram_1|memory.raddr_a[0]~0_combout ;
+wire \soc_inst|m0_1|u_logic|P0pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xx93z4~q ;
+wire \SW[7]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][7]~q ;
+wire \soc_inst|ram_1|data_to_memory[7]~4_combout ;
+wire \soc_inst|m0_1|u_logic|J3iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ocfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R1d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E4iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G2lwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bxcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lu6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Srgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fzyvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Csewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V1yvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J5vvx4~combout ;
-wire \soc_inst|m0_1|u_logic|U5qvx4~combout ;
-wire \soc_inst|m0_1|u_logic|W0pvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Xwawx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Xwawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xwawx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Xwawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qtrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dplwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cllwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G27wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X3xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X3xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wvewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H5fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J7swx4~0_combout ;
+wire \SW[5]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][5]~q ;
+wire \soc_inst|m0_1|u_logic|H0dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cyq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z4bwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Y5dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uwyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4dwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I4dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O0dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xucwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cxc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fbfwx4~0_combout ;
+wire \SW[0]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][0]~q ;
 wire \soc_inst|m0_1|u_logic|Qsewx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|P7wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qslwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fyrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fyrwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Surwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dghvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gvrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|P0pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qnkvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qnkvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Efp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cxc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kuc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vwc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Awc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Awc2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~0_combout ;
+wire \soc_inst|switches_1|switch_store[1][7]~q ;
+wire \soc_inst|m0_1|u_logic|Add2~38 ;
+wire \soc_inst|m0_1|u_logic|Add2~57_sumout ;
+wire \soc_inst|m0_1|u_logic|Glhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T1d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ps3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lhyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qxc2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Lhyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lhyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rsqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H1rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U7w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cr0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cr0xx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q5vvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kofwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H9i2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bk4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nqy2z4~q ;
+wire \soc_inst|m0_1|u_logic|W7hwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Poa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ik4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ik4wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Si4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pd4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pd4wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pd4wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Q5vvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q7mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Glnwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ukpvx4~combout ;
+wire \soc_inst|m0_1|u_logic|C2yvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Z3yvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rmpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ahwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ohwvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rmpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yplwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dplwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vopvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A1yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mnpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Vnxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xipvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gxxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ljpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jipvx4~0_combout ;
 wire \soc_inst|switches_1|DataValid~1_combout ;
-wire \soc_inst|interconnect_1|HRDATA[1]~20_combout ;
-wire \SW[0]~input_o ;
 wire \soc_inst|switches_1|switch_store[0][0]~q ;
-wire \SW[3]~input_o ;
-wire \soc_inst|switches_1|switch_store[1][3]~q ;
-wire \soc_inst|m0_1|u_logic|Gzvvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Gzvvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pgnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I793z4~q ;
-wire \soc_inst|m0_1|u_logic|Fskvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U593z4~q ;
-wire \soc_inst|m0_1|u_logic|Ut0xx4~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[1]~37_combout ;
+wire \soc_inst|interconnect_1|HRDATA[1]~20_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~5_combout ;
+wire \soc_inst|ram_1|data_to_memory[0]~27_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[5]~5_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[6]~6_combout ;
+wire \soc_inst|m0_1|u_logic|Szr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ohivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~58 ;
+wire \soc_inst|m0_1|u_logic|Add2~54 ;
+wire \soc_inst|m0_1|u_logic|Add2~50 ;
+wire \soc_inst|m0_1|u_logic|Add2~45_sumout ;
+wire \soc_inst|m0_1|u_logic|Bfhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C8rwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nlnwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oldwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lcowx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Oi2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cr0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ut0xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Oi2wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|A4c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zy2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Enrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V2iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Herwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Herwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|V1yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rjrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mkrwx4~combout ;
+wire \soc_inst|m0_1|u_logic|J3xvx4~combout ;
+wire \soc_inst|m0_1|u_logic|M66wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ggswx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G2lwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ggswx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ggswx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yaz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qj2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qj2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ro0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qj2wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fw0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ax0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vi2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vi2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vb2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hw2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xr0xx4~combout ;
 wire \soc_inst|m0_1|u_logic|Jq2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Nz2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zy2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fh2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xx2wx4~combout ;
-wire \soc_inst|m0_1|u_logic|It2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ey2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ru2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bt2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fh2wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Fh2wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Op2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fh2wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|It2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fh2wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Fh2wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|L53wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|B73wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Hw2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L53wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L53wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L53wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ey2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ru2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bt2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fh2wx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Xc2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ge2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Nkpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J7swx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pkxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Qllwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nqy2z4~q ;
-wire \soc_inst|m0_1|u_logic|M4fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rjrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mkrwx4~combout ;
-wire \soc_inst|m0_1|u_logic|J3xvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Sjj2z4~q ;
-wire \soc_inst|m0_1|u_logic|My6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vnxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|X8kwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|I2mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Zzfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tuwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T1xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|If2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vb2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zoy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kxkwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kxkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fyrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fyrwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Surwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qslwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dghvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qtrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dsqvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Gvrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lwqvx4~0_combout ;
+wire \soc_inst|switches_1|switch_store[0][5]~q ;
+wire \soc_inst|interconnect_1|HRDATA[5]~28_combout ;
+wire \soc_inst|m0_1|u_logic|Jvqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yanvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F0y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ctrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ctrwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cllwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I6z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kghvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dghvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W7z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wfhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wfhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wfhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|K9z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tykwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tykwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kxkwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qj2wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qj2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jucwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ro0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qj2wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Fw0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ax0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vi2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vi2wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Ge2wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Ge2wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|R1d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Keiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Celwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Celwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fbfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fbfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E4iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Enrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V2iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Herwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Herwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vb2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xr0xx4~combout ;
-wire \soc_inst|m0_1|u_logic|If2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vb2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fw1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rafwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rni2z4~q ;
 wire \soc_inst|m0_1|u_logic|Ob2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ob2wx4~combout ;
-wire \soc_inst|m0_1|u_logic|P3mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vhwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vhwvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K8wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K8wvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K8wvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Oowvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ejwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R8wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R8wvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|F9wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P3mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Auk2z4~q ;
 wire \soc_inst|m0_1|u_logic|Yg2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xly2z4~q ;
-wire \soc_inst|m0_1|u_logic|D6yvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D6yvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|V8yvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D6yvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|H3d3z4~q ;
 wire \soc_inst|m0_1|u_logic|Yg2wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Xc2wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Mw1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wu1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G02wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uwyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hx1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ax1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gmm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rv1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rv1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rvu2z4~q ;
+wire \soc_inst|m0_1|u_logic|If2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|If2wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hx1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Unm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kv1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Q8ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Svk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tw1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tw1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ii63z4~q ;
+wire \soc_inst|m0_1|u_logic|Hfyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hfyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hfyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Imt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dv1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Skm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rr73z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Wcyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wcyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wcyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wcyvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Q8ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q8ywx4~combout ;
+wire \soc_inst|m0_1|u_logic|W4ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D5ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D31wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fjlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qs7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qs7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Phlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gjt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Po73z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Psu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qml2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Spl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Eol2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Q77wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H0zvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Cuyvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Yyyvx4~combout ;
 wire \soc_inst|m0_1|u_logic|Cuyvx4~1_combout ;
@@ -563,2661 +703,2550 @@ wire \soc_inst|m0_1|u_logic|M1j2z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|M1j2z4~3_combout ;
 wire \soc_inst|m0_1|u_logic|M1j2z4~1_combout ;
 wire \soc_inst|m0_1|u_logic|M1j2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|M1j2z4~q ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|C51xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mw1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wu1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G02wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pu1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|G02wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Mcz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mvm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wqm2z4~q ;
+wire \soc_inst|m0_1|u_logic|G493z4~q ;
+wire \soc_inst|m0_1|u_logic|Ipm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qowwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R283z4~q ;
+wire \soc_inst|m0_1|u_logic|It63z4~q ;
+wire \soc_inst|m0_1|u_logic|Ixt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ksm2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ksm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qowwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qowwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Y21xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U593z4~q ;
+wire \soc_inst|m0_1|u_logic|Fskvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U593z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Yv1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fw1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yv1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wd13z4~q ;
-wire \soc_inst|m0_1|u_logic|If2wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|If2wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Ydyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Fn23z4~q ;
-wire \soc_inst|m0_1|u_logic|Sj62z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pl62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fw1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ow33z4~q ;
+wire \soc_inst|m0_1|u_logic|H133z4~q ;
+wire \soc_inst|m0_1|u_logic|Meyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yv1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yr13z4~q ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Mw1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|X553z4~q ;
-wire \soc_inst|m0_1|u_logic|Sj62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ue9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zj53z4~q ;
 wire \soc_inst|m0_1|u_logic|Wu1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ikz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wzy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Meyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Sj62z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Sj62z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Hx1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hx1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Grl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ax1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Spl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bywwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rv1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rv1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Psu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kv1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qml2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bywwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Hfyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hfyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hfyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Gjt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wcyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wcyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wcyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wcyvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Po73z4~q ;
-wire \soc_inst|m0_1|u_logic|Bywwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Tw1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tw1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Gf63z4~q ;
-wire \soc_inst|m0_1|u_logic|Dv1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Eol2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bywwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bywwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Yonvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Shyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pmgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ez8wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Elnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J6i2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xknvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kop2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~54 ;
-wire \soc_inst|m0_1|u_logic|Add2~50 ;
-wire \soc_inst|m0_1|u_logic|Add2~45_sumout ;
-wire \soc_inst|m0_1|u_logic|Bfhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mddwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mddwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jfdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kcdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kcdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|W19wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pm9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Y29wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Kzbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W4dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y5dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W4dwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rtz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fw1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qa43z4~q ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|X8zvx4~combout ;
 wire \soc_inst|m0_1|u_logic|D1awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U2s2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|U2s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cy43z4~q ;
-wire \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|L763z4~q ;
-wire \soc_inst|m0_1|u_logic|To33z4~q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Kf23z4~q ;
-wire \soc_inst|m0_1|u_logic|W5s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rpe3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hue3z4~q ;
-wire \soc_inst|m0_1|u_logic|Fre3z4~q ;
-wire \soc_inst|m0_1|u_logic|N71xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y21xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|I4s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dq83z4~q ;
-wire \soc_inst|m0_1|u_logic|Duv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Pu1wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Tse3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ug73z4~q ;
-wire \soc_inst|m0_1|u_logic|Cxc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|S61xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Kzbwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I2t2z4~q ;
-wire \soc_inst|m0_1|u_logic|Lk9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wxp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lny2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uz9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uz9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wzy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lq03z4~q ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mvm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ytm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nr62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ue9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~3_combout ;
 wire \soc_inst|m0_1|u_logic|C3w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Omyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Omyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|B2uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wfuwx4~combout ;
-wire \soc_inst|m0_1|u_logic|K7pwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Z0uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|H6tvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T4uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Txtvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ab9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A1yvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mnpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fmqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dsqvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Irqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Irqvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fmqvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hhpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gxxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ljpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xipvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Onqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yplwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vopvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fmqvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Fmqvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ffxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G27wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ae6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bkxvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bkxvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U9swx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S8swx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bkxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bkxvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Fzl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ejawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Cc73z4~q ;
-wire \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Sa23z4~q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Qc1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z9dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jk0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kryvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Aj0xx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ujqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gjqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xdnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Thm2z4~q ;
-wire \soc_inst|m0_1|u_logic|G5qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kfd2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dfd2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Qobwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R29wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E1bvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zznvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vxnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q8rwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R7iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fhc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zqpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zqpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zqpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|P37wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wxcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P37wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zqpvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|K0qvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wspvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Lqpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|K0u2z4~q ;
-wire \soc_inst|m0_1|u_logic|T583z4~q ;
-wire \soc_inst|m0_1|u_logic|Kw63z4~q ;
-wire \soc_inst|m0_1|u_logic|Ixxwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|T9v2z4~q ;
-wire \soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ka93z4~q ;
-wire \soc_inst|m0_1|u_logic|Ixxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ixxwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Svxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vy7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S1ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W6iwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Lz93z4~q ;
+wire \soc_inst|m0_1|u_logic|Jknvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D9ovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yz4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wuq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yauvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wq5wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Muawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Efp2z4~q ;
+wire \soc_inst|m0_1|u_logic|F8v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gip2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wyt2z4~q ;
+wire \soc_inst|m0_1|u_logic|F483z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sgp2z4~q ;
+wire \soc_inst|m0_1|u_logic|W893z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wu63z4~q ;
+wire \soc_inst|m0_1|u_logic|Ujp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Bjkvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bjkvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ovc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nl53z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec43z4~q ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fvz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zr03z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wmp2z4~q ;
+wire \soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mt13z4~q ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ilp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ny62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Tecwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Z4bwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z4bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I4dwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Afcwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ydcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ;
-wire \soc_inst|interconnect_1|HRDATA[8]~5_combout ;
-wire \soc_inst|interconnect_1|HRDATA[7]~9_combout ;
-wire \soc_inst|interconnect_1|HRDATA[7]~10_combout ;
-wire \SW[4]~input_o ;
-wire \soc_inst|switches_1|switch_store[0][4]~q ;
-wire \soc_inst|interconnect_1|HRDATA[4]~23_combout ;
-wire \soc_inst|m0_1|u_logic|Mis2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T2owx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qwowx4~combout ;
-wire \soc_inst|m0_1|u_logic|Vytvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Mis2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D9ovx4~combout ;
-wire \soc_inst|m0_1|u_logic|R1w2z4~q ;
-wire \soc_inst|m0_1|u_logic|Trq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ijcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C8rwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wccwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bpzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zz8wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fyzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~98 ;
+wire \soc_inst|m0_1|u_logic|Add5~109_sumout ;
+wire \soc_inst|m0_1|u_logic|Yxzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zr03z4~q ;
+wire \soc_inst|m0_1|u_logic|V233z4~q ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sknwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H9iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S8ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yilwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sknwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|S6nwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Imnwx4~combout ;
+wire \soc_inst|m0_1|u_logic|H9iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F8iwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|V9iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lcowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G0w2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qppvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Muawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U09wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Otcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fuawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fuawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lz8wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qppvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D31wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ixh3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ixh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Tvh3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Tvh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|G123z4~q ;
-wire \soc_inst|m0_1|u_logic|Ecp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M0i3z4~q ;
-wire \soc_inst|m0_1|u_logic|Nr2xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fjlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wai2z4~q ;
-wire \soc_inst|m0_1|u_logic|Glj2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Glj2z4~q ;
-wire \soc_inst|m0_1|u_logic|O3ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O3ivx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|V1l2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ta1xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|U71xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Lpu2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Ll73z4~q ;
-wire \soc_inst|m0_1|u_logic|X2j2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xti2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ehz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yd03z4~q ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Koj2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Koj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kt33z4~q ;
-wire \soc_inst|m0_1|u_logic|V41xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Sa13z4~q ;
-wire \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y91xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~combout ;
-wire \soc_inst|m0_1|u_logic|H9iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S8ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H9iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Djywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lstwx4~0_combout ;
-wire \SW[7]~input_o ;
-wire \soc_inst|switches_1|switch_store[0][7]~q ;
-wire \soc_inst|ram_1|data_to_memory[7]~4_combout ;
-wire \soc_inst|ram_1|memory.raddr_a[6]~6_combout ;
-wire \soc_inst|ram_1|memory.raddr_a[7]~7_combout ;
+wire \soc_inst|m0_1|u_logic|Mof3z4~q ;
+wire \soc_inst|m0_1|u_logic|Zu23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Zu23z4~q ;
+wire \soc_inst|m0_1|u_logic|Rd53z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Kiq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ql13z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Skh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Djh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Vgq2z4~q ;
+wire \soc_inst|interconnect_1|HRDATA[24]~17_combout ;
+wire \SW[9]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][9]~q ;
 wire \soc_inst|ram_1|memory.raddr_a[8]~8_combout ;
-wire \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add3~46 ;
-wire \soc_inst|m0_1|u_logic|Add3~42 ;
-wire \soc_inst|m0_1|u_logic|Add3~38 ;
-wire \soc_inst|m0_1|u_logic|Add3~81_sumout ;
-wire \soc_inst|m0_1|u_logic|Wzivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wce3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hvivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rkd3z4~q ;
-wire \soc_inst|m0_1|u_logic|R99wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lsd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pvd3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Pvd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Aud3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hpd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~3_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[9]~9_combout ;
+wire \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~46 ;
+wire \soc_inst|m0_1|u_logic|Add2~42 ;
+wire \soc_inst|m0_1|u_logic|Add2~86 ;
+wire \soc_inst|m0_1|u_logic|Add2~81_sumout ;
+wire \soc_inst|m0_1|u_logic|Ekhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T4uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Txtvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F4nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A5uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5tvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tna3z4~q ;
+wire \soc_inst|m0_1|u_logic|Aea3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H6tvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C5ovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Aea3z4~q ;
+wire \soc_inst|m0_1|u_logic|Jca3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jca3z4~q ;
+wire \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pmnwx4~combout ;
+wire \soc_inst|m0_1|u_logic|U72wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jwf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~82 ;
+wire \soc_inst|m0_1|u_logic|Add2~109_sumout ;
+wire \soc_inst|m0_1|u_logic|Ab9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ciawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wj83z4~q ;
+wire \soc_inst|m0_1|u_logic|Mi33z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Y91xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hnr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Na73z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Na73z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D923z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ciawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bnnvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add2~26 ;
+wire \soc_inst|m0_1|u_logic|Add2~17_sumout ;
+wire \soc_inst|m0_1|u_logic|Bmhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Amyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ykyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rw7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hbv2z4~q ;
+wire \soc_inst|m0_1|u_logic|H2m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Y1u2z4~q ;
+wire \soc_inst|m0_1|u_logic|H783z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yx63z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T0m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yb93z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jmdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I2t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lk9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hq33z4~q ;
+wire \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S61xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ii73z4~q ;
+wire \soc_inst|m0_1|u_logic|Qc1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Z863z4~q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yg23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Yg23z4~q ;
+wire \soc_inst|m0_1|u_logic|Qz43z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|E913z4~q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Qyc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Rvv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kc03z4~q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Cvr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Eyr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Asr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Otr2z4~q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Lk9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pgnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I793z4~q ;
+wire \soc_inst|m0_1|u_logic|Qz43z4~q ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qwr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hp9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|F32wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zz1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mcz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pl62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wd13z4~q ;
+wire \soc_inst|m0_1|u_logic|Fn23z4~q ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ikz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|X553z4~q ;
+wire \soc_inst|m0_1|u_logic|Ow33z4~q ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Yonvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tuawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tuawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~110 ;
+wire \soc_inst|m0_1|u_logic|Add5~38 ;
+wire \soc_inst|m0_1|u_logic|Add5~82 ;
+wire \soc_inst|m0_1|u_logic|Add5~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Zz1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I7owx4~combout ;
+wire \soc_inst|m0_1|u_logic|G6owx4~combout ;
+wire \soc_inst|m0_1|u_logic|M5tvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zyovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ztc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ztc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Trq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|K9ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T2ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ahowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tgowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tlyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Plx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~106 ;
+wire \soc_inst|m0_1|u_logic|Add3~98 ;
+wire \soc_inst|m0_1|u_logic|Add3~94 ;
+wire \soc_inst|m0_1|u_logic|Add3~90 ;
+wire \soc_inst|m0_1|u_logic|Add3~86 ;
+wire \soc_inst|m0_1|u_logic|Add3~70 ;
+wire \soc_inst|m0_1|u_logic|Add3~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bf93z4~q ;
+wire \soc_inst|m0_1|u_logic|Anq2z4~q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B5u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Poq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kev2z4~q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eqq2z4~q ;
+wire \soc_inst|m0_1|u_logic|B173z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add3~97_sumout ;
+wire \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|R21xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1q2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmv2z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xg33z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hi83z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ycu2z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|No93z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|X213z4~q ;
+wire \soc_inst|m0_1|u_logic|D603z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|S71wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Uup2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mgawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mgawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dkr2z4~q ;
+wire \soc_inst|m0_1|u_logic|L4jvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kfr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cc73z4~q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lpv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vdr2z4~q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Cgu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ll83z4~q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~combout ;
+wire \soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S703z4~q ;
+wire \soc_inst|m0_1|u_logic|U9a2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bk33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sa23z4~q ;
+wire \soc_inst|m0_1|u_logic|U9a2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oir2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zgr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rba2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T263z4~q ;
+wire \soc_inst|m0_1|u_logic|Kt43z4~q ;
+wire \soc_inst|m0_1|u_logic|U9a2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U9a2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|F8e3z4~q ;
-wire \soc_inst|m0_1|u_logic|Q6e3z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Q6e3z4~q ;
 wire \soc_inst|m0_1|u_logic|Gm1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wqd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Exd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B5e3z4~q ;
+wire \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Snd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hpd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Uo5xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I0e3z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|I0e3z4~q ;
-wire \soc_inst|m0_1|u_logic|X1e3z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|X1e3z4~q ;
 wire \soc_inst|m0_1|u_logic|Gm1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|M3e3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Wqd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Exd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Gm1wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|R99wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xk1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xk1wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Gm1wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Aj1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|S3cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hvivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rkd3z4~q ;
+wire \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|I463z4~q ;
+wire \soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Rds2z4~q ;
-wire \soc_inst|m0_1|u_logic|D432z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hc23z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dcs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ria2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Ql33z4~q ;
-wire \soc_inst|m0_1|u_logic|I463z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~1_combout ;
 wire \soc_inst|m0_1|u_logic|B613z4~q ;
-wire \soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Z8s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H903z4~q ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Oas2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rd73z4~q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|K7s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Zu43z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Gt93z4~q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|An83z4~q ;
+wire \soc_inst|m0_1|u_logic|Rhu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z8s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Arv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kzbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kzbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~42 ;
+wire \soc_inst|m0_1|u_logic|Add5~114 ;
+wire \soc_inst|m0_1|u_logic|Add5~105_sumout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~8_combout ;
 wire \soc_inst|m0_1|u_logic|Zh5wx4~9_combout ;
 wire \soc_inst|m0_1|u_logic|Do1wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Do1wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Do1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~114 ;
-wire \soc_inst|m0_1|u_logic|Add5~105_sumout ;
 wire \soc_inst|m0_1|u_logic|Glnwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Pn1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Arv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|An83z4~q ;
-wire \soc_inst|m0_1|u_logic|Rd73z4~q ;
-wire \soc_inst|m0_1|u_logic|Gt93z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Hc23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Hc23z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D432z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Zu43z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rkd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|S3cwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|S3cwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Add5~106 ;
 wire \soc_inst|m0_1|u_logic|Add5~45_sumout ;
 wire \soc_inst|m0_1|u_logic|Aj1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Nlnwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ecowx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ;
-wire \soc_inst|m0_1|u_logic|C5ovx4~combout ;
-wire \soc_inst|m0_1|u_logic|L8m2z4~q ;
-wire \soc_inst|m0_1|u_logic|G6owx4~combout ;
-wire \soc_inst|m0_1|u_logic|Rilwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A5uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T5tvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Tna3z4~q ;
-wire \soc_inst|m0_1|u_logic|Aea3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Aea3z4~q ;
-wire \soc_inst|m0_1|u_logic|Nfb3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nfb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Taa3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Taa3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gza3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~94_cout ;
-wire \soc_inst|m0_1|u_logic|Add0~33_sumout ;
-wire \soc_inst|m0_1|u_logic|C4b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xk1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xk1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aj1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aud3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Lsd3z4~q ;
+wire \soc_inst|m0_1|u_logic|U9e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Pvd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Tyd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|R99wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R99wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~46 ;
+wire \soc_inst|m0_1|u_logic|Add5~13_sumout ;
+wire \soc_inst|m0_1|u_logic|Gcr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rr93z4~q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bk33z4~q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|M413z4~q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Dy4xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nf1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qd1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qd1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ejawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ejawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~14 ;
+wire \soc_inst|m0_1|u_logic|Add5~18 ;
+wire \soc_inst|m0_1|u_logic|Add5~61_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~4_combout ;
+wire \soc_inst|m0_1|u_logic|Pdjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J7q2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xg33z4~q ;
+wire \soc_inst|m0_1|u_logic|O723z4~q ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U5q2z4~q ;
+wire \soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Gq43z4~q ;
+wire \soc_inst|m0_1|u_logic|Pz53z4~q ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F4q2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ty92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Q2q2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mzp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|C61wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J61wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J61wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O51wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M41wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xuxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yjzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sta2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uaj2z4~q ;
+wire \soc_inst|m0_1|u_logic|M5mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S5b3z4~q ;
+wire \soc_inst|m0_1|u_logic|R3uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ta1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K2k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hihvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Duu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dtj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ukt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dq73z4~q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ug63z4~q ;
+wire \soc_inst|m0_1|u_logic|Ruj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kw7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jmdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fkdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B2uvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mcc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mcc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ruvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M2ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vac3z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6twx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6twx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Qfa3z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Qfa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~94_cout ;
+wire \soc_inst|m0_1|u_logic|Add0~33_sumout ;
 wire \soc_inst|m0_1|u_logic|Xsmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add0~34 ;
-wire \soc_inst|m0_1|u_logic|Add0~21_sumout ;
-wire \soc_inst|m0_1|u_logic|Gha3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gha3z4~q ;
-wire \soc_inst|m0_1|u_logic|Qsmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M2b3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~22 ;
-wire \soc_inst|m0_1|u_logic|Add0~57_sumout ;
-wire \soc_inst|m0_1|u_logic|W0b3z4~q ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~20_combout ;
-wire \soc_inst|m0_1|u_logic|Wia3z4~q ;
-wire \soc_inst|m0_1|u_logic|Jsmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add0~58 ;
-wire \soc_inst|m0_1|u_logic|Add0~41_sumout ;
-wire \soc_inst|m0_1|u_logic|Csmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add0~42 ;
-wire \soc_inst|m0_1|u_logic|Add0~65_sumout ;
-wire \soc_inst|m0_1|u_logic|Mka3z4~q ;
-wire \soc_inst|m0_1|u_logic|Vrmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qxa3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~66 ;
-wire \soc_inst|m0_1|u_logic|Add0~89_sumout ;
-wire \soc_inst|m0_1|u_logic|Qtzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oszvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Luzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Luzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Omyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Omyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pcd3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pcd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|U5a3z4~q ;
-wire \soc_inst|m0_1|u_logic|M5tvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Txa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yz4wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zyhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rym2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zyovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Tqc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tqc3z4~q ;
-wire \soc_inst|m0_1|u_logic|M1pwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kss2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E0uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qztvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Kss2z4~q ;
-wire \soc_inst|m0_1|u_logic|M1pwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M1pwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|M1pwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|M1pwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Nl43z4~q ;
-wire \soc_inst|m0_1|u_logic|Arn2z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|K103z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|K103z4~q ;
-wire \soc_inst|m0_1|u_logic|Ey03z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ey03z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|V223z4~q ;
-wire \soc_inst|m0_1|u_logic|Eun2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Eun2z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Jq1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|S2r2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bdwwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|E1r2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bdwwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G4r2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bdwwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bdwwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bdwwx4~combout ;
-wire \soc_inst|m0_1|u_logic|I30wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K4mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K4mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Jw93z4~q ;
-wire \soc_inst|m0_1|u_logic|X6m2z4~q ;
-wire \soc_inst|m0_1|u_logic|Gf43z4~q ;
-wire \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|D7bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X533z4~q ;
-wire \soc_inst|m0_1|u_logic|Ow13z4~q ;
-wire \soc_inst|m0_1|u_logic|D7bwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|J5m2z4~q ;
-wire \soc_inst|m0_1|u_logic|A9bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bv03z4~q ;
-wire \soc_inst|m0_1|u_logic|Hyz2z4~q ;
-wire \soc_inst|m0_1|u_logic|D7bwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|D7bwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O2bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I30wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|If33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|S6nwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Imnwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qs7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qs7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|F8iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pmnwx4~combout ;
-wire \soc_inst|m0_1|u_logic|E5awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add2~74 ;
-wire \soc_inst|m0_1|u_logic|Add2~70 ;
-wire \soc_inst|m0_1|u_logic|Add2~65_sumout ;
-wire \soc_inst|m0_1|u_logic|Ldhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M9awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vgg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xi2xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Olg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Wrg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sog3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ccg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Nag3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dng3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dmvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Gfg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Rdg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dmvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dmvwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Kig3z4~q ;
-wire \soc_inst|m0_1|u_logic|Xu82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Avg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ltg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xu82z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Eyg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Zjg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xu82z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uw82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xu82z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sknwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sknwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yilwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sknwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zetwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Xuxwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Mouwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T2owx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~82 ;
-wire \soc_inst|m0_1|u_logic|Add3~77_sumout ;
-wire \soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|S703z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|S703z4~q ;
-wire \soc_inst|m0_1|u_logic|U9a2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zgr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rba2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bk33z4~q ;
-wire \soc_inst|m0_1|u_logic|U9a2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kt43z4~q ;
-wire \soc_inst|m0_1|u_logic|T263z4~q ;
-wire \soc_inst|m0_1|u_logic|U9a2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U9a2z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Cgu2z4~q ;
-wire \soc_inst|m0_1|u_logic|H2wwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kfr2z4~q ;
-wire \soc_inst|m0_1|u_logic|H2wwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vdr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Lpv2z4~q ;
-wire \soc_inst|m0_1|u_logic|H2wwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Rr93z4~q ;
-wire \soc_inst|m0_1|u_logic|Gcr2z4~q ;
-wire \soc_inst|m0_1|u_logic|H2wwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|H2wwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cqovx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[10]~10_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~78 ;
-wire \soc_inst|m0_1|u_logic|Add3~105_sumout ;
-wire \soc_inst|m0_1|u_logic|Z0g3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hnr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Mi33z4~q ;
-wire \soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Wj83z4~q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|O2g3z4~q ;
-wire \soc_inst|m0_1|u_logic|X94xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kzf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Wnv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Vxf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|C4b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Rhfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rhfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rhfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Neu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Lqr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|E163z4~q ;
-wire \soc_inst|m0_1|u_logic|Cq93z4~q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wnv2z4~q ;
 wire \soc_inst|m0_1|u_logic|Wor2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ciawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ciawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B91wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~46 ;
-wire \soc_inst|m0_1|u_logic|Add5~14 ;
-wire \soc_inst|m0_1|u_logic|Add5~17_sumout ;
-wire \soc_inst|m0_1|u_logic|B91wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ya1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ya1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B91wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vr43z4~q ;
-wire \soc_inst|m0_1|u_logic|I3a2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I3a2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|D923z4~q ;
-wire \soc_inst|m0_1|u_logic|I3a2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|F5a2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I3a2z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Zkuwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Na73z4~q ;
-wire \soc_inst|m0_1|u_logic|Zkuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cq93z4~q ;
 wire \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Zkuwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Neu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zkuwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Zkuwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|haddr_o~5_combout ;
+wire \soc_inst|m0_1|u_logic|Vzdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Psh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Mi23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Naq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wj73z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Wj73z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Vr33z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Vr33z4~q ;
+wire \soc_inst|m0_1|u_logic|Ft83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Lph3z4~q ;
+wire \soc_inst|m0_1|u_logic|E153z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|E153z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wnu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Euh3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Euh3z4~q ;
+wire \soc_inst|m0_1|u_logic|T04xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fxv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Arh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ccq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~93_sumout ;
+wire \soc_inst|m0_1|u_logic|Mi23z4~q ;
+wire \soc_inst|m0_1|u_logic|Vr33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Aw9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Na63z4~q ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|P82wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ns9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ns9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~62 ;
+wire \soc_inst|m0_1|u_logic|Add5~65_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~3_combout ;
+wire \soc_inst|m0_1|u_logic|Zcivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y8q2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E0d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~combout ;
+wire \soc_inst|m0_1|u_logic|N72wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q52wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q52wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rdq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ft83z4~q ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cao2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Sg83z4~q ;
+wire \soc_inst|m0_1|u_logic|Z52xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W21wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Jbu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Skv2z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ro43z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ro43z4~q ;
+wire \soc_inst|m0_1|u_logic|J5o2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I113z4~q ;
+wire \soc_inst|m0_1|u_logic|O403z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Y6o2z4~q ;
+wire \soc_inst|m0_1|u_logic|If33z4~q ;
+wire \soc_inst|m0_1|u_logic|Z523z4~q ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rbo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ay53z4~q ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hs92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|U11wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~66 ;
+wire \soc_inst|m0_1|u_logic|Add5~69_sumout ;
+wire \soc_inst|m0_1|u_logic|Add3~89_sumout ;
+wire \soc_inst|m0_1|u_logic|Vpovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Eijvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ym93z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|W21wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W21wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Kfawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G11wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G11wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W21wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qz0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qz0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ecowx4~combout ;
 wire \soc_inst|ram_1|memory.raddr_a[11]~11_combout ;
-wire \soc_inst|ram_1|byte3~0_combout ;
-wire \soc_inst|m0_1|u_logic|O3awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kih2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ehcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rmawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mdzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ducvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Whh2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wqm2z4~q ;
-wire \soc_inst|m0_1|u_logic|R6v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Svqwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ixt2z4~q ;
-wire \soc_inst|m0_1|u_logic|R283z4~q ;
-wire \soc_inst|m0_1|u_logic|Svqwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ksm2z4~q ;
-wire \soc_inst|m0_1|u_logic|It63z4~q ;
-wire \soc_inst|m0_1|u_logic|Svqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G493z4~q ;
-wire \soc_inst|m0_1|u_logic|Ipm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Svqwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Svqwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wyt2z4~q ;
-wire \soc_inst|m0_1|u_logic|F483z4~q ;
-wire \soc_inst|m0_1|u_logic|Qxuwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Gip2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Gip2z4~q ;
-wire \soc_inst|m0_1|u_logic|F8v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qxuwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|W893z4~q ;
-wire \soc_inst|m0_1|u_logic|Sgp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qxuwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wu63z4~q ;
-wire \soc_inst|m0_1|u_logic|Ujp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qxuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qxuwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Rw7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rvv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Lr9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Asr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qyc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Lr9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Imu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Lr9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ii73z4~q ;
-wire \soc_inst|m0_1|u_logic|Cvr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Lr9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lr9wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Fkdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rhu2z4~q ;
-wire \soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pjqwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pjqwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pjqwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Oas2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pjqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pjqwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Nodwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nodwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I7owx4~combout ;
-wire \soc_inst|m0_1|u_logic|I2twx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qfc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qfc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Rbmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V3o2z4~q ;
+wire \soc_inst|m0_1|u_logic|K3uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W2uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Aqp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qrp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~4_combout ;
+wire \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|G10xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G10xx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I90xx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I90xx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bec3z4~q ;
+wire \soc_inst|m0_1|u_logic|Okn2z4~q ;
+wire \soc_inst|m0_1|u_logic|X563z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa03z4~q ;
+wire \soc_inst|m0_1|u_logic|Fn33z4~q ;
+wire \soc_inst|m0_1|u_logic|Q713z4~q ;
+wire \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|K4mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K4mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jw93z4~q ;
+wire \soc_inst|m0_1|u_logic|Wd23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cmn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ow43z4~q ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Vu93z4~q ;
+wire \soc_inst|m0_1|u_logic|Psv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mhn2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Mhn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q1ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Po83z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gju2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gf73z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Gf73z4~q ;
+wire \soc_inst|m0_1|u_logic|Q1ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q1ywx4~combout ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bec3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ckuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F2ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pxb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Pguvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Y1ivx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Hub3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ihlwx4~0_combout ;
-wire \soc_inst|switches_1|switch_store[0][3]~q ;
-wire \soc_inst|ram_1|data_to_memory[3]~20_combout ;
-wire \soc_inst|m0_1|u_logic|Ny3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Knvvx4~0_combout ;
-wire \soc_inst|ram_1|data_to_memory[27]~19_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[3]~26_combout ;
-wire \soc_inst|m0_1|u_logic|Ihlwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ihlwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ihlwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Qfzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qfzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hrcvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qdtwx4~combout ;
-wire \soc_inst|m0_1|u_logic|C3z2z4~q ;
-wire \soc_inst|m0_1|u_logic|T7cwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Phlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T31xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C5v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tvt2z4~q ;
-wire \soc_inst|m0_1|u_logic|R91xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C183z4~q ;
-wire \soc_inst|m0_1|u_logic|Joi3z4~q ;
-wire \soc_inst|m0_1|u_logic|Umi3z4~q ;
-wire \soc_inst|m0_1|u_logic|Tr63z4~q ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Vmj2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Vmj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Jq13z4~q ;
-wire \soc_inst|m0_1|u_logic|F9j2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B943z4~q ;
-wire \soc_inst|m0_1|u_logic|Zpj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Sz23z4~q ;
-wire \soc_inst|m0_1|u_logic|Ki53z4~q ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fli3z4~q ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|Rih2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~62 ;
-wire \soc_inst|m0_1|u_logic|Add3~58 ;
-wire \soc_inst|m0_1|u_logic|Add3~102 ;
-wire \soc_inst|m0_1|u_logic|Add3~113_sumout ;
-wire \soc_inst|m0_1|u_logic|Y92wx4~combout ;
-wire \soc_inst|m0_1|u_logic|B6j2z4~q ;
-wire \soc_inst|m0_1|u_logic|K8ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qji3z4~q ;
-wire \soc_inst|m0_1|u_logic|P582z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|P582z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|P582z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M782z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P582z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Gtnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q9cwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ancvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add5~126 ;
-wire \soc_inst|m0_1|u_logic|Add5~121_sumout ;
-wire \soc_inst|m0_1|u_logic|Yqzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R3uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rbmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V3o2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Owgvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ywi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R6n2z4~q ;
-wire \soc_inst|m0_1|u_logic|T83xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dq53z4~q ;
 wire \soc_inst|m0_1|u_logic|L733z4~q ;
+wire \soc_inst|m0_1|u_logic|Dq53z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Wa0wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ug43z4~q ;
-wire \soc_inst|m0_1|u_logic|J0n2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|J0n2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pw03z4~q ;
-wire \soc_inst|m0_1|u_logic|Vzz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Y1n2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cy13z4~q ;
+wire \soc_inst|m0_1|u_logic|R6n2z4~q ;
+wire \soc_inst|m0_1|u_logic|T83xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|N3n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cy13z4~q ;
 wire \soc_inst|m0_1|u_logic|Wa0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ;
-wire \soc_inst|m0_1|u_logic|K3uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W2uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|X9n2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yhnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~114 ;
-wire \soc_inst|m0_1|u_logic|Add2~78 ;
-wire \soc_inst|m0_1|u_logic|Add2~30 ;
-wire \soc_inst|m0_1|u_logic|Add2~22 ;
-wire \soc_inst|m0_1|u_logic|Add2~10 ;
-wire \soc_inst|m0_1|u_logic|Add2~13_sumout ;
-wire \soc_inst|m0_1|u_logic|Mhhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mhhvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Vvx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yhnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cqo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dq73z4~q ;
-wire \soc_inst|m0_1|u_logic|Duuwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ruj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Duuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fwj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Duuwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Dtj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Duuwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Duuwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Rvu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cawwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Unm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Gmm2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Cawwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ii63z4~q ;
-wire \soc_inst|m0_1|u_logic|Skm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cawwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rr73z4~q ;
-wire \soc_inst|m0_1|u_logic|Cawwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cawwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jiowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fxu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Saqwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rro2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Rro2z4~q ;
-wire \soc_inst|m0_1|u_logic|Saqwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wnt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Saqwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wj63z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Wj63z4~q ;
-wire \soc_inst|m0_1|u_logic|Vuo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Saqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Saqwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Kepwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kepwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qmdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xmdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xmdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J7ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|I2uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B1a3z4~q ;
-wire \soc_inst|m0_1|u_logic|Repwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jxs2z4~q ;
-wire \soc_inst|m0_1|u_logic|Aqp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Repwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lns2z4~q ;
-wire \soc_inst|m0_1|u_logic|L0uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Q6l2z4~q ;
-wire \soc_inst|m0_1|u_logic|Repwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ncpwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A9iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mof3z4~q ;
-wire \soc_inst|m0_1|u_logic|Xmf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Icxwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Bqf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ldf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Icxwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Aff3z4~q ;
-wire \soc_inst|m0_1|u_logic|Icxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wbf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Orj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Icxwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Icxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add3~58 ;
+wire \soc_inst|m0_1|u_logic|Add3~101_sumout ;
+wire \soc_inst|m0_1|u_logic|C5n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wj82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dq53z4~q ;
+wire \soc_inst|m0_1|u_logic|Ug43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vzz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pw03z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|N90wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E5awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V883z4~q ;
 wire \soc_inst|m0_1|u_logic|Md93z4~q ;
-wire \soc_inst|m0_1|u_logic|G4qwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vcv2z4~q ;
-wire \soc_inst|m0_1|u_logic|G4qwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Mz63z4~q ;
-wire \soc_inst|m0_1|u_logic|G4qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|M3u2z4~q ;
-wire \soc_inst|m0_1|u_logic|G4qwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|G4qwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Asdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nvdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Asdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lpt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Eruwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Jw83z4~q ;
-wire \soc_inst|m0_1|u_logic|Fio2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eruwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ujo2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ujo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uyu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eruwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ll63z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ll63z4~q ;
-wire \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Eruwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Eruwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Kjk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zkk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|F8wwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rht2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rd63z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|An73z4~q ;
-wire \soc_inst|m0_1|u_logic|F8wwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|F8wwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Beowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V0k2z4~q ;
-wire \soc_inst|m0_1|u_logic|K2k2z4~q ;
-wire \soc_inst|m0_1|u_logic|Y1v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nz83z4~q ;
-wire \soc_inst|m0_1|u_logic|Feqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pst2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z3k2z4~q ;
-wire \soc_inst|m0_1|u_logic|Po63z4~q ;
-wire \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Feqwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Feqwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vgq2z4~q ;
-wire \soc_inst|m0_1|u_logic|J0v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yx83z4~q ;
-wire \soc_inst|m0_1|u_logic|Fexwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kiq2z4~q ;
-wire \soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Art2z4~q ;
-wire \soc_inst|m0_1|u_logic|Jw73z4~q ;
-wire \soc_inst|m0_1|u_logic|Fexwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fexwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zudwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zudwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bus2z4~q ;
-wire \soc_inst|m0_1|u_logic|Avowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G8n2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dks2z4~q ;
-wire \soc_inst|m0_1|u_logic|Avowx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Avowx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ddi3z4~q ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ;
-wire \soc_inst|m0_1|u_logic|I1h3z4~q ;
-wire \soc_inst|m0_1|u_logic|F473z4~q ;
-wire \soc_inst|m0_1|u_logic|Fi93z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Tvn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Od83z4~q ;
-wire \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ohv2z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|St0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|St0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ;
-wire \soc_inst|m0_1|u_logic|Xyn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~2 ;
-wire \soc_inst|m0_1|u_logic|Add0~73_sumout ;
-wire \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Sg83z4~q ;
-wire \soc_inst|m0_1|u_logic|Z52xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cao2z4~q ;
-wire \soc_inst|m0_1|u_logic|J773z4~q ;
-wire \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|W21wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|W21wx4~combout ;
-wire \soc_inst|m0_1|u_logic|O24wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gdo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Womvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xeo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~74 ;
-wire \soc_inst|m0_1|u_logic|Add0~29_sumout ;
+wire \soc_inst|m0_1|u_logic|Vcv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|E5awx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K1z2z4~q ;
+wire \soc_inst|m0_1|u_logic|U6awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ka83z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Ebh3z4~q ;
+wire \soc_inst|m0_1|u_logic|B173z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|U6awx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M9awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rdg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gfg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nag3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hqg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dng3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Kig3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ccg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Olg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eyg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xi2xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Avg3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Avg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ltg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add3~66 ;
+wire \soc_inst|m0_1|u_logic|Add3~61_sumout ;
+wire \soc_inst|m0_1|u_logic|Oaawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ht53z4~q ;
+wire \soc_inst|m0_1|u_logic|Pa33z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Yj43z4~q ;
+wire \soc_inst|m0_1|u_logic|A9p2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ixh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Tvh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|M0i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nr2xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G123z4~q ;
+wire \soc_inst|m0_1|u_logic|Ecp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Qg93z4~q ;
+wire \soc_inst|m0_1|u_logic|Q273z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xyh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zfv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Oaawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ey03z4~q ;
+wire \soc_inst|m0_1|u_logic|K103z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Nl43z4~q ;
+wire \soc_inst|m0_1|u_logic|Arn2z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ec33z4~q ;
+wire \soc_inst|m0_1|u_logic|Wu53z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Psn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~69_sumout ;
 wire \soc_inst|m0_1|u_logic|Add3~85_sumout ;
+wire \soc_inst|m0_1|u_logic|Df83z4~q ;
+wire \soc_inst|m0_1|u_logic|D1p2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uj93z4~q ;
+wire \soc_inst|m0_1|u_logic|U573z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|U573z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~8_combout ;
 wire \soc_inst|m0_1|u_logic|Gdawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K423z4~q ;
-wire \soc_inst|m0_1|u_logic|Ozo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yw0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|M92xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lw53z4~q ;
-wire \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Yw0wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Tz03z4~q ;
 wire \soc_inst|m0_1|u_logic|Z203z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Z203z4~q ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Zxo2z4~q ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cn43z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Cn43z4~q ;
+wire \soc_inst|m0_1|u_logic|Kwo2z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Kwo2z4~q ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Td33z4~q ;
+wire \soc_inst|m0_1|u_logic|Lw53z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ozo2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ozo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|K423z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|K423z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S2p2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|S2p2z4~q ;
+wire \soc_inst|m0_1|u_logic|M92xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Gdawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~93_sumout ;
-wire \soc_inst|m0_1|u_logic|Add3~106 ;
-wire \soc_inst|m0_1|u_logic|Add3~97_sumout ;
-wire \soc_inst|m0_1|u_logic|haddr_o~4_combout ;
-wire \soc_inst|m0_1|u_logic|Pdjvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J7q2z4~q ;
-wire \soc_inst|m0_1|u_logic|Psh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Mi23z4~q ;
-wire \soc_inst|m0_1|u_logic|Ft83z4~q ;
-wire \soc_inst|m0_1|u_logic|Vr33z4~q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wj73z4~q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Arh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Wnu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rdq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Na63z4~q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Lph3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Lph3z4~q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|T04xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ccq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ns9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ns9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|N72wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mgawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J61wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J61wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O51wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M41wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ai9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Snd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ai9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B5e3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ai9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ai9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ai9wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Sndwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C0ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sndwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tkdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Godwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tkdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J9d3z4~q ;
-wire \soc_inst|m0_1|u_logic|Xdb3z4~q ;
-wire \soc_inst|m0_1|u_logic|J7b3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gcb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Pab3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Pab3z4~q ;
-wire \soc_inst|m0_1|u_logic|Jkc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jkc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Jruvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|D1ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F4c3z4~q ;
-wire \soc_inst|m0_1|u_logic|Wkpwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wkpwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wkpwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wkpwx4~3_combout ;
-wire \SW[6]~input_o ;
-wire \soc_inst|switches_1|switch_store[0][6]~feeder_combout ;
-wire \soc_inst|switches_1|switch_store[0][6]~q ;
-wire \soc_inst|interconnect_1|HRDATA[6]~36_combout ;
-wire \soc_inst|m0_1|u_logic|O9iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O9iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|X61wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X61wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|M41wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Y873z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Y873z4~q ;
-wire \soc_inst|m0_1|u_logic|F4q2z4~q ;
-wire \soc_inst|m0_1|u_logic|O723z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Gq43z4~q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Pz53z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Pz53z4~q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|S71wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Mgawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~18 ;
-wire \soc_inst|m0_1|u_logic|Add5~62 ;
-wire \soc_inst|m0_1|u_logic|Add5~65_sumout ;
-wire \soc_inst|m0_1|u_logic|Q52wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q52wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E0d3z4~q ;
-wire \soc_inst|m0_1|u_logic|Naq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ey9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ey9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ey9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Fxv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ey9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ey9wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Euh3z4~q ;
-wire \soc_inst|m0_1|u_logic|E153z4~q ;
-wire \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Du9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Du9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Aw9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Du9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Du9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|P82wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|haddr_o~3_combout ;
-wire \soc_inst|m0_1|u_logic|Zcivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y8q2z4~q ;
-wire \soc_inst|m0_1|u_logic|If33z4~q ;
-wire \soc_inst|m0_1|u_logic|Z523z4~q ;
-wire \soc_inst|m0_1|u_logic|Kq92z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rbo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ay53z4~q ;
-wire \soc_inst|m0_1|u_logic|Ro43z4~q ;
-wire \soc_inst|m0_1|u_logic|Kq92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|I113z4~q ;
-wire \soc_inst|m0_1|u_logic|Kq92z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hs92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kq92z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|U11wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~66 ;
-wire \soc_inst|m0_1|u_logic|Add5~70 ;
-wire \soc_inst|m0_1|u_logic|Add5~73_sumout ;
-wire \soc_inst|m0_1|u_logic|Bv0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Tmjvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H4p2z4~q ;
-wire \soc_inst|m0_1|u_logic|U9u2z4~q ;
-wire \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xcuwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Djv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xcuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xcuwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Yj92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S2p2z4~q ;
 wire \soc_inst|m0_1|u_logic|D1p2z4~q ;
 wire \soc_inst|m0_1|u_logic|Vl92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Td33z4~q ;
+wire \soc_inst|m0_1|u_logic|Yj92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Yj92z4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Yj92z4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Yj92z4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fx0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iv0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Iv0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Df83z4~q ;
-wire \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Yw0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uj93z4~q ;
-wire \soc_inst|m0_1|u_logic|U573z4~q ;
-wire \soc_inst|m0_1|u_logic|Yw0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Yw0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Yw0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ;
-wire \soc_inst|m0_1|u_logic|B2i3z4~q ;
-wire \soc_inst|m0_1|u_logic|Pomvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S3i3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~30 ;
-wire \soc_inst|m0_1|u_logic|Add0~17_sumout ;
-wire \soc_inst|m0_1|u_logic|Iomvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O0o2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~18 ;
-wire \soc_inst|m0_1|u_logic|Add0~54 ;
-wire \soc_inst|m0_1|u_logic|Add0~45_sumout ;
-wire \soc_inst|m0_1|u_logic|Unmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z2h3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~46 ;
-wire \soc_inst|m0_1|u_logic|Add0~69_sumout ;
-wire \soc_inst|m0_1|u_logic|Llq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Poq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rz13z4~q ;
-wire \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ji43z4~q ;
-wire \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|D03xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A933z4~q ;
-wire \soc_inst|m0_1|u_logic|Sr53z4~q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|P9h3z4~q ;
-wire \soc_inst|m0_1|u_logic|A8h3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|B5u2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Ka83z4~q ;
-wire \soc_inst|m0_1|u_logic|B173z4~q ;
-wire \soc_inst|m0_1|u_logic|Bf93z4~q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Ebh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ;
-wire \soc_inst|m0_1|u_logic|Ieh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Nnmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ogo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~70 ;
-wire \soc_inst|m0_1|u_logic|Add0~85_sumout ;
-wire \soc_inst|m0_1|u_logic|Cma3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cma3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gnmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Y7iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y7iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Y7iwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|E9zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E9zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E1ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E1ewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kqdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wwdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ycu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hi83z4~q ;
-wire \soc_inst|m0_1|u_logic|Hmqwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|B1q2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hmv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hmqwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hmqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mzp2z4~q ;
-wire \soc_inst|m0_1|u_logic|No93z4~q ;
-wire \soc_inst|m0_1|u_logic|Hmqwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hmqwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Mydwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C0ewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zndwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vzdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vzdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zndwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Djdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wwdwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Mydwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yxdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D9uwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Anq2z4~q ;
-wire \soc_inst|m0_1|u_logic|D9uwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kev2z4~q ;
-wire \soc_inst|m0_1|u_logic|D9uwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Eqq2z4~q ;
-wire \soc_inst|m0_1|u_logic|D9uwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D9uwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qtdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qtdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tq7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Godwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|S08wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wwdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Qmdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Djdwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Widwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jiowx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B28wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fkdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fq7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Djdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Djdwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Nvdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uvdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kqdwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Dqdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xtdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xtdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kqdwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|U18wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yvtwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fwtwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xs7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xs7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kqdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Beowx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Q7ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q7ewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kvtwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Gftwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kw7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kw7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Iutwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cuxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hr7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X7ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A6ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gftwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|F5ewx4~combout ;
-wire \soc_inst|m0_1|u_logic|W3ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W3ewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Wpcvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Nz73z4~q ;
-wire \soc_inst|m0_1|u_logic|Igl2z4~q ;
-wire \soc_inst|m0_1|u_logic|C193z4~q ;
-wire \soc_inst|m0_1|u_logic|Eq63z4~q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Eut2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Edl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|M743z4~q ;
-wire \soc_inst|m0_1|u_logic|Pbl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Vg53z4~q ;
-wire \soc_inst|m0_1|u_logic|Dy23z4~q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Csz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xhl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wo03z4~q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Tel2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uo13z4~q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~combout ;
-wire \soc_inst|m0_1|u_logic|J4awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~122 ;
-wire \soc_inst|m0_1|u_logic|Add5~58 ;
-wire \soc_inst|m0_1|u_logic|Add5~5_sumout ;
-wire \soc_inst|m0_1|u_logic|Dih2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ovcvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add5~118 ;
-wire \soc_inst|m0_1|u_logic|Add5~9_sumout ;
-wire \soc_inst|m0_1|u_logic|Szr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eyr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qwr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hp9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z863z4~q ;
-wire \soc_inst|m0_1|u_logic|Qz43z4~q ;
-wire \soc_inst|m0_1|u_logic|Kn9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kc03z4~q ;
-wire \soc_inst|m0_1|u_logic|E913z4~q ;
-wire \soc_inst|m0_1|u_logic|Kn9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hq33z4~q ;
-wire \soc_inst|m0_1|u_logic|Kn9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kn9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|F32wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K9z2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tuawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tuawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hnbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qzq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z4bwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hnbwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~30 ;
-wire \soc_inst|m0_1|u_logic|Add5~94 ;
-wire \soc_inst|m0_1|u_logic|Add5~102 ;
-wire \soc_inst|m0_1|u_logic|Add5~34 ;
-wire \soc_inst|m0_1|u_logic|Add5~98 ;
-wire \soc_inst|m0_1|u_logic|Add5~110 ;
-wire \soc_inst|m0_1|u_logic|Add5~38 ;
-wire \soc_inst|m0_1|u_logic|Add5~82 ;
-wire \soc_inst|m0_1|u_logic|Add5~41_sumout ;
-wire \soc_inst|m0_1|u_logic|Do8wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jf92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~70 ;
+wire \soc_inst|m0_1|u_logic|Add5~73_sumout ;
+wire \soc_inst|m0_1|u_logic|Bv0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tmjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H4p2z4~q ;
 wire \soc_inst|m0_1|u_logic|Ixn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tvn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jf92z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Md92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ec33z4~q ;
+wire \soc_inst|m0_1|u_logic|V223z4~q ;
 wire \soc_inst|m0_1|u_logic|Md92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|K103z4~q ;
 wire \soc_inst|m0_1|u_logic|Md92z4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Md92z4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Add5~74 ;
 wire \soc_inst|m0_1|u_logic|Add5~21_sumout ;
-wire \soc_inst|m0_1|u_logic|U6awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U6awx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oaawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zb83z4~q ;
-wire \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qg93z4~q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zfv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Oaawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|A792z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xyh3z4~q ;
-wire \soc_inst|m0_1|u_logic|X892z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pa33z4~q ;
-wire \soc_inst|m0_1|u_logic|A792z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|A792z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|A792z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fq0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Irjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W5p2z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jq1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eun2z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|St0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Ecawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Od83z4~q ;
+wire \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|F473z4~q ;
+wire \soc_inst|m0_1|u_logic|Fi93z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|St0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ecawx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Add5~22 ;
 wire \soc_inst|m0_1|u_logic|Add5~50 ;
+wire \soc_inst|m0_1|u_logic|Add5~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Ug0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|M0kvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tzg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|M9awx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Add5~54 ;
-wire \soc_inst|m0_1|u_logic|Add5~25_sumout ;
-wire \soc_inst|m0_1|u_logic|Do8wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~69_sumout ;
-wire \soc_inst|m0_1|u_logic|Do8wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~49_sumout ;
-wire \soc_inst|m0_1|u_logic|Do8wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Do8wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Phh2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bk23z4~q ;
-wire \soc_inst|m0_1|u_logic|H972z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pfz2z4~q ;
-wire \soc_inst|m0_1|u_logic|H972z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|T253z4~q ;
-wire \soc_inst|m0_1|u_logic|H972z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Eb72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H972z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|A67wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zwcvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add5~10 ;
-wire \soc_inst|m0_1|u_logic|Add5~77_sumout ;
-wire \soc_inst|m0_1|u_logic|Add5~81_sumout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~0_combout ;
-wire \soc_inst|interconnect_1|HRDATA[11]~3_combout ;
-wire \soc_inst|ram_1|data_to_memory[12]~13_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ;
-wire \soc_inst|ram_1|data_to_memory[28]~14_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[12]~22_combout ;
-wire \soc_inst|m0_1|u_logic|Xrmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xrmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dpc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dpc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bsvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xrmwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|B2uvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U1uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Adt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Oxuvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R1ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ipb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Fhc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fhc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dewwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dewwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Gtmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gtmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Gtmwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE_q ;
-wire \soc_inst|switches_1|switch_store[1][4]~q ;
-wire \soc_inst|m0_1|u_logic|Sjvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ntmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ntmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wzpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lsmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lsmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wzpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D47wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zxpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Phh2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|S17wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rhnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rhnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Idk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mnawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C3qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~15_combout ;
-wire \soc_inst|m0_1|u_logic|Ox1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Nf1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rjzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Ox1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wsawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Cr1wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|G6d3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G6d3z4~q ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ;
-wire \soc_inst|m0_1|u_logic|Kxe3z4~q ;
-wire \soc_inst|m0_1|u_logic|Aze3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~10 ;
-wire \soc_inst|m0_1|u_logic|Add0~77_sumout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ;
-wire \soc_inst|m0_1|u_logic|W3f3z4~q ;
-wire \soc_inst|m0_1|u_logic|Armvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M5f3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~78 ;
-wire \soc_inst|m0_1|u_logic|Add0~25_sumout ;
-wire \soc_inst|m0_1|u_logic|Tqmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Mxa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I0ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y9l2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vve3z4~q ;
-wire \soc_inst|m0_1|u_logic|Vve3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Khfwx4~0_combout ;
-wire \soc_inst|interconnect_1|HRDATA[8]~15_combout ;
-wire \SW[9]~input_o ;
-wire \soc_inst|switches_1|switch_store[0][9]~q ;
-wire \soc_inst|interconnect_1|HRDATA[9]~16_combout ;
-wire \soc_inst|m0_1|u_logic|Khfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Khfwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Khfwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Vq1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vq1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vq1wx4~combout ;
-wire \soc_inst|m0_1|u_logic|G6d3z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ffbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cr1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cr1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uozvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uozvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L9zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L9zvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|L9zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L9zvx4~combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~13_combout ;
-wire \soc_inst|m0_1|u_logic|Z80wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z80wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~19_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~21_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~20_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~18_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|Ri0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ri0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Znzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Dv8wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~10_combout ;
-wire \soc_inst|m0_1|u_logic|Ee8wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ee8wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ee8wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ee8wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~11_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~12_combout ;
-wire \soc_inst|m0_1|u_logic|Nyawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~17_combout ;
-wire \soc_inst|m0_1|u_logic|Wccwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fyzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~14_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~16_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|S9zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R38wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R38wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qb3wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Z9zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Igi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rhi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~14 ;
-wire \soc_inst|m0_1|u_logic|Add2~1_sumout ;
-wire \soc_inst|m0_1|u_logic|Tvhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tvhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tvhvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Omk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Velvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Velvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vr23z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Vr23z4~q ;
-wire \soc_inst|m0_1|u_logic|Mi13z4~q ;
-wire \soc_inst|m0_1|u_logic|Ec62z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Na53z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Na53z4~q ;
-wire \soc_inst|m0_1|u_logic|E143z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|E143z4~q ;
-wire \soc_inst|m0_1|u_logic|Ec62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N8i3z4~q ;
-wire \soc_inst|m0_1|u_logic|Be62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cai3z4~q ;
-wire \soc_inst|m0_1|u_logic|J5i3z4~q ;
-wire \soc_inst|m0_1|u_logic|Y6i3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ec62z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ec62z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Q8zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C8zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F6zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F6zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ft73z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ft73z4~q ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Gto2z4~q ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uu83z4~q ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~2_combout ;
-wire \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tyywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uqi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hzywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~18_combout ;
-wire \soc_inst|m0_1|u_logic|Hzj2z4~q ;
-wire \soc_inst|m0_1|u_logic|M5mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S5b3z4~q ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~10_combout ;
-wire \soc_inst|m0_1|u_logic|Ynvvx4~combout ;
-wire \soc_inst|m0_1|u_logic|M5mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bec3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bec3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ckuvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F2ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pxb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add5~26 ;
+wire \soc_inst|m0_1|u_logic|Add5~1_sumout ;
+wire \soc_inst|m0_1|u_logic|C70wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Q9kvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zfh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ug43z4~q ;
+wire \soc_inst|m0_1|u_logic|J0n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fed3z4~q ;
 wire \soc_inst|m0_1|u_logic|D0wwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|D0wwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I90xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iuuvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K1ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uic3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uic3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bmb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wzvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wzvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Jjuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B90xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tb0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hdzwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Douvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|W0ivx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|X0c3z4~q ;
 wire \soc_inst|m0_1|u_logic|Ylc3z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ylc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Z4l2z4~q ;
-wire \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Jruvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F4c3z4~q ;
+wire \soc_inst|m0_1|u_logic|Jkc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Jkc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|K7pwx4~combout ;
+wire \soc_inst|m0_1|u_logic|L0uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Q6l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H8l2z4~q ;
+wire \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|A50xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ayzwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Jjuwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|K9ovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T2ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gxk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mcc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Mcc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zad3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ruvvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M2ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|G10xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ztc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ztc3z4~q ;
-wire \soc_inst|m0_1|u_logic|G10xx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fb0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S00xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I90xx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tb0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B90xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cjuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wvzwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pwywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qrp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hdzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Usl2z4~q ;
-wire \soc_inst|m0_1|u_logic|N10xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uic3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uic3z4~q ;
+wire \soc_inst|m0_1|u_logic|Iuuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N7c3z4~q ;
+wire \soc_inst|m0_1|u_logic|Fhc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fhc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Axm2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xdb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wzvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ipb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Oxuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wzvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jjuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wvzwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|F40xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N10xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Adzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wvzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I90xx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|A6zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wuq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yauvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gzhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tqzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jsa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Syhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lul2z4~q ;
-wire \soc_inst|m0_1|u_logic|Jsc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Jsc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Cps2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uls2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xwvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xwvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Arzwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vgs2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tib3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dizwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kizwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fczwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lee3z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ;
+wire \soc_inst|m0_1|u_logic|Lee3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|K9vvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Uzhvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ble3z4~q ;
-wire \soc_inst|m0_1|u_logic|Lee3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lee3z4~q ;
 wire \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ;
-wire \soc_inst|m0_1|u_logic|Wva2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B0ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ipn2z4~q ;
 wire \soc_inst|m0_1|u_logic|Nnc3z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Nnc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Azs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wva2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B0ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|E0uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qztvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Svs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bus2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jxs2z4~q ;
 wire \soc_inst|m0_1|u_logic|Gyvwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Gyvwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|B6pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vve3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vve3z4~q ;
+wire \soc_inst|m0_1|u_logic|Mxa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I0ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9l2z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ;
 wire \soc_inst|m0_1|u_logic|H2f3z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|H2f3z4~q ;
-wire \soc_inst|m0_1|u_logic|T8f3z4~q ;
 wire \soc_inst|m0_1|u_logic|Mhvvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|P0ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tqs2z4~q ;
+wire \soc_inst|m0_1|u_logic|T8f3z4~q ;
 wire \soc_inst|m0_1|u_logic|Kkb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Kss2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gcb3z4~q ;
 wire \soc_inst|m0_1|u_logic|Whzwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Whzwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Fjzwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Qlzwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Yizwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Mczwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B6pwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B6pwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Iazwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J7zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ihzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Clzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T5zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B6pwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|H6zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ozywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J0zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vzywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kbzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Jzzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qzzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Czzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R4zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vzywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Gvywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E5owx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C0zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X2rvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pjyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ahowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tgowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tlyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tlyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rkyvx4~0_combout ;
-wire \soc_inst|ram_1|data_to_memory[8]~28_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ;
+wire \soc_inst|m0_1|u_logic|T2owx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qwowx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vytvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tqc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tqc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Txa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zyhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rym2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dks2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lns2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jsc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jsc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Uls2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jsa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Syhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lul2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xwvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xwvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kizwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Arzwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tib3z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ;
+wire \soc_inst|m0_1|u_logic|Dpc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dpc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Kwa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oar2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nzhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pab3z4~q ;
+wire \soc_inst|m0_1|u_logic|Mis2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D4g3z4~q ;
+wire \soc_inst|m0_1|u_logic|D4g3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zxvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zxvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dizwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tqzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fczwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ihzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Clzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Iazwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Arzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pazwx4~combout ;
+wire \soc_inst|m0_1|u_logic|J7zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H6zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G2zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J0zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fb0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S00xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kbzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jzzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qzzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Czzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R4zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vzywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vzywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C0zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I2uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Knvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sx3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Imvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wbk2z4~q ;
+wire \soc_inst|m0_1|u_logic|T5mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|X9n2z4~q ;
+wire \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S4pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hzywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tyywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pwywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ozywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gvywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E5owx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X2rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pjyvx4~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[8]~15_combout ;
 wire \SW[8]~input_o ;
 wire \soc_inst|switches_1|switch_store[0][8]~q ;
+wire \soc_inst|ram_1|data_to_memory[8]~28_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ;
 wire \soc_inst|interconnect_1|HRDATA[8]~33_combout ;
-wire \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add0~34 ;
+wire \soc_inst|m0_1|u_logic|Add0~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Gha3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gha3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qsmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M2b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~22 ;
+wire \soc_inst|m0_1|u_logic|Add0~57_sumout ;
+wire \soc_inst|m0_1|u_logic|Wia3z4~q ;
+wire \soc_inst|m0_1|u_logic|Jsmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W0b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~58 ;
+wire \soc_inst|m0_1|u_logic|Add0~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Taa3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Taa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Csmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gza3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~42 ;
+wire \soc_inst|m0_1|u_logic|Add0~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Mka3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vrmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qxa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~66 ;
+wire \soc_inst|m0_1|u_logic|Add0~89_sumout ;
+wire \soc_inst|m0_1|u_logic|J7b3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J7b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ormvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z8b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~90 ;
+wire \soc_inst|m0_1|u_logic|Add0~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Nfb3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nfb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hrmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dhb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~10 ;
+wire \soc_inst|m0_1|u_logic|Add0~77_sumout ;
+wire \soc_inst|m0_1|u_logic|W3f3z4~q ;
+wire \soc_inst|m0_1|u_logic|Armvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M5f3z4~q ;
+wire \soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Hmyvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Hmyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mydwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C0ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C0ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ksbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ox1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~113_sumout ;
+wire \soc_inst|m0_1|u_logic|Ox1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iu1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W5s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ug73z4~q ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Duv2z4~q ;
+wire \soc_inst|m0_1|u_logic|I4s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uku2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U2s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cxc3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Cxc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Godwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|M3e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Sndwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Godwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S08wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Hmyvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|O3pvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|O3pvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rqzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R293z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|R293z4~q ;
-wire \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Mnvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vmj2z4~q ;
+wire \soc_inst|m0_1|u_logic|C5v2z4~q ;
 wire \soc_inst|m0_1|u_logic|Mnvwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tvt2z4~q ;
 wire \soc_inst|m0_1|u_logic|Mnvwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Mnvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zpj2z4~q ;
+wire \soc_inst|m0_1|u_logic|R293z4~q ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Mnvwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mrdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Jymwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jymwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|N7c3z4~q ;
-wire \soc_inst|m0_1|u_logic|Cymwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cymwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cymwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cymwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Qe0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qe0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Je0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mc0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mc0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tch3z4~q ;
-wire \soc_inst|m0_1|u_logic|Iq82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lo82z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lo82z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Lo82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lo82z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~26 ;
+wire \soc_inst|m0_1|u_logic|Rih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ancvx4~combout ;
+wire \soc_inst|m0_1|u_logic|T7cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M4j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bf9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pgf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eif3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uuf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qrf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ftf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ilf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Tjf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Add5~2 ;
-wire \soc_inst|m0_1|u_logic|Add5~125_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~62 ;
-wire \soc_inst|m0_1|u_logic|Add2~106 ;
-wire \soc_inst|m0_1|u_logic|Add2~117_sumout ;
-wire \soc_inst|m0_1|u_logic|Zdhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oa3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oa3wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oa3wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zdhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kaf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add5~126 ;
+wire \soc_inst|m0_1|u_logic|Add5~121_sumout ;
 wire \soc_inst|m0_1|u_logic|Add2~118 ;
 wire \soc_inst|m0_1|u_logic|Add2~113_sumout ;
 wire \soc_inst|m0_1|u_logic|Duhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3pvx4~combout ;
 wire \soc_inst|m0_1|u_logic|Duhvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Xyk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~102 ;
 wire \soc_inst|m0_1|u_logic|Add3~114 ;
 wire \soc_inst|m0_1|u_logic|Add3~109_sumout ;
 wire \soc_inst|m0_1|u_logic|Y1pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Q7j2z4~q ;
 wire \soc_inst|m0_1|u_logic|Vjnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Vjnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Q7j2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Joi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Umi3z4~q ;
+wire \soc_inst|m0_1|u_logic|M782z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sz23z4~q ;
+wire \soc_inst|m0_1|u_logic|Jq13z4~q ;
+wire \soc_inst|m0_1|u_logic|P582z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fli3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P582z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ki53z4~q ;
+wire \soc_inst|m0_1|u_logic|B943z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|B943z4~q ;
+wire \soc_inst|m0_1|u_logic|P582z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P582z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Gtnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q9cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yqzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rqzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C183z4~q ;
+wire \soc_inst|m0_1|u_logic|R91xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T31xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tr63z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|F9j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|B943z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qji3z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~1_combout ;
+wire \soc_inst|ram_1|data_to_memory[24]~26_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ;
+wire \soc_inst|switches_1|switch_store[1][8]~q ;
+wire \soc_inst|interconnect_1|HRDATA[24]~31_combout ;
+wire \soc_inst|m0_1|u_logic|Rkyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I21wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I21wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qz0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J773z4~q ;
+wire \soc_inst|m0_1|u_logic|N8o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|J5o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jl93z4~q ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yxdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yxdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zndwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nodwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zndwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kxe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~78 ;
+wire \soc_inst|m0_1|u_logic|Add0~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Tqmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aze3z4~q ;
+wire \soc_inst|m0_1|u_logic|I2twx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ppzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ppzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oihvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~114 ;
+wire \soc_inst|m0_1|u_logic|Add2~77_sumout ;
+wire \soc_inst|m0_1|u_logic|Add3~110 ;
+wire \soc_inst|m0_1|u_logic|Add3~73_sumout ;
+wire \soc_inst|m0_1|u_logic|Rnovx4~combout ;
+wire \soc_inst|m0_1|u_logic|C1lvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lgi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Py72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xhl2z4~q ;
+wire \soc_inst|m0_1|u_logic|M743z4~q ;
+wire \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Py72z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Csz2z4~q ;
 wire \soc_inst|m0_1|u_logic|Py72z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Py72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Igl2z4~q ;
 wire \soc_inst|m0_1|u_logic|M082z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Py72z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Nozvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Locvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add5~57_sumout ;
-wire \soc_inst|m0_1|u_logic|Xmzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xmzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|N3v2z4~q ;
-wire \soc_inst|m0_1|u_logic|U7uwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eq63z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Eq63z4~q ;
+wire \soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|U7uwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N3v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pbl2z4~q ;
+wire \soc_inst|m0_1|u_logic|C193z4~q ;
+wire \soc_inst|m0_1|u_logic|Edl2z4~q ;
+wire \soc_inst|m0_1|u_logic|U7uwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|U7uwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Uvdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gvdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M5ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pgfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pgfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ppzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ppzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oihvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~77_sumout ;
+wire \soc_inst|m0_1|u_logic|Nozvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Znzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uozvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uozvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dy23z4~q ;
+wire \soc_inst|m0_1|u_logic|Vg53z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Csz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wo03z4~q ;
+wire \soc_inst|m0_1|u_logic|N71xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V41xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tel2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uo13z4~q ;
+wire \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nz73z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eut2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|J4awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Locvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~122 ;
+wire \soc_inst|m0_1|u_logic|Add5~57_sumout ;
 wire \soc_inst|m0_1|u_logic|Oihvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Oihvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Zpx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~110 ;
-wire \soc_inst|m0_1|u_logic|Add3~73_sumout ;
-wire \soc_inst|m0_1|u_logic|Rnovx4~combout ;
-wire \soc_inst|m0_1|u_logic|C1lvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lgi3z4~q ;
-wire \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ow23z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ow23z4~q ;
-wire \soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Fn13z4~q ;
-wire \soc_inst|m0_1|u_logic|Ds72z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|X543z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~78 ;
+wire \soc_inst|m0_1|u_logic|Add2~29_sumout ;
+wire \soc_inst|m0_1|u_logic|X543z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gf53z4~q ;
 wire \soc_inst|m0_1|u_logic|Ds72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hn03z4~q ;
 wire \soc_inst|m0_1|u_logic|Nqz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Ds72z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|O5k2z4~q ;
+wire \soc_inst|m0_1|u_logic|D7k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Fn13z4~q ;
+wire \soc_inst|m0_1|u_logic|Ow23z4~q ;
+wire \soc_inst|m0_1|u_logic|Ds72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|O5k2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Au72z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ds72z4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rjzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uhzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uhzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gf53z4~q ;
+wire \soc_inst|m0_1|u_logic|Wpcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|H3awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~58 ;
+wire \soc_inst|m0_1|u_logic|Add5~5_sumout ;
+wire \soc_inst|m0_1|u_logic|Hihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lrx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~74 ;
+wire \soc_inst|m0_1|u_logic|Add3~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Nhzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|R5lvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S8k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Djzvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X543z4~q ;
+wire \soc_inst|m0_1|u_logic|V0k2z4~q ;
 wire \soc_inst|m0_1|u_logic|Djzvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Yx73z4~q ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|O5k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nz83z4~q ;
+wire \soc_inst|m0_1|u_logic|Po63z4~q ;
 wire \soc_inst|m0_1|u_logic|Djzvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Pst2z4~q ;
+wire \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|Djzvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|D7k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z3k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hn03z4~q ;
 wire \soc_inst|m0_1|u_logic|Djzvx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Djzvx4~combout ;
-wire \soc_inst|m0_1|u_logic|H3awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~6 ;
-wire \soc_inst|m0_1|u_logic|Add5~89_sumout ;
-wire \soc_inst|m0_1|u_logic|Zbbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cfzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cfzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hmh3z4~q ;
-wire \soc_inst|m0_1|u_logic|An63z4~q ;
-wire \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rd53z4~q ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|I443z4~q ;
-wire \soc_inst|m0_1|u_logic|Gfq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Ql13z4~q ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Skh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Djh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Yih2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~90 ;
-wire \soc_inst|m0_1|u_logic|Add5~86 ;
-wire \soc_inst|m0_1|u_logic|Add5~117_sumout ;
-wire \soc_inst|m0_1|u_logic|Mdzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fdzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jlo2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~10_combout ;
+wire \soc_inst|m0_1|u_logic|Ynvvx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~18_combout ;
+wire \soc_inst|m0_1|u_logic|M5mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hzj2z4~q ;
+wire \soc_inst|ram_1|data_to_memory[26]~8_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[2]~7_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ;
+wire \soc_inst|m0_1|u_logic|T7qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jkmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F7qwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rro2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uu83z4~q ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vuo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wj63z4~q ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gto2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Gto2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ft73z4~q ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kepwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ejm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rr73z4~q ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jiowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kepwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Jlo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bk13z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bk13z4~q ;
 wire \soc_inst|m0_1|u_logic|Rtpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ujo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fio2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Fio2z4~q ;
 wire \soc_inst|m0_1|u_logic|T243z4~q ;
 wire \soc_inst|m0_1|u_logic|Rtpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cc53z4~q ;
 wire \soc_inst|m0_1|u_logic|Kt23z4~q ;
 wire \soc_inst|m0_1|u_logic|Rtpvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yoz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Noo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Sl03z4~q ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Uu73z4~q ;
+wire \soc_inst|m0_1|u_logic|Uyu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|Ymo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jw83z4~q ;
+wire \soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Rtpvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|Rtpvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Sl03z4~q ;
+wire \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yoz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Rtpvx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~12_combout ;
-wire \soc_inst|ram_1|data_to_memory[29]~22_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[13]~21_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ;
-wire \soc_inst|m0_1|u_logic|Hxmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hxmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mb1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mb1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~82 ;
-wire \soc_inst|m0_1|u_logic|Add2~109_sumout ;
-wire \soc_inst|m0_1|u_logic|Nehvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nehvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tme3z4~q ;
-wire \soc_inst|m0_1|u_logic|A9jvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Slr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ty92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U5q2z4~q ;
-wire \soc_inst|m0_1|u_logic|D603z4~q ;
-wire \soc_inst|m0_1|u_logic|X213z4~q ;
-wire \soc_inst|m0_1|u_logic|Ww92z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ww92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O723z4~q ;
-wire \soc_inst|m0_1|u_logic|Xg33z4~q ;
-wire \soc_inst|m0_1|u_logic|Ww92z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ww92z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|C61wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~61_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~110 ;
-wire \soc_inst|m0_1|u_logic|Add2~101_sumout ;
-wire \soc_inst|m0_1|u_logic|Rix2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xjhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xjhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add3~98 ;
-wire \soc_inst|m0_1|u_logic|Add3~94 ;
-wire \soc_inst|m0_1|u_logic|Add3~90 ;
-wire \soc_inst|m0_1|u_logic|Add3~86 ;
-wire \soc_inst|m0_1|u_logic|Add3~70 ;
-wire \soc_inst|m0_1|u_logic|Add3~66 ;
-wire \soc_inst|m0_1|u_logic|Add3~61_sumout ;
-wire \soc_inst|m0_1|u_logic|Ug0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|M0kvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tzg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Wspvx4~combout ;
+wire \soc_inst|m0_1|u_logic|P37wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|P37wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zqpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zqpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fhc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zqpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zqpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lqpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J00wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gpcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gpcwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J00wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L6nwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wjyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Asdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xtdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ;
+wire \soc_inst|m0_1|u_logic|L8m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ;
+wire \soc_inst|m0_1|u_logic|B2i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gdo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bge3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Bge3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~26 ;
+wire \soc_inst|m0_1|u_logic|Add0~14 ;
+wire \soc_inst|m0_1|u_logic|Add0~49_sumout ;
+wire \soc_inst|m0_1|u_logic|Fqmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|She3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~50 ;
+wire \soc_inst|m0_1|u_logic|Add0~37_sumout ;
+wire \soc_inst|m0_1|u_logic|L7a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ypmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iua3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~38 ;
+wire \soc_inst|m0_1|u_logic|Add0~61_sumout ;
+wire \soc_inst|m0_1|u_logic|T5g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Rpmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K7g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~62 ;
+wire \soc_inst|m0_1|u_logic|Add0~81_sumout ;
+wire \soc_inst|m0_1|u_logic|U5a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Kpmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rsa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~82 ;
+wire \soc_inst|m0_1|u_logic|Add0~1_sumout ;
+wire \soc_inst|m0_1|u_logic|D4a3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D4a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dpmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ara3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~2 ;
+wire \soc_inst|m0_1|u_logic|Add0~73_sumout ;
+wire \soc_inst|m0_1|u_logic|Womvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xeo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~74 ;
+wire \soc_inst|m0_1|u_logic|Add0~29_sumout ;
+wire \soc_inst|m0_1|u_logic|Pomvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S3i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~30 ;
+wire \soc_inst|m0_1|u_logic|Add0~17_sumout ;
+wire \soc_inst|m0_1|u_logic|St0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ;
+wire \soc_inst|m0_1|u_logic|Xyn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Iomvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O0o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~18 ;
+wire \soc_inst|m0_1|u_logic|Add0~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Bomvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jpa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~54 ;
+wire \soc_inst|m0_1|u_logic|Add0~45_sumout ;
 wire \soc_inst|m0_1|u_logic|Hk0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ;
+wire \soc_inst|m0_1|u_logic|I1h3z4~q ;
+wire \soc_inst|m0_1|u_logic|Unmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z2h3z4~q ;
+wire \SW[4]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][4]~q ;
+wire \soc_inst|m0_1|u_logic|Sjvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ntmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ntmwx4~1_combout ;
+wire \soc_inst|ram_1|data_to_memory[28]~14_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[12]~13_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ;
+wire \soc_inst|m0_1|u_logic|Lsmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Beowx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X7ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lsmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qmdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qmdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U1uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Adt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dewwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dewwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gtmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gtmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gtmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Leuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Leuvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C00wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ka93z4~q ;
+wire \soc_inst|m0_1|u_logic|S2r2z4~q ;
+wire \soc_inst|m0_1|u_logic|T9v2z4~q ;
+wire \soc_inst|m0_1|u_logic|E1r2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ixxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G4r2z4~q ;
+wire \soc_inst|m0_1|u_logic|K0u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kw63z4~q ;
+wire \soc_inst|m0_1|u_logic|T583z4~q ;
+wire \soc_inst|m0_1|u_logic|Ixxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ixxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Svxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mj7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mj7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gf63z4~q ;
+wire \soc_inst|m0_1|u_logic|Xowwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Grl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xowwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xowwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ok7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jl7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gftwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kw7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cuxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vzdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fq7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tq7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uvdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uvdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fwtwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xs7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xs7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Et7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U18wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nu7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dtpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Po7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hr7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fc7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fc7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dtpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Koj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kt33z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sa13z4~q ;
+wire \soc_inst|m0_1|u_logic|Isi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pfz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ehz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Sndwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J9d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|O9iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O9iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nvdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Asdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Avowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Avowx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Avowx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cma3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cma3z4~q ;
+wire \soc_inst|m0_1|u_logic|Y7iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y7iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y7iwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|E9zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E9zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~30 ;
+wire \soc_inst|m0_1|u_logic|Add2~22 ;
+wire \soc_inst|m0_1|u_logic|Add2~10 ;
+wire \soc_inst|m0_1|u_logic|Add2~14 ;
+wire \soc_inst|m0_1|u_logic|Add2~1_sumout ;
+wire \soc_inst|m0_1|u_logic|Tvhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tvhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Omk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~2 ;
+wire \soc_inst|m0_1|u_logic|Add2~5_sumout ;
+wire \soc_inst|m0_1|u_logic|Wthvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R5zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yd03z4~q ;
+wire \soc_inst|m0_1|u_logic|H972z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|X2j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eb72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T253z4~q ;
+wire \soc_inst|m0_1|u_logic|Kt33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H972z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H972z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H972z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|A67wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zwcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Dih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ducvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Whh2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sscvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wnh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hmh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Co72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I443z4~q ;
+wire \soc_inst|m0_1|u_logic|Rd53z4~q ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lsnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hrcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~6 ;
+wire \soc_inst|m0_1|u_logic|Add5~90 ;
+wire \soc_inst|m0_1|u_logic|Add5~86 ;
+wire \soc_inst|m0_1|u_logic|Add5~118 ;
+wire \soc_inst|m0_1|u_logic|Add5~10 ;
+wire \soc_inst|m0_1|u_logic|Add5~77_sumout ;
+wire \soc_inst|m0_1|u_logic|Wthvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J0l2z4~q ;
+wire \soc_inst|m0_1|u_logic|O3ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~22 ;
+wire \soc_inst|m0_1|u_logic|Add3~18 ;
+wire \soc_inst|m0_1|u_logic|Add3~14 ;
+wire \soc_inst|m0_1|u_logic|Add3~10 ;
+wire \soc_inst|m0_1|u_logic|Add3~6 ;
+wire \soc_inst|m0_1|u_logic|Add3~1_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~0_combout ;
+wire \soc_inst|m0_1|u_logic|Phh2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y5zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y5zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cb3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R38wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R38wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qb3wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Z9zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gci2z4~q ;
+wire \soc_inst|m0_1|u_logic|O3ivx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V1l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Glj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bk23z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|X2j2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ll73z4~q ;
+wire \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cgt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Cc63z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Cc63z4~q ;
+wire \soc_inst|m0_1|u_logic|Xti2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Phh2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~78 ;
+wire \soc_inst|m0_1|u_logic|Add5~129_sumout ;
+wire \soc_inst|m0_1|u_logic|Dtpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zei2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zei2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zei2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mdzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ehcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~117_sumout ;
+wire \soc_inst|m0_1|u_logic|Mdzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fdzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lpt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ll63z4~q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zkk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Aru2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kjk2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Kjk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|F8wwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vhk2z4~q ;
+wire \soc_inst|m0_1|u_logic|An73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rht2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rd63z4~q ;
+wire \soc_inst|m0_1|u_logic|F8wwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F8wwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Beowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zudwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|A6ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jkmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yjzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rjzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uhzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uhzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Feqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y1v2z4~q ;
+wire \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Feqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Feqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zudwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nvdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q7ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q7ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kvtwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Iutwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J7ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gftwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zetwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qdtwx4~combout ;
+wire \soc_inst|m0_1|u_logic|M5ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mouwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F5ewx4~combout ;
+wire \soc_inst|m0_1|u_logic|W3ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W3ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E1ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mydwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wwdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jtdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kqdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wwdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Djdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wwdwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Kqdwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kqdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dqdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kqdwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Djdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Djdwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Widwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Djdwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~49_sumout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~81_sumout ;
+wire \soc_inst|m0_1|u_logic|Add5~85_sumout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D6cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~125_sumout ;
+wire \soc_inst|m0_1|u_logic|Va3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O2bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I30wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~15_combout ;
+wire \soc_inst|m0_1|u_logic|Zbbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~89_sumout ;
+wire \soc_inst|m0_1|u_logic|Cfzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Thm2z4~q ;
+wire \soc_inst|m0_1|u_logic|G5qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ya1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ya1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Luzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Luzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~13_combout ;
+wire \soc_inst|m0_1|u_logic|Z4bwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qobwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hnbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hnbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R29wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U09wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L753z4~q ;
+wire \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Punvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|To23z4~q ;
+wire \soc_inst|m0_1|u_logic|Punvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wlz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qi03z4~q ;
+wire \soc_inst|m0_1|u_logic|Punvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Punvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|X5gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D4mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D4mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D4mvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Iwp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Punvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|E1bvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qynvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qynvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zznvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vxnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vxnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~134_cout ;
+wire \soc_inst|m0_1|u_logic|Add5~30 ;
+wire \soc_inst|m0_1|u_logic|Add5~94 ;
+wire \soc_inst|m0_1|u_logic|Add5~101_sumout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|P03wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G6d3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G6d3z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G6d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ffbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nyawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z80wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z80wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~18_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~21_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~19_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~20_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Cs0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cs0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|Ee8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ee8wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ee8wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ee8wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Dv8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C8zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~11_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~12_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~17_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wsawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rjzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nf1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~14_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~16_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|S9zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Igi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rhi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Velvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Velvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cai3z4~q ;
+wire \soc_inst|m0_1|u_logic|Y6i3z4~q ;
+wire \soc_inst|m0_1|u_logic|J5i3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|J5i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|E143z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|E143z4~q ;
+wire \soc_inst|m0_1|u_logic|Na53z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N8i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Be62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mi13z4~q ;
+wire \soc_inst|m0_1|u_logic|Vr23z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Q8zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ovcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~9_sumout ;
+wire \soc_inst|m0_1|u_logic|F6zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F6zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fxu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wnt2z4~q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lhd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Repwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Repwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Repwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ncpwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A9iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X61wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X61wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|M41wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y873z4~q ;
+wire \soc_inst|m0_1|u_logic|F4q2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|S71wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|S71wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Bq5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pcd3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pcd3z4~q ;
+wire \soc_inst|m0_1|u_logic|U5a3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mis2z4~q ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~4_combout ;
+wire \soc_inst|ram_1|data_to_memory[30]~29_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ;
+wire \soc_inst|m0_1|u_logic|Qapwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D7iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D7iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ba0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ba0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|J70wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J70wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|J70wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y1n2z4~q ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qtdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qtdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rilwx4~0_combout ;
+wire \soc_inst|switches_1|switch_store[1][3]~q ;
+wire \soc_inst|ram_1|data_to_memory[19]~18_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[11]~17_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ;
+wire \soc_inst|interconnect_1|HRDATA[19]~25_combout ;
+wire \soc_inst|m0_1|u_logic|Rilwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rilwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bo0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bo0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Un0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xl0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xl0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pap2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zfv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bjxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zb83z4~q ;
+wire \soc_inst|m0_1|u_logic|Bjxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bjxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|X892z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|A792z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|A792z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|A792z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|A792z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ql0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xvjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L7p2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vgg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zjg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pwg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Uw82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ri0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ri0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Wh0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Bh0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ia0wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Tj0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Tj0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ia0wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Bh0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pwg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hqg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|M9awx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~53_sumout ;
-wire \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ldhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B9g3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~66 ;
-wire \soc_inst|m0_1|u_logic|Add2~61_sumout ;
-wire \soc_inst|m0_1|u_logic|Gehvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gehvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Foe3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~57_sumout ;
-wire \soc_inst|m0_1|u_logic|Fc0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|B5kvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|L733z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zh82z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zh82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zh82z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|C5n2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wj82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zh82z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|N90wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J70wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J70wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ba0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ba0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|J70wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V883z4~q ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|E5awx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~1_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~105_sumout ;
-wire \soc_inst|m0_1|u_logic|Vihvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vihvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nox2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~101_sumout ;
-wire \soc_inst|m0_1|u_logic|C70wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Q9kvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zfh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bf9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M4j2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pgf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bc82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tjf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ilf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bc82z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ftf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Qrf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bc82z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Uuf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bc82z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Bc82z4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D6cwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Va3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fa2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fpi2z4~q ;
-wire \soc_inst|m0_1|u_logic|R6cwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S652z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|W852z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|G752z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P852z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R6cwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|R6cwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I852z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M352z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|T352z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|C552z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O452z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R6cwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Eif3z4~q ;
-wire \soc_inst|m0_1|u_logic|R6cwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|R6cwx4~5_combout ;
-wire \soc_inst|ram_1|data_to_memory[23]~0_combout ;
-wire \soc_inst|m0_1|u_logic|V4ovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vfd3z4~q ;
-wire \soc_inst|m0_1|u_logic|R6xwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R6xwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|R6xwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Jca3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jca3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~86 ;
-wire \soc_inst|m0_1|u_logic|Add0~5_sumout ;
-wire \soc_inst|m0_1|u_logic|Zmmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uei3z4~q ;
-wire \soc_inst|switches_1|switch_store[1][7]~q ;
-wire \soc_inst|ram_1|data_to_memory[23]~3_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ;
-wire \soc_inst|interconnect_1|HRDATA[23]~8_combout ;
-wire \soc_inst|m0_1|u_logic|Walwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Walwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U72wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jwf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~102 ;
-wire \soc_inst|m0_1|u_logic|Add2~97_sumout ;
-wire \soc_inst|m0_1|u_logic|Sdhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sdhvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Sdhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add2~98 ;
-wire \soc_inst|m0_1|u_logic|Add2~93_sumout ;
-wire \soc_inst|m0_1|u_logic|Qjhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I21wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I21wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qjhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dkx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~89_sumout ;
-wire \soc_inst|m0_1|u_logic|Vpovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Eijvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ym93z4~q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Skv2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Skv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Jbu2z4~q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J5o2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|N8o2z4~q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|O403z4~q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|W21wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Kfawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kfawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G11wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G11wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qz0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qz0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qz0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y6o2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nrvwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Nrvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jl93z4~q ;
-wire \soc_inst|m0_1|u_logic|Nrvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nrvwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Nrvwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Yxdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X0ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X0ewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C9a3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~26 ;
-wire \soc_inst|m0_1|u_logic|Add0~13_sumout ;
-wire \soc_inst|m0_1|u_logic|Mqmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zva3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~14 ;
-wire \soc_inst|m0_1|u_logic|Add0~49_sumout ;
-wire \soc_inst|m0_1|u_logic|Bge3z4~q ;
-wire \soc_inst|m0_1|u_logic|Fqmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|She3z4~q ;
-wire \soc_inst|m0_1|u_logic|Whlwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Whlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Whlwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Whlwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|L6nwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wjyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U0vvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Amyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Amyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Amyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ykyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wrg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dmvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sog3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dmvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dmvwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xtdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eudwx4~1_combout ;
+wire \SW[2]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][2]~q ;
+wire \soc_inst|ram_1|data_to_memory[18]~6_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[10]~5_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ;
+wire \soc_inst|interconnect_1|HRDATA[18]~13_combout ;
+wire \soc_inst|m0_1|u_logic|Ajmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ajmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zluvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zluvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zluvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yfn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ylbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Po83z4~q ;
+wire \soc_inst|m0_1|u_logic|Ajn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ylbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ylbwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xmdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jiowx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B28wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tlyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K22wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K22wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zz1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Cvr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rr83z4~q ;
+wire \soc_inst|m0_1|u_logic|Imu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fkdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nodwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wia3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|U0vvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U0vvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|U0vvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|I30wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hbv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ebbwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|T0m2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yb93z4~q ;
-wire \soc_inst|m0_1|u_logic|Ebbwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Y1u2z4~q ;
-wire \soc_inst|m0_1|u_logic|H783z4~q ;
-wire \soc_inst|m0_1|u_logic|Ebbwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Yx63z4~q ;
-wire \soc_inst|m0_1|u_logic|V3m2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ebbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ebbwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jmdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jmdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Q6twx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q6twx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rhfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rhfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rhfwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Mx0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mx0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Bmhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G7x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~30 ;
+wire \soc_inst|m0_1|u_logic|Add3~26 ;
+wire \soc_inst|m0_1|u_logic|Add3~34 ;
+wire \soc_inst|m0_1|u_logic|Add3~54 ;
+wire \soc_inst|m0_1|u_logic|Add3~50 ;
+wire \soc_inst|m0_1|u_logic|Add3~46 ;
+wire \soc_inst|m0_1|u_logic|Add3~42 ;
+wire \soc_inst|m0_1|u_logic|Add3~38 ;
+wire \soc_inst|m0_1|u_logic|Add3~82 ;
+wire \soc_inst|m0_1|u_logic|Add3~78 ;
+wire \soc_inst|m0_1|u_logic|Add3~105_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~5_combout ;
+wire \soc_inst|m0_1|u_logic|A9jvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Slr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vr43z4~q ;
+wire \soc_inst|m0_1|u_logic|E163z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z0g3z4~q ;
+wire \soc_inst|m0_1|u_logic|F5a2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O2g3z4~q ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vxf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Kzf3z4~q ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~17_sumout ;
+wire \soc_inst|m0_1|u_logic|Nehvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nehvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tme3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~110 ;
+wire \soc_inst|m0_1|u_logic|Add2~101_sumout ;
+wire \soc_inst|m0_1|u_logic|Xjhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rix2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~102 ;
+wire \soc_inst|m0_1|u_logic|Add2~97_sumout ;
+wire \soc_inst|m0_1|u_logic|Sdhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sdhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sdhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~98 ;
+wire \soc_inst|m0_1|u_logic|Add2~93_sumout ;
+wire \soc_inst|m0_1|u_logic|Qjhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dkx2z4~q ;
 wire \soc_inst|m0_1|u_logic|Add2~94 ;
 wire \soc_inst|m0_1|u_logic|Add2~89_sumout ;
 wire \soc_inst|m0_1|u_logic|Jjhvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Jjhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Plx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Add2~90 ;
 wire \soc_inst|m0_1|u_logic|Add2~73_sumout ;
 wire \soc_inst|m0_1|u_logic|Cjhvx4~0_combout ;
-wire \soc_inst|switches_1|switch_store[1][2]~q ;
-wire \soc_inst|ram_1|data_to_memory[18]~6_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[10]~5_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ;
-wire \soc_inst|interconnect_1|HRDATA[18]~13_combout ;
-wire \soc_inst|m0_1|u_logic|Ajmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ajmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ajmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bnx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~74 ;
+wire \soc_inst|m0_1|u_logic|Add2~69_sumout ;
+wire \soc_inst|m0_1|u_logic|Zjq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ithvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ithvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~70 ;
+wire \soc_inst|m0_1|u_logic|Add2~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Ldhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ldhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B9g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~62 ;
+wire \soc_inst|m0_1|u_logic|Add3~57_sumout ;
+wire \soc_inst|m0_1|u_logic|Fc0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|B5kvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Llq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tch3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ji43z4~q ;
+wire \soc_inst|m0_1|u_logic|Sr53z4~q ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A8h3z4~q ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rz13z4~q ;
+wire \soc_inst|m0_1|u_logic|A933z4~q ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Iq82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Je0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mc0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mc0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P9h3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|D03xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ;
+wire \soc_inst|m0_1|u_logic|Ieh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~46 ;
+wire \soc_inst|m0_1|u_logic|Add0~69_sumout ;
+wire \soc_inst|m0_1|u_logic|Nnmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ogo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~70 ;
+wire \soc_inst|m0_1|u_logic|Add0~85_sumout ;
+wire \soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gnmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ddi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~86 ;
+wire \soc_inst|m0_1|u_logic|Add0~5_sumout ;
+wire \soc_inst|m0_1|u_logic|Zmmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uei3z4~q ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Etmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F2o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mxtvx4~combout ;
+wire \soc_inst|m0_1|u_logic|C9a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~13_sumout ;
+wire \soc_inst|m0_1|u_logic|Mqmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zva3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ipn2z4~q ;
 wire \soc_inst|m0_1|u_logic|Qkmwx4~0_combout ;
-wire \soc_inst|interconnect_1|HRDATA[10]~12_combout ;
+wire \soc_inst|m0_1|u_logic|C9a3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Qkmwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Qkmwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Qkmwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Et0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Et0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Cjhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bnx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~69_sumout ;
-wire \soc_inst|m0_1|u_logic|Fq0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Irjvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W5p2z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wu53z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|St0wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Ecawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ecawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cs0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cs0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Mq0wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Mq0wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Mq0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Psn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|H1qwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|F8u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Od83z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|H1qwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ohv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H1qwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|H1qwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Eudwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Eudwx4~1_combout ;
-wire \soc_inst|ram_1|data_to_memory[30]~29_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ;
-wire \soc_inst|m0_1|u_logic|Qapwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D7iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D7iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zuzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zuzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oszvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mvm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ytm2z4~q ;
-wire \soc_inst|m0_1|u_logic|G493z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qowwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qowwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qowwx4~combout ;
-wire \soc_inst|m0_1|u_logic|H133z4~q ;
-wire \soc_inst|m0_1|u_logic|Yr13z4~q ;
-wire \soc_inst|m0_1|u_logic|Lq03z4~q ;
-wire \soc_inst|m0_1|u_logic|Uvzvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zj53z4~q ;
-wire \soc_inst|m0_1|u_logic|Rtz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uvzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uvzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uvzvx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~4_combout ;
-wire \soc_inst|m0_1|u_logic|J7b3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ormvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z8b3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~90 ;
-wire \soc_inst|m0_1|u_logic|Add0~9_sumout ;
-wire \soc_inst|m0_1|u_logic|Hrmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dhb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Oytvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oytvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Oytvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Oytvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Oytvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oytvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Etmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F2o2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mxtvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add0~53_sumout ;
-wire \soc_inst|m0_1|u_logic|Bomvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jpa3z4~q ;
-wire \soc_inst|m0_1|u_logic|Rilwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rilwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ll1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ll1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Aj1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ibe3z4~q ;
-wire \soc_inst|m0_1|u_logic|Cc9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U9e3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ge9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cc9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tyd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Cc9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cc9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Owovx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[9]~9_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[7]~11_combout ;
-wire \soc_inst|m0_1|u_logic|Wywwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wywwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wywwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wywwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|G9lwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R5zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R5zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|R5zvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Po7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fc7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fc7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cb3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gci2z4~q ;
-wire \soc_inst|m0_1|u_logic|Y5zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Y5zvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|J3qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cc63z4~q ;
-wire \soc_inst|m0_1|u_logic|Isi2z4~q ;
-wire \soc_inst|m0_1|u_logic|N3ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Lpu2z4~q ;
-wire \soc_inst|m0_1|u_logic|N3ywx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Cgt2z4~q ;
-wire \soc_inst|m0_1|u_logic|N3ywx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|N3ywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|N3ywx4~combout ;
-wire \soc_inst|m0_1|u_logic|U2ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M7qwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mjlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mjlwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bo0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bo0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zjq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~69_sumout ;
-wire \soc_inst|m0_1|u_logic|Ithvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ithvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add3~65_sumout ;
-wire \soc_inst|m0_1|u_logic|Ql0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Xvjvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L7p2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ht53z4~q ;
-wire \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Yj43z4~q ;
-wire \soc_inst|m0_1|u_logic|A9p2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Un0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xl0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xl0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q6u2z4~q ;
-wire \soc_inst|m0_1|u_logic|Q273z4~q ;
-wire \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bjxwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pap2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bjxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bjxwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jtdwx4~1_combout ;
-wire \SW[1]~input_o ;
-wire \soc_inst|switches_1|switch_store[1][1]~q ;
-wire \soc_inst|m0_1|u_logic|Mbtwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bgfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bgfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C2rvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C2rvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C2rvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qppvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ukt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ug63z4~q ;
-wire \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|V7ywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Txj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Duu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|V7ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V7ywx4~combout ;
-wire \soc_inst|m0_1|u_logic|A7ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D5ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F7qwx4~combout ;
-wire \soc_inst|ram_1|data_to_memory[26]~8_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ;
-wire \soc_inst|m0_1|u_logic|T7qwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jkmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jkmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yjzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yjzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hihvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~29_sumout ;
-wire \soc_inst|m0_1|u_logic|Hihvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hihvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lrx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~74 ;
-wire \soc_inst|m0_1|u_logic|Add3~21_sumout ;
-wire \soc_inst|m0_1|u_logic|Nhzvx4~combout ;
-wire \soc_inst|m0_1|u_logic|R5lvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S8k2z4~q ;
-wire \soc_inst|m0_1|u_logic|Fm72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wnh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Fm72z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zu23z4~q ;
-wire \soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fm72z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Co72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fm72z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Lsnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~22 ;
+wire \soc_inst|m0_1|u_logic|E1ewx4~1_combout ;
+wire \soc_inst|interconnect_1|HRDATA[12]~22_combout ;
+wire \soc_inst|m0_1|u_logic|Xrmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xrmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Arzwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U5pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jjuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cjuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Viuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|I6pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bsvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xrmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Uf1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uf1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ekhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fhx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~77_sumout ;
+wire \soc_inst|m0_1|u_logic|Cqovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[10]~10_combout ;
+wire \soc_inst|ram_1|data_to_memory[25]~11_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[1]~12_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ;
+wire \soc_inst|interconnect_1|HRDATA[25]~18_combout ;
+wire \soc_inst|m0_1|u_logic|Pgfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pgfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mx0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mx0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fx0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iv0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Iv0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U9u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ozo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xcuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Djv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zxo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xcuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xcuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|X0ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X0ewx4~1_combout ;
+wire \soc_inst|interconnect_1|HRDATA[11]~24_combout ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qfzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Aihvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Aihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Aihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xsx2z4~q ;
 wire \soc_inst|m0_1|u_logic|Add3~17_sumout ;
 wire \soc_inst|m0_1|u_logic|Vezvx4~combout ;
 wire \soc_inst|m0_1|u_logic|Galvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Hak2z4~q ;
-wire \soc_inst|m0_1|u_logic|Aez2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zu33z4~q ;
-wire \soc_inst|m0_1|u_logic|I453z4~q ;
-wire \soc_inst|m0_1|u_logic|Tf72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ql23z4~q ;
-wire \soc_inst|m0_1|u_logic|Hc13z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Hc13z4~q ;
-wire \soc_inst|m0_1|u_logic|Tf72z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tiz2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tf72z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Rek2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qh72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tf72z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Esnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sscvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add5~85_sumout ;
-wire \soc_inst|m0_1|u_logic|C3qvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vhk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ggk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nf03z4~q ;
-wire \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tiz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Rd63z4~q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Aru2z4~q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Sx3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Imvvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T5mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T5mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wbk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wwywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I6pwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N4rvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mbnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gtp2z4~q ;
-wire \soc_inst|m0_1|u_logic|L8mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cam2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kwa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nzhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oar2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zxvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zxvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Arzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pazwx4~combout ;
-wire \soc_inst|m0_1|u_logic|G2zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G2zwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|W5rvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Fbnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Owq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Leuvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Leuvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pamvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bjkvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bjkvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ovc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Nl53z4~q ;
-wire \soc_inst|m0_1|u_logic|Ec43z4~q ;
-wire \soc_inst|m0_1|u_logic|Qw62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wmp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|V233z4~q ;
-wire \soc_inst|m0_1|u_logic|Qw62z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ny62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zr03z4~q ;
-wire \soc_inst|m0_1|u_logic|Fvz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qw62z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qw62z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~109_sumout ;
-wire \soc_inst|m0_1|u_logic|Vcuvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vcuvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yxzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ilp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Mt13z4~q ;
-wire \soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Gfq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Art2z4~q ;
+wire \soc_inst|m0_1|u_logic|J0v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|An63z4~q ;
+wire \soc_inst|m0_1|u_logic|Yx83z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cfzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jw73z4~q ;
+wire \soc_inst|m0_1|u_logic|Fexwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fexwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fexwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yvtwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gvdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jymwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jymwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qe0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qe0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add2~66 ;
+wire \soc_inst|m0_1|u_logic|Add2~61_sumout ;
+wire \soc_inst|m0_1|u_logic|Gehvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gehvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Foe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~62 ;
+wire \soc_inst|m0_1|u_logic|Add2~105_sumout ;
+wire \soc_inst|m0_1|u_logic|Vihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nox2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~106 ;
+wire \soc_inst|m0_1|u_logic|Add2~117_sumout ;
+wire \soc_inst|m0_1|u_logic|Zdhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oa3wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zdhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kaf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~113_sumout ;
+wire \soc_inst|m0_1|u_logic|Y92wx4~combout ;
+wire \soc_inst|m0_1|u_logic|K8ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6j2z4~q ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ldf3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ldf3z4~q ;
+wire \soc_inst|m0_1|u_logic|I852z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bqf3z4~q ;
+wire \soc_inst|m0_1|u_logic|S652z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W852z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmf3z4~q ;
+wire \soc_inst|m0_1|u_logic|G752z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aff3z4~q ;
+wire \soc_inst|m0_1|u_logic|P852z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Orj2z4~q ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fpi2z4~q ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O452z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pgf3z4~q ;
+wire \soc_inst|m0_1|u_logic|C552z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M352z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|T352z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~5_combout ;
+wire \soc_inst|ram_1|data_to_memory[23]~0_combout ;
+wire \soc_inst|m0_1|u_logic|V4ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vfd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Z4l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uqi2z4~q ;
+wire \soc_inst|m0_1|u_logic|R6xwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R6xwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R6xwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Walwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Walwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R5zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R5zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J3qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lpu2z4~q ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xti2z4~q ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~combout ;
+wire \soc_inst|m0_1|u_logic|U2ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M7qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~12_combout ;
+wire \soc_inst|ram_1|data_to_memory[29]~22_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[13]~21_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ;
+wire \soc_inst|m0_1|u_logic|Hxmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hxmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mb1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mb1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B91wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B91wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|B91wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vxf3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|E163z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|X94xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~combout ;
 wire \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ;
-wire \soc_inst|m0_1|u_logic|D4g3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D4g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gzhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Geuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jjuwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U5pwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kzqvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Viuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B6pwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Kzqvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kzqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T5g3z4~q ;
 wire \soc_inst|interconnect_1|HRDATA[13]~27_combout ;
 wire \soc_inst|m0_1|u_logic|Twmwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Twmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kzqvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kzqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kzqvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Twmwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bspvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bspvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xowwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xowwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xowwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ok7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mj7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jl7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Et7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nu7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mj7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dtpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Dtpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~78 ;
-wire \soc_inst|m0_1|u_logic|Add5~129_sumout ;
-wire \soc_inst|m0_1|u_logic|Dtpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zei2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zei2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zei2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qynvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qynvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vxnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~134_cout ;
-wire \soc_inst|m0_1|u_logic|Add5~29_sumout ;
-wire \soc_inst|m0_1|u_logic|G5qvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|G5qvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ejm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Gmm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Q8ywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Imt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Q8ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q8ywx4~combout ;
-wire \soc_inst|m0_1|u_logic|W4ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mzxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oldwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vcuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vcuvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wamvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tdp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qnkvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qnkvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Euzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qtzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oszvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oszvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R6v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tkdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tkdwx4~1_combout ;
+wire \soc_inst|switches_1|switch_store[0][2]~q ;
+wire \soc_inst|interconnect_1|HRDATA[2]~14_combout ;
 wire \soc_inst|m0_1|u_logic|Mbt2z4~q ;
 wire \soc_inst|m0_1|u_logic|Yrqwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ojmwx4~0_combout ;
@@ -3225,382 +3254,259 @@ wire \soc_inst|m0_1|u_logic|Ojmwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Ojmwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Wn1wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Wn1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~46 ;
 wire \soc_inst|m0_1|u_logic|Add2~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Ufx2z4~q ;
 wire \soc_inst|m0_1|u_logic|Lkhvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Lkhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ufx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~42 ;
+wire \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add3~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Jxovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qknvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ffs2z4~q ;
+wire \soc_inst|m0_1|u_logic|T2owx4~1_combout ;
+wire \soc_inst|ram_1|data_to_memory[27]~19_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ;
+wire \soc_inst|m0_1|u_logic|Mjlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mjlwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ll1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ll1wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Add2~85_sumout ;
+wire \soc_inst|m0_1|u_logic|Gmd3z4~q ;
 wire \soc_inst|m0_1|u_logic|Uehvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Uehvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gmd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~86 ;
-wire \soc_inst|m0_1|u_logic|Add2~81_sumout ;
-wire \soc_inst|m0_1|u_logic|Fhx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ekhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uf1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uf1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ekhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|L4jvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dkr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Ejawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~13_sumout ;
-wire \soc_inst|m0_1|u_logic|Nf1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qd1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qd1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oir2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dy4xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|M413z4~q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ll83z4~q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ;
-wire \soc_inst|m0_1|u_logic|L7a3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~50 ;
-wire \soc_inst|m0_1|u_logic|Add0~37_sumout ;
-wire \soc_inst|m0_1|u_logic|Ypmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iua3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~38 ;
-wire \soc_inst|m0_1|u_logic|Add0~61_sumout ;
-wire \soc_inst|m0_1|u_logic|Rpmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K7g3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~62 ;
-wire \soc_inst|m0_1|u_logic|Add0~81_sumout ;
-wire \soc_inst|m0_1|u_logic|Kpmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rsa3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~82 ;
-wire \soc_inst|m0_1|u_logic|Add0~1_sumout ;
-wire \soc_inst|m0_1|u_logic|D4a3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D4a3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dpmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ara3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wzivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wce3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ibe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ge9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~81_sumout ;
+wire \soc_inst|m0_1|u_logic|Owovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Xknvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kop2z4~q ;
+wire \soc_inst|m0_1|u_logic|N1uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Z0uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ara3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Wjxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tqs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vgs2z4~q ;
 wire \soc_inst|m0_1|u_logic|Wjxwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Wjxwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Wjxwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Wjxwx4~4_combout ;
+wire \soc_inst|ram_1|data_to_memory[15]~2_combout ;
 wire \soc_inst|m0_1|u_logic|hwdata_o~0_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ;
 wire \soc_inst|ram_1|data_to_memory[31]~1_combout ;
 wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ;
 wire \soc_inst|interconnect_1|HRDATA[15]~4_combout ;
 wire \soc_inst|m0_1|u_logic|U9lwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|U9lwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zz1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zz1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K22wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K22wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zz1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|P12wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|P12wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Otr2z4~q ;
-wire \soc_inst|m0_1|u_logic|P12wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|P12wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|P12wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rr83z4~q ;
-wire \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Yg23z4~q ;
-wire \soc_inst|m0_1|u_logic|P12wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|P12wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|P12wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|P12wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Lk9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~42 ;
-wire \soc_inst|m0_1|u_logic|Add5~113_sumout ;
+wire \soc_inst|m0_1|u_logic|Oa3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oa3wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fa2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wbf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mbtwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bgfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bgfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vq1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vq1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vq1wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Bfhvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|V4d3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~41_sumout ;
-wire \soc_inst|m0_1|u_logic|Xxovx4~combout ;
-wire \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Dmivx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Dmivx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|G1s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Dcs2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ria2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H903z4~q ;
-wire \soc_inst|m0_1|u_logic|Uga2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Uga2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|I463z4~q ;
-wire \soc_inst|m0_1|u_logic|Uga2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uga2z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~37_sumout ;
-wire \soc_inst|m0_1|u_logic|Jxovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qknvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ffs2z4~q ;
-wire \soc_inst|m0_1|u_logic|F4nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F4nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K3l2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ux4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P2a3z4~q ;
-wire \soc_inst|m0_1|u_logic|Inb2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bjd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|T7d3z4~q ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Xtywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ypa2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|N8b2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Ypa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C34wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C34wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Cr0xx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|F5mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q5vvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kofwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bk4wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Si4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pd4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pd4wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|H9i2z4~q ;
-wire \soc_inst|m0_1|u_logic|Lny2z4~q ;
-wire \soc_inst|m0_1|u_logic|W7hwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Poa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ik4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qdj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ik4wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pd4wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Q5vvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Q7mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U7w2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Arzwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Kyi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rpe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Fre3z4~q ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hue3z4~q ;
+wire \soc_inst|m0_1|u_logic|Cy43z4~q ;
+wire \soc_inst|m0_1|u_logic|L763z4~q ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kf23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lwbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Konvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Xxovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[7]~7_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[0]~32_combout ;
 wire \soc_inst|m0_1|u_logic|Vcnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kyi2z4~q ;
 wire \soc_inst|m0_1|u_logic|C9rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Irqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hhpvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Kfpvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Kfpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kfpvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Kfpvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Kfpvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Jipvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Kfpvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zz8wx4~combout ;
-wire \soc_inst|m0_1|u_logic|J00wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gpcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gpcwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J00wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C00wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bn53z4~q ;
-wire \soc_inst|m0_1|u_logic|U5r2z4~q ;
-wire \soc_inst|m0_1|u_logic|Twz2z4~q ;
-wire \soc_inst|m0_1|u_logic|J433z4~q ;
-wire \soc_inst|m0_1|u_logic|Av13z4~q ;
-wire \soc_inst|m0_1|u_logic|Nt03z4~q ;
-wire \soc_inst|m0_1|u_logic|Am5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|I7r2z4~q ;
-wire \soc_inst|m0_1|u_logic|Sd43z4~q ;
-wire \soc_inst|m0_1|u_logic|Am5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Am5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Am5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|H0dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O0dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xucwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~97_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~26 ;
-wire \soc_inst|m0_1|u_logic|Add2~18 ;
-wire \soc_inst|m0_1|u_logic|Add2~33_sumout ;
-wire \soc_inst|m0_1|u_logic|Ulhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ulhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|R8x2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~30 ;
-wire \soc_inst|m0_1|u_logic|Add3~26 ;
-wire \soc_inst|m0_1|u_logic|Add3~34 ;
-wire \soc_inst|m0_1|u_logic|Add3~54 ;
-wire \soc_inst|m0_1|u_logic|Add3~49_sumout ;
-wire \soc_inst|m0_1|u_logic|S4qvx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[5]~5_combout ;
-wire \soc_inst|ram_1|data_to_memory[19]~18_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ;
-wire \soc_inst|interconnect_1|HRDATA[19]~25_combout ;
-wire \soc_inst|m0_1|u_logic|Jky2z4~q ;
-wire \soc_inst|m0_1|u_logic|E7nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vphvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oiw2z4~q ;
-wire \soc_inst|m0_1|u_logic|E7nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E7nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fjswx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Emewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wvswx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fjswx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|T1d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qzq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ylwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ylwwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ok7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Manwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pwdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Glnwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~49_sumout ;
+wire \soc_inst|m0_1|u_logic|Skhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Skhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jex2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~45_sumout ;
+wire \soc_inst|m0_1|u_logic|Z6ovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nmnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mjl2z4~q ;
+wire \soc_inst|m0_1|u_logic|B2uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wfuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Owgvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ywi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X2rvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X2rvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tbnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lbn2z4~q ;
+wire \soc_inst|m0_1|u_logic|U9mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rryvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Upyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R3mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pet2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nen2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nen2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nen2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qppvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~93_sumout ;
+wire \soc_inst|m0_1|u_logic|Lz8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qppvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C2rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C2rvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C2rvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qppvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fwj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Txj2z4~q ;
+wire \soc_inst|m0_1|u_logic|V7ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|V7ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V7ywx4~combout ;
+wire \soc_inst|m0_1|u_logic|A7ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mzxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9nwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kkyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zuzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zuzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Glhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nbx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Hszvx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[4]~4_combout ;
+wire \soc_inst|ram_1|data_to_memory[23]~3_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ;
+wire \soc_inst|interconnect_1|HRDATA[23]~8_combout ;
+wire \soc_inst|m0_1|u_logic|Tohvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sow2z4~q ;
+wire \soc_inst|m0_1|u_logic|C6nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C6nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|My6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xiwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|X8kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Zzfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tuwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|L61xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hq23z4~q ;
-wire \soc_inst|m0_1|u_logic|Z853z4~q ;
-wire \soc_inst|m0_1|u_logic|Knz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zhyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zhyvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Qz33z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Qz33z4~q ;
 wire \soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Yg13z4~q ;
+wire \soc_inst|m0_1|u_logic|Yg13z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Zhyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hq23z4~q ;
+wire \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zhyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zhyvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Zhyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~5_combout ;
-wire \soc_inst|ram_1|data_to_memory[0]~27_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[0]~32_combout ;
-wire \soc_inst|m0_1|u_logic|Qdnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O24wx4~0_combout ;
 wire \soc_inst|ram_1|data_to_memory[16]~25_combout ;
-wire \soc_inst|m0_1|u_logic|Ny3wx4~1_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ;
-wire \soc_inst|ram_1|data_to_memory[24]~26_combout ;
 wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ;
-wire \soc_inst|switches_1|switch_store[1][0]~q ;
 wire \soc_inst|interconnect_1|HRDATA[16]~30_combout ;
 wire \soc_inst|m0_1|u_logic|Qqhvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ydw2z4~q ;
 wire \soc_inst|m0_1|u_logic|Qdnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qdnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Qdnvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Yzi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Keiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Celwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Celwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fbfwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|A2iwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|A2iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sjj2z4~q ;
 wire \soc_inst|m0_1|u_logic|Mvc2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Awc2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vwc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kuc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Awc2z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Kuc2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qa43z4~q ;
-wire \soc_inst|m0_1|u_logic|Qp62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qp62z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qp62z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Nr62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qp62z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Euzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~53_sumout ;
-wire \soc_inst|m0_1|u_logic|Hszvx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[4]~4_combout ;
-wire \soc_inst|ram_1|data_to_memory[20]~16_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[4]~15_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ;
-wire \soc_inst|m0_1|u_logic|Ophvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ckw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pxrvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X6nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X6nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ctrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ctrwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kghvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I6z2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dghvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|W7z2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uz9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uz9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Xhbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wd23z4~q ;
+wire \soc_inst|m0_1|u_logic|Xhbwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xhbwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xhbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qrnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Asbvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~102 ;
+wire \soc_inst|m0_1|u_logic|Add5~34 ;
+wire \soc_inst|m0_1|u_logic|Add5~97_sumout ;
+wire \soc_inst|m0_1|u_logic|Add2~18 ;
+wire \soc_inst|m0_1|u_logic|Add2~33_sumout ;
+wire \soc_inst|m0_1|u_logic|Ulhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ulhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R8x2z4~q ;
 wire \soc_inst|m0_1|u_logic|Add2~34 ;
-wire \soc_inst|m0_1|u_logic|Add2~38 ;
-wire \soc_inst|m0_1|u_logic|Add2~57_sumout ;
-wire \soc_inst|m0_1|u_logic|Nbx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Glhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Glhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add2~58 ;
-wire \soc_inst|m0_1|u_logic|Add2~53_sumout ;
-wire \soc_inst|m0_1|u_logic|Zkhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|W4zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W4zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zkhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ycx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~50 ;
-wire \soc_inst|m0_1|u_logic|Add3~45_sumout ;
-wire \soc_inst|m0_1|u_logic|Z6ovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Jknvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lz93z4~q ;
-wire \soc_inst|m0_1|u_logic|N1uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|H8l2z4~q ;
-wire \soc_inst|m0_1|u_logic|S9ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S9ywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|S9ywx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Otxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Palwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kswwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ttwwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B8nwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B8nwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Aihvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~21_sumout ;
-wire \soc_inst|m0_1|u_logic|Aihvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Aihvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xsx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~18 ;
-wire \soc_inst|m0_1|u_logic|Add3~13_sumout ;
-wire \soc_inst|m0_1|u_logic|V2qvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Khnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Khnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ohh3z4~q ;
-wire \soc_inst|m0_1|u_logic|N662z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bk13z4~q ;
-wire \soc_inst|m0_1|u_logic|N662z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K862z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cc53z4~q ;
-wire \soc_inst|m0_1|u_logic|N662z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N662z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Xrnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~14 ;
-wire \soc_inst|m0_1|u_logic|Add3~9_sumout ;
-wire \soc_inst|m0_1|u_logic|S6ovx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|S6ovx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Nmnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mjl2z4~q ;
-wire \soc_inst|m0_1|u_logic|B7owx4~combout ;
-wire \soc_inst|m0_1|u_logic|Pjyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pjyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|F9pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F9pvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kkyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ocnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|X7mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X7mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I6w2z4~q ;
-wire \soc_inst|m0_1|u_logic|F5mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|F5mvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U5x2z4~q ;
-wire \soc_inst|m0_1|u_logic|Lefwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Add2~37_sumout ;
 wire \soc_inst|m0_1|u_logic|Nlhvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Nlhvx4~1_combout ;
@@ -3608,74 +3514,9 @@ wire \soc_inst|m0_1|u_logic|Cax2z4~q ;
 wire \soc_inst|m0_1|u_logic|Add3~33_sumout ;
 wire \soc_inst|m0_1|u_logic|Rxzvx4~combout ;
 wire \soc_inst|ram_1|memory.raddr_a[3]~3_combout ;
-wire \soc_inst|ram_1|data_to_memory[22]~31_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[6]~32_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ;
-wire \soc_inst|switches_1|switch_store[1][6]~q ;
-wire \soc_inst|interconnect_1|HRDATA[22]~35_combout ;
-wire \soc_inst|m0_1|u_logic|J6nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Aphvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Enw2z4~q ;
-wire \soc_inst|m0_1|u_logic|C9rvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|C9rvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|C9rvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C9rvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Add1~6 ;
-wire \soc_inst|m0_1|u_logic|Add1~9_sumout ;
-wire \soc_inst|m0_1|u_logic|W4y2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kanvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add1~10 ;
-wire \soc_inst|m0_1|u_logic|Add1~21_sumout ;
-wire \soc_inst|m0_1|u_logic|Danvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6y2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add1~2 ;
-wire \soc_inst|m0_1|u_logic|Add1~17_sumout ;
-wire \soc_inst|m0_1|u_logic|U8nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bdm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Oylwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add1~22 ;
-wire \soc_inst|m0_1|u_logic|Add1~25_sumout ;
-wire \soc_inst|m0_1|u_logic|W9nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y7y2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add1~26 ;
-wire \soc_inst|m0_1|u_logic|Add1~29_sumout ;
-wire \soc_inst|m0_1|u_logic|P9nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M9y2z4~q ;
-wire \soc_inst|m0_1|u_logic|Oylwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add1~34_cout ;
-wire \soc_inst|m0_1|u_logic|Add1~5_sumout ;
-wire \soc_inst|m0_1|u_logic|Ranvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I3y2z4~q ;
-wire \soc_inst|m0_1|u_logic|J6nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J6nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zoy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ho3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wpkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|R1pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mekvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mekvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xx93z4~q ;
-wire \soc_inst|m0_1|u_logic|C372z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C372z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|C372z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z472z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C372z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~25_sumout ;
-wire \soc_inst|m0_1|u_logic|Yuovx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[2]~2_combout ;
 wire \soc_inst|ram_1|data_to_memory[21]~24_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[5]~23_combout ;
 wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ;
 wire \soc_inst|interconnect_1|HRDATA[21]~29_combout ;
 wire \soc_inst|m0_1|u_logic|Hphvx4~0_combout ;
@@ -3684,365 +3525,311 @@ wire \soc_inst|m0_1|u_logic|Q6nvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Q6nvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Q6nvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Jvxvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Vnqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bsy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Y7xvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Gqxvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Irxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zpxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hnxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zcn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mmxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sbxvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sbxvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Gokwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sbxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sbxvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Uup2z4~q ;
-wire \soc_inst|m0_1|u_logic|H2m2z4~q ;
-wire \soc_inst|m0_1|u_logic|Fzxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fzxwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fzxwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wxxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y9nwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kkyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zluvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zluvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zluvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U9mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uaj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rryvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Upyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R3mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pet2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nen2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nen2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nen2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cr1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Okn2z4~q ;
-wire \soc_inst|m0_1|u_logic|X563z4~q ;
-wire \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Yfn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Q1ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gf73z4~q ;
-wire \soc_inst|m0_1|u_logic|Po83z4~q ;
-wire \soc_inst|m0_1|u_logic|Gju2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ajn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Q1ywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Q1ywx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wa03z4~q ;
-wire \soc_inst|m0_1|u_logic|Fn33z4~q ;
-wire \soc_inst|m0_1|u_logic|Q713z4~q ;
-wire \soc_inst|m0_1|u_logic|Wd23z4~q ;
-wire \soc_inst|m0_1|u_logic|Sh5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Sh5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sh5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Sh5wx4~0_combout ;
-wire \soc_inst|ram_1|data_to_memory[2]~7_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[2]~14_combout ;
-wire \soc_inst|m0_1|u_logic|L7nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cqhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ahw2z4~q ;
-wire \soc_inst|m0_1|u_logic|L7nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L7nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|L4bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S4bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q3bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~33_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~17_sumout ;
-wire \soc_inst|m0_1|u_logic|Bmhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bmhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G7x2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~29_sumout ;
-wire \soc_inst|m0_1|u_logic|Ekovx4~combout ;
-wire \soc_inst|ram_1|saved_word_address[1]~feeder_combout ;
-wire \soc_inst|ram_1|memory.raddr_a[1]~1_combout ;
-wire \soc_inst|ram_1|data_to_memory[17]~10_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[9]~9_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ;
-wire \soc_inst|m0_1|u_logic|Jqhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mfw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pqrvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S7nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S7nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rxl2z4~q ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q3xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q3xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Wpkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z5wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K8wvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K8wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vhwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vhwvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K8wvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ndwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|E4xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V8yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D6yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D6yvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D6yvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H3d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U5r2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bn53z4~q ;
+wire \soc_inst|m0_1|u_logic|Twz2z4~q ;
+wire \soc_inst|m0_1|u_logic|I7r2z4~q ;
+wire \soc_inst|m0_1|u_logic|Sd43z4~q ;
+wire \soc_inst|m0_1|u_logic|Am5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nt03z4~q ;
+wire \soc_inst|m0_1|u_logic|J433z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Av13z4~q ;
+wire \soc_inst|m0_1|u_logic|Am5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Am5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Am5wx4~1_combout ;
+wire \soc_inst|ram_1|data_to_memory[20]~16_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[4]~15_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ;
+wire \soc_inst|m0_1|u_logic|Ophvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ckw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pxrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X6nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X6nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xly2z4~q ;
 wire \soc_inst|m0_1|u_logic|Rblwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Rblwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Rblwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Fgm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ylbwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Psv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vu93z4~q ;
-wire \soc_inst|m0_1|u_logic|Mhn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ylbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ylbwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Cmn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xhbwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Xhbwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ow43z4~q ;
-wire \soc_inst|m0_1|u_logic|Xhbwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Xhbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qrnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Asbvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add5~101_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~25_sumout ;
-wire \soc_inst|m0_1|u_logic|Imhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Imhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J4x2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uzvvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fvovx4~combout ;
-wire \soc_inst|switches_1|half_word_address~2_combout ;
-wire \soc_inst|interconnect_1|HRDATA[1]~19_combout ;
-wire \soc_inst|switches_1|DataValid~0_combout ;
-wire \soc_inst|switches_1|switch_store[0][1]~q ;
-wire \soc_inst|ram_1|data_to_memory[1]~12_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ;
-wire \soc_inst|ram_1|data_to_memory[25]~11_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[1]~21_combout ;
-wire \soc_inst|m0_1|u_logic|Hcnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dwl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Acnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Sta2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uyv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zx3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H6mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|S4pwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X2rvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|X2rvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Tbnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lbn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z4xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z4xvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z4xvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|I6xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z4xvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tzxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vr7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R7iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O3pvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ojnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ojnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ojnvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z7i2z4~q ;
-wire \soc_inst|m0_1|u_logic|Iwp2z4~q ;
-wire \soc_inst|m0_1|u_logic|D4mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D4mvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Oxnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ek03z4~q ;
-wire \soc_inst|m0_1|u_logic|Oxnvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Oxnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|N5qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S6ovx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Va62z4~combout ;
-wire \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ;
-wire \soc_inst|m0_1|u_logic|H362z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ;
-wire \soc_inst|switches_1|half_word_address~1_combout ;
-wire \soc_inst|switches_1|half_word_address~3_combout ;
-wire \soc_inst|interconnect_1|HRDATA[24]~6_combout ;
-wire \soc_inst|interconnect_1|HRDATA[24]~17_combout ;
-wire \soc_inst|switches_1|switch_store[1][9]~q ;
-wire \soc_inst|interconnect_1|HRDATA[25]~18_combout ;
+wire \soc_inst|m0_1|u_logic|T583z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|C372z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J433z4~q ;
+wire \soc_inst|m0_1|u_logic|C372z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z472z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|C372z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|C372z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Yuovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[2]~2_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[7]~11_combout ;
+wire \soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|G9lwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Ycx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zkhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zkhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add3~49_sumout ;
+wire \soc_inst|m0_1|u_logic|S4qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Elnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J6i2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qfc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfc3z4~q ;
+wire \soc_inst|m0_1|u_logic|I90xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wvzwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G2zwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N4rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gtp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mbnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|L8mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cam2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mekvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mekvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|X6m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ow13z4~q ;
+wire \soc_inst|m0_1|u_logic|X533z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hyz2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bv03z4~q ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|J5m2z4~q ;
+wire \soc_inst|m0_1|u_logic|A9bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gf43z4~q ;
+wire \soc_inst|m0_1|u_logic|Po53z4~q ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~29_sumout ;
+wire \soc_inst|m0_1|u_logic|Ekovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[1]~1_combout ;
+wire \soc_inst|ram_1|data_to_memory[17]~10_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ;
+wire \soc_inst|m0_1|u_logic|Jqhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mfw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pqrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rxl2z4~q ;
+wire \soc_inst|m0_1|u_logic|S7nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S7nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Irqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zpqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jvxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vnqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Onqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S4bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q3bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~33_sumout ;
+wire \soc_inst|m0_1|u_logic|I30wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I30wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fzxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V3m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fzxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fzxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|X533z4~q ;
+wire \soc_inst|m0_1|u_logic|R40wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hyz2z4~q ;
+wire \soc_inst|m0_1|u_logic|R40wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R40wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R40wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~20_combout ;
+wire \soc_inst|ram_1|data_to_memory[3]~20_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[3]~26_combout ;
+wire \soc_inst|m0_1|u_logic|Jky2z4~q ;
+wire \soc_inst|m0_1|u_logic|E7nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vphvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oiw2z4~q ;
+wire \soc_inst|m0_1|u_logic|E7nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E7nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fjswx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Emewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wvswx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fjswx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|To33z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Kf23z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Tse3z4~q ;
+wire \soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Dq83z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ;
+wire \soc_inst|ram_1|data_to_memory[9]~9_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ;
+wire \soc_inst|switches_1|switch_store[0][9]~q ;
+wire \soc_inst|interconnect_1|HRDATA[9]~16_combout ;
 wire \soc_inst|m0_1|u_logic|O5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add1~22 ;
+wire \soc_inst|m0_1|u_logic|Add1~25_sumout ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|W9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y7y2z4~q ;
 wire \soc_inst|m0_1|u_logic|Fohvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Urw2z4~q ;
 wire \soc_inst|m0_1|u_logic|O5nvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|O5nvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Pty2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dj6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vskwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H06wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V76wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V76wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D56wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O76wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Yy5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P0hwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xu5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Px5wx4~combout ;
-wire \soc_inst|m0_1|u_logic|G27wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Uw5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ry5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mz5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xu5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xu5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Xu5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|A76wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W46wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xu5wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ylwwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ylwwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ok7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Manwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pwdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Glnwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~49_sumout ;
-wire \soc_inst|m0_1|u_logic|Skhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Skhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jex2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ohivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Lwbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Oubwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Oubwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Oubwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oubwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Konvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ksbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iu1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uku2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pybwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pybwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pybwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Pybwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pybwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Tdg2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Aeg2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Vff2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Jhe2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Qhe2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Hhd2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Ohd2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Mgd2z4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Cgf2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Mgd2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lhyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z4qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z4qvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Cll2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ch03z4~q ;
-wire \soc_inst|m0_1|u_logic|Ht5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ht5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ht5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ht5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ;
-wire \soc_inst|ram_1|data_to_memory[15]~2_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ;
-wire \soc_inst|interconnect_1|HRDATA[31]~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hjnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pmhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F1x2z4~q ;
-wire \soc_inst|m0_1|u_logic|G8nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ufy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hjnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hjnvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U2x2z4~q ;
-wire \soc_inst|m0_1|u_logic|Srgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fzyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X3xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X3xvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pa7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q3xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q3xvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Na6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|W3mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W3mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|F9wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Auk2z4~q ;
 wire \soc_inst|m0_1|u_logic|E4xvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|B3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oowvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ejwvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Wlwvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Wlwvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C3z2z4~q ;
 wire \soc_inst|m0_1|u_logic|B3mvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|E4xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hklwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hklwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hklwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Jeewx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zmlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hklwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hklwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Bthvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cyq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tykwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tykwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kxkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kxkwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kxkwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Svk2z4~q ;
-wire \soc_inst|m0_1|u_logic|C51xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Po53z4~q ;
-wire \soc_inst|m0_1|u_logic|R40wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|R40wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|R40wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R40wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ;
-wire \soc_inst|ram_1|data_to_memory[11]~17_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[11]~24_combout ;
-wire \soc_inst|m0_1|u_logic|Add1~30 ;
-wire \soc_inst|m0_1|u_logic|Add1~13_sumout ;
-wire \soc_inst|m0_1|u_logic|I9nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bby2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add1~14 ;
-wire \soc_inst|m0_1|u_logic|Add1~1_sumout ;
-wire \soc_inst|m0_1|u_logic|B9nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qcy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Knhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mww2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zgsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hyy2z4~q ;
-wire \soc_inst|m0_1|u_logic|T4nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T4nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ocfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rafwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rni2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|L753z4~q ;
-wire \soc_inst|m0_1|u_logic|Punvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qi03z4~q ;
-wire \soc_inst|m0_1|u_logic|Wlz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Punvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kf13z4~q ;
-wire \soc_inst|m0_1|u_logic|To23z4~q ;
-wire \soc_inst|m0_1|u_logic|Punvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Punvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Punvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|T50wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ijcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mnawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C3qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wzpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wzpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C3qvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zu33z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Zu33z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I453z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ql23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ql23z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ggk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hc13z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Hc13z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|An73z4~q ;
+wire \soc_inst|m0_1|u_logic|Rek2z4~q ;
+wire \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nf03z4~q ;
+wire \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~combout ;
+wire \soc_inst|m0_1|u_logic|D47wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zxpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Idk2z4~q ;
+wire \soc_inst|m0_1|u_logic|S17wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rhnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rhnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Khnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Khnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ohh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qh72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tiz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I453z4~q ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aez2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Esnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~13_sumout ;
+wire \soc_inst|m0_1|u_logic|V2qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|F4nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K3l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ux4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bjd3z4~q ;
+wire \soc_inst|m0_1|u_logic|P2a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Cps2z4~q ;
+wire \soc_inst|m0_1|u_logic|S9ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Azs2z4~q ;
+wire \soc_inst|m0_1|u_logic|S9ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S9ywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Otxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Palwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ttwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B8nwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B8nwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G5qvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|G5qvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ek03z4~q ;
+wire \soc_inst|m0_1|u_logic|Knz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yg13z4~q ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z853z4~q ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|N5qvx4~0_combout ;
 wire \soc_inst|ram_1|byte1~0_combout ;
 wire \soc_inst|ram_1|data_to_memory[14]~30_combout ;
 wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ;
@@ -4055,544 +3842,776 @@ wire \soc_inst|m0_1|u_logic|Fey2z4~q ;
 wire \soc_inst|m0_1|u_logic|M4nvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|M4nvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Mhgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iikwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Md6wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Dc6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ae6wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Dc6wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|R8d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uijwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qf6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uv6wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Q86wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Q86wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|C6mwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rqywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C6mwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|V5mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G9w2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xf6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iikwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gpjwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ua6wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Q86wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gpjwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Q86wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xf6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uv6wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Dj6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qf6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uijwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Q86wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Q86wx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Q86wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Jm6wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|G27wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Eyhvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ad7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P28wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Hyewx4~combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|P28wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Blwvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Xt6wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Q07wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|X07wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xt6wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Q07wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X07wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Xt6wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~7_combout ;
 wire \soc_inst|m0_1|u_logic|Eyhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pdi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add5~93_sumout ;
+wire \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Donvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G97wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Donvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G97wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Donvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~29_sumout ;
+wire \soc_inst|m0_1|u_logic|Ojnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ojnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ojnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z7i2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rbi3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H362z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rbi3z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rbi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ueovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vapvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Dvy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dcsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ynhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Itw2z4~q ;
+wire \soc_inst|m0_1|u_logic|H5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U9swx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S8swx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G27wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Zcn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tzxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S1ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W6iwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Bspvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bspvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~13_sumout ;
+wire \soc_inst|m0_1|u_logic|Mhhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mhhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vvx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Va62z4~combout ;
+wire \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ;
+wire \soc_inst|switches_1|half_word_address~1_combout ;
+wire \soc_inst|switches_1|half_word_address~3_combout ;
+wire \soc_inst|switches_1|half_word_address[0]~DUPLICATE_q ;
+wire \soc_inst|interconnect_1|HRDATA[7]~9_combout ;
+wire \soc_inst|interconnect_1|HRDATA[7]~10_combout ;
+wire \SW[6]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][6]~q ;
+wire \soc_inst|ram_1|data_to_memory[22]~31_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[6]~36_combout ;
+wire \soc_inst|m0_1|u_logic|Add1~34_cout ;
+wire \soc_inst|m0_1|u_logic|Add1~5_sumout ;
+wire \soc_inst|m0_1|u_logic|Ranvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add1~6 ;
+wire \soc_inst|m0_1|u_logic|Add1~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Kanvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add1~10 ;
+wire \soc_inst|m0_1|u_logic|Add1~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Danvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mohvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gqw2z4~q ;
+wire \soc_inst|m0_1|u_logic|V5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V5nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bsy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Y7xvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Gqxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Irxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zpxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hnxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mmxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Gokwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wxxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vy7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vr7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R7iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R7iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Thhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Thhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Thhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Msyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jyb2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Una2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mn3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C5c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C5c2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z6c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C5c2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Scpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N8b2z4~combout ;
+wire \soc_inst|m0_1|u_logic|G8n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Luywx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Kss2z4~q ;
+wire \soc_inst|m0_1|u_logic|Luywx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Axm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Luywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|B1a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Luywx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Zad3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Usl2z4~q ;
+wire \soc_inst|m0_1|u_logic|T7d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bmb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ypa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xtywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ypa2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|It52z4~2_combout ;
+wire \soc_inst|ram_1|byte0~0_combout ;
+wire \soc_inst|ram_1|data_to_memory[6]~32_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ;
+wire \soc_inst|switches_1|switch_store[1][6]~q ;
+wire \soc_inst|interconnect_1|HRDATA[22]~35_combout ;
+wire \soc_inst|m0_1|u_logic|Aphvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Enw2z4~q ;
+wire \soc_inst|m0_1|u_logic|J6nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J6nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J6nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M4fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vskwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H06wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V76wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V76wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D56wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mz5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Px5wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Uw5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wai2z4~q ;
+wire \soc_inst|m0_1|u_logic|Djywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lstwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B7owx4~combout ;
+wire \soc_inst|m0_1|u_logic|Pjyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pjyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|F9pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F9pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kkyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ocnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R1w2z4~q ;
+wire \soc_inst|m0_1|u_logic|F5mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F5mvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U5x2z4~q ;
+wire \soc_inst|m0_1|u_logic|X7mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X7mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I6w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lefwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Cxhvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Cxhvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Fcj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vllvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ipsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|It52z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|It52z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E7mwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vaw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bpsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Scpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Scpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|L7nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cqhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ahw2z4~q ;
+wire \soc_inst|m0_1|u_logic|L7nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L7nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Viy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fzl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I6xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Z9dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jk0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aj0xx4~combout ;
+wire \soc_inst|m0_1|u_logic|Gjqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ujqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xdnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|C34wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C34wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zx3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H6mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uyv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wwywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rqywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Abovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jvqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jnrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jhy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pfovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add1~26 ;
+wire \soc_inst|m0_1|u_logic|Add1~30 ;
+wire \soc_inst|m0_1|u_logic|Add1~13_sumout ;
+wire \soc_inst|m0_1|u_logic|I9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bby2z4~q ;
+wire \soc_inst|m0_1|u_logic|Oesvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rnhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xuw2z4~q ;
+wire \soc_inst|m0_1|u_logic|A5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Swy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nkpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ho3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|W0pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yhnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yhnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cqo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Noo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|T243z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|N662z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|N662z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K862z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N662z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|N662z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xrnvx4~0_combout ;
+wire \soc_inst|interconnect_1|LessThan1~0_combout ;
+wire \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ;
+wire \soc_inst|interconnect_1|Equal1~0_combout ;
+wire \soc_inst|switches_1|switch_store[0][4]~q ;
+wire \soc_inst|interconnect_1|HRDATA[4]~23_combout ;
+wire \soc_inst|m0_1|u_logic|W5rvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fbnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Owq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pamvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ye4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zdc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hyy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ekc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Skc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xdfwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add2~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Imhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Imhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J4x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uzvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fvovx4~combout ;
+wire \soc_inst|switches_1|half_word_address~2_combout ;
+wire \soc_inst|interconnect_1|HRDATA[1]~19_combout ;
+wire \soc_inst|switches_1|DataValid~0_combout ;
+wire \soc_inst|switches_1|switch_store[0][1]~q ;
+wire \soc_inst|interconnect_1|HRDATA[1]~21_combout ;
+wire \soc_inst|m0_1|u_logic|Hcnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dwl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Acnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Qnyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vllvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|U4z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vllvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vllvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Htyvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Cy33z4~q ;
 wire \soc_inst|m0_1|u_logic|Htyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kf13z4~q ;
 wire \soc_inst|m0_1|u_logic|Htyvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Htyvx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|R0t2z4~q ;
 wire \soc_inst|m0_1|u_logic|Rexvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Scpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z5pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|It52z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|It52z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|It52z4~2_combout ;
-wire \soc_inst|ram_1|byte0~0_combout ;
-wire \soc_inst|ram_1|data_to_memory[5]~23_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ;
-wire \soc_inst|switches_1|switch_store[0][5]~q ;
-wire \soc_inst|interconnect_1|HRDATA[5]~28_combout ;
-wire \soc_inst|m0_1|u_logic|Yanvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F0y2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wamvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tdp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ye4wx4~combout ;
-wire \soc_inst|m0_1|u_logic|S4w2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zdc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Skc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ekc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhc2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Mac2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kgc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H4nwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add2~2 ;
-wire \soc_inst|m0_1|u_logic|Add2~5_sumout ;
-wire \soc_inst|m0_1|u_logic|Wthvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wthvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J0l2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~10 ;
-wire \soc_inst|m0_1|u_logic|Add3~6 ;
-wire \soc_inst|m0_1|u_logic|Add3~1_sumout ;
-wire \soc_inst|m0_1|u_logic|Rbi3z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rbi3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ueovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qbpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tohvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sow2z4~q ;
-wire \soc_inst|m0_1|u_logic|C6nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C6nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C6nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Z5wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I3mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ndwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I3mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ggswx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ggswx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ggswx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Yaz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Q2q2z4~q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|S71wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|R21xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S71wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|S71wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Bq5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Axm2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Axm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Luywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Lhd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Luywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Fed3z4~q ;
-wire \soc_inst|m0_1|u_logic|Luywx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|C6mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C6mwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Abovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zlnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nbm2z4~q ;
-wire \soc_inst|m0_1|u_logic|By4wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Y6t2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z0mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~2_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~3_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~1_combout ;
-wire \soc_inst|m0_1|u_logic|Jbhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qx52z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~4_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~5_combout ;
-wire \soc_inst|m0_1|u_logic|E7mwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~1_combout ;
 wire \soc_inst|ram_1|always1~0_combout ;
-wire \soc_inst|ram_1|write_cycle~0_combout ;
-wire \soc_inst|ram_1|write_cycle~DUPLICATE_q ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ;
-wire \soc_inst|m0_1|u_logic|Rnhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xuw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Oesvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A5nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A5nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Swy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ahhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I0hwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ugewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~18_combout ;
-wire \soc_inst|m0_1|u_logic|P0hwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~10_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~11_combout ;
-wire \soc_inst|m0_1|u_logic|Thgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hahwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhgwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|P0hwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bhewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~12_combout ;
-wire \soc_inst|m0_1|u_logic|Kugwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~13_combout ;
-wire \soc_inst|m0_1|u_logic|Ekgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Poa2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~14_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~15_combout ;
-wire \soc_inst|m0_1|u_logic|Togwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Togwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Togwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Togwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~16_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~17_combout ;
-wire \soc_inst|m0_1|u_logic|I0hwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zygwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tvgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tvgwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|P0hwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Sgj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qr42z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qr42z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I6qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nfnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|G1mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P2mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hwrite_o~0_combout ;
 wire \soc_inst|ram_1|read_cycle~0_combout ;
 wire \soc_inst|ram_1|read_cycle~q ;
+wire \soc_inst|interconnect_1|HRDATA[11]~3_combout ;
+wire \soc_inst|interconnect_1|HRDATA[10]~12_combout ;
+wire \soc_inst|m0_1|u_logic|Add1~29_sumout ;
+wire \soc_inst|m0_1|u_logic|P9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M9y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add1~14 ;
+wire \soc_inst|m0_1|u_logic|Add1~2 ;
+wire \soc_inst|m0_1|u_logic|Add1~17_sumout ;
+wire \soc_inst|m0_1|u_logic|U8nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bdm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Oylwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oylwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|By4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Y6t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Aekwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C4d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G6d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Gzvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gzvvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|O092z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T50wx4~0_combout ;
+wire \soc_inst|ram_1|byte3~0_combout ;
+wire \soc_inst|ram_1|byte_select[3]~DUPLICATE_q ;
 wire \soc_inst|interconnect_1|HRDATA[29]~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ajnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dnhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Byw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ajnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ajnvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qem2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qllwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qllwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qllwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Qllwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Wfhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wfhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wfhvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ;
+wire \soc_inst|interconnect_1|HRDATA[31]~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nbm2z4~q ;
+wire \soc_inst|m0_1|u_logic|G8nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ufy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pmhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F1x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hjnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hjnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hjnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U2x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q2jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iyiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iyiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eajwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q9jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|R6jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6fwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Ubjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ubjwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S3jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X2jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hvhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lhjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ehjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ofjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ofjwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Pyiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pyiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fvhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Npk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vbovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zlnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add1~1_sumout ;
+wire \soc_inst|m0_1|u_logic|B9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qcy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Knhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mww2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zgsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T4nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T4nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|R8wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R8wvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Fjewx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fjewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ajfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ajfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zlfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ajfwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Lsfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Infwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lsfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ajfwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ajfwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Ajfwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Vqfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rvfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L6gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rvfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rvfwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Rvfwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cyfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B1gwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K2gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B1gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B1gwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ccgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y9gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K9gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D9gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E6gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E6gwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rvfwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ajfwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ffj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wdxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Amjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D5kwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Amjwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Amjwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Amjwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Amjwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Amjwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Tsjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ivewx4~combout ;
+wire \soc_inst|m0_1|u_logic|E7fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ugewx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|R3fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zvjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|My6wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xujwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E0fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E0fwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E0fwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Dwewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dwewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bvewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Qxhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Emi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ptgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Etlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ushvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O5t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Idiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ws3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ttiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ttiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Agiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yeiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hohwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Mvhvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cll2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ch03z4~q ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Inb2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V5mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G9w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Krjwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|E2kwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Htjwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Htjwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Htjwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|My6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zvjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xujwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Htjwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Qujwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Drjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Krjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tsjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|D5kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Amjwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ark2z4~q ;
-wire \soc_inst|m0_1|u_logic|A0zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hohwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xphwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I0hwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I0hwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zygwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvgwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Itgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Poa2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ekgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~14_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~13_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~15_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~16_combout ;
+wire \soc_inst|m0_1|u_logic|Kugwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ahhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mhgwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Thgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hahwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bhewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~18_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~11_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~12_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~17_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Sgj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Huqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Og4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mtqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ag4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mtqvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cdnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Fuhwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|K0iwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|K0iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fuhwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Fuhwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Fuhwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Fuhwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Xphwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Sjhwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Tghwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fghwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Ejhwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Ndhwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ndhwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Ndhwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fghwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Ndhwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Ndhwx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Ndhwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Fij2z4~q ;
-wire \soc_inst|m0_1|u_logic|B1vvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mrsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C4d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O3d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mrsvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G6d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z5d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L5d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P7d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L7fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mrsvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Aekwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mrsvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|haddr_o~0_combout ;
-wire \soc_inst|interconnect_1|LessThan0~0_combout ;
-wire \soc_inst|interconnect_1|Equal1~0_combout ;
-wire \soc_inst|switches_1|switch_store[1][8]~q ;
-wire \soc_inst|interconnect_1|HRDATA[24]~31_combout ;
-wire \soc_inst|m0_1|u_logic|Mohvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gqw2z4~q ;
-wire \soc_inst|m0_1|u_logic|V5nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|V5nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V5nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fkkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fkkwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pikwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Askwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mkkwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Mkkwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vqfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zlfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lsfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Infwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lsfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|B1gwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K2gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1gwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|L6gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rvfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rvfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rvfwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Rvfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cyfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E6gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E6gwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y9gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K9gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ccgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D9gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rvfwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qr42z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qr42z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I6qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nfnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Akewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yiewx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Lgkwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Unewx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Unewx4~combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Askwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Q8kwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Mkkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hekwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Bbkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Ruhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|M9pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xdfwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add2~9_sumout ;
-wire \soc_inst|m0_1|u_logic|Thhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Thhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Thhvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Jux2z4~q ;
-wire \soc_inst|m0_1|u_logic|Msyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Hvhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ubjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ubjwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|S3jwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X2jwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ehjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ofjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lhjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ofjwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Q2jwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iyiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iyiwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Eajwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q9jwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|T7jwx4~combout ;
-wire \soc_inst|m0_1|u_logic|R6jwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q6fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q6fwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Pyiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pyiwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fvhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Npk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Y8pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ipsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Scpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Scpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wfovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jvqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jnrvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jhy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pfovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ynhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Itw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dcsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H5nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H5nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dvy2z4~q ;
-wire \soc_inst|m0_1|u_logic|G27wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Blwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pw6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pw6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sfewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sfewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jeewx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fcewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fcewx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|H3ivx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|H3ivx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ws3wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|H3ivx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Av3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Av3wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vac3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gxk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Av3wx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|Av3wx4~7_combout ;
 wire \soc_inst|m0_1|u_logic|Av3wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Av3wx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|Ny3wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Ny3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Ny3wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Ny3wx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Av3wx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Av3wx4~11_combout ;
 wire \soc_inst|m0_1|u_logic|H3ivx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|H3ivx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Gji2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Lfewx4~combout ;
 wire \soc_inst|m0_1|u_logic|Pw6wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Pw6wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Fcewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fcewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sfewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sfewx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Pw6wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Akewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yiewx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Pw6wx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Vz6wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Pw6wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pcyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Duc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y1d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tki2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qbpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dnhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Byw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ajnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ajnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qem2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Zmlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Bthvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tdg2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Aeg2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Vff2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Hhd2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Qhe2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Jhe2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Ohd2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Mgd2z4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Cgf2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Mgd2z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Y1d2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y1d2z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Y1d2z4~2_combout ;
 wire \soc_inst|m0_1|u_logic|K1wvx4~combout ;
 wire \soc_inst|m0_1|u_logic|Add3~5_sumout ;
 wire \soc_inst|m0_1|u_logic|haddr_o~1_combout ;
-wire \soc_inst|interconnect_1|LessThan1~0_combout ;
-wire \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ;
+wire \soc_inst|interconnect_1|LessThan0~0_combout ;
 wire \soc_inst|interconnect_1|HREADY~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cdnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ivewx4~combout ;
-wire \soc_inst|m0_1|u_logic|E7fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dwewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dwewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bvewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|E0fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E0fwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E0fwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|Qxhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Emi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xslwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xslwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xslwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Xslwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Xslwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Etlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ushvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O5t2z4~q ;
-wire \soc_inst|m0_1|u_logic|Sbiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sbiwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sbiwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wkiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wkiwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wkiwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wkiwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Wkiwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Wkiwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Idiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sbiwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ttiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ttiwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sbiwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Agiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yeiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sbiwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Sbiwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Mvhvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Aok2z4~q ;
-wire \soc_inst|m0_1|u_logic|G97wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z5pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q8kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Mkkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bbkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hekwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Fkkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fkkwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mkkwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mkkwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Pikwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Askwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Askwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ruhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nsk2z4~q ;
 wire \soc_inst|m0_1|u_logic|Q5c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Z5pvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Z5pvx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Z5pvx4~4_combout ;
 wire \running~feeder_combout ;
 wire \running~q ;
 wire \raz_inst|Add1~37_sumout ;
+wire \raz_inst|H_count[2]~DUPLICATE_q ;
 wire \raz_inst|Add0~25_sumout ;
 wire \raz_inst|H_count[0]~DUPLICATE_q ;
 wire \raz_inst|Add0~26 ;
 wire \raz_inst|Add0~29_sumout ;
+wire \raz_inst|H_count[1]~DUPLICATE_q ;
 wire \raz_inst|Add0~30 ;
 wire \raz_inst|Add0~21_sumout ;
 wire \raz_inst|Add0~22 ;
@@ -4601,6 +4620,7 @@ wire \raz_inst|Add0~38 ;
 wire \raz_inst|Add0~41_sumout ;
 wire \raz_inst|Add0~42 ;
 wire \raz_inst|Add0~33_sumout ;
+wire \raz_inst|LessThan0~0_combout ;
 wire \raz_inst|Add0~34 ;
 wire \raz_inst|Add0~17_sumout ;
 wire \raz_inst|Add0~18 ;
@@ -4608,20 +4628,22 @@ wire \raz_inst|Add0~5_sumout ;
 wire \raz_inst|Add0~6 ;
 wire \raz_inst|Add0~9_sumout ;
 wire \raz_inst|Add0~10 ;
-wire \raz_inst|Add0~14 ;
-wire \raz_inst|Add0~1_sumout ;
-wire \raz_inst|H_count[1]~DUPLICATE_q ;
-wire \raz_inst|LessThan0~0_combout ;
+wire \raz_inst|Add0~13_sumout ;
 wire \raz_inst|LessThan0~2_combout ;
 wire \raz_inst|LessThan0~1_combout ;
 wire \raz_inst|LessThan0~3_combout ;
-wire \raz_inst|Add0~13_sumout ;
-wire \raz_inst|Add1~2 ;
-wire \raz_inst|Add1~9_sumout ;
-wire \raz_inst|Equal0~3_combout ;
+wire \raz_inst|Add0~14 ;
+wire \raz_inst|Add0~1_sumout ;
+wire \raz_inst|Add1~34 ;
+wire \raz_inst|Add1~5_sumout ;
 wire \raz_inst|Equal0~1_combout ;
 wire \raz_inst|Equal0~0_combout ;
+wire \raz_inst|Equal0~3_combout ;
 wire \raz_inst|Equal0~4_combout ;
+wire \raz_inst|Add1~6 ;
+wire \raz_inst|Add1~1_sumout ;
+wire \raz_inst|Add1~2 ;
+wire \raz_inst|Add1~9_sumout ;
 wire \raz_inst|Add1~10 ;
 wire \raz_inst|Add1~13_sumout ;
 wire \raz_inst|Add1~14 ;
@@ -4644,10 +4666,6 @@ wire \raz_inst|Add1~26 ;
 wire \raz_inst|Add1~29_sumout ;
 wire \raz_inst|Add1~30 ;
 wire \raz_inst|Add1~33_sumout ;
-wire \raz_inst|Add1~34 ;
-wire \raz_inst|Add1~5_sumout ;
-wire \raz_inst|Add1~6 ;
-wire \raz_inst|Add1~1_sumout ;
 wire \soc_inst|pix1|Add1~26 ;
 wire \soc_inst|pix1|Add1~27 ;
 wire \soc_inst|pix1|Add1~30 ;
@@ -4660,134 +4678,136 @@ wire \soc_inst|pix1|Add1~42 ;
 wire \soc_inst|pix1|Add1~43 ;
 wire \soc_inst|pix1|Add1~46 ;
 wire \soc_inst|pix1|Add1~47 ;
-wire \soc_inst|pix1|Add1~18 ;
-wire \soc_inst|pix1|Add1~19 ;
-wire \soc_inst|pix1|Add1~22 ;
-wire \soc_inst|pix1|Add1~23 ;
-wire \soc_inst|pix1|Add1~13_sumout ;
+wire \soc_inst|pix1|Add1~17_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~feeder_combout ;
 wire \soc_inst|pix1|always0~0_combout ;
 wire \soc_inst|pix1|write_enable~q ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout ;
+wire \soc_inst|pix1|word_address[7]~DUPLICATE_q ;
 wire \soc_inst|pix1|Add1~25_sumout ;
 wire \soc_inst|pix1|Add1~29_sumout ;
 wire \soc_inst|pix1|Add1~33_sumout ;
 wire \soc_inst|pix1|Add1~37_sumout ;
 wire \soc_inst|pix1|Add1~41_sumout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ;
-wire \soc_inst|pix1|Add1~17_sumout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ;
-wire \soc_inst|pix1|Add1~45_sumout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ;
+wire \soc_inst|pix1|Add1~18 ;
+wire \soc_inst|pix1|Add1~19 ;
+wire \soc_inst|pix1|Add1~22 ;
+wire \soc_inst|pix1|Add1~23 ;
+wire \soc_inst|pix1|Add1~13_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~feeder_combout ;
 wire \soc_inst|pix1|Add1~21_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~feeder_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ;
+wire \soc_inst|pix1|Add1~45_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ;
 wire \raz_inst|Red~0_combout ;
+wire \raz_inst|LessThan7~0_combout ;
+wire \raz_inst|video_on_H~q ;
+wire \raz_inst|LessThan8~2_combout ;
+wire \raz_inst|LessThan8~3_combout ;
 wire \raz_inst|always0~0_combout ;
 wire \raz_inst|LessThan4~0_combout ;
 wire \raz_inst|always0~1_combout ;
-wire \raz_inst|LessThan8~2_combout ;
-wire \raz_inst|LessThan8~3_combout ;
 wire \raz_inst|Equal0~2_combout ;
-wire \raz_inst|LessThan8~1_combout ;
 wire \raz_inst|LessThan8~0_combout ;
+wire \raz_inst|LessThan8~1_combout ;
 wire \raz_inst|LessThan8~4_combout ;
 wire \raz_inst|video_on_V~q ;
-wire \raz_inst|LessThan7~0_combout ;
-wire \raz_inst|video_on_H~q ;
 wire \raz_inst|VGA_BLANK_N~combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout ;
+wire \soc_inst|pix1|Add1~14 ;
+wire \soc_inst|pix1|Add1~15 ;
+wire \soc_inst|pix1|Add1~9_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~feeder_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ;
-wire \soc_inst|pix1|Add1~14 ;
-wire \soc_inst|pix1|Add1~15 ;
-wire \soc_inst|pix1|Add1~9_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout ;
 wire \soc_inst|pix1|Add1~10 ;
 wire \soc_inst|pix1|Add1~11 ;
@@ -4795,7 +4815,6 @@ wire \soc_inst|pix1|Add1~5_sumout ;
 wire \soc_inst|pix1|Add1~6 ;
 wire \soc_inst|pix1|Add1~7 ;
 wire \soc_inst|pix1|Add1~1_sumout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE_q ;
 wire \raz_inst|Red~1_combout ;
 wire \raz_inst|always0~6_combout ;
 wire \raz_inst|always0~5_combout ;
@@ -5001,7 +5020,7 @@ assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  = \soc_inst|ra
 assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus [0];
 assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22  = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus [1];
 
-// Location: IOOBUF_X24_Y81_N2
+// Location: IOOBUF_X52_Y0_N2
 cyclonev_io_obuf \LEDR[0]~output (
 	.i(gnd),
 	.oe(vcc),
@@ -5017,7 +5036,7 @@ defparam \LEDR[0]~output .open_drain_output = "false";
 defparam \LEDR[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X2_Y81_N76
+// Location: IOOBUF_X52_Y0_N19
 cyclonev_io_obuf \LEDR[1]~output (
 	.i(gnd),
 	.oe(vcc),
@@ -5033,7 +5052,7 @@ defparam \LEDR[1]~output .open_drain_output = "false";
 defparam \LEDR[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X34_Y81_N93
+// Location: IOOBUF_X60_Y0_N2
 cyclonev_io_obuf \LEDR[2]~output (
 	.i(gnd),
 	.oe(vcc),
@@ -5049,7 +5068,7 @@ defparam \LEDR[2]~output .open_drain_output = "false";
 defparam \LEDR[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X70_Y0_N36
+// Location: IOOBUF_X80_Y0_N2
 cyclonev_io_obuf \LEDR[3]~output (
 	.i(gnd),
 	.oe(vcc),
@@ -5065,7 +5084,7 @@ defparam \LEDR[3]~output .open_drain_output = "false";
 defparam \LEDR[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X89_Y23_N56
+// Location: IOOBUF_X60_Y0_N19
 cyclonev_io_obuf \LEDR[4]~output (
 	.i(gnd),
 	.oe(vcc),
@@ -5081,7 +5100,7 @@ defparam \LEDR[4]~output .open_drain_output = "false";
 defparam \LEDR[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X88_Y0_N3
+// Location: IOOBUF_X80_Y0_N19
 cyclonev_io_obuf \LEDR[5]~output (
 	.i(gnd),
 	.oe(vcc),
@@ -5097,7 +5116,7 @@ defparam \LEDR[5]~output .open_drain_output = "false";
 defparam \LEDR[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X10_Y0_N42
+// Location: IOOBUF_X84_Y0_N2
 cyclonev_io_obuf \LEDR[6]~output (
 	.i(gnd),
 	.oe(vcc),
@@ -5113,1908 +5132,1028 @@ defparam \LEDR[6]~output .open_drain_output = "false";
 defparam \LEDR[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X54_Y0_N53
-cyclonev_io_obuf \LEDR[7]~output (
-	.i(gnd),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(LEDR[7]),
-	.obar());
-// synopsys translate_off
-defparam \LEDR[7]~output .bus_hold = "false";
-defparam \LEDR[7]~output .open_drain_output = "false";
-defparam \LEDR[7]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y6_N22
-cyclonev_io_obuf \LEDR[8]~output (
-	.i(gnd),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(LEDR[8]),
-	.obar());
-// synopsys translate_off
-defparam \LEDR[8]~output .bus_hold = "false";
-defparam \LEDR[8]~output .open_drain_output = "false";
-defparam \LEDR[8]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X26_Y81_N93
-cyclonev_io_obuf \LEDR[9]~output (
-	.i(gnd),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(LEDR[9]),
-	.obar());
-// synopsys translate_off
-defparam \LEDR[9]~output .bus_hold = "false";
-defparam \LEDR[9]~output .open_drain_output = "false";
-defparam \LEDR[9]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X20_Y0_N19
-cyclonev_io_obuf \HEX0[0]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX0[0]),
-	.obar());
-// synopsys translate_off
-defparam \HEX0[0]~output .bus_hold = "false";
-defparam \HEX0[0]~output .open_drain_output = "false";
-defparam \HEX0[0]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X4_Y81_N53
-cyclonev_io_obuf \HEX0[1]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX0[1]),
-	.obar());
-// synopsys translate_off
-defparam \HEX0[1]~output .bus_hold = "false";
-defparam \HEX0[1]~output .open_drain_output = "false";
-defparam \HEX0[1]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X52_Y0_N19
-cyclonev_io_obuf \HEX0[2]~output (
-	.i(!\heartbeat~q ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX0[2]),
-	.obar());
-// synopsys translate_off
-defparam \HEX0[2]~output .bus_hold = "false";
-defparam \HEX0[2]~output .open_drain_output = "false";
-defparam \HEX0[2]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X56_Y0_N2
-cyclonev_io_obuf \HEX0[3]~output (
-	.i(!\heartbeat~q ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX0[3]),
-	.obar());
-// synopsys translate_off
-defparam \HEX0[3]~output .bus_hold = "false";
-defparam \HEX0[3]~output .open_drain_output = "false";
-defparam \HEX0[3]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X56_Y0_N19
-cyclonev_io_obuf \HEX0[4]~output (
-	.i(!\heartbeat~q ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX0[4]),
-	.obar());
-// synopsys translate_off
-defparam \HEX0[4]~output .bus_hold = "false";
-defparam \HEX0[4]~output .open_drain_output = "false";
-defparam \HEX0[4]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X32_Y81_N19
-cyclonev_io_obuf \HEX0[5]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX0[5]),
-	.obar());
-// synopsys translate_off
-defparam \HEX0[5]~output .bus_hold = "false";
-defparam \HEX0[5]~output .open_drain_output = "false";
-defparam \HEX0[5]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X52_Y0_N36
-cyclonev_io_obuf \HEX0[6]~output (
-	.i(!\heartbeat~q ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX0[6]),
-	.obar());
-// synopsys translate_off
-defparam \HEX0[6]~output .bus_hold = "false";
-defparam \HEX0[6]~output .open_drain_output = "false";
-defparam \HEX0[6]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X26_Y0_N93
-cyclonev_io_obuf \HEX1[0]~output (
-	.i(\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX1[0]),
-	.obar());
-// synopsys translate_off
-defparam \HEX1[0]~output .bus_hold = "false";
-defparam \HEX1[0]~output .open_drain_output = "false";
-defparam \HEX1[0]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y21_N39
-cyclonev_io_obuf \HEX1[1]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX1[1]),
-	.obar());
-// synopsys translate_off
-defparam \HEX1[1]~output .bus_hold = "false";
-defparam \HEX1[1]~output .open_drain_output = "false";
-defparam \HEX1[1]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X52_Y0_N2
-cyclonev_io_obuf \HEX1[2]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX1[2]),
-	.obar());
-// synopsys translate_off
-defparam \HEX1[2]~output .bus_hold = "false";
-defparam \HEX1[2]~output .open_drain_output = "false";
-defparam \HEX1[2]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X10_Y81_N59
-cyclonev_io_obuf \HEX1[3]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX1[3]),
-	.obar());
-// synopsys translate_off
-defparam \HEX1[3]~output .bus_hold = "false";
-defparam \HEX1[3]~output .open_drain_output = "false";
-defparam \HEX1[3]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X8_Y0_N53
-cyclonev_io_obuf \HEX1[4]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX1[4]),
-	.obar());
-// synopsys translate_off
-defparam \HEX1[4]~output .bus_hold = "false";
-defparam \HEX1[4]~output .open_drain_output = "false";
-defparam \HEX1[4]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y21_N5
-cyclonev_io_obuf \HEX1[5]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX1[5]),
-	.obar());
-// synopsys translate_off
-defparam \HEX1[5]~output .bus_hold = "false";
-defparam \HEX1[5]~output .open_drain_output = "false";
-defparam \HEX1[5]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X30_Y0_N36
-cyclonev_io_obuf \HEX1[6]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX1[6]),
-	.obar());
-// synopsys translate_off
-defparam \HEX1[6]~output .bus_hold = "false";
-defparam \HEX1[6]~output .open_drain_output = "false";
-defparam \HEX1[6]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X2_Y0_N42
-cyclonev_io_obuf \HEX2[0]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[0]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[0]~output .bus_hold = "false";
-defparam \HEX2[0]~output .open_drain_output = "false";
-defparam \HEX2[0]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X50_Y0_N42
-cyclonev_io_obuf \HEX2[1]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[1]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[1]~output .bus_hold = "false";
-defparam \HEX2[1]~output .open_drain_output = "false";
-defparam \HEX2[1]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X22_Y81_N2
-cyclonev_io_obuf \HEX2[2]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[2]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[2]~output .bus_hold = "false";
-defparam \HEX2[2]~output .open_drain_output = "false";
-defparam \HEX2[2]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X16_Y81_N19
-cyclonev_io_obuf \HEX2[3]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[3]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[3]~output .bus_hold = "false";
-defparam \HEX2[3]~output .open_drain_output = "false";
-defparam \HEX2[3]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y20_N96
-cyclonev_io_obuf \HEX2[4]~output (
-	.i(!\running~q ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[4]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[4]~output .bus_hold = "false";
-defparam \HEX2[4]~output .open_drain_output = "false";
-defparam \HEX2[4]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X68_Y0_N2
-cyclonev_io_obuf \HEX2[5]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[5]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[5]~output .bus_hold = "false";
-defparam \HEX2[5]~output .open_drain_output = "false";
-defparam \HEX2[5]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y20_N79
-cyclonev_io_obuf \HEX2[6]~output (
-	.i(!\running~q ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[6]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[6]~output .bus_hold = "false";
-defparam \HEX2[6]~output .open_drain_output = "false";
-defparam \HEX2[6]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y4_N79
-cyclonev_io_obuf \HEX3[0]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[0]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[0]~output .bus_hold = "false";
-defparam \HEX3[0]~output .open_drain_output = "false";
-defparam \HEX3[0]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X22_Y0_N19
-cyclonev_io_obuf \HEX3[1]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[1]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[1]~output .bus_hold = "false";
-defparam \HEX3[1]~output .open_drain_output = "false";
-defparam \HEX3[1]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X82_Y0_N42
-cyclonev_io_obuf \HEX3[2]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[2]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[2]~output .bus_hold = "false";
-defparam \HEX3[2]~output .open_drain_output = "false";
-defparam \HEX3[2]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X34_Y0_N59
-cyclonev_io_obuf \HEX3[3]~output (
-	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[3]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[3]~output .bus_hold = "false";
-defparam \HEX3[3]~output .open_drain_output = "false";
-defparam \HEX3[3]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X28_Y0_N53
-cyclonev_io_obuf \HEX3[4]~output (
-	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[4]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[4]~output .bus_hold = "false";
-defparam \HEX3[4]~output .open_drain_output = "false";
-defparam \HEX3[4]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X34_Y0_N93
-cyclonev_io_obuf \HEX3[5]~output (
-	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[5]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[5]~output .bus_hold = "false";
-defparam \HEX3[5]~output .open_drain_output = "false";
-defparam \HEX3[5]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y21_N22
-cyclonev_io_obuf \HEX3[6]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[6]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[6]~output .bus_hold = "false";
-defparam \HEX3[6]~output .open_drain_output = "false";
-defparam \HEX3[6]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X30_Y0_N19
-cyclonev_io_obuf \VGA_R[0]~output (
-	.i(\raz_inst|Red~1_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(VGA_R[0]),
-	.obar());
-// synopsys translate_off
-defparam \VGA_R[0]~output .bus_hold = "false";
-defparam \VGA_R[0]~output .open_drain_output = "false";
-defparam \VGA_R[0]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X12_Y0_N19
-cyclonev_io_obuf \VGA_R[1]~output (
-	.i(\raz_inst|Red~1_combout ),
+// Location: IOOBUF_X89_Y6_N5
+cyclonev_io_obuf \LEDR[7]~output (
+	.i(gnd),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_R[1]),
+	.o(LEDR[7]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_R[1]~output .bus_hold = "false";
-defparam \VGA_R[1]~output .open_drain_output = "false";
-defparam \VGA_R[1]~output .shift_series_termination_control = "false";
+defparam \LEDR[7]~output .bus_hold = "false";
+defparam \LEDR[7]~output .open_drain_output = "false";
+defparam \LEDR[7]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X30_Y0_N2
-cyclonev_io_obuf \VGA_R[2]~output (
-	.i(\raz_inst|Red~1_combout ),
+// Location: IOOBUF_X89_Y8_N5
+cyclonev_io_obuf \LEDR[8]~output (
+	.i(gnd),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_R[2]),
+	.o(LEDR[8]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_R[2]~output .bus_hold = "false";
-defparam \VGA_R[2]~output .open_drain_output = "false";
-defparam \VGA_R[2]~output .shift_series_termination_control = "false";
+defparam \LEDR[8]~output .bus_hold = "false";
+defparam \LEDR[8]~output .open_drain_output = "false";
+defparam \LEDR[8]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X12_Y0_N53
-cyclonev_io_obuf \VGA_R[3]~output (
-	.i(\raz_inst|Red~1_combout ),
+// Location: IOOBUF_X89_Y6_N22
+cyclonev_io_obuf \LEDR[9]~output (
+	.i(gnd),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_R[3]),
+	.o(LEDR[9]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_R[3]~output .bus_hold = "false";
-defparam \VGA_R[3]~output .open_drain_output = "false";
-defparam \VGA_R[3]~output .shift_series_termination_control = "false";
+defparam \LEDR[9]~output .bus_hold = "false";
+defparam \LEDR[9]~output .open_drain_output = "false";
+defparam \LEDR[9]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X22_Y0_N36
-cyclonev_io_obuf \VGA_R[4]~output (
-	.i(\raz_inst|Red~1_combout ),
+// Location: IOOBUF_X89_Y8_N39
+cyclonev_io_obuf \HEX0[0]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_R[4]),
+	.o(HEX0[0]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_R[4]~output .bus_hold = "false";
-defparam \VGA_R[4]~output .open_drain_output = "false";
-defparam \VGA_R[4]~output .shift_series_termination_control = "false";
+defparam \HEX0[0]~output .bus_hold = "false";
+defparam \HEX0[0]~output .open_drain_output = "false";
+defparam \HEX0[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X14_Y0_N2
-cyclonev_io_obuf \VGA_R[5]~output (
-	.i(\raz_inst|Red~1_combout ),
+// Location: IOOBUF_X89_Y11_N79
+cyclonev_io_obuf \HEX0[1]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_R[5]),
+	.o(HEX0[1]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_R[5]~output .bus_hold = "false";
-defparam \VGA_R[5]~output .open_drain_output = "false";
-defparam \VGA_R[5]~output .shift_series_termination_control = "false";
+defparam \HEX0[1]~output .bus_hold = "false";
+defparam \HEX0[1]~output .open_drain_output = "false";
+defparam \HEX0[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X24_Y0_N53
-cyclonev_io_obuf \VGA_R[6]~output (
-	.i(\raz_inst|Red~1_combout ),
+// Location: IOOBUF_X89_Y11_N96
+cyclonev_io_obuf \HEX0[2]~output (
+	.i(!\heartbeat~q ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_R[6]),
+	.o(HEX0[2]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_R[6]~output .bus_hold = "false";
-defparam \VGA_R[6]~output .open_drain_output = "false";
-defparam \VGA_R[6]~output .shift_series_termination_control = "false";
+defparam \HEX0[2]~output .bus_hold = "false";
+defparam \HEX0[2]~output .open_drain_output = "false";
+defparam \HEX0[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X20_Y0_N2
-cyclonev_io_obuf \VGA_R[7]~output (
-	.i(\raz_inst|Red~1_combout ),
+// Location: IOOBUF_X89_Y4_N79
+cyclonev_io_obuf \HEX0[3]~output (
+	.i(!\heartbeat~q ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_R[7]),
+	.o(HEX0[3]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_R[7]~output .bus_hold = "false";
-defparam \VGA_R[7]~output .open_drain_output = "false";
-defparam \VGA_R[7]~output .shift_series_termination_control = "false";
+defparam \HEX0[3]~output .bus_hold = "false";
+defparam \HEX0[3]~output .open_drain_output = "false";
+defparam \HEX0[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X72_Y0_N2
-cyclonev_io_obuf \VGA_G[0]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y13_N56
+cyclonev_io_obuf \HEX0[4]~output (
+	.i(!\heartbeat~q ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[0]),
+	.o(HEX0[4]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[0]~output .bus_hold = "false";
-defparam \VGA_G[0]~output .open_drain_output = "false";
-defparam \VGA_G[0]~output .shift_series_termination_control = "false";
+defparam \HEX0[4]~output .bus_hold = "false";
+defparam \HEX0[4]~output .open_drain_output = "false";
+defparam \HEX0[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X56_Y0_N36
-cyclonev_io_obuf \VGA_G[1]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y13_N39
+cyclonev_io_obuf \HEX0[5]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[1]),
+	.o(HEX0[5]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[1]~output .bus_hold = "false";
-defparam \VGA_G[1]~output .open_drain_output = "false";
-defparam \VGA_G[1]~output .shift_series_termination_control = "false";
+defparam \HEX0[5]~output .bus_hold = "false";
+defparam \HEX0[5]~output .open_drain_output = "false";
+defparam \HEX0[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X66_Y0_N42
-cyclonev_io_obuf \VGA_G[2]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y4_N96
+cyclonev_io_obuf \HEX0[6]~output (
+	.i(!\heartbeat~q ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[2]),
+	.o(HEX0[6]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[2]~output .bus_hold = "false";
-defparam \VGA_G[2]~output .open_drain_output = "false";
-defparam \VGA_G[2]~output .shift_series_termination_control = "false";
+defparam \HEX0[6]~output .bus_hold = "false";
+defparam \HEX0[6]~output .open_drain_output = "false";
+defparam \HEX0[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X32_Y81_N36
-cyclonev_io_obuf \VGA_G[3]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y6_N39
+cyclonev_io_obuf \HEX1[0]~output (
+	.i(\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[3]),
+	.o(HEX1[0]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[3]~output .bus_hold = "false";
-defparam \VGA_G[3]~output .open_drain_output = "false";
-defparam \VGA_G[3]~output .shift_series_termination_control = "false";
+defparam \HEX1[0]~output .bus_hold = "false";
+defparam \HEX1[0]~output .open_drain_output = "false";
+defparam \HEX1[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X89_Y13_N22
-cyclonev_io_obuf \VGA_G[4]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y6_N56
+cyclonev_io_obuf \HEX1[1]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[4]),
+	.o(HEX1[1]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[4]~output .bus_hold = "false";
-defparam \VGA_G[4]~output .open_drain_output = "false";
-defparam \VGA_G[4]~output .shift_series_termination_control = "false";
+defparam \HEX1[1]~output .bus_hold = "false";
+defparam \HEX1[1]~output .open_drain_output = "false";
+defparam \HEX1[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X30_Y0_N53
-cyclonev_io_obuf \VGA_G[5]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y16_N39
+cyclonev_io_obuf \HEX1[2]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[5]),
+	.o(HEX1[2]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[5]~output .bus_hold = "false";
-defparam \VGA_G[5]~output .open_drain_output = "false";
-defparam \VGA_G[5]~output .shift_series_termination_control = "false";
+defparam \HEX1[2]~output .bus_hold = "false";
+defparam \HEX1[2]~output .open_drain_output = "false";
+defparam \HEX1[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X28_Y81_N2
-cyclonev_io_obuf \VGA_G[6]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y16_N56
+cyclonev_io_obuf \HEX1[3]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[6]),
+	.o(HEX1[3]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[6]~output .bus_hold = "false";
-defparam \VGA_G[6]~output .open_drain_output = "false";
-defparam \VGA_G[6]~output .shift_series_termination_control = "false";
+defparam \HEX1[3]~output .bus_hold = "false";
+defparam \HEX1[3]~output .open_drain_output = "false";
+defparam \HEX1[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X66_Y0_N93
-cyclonev_io_obuf \VGA_G[7]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y15_N39
+cyclonev_io_obuf \HEX1[4]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[7]),
+	.o(HEX1[4]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[7]~output .bus_hold = "false";
-defparam \VGA_G[7]~output .open_drain_output = "false";
-defparam \VGA_G[7]~output .shift_series_termination_control = "false";
+defparam \HEX1[4]~output .bus_hold = "false";
+defparam \HEX1[4]~output .open_drain_output = "false";
+defparam \HEX1[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X28_Y0_N2
-cyclonev_io_obuf \VGA_B[0]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y15_N56
+cyclonev_io_obuf \HEX1[5]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[0]),
+	.o(HEX1[5]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[0]~output .bus_hold = "false";
-defparam \VGA_B[0]~output .open_drain_output = "false";
-defparam \VGA_B[0]~output .shift_series_termination_control = "false";
+defparam \HEX1[5]~output .bus_hold = "false";
+defparam \HEX1[5]~output .open_drain_output = "false";
+defparam \HEX1[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X10_Y81_N93
-cyclonev_io_obuf \VGA_B[1]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y8_N56
+cyclonev_io_obuf \HEX1[6]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[1]),
+	.o(HEX1[6]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[1]~output .bus_hold = "false";
-defparam \VGA_B[1]~output .open_drain_output = "false";
-defparam \VGA_B[1]~output .shift_series_termination_control = "false";
+defparam \HEX1[6]~output .bus_hold = "false";
+defparam \HEX1[6]~output .open_drain_output = "false";
+defparam \HEX1[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X8_Y0_N36
-cyclonev_io_obuf \VGA_B[2]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y9_N22
+cyclonev_io_obuf \HEX2[0]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[2]),
+	.o(HEX2[0]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[2]~output .bus_hold = "false";
-defparam \VGA_B[2]~output .open_drain_output = "false";
-defparam \VGA_B[2]~output .shift_series_termination_control = "false";
+defparam \HEX2[0]~output .bus_hold = "false";
+defparam \HEX2[0]~output .open_drain_output = "false";
+defparam \HEX2[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X20_Y81_N36
-cyclonev_io_obuf \VGA_B[3]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y23_N39
+cyclonev_io_obuf \HEX2[1]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[3]),
+	.o(HEX2[1]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[3]~output .bus_hold = "false";
-defparam \VGA_B[3]~output .open_drain_output = "false";
-defparam \VGA_B[3]~output .shift_series_termination_control = "false";
+defparam \HEX2[1]~output .bus_hold = "false";
+defparam \HEX2[1]~output .open_drain_output = "false";
+defparam \HEX2[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X89_Y16_N39
-cyclonev_io_obuf \VGA_B[4]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y23_N56
+cyclonev_io_obuf \HEX2[2]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[4]),
+	.o(HEX2[2]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[4]~output .bus_hold = "false";
-defparam \VGA_B[4]~output .open_drain_output = "false";
-defparam \VGA_B[4]~output .shift_series_termination_control = "false";
+defparam \HEX2[2]~output .bus_hold = "false";
+defparam \HEX2[2]~output .open_drain_output = "false";
+defparam \HEX2[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X22_Y0_N2
-cyclonev_io_obuf \VGA_B[5]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y20_N79
+cyclonev_io_obuf \HEX2[3]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[5]),
+	.o(HEX2[3]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[5]~output .bus_hold = "false";
-defparam \VGA_B[5]~output .open_drain_output = "false";
-defparam \VGA_B[5]~output .shift_series_termination_control = "false";
+defparam \HEX2[3]~output .bus_hold = "false";
+defparam \HEX2[3]~output .open_drain_output = "false";
+defparam \HEX2[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X10_Y81_N76
-cyclonev_io_obuf \VGA_B[6]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y25_N39
+cyclonev_io_obuf \HEX2[4]~output (
+	.i(!\running~q ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[6]),
+	.o(HEX2[4]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[6]~output .bus_hold = "false";
-defparam \VGA_B[6]~output .open_drain_output = "false";
-defparam \VGA_B[6]~output .shift_series_termination_control = "false";
+defparam \HEX2[4]~output .bus_hold = "false";
+defparam \HEX2[4]~output .open_drain_output = "false";
+defparam \HEX2[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X8_Y81_N53
-cyclonev_io_obuf \VGA_B[7]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y20_N96
+cyclonev_io_obuf \HEX2[5]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[7]),
+	.o(HEX2[5]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[7]~output .bus_hold = "false";
-defparam \VGA_B[7]~output .open_drain_output = "false";
-defparam \VGA_B[7]~output .shift_series_termination_control = "false";
+defparam \HEX2[5]~output .bus_hold = "false";
+defparam \HEX2[5]~output .open_drain_output = "false";
+defparam \HEX2[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X36_Y0_N36
-cyclonev_io_obuf \VGA_HS~output (
-	.i(\raz_inst|VGA_HS~q ),
+// Location: IOOBUF_X89_Y25_N56
+cyclonev_io_obuf \HEX2[6]~output (
+	.i(!\running~q ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_HS),
+	.o(HEX2[6]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_HS~output .bus_hold = "false";
-defparam \VGA_HS~output .open_drain_output = "false";
-defparam \VGA_HS~output .shift_series_termination_control = "false";
+defparam \HEX2[6]~output .bus_hold = "false";
+defparam \HEX2[6]~output .open_drain_output = "false";
+defparam \HEX2[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X32_Y0_N2
-cyclonev_io_obuf \VGA_VS~output (
-	.i(\raz_inst|VGA_VS~q ),
+// Location: IOOBUF_X89_Y16_N5
+cyclonev_io_obuf \HEX3[0]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_VS),
+	.o(HEX3[0]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_VS~output .bus_hold = "false";
-defparam \VGA_VS~output .open_drain_output = "false";
-defparam \VGA_VS~output .shift_series_termination_control = "false";
+defparam \HEX3[0]~output .bus_hold = "false";
+defparam \HEX3[0]~output .open_drain_output = "false";
+defparam \HEX3[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X52_Y0_N53
-cyclonev_io_obuf \VGA_CLK~output (
-	.i(tick_count[0]),
+// Location: IOOBUF_X89_Y16_N22
+cyclonev_io_obuf \HEX3[1]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_CLK),
+	.o(HEX3[1]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_CLK~output .bus_hold = "false";
-defparam \VGA_CLK~output .open_drain_output = "false";
-defparam \VGA_CLK~output .shift_series_termination_control = "false";
+defparam \HEX3[1]~output .bus_hold = "false";
+defparam \HEX3[1]~output .open_drain_output = "false";
+defparam \HEX3[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X32_Y0_N19
-cyclonev_io_obuf \VGA_BLANK_N~output (
-	.i(\raz_inst|VGA_BLANK_N~combout ),
+// Location: IOOBUF_X89_Y4_N45
+cyclonev_io_obuf \HEX3[2]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_BLANK_N),
+	.o(HEX3[2]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_BLANK_N~output .bus_hold = "false";
-defparam \VGA_BLANK_N~output .open_drain_output = "false";
-defparam \VGA_BLANK_N~output .shift_series_termination_control = "false";
+defparam \HEX3[2]~output .bus_hold = "false";
+defparam \HEX3[2]~output .open_drain_output = "false";
+defparam \HEX3[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOIBUF_X89_Y23_N21
-cyclonev_io_ibuf \CLOCK_50~input (
-	.i(CLOCK_50),
-	.ibar(gnd),
+// Location: IOOBUF_X89_Y4_N62
+cyclonev_io_obuf \HEX3[3]~output (
+	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
-	.o(\CLOCK_50~input_o ));
-// synopsys translate_off
-defparam \CLOCK_50~input .bus_hold = "false";
-defparam \CLOCK_50~input .simulate_z_as = "z";
-// synopsys translate_on
-
-// Location: CLKCTRL_G8
-cyclonev_clkena \CLOCK_50~inputCLKENA0 (
-	.inclk(\CLOCK_50~input_o ),
-	.ena(vcc),
-	.outclk(\CLOCK_50~inputCLKENA0_outclk ),
-	.enaout());
-// synopsys translate_off
-defparam \CLOCK_50~inputCLKENA0 .clock_type = "global clock";
-defparam \CLOCK_50~inputCLKENA0 .disable_mode = "low";
-defparam \CLOCK_50~inputCLKENA0 .ena_register_mode = "always enabled";
-defparam \CLOCK_50~inputCLKENA0 .ena_register_power_up = "high";
-defparam \CLOCK_50~inputCLKENA0 .test_syn = "high";
-// synopsys translate_on
-
-// Location: MLABCELL_X52_Y4_N12
-cyclonev_lcell_comb \tick_count[0]~0 (
-// Equation(s):
-// \tick_count[0]~0_combout  = ( !tick_count[0] )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!tick_count[0]),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\tick_count[0]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(HEX3[3]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[0]~0 .extended_lut = "off";
-defparam \tick_count[0]~0 .lut_mask = 64'hFFFF0000FFFF0000;
-defparam \tick_count[0]~0 .shared_arith = "off";
+defparam \HEX3[3]~output .bus_hold = "false";
+defparam \HEX3[3]~output .open_drain_output = "false";
+defparam \HEX3[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOIBUF_X89_Y25_N21
-cyclonev_io_ibuf \KEY[2]~input (
-	.i(KEY[2]),
-	.ibar(gnd),
+// Location: IOOBUF_X89_Y21_N39
+cyclonev_io_obuf \HEX3[4]~output (
+	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
-	.o(\KEY[2]~input_o ));
-// synopsys translate_off
-defparam \KEY[2]~input .bus_hold = "false";
-defparam \KEY[2]~input .simulate_z_as = "z";
-// synopsys translate_on
-
-// Location: CLKCTRL_G10
-cyclonev_clkena \KEY[2]~inputCLKENA0 (
-	.inclk(\KEY[2]~input_o ),
-	.ena(vcc),
-	.outclk(\KEY[2]~inputCLKENA0_outclk ),
-	.enaout());
-// synopsys translate_off
-defparam \KEY[2]~inputCLKENA0 .clock_type = "global clock";
-defparam \KEY[2]~inputCLKENA0 .disable_mode = "low";
-defparam \KEY[2]~inputCLKENA0 .ena_register_mode = "always enabled";
-defparam \KEY[2]~inputCLKENA0 .ena_register_power_up = "high";
-defparam \KEY[2]~inputCLKENA0 .test_syn = "high";
-// synopsys translate_on
-
-// Location: FF_X52_Y4_N14
-dffeas \tick_count[0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\tick_count[0]~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[0]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \tick_count[0] .is_wysiwyg = "true";
-defparam \tick_count[0] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X56_Y2_N30
-cyclonev_lcell_comb \Add0~97 (
-// Equation(s):
-// \Add0~97_sumout  = SUM(( tick_count[0] ) + ( tick_count[1] ) + ( !VCC ))
-// \Add0~98  = CARRY(( tick_count[0] ) + ( tick_count[1] ) + ( !VCC ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[1]),
-	.datad(!tick_count[0]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~97_sumout ),
-	.cout(\Add0~98 ),
-	.shareout());
-// synopsys translate_off
-defparam \Add0~97 .extended_lut = "off";
-defparam \Add0~97 .lut_mask = 64'h0000F0F0000000FF;
-defparam \Add0~97 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X56_Y2_N31
-dffeas \tick_count[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~97_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \tick_count[1] .is_wysiwyg = "true";
-defparam \tick_count[1] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X56_Y2_N33
-cyclonev_lcell_comb \Add0~93 (
-// Equation(s):
-// \Add0~93_sumout  = SUM(( tick_count[2] ) + ( GND ) + ( \Add0~98  ))
-// \Add0~94  = CARRY(( tick_count[2] ) + ( GND ) + ( \Add0~98  ))
-
-	.dataa(!tick_count[2]),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~98 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~93_sumout ),
-	.cout(\Add0~94 ),
-	.shareout());
-// synopsys translate_off
-defparam \Add0~93 .extended_lut = "off";
-defparam \Add0~93 .lut_mask = 64'h0000FFFF00005555;
-defparam \Add0~93 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X56_Y2_N35
-dffeas \tick_count[2] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~93_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[2]),
-	.prn(vcc));
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(HEX3[4]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[2] .is_wysiwyg = "true";
-defparam \tick_count[2] .power_up = "low";
+defparam \HEX3[4]~output .bus_hold = "false";
+defparam \HEX3[4]~output .open_drain_output = "false";
+defparam \HEX3[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y2_N36
-cyclonev_lcell_comb \Add0~89 (
-// Equation(s):
-// \Add0~89_sumout  = SUM(( tick_count[3] ) + ( GND ) + ( \Add0~94  ))
-// \Add0~90  = CARRY(( tick_count[3] ) + ( GND ) + ( \Add0~94  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[3]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~94 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~89_sumout ),
-	.cout(\Add0~90 ),
-	.shareout());
+// Location: IOOBUF_X89_Y11_N62
+cyclonev_io_obuf \HEX3[5]~output (
+	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(HEX3[5]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~89 .extended_lut = "off";
-defparam \Add0~89 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~89 .shared_arith = "off";
+defparam \HEX3[5]~output .bus_hold = "false";
+defparam \HEX3[5]~output .open_drain_output = "false";
+defparam \HEX3[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y2_N38
-dffeas \tick_count[3] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~89_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[3]),
-	.prn(vcc));
+// Location: IOOBUF_X89_Y9_N5
+cyclonev_io_obuf \HEX3[6]~output (
+	.i(vcc),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(HEX3[6]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[3] .is_wysiwyg = "true";
-defparam \tick_count[3] .power_up = "low";
+defparam \HEX3[6]~output .bus_hold = "false";
+defparam \HEX3[6]~output .open_drain_output = "false";
+defparam \HEX3[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y2_N39
-cyclonev_lcell_comb \Add0~85 (
-// Equation(s):
-// \Add0~85_sumout  = SUM(( tick_count[4] ) + ( GND ) + ( \Add0~90  ))
-// \Add0~86  = CARRY(( tick_count[4] ) + ( GND ) + ( \Add0~90  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[4]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~90 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~85_sumout ),
-	.cout(\Add0~86 ),
-	.shareout());
+// Location: IOOBUF_X40_Y81_N53
+cyclonev_io_obuf \VGA_R[0]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[0]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~85 .extended_lut = "off";
-defparam \Add0~85 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~85 .shared_arith = "off";
+defparam \VGA_R[0]~output .bus_hold = "false";
+defparam \VGA_R[0]~output .open_drain_output = "false";
+defparam \VGA_R[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y2_N41
-dffeas \tick_count[4] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~85_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[4]),
-	.prn(vcc));
+// Location: IOOBUF_X38_Y81_N2
+cyclonev_io_obuf \VGA_R[1]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[1]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[4] .is_wysiwyg = "true";
-defparam \tick_count[4] .power_up = "low";
+defparam \VGA_R[1]~output .bus_hold = "false";
+defparam \VGA_R[1]~output .open_drain_output = "false";
+defparam \VGA_R[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y2_N42
-cyclonev_lcell_comb \Add0~81 (
-// Equation(s):
-// \Add0~81_sumout  = SUM(( tick_count[5] ) + ( GND ) + ( \Add0~86  ))
-// \Add0~82  = CARRY(( tick_count[5] ) + ( GND ) + ( \Add0~86  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!tick_count[5]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~86 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~81_sumout ),
-	.cout(\Add0~82 ),
-	.shareout());
+// Location: IOOBUF_X26_Y81_N59
+cyclonev_io_obuf \VGA_R[2]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[2]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~81 .extended_lut = "off";
-defparam \Add0~81 .lut_mask = 64'h0000FFFF000000FF;
-defparam \Add0~81 .shared_arith = "off";
+defparam \VGA_R[2]~output .bus_hold = "false";
+defparam \VGA_R[2]~output .open_drain_output = "false";
+defparam \VGA_R[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y2_N43
-dffeas \tick_count[5] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~81_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[5]),
-	.prn(vcc));
+// Location: IOOBUF_X38_Y81_N19
+cyclonev_io_obuf \VGA_R[3]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[3]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[5] .is_wysiwyg = "true";
-defparam \tick_count[5] .power_up = "low";
+defparam \VGA_R[3]~output .bus_hold = "false";
+defparam \VGA_R[3]~output .open_drain_output = "false";
+defparam \VGA_R[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y2_N45
-cyclonev_lcell_comb \Add0~77 (
-// Equation(s):
-// \Add0~77_sumout  = SUM(( tick_count[6] ) + ( GND ) + ( \Add0~82  ))
-// \Add0~78  = CARRY(( tick_count[6] ) + ( GND ) + ( \Add0~82  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[6]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~82 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~77_sumout ),
-	.cout(\Add0~78 ),
-	.shareout());
+// Location: IOOBUF_X36_Y81_N36
+cyclonev_io_obuf \VGA_R[4]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[4]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~77 .extended_lut = "off";
-defparam \Add0~77 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~77 .shared_arith = "off";
+defparam \VGA_R[4]~output .bus_hold = "false";
+defparam \VGA_R[4]~output .open_drain_output = "false";
+defparam \VGA_R[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y2_N47
-dffeas \tick_count[6] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~77_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[6]),
-	.prn(vcc));
+// Location: IOOBUF_X22_Y81_N19
+cyclonev_io_obuf \VGA_R[5]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[5]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[6] .is_wysiwyg = "true";
-defparam \tick_count[6] .power_up = "low";
+defparam \VGA_R[5]~output .bus_hold = "false";
+defparam \VGA_R[5]~output .open_drain_output = "false";
+defparam \VGA_R[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y2_N48
-cyclonev_lcell_comb \Add0~73 (
-// Equation(s):
-// \Add0~73_sumout  = SUM(( tick_count[7] ) + ( GND ) + ( \Add0~78  ))
-// \Add0~74  = CARRY(( tick_count[7] ) + ( GND ) + ( \Add0~78  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[7]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~78 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~73_sumout ),
-	.cout(\Add0~74 ),
-	.shareout());
+// Location: IOOBUF_X22_Y81_N2
+cyclonev_io_obuf \VGA_R[6]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[6]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~73 .extended_lut = "off";
-defparam \Add0~73 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~73 .shared_arith = "off";
+defparam \VGA_R[6]~output .bus_hold = "false";
+defparam \VGA_R[6]~output .open_drain_output = "false";
+defparam \VGA_R[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y2_N50
-dffeas \tick_count[7] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~73_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[7]),
-	.prn(vcc));
+// Location: IOOBUF_X26_Y81_N42
+cyclonev_io_obuf \VGA_R[7]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[7]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[7] .is_wysiwyg = "true";
-defparam \tick_count[7] .power_up = "low";
+defparam \VGA_R[7]~output .bus_hold = "false";
+defparam \VGA_R[7]~output .open_drain_output = "false";
+defparam \VGA_R[7]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y2_N51
-cyclonev_lcell_comb \Add0~69 (
-// Equation(s):
-// \Add0~69_sumout  = SUM(( tick_count[8] ) + ( GND ) + ( \Add0~74  ))
-// \Add0~70  = CARRY(( tick_count[8] ) + ( GND ) + ( \Add0~74  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[8]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~74 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~69_sumout ),
-	.cout(\Add0~70 ),
-	.shareout());
+// Location: IOOBUF_X4_Y81_N19
+cyclonev_io_obuf \VGA_G[0]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[0]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~69 .extended_lut = "off";
-defparam \Add0~69 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~69 .shared_arith = "off";
+defparam \VGA_G[0]~output .bus_hold = "false";
+defparam \VGA_G[0]~output .open_drain_output = "false";
+defparam \VGA_G[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y2_N52
-dffeas \tick_count[8] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~69_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[8]),
-	.prn(vcc));
+// Location: IOOBUF_X4_Y81_N2
+cyclonev_io_obuf \VGA_G[1]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[1]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[8] .is_wysiwyg = "true";
-defparam \tick_count[8] .power_up = "low";
+defparam \VGA_G[1]~output .bus_hold = "false";
+defparam \VGA_G[1]~output .open_drain_output = "false";
+defparam \VGA_G[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y2_N54
-cyclonev_lcell_comb \Add0~65 (
-// Equation(s):
-// \Add0~65_sumout  = SUM(( tick_count[9] ) + ( GND ) + ( \Add0~70  ))
-// \Add0~66  = CARRY(( tick_count[9] ) + ( GND ) + ( \Add0~70  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[9]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~70 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~65_sumout ),
-	.cout(\Add0~66 ),
-	.shareout());
+// Location: IOOBUF_X20_Y81_N19
+cyclonev_io_obuf \VGA_G[2]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[2]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~65 .extended_lut = "off";
-defparam \Add0~65 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~65 .shared_arith = "off";
+defparam \VGA_G[2]~output .bus_hold = "false";
+defparam \VGA_G[2]~output .open_drain_output = "false";
+defparam \VGA_G[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y2_N56
-dffeas \tick_count[9] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~65_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[9]),
-	.prn(vcc));
+// Location: IOOBUF_X6_Y81_N2
+cyclonev_io_obuf \VGA_G[3]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[3]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[9] .is_wysiwyg = "true";
-defparam \tick_count[9] .power_up = "low";
+defparam \VGA_G[3]~output .bus_hold = "false";
+defparam \VGA_G[3]~output .open_drain_output = "false";
+defparam \VGA_G[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y2_N57
-cyclonev_lcell_comb \Add0~61 (
-// Equation(s):
-// \Add0~61_sumout  = SUM(( tick_count[10] ) + ( GND ) + ( \Add0~66  ))
-// \Add0~62  = CARRY(( tick_count[10] ) + ( GND ) + ( \Add0~66  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[10]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~66 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~61_sumout ),
-	.cout(\Add0~62 ),
-	.shareout());
+// Location: IOOBUF_X10_Y81_N59
+cyclonev_io_obuf \VGA_G[4]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[4]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~61 .extended_lut = "off";
-defparam \Add0~61 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~61 .shared_arith = "off";
+defparam \VGA_G[4]~output .bus_hold = "false";
+defparam \VGA_G[4]~output .open_drain_output = "false";
+defparam \VGA_G[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y2_N59
-dffeas \tick_count[10] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~61_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[10]),
-	.prn(vcc));
+// Location: IOOBUF_X10_Y81_N42
+cyclonev_io_obuf \VGA_G[5]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[5]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[10] .is_wysiwyg = "true";
-defparam \tick_count[10] .power_up = "low";
+defparam \VGA_G[5]~output .bus_hold = "false";
+defparam \VGA_G[5]~output .open_drain_output = "false";
+defparam \VGA_G[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N0
-cyclonev_lcell_comb \Add0~57 (
-// Equation(s):
-// \Add0~57_sumout  = SUM(( tick_count[11] ) + ( GND ) + ( \Add0~62  ))
-// \Add0~58  = CARRY(( tick_count[11] ) + ( GND ) + ( \Add0~62  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[11]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~62 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~57_sumout ),
-	.cout(\Add0~58 ),
-	.shareout());
+// Location: IOOBUF_X18_Y81_N42
+cyclonev_io_obuf \VGA_G[6]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[6]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~57 .extended_lut = "off";
-defparam \Add0~57 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~57 .shared_arith = "off";
+defparam \VGA_G[6]~output .bus_hold = "false";
+defparam \VGA_G[6]~output .open_drain_output = "false";
+defparam \VGA_G[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N2
-dffeas \tick_count[11] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~57_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[11]),
-	.prn(vcc));
+// Location: IOOBUF_X18_Y81_N59
+cyclonev_io_obuf \VGA_G[7]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[7]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[11] .is_wysiwyg = "true";
-defparam \tick_count[11] .power_up = "low";
+defparam \VGA_G[7]~output .bus_hold = "false";
+defparam \VGA_G[7]~output .open_drain_output = "false";
+defparam \VGA_G[7]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N3
-cyclonev_lcell_comb \Add0~53 (
-// Equation(s):
-// \Add0~53_sumout  = SUM(( tick_count[12] ) + ( GND ) + ( \Add0~58  ))
-// \Add0~54  = CARRY(( tick_count[12] ) + ( GND ) + ( \Add0~58  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!tick_count[12]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~58 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~53_sumout ),
-	.cout(\Add0~54 ),
-	.shareout());
+// Location: IOOBUF_X40_Y81_N36
+cyclonev_io_obuf \VGA_B[0]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[0]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~53 .extended_lut = "off";
-defparam \Add0~53 .lut_mask = 64'h0000FFFF000000FF;
-defparam \Add0~53 .shared_arith = "off";
+defparam \VGA_B[0]~output .bus_hold = "false";
+defparam \VGA_B[0]~output .open_drain_output = "false";
+defparam \VGA_B[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N5
-dffeas \tick_count[12] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~53_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[12]),
-	.prn(vcc));
+// Location: IOOBUF_X28_Y81_N19
+cyclonev_io_obuf \VGA_B[1]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[1]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[12] .is_wysiwyg = "true";
-defparam \tick_count[12] .power_up = "low";
+defparam \VGA_B[1]~output .bus_hold = "false";
+defparam \VGA_B[1]~output .open_drain_output = "false";
+defparam \VGA_B[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N6
-cyclonev_lcell_comb \Add0~49 (
-// Equation(s):
-// \Add0~49_sumout  = SUM(( tick_count[13] ) + ( GND ) + ( \Add0~54  ))
-// \Add0~50  = CARRY(( tick_count[13] ) + ( GND ) + ( \Add0~54  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[13]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~54 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~49_sumout ),
-	.cout(\Add0~50 ),
-	.shareout());
+// Location: IOOBUF_X20_Y81_N2
+cyclonev_io_obuf \VGA_B[2]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[2]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~49 .extended_lut = "off";
-defparam \Add0~49 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~49 .shared_arith = "off";
+defparam \VGA_B[2]~output .bus_hold = "false";
+defparam \VGA_B[2]~output .open_drain_output = "false";
+defparam \VGA_B[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N7
-dffeas \tick_count[13] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~49_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[13]),
-	.prn(vcc));
+// Location: IOOBUF_X36_Y81_N19
+cyclonev_io_obuf \VGA_B[3]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[3]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[13] .is_wysiwyg = "true";
-defparam \tick_count[13] .power_up = "low";
+defparam \VGA_B[3]~output .bus_hold = "false";
+defparam \VGA_B[3]~output .open_drain_output = "false";
+defparam \VGA_B[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N9
-cyclonev_lcell_comb \Add0~45 (
-// Equation(s):
-// \Add0~45_sumout  = SUM(( tick_count[14] ) + ( GND ) + ( \Add0~50  ))
-// \Add0~46  = CARRY(( tick_count[14] ) + ( GND ) + ( \Add0~50  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[14]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~50 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~45_sumout ),
-	.cout(\Add0~46 ),
-	.shareout());
+// Location: IOOBUF_X28_Y81_N2
+cyclonev_io_obuf \VGA_B[4]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[4]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~45 .extended_lut = "off";
-defparam \Add0~45 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~45 .shared_arith = "off";
+defparam \VGA_B[4]~output .bus_hold = "false";
+defparam \VGA_B[4]~output .open_drain_output = "false";
+defparam \VGA_B[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N11
-dffeas \tick_count[14] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~45_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[14]),
-	.prn(vcc));
+// Location: IOOBUF_X36_Y81_N2
+cyclonev_io_obuf \VGA_B[5]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[5]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[14] .is_wysiwyg = "true";
-defparam \tick_count[14] .power_up = "low";
+defparam \VGA_B[5]~output .bus_hold = "false";
+defparam \VGA_B[5]~output .open_drain_output = "false";
+defparam \VGA_B[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N12
-cyclonev_lcell_comb \Add0~41 (
-// Equation(s):
-// \Add0~41_sumout  = SUM(( tick_count[15] ) + ( GND ) + ( \Add0~46  ))
-// \Add0~42  = CARRY(( tick_count[15] ) + ( GND ) + ( \Add0~46  ))
-
-	.dataa(gnd),
-	.datab(!tick_count[15]),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~46 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~41_sumout ),
-	.cout(\Add0~42 ),
-	.shareout());
+// Location: IOOBUF_X40_Y81_N19
+cyclonev_io_obuf \VGA_B[6]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[6]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~41 .extended_lut = "off";
-defparam \Add0~41 .lut_mask = 64'h0000FFFF00003333;
-defparam \Add0~41 .shared_arith = "off";
+defparam \VGA_B[6]~output .bus_hold = "false";
+defparam \VGA_B[6]~output .open_drain_output = "false";
+defparam \VGA_B[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N14
-dffeas \tick_count[15] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~41_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[15]),
-	.prn(vcc));
+// Location: IOOBUF_X32_Y81_N19
+cyclonev_io_obuf \VGA_B[7]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[7]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[15] .is_wysiwyg = "true";
-defparam \tick_count[15] .power_up = "low";
+defparam \VGA_B[7]~output .bus_hold = "false";
+defparam \VGA_B[7]~output .open_drain_output = "false";
+defparam \VGA_B[7]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N15
-cyclonev_lcell_comb \Add0~37 (
-// Equation(s):
-// \Add0~37_sumout  = SUM(( tick_count[16] ) + ( GND ) + ( \Add0~42  ))
-// \Add0~38  = CARRY(( tick_count[16] ) + ( GND ) + ( \Add0~42  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[16]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~42 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~37_sumout ),
-	.cout(\Add0~38 ),
-	.shareout());
+// Location: IOOBUF_X36_Y81_N53
+cyclonev_io_obuf \VGA_HS~output (
+	.i(\raz_inst|VGA_HS~q ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_HS),
+	.obar());
 // synopsys translate_off
-defparam \Add0~37 .extended_lut = "off";
-defparam \Add0~37 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~37 .shared_arith = "off";
+defparam \VGA_HS~output .bus_hold = "false";
+defparam \VGA_HS~output .open_drain_output = "false";
+defparam \VGA_HS~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N17
-dffeas \tick_count[16] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~37_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[16]),
-	.prn(vcc));
+// Location: IOOBUF_X34_Y81_N42
+cyclonev_io_obuf \VGA_VS~output (
+	.i(\raz_inst|VGA_VS~q ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_VS),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[16] .is_wysiwyg = "true";
-defparam \tick_count[16] .power_up = "low";
+defparam \VGA_VS~output .bus_hold = "false";
+defparam \VGA_VS~output .open_drain_output = "false";
+defparam \VGA_VS~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N18
-cyclonev_lcell_comb \Add0~33 (
-// Equation(s):
-// \Add0~33_sumout  = SUM(( tick_count[17] ) + ( GND ) + ( \Add0~38  ))
-// \Add0~34  = CARRY(( tick_count[17] ) + ( GND ) + ( \Add0~38  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[17]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~38 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~33_sumout ),
-	.cout(\Add0~34 ),
-	.shareout());
+// Location: IOOBUF_X38_Y81_N36
+cyclonev_io_obuf \VGA_CLK~output (
+	.i(tick_count[0]),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_CLK),
+	.obar());
 // synopsys translate_off
-defparam \Add0~33 .extended_lut = "off";
-defparam \Add0~33 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~33 .shared_arith = "off";
+defparam \VGA_CLK~output .bus_hold = "false";
+defparam \VGA_CLK~output .open_drain_output = "false";
+defparam \VGA_CLK~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N20
-dffeas \tick_count[17] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~33_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[17]),
-	.prn(vcc));
+// Location: IOOBUF_X6_Y81_N19
+cyclonev_io_obuf \VGA_BLANK_N~output (
+	.i(\raz_inst|VGA_BLANK_N~combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_BLANK_N),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[17] .is_wysiwyg = "true";
-defparam \tick_count[17] .power_up = "low";
+defparam \VGA_BLANK_N~output .bus_hold = "false";
+defparam \VGA_BLANK_N~output .open_drain_output = "false";
+defparam \VGA_BLANK_N~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N21
-cyclonev_lcell_comb \Add0~29 (
-// Equation(s):
-// \Add0~29_sumout  = SUM(( tick_count[18] ) + ( GND ) + ( \Add0~34  ))
-// \Add0~30  = CARRY(( tick_count[18] ) + ( GND ) + ( \Add0~34  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!tick_count[18]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~34 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~29_sumout ),
-	.cout(\Add0~30 ),
-	.shareout());
+// Location: IOIBUF_X32_Y0_N1
+cyclonev_io_ibuf \CLOCK_50~input (
+	.i(CLOCK_50),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\CLOCK_50~input_o ));
 // synopsys translate_off
-defparam \Add0~29 .extended_lut = "off";
-defparam \Add0~29 .lut_mask = 64'h0000FFFF000000FF;
-defparam \Add0~29 .shared_arith = "off";
+defparam \CLOCK_50~input .bus_hold = "false";
+defparam \CLOCK_50~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N23
-dffeas \tick_count[18] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~29_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
+// Location: CLKCTRL_G6
+cyclonev_clkena \CLOCK_50~inputCLKENA0 (
+	.inclk(\CLOCK_50~input_o ),
 	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[18]),
-	.prn(vcc));
+	.outclk(\CLOCK_50~inputCLKENA0_outclk ),
+	.enaout());
 // synopsys translate_off
-defparam \tick_count[18] .is_wysiwyg = "true";
-defparam \tick_count[18] .power_up = "low";
+defparam \CLOCK_50~inputCLKENA0 .clock_type = "global clock";
+defparam \CLOCK_50~inputCLKENA0 .disable_mode = "low";
+defparam \CLOCK_50~inputCLKENA0 .ena_register_mode = "always enabled";
+defparam \CLOCK_50~inputCLKENA0 .ena_register_power_up = "high";
+defparam \CLOCK_50~inputCLKENA0 .test_syn = "high";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N24
-cyclonev_lcell_comb \Add0~25 (
+// Location: LABCELL_X57_Y20_N15
+cyclonev_lcell_comb \tick_count[0]~0 (
 // Equation(s):
-// \Add0~25_sumout  = SUM(( tick_count[19] ) + ( GND ) + ( \Add0~30  ))
-// \Add0~26  = CARRY(( tick_count[19] ) + ( GND ) + ( \Add0~30  ))
+// \tick_count[0]~0_combout  = ( !tick_count[0] )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!tick_count[19]),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
+	.datae(!tick_count[0]),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~30 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~25_sumout ),
-	.cout(\Add0~26 ),
+	.combout(\tick_count[0]~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~25 .extended_lut = "off";
-defparam \Add0~25 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~25 .shared_arith = "off";
+defparam \tick_count[0]~0 .extended_lut = "off";
+defparam \tick_count[0]~0 .lut_mask = 64'hFFFF0000FFFF0000;
+defparam \tick_count[0]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N26
-dffeas \tick_count[19] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~25_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[19]),
-	.prn(vcc));
+// Location: IOIBUF_X40_Y0_N1
+cyclonev_io_ibuf \KEY[2]~input (
+	.i(KEY[2]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\KEY[2]~input_o ));
 // synopsys translate_off
-defparam \tick_count[19] .is_wysiwyg = "true";
-defparam \tick_count[19] .power_up = "low";
+defparam \KEY[2]~input .bus_hold = "false";
+defparam \KEY[2]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N27
-cyclonev_lcell_comb \Add0~21 (
-// Equation(s):
-// \Add0~21_sumout  = SUM(( tick_count[20] ) + ( GND ) + ( \Add0~26  ))
-// \Add0~22  = CARRY(( tick_count[20] ) + ( GND ) + ( \Add0~26  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!tick_count[20]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~26 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~21_sumout ),
-	.cout(\Add0~22 ),
-	.shareout());
+// Location: CLKCTRL_G4
+cyclonev_clkena \KEY[2]~inputCLKENA0 (
+	.inclk(\KEY[2]~input_o ),
+	.ena(vcc),
+	.outclk(\KEY[2]~inputCLKENA0_outclk ),
+	.enaout());
 // synopsys translate_off
-defparam \Add0~21 .extended_lut = "off";
-defparam \Add0~21 .lut_mask = 64'h0000FFFF000000FF;
-defparam \Add0~21 .shared_arith = "off";
+defparam \KEY[2]~inputCLKENA0 .clock_type = "global clock";
+defparam \KEY[2]~inputCLKENA0 .disable_mode = "low";
+defparam \KEY[2]~inputCLKENA0 .ena_register_mode = "always enabled";
+defparam \KEY[2]~inputCLKENA0 .ena_register_power_up = "high";
+defparam \KEY[2]~inputCLKENA0 .test_syn = "high";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N29
-dffeas \tick_count[20] (
+// Location: FF_X57_Y20_N17
+dffeas \tick_count[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~21_sumout ),
+	.d(\tick_count[0]~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7023,42 +6162,42 @@ dffeas \tick_count[20] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[20]),
+	.q(tick_count[0]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[20] .is_wysiwyg = "true";
-defparam \tick_count[20] .power_up = "low";
+defparam \tick_count[0] .is_wysiwyg = "true";
+defparam \tick_count[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N30
-cyclonev_lcell_comb \Add0~17 (
+// Location: LABCELL_X66_Y14_N30
+cyclonev_lcell_comb \Add0~97 (
 // Equation(s):
-// \Add0~17_sumout  = SUM(( tick_count[21] ) + ( GND ) + ( \Add0~22  ))
-// \Add0~18  = CARRY(( tick_count[21] ) + ( GND ) + ( \Add0~22  ))
+// \Add0~97_sumout  = SUM(( tick_count[0] ) + ( tick_count[1] ) + ( !VCC ))
+// \Add0~98  = CARRY(( tick_count[0] ) + ( tick_count[1] ) + ( !VCC ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!tick_count[21]),
-	.datad(gnd),
+	.datac(!tick_count[1]),
+	.datad(!tick_count[0]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~22 ),
+	.cin(gnd),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~17_sumout ),
-	.cout(\Add0~18 ),
+	.sumout(\Add0~97_sumout ),
+	.cout(\Add0~98 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~17 .extended_lut = "off";
-defparam \Add0~17 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~17 .shared_arith = "off";
+defparam \Add0~97 .extended_lut = "off";
+defparam \Add0~97 .lut_mask = 64'h0000F0F0000000FF;
+defparam \Add0~97 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N31
-dffeas \tick_count[21] (
+// Location: FF_X66_Y14_N31
+dffeas \tick_count[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~17_sumout ),
+	.d(\Add0~97_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7067,42 +6206,42 @@ dffeas \tick_count[21] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[21]),
+	.q(tick_count[1]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[21] .is_wysiwyg = "true";
-defparam \tick_count[21] .power_up = "low";
+defparam \tick_count[1] .is_wysiwyg = "true";
+defparam \tick_count[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N33
-cyclonev_lcell_comb \Add0~13 (
+// Location: LABCELL_X66_Y14_N33
+cyclonev_lcell_comb \Add0~93 (
 // Equation(s):
-// \Add0~13_sumout  = SUM(( tick_count[22] ) + ( GND ) + ( \Add0~18  ))
-// \Add0~14  = CARRY(( tick_count[22] ) + ( GND ) + ( \Add0~18  ))
+// \Add0~93_sumout  = SUM(( tick_count[2] ) + ( GND ) + ( \Add0~98  ))
+// \Add0~94  = CARRY(( tick_count[2] ) + ( GND ) + ( \Add0~98  ))
 
-	.dataa(!tick_count[22]),
+	.dataa(!tick_count[2]),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~18 ),
+	.cin(\Add0~98 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~13_sumout ),
-	.cout(\Add0~14 ),
+	.sumout(\Add0~93_sumout ),
+	.cout(\Add0~94 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~13 .extended_lut = "off";
-defparam \Add0~13 .lut_mask = 64'h0000FFFF00005555;
-defparam \Add0~13 .shared_arith = "off";
+defparam \Add0~93 .extended_lut = "off";
+defparam \Add0~93 .lut_mask = 64'h0000FFFF00005555;
+defparam \Add0~93 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N35
-dffeas \tick_count[22] (
+// Location: FF_X66_Y14_N35
+dffeas \tick_count[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~13_sumout ),
+	.d(\Add0~93_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7111,42 +6250,42 @@ dffeas \tick_count[22] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[22]),
+	.q(tick_count[2]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[22] .is_wysiwyg = "true";
-defparam \tick_count[22] .power_up = "low";
+defparam \tick_count[2] .is_wysiwyg = "true";
+defparam \tick_count[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N36
-cyclonev_lcell_comb \Add0~5 (
+// Location: LABCELL_X66_Y14_N36
+cyclonev_lcell_comb \Add0~89 (
 // Equation(s):
-// \Add0~5_sumout  = SUM(( tick_count[23] ) + ( GND ) + ( \Add0~14  ))
-// \Add0~6  = CARRY(( tick_count[23] ) + ( GND ) + ( \Add0~14  ))
+// \Add0~89_sumout  = SUM(( tick_count[3] ) + ( GND ) + ( \Add0~94  ))
+// \Add0~90  = CARRY(( tick_count[3] ) + ( GND ) + ( \Add0~94  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!tick_count[23]),
+	.datac(!tick_count[3]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~14 ),
+	.cin(\Add0~94 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~5_sumout ),
-	.cout(\Add0~6 ),
+	.sumout(\Add0~89_sumout ),
+	.cout(\Add0~90 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~5 .extended_lut = "off";
-defparam \Add0~5 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~5 .shared_arith = "off";
+defparam \Add0~89 .extended_lut = "off";
+defparam \Add0~89 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~89 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N38
-dffeas \tick_count[23] (
+// Location: FF_X66_Y14_N38
+dffeas \tick_count[3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~5_sumout ),
+	.d(\Add0~89_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7155,42 +6294,42 @@ dffeas \tick_count[23] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[23]),
+	.q(tick_count[3]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[23] .is_wysiwyg = "true";
-defparam \tick_count[23] .power_up = "low";
+defparam \tick_count[3] .is_wysiwyg = "true";
+defparam \tick_count[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N39
-cyclonev_lcell_comb \Add0~9 (
+// Location: LABCELL_X66_Y14_N39
+cyclonev_lcell_comb \Add0~85 (
 // Equation(s):
-// \Add0~9_sumout  = SUM(( tick_count[24] ) + ( GND ) + ( \Add0~6  ))
-// \Add0~10  = CARRY(( tick_count[24] ) + ( GND ) + ( \Add0~6  ))
+// \Add0~85_sumout  = SUM(( tick_count[4] ) + ( GND ) + ( \Add0~90  ))
+// \Add0~86  = CARRY(( tick_count[4] ) + ( GND ) + ( \Add0~90  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!tick_count[24]),
+	.datac(!tick_count[4]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~6 ),
+	.cin(\Add0~90 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~9_sumout ),
-	.cout(\Add0~10 ),
+	.sumout(\Add0~85_sumout ),
+	.cout(\Add0~86 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~9 .extended_lut = "off";
-defparam \Add0~9 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~9 .shared_arith = "off";
+defparam \Add0~85 .extended_lut = "off";
+defparam \Add0~85 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~85 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N41
-dffeas \tick_count[24] (
+// Location: FF_X66_Y14_N41
+dffeas \tick_count[4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~9_sumout ),
+	.d(\Add0~85_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7199,41 +6338,42 @@ dffeas \tick_count[24] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[24]),
+	.q(tick_count[4]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[24] .is_wysiwyg = "true";
-defparam \tick_count[24] .power_up = "low";
+defparam \tick_count[4] .is_wysiwyg = "true";
+defparam \tick_count[4] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N42
-cyclonev_lcell_comb \Add0~1 (
+// Location: LABCELL_X66_Y14_N42
+cyclonev_lcell_comb \Add0~81 (
 // Equation(s):
-// \Add0~1_sumout  = SUM(( tick_count[25] ) + ( GND ) + ( \Add0~10  ))
+// \Add0~81_sumout  = SUM(( tick_count[5] ) + ( GND ) + ( \Add0~86  ))
+// \Add0~82  = CARRY(( tick_count[5] ) + ( GND ) + ( \Add0~86  ))
 
 	.dataa(gnd),
-	.datab(!tick_count[25]),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!tick_count[5]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~10 ),
+	.cin(\Add0~86 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~1_sumout ),
-	.cout(),
+	.sumout(\Add0~81_sumout ),
+	.cout(\Add0~82 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~1 .extended_lut = "off";
-defparam \Add0~1 .lut_mask = 64'h0000FFFF00003333;
-defparam \Add0~1 .shared_arith = "off";
+defparam \Add0~81 .extended_lut = "off";
+defparam \Add0~81 .lut_mask = 64'h0000FFFF000000FF;
+defparam \Add0~81 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N43
-dffeas \tick_count[25] (
+// Location: FF_X66_Y14_N43
+dffeas \tick_count[5] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~1_sumout ),
+	.d(\Add0~81_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7242,41 +6382,42 @@ dffeas \tick_count[25] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[25]),
+	.q(tick_count[5]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[25] .is_wysiwyg = "true";
-defparam \tick_count[25] .power_up = "low";
+defparam \tick_count[5] .is_wysiwyg = "true";
+defparam \tick_count[5] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X56_Y1_N48
-cyclonev_lcell_comb \heartbeat~0 (
+// Location: LABCELL_X66_Y14_N45
+cyclonev_lcell_comb \Add0~77 (
 // Equation(s):
-// \heartbeat~0_combout  = ( tick_count[25] & ( tick_count[23] ) )
+// \Add0~77_sumout  = SUM(( tick_count[6] ) + ( GND ) + ( \Add0~82  ))
+// \Add0~78  = CARRY(( tick_count[6] ) + ( GND ) + ( \Add0~82  ))
 
-	.dataa(!tick_count[23]),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!tick_count[6]),
 	.datad(gnd),
-	.datae(!tick_count[25]),
+	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~82 ),
 	.sharein(gnd),
-	.combout(\heartbeat~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~77_sumout ),
+	.cout(\Add0~78 ),
 	.shareout());
 // synopsys translate_off
-defparam \heartbeat~0 .extended_lut = "off";
-defparam \heartbeat~0 .lut_mask = 64'h0000555500005555;
-defparam \heartbeat~0 .shared_arith = "off";
+defparam \Add0~77 .extended_lut = "off";
+defparam \Add0~77 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~77 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X56_Y1_N50
-dffeas heartbeat(
+// Location: FF_X66_Y14_N47
+dffeas \tick_count[6] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\heartbeat~0_combout ),
+	.d(\Add0~77_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7285,335 +6426,262 @@ dffeas heartbeat(
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\heartbeat~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam heartbeat.is_wysiwyg = "true";
-defparam heartbeat.power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X34_Y7_N34
-dffeas \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.q(tick_count[6]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE .power_up = "low";
+defparam \tick_count[6] .is_wysiwyg = "true";
+defparam \tick_count[6] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M66wx4 (
+// Location: LABCELL_X66_Y14_N48
+cyclonev_lcell_comb \Add0~73 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M66wx4~combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \Add0~73_sumout  = SUM(( tick_count[7] ) + ( GND ) + ( \Add0~78  ))
+// \Add0~74  = CARRY(( tick_count[7] ) + ( GND ) + ( \Add0~78  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(!tick_count[7]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M66wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M66wx4 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|M66wx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jppvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jppvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~78 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~73_sumout ),
+	.cout(\Add0~74 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .lut_mask = 64'h0F000F0000000000;
-defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .shared_arith = "off";
+defparam \Add0~73 .extended_lut = "off";
+defparam \Add0~73 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~73 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y7_N1
-dffeas \soc_inst|m0_1|u_logic|Tki2z4 (
+// Location: FF_X66_Y14_N50
+dffeas \tick_count[7] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
+	.d(\Add0~73_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.q(tick_count[7]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tki2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tki2z4 .power_up = "low";
+defparam \tick_count[7] .is_wysiwyg = "true";
+defparam \tick_count[7] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ptgwx4~0 (
+// Location: LABCELL_X66_Y14_N51
+cyclonev_lcell_comb \Add0~69 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ptgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  ) )
+// \Add0~69_sumout  = SUM(( tick_count[8] ) + ( GND ) + ( \Add0~74  ))
+// \Add0~70  = CARRY(( tick_count[8] ) + ( GND ) + ( \Add0~74  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!tick_count[8]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~74 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~69_sumout ),
+	.cout(\Add0~70 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .shared_arith = "off";
+defparam \Add0~69 .extended_lut = "off";
+defparam \Add0~69 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~69 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ilpvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X66_Y14_N52
+dffeas \tick_count[8] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~69_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[8]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .shared_arith = "off";
+defparam \tick_count[8] .is_wysiwyg = "true";
+defparam \tick_count[8] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y4_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Itgwx4~0 (
+// Location: LABCELL_X66_Y14_N54
+cyclonev_lcell_comb \Add0~65 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Itgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) ) )
+// \Add0~65_sumout  = SUM(( tick_count[9] ) + ( GND ) + ( \Add0~70  ))
+// \Add0~66  = CARRY(( tick_count[9] ) + ( GND ) + ( \Add0~70  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.datac(!tick_count[9]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~70 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~65_sumout ),
+	.cout(\Add0~66 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .lut_mask = 64'hF000F000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .shared_arith = "off";
+defparam \Add0~65 .extended_lut = "off";
+defparam \Add0~65 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~65 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N25
-dffeas \soc_inst|interconnect_1|mux_sel[2] (
+// Location: FF_X66_Y14_N56
+dffeas \tick_count[9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|interconnect_1|LessThan1~0_combout ),
+	.d(\Add0~65_sumout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|interconnect_1|mux_sel [2]),
+	.q(tick_count[9]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|mux_sel[2] .is_wysiwyg = "true";
-defparam \soc_inst|interconnect_1|mux_sel[2] .power_up = "low";
+defparam \tick_count[9] .is_wysiwyg = "true";
+defparam \tick_count[9] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y5_N12
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[25]~1 (
+// Location: LABCELL_X66_Y14_N57
+cyclonev_lcell_comb \Add0~61 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[25]~1_combout  = ( !\soc_inst|interconnect_1|mux_sel [1] & ( \soc_inst|interconnect_1|mux_sel [2] & ( !\soc_inst|interconnect_1|mux_sel [0] ) ) ) # ( \soc_inst|interconnect_1|mux_sel [1] & ( 
-// !\soc_inst|interconnect_1|mux_sel [2] & ( !\soc_inst|interconnect_1|mux_sel [0] ) ) ) # ( !\soc_inst|interconnect_1|mux_sel [1] & ( !\soc_inst|interconnect_1|mux_sel [2] & ( \soc_inst|interconnect_1|mux_sel [0] ) ) )
+// \Add0~61_sumout  = SUM(( tick_count[10] ) + ( GND ) + ( \Add0~66  ))
+// \Add0~62  = CARRY(( tick_count[10] ) + ( GND ) + ( \Add0~66  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datac(!tick_count[10]),
 	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|mux_sel [1]),
-	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[25]~1 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[25]~1 .lut_mask = 64'h0F0FF0F0F0F00000;
-defparam \soc_inst|interconnect_1|HRDATA[25]~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Orewx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Orewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~66 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~61_sumout ),
+	.cout(\Add0~62 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Orewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Orewx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Orewx4~0 .shared_arith = "off";
+defparam \Add0~61 .extended_lut = "off";
+defparam \Add0~61 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~61 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sy52z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sy52z4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sy52z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X66_Y14_N59
+dffeas \tick_count[10] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~61_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[10]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .lut_mask = 64'h0050005000000000;
-defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .shared_arith = "off";
+defparam \tick_count[10] .is_wysiwyg = "true";
+defparam \tick_count[10] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Huqvx4~0 (
+// Location: LABCELL_X66_Y13_N0
+cyclonev_lcell_comb \Add0~57 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Huqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \Add0~57_sumout  = SUM(( tick_count[11] ) + ( GND ) + ( \Add0~62  ))
+// \Add0~58  = CARRY(( tick_count[11] ) + ( GND ) + ( \Add0~62  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!tick_count[11]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~62 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~57_sumout ),
+	.cout(\Add0~58 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .shared_arith = "off";
+defparam \Add0~57 .extended_lut = "off";
+defparam \Add0~57 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~57 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y7_N26
-dffeas \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE (
+// Location: FF_X66_Y13_N2
+dffeas \tick_count[11] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
+	.d(\Add0~57_sumout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.q(tick_count[11]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE .power_up = "low";
+defparam \tick_count[11] .is_wysiwyg = "true";
+defparam \tick_count[11] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzxvx4 (
+// Location: LABCELL_X66_Y13_N3
+cyclonev_lcell_comb \Add0~53 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzxvx4~combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \Add0~53_sumout  = SUM(( tick_count[12] ) + ( GND ) + ( \Add0~58  ))
+// \Add0~54  = CARRY(( tick_count[12] ) + ( GND ) + ( \Add0~58  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!tick_count[12]),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~58 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~53_sumout ),
+	.cout(\Add0~54 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzxvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzxvx4 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Kzxvx4 .shared_arith = "off";
+defparam \Add0~53 .extended_lut = "off";
+defparam \Add0~53 .lut_mask = 64'h0000FFFF000000FF;
+defparam \Add0~53 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y7_N19
-dffeas \soc_inst|m0_1|u_logic|Nsk2z4 (
+// Location: FF_X66_Y13_N5
+dffeas \tick_count[12] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
+	.d(\Add0~53_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7622,341 +6690,262 @@ dffeas \soc_inst|m0_1|u_logic|Nsk2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.q(tick_count[12]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nsk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nsk2z4 .power_up = "low";
+defparam \tick_count[12] .is_wysiwyg = "true";
+defparam \tick_count[12] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ju5wx4 (
+// Location: LABCELL_X66_Y13_N6
+cyclonev_lcell_comb \Add0~49 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ju5wx4~combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  ) ) )
+// \Add0~49_sumout  = SUM(( tick_count[13] ) + ( GND ) + ( \Add0~54  ))
+// \Add0~50  = CARRY(( tick_count[13] ) + ( GND ) + ( \Add0~54  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!tick_count[13]),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~54 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~49_sumout ),
+	.cout(\Add0~50 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ju5wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ju5wx4 .lut_mask = 64'h00000F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Ju5wx4 .shared_arith = "off";
+defparam \Add0~49 .extended_lut = "off";
+defparam \Add0~49 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~49 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y7_N1
-dffeas \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE (
+// Location: FF_X66_Y13_N7
+dffeas \tick_count[13] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
+	.d(\Add0~49_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.q(tick_count[13]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y8_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vbovx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Vbovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & !\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) 
-// )
-
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .lut_mask = 64'h0000000002000200;
-defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .shared_arith = "off";
+defparam \tick_count[13] .is_wysiwyg = "true";
+defparam \tick_count[13] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9t2z4~feeder (
+// Location: LABCELL_X66_Y13_N9
+cyclonev_lcell_comb \Add0~45 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y9t2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout  )
+// \Add0~45_sumout  = SUM(( tick_count[14] ) + ( GND ) + ( \Add0~50  ))
+// \Add0~46  = CARRY(( tick_count[14] ) + ( GND ) + ( \Add0~50  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!tick_count[14]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~50 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y9t2z4~feeder_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~45_sumout ),
+	.cout(\Add0~46 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y9t2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y9t2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Y9t2z4~feeder .shared_arith = "off";
+defparam \Add0~45 .extended_lut = "off";
+defparam \Add0~45 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~45 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y8_N49
-dffeas \soc_inst|m0_1|u_logic|Y9t2z4 (
+// Location: FF_X66_Y13_N11
+dffeas \tick_count[14] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Y9t2z4~feeder_combout ),
+	.d(\Add0~45_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.q(tick_count[14]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y9t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y9t2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdh2z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .lut_mask = 64'h0C0C0C0CFC3CFC3C;
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .shared_arith = "off";
+defparam \tick_count[14] .is_wysiwyg = "true";
+defparam \tick_count[14] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wq5wx4 (
+// Location: LABCELL_X66_Y13_N12
+cyclonev_lcell_comb \Add0~41 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wq5wx4~combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) ) )
+// \Add0~41_sumout  = SUM(( tick_count[15] ) + ( GND ) + ( \Add0~46  ))
+// \Add0~42  = CARRY(( tick_count[15] ) + ( GND ) + ( \Add0~46  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datab(!tick_count[15]),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~46 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~41_sumout ),
+	.cout(\Add0~42 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wq5wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wq5wx4 .lut_mask = 64'h0000000000330033;
-defparam \soc_inst|m0_1|u_logic|Wq5wx4 .shared_arith = "off";
+defparam \Add0~41 .extended_lut = "off";
+defparam \Add0~41 .lut_mask = 64'h0000FFFF00003333;
+defparam \Add0~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2lwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|G2lwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X66_Y13_N14
+dffeas \tick_count[15] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~41_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[15]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .lut_mask = 64'h2A2A2A2A02020202;
-defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .shared_arith = "off";
+defparam \tick_count[15] .is_wysiwyg = "true";
+defparam \tick_count[15] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Howvx4~0 (
+// Location: LABCELL_X66_Y13_N15
+cyclonev_lcell_comb \Add0~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Howvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) )
+// \Add0~37_sumout  = SUM(( tick_count[16] ) + ( GND ) + ( \Add0~42  ))
+// \Add0~38  = CARRY(( tick_count[16] ) + ( GND ) + ( \Add0~42  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!tick_count[16]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~42 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~37_sumout ),
+	.cout(\Add0~38 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Howvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Howvx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Howvx4~0 .shared_arith = "off";
+defparam \Add0~37 .extended_lut = "off";
+defparam \Add0~37 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2lwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|G2lwx4~combout  = ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2lwx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G2lwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X66_Y13_N17
+dffeas \tick_count[16] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~37_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[16]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G2lwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G2lwx4 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|G2lwx4 .shared_arith = "off";
+defparam \tick_count[16] .is_wysiwyg = "true";
+defparam \tick_count[16] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X21_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbi3z4~0 (
+// Location: LABCELL_X66_Y13_N18
+cyclonev_lcell_comb \Add0~33 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rbi3z4~0_combout  = ( \soc_inst|m0_1|u_logic|E7mwx4~combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \Add0~33_sumout  = SUM(( tick_count[17] ) + ( GND ) + ( \Add0~38  ))
+// \Add0~34  = CARRY(( tick_count[17] ) + ( GND ) + ( \Add0~38  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!tick_count[17]),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~38 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rbi3z4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~33_sumout ),
+	.cout(\Add0~34 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .shared_arith = "off";
+defparam \Add0~33 .extended_lut = "off";
+defparam \Add0~33 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y7_N28
-dffeas \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE (
+// Location: FF_X66_Y13_N20
+dffeas \tick_count[17] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
+	.d(\Add0~33_sumout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.q(tick_count[17]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wmc2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wmc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wmc2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .lut_mask = 64'h0022002200000000;
-defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .shared_arith = "off";
+defparam \tick_count[17] .is_wysiwyg = "true";
+defparam \tick_count[17] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wdqvx4~0 (
+// Location: LABCELL_X66_Y13_N21
+cyclonev_lcell_comb \Add0~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )
+// \Add0~29_sumout  = SUM(( tick_count[18] ) + ( GND ) + ( \Add0~34  ))
+// \Add0~30  = CARRY(( tick_count[18] ) + ( GND ) + ( \Add0~34  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!tick_count[18]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~34 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~29_sumout ),
+	.cout(\Add0~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .lut_mask = 64'hAA00AA00AA00AA00;
-defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .shared_arith = "off";
+defparam \Add0~29 .extended_lut = "off";
+defparam \Add0~29 .lut_mask = 64'h0000FFFF000000FF;
+defparam \Add0~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y7_N35
-dffeas \soc_inst|m0_1|u_logic|A4t2z4 (
+// Location: FF_X66_Y13_N23
+dffeas \tick_count[18] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
+	.d(\Add0~29_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7965,436 +6954,367 @@ dffeas \soc_inst|m0_1|u_logic|A4t2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.q(tick_count[18]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A4t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|A4t2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X35_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mhc2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|A4t2z4~q ))) ) ) 
-// ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|A4t2z4~q 
-// ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .lut_mask = 64'h4CCC00884C4C0000;
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mhc2z4~3_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((\soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .lut_mask = 64'h000000000C5C0C5C;
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mhc2z4~4_combout  = ( !\soc_inst|m0_1|u_logic|Mhc2z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Wmc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Mhc2z4~2_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Kzxvx4~combout )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Wmc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mhc2z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mhc2z4~3_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .lut_mask = 64'hA080A08000000000;
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .shared_arith = "off";
+defparam \tick_count[18] .is_wysiwyg = "true";
+defparam \tick_count[18] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9qvx4~0 (
+// Location: LABCELL_X66_Y13_N24
+cyclonev_lcell_comb \Add0~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O9qvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~q )
+// \Add0~25_sumout  = SUM(( tick_count[19] ) + ( GND ) + ( \Add0~30  ))
+// \Add0~26  = CARRY(( tick_count[19] ) + ( GND ) + ( \Add0~30  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!tick_count[19]),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .lut_mask = 64'h00AA00AA00AA00AA;
-defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y4_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rsqvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rsqvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~30 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~25_sumout ),
+	.cout(\Add0~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .lut_mask = 64'hFFFFFF0000FF0000;
-defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .shared_arith = "off";
+defparam \Add0~25 .extended_lut = "off";
+defparam \Add0~25 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ag4wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ag4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ju5wx4~combout )) ) 
-// ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X66_Y13_N26
+dffeas \tick_count[19] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~25_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[19]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .lut_mask = 64'h0000000500000000;
-defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .shared_arith = "off";
+defparam \tick_count[19] .is_wysiwyg = "true";
+defparam \tick_count[19] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkxvx4~0 (
+// Location: LABCELL_X66_Y13_N27
+cyclonev_lcell_comb \Add0~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )
+// \Add0~21_sumout  = SUM(( tick_count[20] ) + ( GND ) + ( \Add0~26  ))
+// \Add0~22  = CARRY(( tick_count[20] ) + ( GND ) + ( \Add0~26  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!tick_count[20]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~21_sumout ),
+	.cout(\Add0~22 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .lut_mask = 64'hAA00AA00AA00AA00;
-defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .shared_arith = "off";
+defparam \Add0~21 .extended_lut = "off";
+defparam \Add0~21 .lut_mask = 64'h0000FFFF000000FF;
+defparam \Add0~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtqvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mtqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Kzxvx4~combout )) # (\soc_inst|m0_1|u_logic|M66wx4~combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X66_Y13_N29
+dffeas \tick_count[20] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~21_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[20]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .lut_mask = 64'h005500550F5F0F5F;
-defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .shared_arith = "off";
+defparam \tick_count[20] .is_wysiwyg = "true";
+defparam \tick_count[20] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sy2wx4~0 (
+// Location: LABCELL_X66_Y13_N30
+cyclonev_lcell_comb \Add0~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  = (!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )
+// \Add0~17_sumout  = SUM(( tick_count[21] ) + ( GND ) + ( \Add0~22  ))
+// \Add0~18  = CARRY(( tick_count[21] ) + ( GND ) + ( \Add0~22  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!tick_count[21]),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~22 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~17_sumout ),
+	.cout(\Add0~18 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .lut_mask = 64'h00F000F000F000F0;
-defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .shared_arith = "off";
+defparam \Add0~17 .extended_lut = "off";
+defparam \Add0~17 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpzvx4~0 (
+// Location: FF_X66_Y13_N31
+dffeas \tick_count[21] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~17_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[21]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \tick_count[21] .is_wysiwyg = "true";
+defparam \tick_count[21] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X66_Y13_N33
+cyclonev_lcell_comb \Add0~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \Add0~13_sumout  = SUM(( tick_count[22] ) + ( GND ) + ( \Add0~18  ))
+// \Add0~14  = CARRY(( tick_count[22] ) + ( GND ) + ( \Add0~18  ))
 
-	.dataa(gnd),
+	.dataa(!tick_count[22]),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~18 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~13_sumout ),
+	.cout(\Add0~14 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .shared_arith = "off";
+defparam \Add0~13 .extended_lut = "off";
+defparam \Add0~13 .lut_mask = 64'h0000FFFF00005555;
+defparam \Add0~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P03wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P03wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X66_Y13_N35
+dffeas \tick_count[22] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~13_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[22]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P03wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P03wx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|P03wx4~0 .shared_arith = "off";
+defparam \tick_count[22] .is_wysiwyg = "true";
+defparam \tick_count[22] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Og4wx4~0 (
+// Location: LABCELL_X66_Y13_N36
+cyclonev_lcell_comb \Add0~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Og4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y6t2z4~q  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
+// \Add0~5_sumout  = SUM(( tick_count[23] ) + ( GND ) + ( \Add0~14  ))
+// \Add0~6  = CARRY(( tick_count[23] ) + ( GND ) + ( \Add0~14  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datac(!tick_count[23]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~5_sumout ),
+	.cout(\Add0~6 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .shared_arith = "off";
+defparam \Add0~5 .extended_lut = "off";
+defparam \Add0~5 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtqvx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mtqvx4~combout  = ( !\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ag4wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mtqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P03wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X66_Y13_N38
+dffeas \tick_count[23] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~5_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[23]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mtqvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mtqvx4 .lut_mask = 64'h8088808800000000;
-defparam \soc_inst|m0_1|u_logic|Mtqvx4 .shared_arith = "off";
+defparam \tick_count[23] .is_wysiwyg = "true";
+defparam \tick_count[23] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nxqvx4~0 (
+// Location: LABCELL_X66_Y13_N39
+cyclonev_lcell_comb \Add0~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nxqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \Add0~9_sumout  = SUM(( tick_count[24] ) + ( GND ) + ( \Add0~6  ))
+// \Add0~10  = CARRY(( tick_count[24] ) + ( GND ) + ( \Add0~6  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!tick_count[24]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~6 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~9_sumout ),
+	.cout(\Add0~10 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .lut_mask = 64'hF0F0F0F0FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .shared_arith = "off";
+defparam \Add0~9 .extended_lut = "off";
+defparam \Add0~9 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1rvx4~0 (
+// Location: FF_X66_Y13_N41
+dffeas \tick_count[24] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~9_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[24]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \tick_count[24] .is_wysiwyg = "true";
+defparam \tick_count[24] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X66_Y13_N42
+cyclonev_lcell_comb \Add0~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H1rvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout  & \soc_inst|m0_1|u_logic|Nbm2z4~q ) ) )
+// \Add0~1_sumout  = SUM(( tick_count[25] ) + ( GND ) + ( \Add0~10  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.dataa(gnd),
+	.datab(!tick_count[25]),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\Add0~1_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .lut_mask = 64'h0A0A0A0A00000000;
-defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .shared_arith = "off";
+defparam \Add0~1 .extended_lut = "off";
+defparam \Add0~1 .lut_mask = 64'h0000FFFF00003333;
+defparam \Add0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S5pvx4 (
+// Location: FF_X66_Y13_N43
+dffeas \tick_count[25] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~1_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[25]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \tick_count[25] .is_wysiwyg = "true";
+defparam \tick_count[25] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X66_Y13_N48
+cyclonev_lcell_comb \heartbeat~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S5pvx4~combout  = ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
+// \heartbeat~0_combout  = ( tick_count[25] & ( tick_count[23] ) )
 
-	.dataa(gnd),
+	.dataa(!tick_count[23]),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!tick_count[25]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.combout(\heartbeat~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S5pvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S5pvx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|S5pvx4 .shared_arith = "off";
+defparam \heartbeat~0 .extended_lut = "off";
+defparam \heartbeat~0 .lut_mask = 64'h0000000055555555;
+defparam \heartbeat~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yghvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tyx2z4~q  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & !\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Hxx2z4~q ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Tyx2z4~q  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & !\soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Tyx2z4~q  & ( 
-// !\soc_inst|interconnect_1|HREADY~0_combout  ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X66_Y13_N49
+dffeas heartbeat(
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\heartbeat~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\heartbeat~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .lut_mask = 64'h0000FFFF88888F8F;
-defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .shared_arith = "off";
+defparam heartbeat.is_wysiwyg = "true";
+defparam heartbeat.power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y6_N32
-dffeas \soc_inst|m0_1|u_logic|Tyx2z4 (
+// Location: FF_X34_Y14_N38
+dffeas \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -8403,6998 +7323,7200 @@ dffeas \soc_inst|m0_1|u_logic|Tyx2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tyx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tyx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ibrwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ibrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hxx2z4~q  & (\soc_inst|m0_1|u_logic|Tyx2z4~q  & ((\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # (\soc_inst|m0_1|u_logic|M9pvx4~0_combout )))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # ((!\soc_inst|m0_1|u_logic|Hxx2z4~q  & \soc_inst|m0_1|u_logic|Tyx2z4~q )) ) )
+// Location: FF_X35_Y13_N1
+dffeas \soc_inst|m0_1|u_logic|A4t2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A4t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A4t2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y14_N52
+dffeas \soc_inst|m0_1|u_logic|Ffj2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .lut_mask = 64'hFF22FF2202220222;
-defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ffj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y6_N8
-dffeas \soc_inst|m0_1|u_logic|Hxx2z4 (
+// Location: FF_X33_Y14_N58
+dffeas \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hxx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hxx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y6_N31
-dffeas \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE (
+// Location: FF_X33_Y14_N23
+dffeas \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8c2z4~0 (
+// Location: MLABCELL_X34_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Orewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B8c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Orewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Orewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Orewx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Orewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y7_N56
-dffeas \soc_inst|m0_1|u_logic|Vaw2z4 (
+// Location: FF_X35_Y13_N20
+dffeas \soc_inst|m0_1|u_logic|L8t2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vaw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vaw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L8t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L8t2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpsvx4~0 (
+// Location: LABCELL_X33_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ucqvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bpsvx4~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|m0_1|u_logic|Vaw2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ucqvx4~combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.dataf(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .lut_mask = 64'h0000555500005555;
-defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ucqvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ucqvx4 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Ucqvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xnrvx4~0 (
+// Location: LABCELL_X42_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7jwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T7jwx4~combout  = ( \soc_inst|m0_1|u_logic|G9w2z4~q  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & \soc_inst|m0_1|u_logic|Ucqvx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G9w2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & \soc_inst|m0_1|u_logic|Ucqvx4~combout )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|T7jwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T7jwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T7jwx4 .lut_mask = 64'h0003000300010001;
+defparam \soc_inst|m0_1|u_logic|T7jwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhxvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xnrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Bpsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Xhxvx4~combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .lut_mask = 64'h000000000000A0A0;
-defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhxvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Xhxvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvqvx4~1 (
+// Location: MLABCELL_X39_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hxx2z4~q  & (\soc_inst|m0_1|u_logic|Xnrvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ueovx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Icyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .lut_mask = 64'h0000000000000020;
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N17
-dffeas \soc_inst|ram_1|write_cycle (
+// Location: FF_X35_Y13_N17
+dffeas \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|write_cycle~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|write_cycle~q ),
+	.q(\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|write_cycle .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|write_cycle .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpsvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wpsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Npk2z4~q ))))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .lut_mask = 64'h0000000002130213;
-defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I1c2z4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|I1c2z4~combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I1c2z4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X34_Y14_N55
+dffeas \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I1c2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I1c2z4 .lut_mask = 64'h0000000000000C0C;
-defparam \soc_inst|m0_1|u_logic|I1c2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9yvx4 (
+// Location: MLABCELL_X34_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfd2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C9yvx4~combout  = (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ))
+// \soc_inst|m0_1|u_logic|Kfd2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q 
+// )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9yvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9yvx4 .lut_mask = 64'hC000C000C000C000;
-defparam \soc_inst|m0_1|u_logic|C9yvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .lut_mask = 64'h0000050000000000;
+defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ncqvx4~0 (
+// Location: MLABCELL_X34_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pcyvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Pcyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pcyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pcyvx4 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Pcyvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P1c2z4~0 (
+// Location: FF_X33_Y14_N40
+dffeas \soc_inst|m0_1|u_logic|Ark2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ark2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ark2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P1c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|C9yvx4~combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|C9yvx4~combout  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P1c2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .lut_mask = 64'h0000000F0030003F;
-defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z7fwx4~0 (
+// Location: MLABCELL_X34_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .lut_mask = 64'hCCCCCCCCC8CCC8CC;
+defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G0c2z4~0 (
+// Location: FF_X34_Y14_N8
+dffeas \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ncqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G0c2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G0c2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .lut_mask = 64'h0A000A0000000000;
-defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zzb2z4~0 (
+// Location: MLABCELL_X34_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pkxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .lut_mask = 64'hFF00FF00FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~0 (
+// Location: MLABCELL_X34_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jyb2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G0c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G0c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|R8d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G0c2z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .lut_mask = 64'hBB00BB00BF00BF00;
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhiwx4~0 (
+// Location: LABCELL_X31_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P7d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xhiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Ju5wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|P7d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P7d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~1 (
+// Location: LABCELL_X31_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ju5wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jyb2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xhiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jyb2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q 
-// )))) ) )
+// \soc_inst|m0_1|u_logic|Ju5wx4~combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jyb2z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .lut_mask = 64'h00FB00FB00000000;
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ju5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ju5wx4 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Ju5wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~2 (
+// Location: LABCELL_X31_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jyb2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|P1c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Jyb2z4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Msyvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|L7fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P1c2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jyb2z4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L7fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .lut_mask = 64'h00000000F7F70000;
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y11_N23
-dffeas \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .lut_mask = 64'h3300330000000000;
+defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O092z4~0 (
+// Location: MLABCELL_X34_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Socwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O092z4~0_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Hxx2z4~q  $ (!\soc_inst|m0_1|u_logic|Fcj2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & !\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Socwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Emi2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O092z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O092z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O092z4~0 .lut_mask = 64'h5500550005500550;
-defparam \soc_inst|m0_1|u_logic|O092z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y5_N47
-dffeas \soc_inst|m0_1|u_logic|K1z2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K1z2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K1z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K1z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Socwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Socwx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Socwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bxcwx4~0 (
+// Location: LABCELL_X31_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L5d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  ) )
+// \soc_inst|m0_1|u_logic|L5d2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L5d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .lut_mask = 64'h0000FFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .lut_mask = 64'h0500050000000000;
+defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lu6wx4~0 (
+// Location: LABCELL_X30_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lu6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Z5d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.datab(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .lut_mask = 64'h0000000000005500;
-defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .lut_mask = 64'h000000CC00000000;
+defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Slnvx4~0 (
+// Location: LABCELL_X31_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Slnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & !\soc_inst|m0_1|u_logic|Nbm2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Mrsvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|L5d2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Z5d2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L7fwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Ju5wx4~combout ) # (!\soc_inst|m0_1|u_logic|Socwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L5d2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z5d2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Ju5wx4~combout ) # (!\soc_inst|m0_1|u_logic|Socwx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L7fwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L5d2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Slnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .lut_mask = 64'hFFEE0000F0E00000;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Edovx4 (
+// Location: LABCELL_X31_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jppvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Edovx4~combout  = ( \soc_inst|m0_1|u_logic|Xnrvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Abovx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Hxx2z4~q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nbm2z4~q ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Xnrvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbm2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Jppvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Edovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Edovx4 .lut_mask = 64'hDDDDDDDDDDFDDDFD;
-defparam \soc_inst|m0_1|u_logic|Edovx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y8_N40
-dffeas \soc_inst|m0_1|u_logic|T1y2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Slnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T1y2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T1y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T1y2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X24_Y6_N38
-dffeas \soc_inst|m0_1|u_logic|Jcw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jcw2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jcw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jcw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .lut_mask = 64'h00000000A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Llnvx4~0 (
+// Location: LABCELL_X36_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Llnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jcw2z4~q  & ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jcw2z4~q  & ((!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & 
-// ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Vaw2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & 
-// ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Vaw2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|I2mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ark2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jcw2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Llnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .lut_mask = 64'h44EE55FF040E050F;
-defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .lut_mask = 64'h0000FF000505FF05;
+defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Llnvx4 (
+// Location: LABCELL_X36_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B73wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Llnvx4~combout  = ( \soc_inst|m0_1|u_logic|Llnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|T1y2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|B73wx4~combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T1y2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Llnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Llnvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Llnvx4 .lut_mask = 64'h00000000FF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Llnvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y6_N22
-dffeas \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X36_Y7_N55
-dffeas \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B73wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B73wx4 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|B73wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Socwx4~0 (
+// Location: LABCELL_X29_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G1mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Socwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \soc_inst|m0_1|u_logic|G1mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G1mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Socwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Socwx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Socwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .lut_mask = 64'h0A000A000E000E00;
+defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~0 (
+// Location: LABCELL_X35_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A4c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lhyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (!\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|A4c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .lut_mask = 64'hFC00FC0000000000;
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .lut_mask = 64'h0000000000CC00CC;
+defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxc2z4 (
+// Location: LABCELL_X35_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qxc2z4~combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxc2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxc2z4 .lut_mask = 64'h3333333300000000;
-defparam \soc_inst|m0_1|u_logic|Qxc2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .lut_mask = 64'hAAAAAAAA00000000;
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~1 (
+// Location: LABCELL_X35_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lhyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Qxc2z4~combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & ((!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Qxc2z4~combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Qxc2z4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Z0mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( (\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( (\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .lut_mask = 64'hF0FC5054F0FC0000;
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .lut_mask = 64'h004400440044F0F4;
+defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ps3wx4~0 (
+// Location: LABCELL_X31_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1vvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ps3wx4~0_combout  = (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )
+// \soc_inst|m0_1|u_logic|B1vvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .lut_mask = 64'hFF55FF55FF55FF55;
-defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y8_N37
-dffeas \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X8zvx4 (
+// Location: MLABCELL_X34_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdh2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X8zvx4~combout  = ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X8zvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X8zvx4 .lut_mask = 64'h0808000000000000;
-defparam \soc_inst|m0_1|u_logic|X8zvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~0 (
+// Location: LABCELL_X35_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qaqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Evcwx4~0_combout  = (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )))
+// \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .lut_mask = 64'h0800080008000800;
-defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~1 (
+// Location: FF_X34_Y14_N53
+dffeas \soc_inst|m0_1|u_logic|Aok2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aok2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aok2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Evcwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~q )) 
-// ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|G97wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .lut_mask = 64'h003C003C00000101;
-defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|G97wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T3ovx4~0 (
+// Location: LABCELL_X37_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P2mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T3ovx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|P2mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|G97wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P2mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .lut_mask = 64'h0A2A0A0A00220000;
-defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .lut_mask = 64'h2222222200200020;
+defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H4ovx4~0 (
+// Location: LABCELL_X37_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pa7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H4ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Pa7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .lut_mask = 64'h0000000005000500;
-defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .lut_mask = 64'h0000000000AA00AA;
+defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzcwx4~0 (
+// Location: LABCELL_X37_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwrite_o~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzcwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|hwrite_o~0_combout  = ( \soc_inst|m0_1|u_logic|Pa7wx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|P2mwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z0mwx4~0_combout )) # (\soc_inst|m0_1|u_logic|G1mwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|I2mwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pa7wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|P2mwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z0mwx4~0_combout )) # (\soc_inst|m0_1|u_logic|I2mwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|G1mwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P2mwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .lut_mask = 64'h0005000500000000;
-defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .lut_mask = 64'h5FFF5FFF7FFF7FFF;
+defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzawx4 (
+// Location: LABCELL_X35_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzawx4~combout  = ( \soc_inst|m0_1|u_logic|H4ovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|H4ovx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|H4ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H4ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Evcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & !\soc_inst|m0_1|u_logic|T3ovx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzawx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzawx4 .lut_mask = 64'hD555555555555555;
-defparam \soc_inst|m0_1|u_logic|Wzawx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .lut_mask = 64'h0000000000000100;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~0 (
+// Location: LABCELL_X35_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Glnwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glnwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .lut_mask = 64'h00000505C0C00505;
-defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .lut_mask = 64'h1000100000000000;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~0 (
+// Location: LABCELL_X35_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xx2wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Xx2wx4~combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y6_N34
-dffeas \soc_inst|m0_1|u_logic|L8t2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L8t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L8t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xx2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xx2wx4 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Xx2wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qaqvx4~0 (
+// Location: LABCELL_X35_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|L8t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dcrwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .lut_mask = 64'h30F030F070F070F0;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6nwx4~0 (
+// Location: LABCELL_X35_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wdqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E6nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .lut_mask = 64'h0000CCCC0000FFCC;
-defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .lut_mask = 64'hFFFF000000000000;
+defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G36wx4~0 (
+// Location: LABCELL_X35_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G36wx4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Mhc2z4~3_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Sgj2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q 
+// )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G36wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G36wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G36wx4~0 .lut_mask = 64'h0000505050505050;
-defparam \soc_inst|m0_1|u_logic|G36wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .lut_mask = 64'h00220022002E002E;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfdwx4~0 (
+// Location: LABCELL_X33_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzxvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Kzxvx4~combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .lut_mask = 64'h0000000000C000C0;
-defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kzxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzxvx4 .lut_mask = 64'h00000000AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Kzxvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mn3wx4~0 (
+// Location: LABCELL_X35_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wmc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mn3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Wmc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wmc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .lut_mask = 64'h0000000000550055;
-defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .lut_mask = 64'h000000000A000A00;
+defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ucqvx4 (
+// Location: LABCELL_X35_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ucqvx4~combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Mhc2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q 
+//  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ucqvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ucqvx4 .lut_mask = 64'h0000FFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Ucqvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .lut_mask = 64'h5D00FF0008000800;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X77wx4 (
+// Location: LABCELL_X36_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X77wx4~combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Mhc2z4~4_combout  = ( !\soc_inst|m0_1|u_logic|Mhc2z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Mhc2z4~3_combout  & (!\soc_inst|m0_1|u_logic|Wmc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Kzxvx4~combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mhc2z4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wmc2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhc2z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X77wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X77wx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|X77wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .lut_mask = 64'hC800C80000000000;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Una2z4~0 (
+// Location: LABCELL_X37_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kgc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Una2z4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & (\soc_inst|m0_1|u_logic|Ucqvx4~combout  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Kgc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Una2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Una2z4~0 .lut_mask = 64'h0000000005000500;
-defparam \soc_inst|m0_1|u_logic|Una2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .lut_mask = 64'hB000BB0B00000000;
+defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~1 (
+// Location: LABCELL_X37_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C5c2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C5c2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .lut_mask = 64'hF0F0F0F000F0F0F0;
-defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .lut_mask = 64'h4050404000000000;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~0 (
+// Location: LABCELL_X33_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C5c2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C5c2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .lut_mask = 64'h5555555555550000;
-defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .lut_mask = 64'h0000000055005500;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H0zvx4~0 (
+// Location: LABCELL_X35_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H0zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|X77wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z6c2z4~0 (
+// Location: LABCELL_X37_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mac2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z6c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y6t2z4~q  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Mac2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mac2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .lut_mask = 64'h0010000000000000;
+defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~2 (
+// Location: LABCELL_X36_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C5c2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Z6c2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|C5c2z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Z6c2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C5c2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ) # ((\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mac2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kgc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
+// ((!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout  & !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mac2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
+// ((!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout  & !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C5c2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dcrwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mac2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C5c2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .lut_mask = 64'h888C888CCCCCCCCC;
-defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .lut_mask = 64'hFFC0554000000000;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdh2z4~0 (
+// Location: LABCELL_X35_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X77wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \soc_inst|m0_1|u_logic|X77wx4~combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X77wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X77wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|X77wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~0 (
+// Location: FF_X25_Y20_N13
+dffeas \soc_inst|m0_1|u_logic|G0w2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G0w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G0w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nxqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|Kzxvx4~combout )) # (\soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Nxqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .lut_mask = 64'h0055005533773377;
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .lut_mask = 64'hFFFFFFFF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~1 (
+// Location: MLABCELL_X39_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppsvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ppsvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (!\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ppsvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Qp3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .lut_mask = 64'hF0F0F0F0E0E0E0E0;
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~2 (
+// Location: LABCELL_X29_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jp3wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ppsvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Amjwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|C5c2z4~2_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Jp3wx4~combout  = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C5c2z4~2_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ppsvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .lut_mask = 64'h0000000000008080;
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jp3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jp3wx4 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Jp3wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4 (
+// Location: LABCELL_X35_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9pvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppsvx4~combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|I1c2z4~combout  & ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|I1c2z4~combout  & 
-// \soc_inst|m0_1|u_logic|Jyb2z4~2_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|M9pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|I1c2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppsvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppsvx4 .lut_mask = 64'h00000000CCFCC0F0;
-defparam \soc_inst|m0_1|u_logic|Ppsvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .lut_mask = 64'hAFAFAFAFFFAFFFAF;
+defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~0 (
+// Location: MLABCELL_X21_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Howvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S6ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ppsvx4~combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ppsvx4~combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Howvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S6ovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .lut_mask = 64'h00000000FF00AA00;
-defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Howvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Howvx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Howvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhxvx4 (
+// Location: LABCELL_X33_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xkfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xhxvx4~combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Xkfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .lut_mask = 64'h5500550000000000;
+defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y8pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhxvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhxvx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Xhxvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .lut_mask = 64'hFAFAFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X5gwx4~0 (
+// Location: MLABCELL_X21_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S5pvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X5gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|S5pvx4~combout  = ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S5pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S5pvx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|S5pvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y8_N41
-dffeas \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE (
+// Location: FF_X36_Y15_N2
+dffeas \soc_inst|m0_1|u_logic|Hxx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Hxx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hxx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hxx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~0 (
+// Location: LABCELL_X36_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yghvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D4mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|X5gwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Yghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( \soc_inst|m0_1|u_logic|Tyx2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( 
+// (!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Tyx2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( ((!\soc_inst|m0_1|u_logic|S5pvx4~combout  & 
+// \soc_inst|interconnect_1|HREADY~0_combout )) # (\soc_inst|m0_1|u_logic|Tyx2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Tyx2z4~q ))) # (\soc_inst|interconnect_1|HREADY~0_combout  & (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D4mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .lut_mask = 64'h0ACE0ACE00CC00CC;
-defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .lut_mask = 64'h2E2E2F2F0C0C0F0F;
+defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4pvx4~0 (
+// Location: FF_X35_Y14_N46
+dffeas \soc_inst|m0_1|u_logic|Tyx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tyx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tyx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ibrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J4pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ibrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tyx2z4~q  & (!\soc_inst|m0_1|u_logic|Hxx2z4~q  & ((\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # (\soc_inst|m0_1|u_logic|M9pvx4~0_combout )))) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # ((\soc_inst|m0_1|u_logic|Tyx2z4~q  & !\soc_inst|m0_1|u_logic|Hxx2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J4pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .lut_mask = 64'hFF33551150105010;
-defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .lut_mask = 64'hF5F0F5F015001500;
+defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4pvx4~1 (
+// Location: FF_X36_Y15_N1
+dffeas \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J4pvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|J4pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout  & !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|B8c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|J4pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J4pvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .lut_mask = 64'h8888000000000000;
-defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X4pvx4 (
+// Location: LABCELL_X18_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H4nwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X4pvx4~combout  = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|H4nwx4~combout  = ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|H4nwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X4pvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X4pvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|X4pvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H4nwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H4nwx4 .lut_mask = 64'hCCCCCCCC00000000;
+defparam \soc_inst|m0_1|u_logic|H4nwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z1ewx4~0 (
+// Location: FF_X37_Y16_N37
+dffeas \soc_inst|m0_1|u_logic|Y9t2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y9t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y9t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|F5mvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y9t2z4~q  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .lut_mask = 64'h0C0C0C0C00000000;
+defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahwvx4~0 (
+// Location: MLABCELL_X34_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Egkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Egkwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2yvx4 (
+// Location: LABCELL_X33_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C2yvx4~combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|O9qvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Emi2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C2yvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C2yvx4 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|C2yvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohwvx4 (
+// Location: LABCELL_X30_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sy2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ohwvx4~combout  = ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohwvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ohwvx4 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Ohwvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z3yvx4 (
+// Location: MLABCELL_X34_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O76wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z3yvx4~combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|U2x2z4~q  $ (!\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|O76wx4~combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|O76wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z3yvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z3yvx4 .lut_mask = 64'h0000000006060C0C;
-defparam \soc_inst|m0_1|u_logic|Z3yvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O76wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O76wx4 .lut_mask = 64'h5000500000000000;
+defparam \soc_inst|m0_1|u_logic|O76wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ukpvx4 (
+// Location: LABCELL_X31_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A76wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ukpvx4~combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|A76wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ukpvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ukpvx4 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Ukpvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A76wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A76wx4~0 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|A76wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmpvx4~0 (
+// Location: LABCELL_X37_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W46wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Z3yvx4~combout  & ((!\soc_inst|m0_1|u_logic|Xhxvx4~combout ) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( !\soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout  
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( !\soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|W46wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|A76wx4~0_combout  & ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|A76wx4~0_combout  & ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|A76wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & \soc_inst|m0_1|u_logic|O76wx4~combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W46wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .lut_mask = 64'hCCCCCCCCCCCCCC0C;
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W46wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W46wx4~0 .lut_mask = 64'h0011000055555555;
+defparam \soc_inst|m0_1|u_logic|W46wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rngwx4 (
+// Location: LABCELL_X33_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G36wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rngwx4~combout  = (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )
+// \soc_inst|m0_1|u_logic|G36wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|G36wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rngwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rngwx4 .lut_mask = 64'hFF0FFF0FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Rngwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G36wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G36wx4~0 .lut_mask = 64'h000C000C00CC00CC;
+defparam \soc_inst|m0_1|u_logic|G36wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmpvx4~1 (
+// Location: FF_X31_Y17_N25
+dffeas \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N6
+cyclonev_lcell_comb \soc_inst|ram_1|write_cycle~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ohwvx4~combout  & (\soc_inst|m0_1|u_logic|Rmpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (\soc_inst|m0_1|u_logic|Rmpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout ))) ) )
+// \soc_inst|ram_1|write_cycle~0_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rmpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+	.combout(\soc_inst|ram_1|write_cycle~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .lut_mask = 64'h0C0F0C0F080A080A;
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|write_cycle~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|write_cycle~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|ram_1|write_cycle~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvewx4~0 (
+// Location: FF_X29_Y13_N7
+dffeas \soc_inst|ram_1|write_cycle~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|write_cycle~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|write_cycle~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|write_cycle~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdh2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wvewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) 
+// # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .lut_mask = 64'h33033303F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5fwx4~0 (
+// Location: MLABCELL_X28_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5vvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H5fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|J5vvx4~combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J5vvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J5vvx4 .lut_mask = 64'h5555555500000000;
+defparam \soc_inst|m0_1|u_logic|J5vvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icyvx4~0 (
+// Location: FF_X36_Y14_N25
+dffeas \soc_inst|m0_1|u_logic|S4w2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S4w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S4w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I1c2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|I1c2z4~combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|G97wx4~0_combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I1c2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .lut_mask = 64'h00000000CCCCCCCC;
-defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I1c2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I1c2z4 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|I1c2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpqvx4~0 (
+// Location: LABCELL_X33_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zpqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|H5fwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wpsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Npk2z4~q ))))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .lut_mask = 64'h0000000033FF33FF;
-defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .lut_mask = 64'h0000000004150415;
+defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwqvx4~0 (
+// Location: MLABCELL_X34_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A0zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hxx2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q 
-// ) ) )
+// \soc_inst|m0_1|u_logic|A0zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .lut_mask = 64'h00000000FFF7FFF7;
-defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N45
-cyclonev_lcell_comb \soc_inst|switches_1|read_enable~0 (
+// Location: LABCELL_X35_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9yvx4 (
 // Equation(s):
-// \soc_inst|switches_1|read_enable~0_combout  = ( !\soc_inst|m0_1|u_logic|hwrite_o~0_combout  & ( \soc_inst|switches_1|half_word_address~1_combout  ) )
+// \soc_inst|m0_1|u_logic|C9yvx4~combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|switches_1|half_word_address~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|read_enable~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9yvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|read_enable~0 .extended_lut = "off";
-defparam \soc_inst|switches_1|read_enable~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|switches_1|read_enable~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X18_Y5_N46
-dffeas \soc_inst|switches_1|read_enable (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|read_enable~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|read_enable~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|read_enable .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|read_enable .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C9yvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9yvx4 .lut_mask = 64'hF000F00000000000;
+defparam \soc_inst|m0_1|u_logic|C9yvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y9_N24
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~37 (
+// Location: LABCELL_X33_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P1c2z4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[1]~37_combout  = ( !\soc_inst|interconnect_1|mux_sel [0] & ( (!\soc_inst|interconnect_1|mux_sel [1]) # (((!\soc_inst|switches_1|read_enable~q ) # ((\soc_inst|switches_1|half_word_address [0]))) # 
-// (\soc_inst|interconnect_1|mux_sel [2])) ) ) # ( \soc_inst|interconnect_1|mux_sel [0] & ( (((!\soc_inst|ram_1|read_cycle~q ) # ((!\soc_inst|ram_1|byte_select [0]))) # (\soc_inst|interconnect_1|mux_sel [2])) # (\soc_inst|interconnect_1|mux_sel [1]) ) )
+// \soc_inst|m0_1|u_logic|P1c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Emi2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C9yvx4~combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datab(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datac(!\soc_inst|ram_1|read_cycle~q ),
-	.datad(!\soc_inst|ram_1|byte_select [0]),
-	.datae(!\soc_inst|interconnect_1|mux_sel [0]),
-	.dataf(!\soc_inst|switches_1|half_word_address [0]),
-	.datag(!\soc_inst|switches_1|read_enable~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P1c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[1]~37 .extended_lut = "on";
-defparam \soc_inst|interconnect_1|HRDATA[1]~37 .lut_mask = 64'hFBFBFFF7FFFFFFF7;
-defparam \soc_inst|interconnect_1|HRDATA[1]~37 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .lut_mask = 64'h0000000011111B1B;
+defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~2 (
+// Location: LABCELL_X31_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Evcwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Evcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|H4ovx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xhiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .lut_mask = 64'h8000800000000000;
-defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa7wx4~0 (
+// Location: LABCELL_X31_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G0c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|G0c2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(gnd),
 	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G0c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .lut_mask = 64'hC5C5C0C005050000;
-defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .lut_mask = 64'h00A000A000000000;
+defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~2 (
+// Location: LABCELL_X35_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z7fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G97wx4~2_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G97wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G97wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G97wx4~2 .lut_mask = 64'h0030003000FF00FF;
-defparam \soc_inst|m0_1|u_logic|G97wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~0 (
+// Location: LABCELL_X31_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Donvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jyb2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G0c2z4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G0c2z4~0_combout  & (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G0c2z4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G0c2z4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G0c2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Donvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Donvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Donvx4~0 .lut_mask = 64'h8C8CCCCC8C04CC44;
-defparam \soc_inst|m0_1|u_logic|Donvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .lut_mask = 64'hAAAAAAAA0022AAAA;
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~1 (
+// Location: LABCELL_X31_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Donvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jyb2z4~1_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jyb2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jyb2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xhiwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jyb2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Donvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Donvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Donvx4~1 .lut_mask = 64'h0010445400004444;
-defparam \soc_inst|m0_1|u_logic|Donvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .lut_mask = 64'h00000000F0F0B0B0;
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~1 (
+// Location: MLABCELL_X25_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6nwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G97wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|E6nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G97wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G97wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G97wx4~1 .lut_mask = 64'h3333333333033333;
-defparam \soc_inst|m0_1|u_logic|G97wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .lut_mask = 64'h3030303033333030;
+defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~2 (
+// Location: LABCELL_X19_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8rwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Donvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Donvx4~1_combout  & ( \soc_inst|m0_1|u_logic|G97wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout  & \soc_inst|m0_1|u_logic|Donvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Donvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|G97wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|G97wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|G97wx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Donvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Q8rwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # 
+// (((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G97wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Donvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Donvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Donvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Donvx4~2 .lut_mask = 64'h0040000000CC0000;
-defparam \soc_inst|m0_1|u_logic|Donvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .lut_mask = 64'hFBFFFBAA00000000;
+defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3iwx4~0 (
+// Location: LABCELL_X30_Y16_N30
+cyclonev_lcell_comb \soc_inst|interconnect_1|mux_sel[2]~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J3iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) )
+// \soc_inst|interconnect_1|mux_sel[2]~feeder_combout  = ( \soc_inst|interconnect_1|LessThan1~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|interconnect_1|LessThan1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|mux_sel[2]~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .lut_mask = 64'hCC00CC0000880088;
-defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|mux_sel[2]~feeder .extended_lut = "off";
+defparam \soc_inst|interconnect_1|mux_sel[2]~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|interconnect_1|mux_sel[2]~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X19_Y6_N22
-dffeas \soc_inst|ram_1|saved_word_address[0] (
+// Location: FF_X30_Y16_N32
+dffeas \soc_inst|interconnect_1|mux_sel[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.d(\soc_inst|interconnect_1|mux_sel[2]~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [0]),
+	.q(\soc_inst|interconnect_1|mux_sel [2]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[0] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[0] .power_up = "low";
+defparam \soc_inst|interconnect_1|mux_sel[2] .is_wysiwyg = "true";
+defparam \soc_inst|interconnect_1|mux_sel[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N3
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[0]~0 (
+// Location: MLABCELL_X25_Y15_N21
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[25]~1 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[0]~0_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|Fvovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [0])) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [0] ) )
+// \soc_inst|interconnect_1|HRDATA[25]~1_combout  = ( \soc_inst|interconnect_1|mux_sel [2] & ( (!\soc_inst|interconnect_1|mux_sel [1] & !\soc_inst|interconnect_1|mux_sel [0]) ) ) # ( !\soc_inst|interconnect_1|mux_sel [2] & ( !\soc_inst|interconnect_1|mux_sel 
+// [1] $ (!\soc_inst|interconnect_1|mux_sel [0]) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(!\soc_inst|ram_1|saved_word_address [0]),
-	.datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[0]~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .lut_mask = 64'h333333331B1B1B1B;
-defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[25]~1 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[25]~1 .lut_mask = 64'h0FF00FF0F000F000;
+defparam \soc_inst|interconnect_1|HRDATA[25]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bnnvx4 (
+// Location: LABCELL_X29_Y16_N15
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bnnvx4~combout  = ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|J4x2z4~q )) # (\soc_inst|m0_1|u_logic|Hxx2z4~q )) 
-// # (\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|J4x2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Hxx2z4~q )) # (\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|J4x2z4~q 
-// )) # (\soc_inst|m0_1|u_logic|Hxx2z4~q )) # (\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) )
+// \soc_inst|switches_1|half_word_address~0_combout  = (\soc_inst|m0_1|u_logic|T50wx4~0_combout  & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & !\soc_inst|m0_1|u_logic|It52z4~2_combout ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bnnvx4~combout ),
+	.combout(\soc_inst|switches_1|half_word_address~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bnnvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bnnvx4 .lut_mask = 64'hFFFFF77FF77FF77F;
-defparam \soc_inst|m0_1|u_logic|Bnnvx4 .shared_arith = "off";
+defparam \soc_inst|switches_1|half_word_address~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~0 .lut_mask = 64'h0500050005000500;
+defparam \soc_inst|switches_1|half_word_address~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y9_N38
-dffeas \soc_inst|m0_1|u_logic|Viy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Viy2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z1ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Viy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Viy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vapvx4 (
+// Location: MLABCELL_X34_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vapvx4~combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vaw2z4~q  & (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fcj2z4~q )))) ) 
-// )
+// \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vapvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vapvx4 .lut_mask = 64'h0000000001110111;
-defparam \soc_inst|m0_1|u_logic|Vapvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .lut_mask = 64'hF000F000F000F000;
+defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: IOIBUF_X18_Y0_N75
-cyclonev_io_ibuf \SW[2]~input (
-	.i(SW[2]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[2]~input_o ));
+// Location: MLABCELL_X39_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rfpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \SW[2]~input .bus_hold = "false";
-defparam \SW[2]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .lut_mask = 64'h88008800A820A820;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y9_N27
-cyclonev_lcell_comb \soc_inst|switches_1|switch_store[0][2]~feeder (
+// Location: LABCELL_X37_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X4pvx4 (
 // Equation(s):
-// \soc_inst|switches_1|switch_store[0][2]~feeder_combout  = ( \SW[2]~input_o  )
+// \soc_inst|m0_1|u_logic|X4pvx4~combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
 	.datae(gnd),
-	.dataf(!\SW[2]~input_o ),
+	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|switch_store[0][2]~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X4pvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][2]~feeder .extended_lut = "off";
-defparam \soc_inst|switches_1|switch_store[0][2]~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|switches_1|switch_store[0][2]~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X4pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X4pvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|X4pvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: IOIBUF_X14_Y0_N35
-cyclonev_io_ibuf \KEY[0]~input (
-	.i(KEY[0]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\KEY[0]~input_o ));
+// Location: LABCELL_X36_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J4pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|J4pvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \KEY[0]~input .bus_hold = "false";
-defparam \KEY[0]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .lut_mask = 64'hC0FFC0F040554050;
+defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N6
-cyclonev_lcell_comb \soc_inst|switches_1|last_buttons[0]~1 (
+// Location: MLABCELL_X34_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4pvx4~1 (
 // Equation(s):
-// \soc_inst|switches_1|last_buttons[0]~1_combout  = !\KEY[0]~input_o 
+// \soc_inst|m0_1|u_logic|J4pvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|J4pvx4~0_combout  & !\soc_inst|m0_1|u_logic|S5pvx4~combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\KEY[0]~input_o ),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|J4pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|last_buttons[0]~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J4pvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|last_buttons[0]~1 .extended_lut = "off";
-defparam \soc_inst|switches_1|last_buttons[0]~1 .lut_mask = 64'hCCCCCCCCCCCCCCCC;
-defparam \soc_inst|switches_1|last_buttons[0]~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .lut_mask = 64'h8080808000000000;
+defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y11_N8
-dffeas \soc_inst|switches_1|last_buttons[0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|last_buttons[0]~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|last_buttons [0]),
-	.prn(vcc));
+// Location: LABCELL_X33_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dfd2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dfd2z4~combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pcyvx4~combout  )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Dfd2z4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|last_buttons[0] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|last_buttons[0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dfd2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dfd2z4 .lut_mask = 64'hFFFFFFFFFCFFFCFF;
+defparam \soc_inst|m0_1|u_logic|Dfd2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N9
-cyclonev_lcell_comb \soc_inst|switches_1|always0~1 (
+// Location: LABCELL_X33_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa7wx4~0 (
 // Equation(s):
-// \soc_inst|switches_1|always0~1_combout  = ( !\soc_inst|switches_1|last_buttons [0] & ( !\KEY[0]~input_o  ) )
+// \soc_inst|m0_1|u_logic|Wa7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
-	.datab(!\KEY[0]~input_o ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|switches_1|last_buttons [0]),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|always0~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|always0~1 .extended_lut = "off";
-defparam \soc_inst|switches_1|always0~1 .lut_mask = 64'hCCCCCCCC00000000;
-defparam \soc_inst|switches_1|always0~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .lut_mask = 64'hAA00AA000C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y9_N29
-dffeas \soc_inst|switches_1|switch_store[0][2] (
+// Location: FF_X34_Y13_N50
+dffeas \soc_inst|m0_1|u_logic|Pdi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|switch_store[0][2]~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][2]~q ),
+	.q(\soc_inst|m0_1|u_logic|Pdi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][2] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][2] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pdi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pdi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpzvx4~1 (
+// Location: MLABCELL_X34_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eyhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bpzvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Eyhvx4~0_combout  = ( !\soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .lut_mask = 64'h000000000F0F0000;
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hsize_o~0 (
+// Location: MLABCELL_X34_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ffxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hsize_o~0_combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|It52z4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ffxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~q  & (\soc_inst|m0_1|u_logic|C9yvx4~combout  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hsize_o~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hsize_o~0 .lut_mask = 64'h0F000F00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|hsize_o~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y5_N42
-cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~0 (
+// Location: LABCELL_X30_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfovx4 (
 // Equation(s):
-// \soc_inst|switches_1|half_word_address~0_combout  = ( !\soc_inst|m0_1|u_logic|It52z4~2_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Wfovx4~combout  = (\soc_inst|m0_1|u_logic|Jhy2z4~q  & \soc_inst|m0_1|u_logic|Scpvx4~2_combout )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|half_word_address~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address~0 .extended_lut = "off";
-defparam \soc_inst|switches_1|half_word_address~0 .lut_mask = 64'h0000000000FF0000;
-defparam \soc_inst|switches_1|half_word_address~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wfovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfovx4 .lut_mask = 64'h0303030303030303;
+defparam \soc_inst|m0_1|u_logic|Wfovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y5_N33
-cyclonev_lcell_comb \soc_inst|ram_1|byte2~0 (
+// Location: LABCELL_X30_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Slnvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|byte2~0_combout  = ( \soc_inst|m0_1|u_logic|hsize_o~0_combout  & ( \soc_inst|switches_1|half_word_address~0_combout  & ( (!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Qr42z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|hsize_o~0_combout  & ( \soc_inst|switches_1|half_word_address~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|hsize_o~0_combout  & ( !\soc_inst|switches_1|half_word_address~0_combout  
-// ) )
+// \soc_inst|m0_1|u_logic|Slnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
-	.dataf(!\soc_inst|switches_1|half_word_address~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|byte2~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Slnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte2~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|byte2~0 .lut_mask = 64'hFFFF0000FFFFF2F2;
-defparam \soc_inst|ram_1|byte2~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X23_Y5_N34
-dffeas \soc_inst|ram_1|byte_select[2] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte2~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select [2]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[2] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[2] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .lut_mask = 64'h00000F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N15
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[20]~7 (
+// Location: LABCELL_X33_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xnrvx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[20]~7_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~6_combout  & ( ((\soc_inst|ram_1|read_cycle~q  & (\soc_inst|ram_1|byte_select [2] & \soc_inst|interconnect_1|mux_sel [0]))) # (\soc_inst|interconnect_1|mux_sel [1]) ) )
+// \soc_inst|m0_1|u_logic|Xnrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bpsvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & !\soc_inst|m0_1|u_logic|Tyx2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|read_cycle~q ),
-	.datab(!\soc_inst|ram_1|byte_select [2]),
-	.datac(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[20]~7 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[20]~7 .lut_mask = 64'h000000000F1F0F1F;
-defparam \soc_inst|interconnect_1|HRDATA[20]~7 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: IOIBUF_X16_Y0_N18
-cyclonev_io_ibuf \SW[5]~input (
-	.i(SW[5]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[5]~input_o ));
-// synopsys translate_off
-defparam \SW[5]~input .bus_hold = "false";
-defparam \SW[5]~input .simulate_z_as = "z";
-// synopsys translate_on
-
-// Location: IOIBUF_X18_Y0_N92
-cyclonev_io_ibuf \KEY[1]~input (
-	.i(KEY[1]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\KEY[1]~input_o ));
-// synopsys translate_off
-defparam \KEY[1]~input .bus_hold = "false";
-defparam \KEY[1]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .lut_mask = 64'h0000505000000000;
+defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N27
-cyclonev_lcell_comb \soc_inst|switches_1|last_buttons[1]~0 (
+// Location: LABCELL_X31_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Edovx4 (
 // Equation(s):
-// \soc_inst|switches_1|last_buttons[1]~0_combout  = !\KEY[1]~input_o 
+// \soc_inst|m0_1|u_logic|Edovx4~combout  = ( \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Abovx4~0_combout ) # (((\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & \soc_inst|m0_1|u_logic|Xnrvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
-	.datab(!\KEY[1]~input_o ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|last_buttons[1]~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Edovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|last_buttons[1]~0 .extended_lut = "off";
-defparam \soc_inst|switches_1|last_buttons[1]~0 .lut_mask = 64'hCCCCCCCCCCCCCCCC;
-defparam \soc_inst|switches_1|last_buttons[1]~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Edovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Edovx4 .lut_mask = 64'hBBBFBBBFBBBBBBBB;
+defparam \soc_inst|m0_1|u_logic|Edovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y11_N29
-dffeas \soc_inst|switches_1|last_buttons[1] (
+// Location: FF_X30_Y20_N34
+dffeas \soc_inst|m0_1|u_logic|T1y2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|last_buttons[1]~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Slnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Edovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|last_buttons [1]),
+	.q(\soc_inst|m0_1|u_logic|T1y2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|last_buttons[1] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|last_buttons[1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T1y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T1y2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N24
-cyclonev_lcell_comb \soc_inst|switches_1|always0~0 (
+// Location: FF_X30_Y20_N52
+dffeas \soc_inst|m0_1|u_logic|Jcw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jcw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jcw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jcw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Llnvx4~0 (
 // Equation(s):
-// \soc_inst|switches_1|always0~0_combout  = (!\KEY[1]~input_o  & !\soc_inst|switches_1|last_buttons [1])
+// \soc_inst|m0_1|u_logic|Llnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qdj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qdj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Vaw2z4~q  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Jcw2z4~q )))) # (\soc_inst|m0_1|u_logic|Vaw2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qdj2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qdj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Vaw2z4~q 
+//  & (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jcw2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Llnvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .lut_mask = 64'h008A00CFCF8ACFCF;
+defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Llnvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Llnvx4~combout  = ( \soc_inst|m0_1|u_logic|Llnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|T1y2z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(!\KEY[1]~input_o ),
-	.datac(!\soc_inst|switches_1|last_buttons [1]),
-	.datad(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T1y2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Llnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|always0~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|always0~0 .extended_lut = "off";
-defparam \soc_inst|switches_1|always0~0 .lut_mask = 64'hC0C0C0C0C0C0C0C0;
-defparam \soc_inst|switches_1|always0~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Llnvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Llnvx4 .lut_mask = 64'h00000000F0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Llnvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y10_N50
-dffeas \soc_inst|switches_1|switch_store[1][5] (
+// Location: FF_X35_Y13_N59
+dffeas \soc_inst|m0_1|u_logic|Qdj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[5]~input_o ),
+	.d(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][5]~q ),
+	.q(\soc_inst|m0_1|u_logic|Qdj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][5] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][5] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qdj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qdj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W28wx4~0 (
+// Location: MLABCELL_X39_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wxcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W28wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Swy2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  )
+// \soc_inst|m0_1|u_logic|Wxcwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W28wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W28wx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|W28wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Egkwx4~0 (
+// Location: LABCELL_X37_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Egkwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Sknwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~3 (
+// Location: LABCELL_X31_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kswwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Kswwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .lut_mask = 64'h0000000000003030;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kswwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .lut_mask = 64'h000A000AAAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .lut_mask = 64'h0000000003030303;
+defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp3wx4~0 (
+// Location: LABCELL_X35_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rngwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qp3wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Rngwx4~combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rngwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rngwx4 .lut_mask = 64'hCCCCCCCCFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Rngwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jp3wx4 (
+// Location: LABCELL_X35_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jbhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jp3wx4~combout  = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Jbhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (\soc_inst|m0_1|u_logic|C9yvx4~combout  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jp3wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jp3wx4 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Jp3wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xiwvx4~0 (
+// Location: LABCELL_X31_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ry5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xiwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Ry5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Csewx4~0 (
+// Location: LABCELL_X31_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Csewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  ) )
+// \soc_inst|m0_1|u_logic|hprot_o~0_combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Csewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Csewx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Csewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~0 .lut_mask = 64'hA200A200F300F300;
+defparam \soc_inst|m0_1|u_logic|hprot_o~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V1yvx4~0 (
+// Location: LABCELL_X35_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V1yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) )
+// \soc_inst|m0_1|u_logic|hprot_o~1_combout  = ( \soc_inst|m0_1|u_logic|hprot_o~0_combout  & ( (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~1 .lut_mask = 64'h00000000FF0AFF0A;
+defparam \soc_inst|m0_1|u_logic|hprot_o~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5vvx4 (
+// Location: LABCELL_X35_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T1xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J5vvx4~combout  = (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|interconnect_1|HREADY~0_combout )
+// \soc_inst|m0_1|u_logic|T1xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5vvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J5vvx4 .lut_mask = 64'h00F000F000F000F0;
-defparam \soc_inst|m0_1|u_logic|J5vvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X21_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5qvx4 (
+// Location: LABCELL_X35_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Na6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U5qvx4~combout  = ( !\soc_inst|m0_1|u_logic|hprot_o~5_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Na6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|T1xvx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5qvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U5qvx4 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|U5qvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W0pvx4 (
+// Location: MLABCELL_X34_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wdxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W0pvx4~combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.dataf(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W0pvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W0pvx4 .lut_mask = 64'h0000555500005555;
-defparam \soc_inst|m0_1|u_logic|W0pvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~2 (
+// Location: MLABCELL_X34_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yy5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xwawx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Yy5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O76wx4~combout  & ( (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwawx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .lut_mask = 64'h002200000CFF0CFF;
-defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~1 (
+// Location: LABCELL_X35_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qx52z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xwawx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (((\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q  & (((\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (((\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  & (((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qx52z4~0_combout  = ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Rexvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qx52z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .lut_mask = 64'h5F1155001F110000;
-defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~3 (
+// Location: LABCELL_X35_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xwawx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( ((\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  $ (((!\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|hprot_o~4_combout  = ( !\soc_inst|m0_1|u_logic|Qx52z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qx52z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwawx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .lut_mask = 64'hAF6F0F4F00000000;
-defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~4 .lut_mask = 64'hF500F50000000000;
+defparam \soc_inst|m0_1|u_logic|hprot_o~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~0 (
+// Location: LABCELL_X35_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xwawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xwawx4~3_combout  & ( (((\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Xwawx4~2_combout )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xwawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xwawx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (((\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Xwawx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (((\soc_inst|m0_1|u_logic|Xwawx4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|hprot_o~2_combout  = ( !\soc_inst|m0_1|u_logic|A76wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # ((!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q 
+// )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xwawx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xwawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwawx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .lut_mask = 64'h00000000307F3F7F;
-defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~2 .lut_mask = 64'hF0B0F0B000000000;
+defparam \soc_inst|m0_1|u_logic|hprot_o~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtrwx4~0 (
+// Location: LABCELL_X35_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sy52z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|E4xvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cyq2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Sy52z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sy52z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .lut_mask = 64'h0000000000C000C0;
+defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dplwx4~0 (
+// Location: LABCELL_X35_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dplwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|hprot_o~3_combout  = ( !\soc_inst|m0_1|u_logic|Sy52z4~0_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~2_combout  & (((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Kzxvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Y6t2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|hprot_o~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy52z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .lut_mask = 64'h40C8404040404040;
-defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~3 .lut_mask = 64'h00FD00FD00000000;
+defparam \soc_inst|m0_1|u_logic|hprot_o~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cllwx4~0 (
+// Location: LABCELL_X35_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cllwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dplwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C9yvx4~combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Dplwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|hprot_o~5_combout  = ( \soc_inst|m0_1|u_logic|hprot_o~3_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~1_combout  & (\soc_inst|m0_1|u_logic|hprot_o~4_combout  & ((!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|O9qvx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|hprot_o~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|hprot_o~4_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .lut_mask = 64'hA0A0A0A0F030F030;
-defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~5 .lut_mask = 64'h0000000000320032;
+defparam \soc_inst|m0_1|u_logic|hprot_o~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qsewx4~0 (
+// Location: LABCELL_X36_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5qvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qsewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|U5qvx4~combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( !\soc_inst|m0_1|u_logic|hprot_o~5_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U5qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U5qvx4 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|U5qvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P7wvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P7wvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & \soc_inst|m0_1|u_logic|Wvewx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y13_N47
+dffeas \soc_inst|m0_1|u_logic|Wxp2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .lut_mask = 64'h0033003300000000;
-defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wxp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wxp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qslwx4~0 (
+// Location: LABCELL_X40_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W28wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qslwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|W28wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .lut_mask = 64'hFFF0FFF000000000;
-defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W28wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W28wx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|W28wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyrwx4~0 (
+// Location: LABCELL_X33_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1pvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fyrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Z3yvx4~combout  & ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Howvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z3yvx4~combout  & ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|R1pvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout )))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~q ) # (\soc_inst|m0_1|u_logic|W28wx4~0_combout ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fyrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .lut_mask = 64'h80C080C0A0F0A0F0;
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .lut_mask = 64'h000C00FF000C00AF;
+defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyrwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( (\soc_inst|m0_1|u_logic|Fyrwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|U2x2z4~q )))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( \soc_inst|m0_1|u_logic|Fyrwx4~0_combout  ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fyrwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X35_Y12_N49
+dffeas \soc_inst|m0_1|u_logic|Jux2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jux2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .lut_mask = 64'h5555555544454445;
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jux2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jux2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Surwx4~0 (
+// Location: LABCELL_X36_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kryvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Surwx4~0_combout  = (\soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & !\soc_inst|m0_1|u_logic|Ohwvx4~combout )
+// \soc_inst|m0_1|u_logic|Kryvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout )) # (\soc_inst|m0_1|u_logic|A4c2z4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Surwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Surwx4~0 .lut_mask = 64'h0F000F000F000F00;
-defparam \soc_inst|m0_1|u_logic|Surwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .lut_mask = 64'h000F000F555F000F;
+defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dghvx4~0 (
+// Location: MLABCELL_X39_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0qvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Surwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qslwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Surwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qslwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|K0qvx4~combout  = ( \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dghvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K0qvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .lut_mask = 64'hFFA0FFA0A0A0A0A0;
-defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K0qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K0qvx4 .lut_mask = 64'hFFFFFFFFFFCCFFCC;
+defparam \soc_inst|m0_1|u_logic|K0qvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvrwx4~0 (
+// Location: MLABCELL_X39_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Shyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gvrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((\soc_inst|m0_1|u_logic|Aok2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .lut_mask = 64'h222A222AAAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .shared_arith = "off";
-// synopsys translate_on
+// \soc_inst|m0_1|u_logic|Shyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout )) ) ) )
 
-// Location: FF_X27_Y14_N37
-dffeas \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .lut_mask = 64'h000C0000CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0pvx4~0 (
+// Location: MLABCELL_X39_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Kzxvx4~combout  & \soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
+// \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnkvx4~0 (
+// Location: MLABCELL_X39_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ez8wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qnkvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & !\soc_inst|m0_1|u_logic|Efp2z4~q )) # (\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & !\soc_inst|m0_1|u_logic|Efp2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X77wx4~combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Efp2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qnkvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .lut_mask = 64'hAA00AA00AF0FAF0F;
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .lut_mask = 64'h0000000050500000;
+defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnkvx4~1 (
+// Location: MLABCELL_X39_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qnkvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Qnkvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Cax2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qnkvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Cax2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Rmawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qnkvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .lut_mask = 64'hFF0F0000AA0A0000;
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y4_N59
-dffeas \soc_inst|m0_1|u_logic|Efp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Efp2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Efp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Efp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .lut_mask = 64'h0000000000000F0F;
+defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxc2z4~0 (
+// Location: LABCELL_X35_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jucwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cxc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Jucwx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~q  & ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|A4t2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cxc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .lut_mask = 64'h0020002000000000;
-defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .lut_mask = 64'h000000FF000C00FF;
+defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kuc2z4~0 (
+// Location: LABCELL_X35_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Otcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kuc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Otcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kuc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Otcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .lut_mask = 64'h000C000CCC0CCC0C;
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .lut_mask = 64'h00CC00CC03030303;
+defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vwc2z4~0 (
+// Location: LABCELL_X35_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vwc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Fuawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Otcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jucwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Otcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .lut_mask = 64'hF000F00030003000;
-defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .lut_mask = 64'hF0D0F0D000000000;
+defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Awc2z4~0 (
+// Location: LABCELL_X30_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Awc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  
-// & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Fuawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Awc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .lut_mask = 64'hFF00FF003F003F00;
-defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .lut_mask = 64'hF0F00000FAFAAAAA;
+defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Awc2z4~1 (
+// Location: LABCELL_X35_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H4ovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Awc2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|H4ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Awc2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .lut_mask = 64'hD0C0D0C0C0C0C0C0;
-defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .lut_mask = 64'h0000000003000300;
+defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N36
-cyclonev_lcell_comb \soc_inst|switches_1|DataValid~1 (
+// Location: LABCELL_X35_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~0 (
 // Equation(s):
-// \soc_inst|switches_1|DataValid~1_combout  = ( \soc_inst|switches_1|DataValid [0] & ( \KEY[0]~input_o  & ( (!\soc_inst|switches_1|read_enable~q ) # ((\soc_inst|switches_1|half_word_address [1]) # (\soc_inst|switches_1|half_word_address [0])) ) ) ) # ( 
-// \soc_inst|switches_1|DataValid [0] & ( !\KEY[0]~input_o  & ( (!\soc_inst|switches_1|read_enable~q ) # ((!\soc_inst|switches_1|last_buttons [0]) # ((\soc_inst|switches_1|half_word_address [1]) # (\soc_inst|switches_1|half_word_address [0]))) ) ) ) # ( 
-// !\soc_inst|switches_1|DataValid [0] & ( !\KEY[0]~input_o  & ( !\soc_inst|switches_1|last_buttons [0] ) ) )
+// \soc_inst|m0_1|u_logic|Evcwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|switches_1|read_enable~q ),
-	.datab(!\soc_inst|switches_1|last_buttons [0]),
-	.datac(!\soc_inst|switches_1|half_word_address [0]),
-	.datad(!\soc_inst|switches_1|half_word_address [1]),
-	.datae(!\soc_inst|switches_1|DataValid [0]),
-	.dataf(!\KEY[0]~input_o ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|DataValid~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|DataValid~1 .extended_lut = "off";
-defparam \soc_inst|switches_1|DataValid~1 .lut_mask = 64'hCCCCEFFF0000AFFF;
-defparam \soc_inst|switches_1|DataValid~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X22_Y11_N37
-dffeas \soc_inst|switches_1|DataValid[0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|DataValid~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|DataValid [0]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|DataValid[0] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|DataValid[0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .lut_mask = 64'h00A000A000000000;
+defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N24
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~20 (
+// Location: LABCELL_X35_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzcwx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[1]~20_combout  = ( !\soc_inst|interconnect_1|HRDATA[1]~37_combout  & ( \soc_inst|interconnect_1|Equal1~0_combout  & ( !\soc_inst|switches_1|half_word_address [1] ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[1]~37_combout  & ( 
-// !\soc_inst|interconnect_1|Equal1~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Fzcwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|switches_1|half_word_address [1]),
-	.datac(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
-	.dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[1]~20 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[1]~20 .lut_mask = 64'hFFFF0000CCCC0000;
-defparam \soc_inst|interconnect_1|HRDATA[1]~20 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: IOIBUF_X26_Y0_N41
-cyclonev_io_ibuf \SW[0]~input (
-	.i(SW[0]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[0]~input_o ));
-// synopsys translate_off
-defparam \SW[0]~input .bus_hold = "false";
-defparam \SW[0]~input .simulate_z_as = "z";
-// synopsys translate_on
-
-// Location: FF_X24_Y5_N2
-dffeas \soc_inst|switches_1|switch_store[0][0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[0]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][0]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][0] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .lut_mask = 64'h0000000003030000;
+defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: IOIBUF_X24_Y0_N35
-cyclonev_io_ibuf \SW[3]~input (
-	.i(SW[3]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[3]~input_o ));
-// synopsys translate_off
-defparam \SW[3]~input .bus_hold = "false";
-defparam \SW[3]~input .simulate_z_as = "z";
-// synopsys translate_on
+// Location: LABCELL_X35_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T3ovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T3ovx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
 
-// Location: FF_X29_Y9_N20
-dffeas \soc_inst|switches_1|switch_store[1][3] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[3]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][3]~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][3] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][3] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .lut_mask = 64'h3030000075300000;
+defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~1 (
+// Location: LABCELL_X35_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gzvvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jp3wx4~combout  & ( ((\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Jp3wx4~combout  & ( (\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Evcwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .lut_mask = 64'h330033003F0F3F0F;
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .lut_mask = 64'h0000505050500003;
+defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~0 (
+// Location: LABCELL_X35_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzawx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gzvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Wzawx4~combout  = ( \soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|H4ovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Evcwx4~0_combout  & !\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .lut_mask = 64'h11A011A000ECC0A0;
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wzawx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzawx4 .lut_mask = 64'hD555555555555555;
+defparam \soc_inst|m0_1|u_logic|Wzawx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~2 (
+// Location: MLABCELL_X34_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mddwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Mddwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mddwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .lut_mask = 64'h50F050F0F0F050F0;
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .lut_mask = 64'h0FAF0FAF00000000;
+defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgnvx4~0 (
+// Location: MLABCELL_X34_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mddwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pgnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I793z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S4qvx4~combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I793z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|S4qvx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I793z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|I793z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Mddwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & (((\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|Ffj2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I793z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mddwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .lut_mask = 64'h5151FBFB5100FB00;
-defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y6_N44
-dffeas \soc_inst|m0_1|u_logic|I793z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I793z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I793z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I793z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .lut_mask = 64'h0011005515151555;
+defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fskvx4~0 (
+// Location: MLABCELL_X34_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kcdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fskvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U593z4~q  & ( \soc_inst|m0_1|u_logic|Hszvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U593z4~q  & ( \soc_inst|m0_1|u_logic|Hszvx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|U593z4~q  & ( !\soc_inst|m0_1|u_logic|Hszvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U593z4~q  & ( !\soc_inst|m0_1|u_logic|Hszvx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kcdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U593z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .lut_mask = 64'h5151FBFB5100FB00;
-defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y5_N13
-dffeas \soc_inst|m0_1|u_logic|U593z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U593z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U593z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U593z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .lut_mask = 64'h0ACE00CC00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ut0xx4~0 (
+// Location: MLABCELL_X34_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jfdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ut0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (((!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (((!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Jfdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .lut_mask = 64'h008800FF0A8A0A8A;
-defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .lut_mask = 64'h00000000A000A000;
+defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oi2wx4~0 (
+// Location: MLABCELL_X34_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kcdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oi2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Kcdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jfdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Jfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout )))) ) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .lut_mask = 64'h2300230001000100;
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .lut_mask = 64'hBFBA0000AAAA0000;
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr0xx4~0 (
+// Location: MLABCELL_X34_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W19wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cr0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|W19wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W19wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W19wx4~0 .lut_mask = 64'hFF00FF000F000F00;
+defparam \soc_inst|m0_1|u_logic|W19wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oi2wx4~1 (
+// Location: MLABCELL_X34_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pm9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oi2wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oi2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (!\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q 
+// )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .lut_mask = 64'h000000C000000000;
+defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A4c2z4~0 (
+// Location: MLABCELL_X34_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y29wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A4c2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Y29wx4~combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ))) 
+// ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y29wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y29wx4 .lut_mask = 64'h0000000000080008;
+defparam \soc_inst|m0_1|u_logic|Y29wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zy2wx4~0 (
+// Location: MLABCELL_X34_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ilpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zy2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (((\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & \soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|L8t2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .lut_mask = 64'h2205220522002200;
-defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq2wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jq2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|O5t2z4~q ))))) # (\soc_inst|m0_1|u_logic|Aok2z4~q 
-//  & (((\soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((\soc_inst|m0_1|u_logic|O5t2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) )
+// Location: IOIBUF_X4_Y0_N52
+cyclonev_io_ibuf \SW[3]~input (
+	.i(SW[3]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[3]~input_o ));
+// synopsys translate_off
+defparam \SW[3]~input .bus_hold = "false";
+defparam \SW[3]~input .simulate_z_as = "z";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: IOIBUF_X36_Y0_N1
+cyclonev_io_ibuf \KEY[0]~input (
+	.i(KEY[0]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\KEY[0]~input_o ));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .lut_mask = 64'hFF77F5F5F077FFFF;
-defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .shared_arith = "off";
+defparam \KEY[0]~input .bus_hold = "false";
+defparam \KEY[0]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nz2wx4~0 (
+// Location: LABCELL_X30_Y19_N21
+cyclonev_lcell_comb \soc_inst|switches_1|last_buttons[0]~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nz2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|switches_1|last_buttons[0]~1_combout  = ( !\KEY[0]~input_o  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.datae(!\KEY[0]~input_o ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nz2wx4~0_combout ),
+	.combout(\soc_inst|switches_1|last_buttons[0]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .lut_mask = 64'h000050500000DCDC;
-defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|last_buttons[0]~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|last_buttons[0]~1 .lut_mask = 64'hFFFF0000FFFF0000;
+defparam \soc_inst|switches_1|last_buttons[0]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~0 (
+// Location: FF_X30_Y19_N23
+dffeas \soc_inst|switches_1|last_buttons[0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|switches_1|last_buttons[0]~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|last_buttons [0]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|last_buttons[0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|last_buttons[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y19_N30
+cyclonev_lcell_comb \soc_inst|switches_1|always0~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nz2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nz2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zy2wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Zy2wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Jq2wx4~0_combout )))) ) )
+// \soc_inst|switches_1|always0~1_combout  = (!\soc_inst|switches_1|last_buttons [0] & !\KEY[0]~input_o )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|switches_1|last_buttons [0]),
+	.datad(!\KEY[0]~input_o ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nz2wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ),
+	.combout(\soc_inst|switches_1|always0~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .lut_mask = 64'hF3A2F3A2F300F300;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|always0~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|always0~1 .lut_mask = 64'hF000F000F000F000;
+defparam \soc_inst|switches_1|always0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xx2wx4 (
+// Location: FF_X22_Y19_N8
+dffeas \soc_inst|switches_1|switch_store[0][3] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[3]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][3]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][3] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xx2wx4~combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Evcwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Evcwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|H4ovx4~0_combout )) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xx2wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xx2wx4 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Xx2wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .lut_mask = 64'hC000000000000000;
+defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It2wx4~0 (
+// Location: LABCELL_X31_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|It2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Xwawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|It2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|It2wx4~0 .lut_mask = 64'h0000000000A000A0;
-defparam \soc_inst|m0_1|u_logic|It2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .lut_mask = 64'h4400FF0C44004C0C;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~1 (
+// Location: LABCELL_X31_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ((\soc_inst|m0_1|u_logic|O5t2z4~q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Xwawx4~2_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwawx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .lut_mask = 64'h0300030003440344;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .lut_mask = 64'h050500000F0FCF0F;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Op2wx4~0 (
+// Location: LABCELL_X31_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Op2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Xwawx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwawx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .lut_mask = 64'hB7370000F3330000;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~2 (
+// Location: LABCELL_X31_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xwawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwawx4~2_combout  & ( \soc_inst|m0_1|u_logic|Xwawx4~3_combout  & ( ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xwawx4~2_combout  & ( \soc_inst|m0_1|u_logic|Xwawx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((\soc_inst|m0_1|u_logic|Xwawx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xwawx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xwawx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwawx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .lut_mask = 64'h00080008444C444C;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .lut_mask = 64'h0000000022777F7F;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~3 (
+// Location: LABCELL_X33_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L4bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fh2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|It2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fh2wx4~1_combout  & !\soc_inst|m0_1|u_logic|Op2wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|L4bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Viy2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|It2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fh2wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L4bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .lut_mask = 64'h0000000000004000;
+defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~4 (
+// Location: LABCELL_X29_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hsize_o~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fh2wx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|hsize_o~0_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|It52z4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// !\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .lut_mask = 64'h00000000F5FFF5FF;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hsize_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hsize_o~0 .lut_mask = 64'h0F000F00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|hsize_o~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~2 (
+// Location: LABCELL_X29_Y16_N3
+cyclonev_lcell_comb \soc_inst|ram_1|byte2~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L53wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) ) )
+// \soc_inst|ram_1|byte2~0_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|switches_1|half_word_address~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|hsize_o~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|switches_1|half_word_address~0_combout  & ( (!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|hsize_o~0_combout ) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|switches_1|half_word_address~0_combout  & ( !\soc_inst|m0_1|u_logic|hsize_o~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|switches_1|half_word_address~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|hsize_o~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|switches_1|half_word_address~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L53wx4~2_combout ),
+	.combout(\soc_inst|ram_1|byte2~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L53wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L53wx4~2 .lut_mask = 64'h0000050533333737;
-defparam \soc_inst|m0_1|u_logic|L53wx4~2 .shared_arith = "off";
+defparam \soc_inst|ram_1|byte2~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte2~0 .lut_mask = 64'hF0F0F0F0FCFCFEFE;
+defparam \soc_inst|ram_1|byte2~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B73wx4 (
+// Location: FF_X29_Y16_N4
+dffeas \soc_inst|ram_1|byte_select[2]~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|byte2~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[2]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[2]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y17_N48
+cyclonev_lcell_comb \soc_inst|switches_1|read_enable~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B73wx4~combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) )
+// \soc_inst|switches_1|read_enable~0_combout  = ( \soc_inst|switches_1|half_word_address~1_combout  & ( !\soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|switches_1|half_word_address~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.combout(\soc_inst|switches_1|read_enable~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B73wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B73wx4 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|B73wx4 .shared_arith = "off";
+defparam \soc_inst|switches_1|read_enable~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|read_enable~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|switches_1|read_enable~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hw2wx4~0 (
+// Location: FF_X29_Y17_N49
+dffeas \soc_inst|switches_1|read_enable (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|switches_1|read_enable~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|read_enable~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|read_enable .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|read_enable .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y17_N53
+dffeas \soc_inst|switches_1|half_word_address[1]~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|switches_1|half_word_address~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|half_word_address[1]~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|half_word_address[1]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|half_word_address[1]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y17_N57
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  ) )
+// \soc_inst|interconnect_1|HRDATA[8]~5_combout  = ( !\soc_inst|switches_1|half_word_address[1]~DUPLICATE_q  & ( \soc_inst|switches_1|read_enable~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|switches_1|read_enable~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|switches_1|half_word_address[1]~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[8]~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~5 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~5 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|interconnect_1|HRDATA[8]~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~0 (
+// Location: MLABCELL_X25_Y15_N48
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L53wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  ) )
+// \soc_inst|interconnect_1|HRDATA[24]~6_combout  = ( \soc_inst|interconnect_1|HRDATA[8]~5_combout  & ( !\soc_inst|interconnect_1|mux_sel [2] & ( (!\soc_inst|interconnect_1|mux_sel [1]) # ((\soc_inst|switches_1|half_word_address[0]~DUPLICATE_q  & 
+// !\soc_inst|interconnect_1|mux_sel [0])) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[8]~5_combout  & ( !\soc_inst|interconnect_1|mux_sel [2] & ( !\soc_inst|interconnect_1|mux_sel [1] ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.dataa(!\soc_inst|switches_1|half_word_address[0]~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datad(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datae(!\soc_inst|interconnect_1|HRDATA[8]~5_combout ),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L53wx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L53wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L53wx4~0 .lut_mask = 64'hCCCCCCCCC4C4C4C4;
-defparam \soc_inst|m0_1|u_logic|L53wx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~6 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~6 .lut_mask = 64'hFF00FF5000000000;
+defparam \soc_inst|interconnect_1|HRDATA[24]~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~1 (
+// Location: LABCELL_X19_Y17_N42
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[20]~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L53wx4~1_combout  = ( \soc_inst|m0_1|u_logic|L53wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) )
+// \soc_inst|interconnect_1|HRDATA[20]~7_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~6_combout  & ( ((\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & (\soc_inst|interconnect_1|mux_sel [0] & \soc_inst|ram_1|read_cycle~q ))) # 
+// (\soc_inst|interconnect_1|mux_sel [1]) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datac(!\soc_inst|ram_1|read_cycle~q ),
+	.datad(!\soc_inst|interconnect_1|mux_sel [1]),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L53wx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L53wx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L53wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L53wx4~1 .lut_mask = 64'h00000000FFF3FFF3;
-defparam \soc_inst|m0_1|u_logic|L53wx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[20]~7 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[20]~7 .lut_mask = 64'h0000000001FF01FF;
+defparam \soc_inst|interconnect_1|HRDATA[20]~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|L53wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|L53wx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|L53wx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|L53wx4~2_combout ) ) ) )
+// Location: IOIBUF_X16_Y0_N1
+cyclonev_io_ibuf \SW[1]~input (
+	.i(SW[1]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[1]~input_o ));
+// synopsys translate_off
+defparam \SW[1]~input .bus_hold = "false";
+defparam \SW[1]~input .simulate_z_as = "z";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|L53wx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L53wx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L53wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: IOIBUF_X36_Y0_N18
+cyclonev_io_ibuf \KEY[1]~input (
+	.i(KEY[1]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\KEY[1]~input_o ));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L53wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L53wx4~3 .lut_mask = 64'hFF55FF5500000301;
-defparam \soc_inst|m0_1|u_logic|L53wx4~3 .shared_arith = "off";
+defparam \KEY[1]~input .bus_hold = "false";
+defparam \KEY[1]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey2wx4~0 (
+// Location: LABCELL_X30_Y19_N27
+cyclonev_lcell_comb \soc_inst|switches_1|last_buttons[1]~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Ark2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  $ ((\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) )
+// \soc_inst|switches_1|last_buttons[1]~0_combout  = !\KEY[1]~input_o 
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\KEY[1]~input_o ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ),
+	.combout(\soc_inst|switches_1|last_buttons[1]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .lut_mask = 64'hF1F3F1F341434143;
-defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|last_buttons[1]~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|last_buttons[1]~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
+defparam \soc_inst|switches_1|last_buttons[1]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ru2wx4~0 (
+// Location: FF_X30_Y19_N29
+dffeas \soc_inst|switches_1|last_buttons[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|switches_1|last_buttons[1]~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|last_buttons [1]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|last_buttons[1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|last_buttons[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y19_N24
+cyclonev_lcell_comb \soc_inst|switches_1|always0~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ru2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ))) ) )
+// \soc_inst|switches_1|always0~0_combout  = (!\KEY[1]~input_o  & !\soc_inst|switches_1|last_buttons [1])
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\KEY[1]~input_o ),
+	.datab(gnd),
+	.datac(!\soc_inst|switches_1|last_buttons [1]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ),
+	.combout(\soc_inst|switches_1|always0~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .lut_mask = 64'h0002000200000000;
-defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|always0~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|always0~0 .lut_mask = 64'hA0A0A0A0A0A0A0A0;
+defparam \soc_inst|switches_1|always0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bt2wx4~0 (
+// Location: FF_X19_Y17_N2
+dffeas \soc_inst|switches_1|switch_store[1][1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[1]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[1][1]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][1] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N8
+dffeas \soc_inst|ram_1|write_cycle (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|write_cycle~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|write_cycle~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|write_cycle .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|write_cycle .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N13
+dffeas \soc_inst|ram_1|saved_word_address[0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|saved_word_address [0]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[0] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N3
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[0]~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bt2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Hw2wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ru2wx4~0_combout  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
+// \soc_inst|ram_1|memory.raddr_a[0]~0_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|Fvovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [0])) ) ) # ( 
+// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [0] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~q ),
+	.datac(!\soc_inst|ram_1|saved_word_address [0]),
+	.datad(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bt2wx4~0_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[0]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .lut_mask = 64'h5050505050705070;
-defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .lut_mask = 64'h0F0F0F0F03CF03CF;
+defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~5 (
+// Location: LABCELL_X36_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0pvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bt2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ey2wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Emi2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bt2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|P0pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bt2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .lut_mask = 64'hF050F050F040F040;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .lut_mask = 64'h0000000000005555;
+defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xc2wx4~0 (
+// Location: FF_X36_Y12_N41
+dffeas \soc_inst|m0_1|u_logic|Xx93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xx93z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xx93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xx93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: IOIBUF_X4_Y0_N1
+cyclonev_io_ibuf \SW[7]~input (
+	.i(SW[7]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[7]~input_o ));
+// synopsys translate_off
+defparam \SW[7]~input .bus_hold = "false";
+defparam \SW[7]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X25_Y15_N20
+dffeas \soc_inst|switches_1|switch_store[0][7] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[7]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][7]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][7] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[7] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fh2wx4~5_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ) # 
-// (\soc_inst|m0_1|u_logic|L53wx4~3_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Fh2wx4~5_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|hwdata_o [7] = ( !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L53wx4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .lut_mask = 64'h3333333332333233;
-defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .lut_mask = 64'h3333333300000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~0 (
+// Location: MLABCELL_X21_Y17_N6
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[7]~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ge2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  ) )
+// \soc_inst|ram_1|data_to_memory[7]~4_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select [0]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & !\soc_inst|ram_1|byte_select [0])) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+	.datad(!\soc_inst|ram_1|byte_select [0]),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[7]~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[7]~4 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[7]~4 .lut_mask = 64'h0300030003330333;
+defparam \soc_inst|ram_1|data_to_memory[7]~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~1 (
+// Location: LABCELL_X36_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Swy2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))))) ) )
+// \soc_inst|m0_1|u_logic|J3iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .lut_mask = 64'h1005100510151015;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .lut_mask = 64'hCC00CC0000C000C0;
+defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~0 (
+// Location: LABCELL_X36_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ocfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ocfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rngwx4~combout ))) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .lut_mask = 64'h0505050505040504;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .lut_mask = 64'h0000100000001000;
+defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~2 (
+// Location: LABCELL_X36_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( !\soc_inst|m0_1|u_logic|Yafwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G27wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yafwx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( !\soc_inst|m0_1|u_logic|Yafwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yafwx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|R1d2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yafwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yafwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .lut_mask = 64'hCCCC808000000000;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nkpvx4~0 (
+// Location: LABCELL_X36_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|E4iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout  & !\soc_inst|m0_1|u_logic|R1d2z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Ocfwx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .lut_mask = 64'hF0F0F0F0F000F000;
+defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7swx4~0 (
+// Location: LABCELL_X40_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2lwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J7swx4~0_combout  = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|G2lwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7swx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J7swx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|J7swx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .lut_mask = 64'h0000A0A0A0A0F0F0;
+defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pkxvx4~0 (
+// Location: LABCELL_X35_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bxcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~3 (
+// Location: LABCELL_X40_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lu6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M66wx4~combout  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M66wx4~combout  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M66wx4~combout  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Lu6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Howvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .lut_mask = 64'h44444444CCCC4444;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~4 (
+// Location: LABCELL_X36_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Srgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Yafwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (((!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|J7swx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Srgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(gnd),
 	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yafwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .lut_mask = 64'hF3A2F3A200000000;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .lut_mask = 64'h00000000000000C0;
+defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~0 (
+// Location: MLABCELL_X39_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qllwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y6_N5
-dffeas \soc_inst|m0_1|u_logic|Nqy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nqy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nqy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4fwx4~0 (
+// Location: LABCELL_X42_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Csewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M4fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Csewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Csewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Csewx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Csewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjrwx4~0 (
+// Location: MLABCELL_X39_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mk6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rjrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pty2z4~q  & !\soc_inst|m0_1|u_logic|Dvy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Dvy2z4~q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Mk6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .lut_mask = 64'h3344334433003300;
-defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkrwx4 (
+// Location: LABCELL_X42_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mkrwx4~combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Msyvx4~combout  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|G27wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mkrwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mkrwx4 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Mkrwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|G27wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3xvx4 (
+// Location: MLABCELL_X39_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X3xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J3xvx4~combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|X3xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (((\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Qem2z4~q )) # (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J3xvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|X3xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J3xvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J3xvx4 .lut_mask = 64'hFA00FA0032003200;
-defparam \soc_inst|m0_1|u_logic|J3xvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .lut_mask = 64'h44444444444C444C;
+defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~5 (
+// Location: MLABCELL_X39_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X3xvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~5_combout  = ( \soc_inst|m0_1|u_logic|J3xvx4~combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Yafwx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|J3xvx4~combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|X3xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X3xvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X3xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # 
+// (((!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yafwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yafwx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|J3xvx4~combout ),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X3xvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .lut_mask = 64'h00000000FFFFFF0C;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y7_N16
-dffeas \soc_inst|m0_1|u_logic|Sjj2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sjj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sjj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .lut_mask = 64'hFBFF515500000000;
+defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|My6wx4~0 (
+// Location: LABCELL_X40_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|My6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zoy2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|U6wvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|Qdj2z4~q  $ ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~q  & (((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Qdj2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|My6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|My6wx4~0 .lut_mask = 64'h000000000C000C00;
-defparam \soc_inst|m0_1|u_logic|My6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .lut_mask = 64'h0000C1F10000C1E1;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vnxvx4~0 (
+// Location: LABCELL_X37_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Ohwvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|U6wvx4~4_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~q )) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  
+// & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .lut_mask = 64'h00F000F000000000;
-defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .lut_mask = 64'h2020F0F020202020;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~0 (
+// Location: MLABCELL_X39_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|U6wvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .lut_mask = 64'h0000000004000400;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .lut_mask = 64'h000000000A000A00;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~1 (
+// Location: LABCELL_X35_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~1_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|My6wx4~0_combout  & \soc_inst|m0_1|u_logic|Vnxvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|K6yvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|My6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Vnxvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Wvewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .lut_mask = 64'h004000400C4C0C4C;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~2 (
+// Location: LABCELL_X37_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Dvy2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|H5fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .lut_mask = 64'h0F000F000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~3 (
+// Location: LABCELL_X40_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7swx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~3_combout  = ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|C9yvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|C9yvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|J7swx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .lut_mask = 64'h000A000A333B333B;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J7swx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J7swx4~0 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|J7swx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~4 (
+// Location: IOIBUF_X16_Y0_N18
+cyclonev_io_ibuf \SW[5]~input (
+	.i(SW[5]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[5]~input_o ));
+// synopsys translate_off
+defparam \SW[5]~input .bus_hold = "false";
+defparam \SW[5]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X19_Y17_N11
+dffeas \soc_inst|switches_1|switch_store[1][5] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[5]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[1][5]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][5] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H0dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~4_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|K6yvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|K6yvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( !\soc_inst|m0_1|u_logic|K6yvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|K6yvx4~2_combout  & 
-// (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|H0dwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K6yvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H0dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .lut_mask = 64'h00000020F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .lut_mask = 64'h0000000000200000;
+defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y10_N37
+dffeas \soc_inst|m0_1|u_logic|Cyq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cyq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cyq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X8kwx4~0 (
+// Location: LABCELL_X33_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X8kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & !\soc_inst|m0_1|u_logic|Npk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .lut_mask = 64'h00000000AA00AA00;
-defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .lut_mask = 64'h00000000EAC00C00;
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~5 (
+// Location: LABCELL_X33_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Y5dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .lut_mask = 64'h0C0C00000C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .lut_mask = 64'h0F00030007000300;
+defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~7 (
+// Location: LABCELL_X33_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uwyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~7_combout  = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Emi2z4~q  & ((\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Uwyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q 
+// ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .lut_mask = 64'h000000008D8D8D8D;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .lut_mask = 64'h0001000100000000;
+defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2mwx4~0 (
+// Location: LABCELL_X33_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I2mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Ucqvx4~combout  & (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|Ucqvx4~combout  & (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|W4dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  
+// & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .lut_mask = 64'h5557555700030003;
-defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .lut_mask = 64'h0F0F0F0F030F030F;
+defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~8 (
+// Location: LABCELL_X33_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4dwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~8_combout  = ( !\soc_inst|m0_1|u_logic|I2mwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K6yvx4~7_combout  & (((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|W4dwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~q  & (((\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K6yvx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .lut_mask = 64'hFD00FD0000000000;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .lut_mask = 64'h0313031300000000;
+defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zzfwx4~0 (
+// Location: LABCELL_X33_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I4dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|I4dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ucqvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ucqvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ucqvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .lut_mask = 64'h0A0A0A0A00000000;
-defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .lut_mask = 64'hAAA0AAA00000AAA0;
+defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuwvx4~0 (
+// Location: LABCELL_X33_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tuwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Z4bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .lut_mask = 64'h0000000030003000;
-defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .lut_mask = 64'hF000C0C0F000C8C8;
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T1xvx4~0 (
+// Location: LABCELL_X33_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O0dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T1xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) )
+// \soc_inst|m0_1|u_logic|O0dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z4bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zcn2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zcn2z4~q  & ((!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z4bwx4~2_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O0dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .lut_mask = 64'hC400C400CC00CC00;
+defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~6 (
+// Location: MLABCELL_X28_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xucwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q  
-// & ((!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ))))) ) ) # ( !\soc_inst|m0_1|u_logic|T1xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xucwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O0dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H0dwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Cyq2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O0dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H0dwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H0dwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O0dwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .lut_mask = 64'hFA00FA00D800D800;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .lut_mask = 64'h80A0000088AA0000;
+defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~9 (
+// Location: MLABCELL_X34_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~9_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|K6yvx4~5_combout  & (\soc_inst|m0_1|u_logic|K6yvx4~8_combout  & ((!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Cxc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~q 
+// ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|K6yvx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K6yvx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cxc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .lut_mask = 64'h0000000000B000B0;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .lut_mask = 64'h0020002000000000;
+defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~10 (
+// Location: LABCELL_X40_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~10_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~9_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (((\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|K6yvx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|K6yvx4~4_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|K6yvx4~9_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Fbfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fij2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K6yvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K6yvx4~4_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fbfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .lut_mask = 64'h3333333301330133;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .lut_mask = 64'h00330033F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y9_N25
-dffeas \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE (
+// Location: IOIBUF_X12_Y0_N18
+cyclonev_io_ibuf \SW[0]~input (
+	.i(SW[0]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[0]~input_o ));
+// synopsys translate_off
+defparam \SW[0]~input .bus_hold = "false";
+defparam \SW[0]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X19_Y16_N5
+dffeas \soc_inst|switches_1|switch_store[1][0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\SW[0]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.q(\soc_inst|switches_1|switch_store[1][0]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qj2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .lut_mask = 64'h0A0A000000C00FCF;
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .shared_arith = "off";
+defparam \soc_inst|switches_1|switch_store[1][0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][0] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~0 (
+// Location: LABCELL_X37_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qsewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qj2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (((\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Emi2z4~q )) # (\soc_inst|m0_1|u_logic|G97wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Qsewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .lut_mask = 64'h20AA20AAAAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .lut_mask = 64'hCCCCCCCC00000000;
+defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jucwx4~0 (
+// Location: LABCELL_X37_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P7wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jucwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q 
-// ) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|P7wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Qsewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .lut_mask = 64'h0000555500005F55;
-defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .lut_mask = 64'h000000000A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ro0xx4~0 (
+// Location: MLABCELL_X39_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ro0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~q  & ((\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|M4fwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ro0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .lut_mask = 64'h0015001500110011;
-defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .lut_mask = 64'h0000000000200020;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Jucwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ro0xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qj2wx4~1_combout  & !\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ro0xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y17_N17
+dffeas \soc_inst|switches_1|switch_store[1][7] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[7]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[1][7]~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .lut_mask = 64'hC0C0000000000000;
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .shared_arith = "off";
+defparam \soc_inst|switches_1|switch_store[1][7] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][7] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw0xx4~0 (
+// Location: LABCELL_X17_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fw0xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|G97wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Add2~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Cax2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~34  ))
+// \soc_inst|m0_1|u_logic|Add2~38  = CARRY(( !\soc_inst|m0_1|u_logic|Cax2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~34  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~34 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fw0xx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~37_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~38 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .lut_mask = 64'h00A000A000000000;
-defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~37 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ax0xx4~0 (
+// Location: LABCELL_X17_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~57 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ax0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Add2~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nbx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~38  ))
+// \soc_inst|m0_1|u_logic|Add2~58  = CARRY(( !\soc_inst|m0_1|u_logic|Nbx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~38  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~38 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~57_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~58 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~57 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~57 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vi2wx4~0 (
+// Location: MLABCELL_X21_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vi2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ax0xx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Glhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Nbx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~57_sumout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Nbx2z4~q  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Nbx2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & !\soc_inst|m0_1|u_logic|Add2~57_sumout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Nbx2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~57_sumout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Glhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .lut_mask = 64'h0000000005000500;
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .lut_mask = 64'h88888080CCCCC4C4;
+defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vi2wx4~1 (
+// Location: FF_X28_Y10_N50
+dffeas \soc_inst|m0_1|u_logic|T1d3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T1d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T1d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ps3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & !\soc_inst|m0_1|u_logic|Vi2wx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout  & !\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ps3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .lut_mask = 64'hCC00CC00C000C000;
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .lut_mask = 64'hFFFFFFFF00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~1 (
+// Location: LABCELL_X33_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ge2wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Lhyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .lut_mask = 64'hFAFAF0F0AAAA0000;
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .lut_mask = 64'hFCFC000000000000;
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~2 (
+// Location: LABCELL_X33_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxc2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ge2wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ge2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Qxc2z4~combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .lut_mask = 64'h005F005F00000000;
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxc2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxc2z4 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Qxc2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1d2z4~0 (
+// Location: LABCELL_X33_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R1d2z4~0_combout  = (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~q )
+// \soc_inst|m0_1|u_logic|Lhyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Qxc2z4~combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Qxc2z4~combout  & ( (!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nsk2z4~q  
+// & ( !\soc_inst|m0_1|u_logic|Qxc2z4~combout  & ( (!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Qxc2z4~combout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .lut_mask = 64'h00F000F000F000F0;
-defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .lut_mask = 64'hAAAA0808FFAA0C08;
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Keiwx4~0 (
+// Location: MLABCELL_X28_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Keiwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .lut_mask = 64'hA0A0000000000000;
-defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .lut_mask = 64'h151505053F3F0F0F;
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Celwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Celwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Keiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q ) # ((!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Celwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y20_N26
+dffeas \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Celwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Celwx4~0 .lut_mask = 64'hFFEFFFEF00000000;
-defparam \soc_inst|m0_1|u_logic|Celwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Celwx4~1 (
+// Location: MLABCELL_X28_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rsqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Celwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Celwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ) # (\soc_inst|m0_1|u_logic|G27wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout  & \soc_inst|m0_1|u_logic|Celwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Rsqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Celwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Celwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Celwx4~1 .lut_mask = 64'h00F000F000F700F7;
-defparam \soc_inst|m0_1|u_logic|Celwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .lut_mask = 64'hF5F5F5F5A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbfwx4~0 (
+// Location: MLABCELL_X28_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1rvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fbfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((\soc_inst|m0_1|u_logic|Fij2z4~q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|H1rvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout  & \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fbfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .lut_mask = 64'h5050505050FA50FA;
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbfwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Fbfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Celwx4~1_combout  & (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Celwx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout  & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Celwx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Celwx4~1_combout  & (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fbfwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y20_N50
+dffeas \soc_inst|m0_1|u_logic|U7w2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U7w2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .lut_mask = 64'h1101011101010111;
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U7w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U7w2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4iwx4~0 (
+// Location: LABCELL_X35_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E4iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ocfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Cr0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .lut_mask = 64'hFCFCFCFC00000000;
-defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Enrwx4~0 (
+// Location: LABCELL_X31_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr0xx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Enrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|U2x2z4~q )) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Qem2z4~q )) # (\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Cr0xx4~1_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .lut_mask = 64'h0B780B780BF80BF8;
-defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .lut_mask = 64'h0000000030300000;
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y3_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V2iwx4~0 (
+// Location: MLABCELL_X28_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5vvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V2iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( !\soc_inst|m0_1|u_logic|Enrwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Herwx4~0 (
+// Location: MLABCELL_X34_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kofwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Herwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # ((\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Kofwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Herwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Herwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Herwx4~0 .lut_mask = 64'h0F000F00CFCCCFCC;
-defparam \soc_inst|m0_1|u_logic|Herwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .lut_mask = 64'h000000000A000A00;
+defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Herwx4~1 (
+// Location: FF_X35_Y13_N41
+dffeas \soc_inst|m0_1|u_logic|H9i2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H9i2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H9i2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bk4wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Herwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & !\soc_inst|m0_1|u_logic|Herwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & (\soc_inst|m0_1|u_logic|E4iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Herwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Bk4wx4~combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & (\soc_inst|m0_1|u_logic|Socwx4~0_combout  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Herwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Herwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Herwx4~1 .lut_mask = 64'h0300030033003300;
-defparam \soc_inst|m0_1|u_logic|Herwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bk4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bk4wx4 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Bk4wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N31
-dffeas \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE (
+// Location: FF_X35_Y16_N26
+dffeas \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vb2wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Vb2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vb2wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X35_Y16_N23
+dffeas \soc_inst|m0_1|u_logic|Nqy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .lut_mask = 64'hFFF0F0F0FF000000;
-defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nqy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nqy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xr0xx4 (
+// Location: LABCELL_X35_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W7hwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xr0xx4~combout  = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|W7hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nqy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xr0xx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xr0xx4 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Xr0xx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .lut_mask = 64'h000C000C00CC00CC;
+defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~0 (
+// Location: LABCELL_X35_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Poa2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|If2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ( (\soc_inst|m0_1|u_logic|Ge2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Poa2z4~0_combout  = (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|If2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|If2wx4~0 .lut_mask = 64'h00AF00AF00000000;
-defparam \soc_inst|m0_1|u_logic|If2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .lut_mask = 64'h0020002000200020;
+defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vb2wx4 (
+// Location: LABCELL_X35_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ik4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vb2wx4~combout  = ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|W7hwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Vb2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ik4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vb2wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vb2wx4 .lut_mask = 64'h000000000CCC0CCC;
-defparam \soc_inst|m0_1|u_logic|Vb2wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .lut_mask = 64'hFFFF0000FDFF0000;
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ob2wx4~0 (
+// Location: LABCELL_X35_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ik4wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ob2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & !\soc_inst|m0_1|u_logic|Rni2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~q ) # ((!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Ik4wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  
+// & !\soc_inst|m0_1|u_logic|U2x2z4~q )))) # (\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ik4wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ob2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .lut_mask = 64'hEEAAEEAACC00CC00;
-defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .lut_mask = 64'h00000000FFFFD9C0;
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ob2wx4 (
+// Location: LABCELL_X37_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Si4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ob2wx4~combout  = ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ob2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Si4wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ob2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Si4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ob2wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ob2wx4 .lut_mask = 64'h000000000CCC0CCC;
-defparam \soc_inst|m0_1|u_logic|Ob2wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .lut_mask = 64'h0000000011110000;
+defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P3mvx4~0 (
+// Location: MLABCELL_X28_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P3mvx4~0_combout  = (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ilpvx4~0_combout ))))
+// \soc_inst|m0_1|u_logic|Pd4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Si4wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Si4wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Si4wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Si4wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Si4wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P3mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .lut_mask = 64'hC0E0C0E0C0E0C0E0;
-defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .lut_mask = 64'h000C000C000CFFFF;
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhwvx4~0 (
+// Location: LABCELL_X33_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vhwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|m0_1|u_logic|Ohwvx4~combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|m0_1|u_logic|Ohwvx4~combout  
-// & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Pd4wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pd4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|X77wx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pd4wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pd4wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vhwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .lut_mask = 64'h0400040044444444;
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .lut_mask = 64'hFFFFFCFC00000000;
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhwvx4~1 (
+// Location: MLABCELL_X28_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vhwvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vhwvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) # (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Pd4wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pd4wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|S4w2z4~q  & ((!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ) # ((\soc_inst|m0_1|u_logic|Kofwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|C34wx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Pd4wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|S4w2z4~q  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vhwvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .lut_mask = 64'hFFF3FFF300000000;
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .lut_mask = 64'hCCCCCCCCC4C0C4C0;
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~0 (
+// Location: MLABCELL_X28_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5vvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K8wvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Q5vvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F5mvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pd4wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|C34wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F5mvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pd4wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ) # (\soc_inst|m0_1|u_logic|C34wx4~combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pd4wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K8wvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .lut_mask = 64'h0003000300000000;
-defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .lut_mask = 64'hDDDD00DD00000000;
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~1 (
+// Location: MLABCELL_X28_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K8wvx4~1_combout  = ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Dvy2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Q7mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q5vvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|U7w2z4~q  & (((!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )) # (\soc_inst|m0_1|u_logic|R1w2z4~q ))) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Q5vvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K8wvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .lut_mask = 64'h0000000000190019;
-defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .lut_mask = 64'hFFFFFFFF00FD00FD;
+defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~2 (
+// Location: FF_X28_Y20_N49
+dffeas \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K8wvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|K8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vhwvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|K8wvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Qem2z4~q  & 
-// \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Glnwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K8wvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K8wvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Glnwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .lut_mask = 64'h0F010F0100000000;
-defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .lut_mask = 64'h0800080008330833;
+defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oowvx4~0 (
+// Location: LABCELL_X36_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ukpvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oowvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ukpvx4~combout  = (!\soc_inst|m0_1|u_logic|L8t2z4~q  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ukpvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ukpvx4 .lut_mask = 64'hF000F000F000F000;
+defparam \soc_inst|m0_1|u_logic|Ukpvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejwvx4~0 (
+// Location: LABCELL_X40_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2yvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ejwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|C2yvx4~combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .lut_mask = 64'h0000F0F0F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C2yvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2yvx4 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|C2yvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8wvx4~0 (
+// Location: LABCELL_X40_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z3yvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R8wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Z3yvx4~combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|C2yvx4~combout  & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|U2x2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|C2yvx4~combout  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|C2yvx4~combout  & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R8wvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .lut_mask = 64'h0000100000A010A0;
-defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z3yvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z3yvx4 .lut_mask = 64'h0005000F000A0000;
+defparam \soc_inst|m0_1|u_logic|Z3yvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8wvx4~1 (
+// Location: LABCELL_X36_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R8wvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R8wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Blwvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Rmpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xhxvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) # (!\soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R8wvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .lut_mask = 64'hAA80AA8000000000;
-defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .lut_mask = 64'hFEFEFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9wvx4~0 (
+// Location: LABCELL_X40_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F9wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Rxl2z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rxl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F9wvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .lut_mask = 64'h0077000777770707;
-defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P3mvx4~1 (
+// Location: LABCELL_X40_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohwvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F9wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & (((\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & !\soc_inst|m0_1|u_logic|P3mvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Auk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|F9wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & (!\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & \soc_inst|m0_1|u_logic|Auk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Ohwvx4~combout  = ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P3mvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F9wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .lut_mask = 64'h0088008820AA20AA;
-defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y5_N44
-dffeas \soc_inst|m0_1|u_logic|Auk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Auk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Auk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ohwvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ohwvx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Ohwvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg2wx4~0 (
+// Location: LABCELL_X36_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yg2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout  & (\soc_inst|m0_1|u_logic|Auk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Rmpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rmpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rngwx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rmpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rmpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yg2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .lut_mask = 64'h0C040C04CC44CC44;
-defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .lut_mask = 64'h0B0B0B0B0B000B00;
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y6_N32
-dffeas \soc_inst|m0_1|u_logic|Xly2z4 (
+// Location: FF_X36_Y15_N43
+dffeas \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xly2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xly2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~0 (
+// Location: MLABCELL_X34_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yplwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D6yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xly2z4~q ) # ((!\soc_inst|m0_1|u_logic|Rxl2z4~q  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Rxl2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Yplwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D6yvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .lut_mask = 64'h00CA00CACCCECCCE;
-defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .lut_mask = 64'h0A000A0000000000;
+defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~1 (
+// Location: LABCELL_X31_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dplwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D6yvx4~1_combout  = (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & (((!\soc_inst|m0_1|u_logic|Auk2z4~q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout )) # (\soc_inst|m0_1|u_logic|Icyvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nqy2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Auk2z4~q  & ((\soc_inst|m0_1|u_logic|Pcyvx4~combout ))))
+// \soc_inst|m0_1|u_logic|Dplwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D6yvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .lut_mask = 64'h0ACE0ACE0ACE0ACE;
-defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .lut_mask = 64'h00A000A0C0A000A0;
+defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V8yvx4~0 (
+// Location: MLABCELL_X34_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vopvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V8yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( (!\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & (((\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & (\soc_inst|m0_1|u_logic|Cyq2z4~q 
-//  & (\soc_inst|m0_1|u_logic|I6z2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~q  & ( (\soc_inst|m0_1|u_logic|Cyq2z4~q  & (\soc_inst|m0_1|u_logic|I6z2z4~q  & \soc_inst|m0_1|u_logic|E4xvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Vopvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|G97wx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|G97wx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V8yvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .lut_mask = 64'h001100110F110F11;
-defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .lut_mask = 64'hFCA8FCA800000000;
+defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~2 (
+// Location: LABCELL_X40_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A1yvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D6yvx4~2_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|D6yvx4~0_combout  & (!\soc_inst|m0_1|u_logic|D6yvx4~1_combout  & (!\soc_inst|m0_1|u_logic|V8yvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|G2lwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|D6yvx4~0_combout  & (!\soc_inst|m0_1|u_logic|D6yvx4~1_combout  & !\soc_inst|m0_1|u_logic|G2lwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|A1yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q 
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D6yvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D6yvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|V8yvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .lut_mask = 64'h8800880080008000;
-defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .lut_mask = 64'h2020202000020002;
+defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y9_N49
-dffeas \soc_inst|m0_1|u_logic|H3d3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X40_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mnpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|A1yvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  
+// & !\soc_inst|m0_1|u_logic|L8t2z4~q )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H3d3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .lut_mask = 64'h0500050055555555;
+defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg2wx4 (
+// Location: LABCELL_X33_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yg2wx4~combout  = ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Yg2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Yg2wx4~0_combout  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Kfpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vopvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yg2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg2wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yg2wx4 .lut_mask = 64'h0111011105550555;
-defparam \soc_inst|m0_1|u_logic|Yg2wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .lut_mask = 64'h30303030FF30FF30;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xc2wx4 (
+// Location: LABCELL_X40_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vnxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xc2wx4~combout  = ( \soc_inst|m0_1|u_logic|Yg2wx4~combout  & ( \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xc2wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xc2wx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Xc2wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .lut_mask = 64'h0000F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mw1wx4~0 (
+// Location: MLABCELL_X39_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xipvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ob2wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Xipvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Csewx4~0_combout  & \soc_inst|m0_1|u_logic|Ukpvx4~combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( !\soc_inst|m0_1|u_logic|Vnxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Csewx4~0_combout  & \soc_inst|m0_1|u_logic|Ukpvx4~combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .lut_mask = 64'h000A0000CCCECCCC;
+defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gxxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  $ (!\soc_inst|m0_1|u_logic|Xly2z4~q  $ (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ))) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  $ (!\soc_inst|m0_1|u_logic|Xly2z4~q  $ (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .lut_mask = 64'h6996699696699669;
+defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu1wx4~0 (
+// Location: LABCELL_X36_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ljpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Ljpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .lut_mask = 64'h00000000AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .lut_mask = 64'h6969696996969696;
+defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G02wx4~0 (
+// Location: LABCELL_X36_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jipvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G02wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Jipvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Xipvx4~0_combout  & \soc_inst|m0_1|u_logic|Ljpvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Xipvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  $ (\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jipvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G02wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G02wx4~0 .lut_mask = 64'h00000000AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|G02wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .lut_mask = 64'h0A050A05000F000F;
+defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y9_N8
-dffeas \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE (
+// Location: LABCELL_X30_Y19_N12
+cyclonev_lcell_comb \soc_inst|switches_1|DataValid~1 (
+// Equation(s):
+// \soc_inst|switches_1|DataValid~1_combout  = ( \soc_inst|switches_1|DataValid [0] & ( \soc_inst|switches_1|read_enable~q  & ( (((!\soc_inst|switches_1|last_buttons [0] & !\KEY[0]~input_o )) # (\soc_inst|switches_1|half_word_address[0]~DUPLICATE_q )) # 
+// (\soc_inst|switches_1|half_word_address [1]) ) ) ) # ( !\soc_inst|switches_1|DataValid [0] & ( \soc_inst|switches_1|read_enable~q  & ( (!\soc_inst|switches_1|last_buttons [0] & !\KEY[0]~input_o ) ) ) ) # ( \soc_inst|switches_1|DataValid [0] & ( 
+// !\soc_inst|switches_1|read_enable~q  ) ) # ( !\soc_inst|switches_1|DataValid [0] & ( !\soc_inst|switches_1|read_enable~q  & ( (!\soc_inst|switches_1|last_buttons [0] & !\KEY[0]~input_o ) ) ) )
+
+	.dataa(!\soc_inst|switches_1|last_buttons [0]),
+	.datab(!\soc_inst|switches_1|half_word_address [1]),
+	.datac(!\soc_inst|switches_1|half_word_address[0]~DUPLICATE_q ),
+	.datad(!\KEY[0]~input_o ),
+	.datae(!\soc_inst|switches_1|DataValid [0]),
+	.dataf(!\soc_inst|switches_1|read_enable~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|switches_1|DataValid~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|DataValid~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|DataValid~1 .lut_mask = 64'hAA00FFFFAA00BF3F;
+defparam \soc_inst|switches_1|DataValid~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y19_N14
+dffeas \soc_inst|switches_1|DataValid[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
+	.d(\soc_inst|switches_1|DataValid~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -15403,2091 +14525,1965 @@ dffeas \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.q(\soc_inst|switches_1|DataValid [0]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|switches_1|DataValid[0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|DataValid[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uwyvx4~0 (
+// Location: FF_X30_Y19_N31
+dffeas \soc_inst|switches_1|switch_store[0][0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[0]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][0]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][0] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y17_N23
+dffeas \soc_inst|switches_1|half_word_address[0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|switches_1|half_word_address~3_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|half_word_address [0]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|half_word_address[0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|half_word_address[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y17_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uwyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) )
+// \soc_inst|interconnect_1|HRDATA[1]~37_combout  = ( !\soc_inst|interconnect_1|mux_sel [0] & ( (((!\soc_inst|switches_1|read_enable~q ) # ((!\soc_inst|interconnect_1|mux_sel [1]) # (\soc_inst|interconnect_1|mux_sel [2]))) # 
+// (\soc_inst|switches_1|half_word_address [0])) ) ) # ( \soc_inst|interconnect_1|mux_sel [0] & ( (!\soc_inst|ram_1|byte_select [0]) # (((!\soc_inst|ram_1|read_cycle~q ) # ((\soc_inst|interconnect_1|mux_sel [2]) # (\soc_inst|interconnect_1|mux_sel [1])))) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|ram_1|byte_select [0]),
+	.datab(!\soc_inst|switches_1|half_word_address [0]),
+	.datac(!\soc_inst|ram_1|read_cycle~q ),
+	.datad(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datae(!\soc_inst|interconnect_1|mux_sel [0]),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
+	.datag(!\soc_inst|switches_1|read_enable~q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .lut_mask = 64'h0000000000020002;
-defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~37 .extended_lut = "on";
+defparam \soc_inst|interconnect_1|HRDATA[1]~37 .lut_mask = 64'hFFF3FAFFFFFFFFFF;
+defparam \soc_inst|interconnect_1|HRDATA[1]~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q77wx4~0 (
+// Location: LABCELL_X29_Y18_N33
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~20 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q77wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+// \soc_inst|interconnect_1|HRDATA[1]~20_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( (!\soc_inst|switches_1|half_word_address [1] & !\soc_inst|interconnect_1|HRDATA[1]~37_combout ) ) ) # ( !\soc_inst|interconnect_1|Equal1~0_combout  & ( 
+// !\soc_inst|interconnect_1|HRDATA[1]~37_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|switches_1|half_word_address [1]),
+	.datad(!\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .lut_mask = 64'h0F000F0000000000;
-defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~20 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~20 .lut_mask = 64'hFF00FF00F000F000;
+defparam \soc_inst|interconnect_1|HRDATA[1]~20 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~0 (
+// Location: LABCELL_X43_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cuyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~5_combout  = ( \soc_inst|m0_1|u_logic|Y9t2z4~q  & ( !\soc_inst|m0_1|u_logic|Zhyvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .lut_mask = 64'h8080AA5000000000;
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yyyvx4 (
+// Location: MLABCELL_X28_Y19_N54
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[0]~27 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yyyvx4~combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
+// \soc_inst|ram_1|data_to_memory[0]~27_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ) # (\soc_inst|ram_1|byte_select [0]))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (!\soc_inst|ram_1|byte_select [0] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|ram_1|byte_select [0]),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[0]~27_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yyyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yyyvx4 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Yyyvx4 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[0]~27 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[0]~27 .lut_mask = 64'h000C000C030F030F;
+defparam \soc_inst|ram_1|data_to_memory[0]~27 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~1 (
+// Location: FF_X29_Y14_N25
+dffeas \soc_inst|ram_1|saved_word_address[5] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|saved_word_address [5]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[5] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N12
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[5]~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yyyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Yyyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) )
+// \soc_inst|ram_1|memory.raddr_a[5]~5_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|S4qvx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [5])) ) ) # ( 
+// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [5] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~q ),
+	.datac(!\soc_inst|ram_1|saved_word_address [5]),
+	.datad(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~1_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[5]~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .lut_mask = 64'hF0D0F0D0A080A080;
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .lut_mask = 64'h0F0F0F0F03CF03CF;
+defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~2 (
+// Location: FF_X30_Y15_N49
+dffeas \soc_inst|ram_1|saved_word_address[6] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|saved_word_address [6]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[6] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N48
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[6]~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cuyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Q77wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q77wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[6]~6_combout  = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( \soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [6] ) ) ) # ( !\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( 
+// \soc_inst|ram_1|always1~0_combout  & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout  ) ) ) # ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [6] ) ) ) # ( 
+// !\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [6] ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|saved_word_address [6]),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cuyvx4~1_combout ),
+	.datae(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~2_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[6]~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .lut_mask = 64'h00000000EEEEE0E0;
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .lut_mask = 64'h0F0F0F0F55550F0F;
+defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~3 (
+// Location: FF_X28_Y15_N31
+dffeas \soc_inst|m0_1|u_logic|Szr2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Szr2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Szr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Szr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X21_Y14_N52
+dffeas \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cuyvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ( (\soc_inst|m0_1|u_logic|Cuyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Ohivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Szr2z4~q  & ( \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Szr2z4~q  & ( !\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Z6ovx4~combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cuyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .lut_mask = 64'h0F030F0300000000;
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .lut_mask = 64'h00C8FAC800FAFAFA;
+defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C1zvx4 (
+// Location: FF_X28_Y15_N32
+dffeas \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~53 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C1zvx4~combout  = ( \soc_inst|m0_1|u_logic|J4x2z4~q  & ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Nen2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|J4x2z4~q  & ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Nen2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|J4x2z4~q  & ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Nen2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Add2~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~58  ))
+// \soc_inst|m0_1|u_logic|Add2~54  = CARRY(( !\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~58  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~58 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C1zvx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~53_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~54 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C1zvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C1zvx4 .lut_mask = 64'hF0F0F0F00000F0F0;
-defparam \soc_inst|m0_1|u_logic|C1zvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~53 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~53 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Akewx4~0 (
+// Location: LABCELL_X17_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~49 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Akewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Add2~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~54  ))
+// \soc_inst|m0_1|u_logic|Add2~50  = CARRY(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~54  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~54 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~49_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~50 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Akewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Akewx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Akewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~49 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~49 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~0 (
+// Location: LABCELL_X17_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~45 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1j2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C1zvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C1zvx4~combout  ) ) # ( 
-// \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|C1zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & (((!\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|C1zvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~50  ))
+// \soc_inst|m0_1|u_logic|Add2~46  = CARRY(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~50  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C1zvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~50 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1j2z4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~45_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~46 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .lut_mask = 64'h30803F88FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~45 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~45 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~3 (
+// Location: LABCELL_X18_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1j2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( (((\soc_inst|m0_1|u_logic|M1j2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Rngwx4~combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))))) ) ) # ( \soc_inst|m0_1|u_logic|Yzi2z4~q  & 
-// ( (\soc_inst|m0_1|u_logic|M1j2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Bfhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|V4d3z4~q  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Add2~45_sumout ) # ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|V4d3z4~q  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~45_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~45_sumout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1j2z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .lut_mask = 64'h000000003F3FFFDF;
-defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .lut_mask = 64'hFA00FAFF00000000;
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~1 (
+// Location: LABCELL_X22_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C8rwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1j2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  & ((!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Akewx4~0_combout 
-// )))) # (\soc_inst|m0_1|u_logic|C1zvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Akewx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|C1zvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|C8rwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & !\soc_inst|m0_1|u_logic|Manwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C1zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1j2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .lut_mask = 64'h00000000FF5FDD5D;
-defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .lut_mask = 64'h0300030000000000;
+defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~2 (
+// Location: LABCELL_X22_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlnwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1j2z4~2_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~1_combout  & ( ((\soc_inst|interconnect_1|HREADY~0_combout  & !\soc_inst|m0_1|u_logic|Cuyvx4~3_combout )) # (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M1j2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .lut_mask = 64'h303330333F333F33;
-defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y9_N7
-dffeas \soc_inst|m0_1|u_logic|M1j2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M1j2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G02wx4 (
+// Location: LABCELL_X24_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oldwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G02wx4~combout  = ( \soc_inst|m0_1|u_logic|G02wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M1j2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  $ 
+// (\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G02wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G02wx4 .lut_mask = 64'h0000FFFF00000000;
-defparam \soc_inst|m0_1|u_logic|G02wx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y8_N38
-dffeas \soc_inst|m0_1|u_logic|Mcz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mcz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mcz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mcz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .lut_mask = 64'hAA55AA55FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yv1wx4~0 (
+// Location: LABCELL_X33_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lcowx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ob2wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Lcowx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qxc2z4~combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Qxc2z4~combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qxc2z4~combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wai2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qxc2z4~combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Wai2z4~q ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .lut_mask = 64'h55000500FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw1wx4~0 (
+// Location: LABCELL_X35_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oi2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vb2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Oi2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .lut_mask = 64'h00000000AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .lut_mask = 64'h0C000C0004040404;
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yv1wx4~1 (
+// Location: LABCELL_X36_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ut0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yv1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ut0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y6_N14
-dffeas \soc_inst|m0_1|u_logic|Wd13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wd13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wd13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wd13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .lut_mask = 64'h000000AA8F8F88AA;
+defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y9_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~1 (
+// Location: LABCELL_X35_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oi2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|If2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Oi2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ut0xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & !\soc_inst|m0_1|u_logic|Oi2wx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ut0xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & !\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|If2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|If2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|If2wx4~1 .lut_mask = 64'h0003000733337777;
-defparam \soc_inst|m0_1|u_logic|If2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .lut_mask = 64'hF000F000C000C000;
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~2 (
+// Location: LABCELL_X42_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Enrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|If2wx4~2_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|If2wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|If2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|If2wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & \soc_inst|m0_1|u_logic|If2wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Enrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  & 
+// ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qem2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|Pty2z4~q ))) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & 
+// ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|If2wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|If2wx4~2 .lut_mask = 64'h000000000303030F;
-defparam \soc_inst|m0_1|u_logic|If2wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .lut_mask = 64'h00FF77AA0055FF00;
+defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ydyvx4 (
+// Location: LABCELL_X43_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V2iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ydyvx4~combout  = (\soc_inst|m0_1|u_logic|Yv1wx4~0_combout  & \soc_inst|m0_1|u_logic|If2wx4~2_combout )
+// \soc_inst|m0_1|u_logic|V2iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( !\soc_inst|m0_1|u_logic|Enrwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ydyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ydyvx4 .lut_mask = 64'h0055005500550055;
-defparam \soc_inst|m0_1|u_logic|Ydyvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y8_N59
-dffeas \soc_inst|m0_1|u_logic|Fn23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fn23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fn23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fn23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~1 (
+// Location: LABCELL_X43_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Herwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sj62z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fn23z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wd13z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Herwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wd13z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fn23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sj62z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Herwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .lut_mask = 64'h00A0000000C00000;
-defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Herwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Herwx4~0 .lut_mask = 64'h44444444FF44FF44;
+defparam \soc_inst|m0_1|u_logic|Herwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pl62z4~0 (
+// Location: MLABCELL_X28_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Herwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pl62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cll2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Herwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Herwx4~0_combout  & ((\soc_inst|m0_1|u_logic|E4iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Viy2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cll2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Herwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pl62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Herwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Herwx4~1 .lut_mask = 64'h000000000AAA0AAA;
+defparam \soc_inst|m0_1|u_logic|Herwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw1wx4~1 (
+// Location: MLABCELL_X39_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Yafwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y10_N32
-dffeas \soc_inst|m0_1|u_logic|Ow33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow33z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .lut_mask = 64'h0303030303020302;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mw1wx4~1 (
+// Location: MLABCELL_X39_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Yafwx4~1_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y8_N23
-dffeas \soc_inst|m0_1|u_logic|X553z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X553z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X553z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X553z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .lut_mask = 64'h1101110100330033;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~0 (
+// Location: MLABCELL_X39_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sj62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|X553z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|X553z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ow33z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|X553z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ow33z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Yafwx4~2_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xhxvx4~combout  & (!\soc_inst|m0_1|u_logic|Yafwx4~0_combout  & !\soc_inst|m0_1|u_logic|Yafwx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yafwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Xhxvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ow33z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|X553z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yafwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yafwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sj62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .lut_mask = 64'h0040004000500000;
-defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .lut_mask = 64'hE000E000C000C000;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ue9wx4~0 (
+// Location: LABCELL_X36_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V1yvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|V1yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .lut_mask = 64'h00000000A0000000;
-defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu1wx4~1 (
+// Location: MLABCELL_X39_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wu1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Rjrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|m0_1|u_logic|Pty2z4~q  & !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y10_N2
-dffeas \soc_inst|m0_1|u_logic|Ikz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ikz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ikz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ikz2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y7_N32
-dffeas \soc_inst|m0_1|u_logic|Wzy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wzy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .lut_mask = 64'h5500550055A055A0;
+defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Meyvx4 (
+// Location: LABCELL_X37_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Meyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & \soc_inst|m0_1|u_logic|Yv1wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qllwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Meyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Meyvx4 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Meyvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y9_N31
-dffeas \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~2 (
+// Location: MLABCELL_X39_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkrwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sj62z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Ikz2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mkrwx4~combout  = ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|L8t2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ikz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sj62z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .lut_mask = 64'h00000000C8080000;
-defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mkrwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkrwx4 .lut_mask = 64'h0505050500000000;
+defparam \soc_inst|m0_1|u_logic|Mkrwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~3 (
+// Location: MLABCELL_X39_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3xvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sj62z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sj62z4~2_combout  & ( (\soc_inst|m0_1|u_logic|Mcz2z4~q  & (!\soc_inst|m0_1|u_logic|Sj62z4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Pl62z4~0_combout  & !\soc_inst|m0_1|u_logic|Sj62z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sj62z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Sj62z4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Pl62z4~0_combout  & !\soc_inst|m0_1|u_logic|Sj62z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|J3xvx4~combout  = ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ( (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qllwx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qllwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mcz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sj62z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pl62z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sj62z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sj62z4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sj62z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J3xvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .lut_mask = 64'hC000400000000000;
-defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J3xvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J3xvx4 .lut_mask = 64'hBBB0BBB000000000;
+defparam \soc_inst|m0_1|u_logic|J3xvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hx1wx4~0 (
+// Location: LABCELL_X36_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M66wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( \soc_inst|m0_1|u_logic|Ob2wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|M66wx4~combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M66wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M66wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M66wx4 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|M66wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hx1wx4~1 (
+// Location: MLABCELL_X39_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hx1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Yafwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|M66wx4~combout  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|M66wx4~combout  
+// & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|M66wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .lut_mask = 64'h0A0A0000AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N8
-dffeas \soc_inst|m0_1|u_logic|Grl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Grl2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X40_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yafwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Yafwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|J7swx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yafwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|J7swx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Yafwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Grl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Grl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .lut_mask = 64'hFAFA000032320000;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ax1wx4~0 (
+// Location: MLABCELL_X39_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ax1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Yafwx4~5_combout  = ( \soc_inst|m0_1|u_logic|J3xvx4~combout  & ( \soc_inst|m0_1|u_logic|Yafwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~2_combout  & (\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Qdj2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|J3xvx4~combout  & ( \soc_inst|m0_1|u_logic|Yafwx4~4_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|J3xvx4~combout  & ( !\soc_inst|m0_1|u_logic|Yafwx4~4_combout  & ( 
+// \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|J3xvx4~combout  & ( !\soc_inst|m0_1|u_logic|Yafwx4~4_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Yafwx4~2_combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|J3xvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yafwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .lut_mask = 64'h3333333333330202;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y9_N14
-dffeas \soc_inst|m0_1|u_logic|Spl2z4 (
+// Location: FF_X28_Y11_N46
+dffeas \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Spl2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Spl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Spl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~1 (
+// Location: LABCELL_X43_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bywwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Grl2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Spl2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ggswx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Viy2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Viy2z4~q )) # (\soc_inst|m0_1|u_logic|Csewx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Grl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Spl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bywwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ggswx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .lut_mask = 64'h0000000000500044;
-defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .lut_mask = 64'h55550000FDFD3030;
+defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rv1wx4~0 (
+// Location: LABCELL_X40_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2lwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout  & ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|G2lwx4~combout  = ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2lwx4~0_combout  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G2lwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G2lwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2lwx4 .lut_mask = 64'hAAAAAAAA00000000;
+defparam \soc_inst|m0_1|u_logic|G2lwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rv1wx4~1 (
+// Location: LABCELL_X40_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rv1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Ggswx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout 
+// ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ggswx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y9_N53
-dffeas \soc_inst|m0_1|u_logic|Psu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psu2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .lut_mask = 64'h0A0A0A0AFFFF0A0A;
+defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kv1wx4~0 (
+// Location: MLABCELL_X28_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kv1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ggswx4~2_combout  = ( \soc_inst|m0_1|u_logic|G2lwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ggswx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ggswx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|C9yvx4~combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ggswx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ggswx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .lut_mask = 64'h0000E0E000000000;
+defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N38
-dffeas \soc_inst|m0_1|u_logic|Qml2z4 (
+// Location: FF_X28_Y10_N28
+dffeas \soc_inst|m0_1|u_logic|Yaz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qml2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qml2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qml2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yaz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yaz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~3 (
+// Location: LABCELL_X35_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bywwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Psu2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Qml2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Qj2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~q 
+// )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// (((!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Nsk2z4~q )))) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Psu2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qml2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bywwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .lut_mask = 64'h0030002200000000;
-defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .lut_mask = 64'h02F0020F0200020F;
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~1 (
+// Location: LABCELL_X35_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hfyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qj2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .lut_mask = 64'h000003130F5F0F5F;
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .lut_mask = 64'h0C8C0C8CCCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~0 (
+// Location: LABCELL_X35_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ro0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ro0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ro0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .lut_mask = 64'h00040004000F000F;
+defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~2 (
+// Location: LABCELL_X35_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hfyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~combout  & (\soc_inst|m0_1|u_logic|Hfyvx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & \soc_inst|m0_1|u_logic|Hfyvx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ro0xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jucwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qj2wx4~1_combout  & !\soc_inst|m0_1|u_logic|Qj2wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hfyvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ro0xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .lut_mask = 64'h00000000000A002A;
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y10_N47
-dffeas \soc_inst|m0_1|u_logic|Gjt2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gjt2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gjt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gjt2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y9_N29
-dffeas \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y9_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~0 (
+// Location: LABCELL_X35_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wcyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|T1d3z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Fw0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fw0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .lut_mask = 64'hFFFC0000FFFC0000;
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .lut_mask = 64'h00000000A000A000;
+defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~1 (
+// Location: MLABCELL_X34_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ax0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wcyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q ) # (!\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Ax0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .lut_mask = 64'hFF00FF00FA00FA00;
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~2 (
+// Location: MLABCELL_X34_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vi2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wcyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Vi2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout  & (\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .lut_mask = 64'hCCCCCCCCCCC0CCC0;
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~3 (
+// Location: LABCELL_X35_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vi2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wcyvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wcyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wcyvx4~1_combout  & !\soc_inst|m0_1|u_logic|Wcyvx4~2_combout )) ) )
+// \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vi2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wcyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wcyvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wcyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .lut_mask = 64'h00000000C000C000;
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y8_N29
-dffeas \soc_inst|m0_1|u_logic|Po73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .lut_mask = 64'hF0C0F0C000000000;
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~2 (
+// Location: LABCELL_X31_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vb2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bywwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Po73z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Gjt2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Vb2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gjt2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Po73z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bywwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vb2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .lut_mask = 64'h00000000008800A0;
-defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .lut_mask = 64'hFAF0FAF0AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tw1wx4~0 (
+// Location: LABCELL_X35_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hw2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( \soc_inst|m0_1|u_logic|Ob2wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tw1wx4~1 (
+// Location: LABCELL_X35_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xr0xx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Xr0xx4~combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xr0xx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xr0xx4 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Xr0xx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y10_N32
-dffeas \soc_inst|m0_1|u_logic|Gf63z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf63z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X35_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jq2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))))) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((((\soc_inst|m0_1|u_logic|Fij2z4~q ))) # (\soc_inst|m0_1|u_logic|L8t2z4~q ))) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # 
+// ((\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|L8t2z4~q )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .lut_mask = 64'hBBFFF3F3B1F5FFFF;
+defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dv1wx4~0 (
+// Location: LABCELL_X35_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nz2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dv1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout  & ( (\soc_inst|m0_1|u_logic|Tw1wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nz2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bpzvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nz2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .lut_mask = 64'h3030303000000000;
-defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y10_N5
-dffeas \soc_inst|m0_1|u_logic|Eol2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eol2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eol2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eol2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .lut_mask = 64'h000000000CFF0C0C;
+defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~0 (
+// Location: LABCELL_X35_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zy2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bywwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Gf63z4~q  & ( \soc_inst|m0_1|u_logic|Eol2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gf63z4~q  & ( !\soc_inst|m0_1|u_logic|Eol2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gf63z4~q  & ( !\soc_inst|m0_1|u_logic|Eol2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zy2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q 
+//  & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Gf63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eol2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bywwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .lut_mask = 64'h00A0008000200000;
-defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .lut_mask = 64'h4400440044304430;
+defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4 (
+// Location: LABCELL_X35_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bywwx4~combout  = ( !\soc_inst|m0_1|u_logic|Bywwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Bywwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bywwx4~1_combout  & !\soc_inst|m0_1|u_logic|Bywwx4~3_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Fh2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nz2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zy2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Jq2wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bywwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bywwx4~3_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Bywwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bywwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nz2wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bywwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bywwx4 .lut_mask = 64'hA0A0000000000000;
-defparam \soc_inst|m0_1|u_logic|Bywwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .lut_mask = 64'hBBBBBBBBB000B000;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yonvx4~0 (
+// Location: MLABCELL_X39_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yonvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bywwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|U593z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sj62z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|U593z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Bywwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|U593z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|I793z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|U593z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|I793z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ey2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  
+// & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I793z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U593z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sj62z4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .lut_mask = 64'hCACACACACFCFCFC0;
-defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .lut_mask = 64'hCF00CF00CC0FCCFF;
+defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Shyvx4~0 (
+// Location: LABCELL_X35_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ru2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Shyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ru2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .lut_mask = 64'h0022AAAA0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .lut_mask = 64'h0004000400000000;
+defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmgwx4~0 (
+// Location: LABCELL_X35_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bt2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Bt2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ru2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Ru2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Hw2wx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bt2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .lut_mask = 64'h00100010F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ez8wx4~0 (
+// Location: LABCELL_X35_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Fh2wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Bt2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ey2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bt2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .lut_mask = 64'h0000000000A000A0;
-defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .lut_mask = 64'hFF32FF3200000000;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Elnvx4~0 (
+// Location: MLABCELL_X34_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Elnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
-// ((\soc_inst|m0_1|u_logic|Fvovx4~combout ) # (\soc_inst|m0_1|u_logic|S4qvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
-// ((\soc_inst|m0_1|u_logic|Fvovx4~combout ) # (\soc_inst|m0_1|u_logic|S4qvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  ) ) )
+// \soc_inst|m0_1|u_logic|L53wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Socwx4~0_combout  & (\soc_inst|m0_1|u_logic|X77wx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Socwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) # (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Elnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L53wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .lut_mask = 64'h0F0FCFCF050FCDCF;
-defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X17_Y5_N19
-dffeas \soc_inst|m0_1|u_logic|J6i2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Elnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J6i2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J6i2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L53wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~2 .lut_mask = 64'h0055005503570357;
+defparam \soc_inst|m0_1|u_logic|L53wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xknvx4~0 (
+// Location: MLABCELL_X34_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
-// ((\soc_inst|m0_1|u_logic|Rxzvx4~combout ) # (\soc_inst|m0_1|u_logic|Ekovx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
-// ((\soc_inst|m0_1|u_logic|Rxzvx4~combout ) # (\soc_inst|m0_1|u_logic|Ekovx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  ) ) )
+// \soc_inst|m0_1|u_logic|L53wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L53wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .lut_mask = 64'h0F0FAFAF030FABAF;
-defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~0 .lut_mask = 64'hF0F0F0F0F050F050;
+defparam \soc_inst|m0_1|u_logic|L53wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X17_Y5_N31
-dffeas \soc_inst|m0_1|u_logic|Kop2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X35_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L53wx4~1_combout  = ( \soc_inst|m0_1|u_logic|L53wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|L53wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|L53wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kop2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kop2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L53wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~1 .lut_mask = 64'h00000000FFF5FFF5;
+defparam \soc_inst|m0_1|u_logic|L53wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~53 (
+// Location: LABCELL_X35_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~58  ))
-// \soc_inst|m0_1|u_logic|Add2~54  = CARRY(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~58  ))
+// \soc_inst|m0_1|u_logic|L53wx4~3_combout  = ( \soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|L53wx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|L53wx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|L53wx4~2_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|L53wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L53wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~58 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~53_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~54 ),
+	.combout(\soc_inst|m0_1|u_logic|L53wx4~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~53 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~53 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~53 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~3 .lut_mask = 64'hAAFF0000AAFF0203;
+defparam \soc_inst|m0_1|u_logic|L53wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~49 (
+// Location: LABCELL_X36_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~54  ))
-// \soc_inst|m0_1|u_logic|Add2~50  = CARRY(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~54  ))
+// \soc_inst|m0_1|u_logic|Fh2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & ((\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~54 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~49_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~50 ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~49 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~49 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~49 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .lut_mask = 64'h03000300030003F0;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~45 (
+// Location: LABCELL_X35_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Op2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~50  ))
-// \soc_inst|m0_1|u_logic|Add2~46  = CARRY(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~50  ))
+// \soc_inst|m0_1|u_logic|Op2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~50 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~45_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~46 ),
+	.combout(\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~45 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~45 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~45 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfhvx4~0 (
+// Location: LABCELL_X36_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~45_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|V4d3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Fh2wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ark2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~45_sumout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .lut_mask = 64'hCF8BCF8B00000000;
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .lut_mask = 64'h0000505000A050F0;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mddwx4~1 (
+// Location: LABCELL_X36_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mddwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|It2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mddwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|It2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .lut_mask = 64'h5F005F0055005500;
-defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|It2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It2wx4~0 .lut_mask = 64'h000000000000AA00;
+defparam \soc_inst|m0_1|u_logic|It2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mddwx4~0 (
+// Location: LABCELL_X36_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mddwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Fh2wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|It2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fh2wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Op2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Fh2wx4~2_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mddwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fh2wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fh2wx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|It2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .lut_mask = 64'h0005050511155555;
-defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jfdwx4~0 (
+// Location: LABCELL_X35_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jfdwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Fh2wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fh2wx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .lut_mask = 64'h0C000C0000000000;
-defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .lut_mask = 64'h00000000F5FFF5FF;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kcdwx4~0 (
+// Location: LABCELL_X35_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xc2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kcdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) # (\soc_inst|m0_1|u_logic|Emi2z4~q  & (((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fh2wx4~4_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ) # 
+// (\soc_inst|m0_1|u_logic|L53wx4~3_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Fh2wx4~4_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L53wx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .lut_mask = 64'h2222F22222222222;
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .lut_mask = 64'h0F0F0F0F0E0F0E0F;
+defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kcdwx4~1 (
+// Location: LABCELL_X35_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kcdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kcdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Jfdwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ge2wx4~0_combout  = (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & \soc_inst|m0_1|u_logic|Xc2wx4~0_combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .lut_mask = 64'hDFCCCECC00000000;
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .lut_mask = 64'h00F000F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W19wx4~0 (
+// Location: LABCELL_X35_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W19wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|If2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ge2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W19wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W19wx4~0 .lut_mask = 64'hFF00FF000F000F00;
-defparam \soc_inst|m0_1|u_logic|W19wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~0 .lut_mask = 64'h00000000F500F500;
+defparam \soc_inst|m0_1|u_logic|If2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pm9wx4~0 (
+// Location: LABCELL_X29_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vb2wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Vb2wx4~combout  = ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vb2wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .lut_mask = 64'h0000000020002000;
-defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vb2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vb2wx4 .lut_mask = 64'h000000005F005F00;
+defparam \soc_inst|m0_1|u_logic|Vb2wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y5_N43
-dffeas \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE (
+// Location: FF_X35_Y16_N40
+dffeas \soc_inst|m0_1|u_logic|Zoy2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -17496,852 +16492,669 @@ dffeas \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Zoy2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zoy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zoy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y29wx4 (
+// Location: LABCELL_X37_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y29wx4~combout  = ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Kxkwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q 
+// ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y29wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y29wx4 .lut_mask = 64'h0002000200000000;
-defparam \soc_inst|m0_1|u_logic|Y29wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .lut_mask = 64'h30303030FFFF3030;
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzbwx4~0 (
+// Location: LABCELL_X36_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Kxkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Yzi2z4~q  & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Csewx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & ((\soc_inst|m0_1|u_logic|Ahwvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csewx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .lut_mask = 64'h0F000F00CFCCCFCC;
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .lut_mask = 64'h0AAA0AAA0ACE0ACE;
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4dwx4~0 (
+// Location: LABCELL_X36_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W4dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Fyrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|Z3yvx4~combout  & ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z3yvx4~combout  & ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fyrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .lut_mask = 64'h0000F0FF0000FFFF;
-defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .lut_mask = 64'hC0CCC0CC40444044;
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5dwx4~0 (
+// Location: LABCELL_X36_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyrwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y5dwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( (\soc_inst|m0_1|u_logic|Fyrwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( \soc_inst|m0_1|u_logic|Fyrwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fyrwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .lut_mask = 64'h00DF0000000F0000;
-defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .lut_mask = 64'h5555555555015501;
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4dwx4~1 (
+// Location: LABCELL_X37_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Surwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W4dwx4~1_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Surwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Surwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Surwx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Surwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qslwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qslwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ukpvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .lut_mask = 64'h0000030033003300;
-defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .lut_mask = 64'hFFFF0000AAAA0000;
+defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1awx4~0 (
+// Location: LABCELL_X37_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dghvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D1awx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # (\soc_inst|m0_1|u_logic|Y5dwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # (\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Y5dwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Dghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Surwx4~0_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Surwx4~0_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dghvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D1awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D1awx4~0 .lut_mask = 64'h0A0A8A8A0AAA8AAA;
-defparam \soc_inst|m0_1|u_logic|D1awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .lut_mask = 64'hEEAAEEAACC00CC00;
+defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U2s2z4~feeder (
+// Location: LABCELL_X37_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U2s2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|E4xvx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U2s2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U2s2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U2s2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|U2s2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y8_N10
-dffeas \soc_inst|m0_1|u_logic|U2s2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|U2s2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U2s2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U2s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U2s2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y7_N8
-dffeas \soc_inst|m0_1|u_logic|Cy43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cy43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cy43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cy43z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y9_N50
-dffeas \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~2 (
+// Location: LABCELL_X40_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dsqvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|U2s2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Cy43z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Dsqvx4~combout  = ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2s2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cy43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .lut_mask = 64'h000000C0000000A0;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y7_N56
-dffeas \soc_inst|m0_1|u_logic|L763z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L763z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L763z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L763z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y4_N43
-dffeas \soc_inst|m0_1|u_logic|To33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|To33z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|To33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|To33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dsqvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dsqvx4 .lut_mask = 64'h0000000000CC00CC;
+defparam \soc_inst|m0_1|u_logic|Dsqvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~3 (
+// Location: LABCELL_X37_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L763z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|To33z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Gvrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|L763z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|To33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .lut_mask = 64'h0500040400000000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y8_N25
-dffeas \soc_inst|m0_1|u_logic|Kf23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kf23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kf23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kf23z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y8_N32
-dffeas \soc_inst|m0_1|u_logic|W5s2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W5s2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W5s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W5s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .lut_mask = 64'h1F001F00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~0 (
+// Location: LABCELL_X29_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|W5s2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kf23z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Lwqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kf23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|W5s2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .lut_mask = 64'h4A40000000000000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y4_N29
-dffeas \soc_inst|m0_1|u_logic|Rpe3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rpe3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rpe3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rpe3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y4_N11
-dffeas \soc_inst|m0_1|u_logic|Hue3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hue3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hue3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hue3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .lut_mask = 64'h00000000FBFFFBFF;
+defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y4_N8
-dffeas \soc_inst|m0_1|u_logic|Fre3z4 (
+// Location: FF_X22_Y20_N8
+dffeas \soc_inst|switches_1|switch_store[0][5] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\SW[5]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fre3z4~q ),
+	.q(\soc_inst|switches_1|switch_store[0][5]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fre3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fre3z4 .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[0][5] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][5] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N71xx4~0 (
+// Location: LABCELL_X22_Y20_N6
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[5]~28 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N71xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+// \soc_inst|interconnect_1|HRDATA[5]~28_combout  = ( \soc_inst|switches_1|switch_store[0][5]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
+// (\soc_inst|interconnect_1|HRDATA[7]~10_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][5]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & 
+// ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (!\soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( \soc_inst|switches_1|switch_store[0][5]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & 
+// (\soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][5]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datae(!\soc_inst|switches_1|switch_store[0][5]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N71xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N71xx4~0 .lut_mask = 64'h0000000050005000;
-defparam \soc_inst|m0_1|u_logic|N71xx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[5]~28 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[5]~28 .lut_mask = 64'hF000F303FC0CFF0F;
+defparam \soc_inst|interconnect_1|HRDATA[5]~28 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y21xx4~0 (
+// Location: LABCELL_X29_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvqvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y21xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Xnrvx4~0_combout  & \soc_inst|m0_1|u_logic|Ueovx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .lut_mask = 64'h4000400000000000;
-defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .lut_mask = 64'h0000000000040000;
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~4 (
+// Location: MLABCELL_X34_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yanvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~4_combout  = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hue3z4~q  & (\soc_inst|m0_1|u_logic|Fre3z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rpe3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hue3z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rpe3z4~q 
-// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fre3z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rpe3z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rpe3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Yanvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F0y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( !\soc_inst|interconnect_1|HRDATA[5]~28_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|F0y2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & !\soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F0y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  ) ) # ( 
+// !\soc_inst|m0_1|u_logic|F0y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rpe3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hue3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fre3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yanvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .lut_mask = 64'hFF550F0533110301;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .lut_mask = 64'hAAAAFFFFA0A0F0F0;
+defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y8_N56
-dffeas \soc_inst|m0_1|u_logic|I4s2z4 (
+// Location: FF_X34_Y19_N56
+dffeas \soc_inst|m0_1|u_logic|F0y2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Yanvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I4s2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F0y2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I4s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I4s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F0y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F0y2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~1 (
+// Location: LABCELL_X37_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ctrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|I4s2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|G1s2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ctrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & !\soc_inst|m0_1|u_logic|F0y2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xly2z4~q ) # ((\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & !\soc_inst|m0_1|u_logic|F0y2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|I4s2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ctrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .lut_mask = 64'h8080000050000000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y8_N50
-dffeas \soc_inst|m0_1|u_logic|Dq83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dq83z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dq83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dq83z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X40_Y8_N32
-dffeas \soc_inst|m0_1|u_logic|Duv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Duv2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Duv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .lut_mask = 64'hFF10FF1010101010;
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~6 (
+// Location: LABCELL_X37_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ctrwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Uku2z4~q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Duv2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ctrwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ctrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Surwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dsqvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Dsqvx4~combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Duv2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uku2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .lut_mask = 64'h0000000000E40000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .lut_mask = 64'h7077707700000000;
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pu1wx4 (
+// Location: MLABCELL_X34_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cllwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pu1wx4~combout  = ( \soc_inst|m0_1|u_logic|G02wx4~0_combout  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Cllwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & (((!\soc_inst|m0_1|u_logic|C9yvx4~combout 
+// ) # (\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pu1wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pu1wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Pu1wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .lut_mask = 64'hDD8DDD8D00000000;
+defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N16
-dffeas \soc_inst|m0_1|u_logic|Tse3z4 (
+// Location: FF_X37_Y10_N47
+dffeas \soc_inst|m0_1|u_logic|I6z2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tse3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I6z2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tse3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tse3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I6z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I6z2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y8_N25
-dffeas \soc_inst|m0_1|u_logic|Ug73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ug73z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X37_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kghvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) # (\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|I6z2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Ctrwx4~1_combout  & (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ((\soc_inst|m0_1|u_logic|Cllwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qtrwx4~0_combout )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ug73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ug73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .lut_mask = 64'h0013FF330013FF33;
+defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y8_N5
-dffeas \soc_inst|m0_1|u_logic|Cxc3z4 (
+// Location: FF_X37_Y10_N46
+dffeas \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cxc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cxc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cxc3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X46_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Ug73z4~q  & ( \soc_inst|m0_1|u_logic|Cxc3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ug73z4~q  & ( !\soc_inst|m0_1|u_logic|Cxc3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ug73z4~q  & ( !\soc_inst|m0_1|u_logic|Cxc3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  $ 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ug73z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cxc3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .lut_mask = 64'h0021000100200000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S61xx4~0 (
+// Location: LABCELL_X36_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dghvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S61xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Dghvx4~1_combout  = ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Cllwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout  & \soc_inst|m0_1|u_logic|Cllwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S61xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S61xx4~0 .lut_mask = 64'h0000000000500050;
-defparam \soc_inst|m0_1|u_logic|S61xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .lut_mask = 64'h0044EEEE0444EEEE;
+defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~7 (
+// Location: FF_X36_Y9_N13
+dffeas \soc_inst|m0_1|u_logic|W7z2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W7z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W7z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Vf5wx4~5_combout  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dq83z4~q  & (!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tse3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vf5wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tse3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wfhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|W7z2z4~q  & \soc_inst|m0_1|u_logic|I6z2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dq83z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tse3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vf5wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .lut_mask = 64'hC0F0000040500000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~8 (
+// Location: LABCELL_X37_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Vf5wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Vf5wx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|Vf5wx4~0_combout  & \soc_inst|m0_1|u_logic|Vf5wx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wfhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vf5wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vf5wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .lut_mask = 64'h0000000000800000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .lut_mask = 64'hFAFAAAAAF0F00000;
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzbwx4~1 (
+// Location: LABCELL_X37_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D1awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|D1awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Kzbwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|D1awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|D1awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Wfhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Cllwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ((\soc_inst|m0_1|u_logic|K9z2z4~q ))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Cllwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & (((\soc_inst|m0_1|u_logic|K9z2z4~q )))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout  & ((\soc_inst|m0_1|u_logic|K9z2z4~q ) # (\soc_inst|m0_1|u_logic|Wfhvx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wfhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .lut_mask = 64'h0FFFCFFF00FFCCFF;
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .lut_mask = 64'h10FA10FA50FA50FA;
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y6_N32
-dffeas \soc_inst|m0_1|u_logic|I2t2z4 (
+// Location: FF_X37_Y10_N14
+dffeas \soc_inst|m0_1|u_logic|K9z2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -18350,2489 +17163,2896 @@ dffeas \soc_inst|m0_1|u_logic|I2t2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K9z2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I2t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I2t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K9z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K9z2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lk9wx4~0 (
+// Location: LABCELL_X37_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tykwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lk9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~q  & ( (\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~q  & ( ((\soc_inst|m0_1|u_logic|Y29wx4~combout  
-// & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Tykwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6z2z4~q  & ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|K9z2z4~q ))) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|I6z2z4~q  & ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|I6z2z4~q  & ( !\soc_inst|m0_1|u_logic|W7z2z4~q  & 
+// ( \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|I6z2z4~q  & ( !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tykwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .lut_mask = 64'h7373737350505050;
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .lut_mask = 64'h0A0A0F0F0A0A0B0B;
+defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y5_N11
-dffeas \soc_inst|m0_1|u_logic|Wxp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X40_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tykwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tykwx4~1_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Auk2z4~q ) # ((\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Tykwx4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tykwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Tykwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wxp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wxp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .lut_mask = 64'h000000000000FF50;
+defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y5_N17
-dffeas \soc_inst|m0_1|u_logic|C3w2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kxkwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Tykwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout  & (!\soc_inst|m0_1|u_logic|Kxkwx4~1_combout  & !\soc_inst|m0_1|u_logic|Kxkwx4~0_combout )) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kxkwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kxkwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tykwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C3w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C3w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .lut_mask = 64'h3000300000000000;
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X17_Y5_N49
-dffeas \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE (
+// Location: FF_X28_Y10_N22
+dffeas \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B2uvx4~0 (
+// Location: LABCELL_X35_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B2uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Mjl2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ge2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .lut_mask = 64'h0F000F0000000000;
-defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .lut_mask = 64'hFCCCFCCCF000F000;
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfuwx4 (
+// Location: LABCELL_X35_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wfuwx4~combout  = ( \soc_inst|m0_1|u_logic|Lz93z4~q  & ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|J6i2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ge2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ge2wx4~1_combout  & ((\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ge2wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wfuwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wfuwx4 .lut_mask = 64'h00000000000000FF;
-defparam \soc_inst|m0_1|u_logic|Wfuwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .lut_mask = 64'h000000003F003F00;
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K7pwx4 (
+// Location: LABCELL_X27_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K7pwx4~combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|Kop2z4~q  & (\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Mjl2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Vb2wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K7pwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K7pwx4 .lut_mask = 64'h0000000000040004;
-defparam \soc_inst|m0_1|u_logic|K7pwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .lut_mask = 64'h00FF000000FF0000;
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0uvx4 (
+// Location: MLABCELL_X28_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rafwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z0uvx4~combout  = ( \soc_inst|m0_1|u_logic|N1uvx4~combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Rafwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout  & !\soc_inst|m0_1|u_logic|R1d2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z0uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z0uvx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Z0uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .lut_mask = 64'h2303230333033303;
+defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y14_N13
-dffeas \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE (
+// Location: FF_X28_Y11_N40
+dffeas \soc_inst|m0_1|u_logic|Rni2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rni2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rni2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6tvx4~0 (
+// Location: LABCELL_X35_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ob2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H6tvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( (\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (!\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|Kop2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Ob2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ob2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .lut_mask = 64'h1000100000000000;
-defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .lut_mask = 64'hFCFCCCCCF0F00000;
+defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4uvx4~0 (
+// Location: LABCELL_X29_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ob2wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T4uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lz93z4~q  & ( (\soc_inst|m0_1|u_logic|Ffs2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Kop2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Ob2wx4~combout  = ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ob2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ob2wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .lut_mask = 64'h0010001000000000;
-defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ob2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ob2wx4 .lut_mask = 64'h000000000CCC0CCC;
+defparam \soc_inst|m0_1|u_logic|Ob2wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txtvx4~0 (
+// Location: LABCELL_X35_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Txtvx4~0_combout  = (\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|T4uvx4~0_combout )
+// \soc_inst|m0_1|u_logic|Yg2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout  & (\soc_inst|m0_1|u_logic|Auk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .lut_mask = 64'h0505050505050505;
-defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ab9wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ab9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yg2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .lut_mask = 64'h0000008000000000;
-defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .lut_mask = 64'h008A008A8A8A8A8A;
+defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A1yvx4~0 (
+// Location: LABCELL_X35_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg2wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A1yvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qem2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Yg2wx4~combout  = ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Yg2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Yg2wx4~0_combout  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yg2wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .lut_mask = 64'h4401440100000000;
-defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yg2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yg2wx4 .lut_mask = 64'h0103010311331133;
+defparam \soc_inst|m0_1|u_logic|Yg2wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnpvx4~0 (
+// Location: MLABCELL_X34_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xc2wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( ((\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|A1yvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Xc2wx4~combout  = ( \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yg2wx4~combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .lut_mask = 64'h000000003F333F33;
-defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xc2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xc2wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Xc2wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~0 (
+// Location: LABCELL_X29_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hx1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fmqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & \soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Mnpvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( \soc_inst|m0_1|u_logic|Ob2wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .lut_mask = 64'h22FF22FF22222222;
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dsqvx4 (
+// Location: LABCELL_X27_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ax1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dsqvx4~combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|C2yvx4~combout  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ax1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
 	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dsqvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dsqvx4 .lut_mask = 64'h0505000005050000;
-defparam \soc_inst|m0_1|u_logic|Dsqvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .lut_mask = 64'h00000F0F00000F0F;
+defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irqvx4~0 (
+// Location: FF_X28_Y14_N26
+dffeas \soc_inst|m0_1|u_logic|Gmm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gmm2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gmm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gmm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rv1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Irqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|G97wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout  & ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .lut_mask = 64'h0A000A00AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irqvx4~1 (
+// Location: LABCELL_X30_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rv1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Irqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nbm2z4~q  & ( \soc_inst|m0_1|u_logic|Irqvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Rv1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~1 (
+// Location: FF_X28_Y11_N35
+dffeas \soc_inst|m0_1|u_logic|Rvu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rvu2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rvu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rvu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fmqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Dwl2z4~q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout 
-//  & ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Dwl2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( !\soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|If2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout 
+// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|If2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .lut_mask = 64'h0000F0F0AAAAFAFA;
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~1 .lut_mask = 64'h0011555500135F5F;
+defparam \soc_inst|m0_1|u_logic|If2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hhpvx4~0 (
+// Location: MLABCELL_X28_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hhpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|If2wx4~2_combout  = ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|If2wx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .lut_mask = 64'h3030300030303000;
-defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~2 .lut_mask = 64'h0000000000005757;
+defparam \soc_inst|m0_1|u_logic|If2wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gxxvx4~0 (
+// Location: MLABCELL_X28_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hx1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rxl2z4~q  $ (!\soc_inst|m0_1|u_logic|Yzi2z4~q  $ (!\soc_inst|m0_1|u_logic|Xly2z4~q  $ (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rxl2z4~q  $ (!\soc_inst|m0_1|u_logic|Yzi2z4~q  $ (!\soc_inst|m0_1|u_logic|Xly2z4~q  $ (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Hx1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .lut_mask = 64'h6996699696699669;
-defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ljpvx4~0 (
+// Location: FF_X27_Y14_N1
+dffeas \soc_inst|m0_1|u_logic|Unm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Unm2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Unm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Unm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kv1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ljpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Nqy2z4~q  $ (!\soc_inst|m0_1|u_logic|Zoy2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Nqy2z4~q  $ (\soc_inst|m0_1|u_logic|Zoy2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Kv1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .lut_mask = 64'h5AA55AA5A55AA55A;
-defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xipvx4~0 (
+// Location: FF_X28_Y12_N13
+dffeas \soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xipvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|Ukpvx4~combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|Ukpvx4~combout ))) # (\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Q8ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Unm2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Gmm2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Rvu2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gmm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rvu2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Unm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .lut_mask = 64'h00FF08FF00000808;
-defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .lut_mask = 64'hFF00CCCCAAAAF0F0;
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Onqvx4~0 (
+// Location: FF_X28_Y10_N23
+dffeas \soc_inst|m0_1|u_logic|Svk2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Svk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tw1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Onqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vnqvx4~0_combout  $ ((((!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( \soc_inst|m0_1|u_logic|Ob2wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Onqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .lut_mask = 64'h0000000039333933;
-defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yplwx4~0 (
+// Location: LABCELL_X27_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tw1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yplwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Tw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .lut_mask = 64'h3030000000000000;
-defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vopvx4~0 (
+// Location: FF_X28_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Ii63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ii63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ii63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ii63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vopvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dplwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G97wx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dplwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|G97wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hfyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .lut_mask = 64'hFFCC0000F0C00000;
-defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .lut_mask = 64'h000300130F0F5F5F;
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~2 (
+// Location: LABCELL_X29_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fmqvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Vopvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Onqvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Onqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Onqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .lut_mask = 64'h80408040C0C0C0C0;
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~3 (
+// Location: LABCELL_X29_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fmqvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fmqvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fmqvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Fmqvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Hfyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Hfyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~combout  & (((\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fmqvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fmqvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hfyvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .lut_mask = 64'h0000000050F00000;
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .lut_mask = 64'h00000000000002AA;
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~0 (
+// Location: FF_X28_Y11_N10
+dffeas \soc_inst|m0_1|u_logic|Imt2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Imt2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Imt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Imt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dv1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Dv1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .lut_mask = 64'h00CF00CF000F000F;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .lut_mask = 64'h00000000FF000000;
+defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~2 (
+// Location: FF_X27_Y10_N22
+dffeas \soc_inst|m0_1|u_logic|Skm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Skm2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Skm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rr73z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Rr73z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rr73z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .lut_mask = 64'h0145014500000000;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rr73z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rr73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Rr73z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ffxvx4~0 (
+// Location: MLABCELL_X28_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ffxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Wcyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .lut_mask = 64'h0000000000050005;
-defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .lut_mask = 64'hAAAAAAAAAAA0AAA0;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~3 (
+// Location: LABCELL_X29_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Wcyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~q  
+// & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .lut_mask = 64'hC080C080F0A0F0A0;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .lut_mask = 64'hFFFFFCFC00000000;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~4 (
+// Location: LABCELL_X29_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Rfpvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Xhxvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Wcyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rfpvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .lut_mask = 64'h00000000FEFFFEFF;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .lut_mask = 64'hFFFAFFFA00000000;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~1 (
+// Location: LABCELL_X29_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Tki2z4~q ))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Wcyvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wcyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Wcyvx4~1_combout  & !\soc_inst|m0_1|u_logic|Wcyvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wcyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wcyvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wcyvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .lut_mask = 64'hD0C0D0C010001000;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .lut_mask = 64'h0000000080808080;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~1 (
+// Location: FF_X24_Y9_N19
+dffeas \soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rr73z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G27wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Q8ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Skm2z4~q  & ( \soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Ii63z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Imt2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Skm2z4~q  & ( \soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Ii63z4~q ) # ((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Imt2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Skm2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Ii63z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Imt2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Skm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ii63z4~q ) # ((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Imt2z4~q ) # (\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ii63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Imt2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Skm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G27wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G27wx4~1 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|G27wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .lut_mask = 64'hFDAD5D0DF8A85808;
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ae6wx4~0 (
+// Location: MLABCELL_X28_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ae6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Q8ywx4~combout  = ( \soc_inst|m0_1|u_logic|Q8ywx4~1_combout  & ( \soc_inst|m0_1|u_logic|Q8ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Q8ywx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Q8ywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Q8ywx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Q8ywx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4 .lut_mask = 64'h0000003300CC00FF;
+defparam \soc_inst|m0_1|u_logic|Q8ywx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~1 (
+// Location: MLABCELL_X28_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bkxvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|G27wx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q8ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Q8ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (!\soc_inst|m0_1|u_logic|Wai2z4~q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .lut_mask = 64'hFF00FF00E400E400;
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .lut_mask = 64'h0808080808CC08CC;
+defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~2 (
+// Location: MLABCELL_X28_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D5ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bkxvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|J7swx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|J7swx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|A7ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|A7ywx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bkxvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .lut_mask = 64'h3232323232003200;
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .lut_mask = 64'hFF00FF00F00FF00F;
+defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9swx4~0 (
+// Location: LABCELL_X22_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D31wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9swx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dvy2z4~q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|D31wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & !\soc_inst|m0_1|u_logic|Manwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9swx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9swx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9swx4~0 .lut_mask = 64'h7D7F7D7FFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|U9swx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D31wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D31wx4~0 .lut_mask = 64'h0B000B000B000800;
+defparam \soc_inst|m0_1|u_logic|D31wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S8swx4~0 (
+// Location: LABCELL_X22_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S8swx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & (((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|U9swx4~0_combout )))) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & (((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Swy2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U9swx4~0_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Fjlwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jp3wx4~combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U9swx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datag(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S8swx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S8swx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|S8swx4~0 .lut_mask = 64'hFAFAFFFAFABAAABA;
-defparam \soc_inst|m0_1|u_logic|S8swx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .lut_mask = 64'hFF33FF3300000000;
+defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~0 (
+// Location: LABCELL_X22_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bkxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Qs7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .lut_mask = 64'h8C8C8C8C008C008C;
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .lut_mask = 64'hAA00AA0000000000;
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4 (
+// Location: LABCELL_X22_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bkxvx4~combout  = ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|S8swx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bkxvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|S8swx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bkxvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bkxvx4 .lut_mask = 64'h0000000000003033;
-defparam \soc_inst|m0_1|u_logic|Bkxvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~5 (
+// Location: LABCELL_X22_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~5_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Bkxvx4~combout ) # (\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Phlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X77wx4~combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .lut_mask = 64'h00000000FFDFFFDF;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y7_N13
-dffeas \soc_inst|m0_1|u_logic|Fzl2z4 (
+// Location: FF_X28_Y11_N41
+dffeas \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fzl2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X35_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejawx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ejawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & \soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ejawx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .lut_mask = 64'hF0F0F0F000F000F0;
-defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y6_N13
-dffeas \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE (
+// Location: FF_X28_Y11_N38
+dffeas \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y10_N49
-dffeas \soc_inst|m0_1|u_logic|Cc73z4 (
+// Location: FF_X28_Y11_N26
+dffeas \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cc73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cc73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y10_N28
-dffeas \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE (
+// Location: FF_X27_Y12_N32
+dffeas \soc_inst|m0_1|u_logic|Gjt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Gjt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gjt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gjt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y10_N26
-dffeas \soc_inst|m0_1|u_logic|Sa23z4 (
+// Location: FF_X27_Y12_N17
+dffeas \soc_inst|m0_1|u_logic|Po73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sa23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Po73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sa23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sa23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Po73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~6 (
+// Location: LABCELL_X27_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Sa23z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sa23z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sa23z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Bywwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Gjt2z4~q  & ( \soc_inst|m0_1|u_logic|Po73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gjt2z4~q  & ( !\soc_inst|m0_1|u_logic|Po73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gjt2z4~q  & ( !\soc_inst|m0_1|u_logic|Po73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sa23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gjt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Po73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bywwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .lut_mask = 64'h00C0000000800080;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .lut_mask = 64'h0500010004000000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qc1xx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qc1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y12_N20
+dffeas \soc_inst|m0_1|u_logic|Psu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Psu2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .lut_mask = 64'h000000000A0A0000;
-defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Psu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z9dwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z9dwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y12_N47
+dffeas \soc_inst|m0_1|u_logic|Qml2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qml2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .lut_mask = 64'h00000000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qml2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qml2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jk0xx4~0 (
+// Location: MLABCELL_X28_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jk0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Bywwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Psu2z4~q  & ( \soc_inst|m0_1|u_logic|Qml2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Psu2z4~q  & ( !\soc_inst|m0_1|u_logic|Qml2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Psu2z4~q  & ( !\soc_inst|m0_1|u_logic|Qml2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Psu2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qml2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bywwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .lut_mask = 64'h0000000005050505;
-defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .lut_mask = 64'h0050004000100000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xkfwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xkfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y12_N38
+dffeas \soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .lut_mask = 64'h00FF000000000000;
-defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kryvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kryvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout )) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y12_N35
+dffeas \soc_inst|m0_1|u_logic|Spl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Spl2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .lut_mask = 64'h111111111111F1F1;
-defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Spl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Spl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj0xx4 (
+// Location: LABCELL_X27_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aj0xx4~combout  = ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jk0xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Jk0xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Yg2wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Jk0xx4~0_combout  & !\soc_inst|m0_1|u_logic|Yg2wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Bywwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Spl2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Spl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Spl2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Spl2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bywwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aj0xx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aj0xx4 .lut_mask = 64'h550055005D0C5D0C;
-defparam \soc_inst|m0_1|u_logic|Aj0xx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .lut_mask = 64'h0003000200010000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ujqvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|B73wx4~combout  & 
-// \soc_inst|m0_1|u_logic|Aj0xx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aj0xx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Aj0xx4~combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Aj0xx4~combout ))) 
-// ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y10_N32
+dffeas \soc_inst|m0_1|u_logic|Eol2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Eol2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .lut_mask = 64'h0004000400FF0004;
-defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eol2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eol2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gjqvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  = (\soc_inst|m0_1|u_logic|Thm2z4~q  & !\soc_inst|m0_1|u_logic|Aj0xx4~combout )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .lut_mask = 64'h0F000F000F000F00;
-defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xdnvx4~0 (
+// Location: LABCELL_X27_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Thm2z4~q  & ( \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Thm2z4~q  & ( \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Thm2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Gjqvx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Thm2z4~q  & ( !\soc_inst|m0_1|u_logic|Gjqvx4~0_combout  & ( 
-// (\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Ujqvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Bywwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Eol2z4~q  & ( \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eol2z4~q  & ( !\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eol2z4~q  & ( !\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Eol2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bywwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .lut_mask = 64'h0303CFCFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X22_Y10_N1
-dffeas \soc_inst|m0_1|u_logic|Thm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Thm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Thm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Thm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .lut_mask = 64'h0A00020008000000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~0 (
+// Location: MLABCELL_X28_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G5qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Thm2z4~q  & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Thm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Bywwx4~combout  = ( !\soc_inst|m0_1|u_logic|Bywwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bywwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bywwx4~2_combout  & !\soc_inst|m0_1|u_logic|Bywwx4~3_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bywwx4~2_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Bywwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bywwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bywwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bywwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .lut_mask = 64'h000000000A3A0030;
-defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4 .lut_mask = 64'hAA00000000000000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfd2z4~0 (
+// Location: MLABCELL_X34_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q77wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfd2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Q77wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .lut_mask = 64'h0004000400000000;
-defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dfd2z4 (
+// Location: LABCELL_X29_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H0zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dfd2z4~combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  
-// )
+// \soc_inst|m0_1|u_logic|H0zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|X77wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dfd2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dfd2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dfd2z4 .lut_mask = 64'hFFFFFFFFFFAFFFAF;
-defparam \soc_inst|m0_1|u_logic|Dfd2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qobwx4~0 (
+// Location: LABCELL_X37_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qobwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q77wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Xx2wx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Cuyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .lut_mask = 64'h0000000000300030;
-defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .lut_mask = 64'hA000828200008080;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R29wx4~0 (
+// Location: LABCELL_X37_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yyyvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R29wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qobwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xwawx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Yyyvx4~combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R29wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R29wx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|R29wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yyyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yyyvx4 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Yyyvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1bvx4 (
+// Location: LABCELL_X37_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E1bvx4~combout  = ( \soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (((\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Zhyvx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yyyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Yyyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Nsk2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E1bvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E1bvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E1bvx4 .lut_mask = 64'h4B5A4B5AC3F0C3F0;
-defparam \soc_inst|m0_1|u_logic|E1bvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .lut_mask = 64'hFD00FD00A800A800;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zznvx4~0 (
+// Location: LABCELL_X35_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zznvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Cuyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cuyvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zznvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .lut_mask = 64'h0000000000100010;
-defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .lut_mask = 64'h00000000EEEEE0E0;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxnvx4~0 (
+// Location: LABCELL_X35_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vxnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Cuyvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ( (\soc_inst|m0_1|u_logic|Cuyvx4~2_combout  & \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ( \soc_inst|m0_1|u_logic|Cuyvx4~2_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cuyvx4~2_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vxnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .lut_mask = 64'hF030F03000000000;
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .lut_mask = 64'h3333003300000000;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8rwx4~0 (
+// Location: MLABCELL_X34_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C1zvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8rwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (!\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|C1zvx4~combout  = ( \soc_inst|m0_1|u_logic|J4x2z4~q  & ( !\soc_inst|m0_1|u_logic|Nen2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|J4x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nen2z4~q  & !\soc_inst|m0_1|u_logic|Msyvx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C1zvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .lut_mask = 64'hFFAFEEEE00000000;
-defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C1zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C1zvx4 .lut_mask = 64'hCC00CC00CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|C1zvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R7iwx4~1 (
+// Location: LABCELL_X33_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Akewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R7iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & !\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Akewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .lut_mask = 64'hAAAA0000A0A00000;
-defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Akewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Akewx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Akewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fhc2z4~0 (
+// Location: MLABCELL_X34_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fhc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  ) )
+// \soc_inst|m0_1|u_logic|M1j2z4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|C1zvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|C1zvx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|C1zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Fij2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|C1zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  $ (!\soc_inst|m0_1|u_logic|O5t2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C1zvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1j2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .lut_mask = 64'h00000000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .lut_mask = 64'h3C543050FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~2 (
+// Location: MLABCELL_X34_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zqpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Akewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|M1j2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( (((\soc_inst|m0_1|u_logic|M1j2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Yzi2z4~q  & 
+// ( (\soc_inst|m0_1|u_logic|M1j2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1j2z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .lut_mask = 64'hFF0FFF0F00000000;
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .lut_mask = 64'h000000000FFFFFDF;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~0 (
+// Location: MLABCELL_X34_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zqpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|M1j2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Akewx4~0_combout 
+// )))) # (\soc_inst|m0_1|u_logic|C1zvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Akewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|C1zvx4~combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|C1zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1j2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .lut_mask = 64'h5700570055005500;
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .lut_mask = 64'h00000000BFBFBF33;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~1 (
+// Location: LABCELL_X35_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zqpvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Zqpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|M1j2z4~2_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~1_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ) # (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M1j2z4~1_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Cuyvx4~3_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|M1j2z4~1_combout  & ( 
+// !\soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|M1j2z4~1_combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~1_combout ),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .lut_mask = 64'hCFCCCFCC00000000;
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .lut_mask = 64'h333333330303F3F3;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P37wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P37wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// \soc_inst|m0_1|u_logic|Aok2z4~q )))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( ((\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|X77wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q ))))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P37wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y11_N52
+dffeas \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P37wx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|P37wx4~1 .lut_mask = 64'h000000F0004000FC;
-defparam \soc_inst|m0_1|u_logic|P37wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wxcwx4~0 (
+// Location: MLABCELL_X28_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C51xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wxcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  ) )
+// \soc_inst|m0_1|u_logic|C51xx4~0_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .lut_mask = 64'h00000000CCCCCCCC;
-defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C51xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C51xx4~0 .lut_mask = 64'h000000C000000000;
+defparam \soc_inst|m0_1|u_logic|C51xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P37wx4~0 (
+// Location: LABCELL_X29_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mw1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P37wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|P37wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P37wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ob2wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P37wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P37wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P37wx4~0 .lut_mask = 64'hFC00FC00A800A800;
-defparam \soc_inst|m0_1|u_logic|P37wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~3 (
+// Location: LABCELL_X29_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zqpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|P37wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zqpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Zqpvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Zqpvx4~2_combout  & (((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zqpvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .lut_mask = 64'h00000000F351F351;
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0qvx4 (
+// Location: MLABCELL_X34_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G02wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K0qvx4~combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Kryvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|G02wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K0qvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K0qvx4 .lut_mask = 64'hFFFFFFFFFFFFF0F0;
-defparam \soc_inst|m0_1|u_logic|K0qvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G02wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G02wx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|G02wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y13_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wspvx4 (
+// Location: MLABCELL_X34_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pu1wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wspvx4~combout  = ( \soc_inst|m0_1|u_logic|K0qvx4~combout  & ( \soc_inst|m0_1|u_logic|X4pvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Pu1wx4~combout  = ( \soc_inst|m0_1|u_logic|G02wx4~0_combout  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wspvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wspvx4 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Wspvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pu1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pu1wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Pu1wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lqpvx4~0 (
+// Location: FF_X31_Y15_N55
+dffeas \soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G02wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lqpvx4~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Wspvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|G02wx4~combout  = ( \soc_inst|m0_1|u_logic|G02wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .lut_mask = 64'h00000000FCFCFCFC;
-defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G02wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G02wx4 .lut_mask = 64'h00000000AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|G02wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N20
-dffeas \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE (
+// Location: FF_X31_Y15_N10
+dffeas \soc_inst|m0_1|u_logic|Mvm2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Mvm2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mvm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mvm2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N47
-dffeas \soc_inst|m0_1|u_logic|K0u2z4 (
+// Location: FF_X27_Y14_N20
+dffeas \soc_inst|m0_1|u_logic|Wqm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K0u2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wqm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K0u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K0u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wqm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wqm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y8_N1
-dffeas \soc_inst|m0_1|u_logic|T583z4 (
+// Location: FF_X27_Y12_N52
+dffeas \soc_inst|m0_1|u_logic|G493z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T583z4~q ),
+	.q(\soc_inst|m0_1|u_logic|G493z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T583z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T583z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G493z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G493z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N56
-dffeas \soc_inst|m0_1|u_logic|Kw63z4 (
+// Location: FF_X28_Y12_N11
+dffeas \soc_inst|m0_1|u_logic|Ipm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kw63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ipm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kw63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kw63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ipm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4~1 (
+// Location: LABCELL_X27_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ixxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|T583z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|K0u2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Kw63z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q 
-//  & ( !\soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Qowwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|G493z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|R6v2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|Wqm2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|K0u2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T583z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kw63z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wqm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|R6v2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G493z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ipm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qowwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .lut_mask = 64'hAAAAFF00CCCCF0F0;
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .lut_mask = 64'hAAAACCCCFF00F0F0;
+defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y8_N38
-dffeas \soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE (
+// Location: FF_X27_Y12_N8
+dffeas \soc_inst|m0_1|u_logic|R283z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|R283z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R283z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R283z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y8_N20
-dffeas \soc_inst|m0_1|u_logic|T9v2z4 (
+// Location: FF_X27_Y14_N14
+dffeas \soc_inst|m0_1|u_logic|It63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T9v2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|It63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T9v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T9v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|It63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|It63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y6_N5
-dffeas \soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE (
+// Location: FF_X27_Y12_N35
+dffeas \soc_inst|m0_1|u_logic|Ixt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ixt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ixt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y8_N8
-dffeas \soc_inst|m0_1|u_logic|Ka93z4 (
+// Location: MLABCELL_X21_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ksm2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ksm2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ksm2z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ksm2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ksm2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ksm2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y12_N38
+dffeas \soc_inst|m0_1|u_logic|Ksm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ksm2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ka93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ksm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ka93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ka93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ksm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ksm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4~0 (
+// Location: LABCELL_X27_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ixxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ka93z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T9v2z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Qowwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|R283z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|It63z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Ixt2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|Ksm2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T9v2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ka93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R283z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|It63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ixt2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ksm2z4~q ),
 	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qowwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .lut_mask = 64'hAAAACCCCF0F0FF00;
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .lut_mask = 64'hFF00F0F0CCCCAAAA;
+defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qowwx4~combout  = ( \soc_inst|m0_1|u_logic|Qowwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qowwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qowwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qowwx4~0_combout )) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qowwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qowwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Qowwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qowwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4 .lut_mask = 64'h0003000330333033;
+defparam \soc_inst|m0_1|u_logic|Qowwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y10_N29
+dffeas \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y21xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y21xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .lut_mask = 64'h2000200000000000;
+defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N37
+dffeas \soc_inst|m0_1|u_logic|U593z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U593z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U593z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U593z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fskvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fskvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U593z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hszvx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U593z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hszvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|U593z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U593z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U593z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .lut_mask = 64'h00BBFFBB00B0F0B0;
+defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N38
+dffeas \soc_inst|m0_1|u_logic|U593z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U593z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U593z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U593z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yv1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ob2wx4~combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ydyvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ydyvx4~combout  = ( \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ydyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ydyvx4 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Ydyvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N44
+dffeas \soc_inst|m0_1|u_logic|H133z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H133z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H133z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H133z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4 (
+// Location: LABCELL_X29_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Meyvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ixxwx4~combout  = ( \soc_inst|m0_1|u_logic|Ixxwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ixxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ixxwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Ixxwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ixxwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ixxwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Meyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & \soc_inst|m0_1|u_logic|Yv1wx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ixxwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixxwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ixxwx4 .lut_mask = 64'h00000F00000F0F0F;
-defparam \soc_inst|m0_1|u_logic|Ixxwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Meyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Meyvx4 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Meyvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svxwx4~0 (
+// Location: FF_X24_Y13_N49
+dffeas \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yv1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Yv1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .lut_mask = 64'h4040404040CC40CC;
-defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vy7wx4~0 (
+// Location: FF_X24_Y13_N8
+dffeas \soc_inst|m0_1|u_logic|Yr13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yr13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yr13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yr13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Svxwx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Svxwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Uvzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yr13z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Yaz2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|U593z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|H133z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Yr13z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Yaz2z4~q )) # (\soc_inst|m0_1|u_logic|U593z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|H133z4~q  
+// & \soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yr13z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|U593z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|H133z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Yr13z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|U593z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|H133z4~q  
+// & \soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U593z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H133z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yr13z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .lut_mask = 64'hF00FF00FF807F807;
-defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .lut_mask = 64'h50035F0350F35FF3;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S1ewx4~0 (
+// Location: MLABCELL_X28_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mw1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S1ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Mw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .lut_mask = 64'h0000F0F000000000;
-defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W6iwx4 (
+// Location: FF_X24_Y13_N56
+dffeas \soc_inst|m0_1|u_logic|Zj53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zj53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zj53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zj53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W6iwx4~combout  = ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & \soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wu1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W6iwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W6iwx4 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|W6iwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tecwx4~0 (
+// Location: FF_X27_Y15_N20
+dffeas \soc_inst|m0_1|u_logic|Rtz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rtz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tecwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tecwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .lut_mask = 64'h0002000000000000;
-defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y8_N14
-dffeas \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE (
+// Location: FF_X31_Y15_N23
+dffeas \soc_inst|m0_1|u_logic|Qa43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Qa43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qa43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qa43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~2 (
+// Location: LABCELL_X24_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q ))))) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Uvzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zj53z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qa43z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rtz2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zj53z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qa43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .lut_mask = 64'h00EA000C00C00000;
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .lut_mask = 64'h0000F0F0FF00AAAA;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~0 (
+// Location: LABCELL_X27_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Uvzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uvzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Uvzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .lut_mask = 64'hF000F000CC44CC00;
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .lut_mask = 64'hC000C000C0CCC0CC;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I4dwx4~0 (
+// Location: LABCELL_X27_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I4dwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ((!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|W4dwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ) # (\soc_inst|m0_1|u_logic|W4dwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Uvzvx4~combout  = ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mvm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qowwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qowwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mvm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qowwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .lut_mask = 64'hF0FF0000A0AA0000;
-defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4 .lut_mask = 64'hBB000B0000000000;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Afcwx4~0 (
+// Location: LABCELL_X37_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X8zvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Afcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Uup2z4~q  & ((\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Z4bwx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Uup2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|X8zvx4~combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Afcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .lut_mask = 64'hF000F00070007000;
-defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X8zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X8zvx4 .lut_mask = 64'h0000000080008000;
+defparam \soc_inst|m0_1|u_logic|X8zvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ydcwx4~0 (
+// Location: LABCELL_X33_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ydcwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Afcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tecwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Afcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tecwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|D1awx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & \soc_inst|m0_1|u_logic|Ucqvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// (((\soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & \soc_inst|m0_1|u_logic|Ucqvx4~combout )) # (\soc_inst|m0_1|u_logic|W4dwx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tecwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Afcwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .lut_mask = 64'h8A0000008A8A0000;
-defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D1awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D1awx4~0 .lut_mask = 64'h222A000AAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|D1awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y4_N58
-dffeas \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE (
+// Location: FF_X35_Y16_N10
+dffeas \soc_inst|m0_1|u_logic|Lny2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -20841,309 +20061,390 @@ dffeas \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Lny2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lny2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lny2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N9
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~5 (
+// Location: LABCELL_X31_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uz9wx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[8]~5_combout  = ( !\soc_inst|switches_1|half_word_address [1] & ( \soc_inst|switches_1|read_enable~q  ) )
+// \soc_inst|m0_1|u_logic|Uz9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~q ) # ((!\soc_inst|m0_1|u_logic|W7z2z4~q  & \soc_inst|m0_1|u_logic|Xwawx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  
+// & ( (!\soc_inst|m0_1|u_logic|W7z2z4~q  & \soc_inst|m0_1|u_logic|Xwawx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|switches_1|read_enable~q ),
+	.datab(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|switches_1|half_word_address [1]),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[8]~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uz9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[8]~5 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[8]~5 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|interconnect_1|HRDATA[8]~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N51
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~9 (
+// Location: LABCELL_X31_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uz9wx4~1 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[7]~9_combout  = ( \soc_inst|interconnect_1|HRDATA[8]~5_combout  & ( (!\soc_inst|interconnect_1|mux_sel [2] & ((!\soc_inst|interconnect_1|mux_sel [1]) # ((!\soc_inst|switches_1|half_word_address [0] & 
-// !\soc_inst|interconnect_1|mux_sel [0])))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[8]~5_combout  & ( (!\soc_inst|interconnect_1|mux_sel [2] & !\soc_inst|interconnect_1|mux_sel [1]) ) )
+// \soc_inst|m0_1|u_logic|Uz9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~q )))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|switches_1|half_word_address [0]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
+	.dataa(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[8]~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[7]~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[7]~9 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[7]~9 .lut_mask = 64'h88888888A888A888;
-defparam \soc_inst|interconnect_1|HRDATA[7]~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .lut_mask = 64'h8C008C00AF00AF00;
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N30
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~10 (
+// Location: FF_X28_Y11_N47
+dffeas \soc_inst|m0_1|u_logic|Wzy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wzy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y13_N50
+dffeas \soc_inst|m0_1|u_logic|Lq03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lq03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lq03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lq03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~2 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[7]~10_combout  = ( \soc_inst|interconnect_1|HRDATA[7]~9_combout  & ( ((\soc_inst|ram_1|read_cycle~q  & (\soc_inst|ram_1|byte_select [0] & \soc_inst|interconnect_1|mux_sel [0]))) # (\soc_inst|interconnect_1|mux_sel [1]) ) )
+// \soc_inst|m0_1|u_logic|Qp62z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Lq03z4~q  & ( (!\soc_inst|m0_1|u_logic|Rtz2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lq03z4~q  & ( (!\soc_inst|m0_1|u_logic|Rtz2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lq03z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|ram_1|read_cycle~q ),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|ram_1|byte_select [0]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[7]~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lq03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qp62z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[7]~10 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[7]~10 .lut_mask = 64'h0000000033373337;
-defparam \soc_inst|interconnect_1|HRDATA[7]~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .lut_mask = 64'h0C00080000000800;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: IOIBUF_X20_Y0_N52
-cyclonev_io_ibuf \SW[4]~input (
-	.i(SW[4]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[4]~input_o ));
+// Location: FF_X31_Y15_N11
+dffeas \soc_inst|m0_1|u_logic|Mvm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mvm2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \SW[4]~input .bus_hold = "false";
-defparam \SW[4]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|Mvm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mvm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y9_N35
-dffeas \soc_inst|switches_1|switch_store[0][4] (
+// Location: FF_X24_Y13_N55
+dffeas \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[4]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][4]~q ),
+	.q(\soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][4] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][4] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N33
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[4]~23 (
+// Location: LABCELL_X31_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[4]~23_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
-// (\soc_inst|switches_1|switch_store[0][4]~q ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & 
-// \soc_inst|switches_1|switch_store[0][4]~q )) ) )
+// \soc_inst|m0_1|u_logic|Qp62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qa43z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qa43z4~q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[0][4]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qa43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qp62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[4]~23 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[4]~23 .lut_mask = 64'h000500050A0F0A0F;
-defparam \soc_inst|interconnect_1|HRDATA[4]~23 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .lut_mask = 64'h0020003000200000;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mis2z4~0 (
+// Location: FF_X31_Y15_N56
+dffeas \soc_inst|m0_1|u_logic|Ytm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ytm2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ytm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ytm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nr62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mis2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Nr62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ytm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ytm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nr62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2owx4~0 (
+// Location: LABCELL_X30_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ue9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T2owx4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|Kop2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T2owx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T2owx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|T2owx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .lut_mask = 64'h2000200000000000;
+defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qwowx4 (
+// Location: LABCELL_X24_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qwowx4~combout  = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Mjl2z4~q  & \soc_inst|m0_1|u_logic|Lz93z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Qp62z4~1_combout  = ( !\soc_inst|m0_1|u_logic|H133z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|H133z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Yr13z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H133z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Yr13z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yr13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H133z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qp62z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qwowx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qwowx4 .lut_mask = 64'h00000000000C000C;
-defparam \soc_inst|m0_1|u_logic|Qwowx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .lut_mask = 64'h4000400050000000;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vytvx4 (
+// Location: LABCELL_X31_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vytvx4~combout  = (\soc_inst|m0_1|u_logic|Qwowx4~combout  & \soc_inst|m0_1|u_logic|K3l2z4~q )
+// \soc_inst|m0_1|u_logic|Qp62z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qp62z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qp62z4~2_combout  & (\soc_inst|m0_1|u_logic|Mvm2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Qp62z4~0_combout  & !\soc_inst|m0_1|u_logic|Nr62z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qp62z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qp62z4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Qp62z4~0_combout  & !\soc_inst|m0_1|u_logic|Nr62z4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qp62z4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mvm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qp62z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nr62z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qp62z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qp62z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vytvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vytvx4 .lut_mask = 64'h000F000F000F000F;
-defparam \soc_inst|m0_1|u_logic|Vytvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .lut_mask = 64'hA000200000000000;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y13_N11
-dffeas \soc_inst|m0_1|u_logic|Mis2z4 (
+// Location: FF_X30_Y13_N44
+dffeas \soc_inst|m0_1|u_logic|C3w2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mis2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|C3w2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mis2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mis2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C3w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C3w2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ts5wx4~0 (
+// Location: LABCELL_X19_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Omyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lz93z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~q  & !\soc_inst|m0_1|u_logic|Kop2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Omyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|C3w2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  
+// & ( ((\soc_inst|m0_1|u_logic|C3w2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Omyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .lut_mask = 64'h000000000A000A00;
-defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .lut_mask = 64'h5577002255550000;
+defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9ovx4 (
+// Location: LABCELL_X22_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Omyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9ovx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Omyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Omyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|Omyvx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Omyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Omyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Omyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9ovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9ovx4 .lut_mask = 64'h0000000000AA00AA;
-defparam \soc_inst|m0_1|u_logic|D9ovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .lut_mask = 64'h0C0C4C4CFF0CFF4C;
+defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y14_N14
-dffeas \soc_inst|m0_1|u_logic|R1w2z4 (
+// Location: FF_X30_Y15_N14
+dffeas \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -21152,17 +20453,17 @@ dffeas \soc_inst|m0_1|u_logic|R1w2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R1w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R1w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y14_N44
-dffeas \soc_inst|m0_1|u_logic|Trq2z4 (
+// Location: FF_X30_Y15_N38
+dffeas \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -21171,115 +20472,172 @@ dffeas \soc_inst|m0_1|u_logic|Trq2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Trq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Trq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ijcwx4~0 (
+// Location: FF_X30_Y15_N46
+dffeas \soc_inst|m0_1|u_logic|Lz93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lz93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lz93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jknvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ijcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Jknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & (!\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|Lz93z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Yuovx4~combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Lz93z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( 
+// ((!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Lz93z4~q )) # (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .lut_mask = 64'h88888888FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .lut_mask = 64'h55DD55DD50DC50DC;
+defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C8rwx4~0 (
+// Location: FF_X30_Y15_N47
+dffeas \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ts5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C8rwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .lut_mask = 64'h0000000050005000;
-defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V9iwx4~0 (
+// Location: LABCELL_X24_Y21_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9ovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V9iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|D9ovx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9ovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9ovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9ovx4 .lut_mask = 64'h0000555500000000;
+defparam \soc_inst|m0_1|u_logic|D9ovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lcowx4~0 (
+// Location: LABCELL_X24_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yz4wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lcowx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Qxc2z4~combout ))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qxc2z4~combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Yz4wx4~combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|K3l2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .lut_mask = 64'h50F050F010F010F0;
-defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yz4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yz4wx4 .lut_mask = 64'h0000000000550055;
+defparam \soc_inst|m0_1|u_logic|Yz4wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y14_N38
-dffeas \soc_inst|m0_1|u_logic|G0w2z4 (
+// Location: FF_X25_Y19_N8
+dffeas \soc_inst|m0_1|u_logic|Wuq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wuq2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wuq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wuq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -21288,1397 +20646,1402 @@ dffeas \soc_inst|m0_1|u_logic|G0w2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G0w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G0w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y11_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~0 (
+// Location: MLABCELL_X25_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yauvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qppvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G0w2z4~q  & !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nen2z4~q  & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Yauvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cam2z4~q  
+// & !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qppvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .lut_mask = 64'h000000005500C0C0;
-defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .lut_mask = 64'h0000000001000000;
+defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Muawx4~0 (
+// Location: MLABCELL_X28_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wq5wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Muawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// \soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) ) 
-// # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Wq5wx4~combout  = ( \soc_inst|m0_1|u_logic|Y9t2z4~q  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & \soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Muawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Muawx4~0 .lut_mask = 64'h0000CC040404CC04;
-defparam \soc_inst|m0_1|u_logic|Muawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wq5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wq5wx4 .lut_mask = 64'h0000000011111111;
+defparam \soc_inst|m0_1|u_logic|Wq5wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U09wx4~0 (
+// Location: LABCELL_X40_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Muawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U09wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  
-// & \soc_inst|m0_1|u_logic|Y29wx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & ((\soc_inst|m0_1|u_logic|Y29wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & ((\soc_inst|m0_1|u_logic|Y29wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & ((\soc_inst|m0_1|u_logic|Y29wx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Muawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|O5t2z4~q  & 
+// \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U09wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U09wx4~0 .lut_mask = 64'hA0ECFFFFA0ECA0EC;
-defparam \soc_inst|m0_1|u_logic|U09wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Muawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Muawx4~0 .lut_mask = 64'h01010000FF030000;
+defparam \soc_inst|m0_1|u_logic|Muawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Otcwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Otcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
+// Location: FF_X29_Y14_N49
+dffeas \soc_inst|m0_1|u_logic|Efp2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Efp2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Efp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Efp2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Otcwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y12_N59
+dffeas \soc_inst|m0_1|u_logic|F8v2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F8v2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .lut_mask = 64'h50005000500F500F;
-defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F8v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8v2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuawx4~0 (
+// Location: FF_X28_Y12_N17
+dffeas \soc_inst|m0_1|u_logic|Gip2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gip2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gip2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gip2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Otcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jucwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Qxuwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|F8v2z4~q  & ( \soc_inst|m0_1|u_logic|Gip2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|F8v2z4~q  & ( !\soc_inst|m0_1|u_logic|Gip2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8v2z4~q  & ( !\soc_inst|m0_1|u_logic|Gip2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Otcwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|F8v2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gip2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .lut_mask = 64'hFFF5000000000000;
-defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .lut_mask = 64'h0500040001000000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuawx4~1 (
+// Location: FF_X27_Y12_N19
+dffeas \soc_inst|m0_1|u_logic|Wyt2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wyt2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wyt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wyt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y12_N56
+dffeas \soc_inst|m0_1|u_logic|F483z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F483z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F483z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F483z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Qxuwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wyt2z4~q  & ( \soc_inst|m0_1|u_logic|F483z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wyt2z4~q  & ( !\soc_inst|m0_1|u_logic|F483z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wyt2z4~q  & ( !\soc_inst|m0_1|u_logic|F483z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wyt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|F483z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .lut_mask = 64'hCCCC0000FCFCF0F0;
-defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .lut_mask = 64'h000A000200080000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lz8wx4~0 (
+// Location: FF_X25_Y12_N50
+dffeas \soc_inst|m0_1|u_logic|Sgp2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sgp2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sgp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sgp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y12_N11
+dffeas \soc_inst|m0_1|u_logic|W893z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|W893z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W893z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W893z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lz8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Punvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
-// (!\soc_inst|m0_1|u_logic|U09wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Punvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
-// (((!\soc_inst|m0_1|u_logic|U09wx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Punvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|U09wx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Punvx4~4_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Punvx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|U09wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qxuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgp2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|W893z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|W893z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lz8wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .lut_mask = 64'hFBFEAAAA62982288;
-defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .lut_mask = 64'h0000000000000A0C;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~1 (
+// Location: FF_X29_Y12_N31
+dffeas \soc_inst|m0_1|u_logic|Wu63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wu63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wu63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wu63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y12_N17
+dffeas \soc_inst|m0_1|u_logic|Ujp2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ujp2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ujp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ujp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qppvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lz8wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qppvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~93_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Qxuwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Ujp2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Wu63z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qppvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lz8wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wu63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ujp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .lut_mask = 64'h00000000C0F0C0F0;
-defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .lut_mask = 64'h0C0A000000000000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D31wx4~0 (
+// Location: LABCELL_X29_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D31wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & \soc_inst|m0_1|u_logic|E6nwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & \soc_inst|m0_1|u_logic|E6nwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & \soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qxuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Qxuwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qxuwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qxuwx4~3_combout  & !\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Qxuwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D31wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D31wx4~0 .lut_mask = 64'h00AA000A00A80008;
-defparam \soc_inst|m0_1|u_logic|D31wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4 .lut_mask = 64'hC0C0000000000000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixh3z4~feeder (
+// Location: LABCELL_X36_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjkvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ixh3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Bjkvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ovc3z4~q  & ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ixh3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bjkvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixh3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ixh3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ixh3z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y11_N29
-dffeas \soc_inst|m0_1|u_logic|Ixh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ixh3z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ixh3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ixh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .lut_mask = 64'hF0F0F5F500005555;
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvh3z4~feeder (
+// Location: LABCELL_X36_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjkvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvh3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Bjkvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yuovx4~combout  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bjkvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|R8x2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yuovx4~combout  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bjkvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|R8x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yuovx4~combout  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bjkvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|R8x2z4~q ))) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Bjkvx4~0_combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvh3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvh3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvh3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Tvh3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .lut_mask = 64'hAA0AAA0AAA0A0000;
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y11_N23
-dffeas \soc_inst|m0_1|u_logic|Tvh3z4 (
+// Location: FF_X36_Y12_N16
+dffeas \soc_inst|m0_1|u_logic|Ovc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tvh3z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tvh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ovc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tvh3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X48_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Ixh3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Tvh3z4~q ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ixh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tvh3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .lut_mask = 64'h000088C000000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ovc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ovc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y10_N52
-dffeas \soc_inst|m0_1|u_logic|G123z4 (
+// Location: FF_X29_Y12_N37
+dffeas \soc_inst|m0_1|u_logic|Nl53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G123z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nl53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G123z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G123z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nl53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nl53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y10_N4
-dffeas \soc_inst|m0_1|u_logic|Ecp2z4 (
+// Location: FF_X25_Y12_N20
+dffeas \soc_inst|m0_1|u_logic|Ec43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ecp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ec43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ecp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ecp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ec43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ec43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~0 (
+// Location: MLABCELL_X25_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G123z4~q  & ( \soc_inst|m0_1|u_logic|Ecp2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G123z4~q  & ( !\soc_inst|m0_1|u_logic|Ecp2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G123z4~q  & ( !\soc_inst|m0_1|u_logic|Ecp2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  $ 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qw62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nl53z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ec43z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G123z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ecp2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nl53z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ec43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qw62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .lut_mask = 64'h6000400020000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .lut_mask = 64'h1100000010100000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y10_N32
-dffeas \soc_inst|m0_1|u_logic|M0i3z4 (
+// Location: FF_X22_Y12_N1
+dffeas \soc_inst|m0_1|u_logic|Fvz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M0i3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fvz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M0i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M0i3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fvz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fvz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nr2xx4~0 (
+// Location: LABCELL_X24_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zr03z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nr2xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|M0i3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zr03z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M0i3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zr03z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .lut_mask = 64'h2000000000000000;
-defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zr03z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zr03z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Zr03z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y10_N25
-dffeas \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE (
+// Location: FF_X24_Y13_N1
+dffeas \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zr03z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjlwx4~0 (
+// Location: LABCELL_X22_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fjlwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jp3wx4~combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qw62z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fvz2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fvz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qw62z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .lut_mask = 64'hF0FFF0FF00000000;
-defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .lut_mask = 64'h00000000A8080000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y9_N53
-dffeas \soc_inst|m0_1|u_logic|Wai2z4 (
+// Location: FF_X29_Y12_N4
+dffeas \soc_inst|m0_1|u_logic|Wmp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wmp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wai2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wai2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wmp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wmp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N38
+dffeas \soc_inst|m0_1|u_logic|V233z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V233z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V233z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y13_N17
+dffeas \soc_inst|m0_1|u_logic|Mt13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mt13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mt13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mt13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glj2z4~feeder (
+// Location: LABCELL_X23_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Glj2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J3qvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Qw62z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Mt13z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mt13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glj2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qw62z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glj2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glj2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Glj2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .lut_mask = 64'h00000000CA000000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y6_N8
-dffeas \soc_inst|m0_1|u_logic|Glj2z4 (
+// Location: FF_X23_Y11_N35
+dffeas \soc_inst|m0_1|u_logic|Ilp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Glj2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Glj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ilp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Glj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ilp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ilp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y7_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3ivx4~0 (
+// Location: LABCELL_X23_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|J0l2z4~q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|V1l2z4~q 
-//  ) )
+// \soc_inst|m0_1|u_logic|Ny62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ilp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ilp2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .lut_mask = 64'hCCCCCCCC00F000F0;
-defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .lut_mask = 64'h0020000000000000;
+defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3ivx4~1 (
+// Location: LABCELL_X24_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3ivx4~1_combout  = ( !\soc_inst|m0_1|u_logic|O3ivx4~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gci2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O3ivx4~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gci2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qw62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ny62z4~0_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qw62z4~0_combout  & (!\soc_inst|m0_1|u_logic|Qw62z4~2_combout  & 
+// (\soc_inst|m0_1|u_logic|Wmp2z4~q  & !\soc_inst|m0_1|u_logic|Qw62z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ny62z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qw62z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Qw62z4~2_combout  & !\soc_inst|m0_1|u_logic|Qw62z4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O3ivx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qw62z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qw62z4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wmp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qw62z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ny62z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qw62z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .lut_mask = 64'hBB000000BBBB0000;
-defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .lut_mask = 64'h8800000008000000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y5_N55
-dffeas \soc_inst|m0_1|u_logic|V1l2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V1l2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mpnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ovc3z4~q  & ( \soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qxuwx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( \soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qxuwx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ovc3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Efp2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Efp2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Efp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qw62z4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V1l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V1l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .lut_mask = 64'hEEFF4455EEFA4450;
+defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ta1xx4~0 (
+// Location: LABCELL_X35_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tecwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Tecwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tecwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .lut_mask = 64'h0000000000000080;
+defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U71xx4~0 (
+// Location: LABCELL_X33_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Afcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U71xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Afcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Z4bwx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Afcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U71xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U71xx4~0 .lut_mask = 64'h0300030000000000;
-defparam \soc_inst|m0_1|u_logic|U71xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .lut_mask = 64'hC0C0C0C040C040C0;
+defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~1 (
+// Location: LABCELL_X29_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ydcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glj2z4~q ) # (!\soc_inst|m0_1|u_logic|V1l2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Glj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|V1l2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Ydcwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Afcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tecwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|I6z2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Afcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tecwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Glj2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tecwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Afcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .lut_mask = 64'h0000FF00CCCCFFCC;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .lut_mask = 64'hA2000000A2A20000;
+defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y4_N52
-dffeas \soc_inst|m0_1|u_logic|T253z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wccwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wccwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T253z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T253z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .lut_mask = 64'hFEC2F0C0FB38F030;
+defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y4_N46
-dffeas \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X37_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bpzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .lut_mask = 64'h00000C0C00000C0C;
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ld1xx4~0 (
+// Location: MLABCELL_X39_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz8wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Zz8wx4~combout  = ( !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ez8wx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .lut_mask = 64'h0000000000C000C0;
-defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zz8wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz8wx4 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Zz8wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sd1xx4~0 (
+// Location: LABCELL_X36_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Fyzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & !\soc_inst|m0_1|u_logic|Tdp2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|Tdp2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Eo5wx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .lut_mask = 64'hAAAA2222A0A02020;
+defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~97 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~34  ))
+// \soc_inst|m0_1|u_logic|Add5~98  = CARRY(( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~34  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~34 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~98 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .lut_mask = 64'h0000000000300030;
-defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~97 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~97 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~97 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~3 (
+// Location: LABCELL_X31_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~109 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Add5~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~98  ))
+// \soc_inst|m0_1|u_logic|Add5~110  = CARRY(( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~98  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~98 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~110 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .lut_mask = 64'h0000FF00F0F0FFF0;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~109 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~109 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~109 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lpu2z4~feeder (
+// Location: LABCELL_X24_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lpu2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J3qvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Fyzvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & \soc_inst|m0_1|u_logic|Fyzvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lpu2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lpu2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lpu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Lpu2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .lut_mask = 64'h0000000000550011;
+defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y6_N31
-dffeas \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE (
+// Location: FF_X29_Y12_N38
+dffeas \soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lpu2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N26
-dffeas \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE (
+// Location: FF_X23_Y12_N16
+dffeas \soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~6 (
+// Location: LABCELL_X29_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Eo5wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((\soc_inst|m0_1|u_logic|Wyt2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (\soc_inst|m0_1|u_logic|F483z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((\soc_inst|m0_1|u_logic|Wyt2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (\soc_inst|m0_1|u_logic|F483z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|Wu63z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wu63z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wu63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|F483z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wyt2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .lut_mask = 64'h000000000E000200;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y8_N7
-dffeas \soc_inst|m0_1|u_logic|Ll73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ll73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ll73z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y5_N49
-dffeas \soc_inst|m0_1|u_logic|X2j2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X2j2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X2j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X2j2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y7_N46
-dffeas \soc_inst|m0_1|u_logic|Xti2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xti2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xti2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xti2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .lut_mask = 64'h1111DDDD03CF03CF;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~5 (
+// Location: MLABCELL_X25_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Cc63z4~q  & ( \soc_inst|m0_1|u_logic|Xti2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cc63z4~q  & ( !\soc_inst|m0_1|u_logic|Xti2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cc63z4~q  & ( !\soc_inst|m0_1|u_logic|Xti2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  $ 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Eo5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|F8v2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|W893z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8v2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|W893z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|F8v2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Gip2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgp2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8v2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Gip2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgp2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cc63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xti2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|W893z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gip2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|F8v2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .lut_mask = 64'h0021000100200000;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .lut_mask = 64'h0F550F550033FF33;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~7 (
+// Location: LABCELL_X29_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~7_combout  = ( \soc_inst|m0_1|u_logic|X2j2z4~q  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ll73z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X2j2z4~q  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ll73z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Eo5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eo5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Eo5wx4~4_combout  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Eo5wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ) # (\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ll73z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|X2j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~5_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .lut_mask = 64'h8088A0AA00000000;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .lut_mask = 64'h00F300F300C000C0;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y4_N13
-dffeas \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE (
+// Location: FF_X25_Y11_N53
+dffeas \soc_inst|m0_1|u_logic|M1j2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y5_N41
-dffeas \soc_inst|m0_1|u_logic|Ehz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ehz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ehz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M1j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M1j2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N31
-dffeas \soc_inst|m0_1|u_logic|Yd03z4 (
+// Location: FF_X29_Y12_N5
+dffeas \soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yd03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yd03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yd03z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X50_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ehz2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yd03z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yd03z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ehz2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yd03z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Yd03z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ehz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yd03z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .lut_mask = 64'hAAFF0A0F22330203;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Koj2z4~feeder (
+// Location: LABCELL_X29_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Koj2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J3qvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Eo5wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fvz2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fvz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|M1j2z4~q ) # (\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fvz2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  $ (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Fvz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|M1j2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fvz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Koj2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Koj2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Koj2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Koj2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .lut_mask = 64'hF3CC33CCF3003300;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y6_N38
-dffeas \soc_inst|m0_1|u_logic|Koj2z4 (
+// Location: FF_X25_Y12_N19
+dffeas \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Koj2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Koj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Koj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Koj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N11
-dffeas \soc_inst|m0_1|u_logic|Kt33z4 (
+// Location: FF_X24_Y13_N2
+dffeas \soc_inst|m0_1|u_logic|Zr03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zr03z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kt33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zr03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kt33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kt33z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X45_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V41xx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|V41xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V41xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V41xx4~0 .lut_mask = 64'h0000000005000500;
-defparam \soc_inst|m0_1|u_logic|V41xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X46_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ab1xx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .lut_mask = 64'h0000000000880088;
-defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X50_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Koj2z4~q ) # (!\soc_inst|m0_1|u_logic|Kt33z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kt33z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Koj2z4~q  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Koj2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Kt33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .lut_mask = 64'h0000AAAAFF00FFAA;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zr03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zr03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y6_N2
-dffeas \soc_inst|m0_1|u_logic|Sa13z4 (
+// Location: FF_X23_Y11_N37
+dffeas \soc_inst|m0_1|u_logic|V233z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sa13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|V233z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sa13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sa13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V233z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V233z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jc1xx4~0 (
+// Location: LABCELL_X24_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Eo5wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|V233z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mt13z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zr03z4~q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zr03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mt13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|V233z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .lut_mask = 64'h2200220000000000;
-defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .lut_mask = 64'hFF00AAAACCCCF0F0;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y91xx4~0 (
+// Location: LABCELL_X29_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y91xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Eo5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Eo5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Eo5wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) 
+// # (!\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Eo5wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Eo5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Eo5wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (!\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .lut_mask = 64'h00A000A000000000;
-defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y7_N31
-dffeas \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .lut_mask = 64'h00000C08CCCC0C08;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~0 (
+// Location: LABCELL_X29_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sa13z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sa13z4~q ) # (\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ilp2z4~q )))) # (\soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ilp2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sa13z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ilp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .lut_mask = 64'h00FFAAFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .lut_mask = 64'hDD0D000000000000;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4 (
+// Location: LABCELL_X19_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Nd3wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Nd3wx4~0_combout  ) ) # ( 
-// \soc_inst|m0_1|u_logic|Nd3wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Nd3wx4~4_combout )) # (\soc_inst|m0_1|u_logic|Nd3wx4~3_combout )) # (\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Sknwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sknwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4 .lut_mask = 64'hFFF7FFFFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .lut_mask = 64'hF5F5B1B1A0A0B1B1;
+defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N45
+// Location: MLABCELL_X21_Y15_N21
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H9iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H9iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|H9iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -22689,584 +22052,389 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H9iwx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .lut_mask = 64'hFFBAFFBA00000000;
+defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .lut_mask = 64'hFFAAFFFA00000000;
 defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N30
+// Location: LABCELL_X22_Y14_N9
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S8ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S8ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|S8ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
 	.combout(\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
 	.sumout(),
 	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y11_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H9iwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|H9iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & !\soc_inst|m0_1|u_logic|H9iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|H9iwx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .lut_mask = 64'hF0F0F0F0C0C0C0C0;
-defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djywx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Djywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  
-// & (!\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djywx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djywx4~0 .lut_mask = 64'h00000A0A44444E4E;
-defparam \soc_inst|m0_1|u_logic|Djywx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lstwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Lstwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Djywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Djywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Djywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .lut_mask = 64'hFAF0FFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: IOIBUF_X20_Y0_N35
-cyclonev_io_ibuf \SW[7]~input (
-	.i(SW[7]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[7]~input_o ));
-// synopsys translate_off
-defparam \SW[7]~input .bus_hold = "false";
-defparam \SW[7]~input .simulate_z_as = "z";
-// synopsys translate_on
-
-// Location: FF_X30_Y9_N11
-dffeas \soc_inst|switches_1|switch_store[0][7] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[7]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][7]~q ),
-	.prn(vcc));
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][7] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][7] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[7] (
+// Location: LABCELL_X22_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yilwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o [7] = (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )
+// \soc_inst|m0_1|u_logic|Yilwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9iwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H9iwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.combout(\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .lut_mask = 64'h5500550055005500;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .lut_mask = 64'hFF00FF00AF00AF00;
+defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X15_Y9_N21
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[7]~4 (
+// Location: LABCELL_X22_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~2 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[7]~4_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Sknwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sknwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Wxp2z4~q  & !\soc_inst|m0_1|u_logic|Sknwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sknwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sknwx4~1_combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|byte_select [0]),
-	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[7]~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[7]~4 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[7]~4 .lut_mask = 64'h00000C0C03030F0F;
-defparam \soc_inst|ram_1|data_to_memory[7]~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X18_Y6_N26
-dffeas \soc_inst|ram_1|saved_word_address[6] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [6]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[6] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[6] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .lut_mask = 64'h00F500F500750075;
+defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N12
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[6]~6 (
+// Location: LABCELL_X19_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6nwx4 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[6]~6_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
-// (\soc_inst|ram_1|saved_word_address [6])) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [6] ) )
+// \soc_inst|m0_1|u_logic|S6nwx4~combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wxp2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) 
+// )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datac(!\soc_inst|ram_1|saved_word_address [6]),
-	.datad(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[6]~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S6nwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .lut_mask = 64'h0F0F0F0F03CF03CF;
-defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X19_Y6_N43
-dffeas \soc_inst|ram_1|saved_word_address[7] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [7]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[7] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[7] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S6nwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6nwx4 .lut_mask = 64'h0000101000000000;
+defparam \soc_inst|m0_1|u_logic|S6nwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N57
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[7]~7 (
+// Location: LABCELL_X22_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imnwx4 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[7]~7_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|Xxovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [7])) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [7] ) )
+// \soc_inst|m0_1|u_logic|Imnwx4~combout  = ( !\soc_inst|m0_1|u_logic|S6nwx4~combout  & ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S6nwx4~combout  & ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|saved_word_address [7]),
-	.datad(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|S6nwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[7]~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Imnwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .lut_mask = 64'h0F0F0F0F05AF05AF;
-defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X19_Y6_N52
-dffeas \soc_inst|ram_1|saved_word_address[8] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [8]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[8] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[8] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Imnwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imnwx4 .lut_mask = 64'hEFFF0000E0F00000;
+defparam \soc_inst|m0_1|u_logic|Imnwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N42
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[8]~8 (
+// Location: MLABCELL_X21_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H9iwx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[8]~8_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|Jxovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [8])) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [8] ) )
+// \soc_inst|m0_1|u_logic|H9iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S8ewx4~0_combout  & !\soc_inst|m0_1|u_logic|H9iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|H9iwx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|saved_word_address [8]),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[8]~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .lut_mask = 64'h3333333303F303F3;
-defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y12_N53
-dffeas \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .lut_mask = 64'hFF00FF00F000F000;
+defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~45 (
+// Location: LABCELL_X22_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~50  ))
-// \soc_inst|m0_1|u_logic|Add3~46  = CARRY(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~50  ))
+// \soc_inst|m0_1|u_logic|F8iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Jp3wx4~combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|Jp3wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~50 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~45_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~46 ),
+	.combout(\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~45 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~45 .lut_mask = 64'h0000FFFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add3~45 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .lut_mask = 64'h00AA00AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~41 (
+// Location: LABCELL_X22_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V9iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~46  ))
-// \soc_inst|m0_1|u_logic|Add3~42  = CARRY(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~46  ))
+// \soc_inst|m0_1|u_logic|V9iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~46 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~41_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~42 ),
+	.combout(\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~41 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~41 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~41 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~37 (
+// Location: LABCELL_X29_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U71xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~42  ))
-// \soc_inst|m0_1|u_logic|Add3~38  = CARRY(( !\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~42  ))
+// \soc_inst|m0_1|u_logic|U71xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~42 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~37_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~38 ),
+	.combout(\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~37 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~37 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~37 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U71xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U71xx4~0 .lut_mask = 64'h0030003000000000;
+defparam \soc_inst|m0_1|u_logic|U71xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~81 (
+// Location: FF_X29_Y9_N46
+dffeas \soc_inst|m0_1|u_logic|Mof3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mof3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mof3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mof3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zu23z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gmd3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~38  ))
-// \soc_inst|m0_1|u_logic|Add3~82  = CARRY(( !\soc_inst|m0_1|u_logic|Gmd3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~38  ))
+// \soc_inst|m0_1|u_logic|Zu23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~38 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~81_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~82 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~81 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~81 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~81 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzivx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wzivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( \soc_inst|m0_1|u_logic|Gmd3z4~q  & ( (!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wce3z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Gmd3z4~q  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( !\soc_inst|m0_1|u_logic|Gmd3z4~q  & 
-// ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & (((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & (!\soc_inst|m0_1|u_logic|Orewx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wce3z4~q  & ( !\soc_inst|m0_1|u_logic|Gmd3z4~q  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zu23z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .lut_mask = 64'h4440EEE05550FFF0;
-defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zu23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zu23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Zu23z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y9_N52
-dffeas \soc_inst|m0_1|u_logic|Wce3z4 (
+// Location: FF_X27_Y6_N58
+dffeas \soc_inst|m0_1|u_logic|Zu23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zu23z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wce3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zu23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wce3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wce3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zu23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hvivx4~0 (
+// Location: LABCELL_X24_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rd53z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hvivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rkd3z4~q  & ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rkd3z4~q  & ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rkd3z4~q  & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rkd3z4~q  & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rd53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rd53z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .lut_mask = 64'h5505FFAF4404CC8C;
-defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rd53z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rd53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Rd53z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y10_N7
-dffeas \soc_inst|m0_1|u_logic|Rkd3z4 (
+// Location: FF_X24_Y6_N16
+dffeas \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rd53z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rkd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rkd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R99wx4~0 (
+// Location: MLABCELL_X28_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R99wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Y29wx4~combout ) 
-// ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Zu23z4~q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Zu23z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zu23z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R99wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R99wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R99wx4~0 .lut_mask = 64'hF000F0F0F000F0F0;
-defparam \soc_inst|m0_1|u_logic|R99wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .lut_mask = 64'h000D000000080000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y10_N35
-dffeas \soc_inst|m0_1|u_logic|Lsd3z4 (
+// Location: FF_X31_Y6_N52
+dffeas \soc_inst|m0_1|u_logic|Kiq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lsd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kiq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lsd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kiq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kiq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y12_N19
-dffeas \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE (
+// Location: FF_X29_Y6_N1
+dffeas \soc_inst|m0_1|u_logic|Ql13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -23274,1497 +22442,1506 @@ dffeas \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ql13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ql13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y11_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pvd3z4~feeder (
+// Location: MLABCELL_X28_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pvd3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Pdbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Kiq2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ql13z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kiq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ql13z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pvd3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pvd3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pvd3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Pvd3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .lut_mask = 64'h3000808000000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y11_N5
-dffeas \soc_inst|m0_1|u_logic|Pvd3z4 (
+// Location: FF_X25_Y9_N8
+dffeas \soc_inst|m0_1|u_logic|Skh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pvd3z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pvd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Skh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pvd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pvd3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X45_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~6 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Pvd3z4~q ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pvd3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~6_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .lut_mask = 64'h0000A28000000000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Skh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y6_N34
-dffeas \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE (
+// Location: FF_X25_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|Djh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Djh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Djh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Djh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y9_N53
-dffeas \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Skh3z4~q  & ( \soc_inst|m0_1|u_logic|Djh3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Skh3z4~q  & ( !\soc_inst|m0_1|u_logic|Djh3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Skh3z4~q  & ( !\soc_inst|m0_1|u_logic|Djh3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Skh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Djh3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .lut_mask = 64'h0C00040008000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y13_N19
-dffeas \soc_inst|m0_1|u_logic|Aud3z4 (
+// Location: FF_X27_Y8_N2
+dffeas \soc_inst|m0_1|u_logic|Vgq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aud3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vgq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aud3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aud3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vgq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~7 (
+// Location: MLABCELL_X25_Y17_N33
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aud3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aud3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aud3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|interconnect_1|HRDATA[24]~17_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~6_combout  & ( \soc_inst|ram_1|read_cycle~q  & ( ((\soc_inst|interconnect_1|mux_sel [0] & \soc_inst|ram_1|byte_select[3]~DUPLICATE_q )) # 
+// (\soc_inst|interconnect_1|mux_sel [1]) ) ) ) # ( \soc_inst|interconnect_1|HRDATA[24]~6_combout  & ( !\soc_inst|ram_1|read_cycle~q  & ( \soc_inst|interconnect_1|mux_sel [1] ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aud3z4~q ),
+	.dataa(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datad(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
+	.dataf(!\soc_inst|ram_1|read_cycle~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~7_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .lut_mask = 64'h8100010080000000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~17 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~17 .lut_mask = 64'h00000F0F00000F5F;
+defparam \soc_inst|interconnect_1|HRDATA[24]~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~8 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Gm1wx4~7_combout  & ( \soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lsd3z4~q  & (!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Lsd3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gm1wx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: IOIBUF_X2_Y0_N58
+cyclonev_io_ibuf \SW[9]~input (
+	.i(SW[9]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[9]~input_o ));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .lut_mask = 64'hCC0C000044040000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .shared_arith = "off";
+defparam \SW[9]~input .bus_hold = "false";
+defparam \SW[9]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: FF_X46_Y12_N10
-dffeas \soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE (
+// Location: FF_X27_Y17_N53
+dffeas \soc_inst|switches_1|switch_store[1][9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\SW[9]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE_q ),
+	.q(\soc_inst|switches_1|switch_store[1][9]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[1][9] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][9] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N41
-dffeas \soc_inst|m0_1|u_logic|Hpd3z4 (
+// Location: FF_X30_Y14_N37
+dffeas \soc_inst|ram_1|saved_word_address[8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hpd3z4~q ),
+	.q(\soc_inst|ram_1|saved_word_address [8]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hpd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hpd3z4 .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[8] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[8] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~3 (
+// Location: LABCELL_X29_Y13_N39
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[8]~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Hpd3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[8]~8_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|Jxovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [8])) ) ) # ( 
+// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [8] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hpd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(!\soc_inst|ram_1|saved_word_address [8]),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|write_cycle~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[8]~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .lut_mask = 64'h0000000000000C0A;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .lut_mask = 64'h5555555505F505F5;
+defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y9_N29
-dffeas \soc_inst|m0_1|u_logic|F8e3z4 (
+// Location: FF_X30_Y14_N25
+dffeas \soc_inst|ram_1|saved_word_address[9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Owovx4~combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F8e3z4~q ),
+	.q(\soc_inst|ram_1|saved_word_address [9]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F8e3z4 .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[9] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[9] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6e3z4~feeder (
+// Location: LABCELL_X29_Y13_N54
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[9]~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6e3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  )
+// \soc_inst|ram_1|memory.raddr_a[9]~9_combout  = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( \soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [9] ) ) ) # ( !\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( 
+// \soc_inst|ram_1|always1~0_combout  & ( \soc_inst|m0_1|u_logic|Owovx4~combout  ) ) ) # ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [9] ) ) ) # ( 
+// !\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [9] ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
+	.datab(!\soc_inst|ram_1|saved_word_address [9]),
+	.datac(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.datae(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6e3z4~feeder_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[9]~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6e3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6e3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Q6e3z4~feeder .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .lut_mask = 64'h333333330F0F3333;
+defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X52_Y9_N11
-dffeas \soc_inst|m0_1|u_logic|Q6e3z4 (
+// Location: FF_X19_Y14_N22
+dffeas \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Q6e3z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q6e3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q6e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~2 (
+// Location: LABCELL_X17_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~41 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Q6e3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|F8e3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6e3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|F8e3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~46  ))
+// \soc_inst|m0_1|u_logic|Add2~42  = CARRY(( !\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~46  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|F8e3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Q6e3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~46 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~41_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~42 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .lut_mask = 64'h00B0008000000000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~41 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N5
-dffeas \soc_inst|m0_1|u_logic|Wqd3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wqd3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X17_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~85 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~42  ))
+// \soc_inst|m0_1|u_logic|Add2~86  = CARRY(( !\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~42  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~42 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~85_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~86 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wqd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wqd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~85 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add2~85 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N32
-dffeas \soc_inst|m0_1|u_logic|Exd3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Exd3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X17_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~81 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~86  ))
+// \soc_inst|m0_1|u_logic|Add2~82  = CARRY(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~86  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~86 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~81_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~82 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Exd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Exd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~81 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~81 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~0 (
+// Location: LABCELL_X19_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wqd3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Exd3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ekhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Add2~81_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~81_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wqd3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Exd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~81_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ekhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .lut_mask = 64'h000000C0000000A0;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .lut_mask = 64'h88808880AAA2AAA2;
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uo5xx4~0 (
+// Location: LABCELL_X29_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4uvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uo5xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Ibe3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|T4uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q 
+// ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ibe3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .lut_mask = 64'h2000000000000000;
-defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .lut_mask = 64'h0002000200000000;
+defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0e3z4~feeder (
+// Location: LABCELL_X22_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txtvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I0e3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Txtvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I0e3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I0e3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I0e3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|I0e3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y12_N22
-dffeas \soc_inst|m0_1|u_logic|I0e3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|I0e3z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I0e3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X29_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F4nvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I0e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I0e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y12_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X1e3z4~feeder (
+// Location: LABCELL_X29_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5uvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X1e3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|A5uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F4nvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mjl2z4~q  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X1e3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X1e3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X1e3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|X1e3z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y12_N17
-dffeas \soc_inst|m0_1|u_logic|X1e3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|X1e3z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X1e3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X1e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X1e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~1 (
+// Location: LABCELL_X24_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5tvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|X1e3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|I0e3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|T5tvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|I0e3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|X1e3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .lut_mask = 64'h0000540400000000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y10_N13
-dffeas \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T5tvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5tvx4 .lut_mask = 64'h00000F0F00000F0F;
+defparam \soc_inst|m0_1|u_logic|T5tvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y8_N46
-dffeas \soc_inst|m0_1|u_logic|M3e3z4 (
+// Location: FF_X24_Y21_N8
+dffeas \soc_inst|m0_1|u_logic|Tna3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M3e3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tna3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M3e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M3e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tna3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tna3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~4 (
+// Location: LABCELL_X22_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aea3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M3e3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M3e3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M3e3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Aea3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M3e3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aea3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .lut_mask = 64'h4040004040000000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~5 (
+// Location: LABCELL_X29_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6tvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Gm1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Gm1wx4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|Gm1wx4~0_combout  & !\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|H6tvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~q  & !\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q 
+// )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gm1wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gm1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .lut_mask = 64'h1010000000000000;
+defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R99wx4~1 (
+// Location: MLABCELL_X28_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5ovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R99wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Gm1wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|R99wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|C5ovx4~combout  = ( \soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|R99wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R99wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R99wx4~1 .lut_mask = 64'h1111313111333133;
-defparam \soc_inst|m0_1|u_logic|R99wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C5ovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5ovx4 .lut_mask = 64'h00000F0F00000F0F;
+defparam \soc_inst|m0_1|u_logic|C5ovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xk1wx4~1 (
+// Location: FF_X22_Y21_N52
+dffeas \soc_inst|m0_1|u_logic|Aea3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Aea3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aea3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aea3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aea3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jca3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xk1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|R99wx4~1_combout  & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|R99wx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|R99wx4~1_combout  & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|R99wx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Jca3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|V4ovx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xk1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .lut_mask = 64'h05AF05AF0A5F0A5F;
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xk1wx4~0 (
+// Location: FF_X17_Y17_N38
+dffeas \soc_inst|m0_1|u_logic|Jca3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jca3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jca3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jca3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tjlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xk1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xk1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Xk1wx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Xk1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Xk1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xk1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .lut_mask = 64'h2200333332303333;
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .lut_mask = 64'hA2AAA2AAA2AAAAAA;
+defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4 (
+// Location: LABCELL_X22_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmnwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|Pmnwx4~combout  = ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pmnwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pmnwx4 .lut_mask = 64'hFFF5FFF500000000;
+defparam \soc_inst|m0_1|u_logic|Pmnwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~1 (
+// Location: LABCELL_X19_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U72wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aj1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~combout ) # ((\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|R99wx4~1_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|U72wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Walwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & (\soc_inst|m0_1|u_logic|Walwx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Imnwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .lut_mask = 64'h005A0000CCDECCCC;
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U72wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U72wx4~0 .lut_mask = 64'h5151F3F3005100F3;
+defparam \soc_inst|m0_1|u_logic|U72wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3cwx4~0 (
+// Location: FF_X21_Y14_N50
+dffeas \soc_inst|m0_1|u_logic|Jwf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jwf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jwf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~109 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S3cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Y29wx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Add2~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~82  ))
+// \soc_inst|m0_1|u_logic|Add2~110  = CARRY(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~82  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~82 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~109_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~110 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~109 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~109 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add2~109 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ab9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ab9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S3cwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .lut_mask = 64'h0F0F0000AFAFAAAA;
-defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y6_N37
-dffeas \soc_inst|m0_1|u_logic|Rds2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rds2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rds2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rds2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .lut_mask = 64'h0000080000000000;
+defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D432z4~0 (
+// Location: LABCELL_X35_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ciawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D432z4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Rds2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ciawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rds2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D432z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ciawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D432z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D432z4~0 .lut_mask = 64'h0800000000000000;
-defparam \soc_inst|m0_1|u_logic|D432z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .lut_mask = 64'hF0F0F0F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y10_N49
-dffeas \soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE (
+// Location: FF_X23_Y9_N41
+dffeas \soc_inst|m0_1|u_logic|Wj83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Wj83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wj83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y11_N43
-dffeas \soc_inst|m0_1|u_logic|Hc23z4 (
+// Location: FF_X23_Y13_N20
+dffeas \soc_inst|m0_1|u_logic|Mi33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hc23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mi33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hc23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mi33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~0 (
+// Location: LABCELL_X23_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) 
-// # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Hc23z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Mi33z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Wj83z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mi33z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Wj83z4~q ) # (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hc23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wj83z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mi33z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .lut_mask = 64'h0000C000A0000000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .lut_mask = 64'h0000504000000040;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y11_N56
-dffeas \soc_inst|m0_1|u_logic|Ql33z4 (
+// Location: LABCELL_X29_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y91xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y91xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ) ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .lut_mask = 64'h0000F00000000000;
+defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N59
+dffeas \soc_inst|m0_1|u_logic|Hnr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ql33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hnr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ql33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hnr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hnr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Na73z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Na73z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Na73z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Na73z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Na73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Na73z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y11_N40
-dffeas \soc_inst|m0_1|u_logic|I463z4~DUPLICATE (
+// Location: FF_X24_Y12_N49
+dffeas \soc_inst|m0_1|u_logic|Na73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Na73z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I463z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Na73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I463z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I463z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Na73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~3 (
+// Location: LABCELL_X23_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Ql33z4~q )) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|I463z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Na73z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  
+// & !\soc_inst|m0_1|u_logic|Hnr2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Na73z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Hnr2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ql33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|I463z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hnr2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Na73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .lut_mask = 64'h000000000A0C0000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .lut_mask = 64'h1110000001000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y9_N20
-dffeas \soc_inst|m0_1|u_logic|B613z4 (
+// Location: FF_X23_Y13_N49
+dffeas \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B613z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B613z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B613z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y10_N35
-dffeas \soc_inst|m0_1|u_logic|H903z4~DUPLICATE (
+// Location: FF_X33_Y12_N26
+dffeas \soc_inst|m0_1|u_logic|D923z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|D923z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H903z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H903z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D923z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D923z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~4 (
+// Location: LABCELL_X23_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B613z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|B613z4~q ) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  = ( \soc_inst|m0_1|u_logic|D923z4~q  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout  & (!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout  & 
+// \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|D923z4~q  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout  & (!\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout  & \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|D923z4~q  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout  & 
+// !\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|D923z4~q  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout  & (!\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Hc1wx4~6_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B613z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|D923z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .lut_mask = 64'h080C000008000000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .lut_mask = 64'h8080A0A0008000A0;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z8s2z4~feeder (
+// Location: LABCELL_X23_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ciawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Ciawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( 
+// \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ciawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ciawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ciawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ciawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z8s2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z8s2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Z8s2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .lut_mask = 64'h040F040F040F0F0F;
+defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y10_N20
-dffeas \soc_inst|m0_1|u_logic|Z8s2z4 (
+// Location: FF_X18_Y14_N31
+dffeas \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z8s2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z8s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z8s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~1 (
+// Location: LABCELL_X36_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bnnvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Rkd3z4~q  & ( (!\soc_inst|m0_1|u_logic|Z8s2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Rkd3z4~q  & ( (!\soc_inst|m0_1|u_logic|Z8s2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Rkd3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Bnnvx4~combout  = ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( ((!\soc_inst|m0_1|u_logic|Tyx2z4~q  $ (\soc_inst|m0_1|u_logic|J4x2z4~q )) # (\soc_inst|m0_1|u_logic|Fcj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( ((!\soc_inst|m0_1|u_logic|Tyx2z4~q  $ (\soc_inst|m0_1|u_logic|J4x2z4~q )) # (\soc_inst|m0_1|u_logic|Fcj2z4~q 
+// )) # (\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( ((!\soc_inst|m0_1|u_logic|Tyx2z4~q  $ (\soc_inst|m0_1|u_logic|J4x2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Fcj2z4~q )) # (\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z8s2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bnnvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .lut_mask = 64'hC000080000000800;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y11_N22
-dffeas \soc_inst|m0_1|u_logic|K7s2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K7s2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K7s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K7s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bnnvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bnnvx4 .lut_mask = 64'hFFFFF77FF77FF77F;
+defparam \soc_inst|m0_1|u_logic|Bnnvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zu43z4~feeder (
+// Location: LABCELL_X17_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zu43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Add2~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Fcj2z4~q  ) + ( !\soc_inst|m0_1|u_logic|J4x2z4~q  ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|Add2~26  = CARRY(( !\soc_inst|m0_1|u_logic|Fcj2z4~q  ) + ( !\soc_inst|m0_1|u_logic|J4x2z4~q  ) + ( !VCC ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~25_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zu43z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zu43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Zu43z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y12_N14
-dffeas \soc_inst|m0_1|u_logic|Zu43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zu43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zu43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zu43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~25 .lut_mask = 64'h00000F0F0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~2 (
+// Location: LABCELL_X17_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|K7s2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Zu43z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~26  ))
+// \soc_inst|m0_1|u_logic|Add2~18  = CARRY(( !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~26  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|K7s2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zu43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~17_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~18 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .lut_mask = 64'h000C0000000A0000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~17 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~5 (
+// Location: MLABCELL_X21_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bmhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Zh5wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|D432z4~0_combout  & (!\soc_inst|m0_1|u_logic|Zh5wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Zh5wx4~3_combout  & !\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bmhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G7x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Add2~17_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|G7x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~17_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D432z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zh5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zh5wx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add2~17_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bmhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .lut_mask = 64'hA080A080F0D0F0D0;
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~9 (
+// Location: LABCELL_X19_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Zh5wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|Amyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|C3w2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( !\soc_inst|m0_1|u_logic|C3w2z4~q  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .lut_mask = 64'hF0F0A00000000000;
+defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~2 (
+// Location: LABCELL_X19_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ) # ((\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Amyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & 
+// ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do1wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .lut_mask = 64'h5050DCDC0000CCCC;
-defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .lut_mask = 64'h5555444454544444;
+defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~1 (
+// Location: LABCELL_X22_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|S3cwx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|S3cwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|S3cwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|S3cwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|S3cwx4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Amyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Amyvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Amyvx4~1_combout  & \soc_inst|m0_1|u_logic|Yilwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Amyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Amyvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .lut_mask = 64'hAAA0AA0AA8088A80;
-defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .lut_mask = 64'h000C000C00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~0 (
+// Location: MLABCELL_X21_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ykyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Do1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Do1wx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Do1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Do1wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X77wx4~combout  & ((!\soc_inst|m0_1|u_logic|C3w2z4~q ) # (((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )))) ) ) # ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Do1wx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Do1wx4~1_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .lut_mask = 64'h00000000E0E0F0F0;
-defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .lut_mask = 64'hF0F0F0F0F0B0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~113 (
+// Location: LABCELL_X27_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rw7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Konvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~42  ))
-// \soc_inst|m0_1|u_logic|Add5~114  = CARRY(( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Konvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~42  ))
+// \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Svqwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~42 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~113_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~114 ),
+	.combout(\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~113 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~113 .lut_mask = 64'h0000FF550000C03F;
-defparam \soc_inst|m0_1|u_logic|Add5~113 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .lut_mask = 64'h00FF00FF55555555;
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~105 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~105_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~114  ))
-// \soc_inst|m0_1|u_logic|Add5~106  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~114  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~114 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~105_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~106 ),
-	.shareout());
+// Location: FF_X28_Y12_N28
+dffeas \soc_inst|m0_1|u_logic|Hbv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hbv2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~105 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~105 .lut_mask = 64'h0000C03F000000AA;
-defparam \soc_inst|m0_1|u_logic|Add5~105 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hbv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hbv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Glnwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y12_N44
+dffeas \soc_inst|m0_1|u_logic|H2m2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H2m2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .lut_mask = 64'h00000000FFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H2m2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pn1wx4~0 (
+// Location: MLABCELL_X28_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Glnwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout  & (\soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Add5~105_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ebbwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Hbv2z4~q  & ( \soc_inst|m0_1|u_logic|H2m2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hbv2z4~q  & ( !\soc_inst|m0_1|u_logic|H2m2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hbv2z4~q  & ( !\soc_inst|m0_1|u_logic|H2m2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hbv2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H2m2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .lut_mask = 64'h0051005100000000;
-defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .lut_mask = 64'h1100100001000000;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N50
-dffeas \soc_inst|m0_1|u_logic|Arv2z4 (
+// Location: FF_X27_Y12_N23
+dffeas \soc_inst|m0_1|u_logic|Y1u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Arv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Y1u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Arv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y1u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y8_N52
-dffeas \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE (
+// Location: FF_X27_Y12_N11
+dffeas \soc_inst|m0_1|u_logic|H783z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|H783z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H783z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H783z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~7 (
+// Location: LABCELL_X27_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Arv2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Arv2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ebbwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Y1u2z4~q  & ( \soc_inst|m0_1|u_logic|H783z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y1u2z4~q  & ( !\soc_inst|m0_1|u_logic|H783z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y1u2z4~q  & ( !\soc_inst|m0_1|u_logic|H783z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Arv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Y1u2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H783z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .lut_mask = 64'h0000000032000200;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .lut_mask = 64'h000A000200080000;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y10_N41
-dffeas \soc_inst|m0_1|u_logic|An83z4 (
+// Location: FF_X27_Y10_N56
+dffeas \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|An83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|An83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|An83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y10_N38
-dffeas \soc_inst|m0_1|u_logic|Rd73z4 (
+// Location: FF_X27_Y10_N8
+dffeas \soc_inst|m0_1|u_logic|Yx63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -24772,1055 +23949,941 @@ dffeas \soc_inst|m0_1|u_logic|Rd73z4 (
 	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rd73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rd73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rd73z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X45_Y11_N4
-dffeas \soc_inst|m0_1|u_logic|Gt93z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gt93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Yx63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gt93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gt93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yx63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~6 (
+// Location: LABCELL_X27_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Gt93z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Gt93z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rd73z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gt93z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rd73z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ebbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yx63z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rd73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Gt93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yx63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .lut_mask = 64'h0200020000030000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .lut_mask = 64'h00000000AC000000;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y6_N58
-dffeas \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE (
+// Location: FF_X28_Y12_N5
+dffeas \soc_inst|m0_1|u_logic|T0m2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|T0m2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~8 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & (\soc_inst|m0_1|u_logic|An83z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Zh5wx4~6_combout  & \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & 
-// (\soc_inst|m0_1|u_logic|An83z4~q  & !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & 
-// (!\soc_inst|m0_1|u_logic|Zh5wx4~6_combout  & \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & 
-// !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|An83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .lut_mask = 64'hA0A000A020200020;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3cwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|S3cwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mddwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mddwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|S3cwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .lut_mask = 64'h2A2A22222AAA22AA;
-defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T0m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T0m2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~45 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~45_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~106  ))
-// \soc_inst|m0_1|u_logic|Add5~46  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~106  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~106 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~45_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~46 ),
-	.shareout());
+// Location: FF_X25_Y12_N17
+dffeas \soc_inst|m0_1|u_logic|Yb93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yb93z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~45 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~45 .lut_mask = 64'h00008877000000F0;
-defparam \soc_inst|m0_1|u_logic|Add5~45 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yb93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yb93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~2 (
+// Location: MLABCELL_X25_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aj1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ebbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T0m2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yb93z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T0m2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yb93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .lut_mask = 64'h8888888800008888;
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .lut_mask = 64'h0000000000000A0C;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlnwx4~0 (
+// Location: MLABCELL_X28_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Ebbwx4~combout  = ( !\soc_inst|m0_1|u_logic|Ebbwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ebbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ebbwx4~3_combout  & !\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ebbwx4~3_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ebbwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4 .lut_mask = 64'hAA00000000000000;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecowx4 (
+// Location: LABCELL_X27_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jmdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ecowx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B2uvx4~0_combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Lz93z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Jmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bdwwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Bdwwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ebbwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdwwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ecowx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ecowx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ecowx4 .lut_mask = 64'h0000000000300030;
-defparam \soc_inst|m0_1|u_logic|Ecowx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[19]~14 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q )) # (\soc_inst|m0_1|u_logic|R40wx4~combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nn0wx4~combout  & ( (\soc_inst|m0_1|u_logic|R40wx4~combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .lut_mask = 64'h00F500F50AFF0AFF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .lut_mask = 64'h0F0F0F0F0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5ovx4 (
+// Location: LABCELL_X24_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rw7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C5ovx4~combout  = ( \soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Rw7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jmdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jmdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Rw7wx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5ovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C5ovx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|C5ovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y10_N35
-dffeas \soc_inst|m0_1|u_logic|L8m2z4 (
+// Location: FF_X37_Y9_N43
+dffeas \soc_inst|m0_1|u_logic|I2t2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.d(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L8m2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I2t2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L8m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L8m2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6owx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|G6owx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|H6tvx4~0_combout  ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6owx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G6owx4 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|G6owx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rilwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & \soc_inst|m0_1|u_logic|L8m2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Ecowx4~combout 
-//  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L8m2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rilwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .lut_mask = 64'hF0F0F0F000F000F0;
-defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I2t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I2t2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5uvx4~0 (
+// Location: LABCELL_X35_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lk9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A5uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F4nvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mjl2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Lk9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~q ) # ((\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .lut_mask = 64'h0F000F00CFCCCFCC;
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5tvx4 (
+// Location: LABCELL_X29_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ld1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T5tvx4~combout  = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T5tvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T5tvx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|T5tvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y9_N16
-dffeas \soc_inst|m0_1|u_logic|Tna3z4 (
+// Location: FF_X34_Y10_N20
+dffeas \soc_inst|m0_1|u_logic|Hq33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hq33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tna3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tna3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aea3z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Aea3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aea3z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hq33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hq33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N38
-dffeas \soc_inst|m0_1|u_logic|Aea3z4 (
+// Location: FF_X23_Y9_N22
+dffeas \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Aea3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aea3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aea3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aea3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nfb3z4~0 (
+// Location: MLABCELL_X28_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S61xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nfb3z4~0_combout  = !\soc_inst|m0_1|u_logic|hwdata_o [7]
+// \soc_inst|m0_1|u_logic|S61xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S61xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S61xx4~0 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|S61xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y10_N25
-dffeas \soc_inst|m0_1|u_logic|Nfb3z4 (
+// Location: FF_X34_Y10_N43
+dffeas \soc_inst|m0_1|u_logic|Ii73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nfb3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ii73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nfb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nfb3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[4] (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o [4] = ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o [4]),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ii73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ii73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Taa3z4~0 (
+// Location: LABCELL_X29_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qc1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Taa3z4~0_combout  = !\soc_inst|m0_1|u_logic|hwdata_o [4]
+// \soc_inst|m0_1|u_logic|Qc1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Taa3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .lut_mask = 64'hF0F0F0F0F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y10_N7
-dffeas \soc_inst|m0_1|u_logic|Taa3z4 (
+// Location: FF_X23_Y11_N28
+dffeas \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Taa3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Taa3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Taa3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Taa3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y9_N26
-dffeas \soc_inst|m0_1|u_logic|Gza3z4 (
+// Location: FF_X23_Y11_N19
+dffeas \soc_inst|m0_1|u_logic|Z863z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gza3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z863z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gza3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gza3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z863z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z863z4 .power_up = "low";
 // synopsys translate_on
-
-// Location: LABCELL_X30_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~94 (
+
+// Location: MLABCELL_X34_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~94_cout  = CARRY(( !\soc_inst|m0_1|u_logic|F2o2z4~q  ) + ( VCC ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|P12wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Z863z4~q  & ( \soc_inst|m0_1|u_logic|Szr2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z863z4~q  & ( !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z863z4~q  & ( !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Z863z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~2_combout ),
 	.sumout(),
-	.cout(\soc_inst|m0_1|u_logic|Add0~94_cout ),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~94 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~94 .lut_mask = 64'h000000000000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add0~94 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~2 .lut_mask = 64'h8002800000020000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~33 (
+// Location: MLABCELL_X21_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg23z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~94_cout  ))
-// \soc_inst|m0_1|u_logic|Add0~34  = CARRY(( !\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~94_cout  ))
+// \soc_inst|m0_1|u_logic|Yg23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~94_cout ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~33_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~34 ),
+	.combout(\soc_inst|m0_1|u_logic|Yg23z4~feeder_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~33 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~33 .lut_mask = 64'h000000000000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add0~33 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yg23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yg23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Yg23z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y11_N38
-dffeas \soc_inst|m0_1|u_logic|C4b3z4 (
+// Location: FF_X21_Y11_N31
+dffeas \soc_inst|m0_1|u_logic|Yg23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Yg23z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C4b3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Yg23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C4b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C4b3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yg23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yg23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfa3z4~0 (
+// Location: MLABCELL_X21_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz43z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qfa3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o [1] )
+// \soc_inst|m0_1|u_logic|Qz43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.dataf(!\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qfa3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qz43z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qz43z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Qz43z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y11_N34
-dffeas \soc_inst|m0_1|u_logic|Qfa3z4 (
+// Location: FF_X21_Y11_N26
+dffeas \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qfa3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qz43z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qfa3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfa3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qfa3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xsmvx4~0 (
+// Location: MLABCELL_X34_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C4b3z4~q  & ( \soc_inst|m0_1|u_logic|Qfa3z4~q  & ( (!\soc_inst|m0_1|u_logic|Add0~33_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C4b3z4~q  & ( \soc_inst|m0_1|u_logic|Qfa3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~33_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C4b3z4~q  & ( !\soc_inst|m0_1|u_logic|Qfa3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~33_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C4b3z4~q  & ( !\soc_inst|m0_1|u_logic|Qfa3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~33_sumout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yg23z4~q  & ( \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yg23z4~q  & ( !\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yg23z4~q  & ( !\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add0~33_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qfa3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yg23z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .lut_mask = 64'h2F0FEFCF2F3FEFFF;
-defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~1 .lut_mask = 64'h0808000808000000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|P12wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ii73z4~q  & (!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ii73z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ii73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|P12wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~3 .lut_mask = 64'hD0DD000000000000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y11_N37
-dffeas \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE (
+// Location: FF_X34_Y10_N40
+dffeas \soc_inst|m0_1|u_logic|E913z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|E913z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E913z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E913z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~21 (
+// Location: MLABCELL_X34_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M2b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~34  ))
-// \soc_inst|m0_1|u_logic|Add0~22  = CARRY(( !\soc_inst|m0_1|u_logic|M2b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~34  ))
+// \soc_inst|m0_1|u_logic|P12wx4~7_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|E913z4~q )))) # (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|E913z4~q )) # (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|E913z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~34 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~21_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~22 ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~7_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~21 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~7 .lut_mask = 64'hD0F0D0F0D8F8D8F8;
+defparam \soc_inst|m0_1|u_logic|P12wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gha3z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Gha3z4~0_combout  = !\soc_inst|m0_1|u_logic|hwdata_o [2]
+// Location: FF_X24_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Qyc3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qyc3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qyc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qyc3z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y10_N1
+dffeas \soc_inst|m0_1|u_logic|Rvv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rvv2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .lut_mask = 64'hFF00FF00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rvv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y11_N58
-dffeas \soc_inst|m0_1|u_logic|Gha3z4 (
+// Location: FF_X22_Y11_N1
+dffeas \soc_inst|m0_1|u_logic|Kc03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gha3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kc03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gha3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gha3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kc03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kc03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qsmvx4~0 (
+// Location: MLABCELL_X34_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M2b3z4~q  & ( \soc_inst|m0_1|u_logic|Gha3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~21_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|M2b3z4~q  & ( \soc_inst|m0_1|u_logic|Gha3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~21_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|M2b3z4~q  & ( !\soc_inst|m0_1|u_logic|Gha3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~21_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|M2b3z4~q  & ( !\soc_inst|m0_1|u_logic|Gha3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~21_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Rvv2z4~q  & ( \soc_inst|m0_1|u_logic|Kc03z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Qyc3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rvv2z4~q  & ( \soc_inst|m0_1|u_logic|Kc03z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q ))) # (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Qyc3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rvv2z4~q  & ( !\soc_inst|m0_1|u_logic|Kc03z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Qyc3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rvv2z4~q  & ( !\soc_inst|m0_1|u_logic|Kc03z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (!\soc_inst|m0_1|u_logic|Qyc3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~21_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gha3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qyc3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rvv2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kc03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .lut_mask = 64'h4F0FEFAF5F1FFFBF;
-defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~6 .lut_mask = 64'hB1B0A1A091908180;
+defparam \soc_inst|m0_1|u_logic|P12wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y11_N1
-dffeas \soc_inst|m0_1|u_logic|M2b3z4 (
+// Location: FF_X25_Y10_N16
+dffeas \soc_inst|m0_1|u_logic|Cvr2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M2b3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cvr2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M2b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M2b3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~57 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~22  ))
-// \soc_inst|m0_1|u_logic|Add0~58  = CARRY(( !\soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~22  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~22 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~57_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~58 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~57 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~57 .lut_mask = 64'h000000000000FF00;
-defparam \soc_inst|m0_1|u_logic|Add0~57 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cvr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cvr2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y13_N49
-dffeas \soc_inst|m0_1|u_logic|W0b3z4 (
+// Location: FF_X23_Y9_N7
+dffeas \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W0b3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W0b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W0b3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~20 (
+// Location: MLABCELL_X28_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~20_combout  = ( \soc_inst|m0_1|u_logic|R40wx4~combout  ) # ( !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( !\soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|P12wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Cvr2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Cvr2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cvr2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .lut_mask = 64'hAAAAAAAAFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~4 .lut_mask = 64'hF500F500A000A000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y13_N43
-dffeas \soc_inst|m0_1|u_logic|Wia3z4 (
+// Location: FF_X24_Y10_N32
+dffeas \soc_inst|m0_1|u_logic|Eyr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wia3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Eyr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wia3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wia3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eyr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eyr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsmvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W0b3z4~q  & ( \soc_inst|m0_1|u_logic|Wia3z4~q  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~57_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0b3z4~q  & ( \soc_inst|m0_1|u_logic|Wia3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~57_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|W0b3z4~q  & ( !\soc_inst|m0_1|u_logic|Wia3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~57_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0b3z4~q  & ( !\soc_inst|m0_1|u_logic|Wia3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~57_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~57_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wia3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y10_N11
+dffeas \soc_inst|m0_1|u_logic|Asr2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Asr2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .lut_mask = 64'h3B33FBF33F37FFF7;
-defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Asr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Asr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y13_N50
-dffeas \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE (
+// Location: FF_X30_Y7_N40
+dffeas \soc_inst|m0_1|u_logic|Otr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Otr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Otr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Otr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~41 (
+// Location: LABCELL_X24_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~58  ))
-// \soc_inst|m0_1|u_logic|Add0~42  = CARRY(( !\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~58  ))
+// \soc_inst|m0_1|u_logic|P12wx4~5_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Otr2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Asr2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Otr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Eyr2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Otr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Asr2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Otr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Eyr2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
-	.datac(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Eyr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Asr2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Otr2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~5 .lut_mask = 64'hC0C0FFF0C0C00F00;
+defparam \soc_inst|m0_1|u_logic|P12wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~0_combout  = ( \soc_inst|m0_1|u_logic|P12wx4~4_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|P12wx4~7_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|P12wx4~6_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|P12wx4~7_combout )) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|P12wx4~6_combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~4_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|P12wx4~7_combout  & 
+// ((\soc_inst|m0_1|u_logic|P12wx4~6_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|P12wx4~7_combout )) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|P12wx4~6_combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|P12wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (((!\soc_inst|m0_1|u_logic|H3d3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|P12wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|P12wx4~7_combout )) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|P12wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|P12wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|P12wx4~7_combout )) # (\soc_inst|m0_1|u_logic|H3d3z4~q  
+// & ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|P12wx4~7_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|P12wx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|P12wx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~5_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~0 .lut_mask = 64'h0A03FA030A8BFA8B;
+defparam \soc_inst|m0_1|u_logic|P12wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~combout  = ( \soc_inst|m0_1|u_logic|P12wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & (\soc_inst|m0_1|u_logic|Hq33z4~q  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hq33z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P12wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4 .lut_mask = 64'h0000BB0B00000000;
+defparam \soc_inst|m0_1|u_logic|P12wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lk9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Lk9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~combout  & ( (!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|W7z2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lk9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|W7z2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~58 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~41_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~42 ),
+	.combout(\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~41 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~41 .lut_mask = 64'h000000000000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add0~41 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .lut_mask = 64'hA2A20000F3F30000;
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Csmvx4~0 (
+// Location: LABCELL_X29_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Csmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gza3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~41_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Taa3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gza3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~41_sumout  & ( ((\soc_inst|m0_1|u_logic|Taa3z4~q  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gza3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~41_sumout  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # (\soc_inst|m0_1|u_logic|Taa3z4~q )) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gza3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~41_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Taa3z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Pgnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I793z4~q  & ( \soc_inst|m0_1|u_logic|S4qvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I793z4~q  & ( \soc_inst|m0_1|u_logic|S4qvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I793z4~q  & ( !\soc_inst|m0_1|u_logic|S4qvx4~combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I793z4~q  & ( !\soc_inst|m0_1|u_logic|S4qvx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Taa3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add0~41_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I793z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .lut_mask = 64'h5F57FFF75557F5F7;
-defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .lut_mask = 64'h0F03FFF30A02AAA2;
+defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y9_N25
-dffeas \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE (
+// Location: FF_X29_Y14_N31
+dffeas \soc_inst|m0_1|u_logic|I793z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -25829,2053 +24892,2079 @@ dffeas \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|I793z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I793z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I793z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~65 (
+// Location: FF_X21_Y11_N25
+dffeas \soc_inst|m0_1|u_logic|Qz43z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qz43z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qz43z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qz43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Qxa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~42  ))
-// \soc_inst|m0_1|u_logic|Add0~66  = CARRY(( !\soc_inst|m0_1|u_logic|Qxa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~42  ))
+// \soc_inst|m0_1|u_logic|Kn9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Qz43z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Z863z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qz43z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z863z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~42 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~65_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~66 ),
+	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~65 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~65 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~65 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .lut_mask = 64'h0000000045400000;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[5] (
+// Location: MLABCELL_X21_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o [5] = (!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout )
+// \soc_inst|m0_1|u_logic|Kn9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hq33z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yg23z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hq33z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yg23z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yg23z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hq33z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o [5]),
+	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .lut_mask = 64'hF0FFF0FFF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .lut_mask = 64'h4404400000000000;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y11_N38
-dffeas \soc_inst|m0_1|u_logic|Mka3z4 (
+// Location: FF_X23_Y11_N29
+dffeas \soc_inst|m0_1|u_logic|Qwr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [5]),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mka3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qwr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mka3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mka3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qwr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qwr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vrmvx4~0 (
+// Location: MLABCELL_X21_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hp9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vrmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qxa3z4~q  & ( \soc_inst|m0_1|u_logic|Mka3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~65_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxa3z4~q  & ( \soc_inst|m0_1|u_logic|Mka3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~65_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qxa3z4~q  & ( !\soc_inst|m0_1|u_logic|Mka3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~65_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxa3z4~q  & ( !\soc_inst|m0_1|u_logic|Mka3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (!\soc_inst|m0_1|u_logic|Add0~65_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hp9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Qwr2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Add0~65_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mka3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qwr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .lut_mask = 64'h7555FDDD7577FDFF;
-defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y11_N49
-dffeas \soc_inst|m0_1|u_logic|Qxa3z4 (
+// Location: FF_X22_Y11_N2
+dffeas \soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxa3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qxa3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~89 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Z8b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~66  ))
-// \soc_inst|m0_1|u_logic|Add0~90  = CARRY(( !\soc_inst|m0_1|u_logic|Z8b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~66  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~66 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~89_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~90 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~89 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~89 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~89 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtzvx4~0 (
+// Location: LABCELL_X22_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qtzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kn9wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|E913z4~q  & ( (!\soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|E913z4~q  & ( (!\soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|E913z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E913z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .lut_mask = 64'h55005500AA00AA00;
-defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .lut_mask = 64'h3000200000002000;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oszvx4~0 (
+// Location: MLABCELL_X21_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oszvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qtzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Uvzvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qtzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvzvx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Kn9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Kn9wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Eyr2z4~q  & (!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kn9wx4~1_combout  & !\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kn9wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kn9wx4~1_combout  & !\soc_inst|m0_1|u_logic|Hp9wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Eyr2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kn9wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oszvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .lut_mask = 64'h8A8A8A008A8A8A00;
-defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .lut_mask = 64'hC000000040000000;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luzvx4~1 (
+// Location: LABCELL_X30_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F32wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|F32wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( \soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|I793z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( \soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|I793z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( !\soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|I793z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( !\soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|I793z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I793z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .lut_mask = 64'h0F550F55550F550F;
-defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F32wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F32wx4~0 .lut_mask = 64'hF0BBF0BBF0BBF088;
+defparam \soc_inst|m0_1|u_logic|F32wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luzvx4~0 (
+// Location: LABCELL_X36_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Euzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Luzvx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Euzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Luzvx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pdi2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zz1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Luzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .lut_mask = 64'h0000CE0A0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .lut_mask = 64'hF9F9F690F9F90000;
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Omyvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Omyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q  & (\soc_inst|m0_1|u_logic|C3w2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Wxp2z4~q  & (\soc_inst|m0_1|u_logic|C3w2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+// Location: FF_X27_Y11_N50
+dffeas \soc_inst|m0_1|u_logic|Mcz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mcz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mcz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mcz2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Omyvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y11_N32
+dffeas \soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .lut_mask = 64'h02FF02FF02000200;
-defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Omyvx4~1 (
+// Location: LABCELL_X23_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pl62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Omyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Omyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hw2wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|Omyvx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Omyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Omyvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Pl62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pl62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .lut_mask = 64'h00AA0AAACCEECEEE;
-defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .lut_mask = 64'h0000400000000000;
+defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pcd3z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pcd3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|Wd13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wd13z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wd13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wd13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N52
-dffeas \soc_inst|m0_1|u_logic|Pcd3z4 (
+// Location: FF_X27_Y11_N35
+dffeas \soc_inst|m0_1|u_logic|Fn23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fn23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pcd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pcd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fn23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sj62z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wd13z4~q  & ( \soc_inst|m0_1|u_logic|Fn23z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wd13z4~q  & ( !\soc_inst|m0_1|u_logic|Fn23z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wd13z4~q  & ( !\soc_inst|m0_1|u_logic|Fn23z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wd13z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fn23z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Sj62z4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .lut_mask = 64'h0808000808000000;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y12_N2
-dffeas \soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE (
+// Location: FF_X27_Y11_N2
+dffeas \soc_inst|m0_1|u_logic|Ikz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ikz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ikz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ikz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y12_N25
-dffeas \soc_inst|m0_1|u_logic|U5a3z4 (
+// Location: FF_X28_Y15_N58
+dffeas \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U5a3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U5a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5tvx4~0 (
+// Location: LABCELL_X27_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M5tvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|Mjl2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Sj62z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ikz2z4~q  & ( \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ikz2z4~q  & ( !\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ikz2z4~q  & ( !\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ikz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sj62z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .lut_mask = 64'h0C000C0000000000;
-defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .lut_mask = 64'h0A00080002000000;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y14_N1
-dffeas \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE (
+// Location: FF_X24_Y13_N29
+dffeas \soc_inst|m0_1|u_logic|X553z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|X553z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X553z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X553z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y14_N31
-dffeas \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE (
+// Location: FF_X22_Y13_N49
+dffeas \soc_inst|m0_1|u_logic|Ow33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ow33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ow33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txa2z4~0 (
+// Location: LABCELL_X24_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Txa2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Sj62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|X553z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Ow33z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|X553z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ow33z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sj62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .lut_mask = 64'h0000000000020000;
-defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .lut_mask = 64'h000000000C000808;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yz4wx4 (
+// Location: LABCELL_X27_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yz4wx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( (\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Sj62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Sj62z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Sj62z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pl62z4~0_combout  & (!\soc_inst|m0_1|u_logic|Sj62z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mcz2z4~q )))) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mcz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pl62z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sj62z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sj62z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sj62z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Sj62z4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yonvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yonvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Sj62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|I793z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Bywwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Sj62z4~3_combout  & ( !\soc_inst|m0_1|u_logic|U593z4~q  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sj62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|I793z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Sj62z4~3_combout  & ( !\soc_inst|m0_1|u_logic|U593z4~q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|U593z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I793z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sj62z4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .lut_mask = 64'hAAAAFF33AAAAFC30;
+defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tuawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|K9z2z4~q  & \soc_inst|m0_1|u_logic|Xwawx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Y29wx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|K9z2z4~q  & \soc_inst|m0_1|u_logic|Xwawx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|K9z2z4~q  & \soc_inst|m0_1|u_logic|Xwawx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tuawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yz4wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yz4wx4 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Yz4wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .lut_mask = 64'h00AA00AAFFFF00AA;
+defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zyhvx4~0 (
+// Location: LABCELL_X31_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zyhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rym2z4~q  & (!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout 
-// ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Rym2z4~q  & (((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|Rym2z4~q  & (\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rym2z4~q  & (!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Rym2z4~q  & (((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|Rym2z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Tuawx4~1_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tuawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tuawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .lut_mask = 64'h5550DDD01110DDD0;
-defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .lut_mask = 64'hFF550F0500000000;
+defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y13_N56
-dffeas \soc_inst|m0_1|u_logic|Rym2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rym2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~37 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~110  ))
+// \soc_inst|m0_1|u_logic|Add5~38  = CARRY(( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~110  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~110 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~38 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rym2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rym2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~37 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~37 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~81 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~81_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~38  ))
+// \soc_inst|m0_1|u_logic|Add5~82  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~38  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~38 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~82 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~81 .lut_mask = 64'h0000C03F000000AA;
+defparam \soc_inst|m0_1|u_logic|Add5~81 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~41 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~41_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~82  ))
+// \soc_inst|m0_1|u_logic|Add5~42  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~82  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~82 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~42 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~41 .lut_mask = 64'h0000C03F000000AA;
+defparam \soc_inst|m0_1|u_logic|Add5~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zyovx4 (
+// Location: LABCELL_X22_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zyovx4~combout  = (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|K3l2z4~q )
+// \soc_inst|m0_1|u_logic|Zz1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|P12wx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|P12wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|P12wx4~combout ))) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zyovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zyovx4 .lut_mask = 64'h0033003300330033;
-defparam \soc_inst|m0_1|u_logic|Zyovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .lut_mask = 64'hCF00CF000000CF00;
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqc3z4~0 (
+// Location: LABCELL_X19_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I7owx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tqc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) # (\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Tqc3z4~q ))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Tqc3z4~q  ) )
+// \soc_inst|m0_1|u_logic|I7owx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I7owx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .lut_mask = 64'h00FF00FFA0AFA0AF;
-defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y13_N52
-dffeas \soc_inst|m0_1|u_logic|Tqc3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tqc3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tqc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I7owx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I7owx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|I7owx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~1 (
+// Location: LABCELL_X19_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6owx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1pwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tqc3z4~q  & ( (\soc_inst|m0_1|u_logic|Rym2z4~q ) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tqc3z4~q  & ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tqc3z4~q  & ( \soc_inst|m0_1|u_logic|Rym2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|G6owx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|H6tvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1pwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .lut_mask = 64'h00000F0F55555F5F;
-defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G6owx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6owx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|G6owx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kss2z4~0 (
+// Location: LABCELL_X29_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5tvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kss2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|M5tvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Mjl2z4~q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .lut_mask = 64'h0C000C0000000000;
+defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0uvx4 (
+// Location: LABCELL_X22_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zyovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E0uvx4~combout  = ( !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|Kop2z4~q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Mjl2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Zyovx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E0uvx4 .lut_mask = 64'h0010001000000000;
-defparam \soc_inst|m0_1|u_logic|E0uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zyovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zyovx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Zyovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qztvx4 (
+// Location: LABCELL_X27_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ztc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qztvx4~combout  = (\soc_inst|m0_1|u_logic|E0uvx4~combout  & \soc_inst|m0_1|u_logic|K3l2z4~q )
+// \soc_inst|m0_1|u_logic|Ztc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Ztc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( \soc_inst|m0_1|u_logic|Ztc3z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qztvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qztvx4 .lut_mask = 64'h0055005500550055;
-defparam \soc_inst|m0_1|u_logic|Qztvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .lut_mask = 64'h00FF00FF0AFA0AFA;
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y10_N40
-dffeas \soc_inst|m0_1|u_logic|Kss2z4 (
+// Location: FF_X27_Y19_N5
+dffeas \soc_inst|m0_1|u_logic|Ztc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kss2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ztc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kss2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kss2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|M1pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kss2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & ((!\soc_inst|m0_1|u_logic|J6i2z4~q )))) # (\soc_inst|m0_1|u_logic|Kss2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|J6i2z4~q )) # (\soc_inst|m0_1|u_logic|E0uvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kss2z4~q  & \soc_inst|m0_1|u_logic|E0uvx4~combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Kss2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1pwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y20_N32
+dffeas \soc_inst|m0_1|u_logic|Trq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .lut_mask = 64'h0505050537053705;
-defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Trq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Trq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|M1pwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|M1pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M1pwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Mis2z4~q ) # (!\soc_inst|m0_1|u_logic|Qwowx4~combout ))) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M1pwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M1pwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1pwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y20_N50
+dffeas \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .lut_mask = 64'hFC00FC0000000000;
-defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~3 (
+// Location: LABCELL_X24_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9ovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1pwx4~3_combout  = ( \soc_inst|m0_1|u_logic|M1pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|U5a3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & (\soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5a3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|K9ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|G0w2z4~q  & 
+// \soc_inst|m0_1|u_logic|Trq2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|U5a3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M1pwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1pwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .lut_mask = 64'h000000008CAF8CAF;
-defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .lut_mask = 64'h0000000800000000;
+defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~4 (
+// Location: MLABCELL_X25_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1pwx4~4_combout  = ( \soc_inst|m0_1|u_logic|M1pwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout  & ((!\soc_inst|m0_1|u_logic|Pcd3z4~q ) # ((!\soc_inst|m0_1|u_logic|N1uvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|K7pwx4~combout  & (!\soc_inst|m0_1|u_logic|Axm2z4~q  & ((!\soc_inst|m0_1|u_logic|Pcd3z4~q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|T2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( ((\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M1pwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1pwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .lut_mask = 64'h00000000FAC8FAC8;
-defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .lut_mask = 64'h333322223F0F2A0A;
+defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y7_N49
-dffeas \soc_inst|m0_1|u_logic|Nl43z4 (
+// Location: FF_X25_Y19_N32
+dffeas \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nl43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nl43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nl43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X51_Y7_N35
-dffeas \soc_inst|m0_1|u_logic|Arn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Arn2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X19_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahowx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ahowx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ztc3z4~q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ahowx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Arn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .lut_mask = 64'h000F000F555F555F;
+defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~2 (
+// Location: LABCELL_X19_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tgowx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Nl43z4~q )) # 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Arn2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Tgowx4~0_combout  = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ahowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tna3z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ahowx4~0_combout  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nl43z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Arn2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ahowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tgowx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~2 .lut_mask = 64'h0000312000000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .lut_mask = 64'h000F000F003F003F;
+defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K103z4~feeder (
+// Location: LABCELL_X19_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tlyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K103z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Tlyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tgowx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aea3z4~q  & (!\soc_inst|m0_1|u_logic|G6owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|F2o2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Aea3z4~q  & (((!\soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|F2o2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Aea3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tgowx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K103z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tlyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K103z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K103z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|K103z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .lut_mask = 64'hF351F35100000000;
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y6_N53
-dffeas \soc_inst|m0_1|u_logic|K103z4 (
+// Location: FF_X19_Y13_N43
+dffeas \soc_inst|m0_1|u_logic|Plx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|K103z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K103z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Plx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K103z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K103z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Plx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Plx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey03z4~feeder (
+// Location: LABCELL_X36_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~105 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey03z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Add3~105_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~78  ))
+// \soc_inst|m0_1|u_logic|Add3~106  = CARRY(( !\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~78  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~78 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey03z4~feeder_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~105_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~106 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey03z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey03z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ey03z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y6_N59
-dffeas \soc_inst|m0_1|u_logic|Ey03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ey03z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ey03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ey03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~105 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~105 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~105 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~4 (
+// Location: LABCELL_X36_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~97 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ey03z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|K103z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~106  ))
+// \soc_inst|m0_1|u_logic|Add3~98  = CARRY(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~106  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|K103z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ey03z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~106 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~4_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~97_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~98 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~4 .lut_mask = 64'h3202000000000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~97 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~97 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~97 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y7_N26
-dffeas \soc_inst|m0_1|u_logic|V223z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V223z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X36_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~93 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jwf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~98  ))
+// \soc_inst|m0_1|u_logic|Add3~94  = CARRY(( !\soc_inst|m0_1|u_logic|Jwf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~98  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~98 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~93_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~94 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V223z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V223z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~93 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~93 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~93 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eun2z4~feeder (
+// Location: LABCELL_X36_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~89 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eun2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Add3~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~94  ))
+// \soc_inst|m0_1|u_logic|Add3~90  = CARRY(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~94  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~94 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eun2z4~feeder_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~89_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~90 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eun2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eun2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Eun2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~89 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~89 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y6_N16
-dffeas \soc_inst|m0_1|u_logic|Eun2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Eun2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eun2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X36_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~85 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~90  ))
+// \soc_inst|m0_1|u_logic|Add3~86  = CARRY(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~90  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~90 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~85_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~86 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eun2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eun2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~85 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~85 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~0 (
+// Location: LABCELL_X36_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~69 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|V223z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Eun2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~86  ))
+// \soc_inst|m0_1|u_logic|Add3~70  = CARRY(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~86  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|V223z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eun2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~86 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~69_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~70 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~0 .lut_mask = 64'h3000808000000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~69 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~69 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y7_N13
-dffeas \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X36_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~65 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~70  ))
+// \soc_inst|m0_1|u_logic|Add3~66  = CARRY(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~70  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~70 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~65_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~66 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~65 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~65 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq1xx4~0 (
+// Location: LABCELL_X23_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jtdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jq1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dmvwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .lut_mask = 64'h4000000000000000;
-defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .lut_mask = 64'hAAAAAAAAFF00FF00;
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y7_N55
-dffeas \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE (
+// Location: FF_X29_Y9_N14
+dffeas \soc_inst|m0_1|u_logic|Bf93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Bf93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bf93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bf93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y8_N37
-dffeas \soc_inst|m0_1|u_logic|S2r2z4 (
+// Location: FF_X24_Y9_N50
+dffeas \soc_inst|m0_1|u_logic|Anq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S2r2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Anq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S2r2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S2r2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Anq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Anq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~3 (
+// Location: LABCELL_X29_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bdwwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|S2r2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T9v2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|D9uwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Bf93z4~q  & ( \soc_inst|m0_1|u_logic|Anq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bf93z4~q  & ( !\soc_inst|m0_1|u_logic|Anq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bf93z4~q  & ( !\soc_inst|m0_1|u_logic|Anq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T9v2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|S2r2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bf93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Anq2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9uwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .lut_mask = 64'h0000000032020000;
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .lut_mask = 64'h0011001000010000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y6_N4
-dffeas \soc_inst|m0_1|u_logic|E1r2z4 (
+// Location: FF_X29_Y9_N34
+dffeas \soc_inst|m0_1|u_logic|B5u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E1r2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B5u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E1r2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E1r2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bdwwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|E1r2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ka93z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ka93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|E1r2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .lut_mask = 64'h0000000000000E04;
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B5u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B5u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N19
-dffeas \soc_inst|m0_1|u_logic|G4r2z4 (
+// Location: FF_X24_Y9_N22
+dffeas \soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G4r2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4r2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G4r2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~0 (
+// Location: LABCELL_X29_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bdwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Kw63z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|G4r2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|D9uwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|B5u2z4~q  & ( \soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B5u2z4~q  & ( !\soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B5u2z4~q  & ( !\soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kw63z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G4r2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .lut_mask = 64'h4400404000000000;
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X45_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bdwwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T583z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|K0u2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|T583z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|K0u2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .lut_mask = 64'h000000000C000A00;
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bdwwx4~combout  = ( !\soc_inst|m0_1|u_logic|Bdwwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bdwwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Bdwwx4~1_combout  & !\soc_inst|m0_1|u_logic|Bdwwx4~0_combout )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Bdwwx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bdwwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bdwwx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdwwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bdwwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Bdwwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X35_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|I30wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R40wx4~combout ) # ((\soc_inst|m0_1|u_logic|Rryvx4~0_combout  & \soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rryvx4~0_combout  & \soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I30wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I30wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I30wx4~1 .lut_mask = 64'h000F000FAAAFAAAF;
-defparam \soc_inst|m0_1|u_logic|I30wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K4mvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|K4mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jw93z4~q  & ( \soc_inst|m0_1|u_logic|Uaj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jw93z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Uaj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jw93z4~q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K4mvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .lut_mask = 64'hCCCCCFCF00000F0F;
-defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K4mvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|K4mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fvovx4~combout  & ( \soc_inst|m0_1|u_logic|W0pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|J4x2z4~q  & !\soc_inst|m0_1|u_logic|K4mvx4~0_combout )) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout  & ( \soc_inst|m0_1|u_logic|W0pvx4~combout  & ( (\soc_inst|m0_1|u_logic|J4x2z4~q  & !\soc_inst|m0_1|u_logic|K4mvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fvovx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|W0pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & !\soc_inst|m0_1|u_logic|K4mvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout  & ( !\soc_inst|m0_1|u_logic|W0pvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|K4mvx4~0_combout  ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|K4mvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|B5u2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9uwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .lut_mask = 64'hFF00CC000F000C00;
-defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y4_N31
-dffeas \soc_inst|m0_1|u_logic|Jw93z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jw93z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jw93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jw93z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y9_N26
-dffeas \soc_inst|m0_1|u_logic|X6m2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X6m2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X6m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X6m2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .lut_mask = 64'h0044000400400000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y9_N38
-dffeas \soc_inst|m0_1|u_logic|Gf43z4 (
+// Location: FF_X29_Y9_N58
+dffeas \soc_inst|m0_1|u_logic|Poq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Poq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Poq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Poq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y11_N49
-dffeas \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE (
+// Location: FF_X25_Y7_N22
+dffeas \soc_inst|m0_1|u_logic|Kev2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Kev2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kev2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kev2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~0 (
+// Location: LABCELL_X29_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Gf43z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|D9uwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Poq2z4~q  & ( \soc_inst|m0_1|u_logic|Kev2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Poq2z4~q  & ( !\soc_inst|m0_1|u_logic|Kev2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Poq2z4~q  & ( !\soc_inst|m0_1|u_logic|Kev2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gf43z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Poq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kev2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9uwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .lut_mask = 64'h0000080800000C00;
-defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .lut_mask = 64'h0030001000200000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y11_N35
-dffeas \soc_inst|m0_1|u_logic|X533z4 (
+// Location: FF_X33_Y8_N2
+dffeas \soc_inst|m0_1|u_logic|Eqq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X533z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Eqq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X533z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X533z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eqq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eqq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y11_N14
-dffeas \soc_inst|m0_1|u_logic|Ow13z4 (
+// Location: FF_X23_Y8_N1
+dffeas \soc_inst|m0_1|u_logic|B173z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B173z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B173z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B173z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~1 (
+// Location: LABCELL_X33_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7bwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|X533z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ow13z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|D9uwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|B173z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|B173z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Eqq2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B173z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Eqq2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X533z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ow13z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Eqq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|B173z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7bwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9uwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .lut_mask = 64'h0000C0000000A000;
-defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .lut_mask = 64'h080008000C000000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5m2z4~feeder (
+// Location: LABCELL_X29_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J5m2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|I30wx4~2_combout  )
+// \soc_inst|m0_1|u_logic|D9uwx4~combout  = ( !\soc_inst|m0_1|u_logic|D9uwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D9uwx4~1_combout  & (!\soc_inst|m0_1|u_logic|D9uwx4~2_combout  & !\soc_inst|m0_1|u_logic|D9uwx4~3_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|D9uwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D9uwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D9uwx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9uwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y13_N38
-dffeas \soc_inst|m0_1|u_logic|J5m2z4 (
+// Location: FF_X34_Y12_N56
+dffeas \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J5m2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J5m2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y13_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9bwx4~0 (
+// Location: LABCELL_X27_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R21xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A9bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|J5m2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|R21xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J5m2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A9bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R21xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R21xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R21xx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|R21xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y9_N7
-dffeas \soc_inst|m0_1|u_logic|Bv03z4 (
+// Location: FF_X27_Y8_N56
+dffeas \soc_inst|m0_1|u_logic|B1q2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bv03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B1q2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bv03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bv03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B1q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B1q2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y13_N8
-dffeas \soc_inst|m0_1|u_logic|Hyz2z4 (
+// Location: FF_X21_Y10_N7
+dffeas \soc_inst|m0_1|u_logic|Hmv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hyz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hmv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hyz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hyz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hmv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hmv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~2 (
+// Location: LABCELL_X27_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7bwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Bv03z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyz2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Hmv2z4~q  & ( (!\soc_inst|m0_1|u_logic|B1q2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Hmv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|B1q2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bv03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B1q2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hmv2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7bwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .lut_mask = 64'h00AC000000000000;
-defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~1 .lut_mask = 64'h000B000000080000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~3 (
+// Location: LABCELL_X22_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xg33z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7bwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|A9bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D7bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|D7bwx4~0_combout  & (!\soc_inst|m0_1|u_logic|D7bwx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|X6m2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xg33z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X6m2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|D7bwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D7bwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A9bwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D7bwx4~2_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7bwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xg33z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .lut_mask = 64'hC400000000000000;
-defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xg33z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xg33z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Xg33z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aqnvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Jw93z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ebbwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jw93z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jw93z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Xx93z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Jw93z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Xx93z4~q )) ) ) )
+// Location: FF_X22_Y8_N44
+dffeas \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Xg33z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xx93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D7bwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y9_N14
+dffeas \soc_inst|m0_1|u_logic|Hi83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hi83z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .lut_mask = 64'hCCAACCAACCFFCCF0;
-defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hi83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hi83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O2bwx4~0 (
+// Location: LABCELL_X22_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O2bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Hi83z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hi83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O2bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .lut_mask = 64'hFCFCCA00CFCFAC00;
-defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~0 .lut_mask = 64'h0404050000000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y12_N43
+dffeas \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y12_N25
+dffeas \soc_inst|m0_1|u_logic|Ycu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ycu2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ycu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ycu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~0 (
+// Location: LABCELL_X27_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I30wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O2bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ycu2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ycu2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ycu2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O2bwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ycu2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I30wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I30wx4~0 .lut_mask = 64'h00000000FFAAFFAA;
-defparam \soc_inst|m0_1|u_logic|I30wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~4 .lut_mask = 64'h2020002020000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y8_N34
-dffeas \soc_inst|m0_1|u_logic|If33z4~DUPLICATE (
+// Location: FF_X21_Y10_N38
+dffeas \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|If33z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|If33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|If33z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y8_N49
-dffeas \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE (
+// Location: FF_X21_Y10_N56
+dffeas \soc_inst|m0_1|u_logic|No93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|No93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|No93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|No93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~3 (
+// Location: MLABCELL_X21_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|If33z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~3_combout  = ( \soc_inst|m0_1|u_logic|No93z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|No93z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|If33z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|No93z4~q ),
 	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~3 .lut_mask = 64'h1010110000000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~3 .lut_mask = 64'h0000000000230020;
+defparam \soc_inst|m0_1|u_logic|S71wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6nwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|S6nwx4~combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wxp2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) )
+// Location: FF_X30_Y6_N14
+dffeas \soc_inst|m0_1|u_logic|X213z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X213z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X213z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X213z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S6nwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X34_Y12_N26
+dffeas \soc_inst|m0_1|u_logic|D603z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|D603z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S6nwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S6nwx4 .lut_mask = 64'h0005000000000000;
-defparam \soc_inst|m0_1|u_logic|S6nwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D603z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D603z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imnwx4 (
+// Location: LABCELL_X30_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Imnwx4~combout  = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S6nwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|D603z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|X213z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|D603z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|X213z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|S6nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|X213z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|D603z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imnwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Imnwx4 .lut_mask = 64'hF0B0F0F0F0B00000;
-defparam \soc_inst|m0_1|u_logic|Imnwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~2 .lut_mask = 64'h008A000000800000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs7wx4~0 (
+// Location: LABCELL_X27_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qs7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|S71wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|R21xx4~0_combout  & (!\soc_inst|m0_1|u_logic|S71wx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|S71wx4~0_combout  & !\soc_inst|m0_1|u_logic|S71wx4~4_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R21xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S71wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S71wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S71wx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S71wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .lut_mask = 64'hF000F00000000000;
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs7wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y16_N25
+dffeas \soc_inst|m0_1|u_logic|Uup2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uup2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uup2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uup2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8iwx4~0 (
+// Location: LABCELL_X35_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F8iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Jp3wx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jp3wx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Mgawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|Uup2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Y29wx4~combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mgawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .lut_mask = 64'h0F0F00000F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .lut_mask = 64'hFFFF00000F0F0000;
+defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmnwx4 (
+// Location: LABCELL_X30_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pmnwx4~combout  = ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Mgawx4~1_combout  = ( \soc_inst|m0_1|u_logic|S71wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Mgawx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|S71wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Mgawx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pmnwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pmnwx4 .lut_mask = 64'hFCFFFCFF00000000;
-defparam \soc_inst|m0_1|u_logic|Pmnwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .lut_mask = 64'h0000000055F577F7;
+defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5awx4~0 (
+// Location: FF_X24_Y12_N17
+dffeas \soc_inst|m0_1|u_logic|Dkr2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dkr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dkr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L4jvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E5awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Y29wx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|L4jvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dkr2z4~q  & ( \soc_inst|m0_1|u_logic|Cqovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( \soc_inst|m0_1|u_logic|Cqovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dkr2z4~q  & ( !\soc_inst|m0_1|u_logic|Cqovx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( !\soc_inst|m0_1|u_logic|Cqovx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E5awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E5awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E5awx4~0 .lut_mask = 64'hA2A2A2A2A8A8A8A8;
-defparam \soc_inst|m0_1|u_logic|E5awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .lut_mask = 64'h0B0BFBFB0B00FB00;
+defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y13_N26
-dffeas \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE (
+// Location: FF_X24_Y12_N16
+dffeas \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -27884,574 +26973,603 @@ dffeas \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~73 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~90  ))
-// \soc_inst|m0_1|u_logic|Add2~74  = CARRY(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~90  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~90 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~73_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~74 ),
-	.shareout());
+// Location: FF_X23_Y12_N32
+dffeas \soc_inst|m0_1|u_logic|Kfr2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kfr2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~73 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~73 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~73 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kfr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~69 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~74  ))
-// \soc_inst|m0_1|u_logic|Add2~70  = CARRY(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~74  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~74 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~69_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~70 ),
-	.shareout());
+// Location: FF_X24_Y12_N47
+dffeas \soc_inst|m0_1|u_logic|Cc73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cc73z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~69 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~69 .lut_mask = 64'h0000FFFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add2~69 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cc73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~65 (
+// Location: LABCELL_X23_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~70  ))
-// \soc_inst|m0_1|u_logic|Add2~66  = CARRY(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~70  ))
+// \soc_inst|m0_1|u_logic|H2wwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Kfr2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Cc73z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kfr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cc73z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~70 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~65_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~66 ),
+	.combout(\soc_inst|m0_1|u_logic|H2wwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~65 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~65 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~65 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .lut_mask = 64'h4450000000000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ldhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add2~65_sumout  & ( (!\soc_inst|m0_1|u_logic|B9g3z4~q ) # (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add2~65_sumout  & ( (!\soc_inst|m0_1|u_logic|B9g3z4~q  & \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add2~65_sumout  & ( (!\soc_inst|m0_1|u_logic|B9g3z4~q  & \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add2~65_sumout  & ( (!\soc_inst|m0_1|u_logic|B9g3z4~q  
-// & \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) )
+// Location: FF_X21_Y10_N35
+dffeas \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add2~65_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ldhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y10_N50
+dffeas \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .lut_mask = 64'h222222222222EEEE;
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y4_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9awx4~0 (
+// Location: MLABCELL_X21_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M9awx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Y29wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|H2wwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M9awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H2wwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M9awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M9awx4~0 .lut_mask = 64'hFFFF000000FF0000;
-defparam \soc_inst|m0_1|u_logic|M9awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .lut_mask = 64'h0000000000000C0A;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y6_N40
-dffeas \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE (
+// Location: FF_X23_Y8_N35
+dffeas \soc_inst|m0_1|u_logic|Lpv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Lpv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lpv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N22
-dffeas \soc_inst|m0_1|u_logic|Vgg3z4 (
+// Location: FF_X23_Y8_N8
+dffeas \soc_inst|m0_1|u_logic|Vdr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vgg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vdr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vgg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vgg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vdr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vdr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~3 (
+// Location: LABCELL_X23_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Vgg3z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|H2wwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lpv2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vdr2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vgg3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lpv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vdr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H2wwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .lut_mask = 64'h0000232000000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .lut_mask = 64'h000C000A00000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y6_N19
-dffeas \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE (
+// Location: FF_X23_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Cgu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cgu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cgu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cgu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xi2xx4~0 (
+// Location: FF_X23_Y9_N50
+dffeas \soc_inst|m0_1|u_logic|Ll83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ll83z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ll83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xi2xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|H2wwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Cgu2z4~q  & ( \soc_inst|m0_1|u_logic|Ll83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cgu2z4~q  & ( !\soc_inst|m0_1|u_logic|Ll83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cgu2z4~q  & ( !\soc_inst|m0_1|u_logic|Ll83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ll83z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|H2wwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .lut_mask = 64'h0202000202000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H2wwx4~combout  = ( !\soc_inst|m0_1|u_logic|H2wwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|H2wwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H2wwx4~0_combout  & !\soc_inst|m0_1|u_logic|H2wwx4~1_combout ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H2wwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H2wwx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H2wwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H2wwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H2wwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .lut_mask = 64'h4000000000000000;
-defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4 .lut_mask = 64'hC0C0000000000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y4_N2
-dffeas \soc_inst|m0_1|u_logic|Olg3z4 (
+// Location: FF_X22_Y11_N34
+dffeas \soc_inst|m0_1|u_logic|M413z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Olg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Olg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Olg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M413z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M413z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y10_N58
-dffeas \soc_inst|m0_1|u_logic|Wrg3z4 (
+// Location: FF_X22_Y11_N17
+dffeas \soc_inst|m0_1|u_logic|S703z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wrg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|S703z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wrg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wrg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S703z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S703z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~0 (
+// Location: LABCELL_X22_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wrg3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Olg3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wrg3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Olg3z4~q )) # (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|U9a2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|S703z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|S703z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|S703z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Olg3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wrg3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S703z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9a2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .lut_mask = 64'h2820000008000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .lut_mask = 64'h5000100040000000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y8_N32
-dffeas \soc_inst|m0_1|u_logic|Sog3z4 (
+// Location: FF_X23_Y11_N5
+dffeas \soc_inst|m0_1|u_logic|Bk33z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sog3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bk33z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sog3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sog3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bk33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk33z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N7
-dffeas \soc_inst|m0_1|u_logic|Ccg3z4 (
+// Location: FF_X24_Y12_N58
+dffeas \soc_inst|m0_1|u_logic|Sa23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ccg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sa23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ccg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ccg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sa23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sa23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N20
-dffeas \soc_inst|m0_1|u_logic|Nag3z4 (
+// Location: MLABCELL_X25_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9a2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Sa23z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Bk33z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bk33z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sa23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|U9a2z4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .lut_mask = 64'h00000000A0880000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y11_N35
+dffeas \soc_inst|m0_1|u_logic|Oir2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nag3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Oir2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nag3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nag3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oir2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oir2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y10_N8
-dffeas \soc_inst|m0_1|u_logic|Dng3z4 (
+// Location: FF_X25_Y11_N28
+dffeas \soc_inst|m0_1|u_logic|Zgr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dng3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zgr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dng3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dng3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zgr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zgr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4~0 (
+// Location: MLABCELL_X25_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rba2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dmvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dng3z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nag3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dng3z4~q  
-// & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nag3z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dng3z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Sog3z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ccg3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dng3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Sog3z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ccg3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Rba2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zgr2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ccg3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sog3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nag3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dng3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Zgr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rba2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .lut_mask = 64'h33553355000FFF0F;
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y8_N56
-dffeas \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .lut_mask = 64'h0020000000000000;
+defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N5
-dffeas \soc_inst|m0_1|u_logic|Gfg3z4 (
+// Location: FF_X23_Y12_N49
+dffeas \soc_inst|m0_1|u_logic|T263z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gfg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|T263z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gfg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gfg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T263z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T263z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y8_N29
-dffeas \soc_inst|m0_1|u_logic|Rdg3z4 (
+// Location: FF_X24_Y8_N43
+dffeas \soc_inst|m0_1|u_logic|Kt43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rdg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kt43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rdg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rdg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kt43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4~1 (
+// Location: LABCELL_X24_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dmvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rdg3z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rdg3z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Rdg3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wrg3z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Gfg3z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rdg3z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wrg3z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Gfg3z4~q ))) 
-// ) ) )
+// \soc_inst|m0_1|u_logic|U9a2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Kt43z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|T263z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kt43z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|T263z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kt43z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wrg3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gfg3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rdg3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T263z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kt43z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9a2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .lut_mask = 64'h330F330F550055FF;
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .lut_mask = 64'h0044000000400040;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4 (
+// Location: MLABCELL_X25_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dmvwx4~combout  = ( \soc_inst|m0_1|u_logic|Dmvwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Dmvwx4~0_combout  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Dmvwx4~1_combout  & 
-// ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|U9a2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Rba2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|U9a2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U9a2z4~2_combout  & (!\soc_inst|m0_1|u_logic|U9a2z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oir2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U9a2z4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U9a2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oir2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rba2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U9a2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9a2z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dmvwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dmvwx4 .lut_mask = 64'h5550555000500050;
-defparam \soc_inst|m0_1|u_logic|Dmvwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y7_N28
-dffeas \soc_inst|m0_1|u_logic|Kig3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kig3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kig3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kig3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .lut_mask = 64'h80C0000000000000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~0 (
+// Location: MLABCELL_X25_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pg1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vgg3z4~q  & ( \soc_inst|m0_1|u_logic|Kig3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vgg3z4~q  & ( !\soc_inst|m0_1|u_logic|Kig3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vgg3z4~q  & ( !\soc_inst|m0_1|u_logic|Kig3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wce3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|H2wwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wce3z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wce3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Wce3z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vgg3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kig3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|U9a2z4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu82z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .lut_mask = 64'h0050004000100000;
-defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .lut_mask = 64'hEE44EE44FF55FA50;
+defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N2
-dffeas \soc_inst|m0_1|u_logic|Avg3z4 (
+// Location: FF_X22_Y11_N8
+dffeas \soc_inst|m0_1|u_logic|F8e3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -28459,18 +27577,18 @@ dffeas \soc_inst|m0_1|u_logic|Avg3z4 (
 	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Avg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F8e3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Avg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Avg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F8e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8e3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y6_N14
-dffeas \soc_inst|m0_1|u_logic|Ltg3z4 (
+// Location: FF_X22_Y11_N50
+dffeas \soc_inst|m0_1|u_logic|Q6e3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -28478,532 +27596,592 @@ dffeas \soc_inst|m0_1|u_logic|Ltg3z4 (
 	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ltg3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ltg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ltg3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y7_N5
-dffeas \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Q6e3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q6e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6e3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~2 (
+// Location: LABCELL_X22_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu82z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Avg3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Ltg3z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|F8e3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Q6e3z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Avg3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ltg3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|F8e3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6e3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu82z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .lut_mask = 64'h00000000A0C00000;
-defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .lut_mask = 64'h0D08000000000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y6_N20
-dffeas \soc_inst|m0_1|u_logic|Eyg3z4 (
+// Location: FF_X22_Y10_N55
+dffeas \soc_inst|m0_1|u_logic|B5e3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eyg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B5e3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eyg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B5e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B5e3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y6_N41
-dffeas \soc_inst|m0_1|u_logic|Zjg3z4 (
+// Location: FF_X23_Y12_N10
+dffeas \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zjg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zjg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zjg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|B5e3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|B5e3z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B5e3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .lut_mask = 64'h0A02000008000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y4_N1
-dffeas \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE (
+// Location: FF_X24_Y10_N50
+dffeas \soc_inst|m0_1|u_logic|Snd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Snd3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Snd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Snd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xu82z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Zjg3z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zjg3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu82z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Hpd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hpd3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .lut_mask = 64'h00A0000000880000;
-defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hpd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hpd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uw82z4~0 (
+// Location: MLABCELL_X21_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uw82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pwg3z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hpd3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Snd3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hpd3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Snd3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pwg3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Snd3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hpd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uw82z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .lut_mask = 64'h0000000040000000;
-defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .lut_mask = 64'h0000000011100010;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xu82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Xu82z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Uw82z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xu82z4~0_combout  & (!\soc_inst|m0_1|u_logic|Xu82z4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eyg3z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Xu82z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xu82z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eyg3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xu82z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uw82z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu82z4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y12_N8
+dffeas \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .lut_mask = 64'h80A0000000000000;
-defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fj0wx4~0 (
+// Location: MLABCELL_X21_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uo5xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xu82z4~3_combout ) # (\soc_inst|m0_1|u_logic|Dmvwx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Tzg3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Uo5xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|M1j2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xu82z4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .lut_mask = 64'hFF00CCCCFF00F5F5;
-defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sknwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y10_N41
+dffeas \soc_inst|m0_1|u_logic|I0e3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I0e3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I0e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I0e3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sknwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sknwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y8_N41
+dffeas \soc_inst|m0_1|u_logic|X1e3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X1e3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .lut_mask = 64'hF0F0CCFFF0F00033;
-defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X1e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X1e3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yilwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yilwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9iwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H9iwx4~0_combout  ) )
+// Location: LABCELL_X23_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|I0e3z4~q  & ( \soc_inst|m0_1|u_logic|X1e3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I0e3z4~q  & ( !\soc_inst|m0_1|u_logic|X1e3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I0e3z4~q  & ( !\soc_inst|m0_1|u_logic|X1e3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|I0e3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X1e3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .lut_mask = 64'hF0F0F0F0C0F0C0F0;
-defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .lut_mask = 64'h0202020000020000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~2 (
+// Location: FF_X23_Y9_N52
+dffeas \soc_inst|m0_1|u_logic|Wqd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wqd3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wqd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wqd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N41
+dffeas \soc_inst|m0_1|u_logic|Exd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Exd3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Exd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Exd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sknwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Sknwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wxp2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wqd3z4~q  & ( \soc_inst|m0_1|u_logic|Exd3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wqd3z4~q  & ( !\soc_inst|m0_1|u_logic|Exd3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wqd3z4~q  & ( !\soc_inst|m0_1|u_logic|Exd3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sknwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wqd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Exd3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .lut_mask = 64'h00000000F733F733;
-defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .lut_mask = 64'h0300020001000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zetwx4 (
+// Location: LABCELL_X22_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zetwx4~combout  = ( \soc_inst|m0_1|u_logic|A7ywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  
-// & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Gm1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Gm1wx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Gm1wx4~3_combout  & !\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gm1wx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gm1wx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zetwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zetwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zetwx4 .lut_mask = 64'h000F000F00F000F0;
-defparam \soc_inst|m0_1|u_logic|Zetwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xuxwx4 (
+// Location: LABCELL_X22_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xuxwx4~combout  = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & \soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xuxwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xuxwx4 .lut_mask = 64'h00FF00FF01FF01FF;
-defparam \soc_inst|m0_1|u_logic|Xuxwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mouwx4~0 (
+// Location: LABCELL_X23_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mouwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zetwx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zetwx4~combout  & \soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Aj1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|R99wx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zetwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .lut_mask = 64'h0030003000CF00CF;
-defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .lut_mask = 64'h00002828FF00FF28;
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2owx4~1 (
+// Location: LABCELL_X29_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hvivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T2owx4~1_combout  = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|Mjl2z4~q )) ) 
-// ) )
+// \soc_inst|m0_1|u_logic|Hvivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rkd3z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jxovx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jxovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rkd3z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jxovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jxovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rkd3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Jxovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T2owx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T2owx4~1 .lut_mask = 64'h0000000000002020;
-defparam \soc_inst|m0_1|u_logic|T2owx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .lut_mask = 64'h0000FFF0BBB0BBB0;
+defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~77 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~82  ))
-// \soc_inst|m0_1|u_logic|Add3~78  = CARRY(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~82  ))
+// Location: FF_X29_Y13_N34
+dffeas \soc_inst|m0_1|u_logic|Rkd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rkd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rkd3z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~82 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~77_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~78 ),
-	.shareout());
+// Location: FF_X29_Y13_N43
+dffeas \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~77 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~77 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~77 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N49
-dffeas \soc_inst|m0_1|u_logic|M413z4~DUPLICATE (
+// Location: FF_X23_Y11_N58
+dffeas \soc_inst|m0_1|u_logic|I463z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|I463z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M413z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M413z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I463z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I463z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S703z4~feeder (
+// Location: LABCELL_X22_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zu43z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S703z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qd1wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Zu43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S703z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S703z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S703z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|S703z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zu43z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zu43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Zu43z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y6_N37
-dffeas \soc_inst|m0_1|u_logic|S703z4 (
+// Location: FF_X22_Y8_N16
+dffeas \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|S703z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S703z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S703z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S703z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~2 (
+// Location: MLABCELL_X25_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9a2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|S703z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Uga2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I463z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|I463z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|S703z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|I463z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9a2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uga2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .lut_mask = 64'h00000000AC000000;
-defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .lut_mask = 64'h000000A800000008;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y6_N14
-dffeas \soc_inst|m0_1|u_logic|Zgr2z4 (
+// Location: FF_X31_Y10_N8
+dffeas \soc_inst|m0_1|u_logic|Rds2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rds2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rds2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rds2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N49
+dffeas \soc_inst|m0_1|u_logic|Dcs2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -29011,43 +28189,62 @@ dffeas \soc_inst|m0_1|u_logic|Zgr2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zgr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dcs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zgr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zgr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rba2z4~0 (
+// Location: LABCELL_X23_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ria2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rba2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zgr2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ria2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Dcs2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zgr2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dcs2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rba2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ria2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .lut_mask = 64'h1000000000000000;
-defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .lut_mask = 64'h0000400000000000;
+defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N35
-dffeas \soc_inst|m0_1|u_logic|Bk33z4 (
+// Location: FF_X21_Y12_N28
+dffeas \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hc23z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y12_N11
+dffeas \soc_inst|m0_1|u_logic|Ql33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -29055,554 +28252,584 @@ dffeas \soc_inst|m0_1|u_logic|Bk33z4 (
 	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bk33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ql33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bk33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ql33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~1 (
+// Location: LABCELL_X22_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9a2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Sa23z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Bk33z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Uga2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ql33z4~q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sa23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bk33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ql33z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9a2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uga2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .lut_mask = 64'h00008C8000000000;
-defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .lut_mask = 64'h000080800000C000;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y10_N29
-dffeas \soc_inst|m0_1|u_logic|Kt43z4 (
+// Location: FF_X22_Y12_N20
+dffeas \soc_inst|m0_1|u_logic|B613z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kt43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B613z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kt43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kt43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B613z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B613z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y10_N55
-dffeas \soc_inst|m0_1|u_logic|T263z4 (
+// Location: FF_X22_Y12_N59
+dffeas \soc_inst|m0_1|u_logic|H903z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T263z4~q ),
+	.q(\soc_inst|m0_1|u_logic|H903z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T263z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T263z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H903z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H903z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~0 (
+// Location: LABCELL_X22_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9a2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|T263z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kt43z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Uga2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H903z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B613z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kt43z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T263z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B613z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H903z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9a2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uga2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .lut_mask = 64'h0000220000003000;
-defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .lut_mask = 64'h00000000A000C000;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~3 (
+// Location: LABCELL_X31_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9a2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|U9a2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|U9a2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U9a2z4~2_combout  & (!\soc_inst|m0_1|u_logic|Rba2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oir2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Uga2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Uga2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Uga2z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Uga2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ria2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rds2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oir2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|U9a2z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rba2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U9a2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U9a2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uga2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rds2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ria2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uga2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uga2z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9a2z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uga2z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .lut_mask = 64'hB000000000000000;
-defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N47
-dffeas \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE (
+// Location: FF_X27_Y10_N59
+dffeas \soc_inst|m0_1|u_logic|Oas2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Oas2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oas2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oas2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y8_N20
-dffeas \soc_inst|m0_1|u_logic|Cgu2z4 (
+// Location: FF_X23_Y8_N28
+dffeas \soc_inst|m0_1|u_logic|Rd73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rd73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cgu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cgu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rd73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~2 (
+// Location: LABCELL_X27_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2wwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pjqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rd73z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Oas2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rd73z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Oas2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Oas2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rd73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2wwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .lut_mask = 64'h1010100000100000;
-defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .lut_mask = 64'h0A02000008000000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y10_N20
-dffeas \soc_inst|m0_1|u_logic|Kfr2z4 (
+// Location: FF_X25_Y10_N23
+dffeas \soc_inst|m0_1|u_logic|K7s2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kfr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K7s2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kfr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K7s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K7s2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~0 (
+// Location: FF_X24_Y10_N59
+dffeas \soc_inst|m0_1|u_logic|Gt93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gt93z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gt93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gt93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2wwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kfr2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Cc73z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Pjqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gt93z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|K7s2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kfr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cc73z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K7s2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gt93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2wwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .lut_mask = 64'h0000AC0000000000;
-defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .lut_mask = 64'h0000000A0000000C;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y12_N25
-dffeas \soc_inst|m0_1|u_logic|Vdr2z4 (
+// Location: FF_X23_Y9_N29
+dffeas \soc_inst|m0_1|u_logic|An83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vdr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|An83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vdr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vdr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|An83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y12_N35
-dffeas \soc_inst|m0_1|u_logic|Lpv2z4 (
+// Location: FF_X23_Y9_N11
+dffeas \soc_inst|m0_1|u_logic|Rhu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lpv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rhu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lpv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lpv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rhu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y12_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~3 (
+// Location: LABCELL_X23_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2wwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vdr2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Lpv2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Pjqwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|An83z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rhu2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vdr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lpv2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|An83z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rhu2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2wwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .lut_mask = 64'h0000454000000000;
-defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .lut_mask = 64'h0000000000C000A0;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y12_N38
-dffeas \soc_inst|m0_1|u_logic|Rr93z4 (
+// Location: FF_X23_Y8_N44
+dffeas \soc_inst|m0_1|u_logic|Z8s2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rr93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z8s2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rr93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rr93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z8s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z8s2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N52
-dffeas \soc_inst|m0_1|u_logic|Gcr2z4 (
+// Location: FF_X23_Y8_N17
+dffeas \soc_inst|m0_1|u_logic|Arv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gcr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Arv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gcr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gcr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Arv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Arv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~1 (
+// Location: LABCELL_X23_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2wwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Gcr2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rr93z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Pjqwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Arv2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Z8s2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rr93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gcr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z8s2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Arv2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2wwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .lut_mask = 64'h00000000000000CA;
-defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .lut_mask = 64'h0404050000000000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4 (
+// Location: LABCELL_X31_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2wwx4~combout  = ( !\soc_inst|m0_1|u_logic|H2wwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H2wwx4~2_combout  & (!\soc_inst|m0_1|u_logic|H2wwx4~0_combout  & !\soc_inst|m0_1|u_logic|H2wwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Pjqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Pjqwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Pjqwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H2wwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H2wwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H2wwx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H2wwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pjqwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2wwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2wwx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|H2wwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4 .lut_mask = 64'hA0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pg1wx4~0 (
+// Location: LABCELL_X31_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( \soc_inst|m0_1|u_logic|H2wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Wce3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Dkr2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( \soc_inst|m0_1|u_logic|H2wwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Wce3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dkr2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( !\soc_inst|m0_1|u_logic|H2wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Wce3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dkr2z4~q 
-// ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( !\soc_inst|m0_1|u_logic|H2wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Wce3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dkr2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uga2z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Rkd3z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Rkd3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ),
 	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U9a2z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Uga2z4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .lut_mask = 64'hCACFCACFCACFCAC0;
-defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .lut_mask = 64'hCACACFCFCACACFC0;
+defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cqovx4 (
+// Location: MLABCELL_X34_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cqovx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|Add3~77_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Add3~77_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Add3~77_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Add3~77_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Kzbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Auk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( ((\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Auk2z4~q )) # (\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add3~77_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cqovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cqovx4 .lut_mask = 64'h00330F3F55775F7F;
-defparam \soc_inst|m0_1|u_logic|Cqovx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X17_Y5_N2
-dffeas \soc_inst|ram_1|saved_word_address[10] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [10]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[10] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[10] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .lut_mask = 64'h5F0F5F0F55005500;
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N39
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[10]~10 (
+// Location: MLABCELL_X28_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzbwx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[10]~10_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Cqovx4~combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
-// (\soc_inst|ram_1|saved_word_address [10])) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [10] ) )
+// \soc_inst|m0_1|u_logic|Kzbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ) # (((!\soc_inst|m0_1|u_logic|K9z2z4~q  & \soc_inst|m0_1|u_logic|D1awx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Kzbwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|K9z2z4~q  & \soc_inst|m0_1|u_logic|D1awx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|ram_1|saved_word_address [10]),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[10]~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .lut_mask = 64'h5555555505F505F5;
-defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .lut_mask = 64'h0CFF0CFFAEFFAEFF;
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~105 (
+// Location: LABCELL_X31_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~113 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~105_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~78  ))
-// \soc_inst|m0_1|u_logic|Add3~106  = CARRY(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~78  ))
+// \soc_inst|m0_1|u_logic|Add5~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Konvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~42  ))
+// \soc_inst|m0_1|u_logic|Add5~114  = CARRY(( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Konvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~42  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~78 ),
+	.cin(\soc_inst|m0_1|u_logic|Add5~42 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~105_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~106 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~113_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~114 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~105 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~105 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~105 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~113 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~113 .lut_mask = 64'h0000FF330000A05F;
+defparam \soc_inst|m0_1|u_logic|Add5~113 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y10_N4
-dffeas \soc_inst|m0_1|u_logic|Z0g3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z0g3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~105 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~105_sumout  = SUM(( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~114  ))
+// \soc_inst|m0_1|u_logic|Add5~106  = CARRY(( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~114  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~114 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~106 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z0g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z0g3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~105 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~105 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~105 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y8_N32
-dffeas \soc_inst|m0_1|u_logic|Hnr2z4 (
+// Location: LABCELL_X22_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~7_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Rhu2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Arv2z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rhu2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Arv2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~7_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .lut_mask = 64'h0000445000000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N50
+dffeas \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hnr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hnr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hnr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N25
-dffeas \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE (
+// Location: FF_X23_Y8_N29
+dffeas \soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -29610,1809 +28837,1893 @@ dffeas \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~6 (
+// Location: LABCELL_X23_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hnr2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Gt93z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Gt93z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gt93z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hnr2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gt93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .lut_mask = 64'h0000321000000000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .lut_mask = 64'h0200020000030000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y12_N52
-dffeas \soc_inst|m0_1|u_logic|D923z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D923z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D923z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X22_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & (\soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|An83z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|An83z4~q ))) ) ) )
 
-// Location: FF_X42_Y12_N10
-dffeas \soc_inst|m0_1|u_logic|Mi33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mi33z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|An83z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mi33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mi33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .lut_mask = 64'hCC4400000C040000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj83z4~feeder (
+// Location: MLABCELL_X21_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wj83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  = (\soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & \soc_inst|m0_1|u_logic|Zh5wx4~8_combout )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj83z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wj83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Wj83z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y12_N37
-dffeas \soc_inst|m0_1|u_logic|Wj83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wj83z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wj83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .lut_mask = 64'h0033003300330033;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~7 (
+// Location: LABCELL_X19_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Wj83z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Mi33z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Do1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mi33z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wj83z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .lut_mask = 64'h0000080800000A00;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .lut_mask = 64'h0A000A00FFFF0A00;
+defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~8 (
+// Location: LABCELL_X22_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  = ( \soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Z0g3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z0g3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Do1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|S3cwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & \soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|S3cwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  $ 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  $ 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z0g3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .lut_mask = 64'hA020F03000000000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y6_N44
-dffeas \soc_inst|m0_1|u_logic|O2g3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O2g3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O2g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O2g3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .lut_mask = 64'hEB00E800BE008E00;
+defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X94xx4~0 (
+// Location: LABCELL_X31_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X94xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|O2g3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Do1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Do1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Do1wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Do1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Do1wx4~2_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O2g3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Do1wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Do1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X94xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X94xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X94xx4~0 .lut_mask = 64'h4000000000000000;
-defparam \soc_inst|m0_1|u_logic|X94xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .lut_mask = 64'h00000000FF00F500;
+defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y9_N17
-dffeas \soc_inst|m0_1|u_logic|Kzf3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kzf3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kzf3z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X24_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glnwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  ) ) )
 
-// Location: FF_X45_Y11_N52
-dffeas \soc_inst|m0_1|u_logic|Wnv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wnv2z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wnv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wnv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .lut_mask = 64'h0F0F0F0F0F0F0000;
+defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~3 (
+// Location: LABCELL_X22_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pn1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wnv2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Kzf3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Glnwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Add5~105_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kzf3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wnv2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .lut_mask = 64'h4040000005000000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .lut_mask = 64'h0000000023002300;
+defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y12_N49
-dffeas \soc_inst|m0_1|u_logic|Vxf3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vxf3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc23z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hc23z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vxf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vxf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hc23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Hc23z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y10_N59
-dffeas \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE (
+// Location: FF_X21_Y12_N29
+dffeas \soc_inst|m0_1|u_logic|Hc23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hc23z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Hc23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hc23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hc23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~2 (
+// Location: MLABCELL_X21_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vxf3z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Oas2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Oas2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Hc23z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Oas2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Hc23z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vxf3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hc23z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Oas2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .lut_mask = 64'h0000500044000000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .lut_mask = 64'h00800080C0000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N11
-dffeas \soc_inst|m0_1|u_logic|Lqr2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lqr2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lqr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lqr2z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X21_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D432z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D432z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Rds2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|M1j2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) )
 
-// Location: FF_X45_Y12_N41
-dffeas \soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rds2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|D432z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D432z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D432z4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|D432z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~4 (
+// Location: MLABCELL_X21_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lqr2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ql33z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|I463z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lqr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|I463z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ql33z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .lut_mask = 64'h0A000C0000000000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .lut_mask = 64'h000000E200000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y12_N4
-dffeas \soc_inst|m0_1|u_logic|E163z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E163z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|B613z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|H903z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|B613z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H903z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E163z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E163z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .lut_mask = 64'h0000A0C000000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N58
-dffeas \soc_inst|m0_1|u_logic|Cq93z4 (
+// Location: FF_X22_Y8_N17
+dffeas \soc_inst|m0_1|u_logic|Zu43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cq93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zu43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cq93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cq93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zu43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~1 (
+// Location: LABCELL_X22_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Cq93z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|E163z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Cq93z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|E163z4~q ) # 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|K7s2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Zu43z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|E163z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cq93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zu43z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|K7s2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .lut_mask = 64'h0000004500000040;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .lut_mask = 64'h00000000008800A0;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y12_N47
-dffeas \soc_inst|m0_1|u_logic|Wor2z4 (
+// Location: FF_X29_Y13_N35
+dffeas \soc_inst|m0_1|u_logic|Rkd3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wor2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rkd3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wor2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wor2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rkd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rkd3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~0 (
+// Location: LABCELL_X23_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Wor2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) 
-// # (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Wor2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rkd3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Z8s2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rkd3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Z8s2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wor2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z8s2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rkd3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .lut_mask = 64'hA008000000080000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .lut_mask = 64'hA040000000400000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~5 (
+// Location: MLABCELL_X21_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Hc1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X94xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hc1wx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|Hc1wx4~2_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Zh5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~0_combout  & (!\soc_inst|m0_1|u_logic|D432z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Zh5wx4~3_combout  & !\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X94xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hc1wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zh5wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D432z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zh5wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4 (
+// Location: MLABCELL_X21_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3cwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|S3cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q ) # (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|S3cwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .lut_mask = 64'h0000F0F0AAAAFAFA;
+defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ciawx4~0 (
+// Location: MLABCELL_X21_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3cwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ciawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|S3cwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zh5wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Zh5wx4~5_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh5wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S3cwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ciawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .lut_mask = 64'hFF00FF000F000F00;
-defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .lut_mask = 64'h2F2F2FFF00000000;
+defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ciawx4~1 (
+// Location: LABCELL_X31_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~45 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ciawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~106  ))
+// \soc_inst|m0_1|u_logic|Add5~46  = CARRY(( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~106  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ciawx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~106 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~46 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .lut_mask = 64'h000000000FAF3FBF;
-defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~45 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~45 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~1 (
+// Location: LABCELL_X23_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B91wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Hc1wx4~combout )) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Aj1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B91wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B91wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B91wx4~1 .lut_mask = 64'h1F110F002F220F00;
-defparam \soc_inst|m0_1|u_logic|B91wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .lut_mask = 64'hA0A0A0A00000A0A0;
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~13 (
+// Location: LABCELL_X22_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xk1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~46  ))
-// \soc_inst|m0_1|u_logic|Add5~14  = CARRY(( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~46  ))
+// \soc_inst|m0_1|u_logic|Xk1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R99wx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|R99wx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~46 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~13_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~14 ),
+	.combout(\soc_inst|m0_1|u_logic|Xk1wx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~13 .lut_mask = 64'h0000FF0F00007788;
-defparam \soc_inst|m0_1|u_logic|Add5~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .lut_mask = 64'h300330033FF33FF3;
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~17 (
+// Location: MLABCELL_X34_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xk1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~17_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~14  ))
-// \soc_inst|m0_1|u_logic|Add5~18  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~14  ))
+// \soc_inst|m0_1|u_logic|Xk1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xk1wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xk1wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xk1wx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~14 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~17_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~18 ),
+	.combout(\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~17 .lut_mask = 64'h00008877000000F0;
-defparam \soc_inst|m0_1|u_logic|Add5~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .lut_mask = 64'h0000F2220000FFFF;
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~2 (
+// Location: LABCELL_X23_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B91wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|B91wx4~1_combout  & \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|B91wx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xk1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Aj1wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B91wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aj1wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B91wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B91wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B91wx4~2 .lut_mask = 64'hC0C0C0C000C000C0;
-defparam \soc_inst|m0_1|u_logic|B91wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .lut_mask = 64'h000000000A0B0000;
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ya1wx4~1 (
+// Location: FF_X23_Y10_N2
+dffeas \soc_inst|m0_1|u_logic|Aud3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aud3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aud3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aud3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ya1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Aud3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wce3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Aud3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wce3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aud3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ya1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .lut_mask = 64'h272727271B1B1B1B;
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .lut_mask = 64'h8080100000001000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ya1wx4~0 (
+// Location: FF_X22_Y10_N14
+dffeas \soc_inst|m0_1|u_logic|Lsd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lsd3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lsd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lsd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y10_N35
+dffeas \soc_inst|m0_1|u_logic|U9e3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U9e3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y10_N52
+dffeas \soc_inst|m0_1|u_logic|Pvd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pvd3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pvd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pvd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X33_Y12_N14
+dffeas \soc_inst|m0_1|u_logic|Tyd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tyd3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tyd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tyd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ya1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ya1wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ya1wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tyd3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pvd3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tyd3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Pvd3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ya1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pvd3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tyd3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .lut_mask = 64'h0000C0EA0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .lut_mask = 64'h0000E00000004000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~0 (
+// Location: LABCELL_X22_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B91wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|B91wx4~2_combout  & (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|B91wx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Gm1wx4~6_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~7_combout  & (\soc_inst|m0_1|u_logic|U9e3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lsd3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~7_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lsd3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B91wx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gm1wx4~7_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lsd3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U9e3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B91wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B91wx4~0 .lut_mask = 64'h0000000055000100;
-defparam \soc_inst|m0_1|u_logic|B91wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y10_N58
-dffeas \soc_inst|m0_1|u_logic|Vr43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vr43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vr43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vr43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .lut_mask = 64'hA2A2000000A20000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~0 (
+// Location: LABCELL_X22_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R99wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I3a2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|E163z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vr43z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|R99wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vr43z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|E163z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3a2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R99wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .lut_mask = 64'h0000220000003000;
-defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R99wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R99wx4~0 .lut_mask = 64'hFFFF0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|R99wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~2 (
+// Location: LABCELL_X22_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R99wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I3a2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Vxf3z4~q  & ( \soc_inst|m0_1|u_logic|Kzf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vxf3z4~q  & ( !\soc_inst|m0_1|u_logic|Kzf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vxf3z4~q  & ( !\soc_inst|m0_1|u_logic|Kzf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|R99wx4~1_combout  = ( \soc_inst|m0_1|u_logic|R99wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Gm1wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|R99wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vxf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kzf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R99wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3a2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .lut_mask = 64'h0A00080002000000;
-defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R99wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R99wx4~1 .lut_mask = 64'h000055F5000077F7;
+defparam \soc_inst|m0_1|u_logic|R99wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~46  ))
+// \soc_inst|m0_1|u_logic|Add5~14  = CARRY(( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~46  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~46 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~14 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~13 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y12_N53
-dffeas \soc_inst|m0_1|u_logic|D923z4 (
+// Location: FF_X22_Y10_N49
+dffeas \soc_inst|m0_1|u_logic|Gcr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D923z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gcr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D923z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D923z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|I3a2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Mi33z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|D923z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|D923z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mi33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3a2z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .lut_mask = 64'h08080C0000000000;
-defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gcr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gcr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y10_N5
-dffeas \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE (
+// Location: FF_X21_Y10_N34
+dffeas \soc_inst|m0_1|u_logic|Rr93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Rr93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5a2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|F5a2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F5a2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rr93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~3 (
+// Location: LABCELL_X22_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I3a2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|I3a2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|F5a2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I3a2z4~0_combout  & (!\soc_inst|m0_1|u_logic|I3a2z4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|O2g3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rr93z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Gcr2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I3a2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O2g3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I3a2z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I3a2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|F5a2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gcr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rr93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3a2z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .lut_mask = 64'hA020000000000000;
-defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .lut_mask = 64'h0000004400000050;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y12_N46
-dffeas \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE (
+// Location: FF_X23_Y11_N4
+dffeas \soc_inst|m0_1|u_logic|Bk33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Bk33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bk33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~3 (
+// Location: LABCELL_X23_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkuwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wnv2z4~q  & ( \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wnv2z4~q  & ( !\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wnv2z4~q  & ( !\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Ze1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ll83z4~q  & ( \soc_inst|m0_1|u_logic|Bk33z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll83z4~q  & ( !\soc_inst|m0_1|u_logic|Bk33z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll83z4~q  & ( !\soc_inst|m0_1|u_logic|Bk33z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wnv2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ll83z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bk33z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .lut_mask = 64'h0404040000040000;
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .lut_mask = 64'h0030002000100000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N26
-dffeas \soc_inst|m0_1|u_logic|Na73z4 (
+// Location: FF_X23_Y12_N31
+dffeas \soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Na73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Na73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~0 (
+// Location: LABCELL_X22_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Na73z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lqr2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Cgu2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Na73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lqr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .lut_mask = 64'h00C000A000000000;
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .lut_mask = 64'h2020300000000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y8_N31
-dffeas \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE (
+// Location: FF_X22_Y11_N35
+dffeas \soc_inst|m0_1|u_logic|M413z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|M413z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M413z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M413z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~1 (
+// Location: LABCELL_X22_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkuwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Cq93z4~q  & ( \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cq93z4~q  & ( !\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cq93z4~q  & ( !\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M413z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|S703z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M413z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|S703z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cq93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S703z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M413z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .lut_mask = 64'h0101010000010000;
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .lut_mask = 64'h0000A80000000800;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y12_N40
-dffeas \soc_inst|m0_1|u_logic|Neu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Neu2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Neu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Neu2z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X23_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dy4xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dy4xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Oir2z4~q  & ( (!\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
 
-// Location: FF_X47_Y12_N38
-dffeas \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oir2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Dy4xx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~2 (
+// Location: LABCELL_X23_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkuwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Neu2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Lpv2z4~q  & ( \soc_inst|m0_1|u_logic|Vdr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+//  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lpv2z4~q  & ( !\soc_inst|m0_1|u_logic|Vdr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lpv2z4~q  & ( !\soc_inst|m0_1|u_logic|Vdr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Neu2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Lpv2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vdr2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .lut_mask = 64'h000000A0000000C0;
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .lut_mask = 64'h0022002000020000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4 (
+// Location: LABCELL_X23_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Zkuwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Zkuwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Zkuwx4~0_combout  & !\soc_inst|m0_1|u_logic|Zkuwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Dy4xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ze1wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Ze1wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ze1wx4~4_combout  & !\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zkuwx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zkuwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ze1wx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Dy4xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkuwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkuwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Zkuwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ra1wx4~0 (
+// Location: LABCELL_X24_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Dkr2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|I3a2z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Dkr2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Slr2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dkr2z4~q 
-// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Dkr2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Slr2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~combout  = ( \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I3a2z4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .lut_mask = 64'hACACAFAFACACAFA0;
-defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~5 (
+// Location: LABCELL_X23_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nf1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o~5_combout  = ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|Add3~105_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|Ra1wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Add3~105_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Add3~105_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Add3~105_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Nf1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Ejawx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Ejawx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Ejawx4~1_combout )))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Ejawx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add3~105_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nf1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o~5 .lut_mask = 64'h003355770F3F5F7F;
-defparam \soc_inst|m0_1|u_logic|haddr_o~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X19_Y5_N32
-dffeas \soc_inst|ram_1|saved_word_address[11] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [11]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[11] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[11] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .lut_mask = 64'hEDDEE8D4E0D0E0D0;
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y5_N48
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[11]~11 (
+// Location: LABCELL_X23_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qd1wx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[11]~11_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|haddr_o~5_combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
-// (\soc_inst|ram_1|saved_word_address [11])) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [11] ) )
+// \soc_inst|m0_1|u_logic|Qd1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nf1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ze1wx4~combout ))) ) )
 
-	.dataa(!\soc_inst|ram_1|saved_word_address [11]),
-	.datab(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
-	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nf1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[11]~11_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qd1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .lut_mask = 64'h5555555535353535;
-defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .lut_mask = 64'h00000000A0F0A0F0;
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N24
-cyclonev_lcell_comb \soc_inst|ram_1|byte3~0 (
+// Location: LABCELL_X23_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qd1wx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|byte3~0_combout  = ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qd1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qd1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Add5~13_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qd1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|byte3~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte3~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|byte3~0 .lut_mask = 64'hBB33BBB3BB33BBBF;
-defparam \soc_inst|ram_1|byte3~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .lut_mask = 64'h0000000000F300F3;
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y6_N25
-dffeas \soc_inst|ram_1|byte_select[3] (
+// Location: FF_X24_Y12_N59
+dffeas \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte3~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select [3]),
+	.q(\soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[3] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[3] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3awx4~0 (
+// Location: FF_X24_Y8_N44
+dffeas \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3awx4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3awx4~0 .lut_mask = 64'h0FF00FF00F000F00;
-defparam \soc_inst|m0_1|u_logic|O3awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .lut_mask = 64'h0000D08000000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kih2z4~0 (
+// Location: LABCELL_X24_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T263z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Dkr2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T263z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .lut_mask = 64'hFFCCFFCCAAFFAAFF;
-defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .lut_mask = 64'hA000004400000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehcwx4~0 (
+// Location: LABCELL_X24_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ehcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|Fuawx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Ze1wx4~7_combout  & ( \soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout  & (\soc_inst|m0_1|u_logic|Cc73z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zgr2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zgr2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zgr2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cc73z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ze1wx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ehcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .lut_mask = 64'h8888F0F0C088FFF0;
-defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .lut_mask = 64'h8A8A0000008A0000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmawx4~0 (
+// Location: LABCELL_X35_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Ejawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ejawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .lut_mask = 64'h0000000005050505;
-defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .lut_mask = 64'hAA00AA00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mdzvx4~0 (
+// Location: LABCELL_X24_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mdzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ejawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ejawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Ze1wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ejawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~5_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ejawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mdzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .lut_mask = 64'hC080C080F0A0F0A0;
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .lut_mask = 64'h00003B3B00003BFF;
+defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ducvx4 (
+// Location: LABCELL_X31_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ducvx4~combout  = ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Add5~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~14  ))
+// \soc_inst|m0_1|u_logic|Add5~18  = CARRY(( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~14  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~14 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~18 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~17 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~61 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~18  ))
+// \soc_inst|m0_1|u_logic|Add5~62  = CARRY(( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~18  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~18 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~62 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~61 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~61 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|haddr_o~4_combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~61_sumout  & ( (((\soc_inst|m0_1|u_logic|Add3~97_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|C61wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~61_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~97_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~61_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~97_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~61_sumout  & ( (\soc_inst|m0_1|u_logic|Add3~97_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Add3~97_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ducvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ducvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ducvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ducvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~4 .lut_mask = 64'h111111FF1F1F1FFF;
+defparam \soc_inst|m0_1|u_logic|haddr_o~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whh2z4~0 (
+// Location: LABCELL_X33_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdjvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Izpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Izpvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Pdjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J7q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~4_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rix2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~4_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rix2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|J7q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~4_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rix2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~4_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rix2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .lut_mask = 64'hFFCCFFCCF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .lut_mask = 64'h3131FDFD3100FD00;
+defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y9_N37
-dffeas \soc_inst|m0_1|u_logic|Wqm2z4 (
+// Location: FF_X33_Y6_N11
+dffeas \soc_inst|m0_1|u_logic|J7q2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wqm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J7q2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wqm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wqm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J7q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J7q2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N47
-dffeas \soc_inst|m0_1|u_logic|R6v2z4 (
+// Location: FF_X22_Y8_N43
+dffeas \soc_inst|m0_1|u_logic|Xg33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Xg33z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xg33z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xg33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xg33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y12_N50
+dffeas \soc_inst|m0_1|u_logic|O723z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R6v2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|O723z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R6v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O723z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O723z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~3 (
+// Location: MLABCELL_X34_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svqwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wqm2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|R6v2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Ww92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xg33z4~q  & ( \soc_inst|m0_1|u_logic|O723z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xg33z4~q  & ( !\soc_inst|m0_1|u_logic|O723z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xg33z4~q  & ( !\soc_inst|m0_1|u_logic|O723z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wqm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R6v2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xg33z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O723z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svqwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ww92z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .lut_mask = 64'h000000000000AC00;
-defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .lut_mask = 64'h2200200002000000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y10_N26
-dffeas \soc_inst|m0_1|u_logic|Ixt2z4 (
+// Location: FF_X34_Y12_N55
+dffeas \soc_inst|m0_1|u_logic|U5q2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ixt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U5q2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ixt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U5q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5q2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N52
-dffeas \soc_inst|m0_1|u_logic|R283z4 (
+// Location: FF_X30_Y6_N13
+dffeas \soc_inst|m0_1|u_logic|X213z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R283z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R283z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R283z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X213z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X213z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~2 (
+// Location: MLABCELL_X34_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svqwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Ixt2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|R283z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Ww92z4~2_combout  = ( \soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|D603z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|D603z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ixt2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R283z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|D603z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svqwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ww92z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .lut_mask = 64'h000000000000B800;
-defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .lut_mask = 64'h3000000020002000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y10_N19
-dffeas \soc_inst|m0_1|u_logic|Ksm2z4 (
+// Location: FF_X23_Y10_N59
+dffeas \soc_inst|m0_1|u_logic|Gq43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ksm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gq43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ksm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ksm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gq43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gq43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N44
-dffeas \soc_inst|m0_1|u_logic|It63z4 (
+// Location: FF_X23_Y10_N23
+dffeas \soc_inst|m0_1|u_logic|Pz53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|It63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pz53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|It63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pz53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pz53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~0 (
+// Location: LABCELL_X23_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ksm2z4~q  & ( \soc_inst|m0_1|u_logic|It63z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ksm2z4~q  & ( !\soc_inst|m0_1|u_logic|It63z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ksm2z4~q  & ( !\soc_inst|m0_1|u_logic|It63z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ww92z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pz53z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Gq43z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gq43z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pz53z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ksm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|It63z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svqwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ww92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .lut_mask = 64'h0A00020008000000;
-defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .lut_mask = 64'h00000088000000A0;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N10
-dffeas \soc_inst|m0_1|u_logic|G493z4 (
+// Location: FF_X23_Y10_N14
+dffeas \soc_inst|m0_1|u_logic|F4q2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G493z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F4q2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G493z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G493z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F4q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F4q2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N22
-dffeas \soc_inst|m0_1|u_logic|Ipm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ipm2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ty92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ty92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|F4q2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|F4q2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ty92z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ipm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~1 (
+// Location: MLABCELL_X34_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svqwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G493z4~q  & ( \soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G493z4~q  & ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G493z4~q  & ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ww92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ww92z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ty92z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ww92z4~1_combout  & (!\soc_inst|m0_1|u_logic|Ww92z4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5q2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G493z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ipm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ww92z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U5q2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ww92z4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ww92z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ty92z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svqwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ww92z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .lut_mask = 64'h0011001000010000;
-defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4 (
+// Location: FF_X23_Y12_N44
+dffeas \soc_inst|m0_1|u_logic|Q2q2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Q2q2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q2q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q2q2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Svqwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Svqwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Svqwx4~2_combout  & !\soc_inst|m0_1|u_logic|Svqwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Hmqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Y873z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Y873z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Q2q2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y873z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Q2q2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Svqwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Svqwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svqwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svqwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q2q2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Y873z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svqwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svqwx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Svqwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .lut_mask = 64'h4000400050000000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y10_N56
-dffeas \soc_inst|m0_1|u_logic|Wyt2z4 (
+// Location: FF_X23_Y12_N26
+dffeas \soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -31420,351 +30731,455 @@ dffeas \soc_inst|m0_1|u_logic|Wyt2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wyt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wyt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wyt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N32
-dffeas \soc_inst|m0_1|u_logic|F483z4 (
+// Location: LABCELL_X22_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmqwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hi83z4~q 
+//  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Hi83z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hi83z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .lut_mask = 64'h0044004000000040;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmqwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hmv2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|B1q2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Hmv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B1q2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .lut_mask = 64'h0000300000002200;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y10_N37
+dffeas \soc_inst|m0_1|u_logic|Mzp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F483z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mzp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F483z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F483z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mzp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mzp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~2 (
+// Location: MLABCELL_X21_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qxuwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Wyt2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|F483z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Hmqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|No93z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mzp2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wyt2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|F483z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|No93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mzp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .lut_mask = 64'h000000000000AC00;
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .lut_mask = 64'h0000000C0000000A;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gip2z4~feeder (
+// Location: LABCELL_X22_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gip2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Hmqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Hmqwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Hmqwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hmqwx4~0_combout  & !\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hmqwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C61wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ww92z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Slr2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Slr2z4~q 
+// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Slr2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ww92z4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C61wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C61wx4~0 .lut_mask = 64'hE4E4F5F5E4E4F5A0;
+defparam \soc_inst|m0_1|u_logic|C61wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J61wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J61wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gip2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J61wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gip2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gip2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Gip2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J61wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J61wx4~1 .lut_mask = 64'h1B1B1B1B27272727;
+defparam \soc_inst|m0_1|u_logic|J61wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y12_N50
-dffeas \soc_inst|m0_1|u_logic|Gip2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gip2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gip2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J61wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|J61wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|C61wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|J61wx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|C61wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|J61wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|C61wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|J61wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & \soc_inst|m0_1|u_logic|C61wx4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|J61wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gip2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gip2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J61wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J61wx4~0 .lut_mask = 64'h00A000FF00EC00FF;
+defparam \soc_inst|m0_1|u_logic|J61wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N32
-dffeas \soc_inst|m0_1|u_logic|F8v2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F8v2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O51wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O51wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|C61wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F8v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O51wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O51wx4~0 .lut_mask = 64'h0FF00FF000000000;
+defparam \soc_inst|m0_1|u_logic|O51wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~3 (
+// Location: LABCELL_X36_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M41wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qxuwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|F8v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gip2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|F8v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Gip2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|M41wx4~0_combout  = ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|O51wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|O51wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|S71wx4~combout  & ( !\soc_inst|m0_1|u_logic|O51wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( !\soc_inst|m0_1|u_logic|O51wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gip2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|F8v2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M41wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .lut_mask = 64'h0000080C00000800;
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M41wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M41wx4~0 .lut_mask = 64'hC0C0CCCCC000CC00;
+defparam \soc_inst|m0_1|u_logic|M41wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N17
-dffeas \soc_inst|m0_1|u_logic|W893z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W893z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xuxwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xuxwx4~combout  = ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & \soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W893z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W893z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xuxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xuxwx4 .lut_mask = 64'h3333333333373337;
+defparam \soc_inst|m0_1|u_logic|Xuxwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N37
-dffeas \soc_inst|m0_1|u_logic|Sgp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sgp2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yjzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yjzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sgp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sgp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~1 (
+// Location: LABCELL_X27_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sta2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qxuwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|W893z4~q  & ( \soc_inst|m0_1|u_logic|Sgp2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W893z4~q  & ( !\soc_inst|m0_1|u_logic|Sgp2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W893z4~q  & ( !\soc_inst|m0_1|u_logic|Sgp2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Sta2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Cam2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|W893z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgp2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .lut_mask = 64'h0011001000010000;
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y10_N8
-dffeas \soc_inst|m0_1|u_logic|Wu63z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wu63z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wu63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wu63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .lut_mask = 64'h0C0C000000000000;
+defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y10_N17
-dffeas \soc_inst|m0_1|u_logic|Ujp2z4 (
+// Location: FF_X25_Y20_N43
+dffeas \soc_inst|m0_1|u_logic|Uaj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ujp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uaj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ujp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ujp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uaj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uaj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~0 (
+// Location: LABCELL_X27_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qxuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wu63z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Ujp2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|M5mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (\soc_inst|m0_1|u_logic|R1w2z4~q )))) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|Hzj2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wu63z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ujp2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M5mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .lut_mask = 64'h0A00080800000000;
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .lut_mask = 64'h00FF00FB00FF00FB;
+defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y11_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qxuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Qxuwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qxuwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qxuwx4~2_combout  & !\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ) ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qxuwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y21_N10
+dffeas \soc_inst|m0_1|u_logic|S5b3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|S5b3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxuwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxuwx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|Qxuwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S5b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S5b3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rw7wx4~0 (
+// Location: LABCELL_X18_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3uvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Svqwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Svqwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|R3uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oytvx4~combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|F2o2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .lut_mask = 64'h05050505AFAFAFAF;
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rw7wx4~1 (
+// Location: LABCELL_X29_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ta1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rw7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jmdwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rw7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jmdwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .lut_mask = 64'h00000F0FFFFF0F0F;
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y9_N16
-dffeas \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE (
+// Location: FF_X29_Y10_N56
+dffeas \soc_inst|m0_1|u_logic|K2k2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -31772,125 +31187,151 @@ dffeas \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|K2k2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K2k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K2k2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y9_N14
-dffeas \soc_inst|m0_1|u_logic|Rvv2z4 (
+// Location: LABCELL_X19_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hihvx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .lut_mask = 64'h3333333330003000;
+defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y12_N26
+dffeas \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rvv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rvv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~3 (
+// Location: LABCELL_X27_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lr9wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rvv2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Duuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fwj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rvv2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fwj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .lut_mask = 64'h00000000008800C0;
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .lut_mask = 64'h0000000C0000000A;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y11_N52
-dffeas \soc_inst|m0_1|u_logic|Asr2z4 (
+// Location: FF_X28_Y12_N55
+dffeas \soc_inst|m0_1|u_logic|Duu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Asr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Duu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Asr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Asr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Duu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Duu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y9_N20
-dffeas \soc_inst|m0_1|u_logic|Qyc3z4 (
+// Location: FF_X28_Y12_N38
+dffeas \soc_inst|m0_1|u_logic|Dtj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qyc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dtj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qyc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qyc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dtj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dtj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~1 (
+// Location: MLABCELL_X28_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lr9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qyc3z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Asr2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Duuwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Duu2z4~q  & ( \soc_inst|m0_1|u_logic|Dtj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Duu2z4~q  & ( !\soc_inst|m0_1|u_logic|Dtj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duu2z4~q  & ( !\soc_inst|m0_1|u_logic|Dtj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Asr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qyc3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Duu2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dtj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .lut_mask = 64'h0000000000220030;
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .lut_mask = 64'h0050004000100000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N2
-dffeas \soc_inst|m0_1|u_logic|Imu2z4 (
+// Location: FF_X27_Y12_N4
+dffeas \soc_inst|m0_1|u_logic|Ukt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -31898,18 +31339,18 @@ dffeas \soc_inst|m0_1|u_logic|Imu2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Imu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ukt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Imu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ukt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ukt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y6_N37
-dffeas \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE (
+// Location: FF_X27_Y12_N58
+dffeas \soc_inst|m0_1|u_logic|Dq73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -31917,43 +31358,44 @@ dffeas \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Dq73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dq73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~2 (
+// Location: LABCELL_X27_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lr9wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Imu2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Duuwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ukt2z4~q  & ( \soc_inst|m0_1|u_logic|Dq73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ukt2z4~q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ukt2z4~q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Imu2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ukt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dq73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .lut_mask = 64'h0000000000A000C0;
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .lut_mask = 64'h0022000200200000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y10_N38
-dffeas \soc_inst|m0_1|u_logic|Ii73z4 (
+// Location: FF_X27_Y10_N2
+dffeas \soc_inst|m0_1|u_logic|Ug63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -31961,18 +31403,18 @@ dffeas \soc_inst|m0_1|u_logic|Ii73z4 (
 	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ii73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ug63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ii73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ii73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ug63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y10_N47
-dffeas \soc_inst|m0_1|u_logic|Cvr2z4 (
+// Location: FF_X27_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Ruj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -31980,416 +31422,448 @@ dffeas \soc_inst|m0_1|u_logic|Cvr2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cvr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ruj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cvr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cvr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ruj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ruj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~0 (
+// Location: LABCELL_X27_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lr9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Cvr2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ii73z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Duuwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ug63z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ruj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ii73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cvr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ug63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ruj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .lut_mask = 64'h0000C0A000000000;
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .lut_mask = 64'h0C0000000A000000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4 (
+// Location: LABCELL_X27_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lr9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Lr9wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Lr9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lr9wx4~3_combout  & !\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Duuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Duuwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duuwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Duuwx4~3_combout  & !\soc_inst|m0_1|u_logic|Duuwx4~2_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lr9wx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lr9wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duuwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lr9wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lr9wx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|Lr9wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkdwx4~0 (
+// Location: LABCELL_X29_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kw7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fkdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bywwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Duuwx4~combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .lut_mask = 64'h00FF00FFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y8_N53
-dffeas \soc_inst|m0_1|u_logic|Rhu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rhu2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jmdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jmdwx4~0_combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rhu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y10_N40
-dffeas \soc_inst|m0_1|u_logic|An83z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fkdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rw7wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Fkdwx4~0_combout ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|An83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|An83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .lut_mask = 64'h0C0C0C0C3F3F3F3F;
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~2 (
+// Location: LABCELL_X24_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B2uvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjqwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q 
-//  & !\soc_inst|m0_1|u_logic|Rhu2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Rhu2z4~q ) 
-// # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|B2uvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q  & \soc_inst|m0_1|u_logic|B2uvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rhu2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .lut_mask = 64'h0000501000004000;
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~1 (
+// Location: LABCELL_X17_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mcc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjqwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Gt93z4~q  & ( \soc_inst|m0_1|u_logic|K7s2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gt93z4~q  & ( !\soc_inst|m0_1|u_logic|K7s2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gt93z4~q  & ( !\soc_inst|m0_1|u_logic|K7s2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mcc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Mcc3z4~q  & ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o [1]) # (!\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mcc3z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o [1] & !\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Mcc3z4~q  & ( !\soc_inst|m0_1|u_logic|Zyovx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Gt93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|K7s2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .lut_mask = 64'h0101010000010000;
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .lut_mask = 64'h0000FFFF4444EEEE;
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y10_N19
-dffeas \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE (
+// Location: FF_X17_Y18_N4
+dffeas \soc_inst|m0_1|u_logic|Mcc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Mcc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mcc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mcc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~3 (
+// Location: LABCELL_X24_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ruvvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjqwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Arv2z4~q  & ( \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Arv2z4~q  & ( !\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Arv2z4~q  & ( !\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & (!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Trq2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Arv2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .lut_mask = 64'h0044004000040000;
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y10_N50
-dffeas \soc_inst|m0_1|u_logic|Oas2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Oas2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oas2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Oas2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .lut_mask = 64'h0000008000000000;
+defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~0 (
+// Location: MLABCELL_X25_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M2ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rd73z4~q  & ( \soc_inst|m0_1|u_logic|Oas2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rd73z4~q  & ( !\soc_inst|m0_1|u_logic|Oas2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rd73z4~q  & ( !\soc_inst|m0_1|u_logic|Oas2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|M2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((\soc_inst|m0_1|u_logic|hwdata_o [1]) # (\soc_inst|m0_1|u_logic|Vac3z4~q ))) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vac3z4~q  & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|hwdata_o [1])))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o [1]) # (\soc_inst|m0_1|u_logic|Vac3z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vac3z4~q  & ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout ) # (!\soc_inst|m0_1|u_logic|hwdata_o [1]))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rd73z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oas2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .lut_mask = 64'h0A00080002000000;
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .lut_mask = 64'h555055FF444044CC;
+defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y18_N23
+dffeas \soc_inst|m0_1|u_logic|Vac3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vac3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vac3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4 (
+// Location: LABCELL_X19_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6twx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Pjqwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pjqwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Pjqwx4~1_combout  & !\soc_inst|m0_1|u_logic|Pjqwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Q6twx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Vac3z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mcc3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|Vac3z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pjqwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6twx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjqwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjqwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Pjqwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .lut_mask = 64'h000F000F555F555F;
+defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nodwx4~0 (
+// Location: LABCELL_X24_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6twx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nodwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pybwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Q6twx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Q6twx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R0t2z4~q  & (((!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|S5b3z4~q )))) # (\soc_inst|m0_1|u_logic|R0t2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|S5b3z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|R0t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S5b3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q6twx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6twx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .lut_mask = 64'h555555550F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .lut_mask = 64'hEEE0EEE000000000;
+defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nodwx4~1 (
+// Location: LABCELL_X17_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfa3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nodwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Fkdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qfa3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o [1] )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qfa3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .lut_mask = 64'h03030303F3F3F3F3;
-defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I7owx4 (
+// Location: FF_X17_Y17_N41
+dffeas \soc_inst|m0_1|u_logic|Qfa3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qfa3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qfa3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qfa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qfa3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~94 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I7owx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Add0~94_cout  = CARRY(( !\soc_inst|m0_1|u_logic|F2o2z4~q  ) + ( VCC ) + ( !VCC ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.combout(),
 	.sumout(),
-	.cout(),
+	.cout(\soc_inst|m0_1|u_logic|Add0~94_cout ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I7owx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I7owx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|I7owx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~94 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~94 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~94 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2twx4~0 (
+// Location: LABCELL_X18_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~33 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I2twx4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|B2uvx4~0_combout  & (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lz93z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Add0~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|C4b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~94_cout  ))
+// \soc_inst|m0_1|u_logic|Add0~34  = CARRY(( !\soc_inst|m0_1|u_logic|C4b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~94_cout  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~94_cout ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~33_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~34 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I2twx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I2twx4~0 .lut_mask = 64'h0000000005000500;
-defparam \soc_inst|m0_1|u_logic|I2twx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~33 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfc3z4~0 (
+// Location: LABCELL_X17_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xsmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qfc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( \soc_inst|m0_1|u_logic|Qfc3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Qfc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Xsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C4b3z4~q  & ( \soc_inst|m0_1|u_logic|Qfa3z4~q  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~33_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|C4b3z4~q  & ( \soc_inst|m0_1|u_logic|Qfa3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~33_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C4b3z4~q  & ( !\soc_inst|m0_1|u_logic|Qfa3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~33_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|C4b3z4~q  & ( !\soc_inst|m0_1|u_logic|Qfa3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~33_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~33_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfa3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .lut_mask = 64'h30FC30FC00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .lut_mask = 64'h5D55FDF55F57FFF7;
+defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N2
-dffeas \soc_inst|m0_1|u_logic|Qfc3z4 (
+// Location: FF_X17_Y17_N25
+dffeas \soc_inst|m0_1|u_logic|C4b3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -32398,1400 +31872,1255 @@ dffeas \soc_inst|m0_1|u_logic|Qfc3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|C4b3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qfc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C4b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C4b3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y14_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pguvx4~0 (
+// Location: LABCELL_X18_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pguvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rhfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|C4b3z4~q ) # ((\soc_inst|m0_1|u_logic|G6owx4~combout  & !\soc_inst|m0_1|u_logic|Qfa3z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & 
+// ( (\soc_inst|m0_1|u_logic|G6owx4~combout  & !\soc_inst|m0_1|u_logic|Qfa3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qfa3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .lut_mask = 64'h0800000000000000;
-defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .lut_mask = 64'h50505050FF50FF50;
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1ivx4~0 (
+// Location: LABCELL_X24_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Hub3z4~q )))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ) # (\soc_inst|m0_1|u_logic|Hub3z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & (\soc_inst|m0_1|u_logic|Hub3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Hub3z4~q )))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ) # (\soc_inst|m0_1|u_logic|Hub3z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|Hub3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rhfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~21_combout  & (!\soc_inst|m0_1|u_logic|Rhfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Q6twx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rhfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q6twx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q6twx4~1_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rhfwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .lut_mask = 64'h0F0ACF8A0302CF8A;
-defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y13_N10
-dffeas \soc_inst|m0_1|u_logic|Hub3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hub3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hub3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hub3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .lut_mask = 64'hF500F500C400C400;
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~0 (
+// Location: LABCELL_X23_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ihlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Hub3z4~q  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  
-// & \soc_inst|m0_1|u_logic|Qfc3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Qfc3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hub3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Qfc3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rhfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .lut_mask = 64'h030303030303FFFF;
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .lut_mask = 64'h00000000ABFBABFB;
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y9_N41
-dffeas \soc_inst|switches_1|switch_store[0][3] (
+// Location: FF_X23_Y9_N35
+dffeas \soc_inst|m0_1|u_logic|Neu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[3]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][3]~q ),
+	.q(\soc_inst|m0_1|u_logic|Neu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][3] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][3] .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X15_Y9_N27
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[3]~20 (
-// Equation(s):
-// \soc_inst|ram_1|data_to_memory[3]~20_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select [0]) ) ) 
-// ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & 
-// ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|byte_select [0]) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datac(!\soc_inst|ram_1|byte_select [0]),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[3]~20_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[3]~20 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[3]~20 .lut_mask = 64'h0303333300003030;
-defparam \soc_inst|ram_1|data_to_memory[3]~20 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Neu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Neu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~0 (
+// Location: LABCELL_X23_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( \soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|R40wx4~combout  & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( \soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|R40wx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|R40wx4~combout  & 
-// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|R40wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Zkuwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Neu2z4~q  & ( \soc_inst|m0_1|u_logic|Wj83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Neu2z4~q  & ( !\soc_inst|m0_1|u_logic|Wj83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Neu2z4~q  & ( !\soc_inst|m0_1|u_logic|Wj83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Neu2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wj83z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .lut_mask = 64'hFEFECECE32320202;
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .lut_mask = 64'h0022000200200000;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Knvvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Knvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ny3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y12_N59
+dffeas \soc_inst|m0_1|u_logic|Lqr2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lqr2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lqr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lqr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N45
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[27]~19 (
+// Location: LABCELL_X23_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[27]~19_combout  = ( \soc_inst|m0_1|u_logic|Knvvx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ) # (\soc_inst|ram_1|byte_select [3]))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Knvvx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (!\soc_inst|ram_1|byte_select [3] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 )) ) )
+// \soc_inst|m0_1|u_logic|Zkuwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Lqr2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Na73z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select [3]),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Na73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lqr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[27]~19_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[27]~19 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[27]~19 .lut_mask = 64'h0050005005550555;
-defparam \soc_inst|ram_1|data_to_memory[27]~19 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .lut_mask = 64'h0C0A000000000000;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X5_Y5_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 (
-	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[27]~19_combout ,\soc_inst|ram_1|data_to_memory[3]~20_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X23_Y8_N56
+dffeas \soc_inst|m0_1|u_logic|Wnv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Wnv2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_bit_number = 3;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_bit_number = 3;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031C34C0760580BC0621191721DC731D91E11E11A11A11E11E11A1021555555555555559860140500505000000050001410";
+defparam \soc_inst|m0_1|u_logic|Wnv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y9_N39
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[3]~26 (
-// Equation(s):
-// \soc_inst|interconnect_1|HRDATA[3]~26_combout  = ( \soc_inst|switches_1|switch_store[0][3]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
-// (\soc_inst|interconnect_1|HRDATA[7]~10_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][3]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & 
-// ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (!\soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( \soc_inst|switches_1|switch_store[0][3]~q  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & 
-// (\soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][3]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
-// !\soc_inst|interconnect_1|HRDATA[7]~10_combout ) ) ) )
-
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
-	.datae(!\soc_inst|switches_1|switch_store[0][3]~q ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y8_N11
+dffeas \soc_inst|m0_1|u_logic|Wor2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wor2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[3]~26 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[3]~26 .lut_mask = 64'hF000F055F0AAF0FF;
-defparam \soc_inst|interconnect_1|HRDATA[3]~26 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wor2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wor2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~1 (
+// Location: LABCELL_X23_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ihlwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[3]~26_combout  & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[3]~26_combout  & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[3]~26_combout  & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zkuwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wnv2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wor2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wnv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wor2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .lut_mask = 64'hC8C8C8C8C8C80000;
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .lut_mask = 64'h000000000C000A00;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y13_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ihlwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wia3z4~q  & ( \soc_inst|m0_1|u_logic|Ihlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|W0b3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wia3z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Ihlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|W0b3z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wia3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|Cq93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cq93z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .lut_mask = 64'h00000000B0B0BBBB;
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cq93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cq93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Nodwx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y9_N58
+dffeas \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .lut_mask = 64'h00000000F1FDF1FD;
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfzvx4~0 (
+// Location: LABCELL_X22_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qfzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Zkuwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Cq93z4~q  & ( \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  
+// & \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cq93z4~q  & ( !\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cq93z4~q  & ( !\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cq93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qfzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .lut_mask = 64'h0FCF0FCF00CC00CC;
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .lut_mask = 64'h0101010000010000;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfzvx4~1 (
+// Location: LABCELL_X23_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qfzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qfzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zkuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Zkuwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Zkuwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zkuwx4~2_combout  & !\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qfzvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zkuwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zkuwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .lut_mask = 64'h00CFCFCF00000000;
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hrcvx4 (
+// Location: LABCELL_X22_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hrcvx4~combout  = ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zkuwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Zkuwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hrcvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hrcvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hrcvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Hrcvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdtwx4 (
+// Location: FF_X23_Y11_N46
+dffeas \soc_inst|m0_1|u_logic|Psh3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Psh3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Psh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mi23z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qdtwx4~combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Zetwx4~combout  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  
-// & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Zetwx4~combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Mi23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zetwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mi23z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdtwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qdtwx4 .lut_mask = 64'h0C0F0C0F03000300;
-defparam \soc_inst|m0_1|u_logic|Qdtwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mi23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mi23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Mi23z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y6_N40
-dffeas \soc_inst|m0_1|u_logic|C3z2z4 (
+// Location: FF_X21_Y11_N52
+dffeas \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mi23z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C3z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C3z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7cwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|T7cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (!\soc_inst|m0_1|u_logic|C3z2z4~q ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (!\soc_inst|m0_1|u_logic|C3z2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X21_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Naq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Naq2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .lut_mask = 64'hAA002800AAAA2828;
-defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Naq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Naq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phlwx4~0 (
+// Location: LABCELL_X19_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj73z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Phlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X77wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Wj73z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T31xx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|T31xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wj73z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T31xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T31xx4~0 .lut_mask = 64'h0000000000C000C0;
-defparam \soc_inst|m0_1|u_logic|T31xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y6_N53
-dffeas \soc_inst|m0_1|u_logic|C5v2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C5v2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C5v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wj73z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wj73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wj73z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N22
-dffeas \soc_inst|m0_1|u_logic|Tvt2z4 (
+// Location: FF_X19_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Wj73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wj73z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tvt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wj73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tvt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wj73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R91xx4~0 (
+// Location: MLABCELL_X21_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R91xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Wj73z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Naq2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wj73z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Naq2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Naq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wj73z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R91xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R91xx4~0 .lut_mask = 64'h0000050500000000;
-defparam \soc_inst|m0_1|u_logic|R91xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .lut_mask = 64'h000E000400000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~0 (
+// Location: LABCELL_X19_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vr33z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~0_combout  = ( \soc_inst|m0_1|u_logic|R91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C5v2z4~q ) # ((\soc_inst|m0_1|u_logic|T31xx4~0_combout  & !\soc_inst|m0_1|u_logic|Tvt2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R91xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T31xx4~0_combout  & !\soc_inst|m0_1|u_logic|Tvt2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Vr33z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C5v2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tvt2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vr33z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .lut_mask = 64'h33003300F3F0F3F0;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y6_N32
-dffeas \soc_inst|m0_1|u_logic|C183z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C183z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C183z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C183z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y5_N49
-dffeas \soc_inst|m0_1|u_logic|Joi3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Joi3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Joi3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Joi3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vr33z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vr33z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Vr33z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N43
-dffeas \soc_inst|m0_1|u_logic|Umi3z4 (
+// Location: FF_X19_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|Vr33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vr33z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Umi3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vr33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Umi3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Umi3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vr33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y5_N35
-dffeas \soc_inst|m0_1|u_logic|Tr63z4 (
+// Location: FF_X23_Y9_N4
+dffeas \soc_inst|m0_1|u_logic|Ft83z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tr63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ft83z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tr63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tr63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ft83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ft83z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~7 (
+// Location: LABCELL_X19_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Tr63z4~q  & ( \soc_inst|m0_1|u_logic|R293z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tr63z4~q  & ( !\soc_inst|m0_1|u_logic|R293z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tr63z4~q  & ( !\soc_inst|m0_1|u_logic|R293z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  $ 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Ft83z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Vr33z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ft83z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Vr33z4~q ) # (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tr63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R293z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vr33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ft83z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .lut_mask = 64'h0009000100080000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .lut_mask = 64'h0000000020302000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~8 (
+// Location: MLABCELL_X34_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Eacwx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Joi3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (\soc_inst|m0_1|u_logic|Umi3z4~q  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Joi3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Z62wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Psh3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Z62wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Psh3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Joi3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Umi3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Psh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~6_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .lut_mask = 64'h8ACF8ACF00000000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .lut_mask = 64'hF500310000000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|Lph3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lph3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lph3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lph3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vmj2z4~feeder (
+// Location: LABCELL_X19_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E153z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vmj2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|E153z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vmj2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E153z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vmj2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vmj2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Vmj2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E153z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E153z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|E153z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y5_N26
-dffeas \soc_inst|m0_1|u_logic|Vmj2z4 (
+// Location: FF_X19_Y10_N14
+dffeas \soc_inst|m0_1|u_logic|E153z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vmj2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|E153z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vmj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|E153z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vmj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vmj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E153z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E153z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~4 (
+// Location: MLABCELL_X25_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( \soc_inst|m0_1|u_logic|Q7j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  $ 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~2_combout  = ( \soc_inst|m0_1|u_logic|E153z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lph3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E153z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lph3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E153z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vmj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lph3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|E153z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .lut_mask = 64'h8020800000200000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y5_N19
-dffeas \soc_inst|m0_1|u_logic|Jq13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jq13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jq13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jq13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .lut_mask = 64'h000C000000800080;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y5_N17
-dffeas \soc_inst|m0_1|u_logic|F9j2z4 (
+// Location: FF_X22_Y9_N4
+dffeas \soc_inst|m0_1|u_logic|Wnu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F9j2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wnu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F9j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F9j2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wnu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~1 (
+// Location: MLABCELL_X25_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Jq13z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|F9j2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wnu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rdq2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wnu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Rdq2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jq13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|F9j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wnu2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .lut_mask = 64'h5808000000000000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .lut_mask = 64'h00D0000000800000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N53
-dffeas \soc_inst|m0_1|u_logic|B943z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B943z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Euh3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Euh3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Euh3z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B943z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B943z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Euh3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Euh3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Euh3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y7_N1
-dffeas \soc_inst|m0_1|u_logic|Zpj2z4 (
+// Location: FF_X21_Y11_N55
+dffeas \soc_inst|m0_1|u_logic|Euh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Euh3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zpj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Euh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zpj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Euh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Euh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~2 (
+// Location: MLABCELL_X34_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T04xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|B943z4~q  & ( \soc_inst|m0_1|u_logic|Zpj2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B943z4~q  & ( !\soc_inst|m0_1|u_logic|Zpj2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B943z4~q  & ( !\soc_inst|m0_1|u_logic|Zpj2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|T04xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Euh3z4~q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B943z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zpj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Euh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T04xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .lut_mask = 64'h0404000404000000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T04xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T04xx4~0 .lut_mask = 64'h0080000000000000;
+defparam \soc_inst|m0_1|u_logic|T04xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y6_N11
-dffeas \soc_inst|m0_1|u_logic|Sz23z4 (
+// Location: FF_X23_Y8_N23
+dffeas \soc_inst|m0_1|u_logic|Fxv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sz23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fxv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sz23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sz23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fxv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fxv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N37
-dffeas \soc_inst|m0_1|u_logic|Ki53z4 (
+// Location: FF_X25_Y9_N14
+dffeas \soc_inst|m0_1|u_logic|Arh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ki53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Arh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ki53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ki53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Arh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Arh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~3 (
+// Location: LABCELL_X24_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Sz23z4~q  & ( \soc_inst|m0_1|u_logic|Ki53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sz23z4~q  & ( !\soc_inst|m0_1|u_logic|Ki53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sz23z4~q  & ( !\soc_inst|m0_1|u_logic|Ki53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fxv2z4~q  & ( \soc_inst|m0_1|u_logic|Arh3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fxv2z4~q  & ( !\soc_inst|m0_1|u_logic|Arh3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fxv2z4~q  & ( !\soc_inst|m0_1|u_logic|Arh3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  $ 
+// (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sz23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ki53z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fxv2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Arh3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .lut_mask = 64'h0050001000400000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .lut_mask = 64'h0900080001000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y8_N53
+dffeas \soc_inst|m0_1|u_logic|Ccq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ccq2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ccq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ccq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N10
-dffeas \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE (
+// Location: FF_X21_Y11_N53
+dffeas \soc_inst|m0_1|u_logic|Mi23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mi23z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Mi23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mi23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N32
-dffeas \soc_inst|m0_1|u_logic|Fli3z4 (
+// Location: FF_X19_Y10_N25
+dffeas \soc_inst|m0_1|u_logic|Vr33z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vr33z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fli3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vr33z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fli3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fli3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vr33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr33z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~5 (
+// Location: MLABCELL_X21_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Fli3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Du9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vr33z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Mi23z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vr33z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Mi23z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fli3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mi23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vr33z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Du9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .lut_mask = 64'h00CA000000000000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .lut_mask = 64'h00000000A2008000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~6 (
+// Location: MLABCELL_X25_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Eacwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Eacwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Eacwx4~4_combout  & (!\soc_inst|m0_1|u_logic|Eacwx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Eacwx4~2_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Du9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lph3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Arh3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eacwx4~4_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Eacwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eacwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Eacwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lph3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Arh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Du9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .lut_mask = 64'hA000000000000000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .lut_mask = 64'h0C0000000A000000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~9 (
+// Location: LABCELL_X23_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aw9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~9_combout  = ( \soc_inst|m0_1|u_logic|Eacwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Eacwx4~0_combout  & (\soc_inst|m0_1|u_logic|Eacwx4~8_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|C183z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Aw9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Psh3z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eacwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C183z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eacwx4~8_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Eacwx4~6_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Psh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .lut_mask = 64'h000000A2000000A2;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .lut_mask = 64'h0200000000000000;
+defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rih2z4~0 (
+// Location: FF_X22_Y9_N35
+dffeas \soc_inst|m0_1|u_logic|Na63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Na63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Na63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Eacwx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Eacwx4~9_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Du9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Na63z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|E153z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|E153z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Na63z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Du9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .lut_mask = 64'hFCFCFCFCAFAFAFAF;
-defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .lut_mask = 64'h0000080800000A00;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~61 (
+// Location: MLABCELL_X21_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~66  ))
-// \soc_inst|m0_1|u_logic|Add3~62  = CARRY(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~66  ))
+// \soc_inst|m0_1|u_logic|Du9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Du9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Du9wx4~1_combout  & (\soc_inst|m0_1|u_logic|Euh3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Du9wx4~2_combout  & !\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Du9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Du9wx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Du9wx4~2_combout  & !\soc_inst|m0_1|u_logic|Aw9wx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Du9wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Euh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Du9wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Du9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~66 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~61_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~62 ),
+	.combout(\soc_inst|m0_1|u_logic|Du9wx4~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~61 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~61 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~61 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .lut_mask = 64'hA000000020000000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~57 (
+// Location: LABCELL_X23_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P82wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Foe3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~62  ))
-// \soc_inst|m0_1|u_logic|Add3~58  = CARRY(( !\soc_inst|m0_1|u_logic|Foe3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~62  ))
+// \soc_inst|m0_1|u_logic|P82wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Du9wx4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|J7q2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y8q2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|J7q2z4~q 
+// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y8q2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Du9wx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~62 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~57_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~58 ),
+	.combout(\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~57 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~57 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add3~57 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P82wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P82wx4~0 .lut_mask = 64'hD8D8DDDDD8D8DD88;
+defparam \soc_inst|m0_1|u_logic|P82wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~101 (
+// Location: LABCELL_X33_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ns9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~58  ))
-// \soc_inst|m0_1|u_logic|Add3~102  = CARRY(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~58  ))
+// \soc_inst|m0_1|u_logic|Ns9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~58 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~101_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~102 ),
+	.combout(\soc_inst|m0_1|u_logic|Ns9wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~101 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~101 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add3~101 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .lut_mask = 64'hFF00FF000F000F00;
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~113 (
+// Location: LABCELL_X33_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ns9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~102  ))
-// \soc_inst|m0_1|u_logic|Add3~114  = CARRY(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~102  ))
+// \soc_inst|m0_1|u_logic|Ns9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Z62wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Ns9wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Z62wx4~8_combout  & ( 
+// \soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Z62wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z62wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ns9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .lut_mask = 64'h1511151115115555;
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~65 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~65_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~62  ))
+// \soc_inst|m0_1|u_logic|Add5~66  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~62  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~102 ),
+	.cin(\soc_inst|m0_1|u_logic|Add5~62 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~113_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~114 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~66 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~113 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~113 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~113 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~65 .lut_mask = 64'h0000A05F000000CC;
+defparam \soc_inst|m0_1|u_logic|Add5~65 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y92wx4 (
+// Location: LABCELL_X30_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y92wx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~113_sumout  & ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~113_sumout  & ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~113_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~113_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|haddr_o~3_combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~93_sumout )) # 
+// (\soc_inst|m0_1|u_logic|P82wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~93_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~93_sumout )) # (\soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~93_sumout ) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~113_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add3~93_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y92wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y92wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y92wx4 .lut_mask = 64'hFFCCAA88F0C0A080;
-defparam \soc_inst|m0_1|u_logic|Y92wx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y5_N26
-dffeas \soc_inst|m0_1|u_logic|B6j2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B6j2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B6j2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|haddr_o~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~3 .lut_mask = 64'h050505FF373737FF;
+defparam \soc_inst|m0_1|u_logic|haddr_o~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8ivx4~0 (
+// Location: LABCELL_X36_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zcivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K8ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|B6j2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y92wx4~combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y92wx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kaf3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B6j2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zcivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y92wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zcivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .lut_mask = 64'h00F3FFF300515551;
-defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .lut_mask = 64'h0A0FFAFF080CC8CC;
+defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y5_N25
-dffeas \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE (
+// Location: FF_X36_Y9_N20
+dffeas \soc_inst|m0_1|u_logic|Y8q2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zcivx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -33800,651 +33129,687 @@ dffeas \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Y8q2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y8q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y8q2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N50
-dffeas \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ccq2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Ccq2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ccq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .lut_mask = 64'hC008000800000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N11
-dffeas \soc_inst|m0_1|u_logic|Qji3z4 (
+// Location: FF_X22_Y9_N23
+dffeas \soc_inst|m0_1|u_logic|E0d3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qji3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|E0d3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qji3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qji3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E0d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E0d3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~2 (
+// Location: LABCELL_X22_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P582z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Fli3z4~q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Qji3z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|E0d3z4~q  & ( \soc_inst|m0_1|u_logic|Na63z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|E0d3z4~q  & ( !\soc_inst|m0_1|u_logic|Na63z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E0d3z4~q  & ( !\soc_inst|m0_1|u_logic|Na63z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
+// )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fli3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qji3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|E0d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Na63z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P582z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P582z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P582z4~2 .lut_mask = 64'h0000D08000000000;
-defparam \soc_inst|m0_1|u_logic|P582z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .lut_mask = 64'h0003000200010000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~1 (
+// Location: LABCELL_X33_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P582z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Jq13z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Sz23z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Z62wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Z62wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Z62wx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|T04xx4~0_combout  & !\soc_inst|m0_1|u_logic|Z62wx4~3_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sz23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jq13z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z62wx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z62wx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T04xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z62wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P582z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P582z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P582z4~1 .lut_mask = 64'h00000000E0400000;
-defparam \soc_inst|m0_1|u_logic|P582z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~0 (
+// Location: LABCELL_X33_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P582z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ki53z4~q  & ( \soc_inst|m0_1|u_logic|B943z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ki53z4~q  & ( !\soc_inst|m0_1|u_logic|B943z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ki53z4~q  & ( !\soc_inst|m0_1|u_logic|B943z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~combout  = ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ki53z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|B943z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P582z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P582z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P582z4~0 .lut_mask = 64'h0500040001000000;
-defparam \soc_inst|m0_1|u_logic|P582z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Z62wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M782z4~0 (
+// Location: LABCELL_X33_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N72wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M782z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Umi3z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|N72wx4~0_combout  = ( \soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Umi3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M782z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N72wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M782z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M782z4~0 .lut_mask = 64'h0000000040000000;
-defparam \soc_inst|m0_1|u_logic|M782z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N72wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N72wx4~0 .lut_mask = 64'hFFCCE020FF33B080;
+defparam \soc_inst|m0_1|u_logic|N72wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~3 (
+// Location: LABCELL_X19_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q52wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P582z4~3_combout  = ( !\soc_inst|m0_1|u_logic|P582z4~0_combout  & ( !\soc_inst|m0_1|u_logic|M782z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P582z4~2_combout  & (!\soc_inst|m0_1|u_logic|P582z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Q52wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|N72wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|N72wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|N72wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P582z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P582z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|P582z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|M782z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N72wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P582z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q52wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P582z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P582z4~3 .lut_mask = 64'hD000000000000000;
-defparam \soc_inst|m0_1|u_logic|P582z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .lut_mask = 64'h0A020A0200000A02;
+defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtnvx4~0 (
+// Location: LABCELL_X19_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q52wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|P582z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Q7j2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Q7j2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Q52wx4~1_combout  = ( \soc_inst|m0_1|u_logic|U72wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Glnwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Q52wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P582z4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q52wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .lut_mask = 64'h353535353030303F;
-defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .lut_mask = 64'h000000CF00000000;
+defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9cwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q9cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|Gtnvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Rih2z4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|Rih2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q9cwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Rdq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .lut_mask = 64'hE4DDF0CC00DD00CC;
-defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rdq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rdq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ancvx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ancvx4~combout  = ( \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ancvx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y10_N43
+dffeas \soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wj73z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ancvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ancvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ancvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~125 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~125_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) ) + ( 
-// \soc_inst|m0_1|u_logic|Add5~2  ))
-// \soc_inst|m0_1|u_logic|Add5~126  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) ) + ( 
-// \soc_inst|m0_1|u_logic|Add5~2  ))
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
+// Location: MLABCELL_X25_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ey9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rdq2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~2 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~125_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~126 ),
+	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~125 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~125 .lut_mask = 64'h0000CC33000000F0;
-defparam \soc_inst|m0_1|u_logic|Add5~125 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .lut_mask = 64'h000088000000A000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~121 (
+// Location: FF_X23_Y9_N5
+dffeas \soc_inst|m0_1|u_logic|Ft83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ft83z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ft83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ft83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~121_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ancvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~126  ))
-// \soc_inst|m0_1|u_logic|Add5~122  = CARRY(( !\soc_inst|m0_1|u_logic|Ancvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~126  ))
+// \soc_inst|m0_1|u_logic|Ey9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ft83z4~q  & ( \soc_inst|m0_1|u_logic|Wnu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ft83z4~q  & ( !\soc_inst|m0_1|u_logic|Wnu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ft83z4~q  & ( !\soc_inst|m0_1|u_logic|Wnu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ancvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ft83z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wnu2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~126 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~121_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~122 ),
+	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~121 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~121 .lut_mask = 64'h0000009D0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add5~121 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .lut_mask = 64'h0022002000020000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yqzvx4~0 (
+// Location: LABCELL_X23_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Q9cwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Q9cwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Q9cwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ey9wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fxv2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ccq2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q9cwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fxv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ccq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .lut_mask = 64'h2022000020222022;
-defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .lut_mask = 64'h0030002200000000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3uvx4~0 (
+// Location: LABCELL_X22_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R3uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oytvx4~combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|F2o2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ey9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|E0d3z4~q  & ( \soc_inst|m0_1|u_logic|Naq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|E0d3z4~q  & ( !\soc_inst|m0_1|u_logic|Naq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E0d3z4~q  & ( !\soc_inst|m0_1|u_logic|Naq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|E0d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Naq2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .lut_mask = 64'h0000000030303030;
-defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .lut_mask = 64'h0011001000010000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbmvx4~0 (
+// Location: LABCELL_X24_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rbmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|K3l2z4~q  & (!\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & \soc_inst|m0_1|u_logic|V3o2z4~q ))) # (\soc_inst|m0_1|u_logic|R3uvx4~0_combout ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & \soc_inst|m0_1|u_logic|V3o2z4~q )) # (\soc_inst|m0_1|u_logic|R3uvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ey9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ey9wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Ey9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ey9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V3o2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ey9wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rbmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .lut_mask = 64'h33F333F333733373;
-defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y9_N52
-dffeas \soc_inst|m0_1|u_logic|V3o2z4 (
+// Location: FF_X31_Y8_N7
+dffeas \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rbmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V3o2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V3o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V3o2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X22_Y10_N25
-dffeas \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE (
+// Location: FF_X31_Y8_N5
+dffeas \soc_inst|m0_1|u_logic|Cao2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cao2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X22_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Owgvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Owgvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Wfuwx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ((\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ye4wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .lut_mask = 64'h333333223F3F3F2A;
-defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cao2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cao2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X22_Y10_N26
-dffeas \soc_inst|m0_1|u_logic|Ywi2z4 (
+// Location: FF_X25_Y7_N37
+dffeas \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ywi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ywi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6mwx4~0 (
+// Location: MLABCELL_X28_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ywi2z4~q  & ( !\soc_inst|m0_1|u_logic|U7w2z4~q  ) )
+// \soc_inst|m0_1|u_logic|W21wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|J773z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q 
+// )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J773z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~7 .lut_mask = 64'h0000220000000030;
+defparam \soc_inst|m0_1|u_logic|W21wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y5_N52
-dffeas \soc_inst|m0_1|u_logic|R6n2z4 (
+// Location: FF_X28_Y7_N14
+dffeas \soc_inst|m0_1|u_logic|Sg83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R6n2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sg83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R6n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sg83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sg83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T83xx4~0 (
+// Location: MLABCELL_X28_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z52xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T83xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|R6n2z4~q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Z52xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sg83z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q 
+// ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|R6n2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sg83z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T83xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z52xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T83xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T83xx4~0 .lut_mask = 64'h2000000000000000;
-defparam \soc_inst|m0_1|u_logic|T83xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .lut_mask = 64'h0004000400000000;
+defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N19
-dffeas \soc_inst|m0_1|u_logic|Dq53z4 (
+// Location: MLABCELL_X28_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cao2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|W21wx4~7_combout  & !\soc_inst|m0_1|u_logic|Z52xx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|W21wx4~7_combout  & !\soc_inst|m0_1|u_logic|Z52xx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cao2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|W21wx4~7_combout  & !\soc_inst|m0_1|u_logic|Z52xx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W21wx4~7_combout  & 
+// !\soc_inst|m0_1|u_logic|Z52xx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cao2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|W21wx4~7_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z52xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~8 .lut_mask = 64'hF000300050001000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y7_N47
+dffeas \soc_inst|m0_1|u_logic|Jbu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dq53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jbu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dq53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dq53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jbu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jbu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y4_N34
-dffeas \soc_inst|m0_1|u_logic|L733z4 (
+// Location: FF_X25_Y7_N13
+dffeas \soc_inst|m0_1|u_logic|Skv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L733z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Skv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L733z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L733z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Skv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~3 (
+// Location: MLABCELL_X25_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Dq53z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|L733z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Skv2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jbu2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dq53z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L733z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Skv2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .lut_mask = 64'h000000A000000088;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~0 .lut_mask = 64'h000A000C00000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N50
-dffeas \soc_inst|m0_1|u_logic|Ug43z4 (
+// Location: LABCELL_X27_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ro43z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ro43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ro43z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ro43z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ro43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ro43z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y6_N26
+dffeas \soc_inst|m0_1|u_logic|Ro43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ro43z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ug43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ro43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ug43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ug43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ro43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ro43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J0n2z4~feeder (
+// Location: LABCELL_X24_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5o2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J0n2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J70wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|J5o2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J0n2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J5o2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J0n2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J0n2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|J0n2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J5o2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J5o2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|J5o2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y8_N7
-dffeas \soc_inst|m0_1|u_logic|J0n2z4 (
+// Location: FF_X24_Y7_N4
+dffeas \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|J0n2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|J5o2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -34453,45 +33818,44 @@ dffeas \soc_inst|m0_1|u_logic|J0n2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J0n2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J0n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J0n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~2 (
+// Location: LABCELL_X27_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ug43z4~q  & ( \soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ug43z4~q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ug43z4~q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~2_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ro43z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ro43z4~q ),
 	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE_q ),
 	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ug43z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J0n2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .lut_mask = 64'h0044000400400000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~2 .lut_mask = 64'h00000000008800C0;
+defparam \soc_inst|m0_1|u_logic|W21wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y6_N7
-dffeas \soc_inst|m0_1|u_logic|Pw03z4 (
+// Location: FF_X25_Y9_N35
+dffeas \soc_inst|m0_1|u_logic|I113z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -34499,18 +33863,18 @@ dffeas \soc_inst|m0_1|u_logic|Pw03z4 (
 	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pw03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I113z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pw03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I113z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I113z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X51_Y6_N44
-dffeas \soc_inst|m0_1|u_logic|Vzz2z4 (
+// Location: FF_X25_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|O403z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -34518,43 +33882,43 @@ dffeas \soc_inst|m0_1|u_logic|Vzz2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vzz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|O403z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vzz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vzz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O403z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O403z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~4 (
+// Location: MLABCELL_X25_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Pw03z4~q )) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Vzz2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|O403z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|I113z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pw03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vzz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|I113z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O403z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .lut_mask = 64'h00AC000000000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~5 .lut_mask = 64'h0A0000000C000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y5_N5
-dffeas \soc_inst|m0_1|u_logic|Y1n2z4 (
+// Location: FF_X25_Y7_N31
+dffeas \soc_inst|m0_1|u_logic|Y6o2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -34562,1195 +33926,1372 @@ dffeas \soc_inst|m0_1|u_logic|Y1n2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y1n2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Y6o2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y1n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y6o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~1 (
+// Location: FF_X33_Y7_N8
+dffeas \soc_inst|m0_1|u_logic|If33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|If33z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|If33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|If33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X33_Y7_N59
+dffeas \soc_inst|m0_1|u_logic|Z523z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z523z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z523z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z523z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Y1n2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zfh3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Kq92z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|If33z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Z523z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y1n2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|If33z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z523z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kq92z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .lut_mask = 64'hA000000040400000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .lut_mask = 64'h0000A00000008080;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y4_N28
-dffeas \soc_inst|m0_1|u_logic|Cy13z4 (
+// Location: FF_X31_Y8_N8
+dffeas \soc_inst|m0_1|u_logic|Rbo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cy13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rbo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cy13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cy13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rbo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rbo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y8_N53
-dffeas \soc_inst|m0_1|u_logic|N3n2z4 (
+// Location: FF_X27_Y7_N8
+dffeas \soc_inst|m0_1|u_logic|Ay53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N3n2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ay53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N3n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ay53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ay53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kq92z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ay53z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ro43z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ro43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ay53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kq92z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .lut_mask = 64'h0000000000A000C0;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hs92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hs92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cao2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cao2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hs92z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .lut_mask = 64'h0200000000000000;
+defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kq92z4~2_combout  = ( !\soc_inst|m0_1|u_logic|O403z4~q  & ( \soc_inst|m0_1|u_logic|I113z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O403z4~q  & ( !\soc_inst|m0_1|u_logic|I113z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O403z4~q  & ( !\soc_inst|m0_1|u_logic|I113z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O403z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I113z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kq92z4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .lut_mask = 64'h3000200010000000;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~0 (
+// Location: LABCELL_X31_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|N3n2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Cy13z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Kq92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Hs92z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kq92z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Kq92z4~1_combout  & (!\soc_inst|m0_1|u_logic|Kq92z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rbo2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cy13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|N3n2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kq92z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rbo2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kq92z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hs92z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kq92z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kq92z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .lut_mask = 64'h0808A00000000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .lut_mask = 64'h8A00000000000000;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~5 (
+// Location: LABCELL_X31_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U11wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Wa0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T83xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wa0wx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wa0wx4~2_combout  & !\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Y8q2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nrvwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y8q2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Y8q2z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y8q2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T83xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wa0wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kq92z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U11wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U11wx4~0 .lut_mask = 64'hCCAACCFFCCAACCF0;
+defparam \soc_inst|m0_1|u_logic|U11wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4 (
+// Location: LABCELL_X31_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~69 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~combout  = ( \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|Add5~69_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~66  ))
+// \soc_inst|m0_1|u_logic|Add5~70  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~66  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~66 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~70 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~69 .lut_mask = 64'h0000A05F000000CC;
+defparam \soc_inst|m0_1|u_logic|Add5~69 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vpovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vpovx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( \soc_inst|m0_1|u_logic|Add3~89_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|U11wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( \soc_inst|m0_1|u_logic|Add3~89_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~89_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~89_sumout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add3~89_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vpovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vpovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vpovx4 .lut_mask = 64'h030303FF575757FF;
+defparam \soc_inst|m0_1|u_logic|Vpovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[22]~3 (
+// Location: LABCELL_X37_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eijvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  = ( \soc_inst|m0_1|u_logic|Y9t2z4~q  & ( \soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uvzvx4~combout  & \soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y9t2z4~q  & ( \soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Y9t2z4~q  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uvzvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y9t2z4~q  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Eijvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( \soc_inst|m0_1|u_logic|Vpovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( \soc_inst|m0_1|u_logic|Vpovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( !\soc_inst|m0_1|u_logic|Vpovx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( !\soc_inst|m0_1|u_logic|Vpovx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vpovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .lut_mask = 64'hAAAAFAFAAAAA0A0A;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .lut_mask = 64'h2323EFEF2300EF00;
+defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K3uvx4~0 (
+// Location: FF_X37_Y10_N56
+dffeas \soc_inst|m0_1|u_logic|Ym93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ym93z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ym93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ym93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K3uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|Kop2z4~q  & (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Mjl2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~4_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( (!\soc_inst|m0_1|u_logic|Y6o2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( (!\soc_inst|m0_1|u_logic|Y6o2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y6o2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .lut_mask = 64'h0100010000000000;
-defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~4 .lut_mask = 64'hC000008000000080;
+defparam \soc_inst|m0_1|u_logic|W21wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W2uvx4 (
+// Location: LABCELL_X27_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W2uvx4~combout  = ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
+// \soc_inst|m0_1|u_logic|W21wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Ay53z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|If33z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ay53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|If33z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W2uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W2uvx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|W2uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~3 .lut_mask = 64'h0050004400000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y10_N44
-dffeas \soc_inst|m0_1|u_logic|X9n2z4 (
+// Location: FF_X28_Y7_N10
+dffeas \soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X9n2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X9n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X9n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yhnvx4~0 (
+// Location: LABCELL_X33_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yhnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zei2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( 
-// \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cqo2z4~q ) # (\soc_inst|m0_1|u_logic|Zei2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cqo2z4~q  ) 
-// ) )
+// \soc_inst|m0_1|u_logic|W21wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Z523z4~q  & ( \soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z523z4~q  & ( !\soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z523z4~q  & ( !\soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  $ (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Z523z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .lut_mask = 64'hFF000000FF333333;
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~1 .lut_mask = 64'h2080008020000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~113 (
+// Location: LABCELL_X27_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~118  ))
-// \soc_inst|m0_1|u_logic|Add2~114  = CARRY(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~118  ))
+// \soc_inst|m0_1|u_logic|W21wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|W21wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W21wx4~0_combout  & (!\soc_inst|m0_1|u_logic|W21wx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|W21wx4~5_combout  & !\soc_inst|m0_1|u_logic|W21wx4~4_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|W21wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W21wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W21wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W21wx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W21wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~118 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~113_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~114 ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~113 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~113 .lut_mask = 64'h0000FFFF0000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add2~113 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~6 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~77 (
+// Location: MLABCELL_X34_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zpx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~114  ))
-// \soc_inst|m0_1|u_logic|Add2~78  = CARRY(( !\soc_inst|m0_1|u_logic|Zpx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~114  ))
+// \soc_inst|m0_1|u_logic|Kfawx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~114 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~77_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~78 ),
+	.combout(\soc_inst|m0_1|u_logic|Kfawx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~77 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~77 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~77 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .lut_mask = 64'hF000F000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~29 (
+// Location: MLABCELL_X28_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~29_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~78  ))
-// \soc_inst|m0_1|u_logic|Add2~30  = CARRY(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~78  ))
+// \soc_inst|m0_1|u_logic|Kfawx4~1_combout  = ( \soc_inst|m0_1|u_logic|W21wx4~6_combout  & ( \soc_inst|m0_1|u_logic|Kfawx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|W21wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W21wx4~6_combout  & ( \soc_inst|m0_1|u_logic|Kfawx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfawx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~78 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~29_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~30 ),
+	.combout(\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~29 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~29 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .lut_mask = 64'h000000005D5D5DFF;
+defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~21 (
+// Location: LABCELL_X33_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G11wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xsx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~30  ))
-// \soc_inst|m0_1|u_logic|Add2~22  = CARRY(( !\soc_inst|m0_1|u_logic|Xsx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~30  ))
+// \soc_inst|m0_1|u_logic|G11wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~30 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~21_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~22 ),
+	.combout(\soc_inst|m0_1|u_logic|G11wx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~21 .lut_mask = 64'h0000FFFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add2~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G11wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G11wx4~1 .lut_mask = 64'h0A5F0A5F05AF05AF;
+defparam \soc_inst|m0_1|u_logic|G11wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~9 (
+// Location: LABCELL_X33_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G11wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~22  ))
-// \soc_inst|m0_1|u_logic|Add2~10  = CARRY(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~22  ))
+// \soc_inst|m0_1|u_logic|G11wx4~0_combout  = ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|G11wx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|G11wx4~1_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G11wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~22 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~9_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~10 ),
+	.combout(\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~9 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G11wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G11wx4~0 .lut_mask = 64'h0000FF2F00002F2F;
+defparam \soc_inst|m0_1|u_logic|G11wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~13 (
+// Location: MLABCELL_X28_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Vvx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~10  ))
-// \soc_inst|m0_1|u_logic|Add2~14  = CARRY(( !\soc_inst|m0_1|u_logic|Vvx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~10  ))
+// \soc_inst|m0_1|u_logic|W21wx4~combout  = ( \soc_inst|m0_1|u_logic|W21wx4~8_combout  & ( \soc_inst|m0_1|u_logic|W21wx4~6_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~10 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~13_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~14 ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~13 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|W21wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~0 (
+// Location: LABCELL_X27_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vvx2z4~q  & ( (\soc_inst|m0_1|u_logic|S5pvx4~combout  & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & \soc_inst|m0_1|u_logic|Add2~13_sumout )) ) ) # ( !\soc_inst|m0_1|u_logic|Vvx2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|S5pvx4~combout  & \soc_inst|m0_1|u_logic|Add2~13_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qz0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W21wx4~combout ) # ((!\soc_inst|m0_1|u_logic|U11wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~combout  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U11wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~13_sumout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .lut_mask = 64'h3377337700440044;
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .lut_mask = 64'h00004488F0F0F4F8;
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~1 (
+// Location: MLABCELL_X25_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Xdfwx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & !\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qz0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|Qz0wx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & !\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .lut_mask = 64'hC0C0C0C0C000C000;
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .lut_mask = 64'hCC0000000C000000;
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~2 (
+// Location: MLABCELL_X21_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecowx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mhhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|Bspvx4~1_combout  & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ecowx4~combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mhhvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ecowx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .lut_mask = 64'h00000000F3F0F3F0;
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ecowx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ecowx4 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|Ecowx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y12_N49
-dffeas \soc_inst|m0_1|u_logic|Vvx2z4 (
+// Location: FF_X33_Y12_N49
+dffeas \soc_inst|ram_1|saved_word_address[11] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+	.q(\soc_inst|ram_1|saved_word_address [11]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vvx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vvx2z4 .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[11] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[11] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yhnvx4~1 (
+// Location: LABCELL_X29_Y13_N9
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[11]~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yhnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|W0pvx4~combout  & ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  & \soc_inst|m0_1|u_logic|Vvx2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0pvx4~combout 
-//  & ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( !\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|W0pvx4~combout  & ( !\soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Vvx2z4~q  & !\soc_inst|m0_1|u_logic|R1pvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0pvx4~combout  & ( !\soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[11]~11_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|haddr_o~5_combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [11])) ) ) 
+// # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [11] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|saved_word_address [11]),
+	.datac(!\soc_inst|ram_1|write_cycle~q ),
+	.datad(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[11]~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .lut_mask = 64'hAA000A00AAAA0A0A;
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y5_N40
-dffeas \soc_inst|m0_1|u_logic|Cqo2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cqo2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cqo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cqo2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X48_Y8_N53
-dffeas \soc_inst|m0_1|u_logic|Dq73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dq73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dq73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dq73z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .lut_mask = 64'h3333333303F303F3;
+defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~2 (
+// Location: LABCELL_X22_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duuwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ukt2z4~q  & ( \soc_inst|m0_1|u_logic|Dq73z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ukt2z4~q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ukt2z4~q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Rbmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( \soc_inst|m0_1|u_logic|R3uvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|V3o2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|K3l2z4~q )))) # (\soc_inst|m0_1|u_logic|R3uvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ukt2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dq73z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V3o2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rbmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .lut_mask = 64'h0030001000200000;
-defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .lut_mask = 64'h0FDF0FDF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y10_N22
-dffeas \soc_inst|m0_1|u_logic|Ruj2z4 (
+// Location: FF_X22_Y18_N43
+dffeas \soc_inst|m0_1|u_logic|V3o2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rbmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ruj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|V3o2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ruj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ruj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V3o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V3o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y9_N43
-dffeas \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K3uvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K3uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffs2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & \soc_inst|m0_1|u_logic|Kop2z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .lut_mask = 64'h0010001000000000;
+defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~0 (
+// Location: MLABCELL_X28_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W2uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duuwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ruj2z4~q  & ( \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|W2uvx4~combout  = ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ruj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .lut_mask = 64'h00A0002000800000;
-defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W2uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W2uvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|W2uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N20
-dffeas \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE (
+// Location: FF_X28_Y18_N23
+dffeas \soc_inst|m0_1|u_logic|Aqp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Aqp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aqp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aqp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y9_N26
-dffeas \soc_inst|m0_1|u_logic|Fwj2z4 (
+// Location: FF_X27_Y20_N53
+dffeas \soc_inst|m0_1|u_logic|Qrp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fwj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qrp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fwj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fwj2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Duuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fwj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fwj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .lut_mask = 64'h00000000000C000A;
-defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qrp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qrp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N29
-dffeas \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE (
+// Location: FF_X21_Y18_N20
+dffeas \soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y12_N56
-dffeas \soc_inst|m0_1|u_logic|Dtj2z4 (
+// Location: LABCELL_X27_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o~4_combout  = ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y18_N14
+dffeas \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dtj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dtj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dtj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~3 (
+// Location: MLABCELL_X21_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G10xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duuwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Dtj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Dtj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Dtj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|G10xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pcd3z4~q  & ( \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Mcc3z4~q  
+// & \soc_inst|m0_1|u_logic|Vac3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pcd3z4~q  & ( !\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Mcc3z4~q  & \soc_inst|m0_1|u_logic|Vac3z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Pcd3z4~q  & ( !\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Mcc3z4~q  & (\soc_inst|m0_1|u_logic|Vac3z4~q  & ((\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q 
+// )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dtj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G10xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .lut_mask = 64'h0030002000000020;
-defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G10xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G10xx4~0 .lut_mask = 64'h0007000500010000;
+defparam \soc_inst|m0_1|u_logic|G10xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4 (
+// Location: MLABCELL_X21_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G10xx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Duuwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duuwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Duuwx4~0_combout  & !\soc_inst|m0_1|u_logic|Duuwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|G10xx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ztc3z4~q  & ( (\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G10xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G10xx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duuwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duuwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Duuwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y9_N58
-dffeas \soc_inst|m0_1|u_logic|Rvu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rvu2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rvu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G10xx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G10xx4~1 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|G10xx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~3 (
+// Location: MLABCELL_X21_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cawwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rvu2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ejm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|I90xx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mcc3z4~q ) # (!\soc_inst|m0_1|u_logic|Vac3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rvu2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ejm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cawwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .lut_mask = 64'h0000000030002020;
-defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y9_N53
-dffeas \soc_inst|m0_1|u_logic|Unm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Unm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Unm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Unm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I90xx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~1 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|I90xx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gmm2z4~feeder (
+// Location: LABCELL_X22_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gmm2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|I90xx4~2_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~1_combout  & ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gmm2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gmm2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gmm2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Gmm2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~2 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|I90xx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y9_N16
-dffeas \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE (
+// Location: FF_X21_Y18_N52
+dffeas \soc_inst|m0_1|u_logic|Bec3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gmm2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Bec3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bec3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bec3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cawwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Unm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Unm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cawwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y13_N2
+dffeas \soc_inst|m0_1|u_logic|Okn2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Okn2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .lut_mask = 64'h00000000000C000A;
-defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Okn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Okn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N31
-dffeas \soc_inst|m0_1|u_logic|Ii63z4 (
+// Location: FF_X30_Y11_N29
+dffeas \soc_inst|m0_1|u_logic|X563z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ii63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X563z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ii63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ii63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X563z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X563z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N14
-dffeas \soc_inst|m0_1|u_logic|Skm2z4 (
+// Location: FF_X25_Y13_N22
+dffeas \soc_inst|m0_1|u_logic|Wa03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Skm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wa03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Skm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wa03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wa03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cawwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ii63z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Skm2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ii63z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Skm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cawwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y11_N53
+dffeas \soc_inst|m0_1|u_logic|Fn33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fn33z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .lut_mask = 64'h00C000A000000000;
-defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fn33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N40
-dffeas \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE (
+// Location: FF_X25_Y13_N14
+dffeas \soc_inst|m0_1|u_logic|Q713z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Q713z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q713z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q713z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y6_N31
-dffeas \soc_inst|m0_1|u_logic|Rr73z4 (
+// Location: FF_X29_Y14_N52
+dffeas \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rr73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rr73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rr73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~2 (
+// Location: MLABCELL_X34_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K4mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cawwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rr73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|K4mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rr73z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cawwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K4mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .lut_mask = 64'h0000440400004000;
-defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .lut_mask = 64'hF000F000F555F555;
+defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4 (
+// Location: LABCELL_X29_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K4mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cawwx4~combout  = ( !\soc_inst|m0_1|u_logic|Cawwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cawwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Cawwx4~3_combout  & !\soc_inst|m0_1|u_logic|Cawwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|K4mvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|K4mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # ((\soc_inst|m0_1|u_logic|J4x2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fvovx4~combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|J4x2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cawwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cawwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cawwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cawwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K4mvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cawwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cawwx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|Cawwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .lut_mask = 64'hC8FAC8FA00000000;
+defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jiowx4~0 (
+// Location: FF_X29_Y14_N53
+dffeas \soc_inst|m0_1|u_logic|Jw93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jw93z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jw93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wd23z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jiowx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Duuwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cawwx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Duuwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Wd23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wd23z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wd23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wd23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wd23z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y12_N41
+dffeas \soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wd23z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sh5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Q713z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fn33z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Q713z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fn33z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Jw93z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jw93z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fn33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q713z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .lut_mask = 64'hF0FFF000CCAACCAA;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y7_N19
-dffeas \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE (
+// Location: FF_X30_Y11_N32
+dffeas \soc_inst|m0_1|u_logic|Cmn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cmn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cmn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cmn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y5_N31
-dffeas \soc_inst|m0_1|u_logic|Fxu2z4 (
+// Location: FF_X25_Y12_N26
+dffeas \soc_inst|m0_1|u_logic|Ow43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fxu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ow43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fxu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fxu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ow43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~3 (
+// Location: LABCELL_X30_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Saqwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fxu2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fxu2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Sh5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ow43z4~q  & ( (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cmn2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Ow43z4~q  & 
+// ( ((!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cmn2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fxu2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cmn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ow43z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Saqwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .lut_mask = 64'h0045004000000000;
-defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .lut_mask = 64'hA0FFA0FFA000A000;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sh5wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// (\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (((\soc_inst|m0_1|u_logic|Sh5wx4~2_combout )))) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Wa03z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wa03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .lut_mask = 64'h000A0080AA0AAA80;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y7_N40
-dffeas \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE (
+// Location: FF_X25_Y12_N5
+dffeas \soc_inst|m0_1|u_logic|Vu93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -35758,173 +35299,150 @@ dffeas \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Vu93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X50_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rro2z4~feeder (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rro2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rro2z4~feeder_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rro2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rro2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Rro2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vu93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vu93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y6_N40
-dffeas \soc_inst|m0_1|u_logic|Rro2z4 (
+// Location: FF_X28_Y11_N55
+dffeas \soc_inst|m0_1|u_logic|Psv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rro2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rro2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Psv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rro2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rro2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Psv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~1 (
+// Location: LABCELL_X22_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhn2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Saqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Rro2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mhn2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rro2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Saqwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhn2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .lut_mask = 64'h0000000000005410;
-defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhn2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhn2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Mhn2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y7_N53
-dffeas \soc_inst|m0_1|u_logic|Wnt2z4 (
+// Location: FF_X22_Y8_N10
+dffeas \soc_inst|m0_1|u_logic|Mhn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mhn2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wnt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mhn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wnt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wnt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mhn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mhn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~2 (
+// Location: MLABCELL_X25_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Saqwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ft73z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wnt2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Q1ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mhn2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yfn2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Vu93z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mhn2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yfn2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Vu93z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Mhn2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Psv2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mhn2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Psv2z4~q ) # (!\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wnt2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ft73z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vu93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yfn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Psv2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mhn2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Saqwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .lut_mask = 64'h000A0000000C0000;
-defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .lut_mask = 64'hFFF000F0CCAACCAA;
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj63z4~feeder (
+// Location: LABCELL_X19_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Po83z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wj63z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Po83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wj63z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Po83z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj63z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wj63z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Wj63z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Po83z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Po83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Po83z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X52_Y7_N37
-dffeas \soc_inst|m0_1|u_logic|Wj63z4 (
+// Location: FF_X19_Y12_N56
+dffeas \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wj63z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Po83z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wj63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wj63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y8_N59
-dffeas \soc_inst|m0_1|u_logic|Vuo2z4 (
+// Location: FF_X25_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -35932,814 +35450,906 @@ dffeas \soc_inst|m0_1|u_logic|Vuo2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vuo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vuo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vuo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y7_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~0 (
+// Location: FF_X28_Y11_N49
+dffeas \soc_inst|m0_1|u_logic|Gju2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gju2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gju2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gju2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gf73z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Saqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Vuo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wj63z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Vuo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wj63z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Gf73z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wj63z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vuo2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Saqwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gf73z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .lut_mask = 64'h0000A08000000080;
-defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gf73z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gf73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Gf73z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4 (
+// Location: FF_X19_Y12_N31
+dffeas \soc_inst|m0_1|u_logic|Gf73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Gf73z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gf73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gf73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Saqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Saqwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Saqwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Saqwx4~3_combout  & !\soc_inst|m0_1|u_logic|Saqwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Q1ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gju2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gf73z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Saqwx4~3_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Saqwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Saqwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Saqwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gju2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gf73z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Saqwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Saqwx4 .lut_mask = 64'hAA00000000000000;
-defparam \soc_inst|m0_1|u_logic|Saqwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .lut_mask = 64'hCCCCFF00F0F0AAAA;
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kepwx4~0 (
+// Location: MLABCELL_X25_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kepwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Saqwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Q1ywx4~combout  = ( \soc_inst|m0_1|u_logic|Q1ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q1ywx4~1_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Q1ywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Q1ywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Q1ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q1ywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Q1ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .lut_mask = 64'h00FF00FF33333333;
-defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4 .lut_mask = 64'h0000000F0F000F0F;
+defparam \soc_inst|m0_1|u_logic|Q1ywx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kepwx4~1 (
+// Location: MLABCELL_X25_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kepwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jiowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Jiowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Jiowx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sh5wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Q1ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Okn2z4~q  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X563z4~q )))) # (\soc_inst|m0_1|u_logic|Okn2z4~q  & (((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout )) # (\soc_inst|m0_1|u_logic|X563z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Okn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|X563z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sh5wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .lut_mask = 64'h0000F0F00F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .lut_mask = 64'hF531000000000000;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qmdwx4~0 (
+// Location: LABCELL_X27_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[2] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Bdwwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bdwwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o [2] = ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o [2]),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .lut_mask = 64'h0F0F0F0F0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmdwx4~0 (
+// Location: MLABCELL_X21_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bec3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ylbwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ylbwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Bec3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Bec3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( \soc_inst|m0_1|u_logic|Bec3z4~q  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .lut_mask = 64'hF000F000F0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .lut_mask = 64'h00FF00FF50FA50FA;
+defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmdwx4~1 (
+// Location: FF_X21_Y18_N53
+dffeas \soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ckuvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xmdwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qmdwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ckuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Cam2z4~q  & !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .lut_mask = 64'h0000400000000000;
+defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7ewx4~0 (
+// Location: MLABCELL_X25_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F2ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J7ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Kepwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout  & (\soc_inst|m0_1|u_logic|Kepwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Xuxwx4~combout  & (\soc_inst|m0_1|u_logic|Kepwx4~1_combout )))))) ) )
+// \soc_inst|m0_1|u_logic|F2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Pxb3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) 
+// # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( ((\soc_inst|m0_1|u_logic|Pxb3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( (\soc_inst|m0_1|u_logic|Pxb3z4~q  & !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( \soc_inst|m0_1|u_logic|Pxb3z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .lut_mask = 64'h0F0F1F0E3F0C2F0D;
-defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .lut_mask = 64'h555555004F4F4F00;
+defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y14_N49
-dffeas \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE (
+// Location: FF_X25_Y18_N2
+dffeas \soc_inst|m0_1|u_logic|Pxb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Pxb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X22_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2uvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|I2uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( (\soc_inst|m0_1|u_logic|T2owx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lz93z4~q  & \soc_inst|m0_1|u_logic|K3l2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .lut_mask = 64'h0404000000000000;
-defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pxb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pxb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X23_Y10_N13
-dffeas \soc_inst|m0_1|u_logic|B1a3z4 (
+// Location: FF_X21_Y18_N5
+dffeas \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B1a3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B1a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~0 (
+// Location: LABCELL_X24_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pguvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Repwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B1a3z4~q  & ( \soc_inst|m0_1|u_logic|Mjl2z4~q  & ( (\soc_inst|m0_1|u_logic|Kop2z4~q  & (!\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|J6i2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1a3z4~q  & ( \soc_inst|m0_1|u_logic|Mjl2z4~q  & ( (\soc_inst|m0_1|u_logic|Kop2z4~q  & (!\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|J6i2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B1a3z4~q  & ( !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Kop2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Kop2z4~q  & (((\soc_inst|m0_1|u_logic|J6i2z4~q  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1a3z4~q  & ( !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Lz93z4~q  & ((!\soc_inst|m0_1|u_logic|Kop2z4~q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Kop2z4~q  & (\soc_inst|m0_1|u_logic|J6i2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Pguvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Trq2z4~q  & ( (!\soc_inst|m0_1|u_logic|G0w2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|R1w2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Repwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Repwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Repwx4~0 .lut_mask = 64'h0120052000040004;
-defparam \soc_inst|m0_1|u_logic|Repwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .lut_mask = 64'h0000000080000000;
+defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y11_N44
-dffeas \soc_inst|m0_1|u_logic|Jxs2z4 (
+// Location: MLABCELL_X25_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout ) # 
+// ((\soc_inst|m0_1|u_logic|D9ovx4~combout ) # (\soc_inst|m0_1|u_logic|hwdata_o~20_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hub3z4~q  & ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & \soc_inst|m0_1|u_logic|D9ovx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yz4wx4~combout ) # 
+// ((\soc_inst|m0_1|u_logic|D9ovx4~combout ) # (\soc_inst|m0_1|u_logic|hwdata_o~20_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hub3z4~q  & ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & 
+// \soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .lut_mask = 64'h00F0CFFF00A08AAA;
+defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y18_N20
+dffeas \soc_inst|m0_1|u_logic|Hub3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hub3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jxs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jxs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hub3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hub3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y12_N49
-dffeas \soc_inst|m0_1|u_logic|Aqp2z4 (
+// Location: FF_X27_Y9_N35
+dffeas \soc_inst|m0_1|u_logic|L733z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|L733z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aqp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aqp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L733z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L733z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~1 (
+// Location: LABCELL_X36_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dq53z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Repwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Aqp2z4~q  & ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Repwx4~0_combout  & (!\soc_inst|m0_1|u_logic|K3uvx4~0_combout  & !\soc_inst|m0_1|u_logic|Jxs2z4~q )) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Aqp2z4~q  & ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Repwx4~0_combout  & !\soc_inst|m0_1|u_logic|Jxs2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aqp2z4~q  & ( !\soc_inst|m0_1|u_logic|E0uvx4~combout  & 
-// ( (!\soc_inst|m0_1|u_logic|Repwx4~0_combout  & !\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aqp2z4~q  & ( !\soc_inst|m0_1|u_logic|E0uvx4~combout  & ( !\soc_inst|m0_1|u_logic|Repwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Dq53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J70wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Repwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Repwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dq53z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Repwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Repwx4~1 .lut_mask = 64'hAAAA8888A0A08080;
-defparam \soc_inst|m0_1|u_logic|Repwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dq53z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dq53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Dq53z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y14_N37
-dffeas \soc_inst|m0_1|u_logic|Lns2z4 (
+// Location: FF_X36_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dq53z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lns2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lns2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lns2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L0uvx4 (
+// Location: LABCELL_X27_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L0uvx4~combout  = ( \soc_inst|m0_1|u_logic|K7pwx4~combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L733z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L733z4~q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L733z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L0uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L0uvx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|L0uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .lut_mask = 64'h0020003000200000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y14_N8
-dffeas \soc_inst|m0_1|u_logic|Q6l2z4 (
+// Location: FF_X35_Y9_N1
+dffeas \soc_inst|m0_1|u_logic|R6n2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q6l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|R6n2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q6l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R6n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R6n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~2 (
+// Location: LABCELL_X27_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T83xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Repwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (\soc_inst|m0_1|u_logic|Repwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Lns2z4~q  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Q6l2z4~q )))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (\soc_inst|m0_1|u_logic|Repwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Q6l2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|T83xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R6n2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|M1j2z4~q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Repwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R6n2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Repwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T83xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Repwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Repwx4~2 .lut_mask = 64'h3322332230203020;
-defparam \soc_inst|m0_1|u_logic|Repwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T83xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T83xx4~0 .lut_mask = 64'h0080000000000000;
+defparam \soc_inst|m0_1|u_logic|T83xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ncpwx4~0 (
+// Location: FF_X28_Y7_N31
+dffeas \soc_inst|m0_1|u_logic|N3n2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|N3n2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N3n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N3n2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y9_N11
+dffeas \soc_inst|m0_1|u_logic|Cy13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cy13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cy13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ncpwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Repwx4~2_combout ) # ((\soc_inst|m0_1|u_logic|N1uvx4~combout  & \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Cy13z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|N3n2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Repwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|N3n2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cy13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ncpwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .lut_mask = 64'h00000000FF05FF05;
-defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .lut_mask = 64'h0AC0000000000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9iwx4~0 (
+// Location: LABCELL_X36_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~57 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A9iwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[30]~34_combout  & ( (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout  & (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|J7ewx4~0_combout )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[30]~34_combout  & ( (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|J7ewx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Add3~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Foe3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~62  ))
+// \soc_inst|m0_1|u_logic|Add3~58  = CARRY(( !\soc_inst|m0_1|u_logic|Foe3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~62  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~62 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~57_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~58 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .lut_mask = 64'hC4C4C4C4C400C400;
-defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~57 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~57 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y5_N44
-dffeas \soc_inst|m0_1|u_logic|Mof3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mof3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X36_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~101 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~58  ))
+// \soc_inst|m0_1|u_logic|Add3~102  = CARRY(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~58  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~58 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~101_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~102 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mof3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mof3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~101 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~101 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~101 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y5_N59
-dffeas \soc_inst|m0_1|u_logic|Xmf3z4 (
+// Location: FF_X36_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|C5n2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xmf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|C5n2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xmf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C5n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C5n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~3 (
+// Location: LABCELL_X36_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icxwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Xmf3z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mof3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xmf3z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Mof3z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Wj82z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|C5n2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mof3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xmf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|C5n2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icxwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wj82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .lut_mask = 64'h000D000800000000;
-defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .lut_mask = 64'h0000000000008000;
+defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N49
-dffeas \soc_inst|m0_1|u_logic|Bqf3z4 (
+// Location: FF_X36_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Dq53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dq53z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bqf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dq53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bqf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bqf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dq53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N11
-dffeas \soc_inst|m0_1|u_logic|Ldf3z4 (
+// Location: FF_X34_Y9_N35
+dffeas \soc_inst|m0_1|u_logic|Ug43z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ldf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ug43z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ldf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ldf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ug43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug43z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~2 (
+// Location: LABCELL_X36_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icxwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Bqf3z4~q  & ( \soc_inst|m0_1|u_logic|Ldf3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bqf3z4~q  & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bqf3z4~q  & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zh82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Ug43z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Dq53z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Ug43z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Dq53z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bqf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ldf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dq53z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ug43z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icxwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .lut_mask = 64'h1010001010000000;
-defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y5_N41
-dffeas \soc_inst|m0_1|u_logic|Aff3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aff3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aff3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aff3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .lut_mask = 64'h0054000000100000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~0 (
+// Location: LABCELL_X27_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icxwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fpi2z4~q  & ( \soc_inst|m0_1|u_logic|Aff3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fpi2z4~q  & ( !\soc_inst|m0_1|u_logic|Aff3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fpi2z4~q  & ( !\soc_inst|m0_1|u_logic|Aff3z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zh82z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Cy13z4~q  & ( \soc_inst|m0_1|u_logic|L733z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cy13z4~q  & ( !\soc_inst|m0_1|u_logic|L733z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cy13z4~q  & ( !\soc_inst|m0_1|u_logic|L733z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fpi2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aff3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cy13z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|L733z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh82z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .lut_mask = 64'h3000100020000000;
-defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .lut_mask = 64'h5000100040000000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N10
-dffeas \soc_inst|m0_1|u_logic|Wbf3z4 (
+// Location: FF_X25_Y9_N58
+dffeas \soc_inst|m0_1|u_logic|Vzz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wbf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vzz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wbf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wbf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vzz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vzz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N43
-dffeas \soc_inst|m0_1|u_logic|Orj2z4 (
+// Location: FF_X25_Y9_N11
+dffeas \soc_inst|m0_1|u_logic|Pw03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Orj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pw03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Orj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Orj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pw03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pw03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~1 (
+// Location: MLABCELL_X25_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icxwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wbf3z4~q  & ( \soc_inst|m0_1|u_logic|Orj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wbf3z4~q  & ( !\soc_inst|m0_1|u_logic|Orj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wbf3z4~q  & ( !\soc_inst|m0_1|u_logic|Orj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zh82z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Vzz2z4~q  & ( \soc_inst|m0_1|u_logic|Pw03z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vzz2z4~q  & ( !\soc_inst|m0_1|u_logic|Pw03z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzz2z4~q  & ( !\soc_inst|m0_1|u_logic|Pw03z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wbf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Orj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vzz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pw03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icxwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh82z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .lut_mask = 64'h0005000400010000;
-defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .lut_mask = 64'h0C00080004000000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4 (
+// Location: LABCELL_X36_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icxwx4~combout  = ( !\soc_inst|m0_1|u_logic|Icxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Icxwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Icxwx4~3_combout  & !\soc_inst|m0_1|u_logic|Icxwx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Zh82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Zh82z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zh82z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wj82z4~0_combout  & (!\soc_inst|m0_1|u_logic|Zh82z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|R6n2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Icxwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Icxwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Icxwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Icxwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wj82z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R6n2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zh82z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zh82z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zh82z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh82z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icxwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icxwx4 .lut_mask = 64'hC0C0000000000000;
-defparam \soc_inst|m0_1|u_logic|Icxwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y5_N43
-dffeas \soc_inst|m0_1|u_logic|Md93z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Md93z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N90wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N90wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Zfh3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|G4qwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Llq2z4~q  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Llq2z4~q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zh82z4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Md93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N90wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N90wx4~0 .lut_mask = 64'hF0F0DDDDF0F0DD88;
+defparam \soc_inst|m0_1|u_logic|N90wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~1 (
+// Location: MLABCELL_X34_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G4qwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|J0n2z4~q  & ( (!\soc_inst|m0_1|u_logic|Md93z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Md93z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|E5awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Md93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J0n2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G4qwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E5awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .lut_mask = 64'h0000000E00000002;
-defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E5awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E5awx4~0 .lut_mask = 64'hAFAFFAFA00000000;
+defparam \soc_inst|m0_1|u_logic|E5awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N35
-dffeas \soc_inst|m0_1|u_logic|Vcv2z4 (
+// Location: FF_X28_Y7_N2
+dffeas \soc_inst|m0_1|u_logic|V883z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
 	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
@@ -36747,43 +36357,36 @@ dffeas \soc_inst|m0_1|u_logic|Vcv2z4 (
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vcv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|V883z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vcv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vcv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V883z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V883z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|G4qwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Y1n2z4~q  & ( \soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y1n2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y1n2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Y1n2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vcv2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G4qwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X29_Y9_N17
+dffeas \soc_inst|m0_1|u_logic|Md93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Md93z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .lut_mask = 64'h000A000200080000;
-defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Md93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Md93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y8_N28
+// Location: FF_X28_Y7_N56
 dffeas \soc_inst|m0_1|u_logic|Mz63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -36802,33 +36405,34 @@ defparam \soc_inst|m0_1|u_logic|Mz63z4 .is_wysiwyg = "true";
 defparam \soc_inst|m0_1|u_logic|Mz63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~0 (
+// Location: MLABCELL_X28_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G4qwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|N3n2z4~q  & ( \soc_inst|m0_1|u_logic|Mz63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N3n2z4~q  & ( !\soc_inst|m0_1|u_logic|Mz63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N3n2z4~q  & ( !\soc_inst|m0_1|u_logic|Mz63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Mz63z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Md93z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mz63z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Md93z4~q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mz63z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|N3n2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mz63z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Md93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mz63z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G4qwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .lut_mask = 64'h5000100040000000;
-defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .lut_mask = 64'h000A000000040004;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y8_N47
+// Location: FF_X29_Y9_N25
 dffeas \soc_inst|m0_1|u_logic|M3u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -36847,307 +36451,480 @@ defparam \soc_inst|m0_1|u_logic|M3u2z4 .is_wysiwyg = "true";
 defparam \soc_inst|m0_1|u_logic|M3u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~2 (
+// Location: FF_X27_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|Vcv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vcv2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vcv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vcv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G4qwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|M3u2z4~q  & ( \soc_inst|m0_1|u_logic|V883z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|M3u2z4~q  & ( !\soc_inst|m0_1|u_logic|V883z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M3u2z4~q  & ( !\soc_inst|m0_1|u_logic|V883z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|M3u2z4~q  & ( \soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|M3u2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M3u2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datae(!\soc_inst|m0_1|u_logic|M3u2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|V883z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vcv2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G4qwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .lut_mask = 64'h0300010002000000;
-defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .lut_mask = 64'h0300010002000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4 (
+// Location: MLABCELL_X28_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G4qwx4~combout  = ( !\soc_inst|m0_1|u_logic|G4qwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G4qwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|G4qwx4~1_combout  & !\soc_inst|m0_1|u_logic|G4qwx4~3_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Wa0wx4~7_combout  & ( \soc_inst|m0_1|u_logic|C5n2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wa0wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|V883z4~q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wa0wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|C5n2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wa0wx4~6_combout  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|V883z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|G4qwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G4qwx4~3_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|G4qwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|V883z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wa0wx4~6_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C5n2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4qwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G4qwx4 .lut_mask = 64'hC0C0000000000000;
-defparam \soc_inst|m0_1|u_logic|G4qwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .lut_mask = 64'hC4000000C4C40000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asdwx4~0 (
+// Location: LABCELL_X33_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5awx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Asdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Icxwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Icxwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|E5awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|E5awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( 
+// \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|E5awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|E5awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|E5awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E5awx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E5awx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E5awx4~1 .lut_mask = 64'h0455045504555555;
+defparam \soc_inst|m0_1|u_logic|E5awx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nvdwx4~0 (
+// Location: FF_X37_Y9_N55
+dffeas \soc_inst|m0_1|u_logic|K1z2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K1z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K1z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|U6awx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|K1z2z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .lut_mask = 64'h00FF00FFF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6awx4~0 .lut_mask = 64'hF0FFF0FF00000000;
+defparam \soc_inst|m0_1|u_logic|U6awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asdwx4~1 (
+// Location: FF_X24_Y9_N23
+dffeas \soc_inst|m0_1|u_logic|Ka83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ka83z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ka83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ka83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Asdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Asdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Asdwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kev2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B5u2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B5u2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kev2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .lut_mask = 64'h00550055AAFFAAFF;
-defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .lut_mask = 64'h0000000000A000C0;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N19
-dffeas \soc_inst|m0_1|u_logic|Lpt2z4 (
+// Location: FF_X24_Y7_N34
+dffeas \soc_inst|m0_1|u_logic|Ebh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lpt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ebh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lpt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lpt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ebh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ebh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N13
-dffeas \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE (
+// Location: FF_X23_Y8_N2
+dffeas \soc_inst|m0_1|u_logic|B173z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B173z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B173z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B173z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Bf93z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B173z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|B173z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bf93z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .lut_mask = 64'h0000000008080300;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Ka83z4~q  & (!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ebh3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ebh3z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ka83z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ebh3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .lut_mask = 64'hCC0C440400000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6awx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|U6awx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6awx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6awx4~1 .lut_mask = 64'h1511151115115555;
+defparam \soc_inst|m0_1|u_logic|U6awx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~2 (
+// Location: MLABCELL_X34_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eruwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Lpt2z4~q  & ( \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q 
-//  & !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lpt2z4~q  & ( !\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lpt2z4~q  & ( !\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|M9awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lpt2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eruwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M9awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .lut_mask = 64'h1010001010000000;
-defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M9awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M9awx4~0 .lut_mask = 64'hFFFF0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|M9awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N55
-dffeas \soc_inst|m0_1|u_logic|Jw83z4 (
+// Location: FF_X31_Y6_N2
+dffeas \soc_inst|m0_1|u_logic|Rdg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jw83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rdg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jw83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jw83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rdg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rdg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y7_N7
-dffeas \soc_inst|m0_1|u_logic|Fio2z4 (
+// Location: FF_X29_Y7_N59
+dffeas \soc_inst|m0_1|u_logic|Gfg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fio2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gfg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fio2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fio2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gfg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gfg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Eruwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Jw83z4~q  & ( \soc_inst|m0_1|u_logic|Fio2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jw83z4~q  & ( !\soc_inst|m0_1|u_logic|Fio2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jw83z4~q  & ( !\soc_inst|m0_1|u_logic|Fio2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Jw83z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fio2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eruwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y8_N59
+dffeas \soc_inst|m0_1|u_logic|Nag3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nag3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .lut_mask = 64'h0005000400010000;
-defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nag3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nag3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ujo2z4~feeder (
+// Location: LABCELL_X30_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ujo2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fdzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Hk0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Gfg3z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (((!\soc_inst|m0_1|u_logic|Nag3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gfg3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nag3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ujo2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ujo2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ujo2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ujo2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .lut_mask = 64'h0000000000008830;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y6_N41
-dffeas \soc_inst|m0_1|u_logic|Ujo2z4 (
+// Location: FF_X31_Y8_N46
+dffeas \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ujo2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ujo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ujo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ujo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y6_N47
-dffeas \soc_inst|m0_1|u_logic|Uyu2z4 (
+// Location: FF_X30_Y7_N32
+dffeas \soc_inst|m0_1|u_logic|Hqg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hqg3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hqg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hqg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X30_Y8_N8
+dffeas \soc_inst|m0_1|u_logic|Dng3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -37155,806 +36932,890 @@ dffeas \soc_inst|m0_1|u_logic|Uyu2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uyu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dng3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uyu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uyu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dng3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dng3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~3 (
+// Location: LABCELL_X31_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eruwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Ujo2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Uyu2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Hqg3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Dng3z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ujo2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uyu2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hqg3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dng3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eruwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .lut_mask = 64'h0000445000000000;
-defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .lut_mask = 64'h0000000051400000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll63z4~feeder (
+// Location: LABCELL_X31_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ll63z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fdzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Hk0wx4~7_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~6_combout  & (\soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rdg3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rdg3z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rdg3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hk0wx4~6_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ll63z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll63z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ll63z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ll63z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .lut_mask = 64'hC4C4000000C40000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y7_N38
-dffeas \soc_inst|m0_1|u_logic|Ll63z4 (
+// Location: FF_X31_Y6_N22
+dffeas \soc_inst|m0_1|u_logic|Kig3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ll63z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ll63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kig3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ll63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kig3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kig3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y4_N40
-dffeas \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE (
+// Location: FF_X27_Y8_N25
+dffeas \soc_inst|m0_1|u_logic|Ccg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jlo2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ccg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X48_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Eruwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ll63z4~q  & ( \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll63z4~q  & ( !\soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll63z4~q  & ( !\soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ll63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eruwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .lut_mask = 64'h5000400010000000;
-defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ccg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ccg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4 (
+// Location: LABCELL_X31_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eruwx4~combout  = ( !\soc_inst|m0_1|u_logic|Eruwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Eruwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Eruwx4~1_combout  & !\soc_inst|m0_1|u_logic|Eruwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ccg3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kig3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eruwx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Eruwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eruwx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Eruwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kig3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ccg3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eruwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eruwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Eruwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .lut_mask = 64'h00000088000000A0;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N19
-dffeas \soc_inst|m0_1|u_logic|Kjk2z4 (
+// Location: FF_X30_Y6_N55
+dffeas \soc_inst|m0_1|u_logic|Olg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kjk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Olg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kjk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kjk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Olg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Olg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N40
-dffeas \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Wrg3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Olg3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Olg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wrg3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .lut_mask = 64'h00008800A0000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N7
-dffeas \soc_inst|m0_1|u_logic|Zkk2z4 (
+// Location: FF_X30_Y6_N1
+dffeas \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zkk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zkk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N49
-dffeas \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE (
+// Location: FF_X31_Y7_N16
+dffeas \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4~0 (
+// Location: LABCELL_X31_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F8wwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zkk2z4~q  & ( \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Kjk2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zkk2z4~q  & ( \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Kjk2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Zkk2z4~q  & ( !\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Kjk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zkk2z4~q  & ( !\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Kjk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kjk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zkk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F8wwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .lut_mask = 64'h1D001D331DCC1DFF;
-defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .lut_mask = 64'h0404050000000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N38
-dffeas \soc_inst|m0_1|u_logic|Rht2z4 (
+// Location: FF_X31_Y7_N10
+dffeas \soc_inst|m0_1|u_logic|Eyg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rht2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Eyg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rht2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rht2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eyg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eyg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xi2xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xi2xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Eyg3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Eyg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .lut_mask = 64'h0080000000000000;
+defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rd63z4~feeder (
+// Location: LABCELL_X33_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avg3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rd63z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Avg3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Bh0wx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rd63z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Avg3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rd63z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rd63z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Rd63z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Avg3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avg3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Avg3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y7_N40
-dffeas \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE (
+// Location: FF_X33_Y6_N29
+dffeas \soc_inst|m0_1|u_logic|Avg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rd63z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Avg3z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Avg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Avg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Avg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N25
-dffeas \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE (
+// Location: FF_X31_Y7_N1
+dffeas \soc_inst|m0_1|u_logic|Ltg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ltg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ltg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ltg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N56
-dffeas \soc_inst|m0_1|u_logic|An73z4 (
+// Location: LABCELL_X33_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ltg3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Avg3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Avg3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ltg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .lut_mask = 64'h00A0000000C00000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y7_N7
+dffeas \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|An73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|An73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|An73z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X46_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|F8wwx4~1_combout  = ( \soc_inst|m0_1|u_logic|An73z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|An73z4~q  
-// & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|An73z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rht2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|An73z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rht2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rht2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|An73z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F8wwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .lut_mask = 64'h05F505F530303F3F;
-defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4 (
+// Location: LABCELL_X36_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~61 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F8wwx4~combout  = ( \soc_inst|m0_1|u_logic|F8wwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|F8wwx4~0_combout  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|F8wwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|F8wwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Add3~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~66  ))
+// \soc_inst|m0_1|u_logic|Add3~62  = CARRY(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~66  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|F8wwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~66 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F8wwx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~61_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~62 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8wwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F8wwx4 .lut_mask = 64'h00FA00FA00500050;
-defparam \soc_inst|m0_1|u_logic|F8wwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~61 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~61 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Beowx4~0 (
+// Location: LABCELL_X33_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oaawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Beowx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Eruwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Oaawx4~0_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oaawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Beowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Beowx4~0 .lut_mask = 64'hFF00FF000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Beowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .lut_mask = 64'hF000F000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N31
-dffeas \soc_inst|m0_1|u_logic|V0k2z4 (
+// Location: FF_X34_Y7_N50
+dffeas \soc_inst|m0_1|u_logic|Ht53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V0k2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ht53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V0k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V0k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ht53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ht53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N17
-dffeas \soc_inst|m0_1|u_logic|K2k2z4 (
+// Location: FF_X33_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|Pa33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K2k2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pa33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K2k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K2k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pa33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pa33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y6_N49
-dffeas \soc_inst|m0_1|u_logic|Y1v2z4 (
+// Location: MLABCELL_X34_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ht53z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Pa33z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ht53z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pa33z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .lut_mask = 64'h00000C0000000808;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y7_N28
+dffeas \soc_inst|m0_1|u_logic|Yj43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y1v2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Yj43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y1v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yj43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yj43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y6_N16
-dffeas \soc_inst|m0_1|u_logic|Nz83z4 (
+// Location: FF_X30_Y7_N47
+dffeas \soc_inst|m0_1|u_logic|A9p2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nz83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|A9p2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nz83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nz83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|A9p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A9p2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y4_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4~0 (
+// Location: MLABCELL_X34_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Feqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nz83z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|V0k2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Y1v2z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|K2k2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yj43z4~q )) # 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|A9p2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V0k2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|K2k2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y1v2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nz83z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yj43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|A9p2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Feqwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .lut_mask = 64'h33330F0F555500FF;
-defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .lut_mask = 64'h0000000022300000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y6_N37
-dffeas \soc_inst|m0_1|u_logic|Pst2z4 (
+// Location: FF_X34_Y7_N20
+dffeas \soc_inst|m0_1|u_logic|Ixh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pst2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ixh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pst2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pst2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ixh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N41
-dffeas \soc_inst|m0_1|u_logic|Z3k2z4 (
+// Location: FF_X35_Y9_N8
+dffeas \soc_inst|m0_1|u_logic|Tvh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z3k2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tvh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z3k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z3k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tvh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N2
-dffeas \soc_inst|m0_1|u_logic|Po63z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po63z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Ixh3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Tvh3z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ixh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tvh3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .lut_mask = 64'h0000B80000000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y6_N43
-dffeas \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE (
+// Location: FF_X35_Y9_N43
+dffeas \soc_inst|m0_1|u_logic|M0i3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|M0i3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M0i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M0i3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4~1 (
+// Location: LABCELL_X35_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nr2xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Feqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Po63z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pst2z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Z3k2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Nr2xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|M0i3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pst2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z3k2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Po63z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M0i3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Feqwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .lut_mask = 64'h333355550F0F00FF;
-defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4 (
+// Location: MLABCELL_X34_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Feqwx4~combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Feqwx4~0_combout  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Feqwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pap2z4~q  & ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pap2z4~q  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pap2z4~q  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  $ 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Feqwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Feqwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pap2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Feqwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Feqwx4 .lut_mask = 64'h0F000F000A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|Feqwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .lut_mask = 64'h8020800000200000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y7_N26
-dffeas \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE (
+// Location: FF_X33_Y7_N43
+dffeas \soc_inst|m0_1|u_logic|G123z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|G123z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G123z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G123z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y6_N55
-dffeas \soc_inst|m0_1|u_logic|Vgq2z4 (
+// Location: FF_X29_Y11_N52
+dffeas \soc_inst|m0_1|u_logic|Ecp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vgq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ecp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vgq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vgq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ecp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ecp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y6_N41
-dffeas \soc_inst|m0_1|u_logic|J0v2z4 (
+// Location: LABCELL_X33_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G123z4~q  & ( \soc_inst|m0_1|u_logic|Ecp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G123z4~q  & ( !\soc_inst|m0_1|u_logic|Ecp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G123z4~q  & ( !\soc_inst|m0_1|u_logic|Ecp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  $ 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|G123z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ecp2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .lut_mask = 64'h2080008020000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Nn0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Nn0wx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Nn0wx4~4_combout  & !\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Nn0wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nn0wx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Qg93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J0v2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qg93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J0v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J0v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qg93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qg93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y6_N13
-dffeas \soc_inst|m0_1|u_logic|Yx83z4 (
+// Location: FF_X27_Y10_N53
+dffeas \soc_inst|m0_1|u_logic|Q273z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yx83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Q273z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yx83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yx83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q273z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q273z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4~0 (
+// Location: LABCELL_X24_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fexwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Yx83z4~q  & ( (\soc_inst|m0_1|u_logic|J0v2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Yx83z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Vgq2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Yx83z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|J0v2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Yx83z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Vgq2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qg93z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Q273z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vgq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|J0v2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yx83z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qg93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Q273z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fexwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .lut_mask = 64'h353500F035350FFF;
-defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .lut_mask = 64'h0030000000000022;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y8_N5
-dffeas \soc_inst|m0_1|u_logic|Kiq2z4 (
+// Location: FF_X24_Y9_N55
+dffeas \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kiq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kiq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kiq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y7_N44
-dffeas \soc_inst|m0_1|u_logic|An63z4~DUPLICATE (
+// Location: FF_X35_Y9_N29
+dffeas \soc_inst|m0_1|u_logic|Xyh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Xyh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|An63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|An63z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xyh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xyh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y6_N28
-dffeas \soc_inst|m0_1|u_logic|Art2z4 (
+// Location: FF_X30_Y7_N20
+dffeas \soc_inst|m0_1|u_logic|Q6u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -37962,375 +37823,390 @@ dffeas \soc_inst|m0_1|u_logic|Art2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Art2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Q6u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Art2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Art2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q6u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y6_N19
-dffeas \soc_inst|m0_1|u_logic|Jw73z4 (
+// Location: FF_X27_Y9_N44
+dffeas \soc_inst|m0_1|u_logic|Zfv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jw73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zfv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jw73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jw73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zfv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zfv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4~1 (
+// Location: LABCELL_X27_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fexwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Art2z4~q  & ( \soc_inst|m0_1|u_logic|Jw73z4~q  & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Kiq2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Art2z4~q  & ( \soc_inst|m0_1|u_logic|Jw73z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Kiq2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Sjj2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~q ) # (\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Art2z4~q  & ( !\soc_inst|m0_1|u_logic|Jw73z4~q  
-// & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~q )) # (\soc_inst|m0_1|u_logic|Kiq2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Art2z4~q  & ( !\soc_inst|m0_1|u_logic|Jw73z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Kiq2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Q6u2z4~q  & ( \soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6u2z4~q  & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6u2z4~q  & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kiq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Art2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jw73z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Q6u2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zfv2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fexwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .lut_mask = 64'h470047CC473347FF;
-defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .lut_mask = 64'h0030001000200000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4 (
+// Location: LABCELL_X24_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fexwx4~combout  = ( \soc_inst|m0_1|u_logic|Fexwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fexwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~1_combout  
-// & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fexwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout  & (\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xyh3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xyh3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fexwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fexwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xyh3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fexwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fexwx4 .lut_mask = 64'h5555000050505050;
-defparam \soc_inst|m0_1|u_logic|Fexwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .lut_mask = 64'hAA0A220200000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zudwx4~0 (
+// Location: LABCELL_X33_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oaawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zudwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Oaawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Oaawx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( 
+// \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Oaawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .lut_mask = 64'hF0F0F0F0FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .lut_mask = 64'h1311131113113333;
+defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zudwx4~1 (
+// Location: FF_X33_Y8_N22
+dffeas \soc_inst|m0_1|u_logic|Ey03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ey03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ey03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ey03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X35_Y9_N52
+dffeas \soc_inst|m0_1|u_logic|K103z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K103z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K103z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K103z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zudwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zudwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Beowx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Zudwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Beowx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~4_combout  = ( \soc_inst|m0_1|u_logic|K103z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Ey03z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K103z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ey03z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ey03z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|K103z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .lut_mask = 64'h00AA00AA55FF55FF;
-defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~4 .lut_mask = 64'h2202200000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N17
-dffeas \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE (
+// Location: FF_X33_Y7_N5
+dffeas \soc_inst|m0_1|u_logic|Nl43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Nl43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nl43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nl43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y11_N2
-dffeas \soc_inst|m0_1|u_logic|Bus2z4 (
+// Location: FF_X30_Y7_N44
+dffeas \soc_inst|m0_1|u_logic|Arn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Arn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bus2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bus2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Arn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Arn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~0 (
+// Location: LABCELL_X33_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Avowx4~0_combout  = ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Bus2z4~q  & \soc_inst|m0_1|u_logic|E0uvx4~combout )) # (\soc_inst|m0_1|u_logic|X9n2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|K3uvx4~0_combout  
-// & ( (\soc_inst|m0_1|u_logic|Bus2z4~q  & \soc_inst|m0_1|u_logic|E0uvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nl43z4~q )) # 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Arn2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nl43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Arn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Avowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Avowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Avowx4~0 .lut_mask = 64'h0505050505FF05FF;
-defparam \soc_inst|m0_1|u_logic|Avowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~2 .lut_mask = 64'h000000000000B800;
+defparam \soc_inst|m0_1|u_logic|St0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y14_N20
-dffeas \soc_inst|m0_1|u_logic|G8n2z4 (
+// Location: FF_X33_Y7_N22
+dffeas \soc_inst|m0_1|u_logic|Ec33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G8n2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ec33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G8n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G8n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ec33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ec33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y13_N47
-dffeas \soc_inst|m0_1|u_logic|Dks2z4 (
+// Location: FF_X34_Y9_N14
+dffeas \soc_inst|m0_1|u_logic|Wu53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dks2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wu53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dks2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dks2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wu53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wu53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~1 (
+// Location: LABCELL_X33_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Avowx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Dks2z4~q  & ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|Avowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|G8n2z4~q ))) ) 
-// ) ) # ( \soc_inst|m0_1|u_logic|Dks2z4~q  & ( !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|Avowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|G8n2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dks2z4~q  & ( !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|Avowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|G8n2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wu53z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Wu53z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ec33z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wu53z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ec33z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Avowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ec33z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wu53z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Avowx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Avowx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Avowx4~1 .lut_mask = 64'hC8C8C8C8C8C80000;
-defparam \soc_inst|m0_1|u_logic|Avowx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~3 .lut_mask = 64'h00080008000A0000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Avowx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Avowx4~1_combout  & ( (\soc_inst|m0_1|u_logic|N1uvx4~combout  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Avowx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Avowx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Avowx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Avowx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y7_N49
+dffeas \soc_inst|m0_1|u_logic|Psn2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Psn2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Avowx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Avowx4~2 .lut_mask = 64'h0F0F0F0F00000505;
-defparam \soc_inst|m0_1|u_logic|Avowx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Psn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y11_N7
-dffeas \soc_inst|m0_1|u_logic|Ddi3z4 (
+// Location: FF_X24_Y9_N44
+dffeas \soc_inst|m0_1|u_logic|Df83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Df83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ddi3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ddi3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Df83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Df83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[20]~16 (
+// Location: LABCELL_X35_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1p2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q )) # (\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hk0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|D1p2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D1p2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .lut_mask = 64'h0D0D0D0D2F2F2F2F;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D1p2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D1p2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|D1p2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y10_N38
-dffeas \soc_inst|m0_1|u_logic|I1h3z4 (
+// Location: FF_X35_Y8_N31
+dffeas \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+	.d(\soc_inst|m0_1|u_logic|D1p2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I1h3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I1h3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I1h3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X50_Y8_N5
-dffeas \soc_inst|m0_1|u_logic|F473z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F473z4~q ),
+	.q(\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F473z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F473z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X52_Y8_N17
-dffeas \soc_inst|m0_1|u_logic|Fi93z4 (
+// Location: FF_X25_Y7_N8
+dffeas \soc_inst|m0_1|u_logic|Uj93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -38338,81 +38214,87 @@ dffeas \soc_inst|m0_1|u_logic|Fi93z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fi93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uj93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fi93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fi93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uj93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uj93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~6 (
+// Location: LABCELL_X24_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U573z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fi93z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|F473z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|U573z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F473z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fi93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U573z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~6 .lut_mask = 64'h000A00000000000C;
-defparam \soc_inst|m0_1|u_logic|St0wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U573z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U573z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|U573z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N34
-dffeas \soc_inst|m0_1|u_logic|Tvn2z4 (
+// Location: FF_X24_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|U573z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|U573z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tvn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U573z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tvn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U573z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U573z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X52_Y8_N58
-dffeas \soc_inst|m0_1|u_logic|Od83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Od83z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Uj93z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|U573z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uj93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U573z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~6_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Od83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Od83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .lut_mask = 64'h0050000000000044;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y7_N19
-dffeas \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE (
+// Location: FF_X30_Y7_N55
+dffeas \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -38420,18 +38302,18 @@ dffeas \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y6_N13
-dffeas \soc_inst|m0_1|u_logic|Ohv2z4 (
+// Location: FF_X25_Y7_N1
+dffeas \soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -38439,1076 +38321,1260 @@ dffeas \soc_inst|m0_1|u_logic|Ohv2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ohv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ohv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y9_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~7 (
+// Location: MLABCELL_X25_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ohv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ohv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ohv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ohv2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~7 .lut_mask = 64'h0202000202000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .lut_mask = 64'h0500010004000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~8 (
+// Location: LABCELL_X24_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|St0wx4~6_combout  & (\soc_inst|m0_1|u_logic|Od83z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tvn2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|St0wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tvn2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yw0wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Df83z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Yw0wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Df83z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|St0wx4~6_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tvn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Od83z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Df83z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yw0wx4~6_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~8 .lut_mask = 64'h8C8C008C00000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .lut_mask = 64'hBB000B0000000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4 (
+// Location: MLABCELL_X34_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gdawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~combout  = ( \soc_inst|m0_1|u_logic|St0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|St0wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|Gdawx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|W7z2z4~q )))
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gdawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|St0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .lut_mask = 64'hCC0CCC0CCC0CCC0C;
+defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[18]~13 (
+// Location: FF_X30_Y6_N11
+dffeas \soc_inst|m0_1|u_logic|Tz03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tz03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tz03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tz03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z203z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  = ( \soc_inst|m0_1|u_logic|St0wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|St0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Z203z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z203z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .lut_mask = 64'h303330333F333F33;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z203z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z203z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Z203z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y10_N31
-dffeas \soc_inst|m0_1|u_logic|Xyn2z4 (
+// Location: FF_X24_Y8_N17
+dffeas \soc_inst|m0_1|u_logic|Z203z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Z203z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z203z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z203z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z203z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Z203z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tz03z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tz03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z203z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .lut_mask = 64'h080800000A000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y7_N53
+dffeas \soc_inst|m0_1|u_logic|Zxo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xyn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zxo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xyn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xyn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zxo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zxo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~1 (
+// Location: LABCELL_X30_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ara3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~82  ))
-// \soc_inst|m0_1|u_logic|Add0~2  = CARRY(( !\soc_inst|m0_1|u_logic|Ara3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~82  ))
+// \soc_inst|m0_1|u_logic|Yw0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zxo2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|H3d3z4~q ))) # (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zxo2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zxo2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~82 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~1_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~2 ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~1 .lut_mask = 64'h000000000000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add0~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .lut_mask = 64'hA400000004000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~73 (
+// Location: MLABCELL_X28_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cn43z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xeo2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~2  ))
-// \soc_inst|m0_1|u_logic|Add0~74  = CARRY(( !\soc_inst|m0_1|u_logic|Xeo2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~2  ))
+// \soc_inst|m0_1|u_logic|Cn43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~2 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~73_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~74 ),
+	.combout(\soc_inst|m0_1|u_logic|Cn43z4~feeder_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~73 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~73 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~73 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cn43z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cn43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Cn43z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y8_N13
-dffeas \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE (
+// Location: FF_X28_Y6_N1
+dffeas \soc_inst|m0_1|u_logic|Cn43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cn43z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cn43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cn43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cn43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y8_N46
-dffeas \soc_inst|m0_1|u_logic|Sg83z4 (
+// Location: MLABCELL_X25_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kwo2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kwo2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kwo2z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kwo2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kwo2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Kwo2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y6_N19
+dffeas \soc_inst|m0_1|u_logic|Kwo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kwo2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sg83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kwo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sg83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sg83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kwo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kwo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z52xx4~0 (
+// Location: LABCELL_X29_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z52xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sg83z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kwo2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Cn43z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kwo2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kwo2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Cn43z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sg83z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cn43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kwo2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z52xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .lut_mask = 64'h00000000000000A0;
-defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .lut_mask = 64'h0400040404000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N46
-dffeas \soc_inst|m0_1|u_logic|Cao2z4 (
+// Location: FF_X29_Y6_N55
+dffeas \soc_inst|m0_1|u_logic|Td33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cao2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Td33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cao2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cao2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Td33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Td33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y8_N22
-dffeas \soc_inst|m0_1|u_logic|J773z4 (
+// Location: FF_X35_Y8_N8
+dffeas \soc_inst|m0_1|u_logic|Lw53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J773z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lw53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J773z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J773z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lw53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lw53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y9_N46
-dffeas \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE (
+// Location: LABCELL_X30_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Lw53z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Td33z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lw53z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Td33z4~q ) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Td33z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lw53z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .lut_mask = 64'h00000A0200000800;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ozo2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ozo2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ozo2z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ozo2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ozo2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ozo2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y6_N25
+dffeas \soc_inst|m0_1|u_logic|Ozo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ozo2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ozo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ozo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ozo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~7 (
+// Location: MLABCELL_X25_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K423z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|J773z4~q  & ( \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q 
-//  & !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|J773z4~q  & ( !\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J773z4~q  & ( !\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|K423z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|J773z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K423z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~7 .lut_mask = 64'h0201000102000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K423z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K423z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|K423z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~8 (
+// Location: FF_X25_Y6_N44
+dffeas \soc_inst|m0_1|u_logic|K423z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|K423z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K423z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K423z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K423z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|W21wx4~7_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Z52xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cao2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W21wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z52xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cao2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|K423z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Ozo2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z52xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cao2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W21wx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ozo2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|K423z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~8 .lut_mask = 64'hCC0C000044040000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .lut_mask = 64'h00008080A0000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4 (
+// Location: LABCELL_X35_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S2p2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~combout  = ( \soc_inst|m0_1|u_logic|W21wx4~6_combout  & ( \soc_inst|m0_1|u_logic|W21wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|S2p2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|S2p2z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S2p2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S2p2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|S2p2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y8_N14
+dffeas \soc_inst|m0_1|u_logic|S2p2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|S2p2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|S2p2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S2p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S2p2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M92xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M92xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|S2p2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|S2p2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|M92xx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M92xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M92xx4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|M92xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Yw0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M92xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yw0wx4~4_combout  & (!\soc_inst|m0_1|u_logic|Yw0wx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Yw0wx4~2_combout  & !\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yw0wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M92xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|W21wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O24wx4~0 (
+// Location: LABCELL_X33_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gdawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O24wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|W21wx4~combout )) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & \soc_inst|m0_1|u_logic|W21wx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Gdawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gdawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Yw0wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gdawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( ((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gdawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O24wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O24wx4~0 .lut_mask = 64'h00220022DDFFDDFF;
-defparam \soc_inst|m0_1|u_logic|O24wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .lut_mask = 64'h0000773300007F3F;
+defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y10_N17
-dffeas \soc_inst|m0_1|u_logic|Gdo2z4 (
+// Location: FF_X35_Y8_N32
+dffeas \soc_inst|m0_1|u_logic|D1p2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|D1p2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gdo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|D1p2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gdo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gdo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D1p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D1p2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Womvx4~0 (
+// Location: LABCELL_X35_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vl92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Womvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xeo2z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Gdo2z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xeo2z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Gdo2z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xeo2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~73_sumout ) # (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xeo2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~73_sumout  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vl92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|D1p2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add0~73_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gdo2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|D1p2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vl92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Womvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Womvx4~0 .lut_mask = 64'h5D5DFDFD555FF5FF;
-defparam \soc_inst|m0_1|u_logic|Womvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y9_N37
-dffeas \soc_inst|m0_1|u_logic|Xeo2z4 (
+// Location: LABCELL_X35_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yj92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Cn43z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Lw53z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lw53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cn43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yj92z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .lut_mask = 64'h000000000E040000;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y6_N56
+dffeas \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xeo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xeo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~29 (
+// Location: LABCELL_X29_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~29_sumout  = SUM(( !\soc_inst|m0_1|u_logic|S3i3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~74  ))
-// \soc_inst|m0_1|u_logic|Add0~30  = CARRY(( !\soc_inst|m0_1|u_logic|S3i3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~74  ))
+// \soc_inst|m0_1|u_logic|Yj92z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|K423z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|K423z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~74 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~29_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~30 ),
+	.combout(\soc_inst|m0_1|u_logic|Yj92z4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~29 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~29 .lut_mask = 64'h000000000000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add0~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .lut_mask = 64'h0000C0000000A000;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~85 (
+// Location: LABCELL_X24_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~90  ))
-// \soc_inst|m0_1|u_logic|Add3~86  = CARRY(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~90  ))
+// \soc_inst|m0_1|u_logic|Yj92z4~2_combout  = ( \soc_inst|m0_1|u_logic|Tz03z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Z203z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tz03z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Z203z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z203z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tz03z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~90 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~85_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~86 ),
+	.combout(\soc_inst|m0_1|u_logic|Yj92z4~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~85 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~85 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~85 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .lut_mask = 64'h00000000E0004000;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gdawx4~0 (
+// Location: LABCELL_X35_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gdawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|W7z2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Yj92z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yj92z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vl92z4~0_combout  & (\soc_inst|m0_1|u_logic|S2p2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Yj92z4~0_combout  & !\soc_inst|m0_1|u_logic|Yj92z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yj92z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vl92z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Yj92z4~0_combout  & !\soc_inst|m0_1|u_logic|Yj92z4~1_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vl92z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S2p2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yj92z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yj92z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yj92z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gdawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yj92z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .lut_mask = 64'hFF33FF3300000000;
-defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .lut_mask = 64'hA000200000000000;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y10_N31
-dffeas \soc_inst|m0_1|u_logic|K423z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K423z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hy0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|H4p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ym93z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|H4p2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Yj92z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ym93z4~q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yj92z4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K423z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K423z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .lut_mask = 64'hCCCCF5A0CCCCF5F5;
+defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N23
-dffeas \soc_inst|m0_1|u_logic|Ozo2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ozo2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~73 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~70  ))
+// \soc_inst|m0_1|u_logic|Add5~74  = CARRY(( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~70  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~70 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~74 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ozo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ozo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~73 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~73 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~0 (
+// Location: LABCELL_X30_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bv0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|K423z4~q  & ( \soc_inst|m0_1|u_logic|Ozo2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K423z4~q  & ( !\soc_inst|m0_1|u_logic|Ozo2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K423z4~q  & ( !\soc_inst|m0_1|u_logic|Ozo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  $ 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Bv0wx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (((\soc_inst|m0_1|u_logic|Add3~85_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Add5~73_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Add3~85_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~73_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Add3~85_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (\soc_inst|m0_1|u_logic|Add3~85_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|K423z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ozo2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add3~85_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .lut_mask = 64'h6000400020000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y7_N43
-dffeas \soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bv0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bv0wx4 .lut_mask = 64'h111111FF1F1F1FFF;
+defparam \soc_inst|m0_1|u_logic|Bv0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M92xx4~0 (
+// Location: LABCELL_X30_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tmjvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M92xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Tmjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( \soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( \soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( !\soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( !\soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M92xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tmjvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M92xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M92xx4~0 .lut_mask = 64'h2000000000000000;
-defparam \soc_inst|m0_1|u_logic|M92xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .lut_mask = 64'h0B0BFBFB0B00FB00;
+defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y10_N31
-dffeas \soc_inst|m0_1|u_logic|Lw53z4 (
+// Location: FF_X30_Y16_N46
+dffeas \soc_inst|m0_1|u_logic|H4p2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Tmjvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lw53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|H4p2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lw53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lw53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H4p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H4p2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y11_N13
-dffeas \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE (
+// Location: FF_X31_Y8_N31
+dffeas \soc_inst|m0_1|u_logic|Ixn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ixn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X52_Y10_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lw53z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Lw53z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Lw53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .lut_mask = 64'h0302000000020000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ixn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N25
-dffeas \soc_inst|m0_1|u_logic|Tz03z4 (
+// Location: FF_X31_Y8_N17
+dffeas \soc_inst|m0_1|u_logic|Tvn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tz03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tvn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tz03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tz03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tvn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z203z4~feeder (
+// Location: LABCELL_X31_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jf92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z203z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Jf92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Tvn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tvn2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z203z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jf92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z203z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z203z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Z203z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y11_N41
-dffeas \soc_inst|m0_1|u_logic|Z203z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z203z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z203z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z203z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z203z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .lut_mask = 64'h0020000000000000;
+defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~4 (
+// Location: LABCELL_X35_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Tz03z4~q  & ( \soc_inst|m0_1|u_logic|Z203z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tz03z4~q  & ( !\soc_inst|m0_1|u_logic|Z203z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tz03z4~q  & ( !\soc_inst|m0_1|u_logic|Z203z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Md92z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wu53z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Nl43z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tz03z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z203z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wu53z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nl43z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Md92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .lut_mask = 64'h2020002020000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~0 .lut_mask = 64'h0000000000C00088;
+defparam \soc_inst|m0_1|u_logic|Md92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y7_N38
-dffeas \soc_inst|m0_1|u_logic|Zxo2z4 (
+// Location: FF_X33_Y7_N35
+dffeas \soc_inst|m0_1|u_logic|V223z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zxo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|V223z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zxo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zxo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V223z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V223z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~1 (
+// Location: LABCELL_X33_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Zxo2z4~q  & ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zxo2z4~q  & ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zxo2z4~q  & ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  $ 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Md92z4~1_combout  = ( \soc_inst|m0_1|u_logic|Ec33z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|V223z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ec33z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|V223z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zxo2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|V223z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ec33z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Md92z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .lut_mask = 64'h9000800010000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~1 .lut_mask = 64'h00000000B0008000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y9_N20
-dffeas \soc_inst|m0_1|u_logic|Cn43z4 (
+// Location: FF_X33_Y8_N23
+dffeas \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cn43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cn43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cn43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X36_Y9_N47
-dffeas \soc_inst|m0_1|u_logic|Kwo2z4 (
+// Location: FF_X35_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|K103z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kwo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K103z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kwo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kwo2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Kwo2z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Cn43z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Cn43z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kwo2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .lut_mask = 64'h0000080800000C00;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K103z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K103z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~5 (
+// Location: LABCELL_X35_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Yw0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yw0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|M92xx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Yw0wx4~3_combout  & !\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Md92z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|K103z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|K103z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|K103z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yw0wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M92xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|K103z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Md92z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~2 .lut_mask = 64'h3000100020000000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gdawx4~1 (
+// Location: LABCELL_X31_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gdawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Gdawx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( 
-// \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Md92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Md92z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Md92z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Jf92z4~0_combout  & (!\soc_inst|m0_1|u_logic|Md92z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ixn2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gdawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ixn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jf92z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Md92z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Md92z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Md92z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Md92z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .lut_mask = 64'h1511151115115555;
-defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~3 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~93 (
+// Location: LABCELL_X31_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~98  ))
-// \soc_inst|m0_1|u_logic|Add3~94  = CARRY(( !\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~98  ))
+// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|H4p2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|H1qwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|H4p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|W5p2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|H4p2z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|H4p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|W5p2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Md92z4~3_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~98 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~93_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~94 ),
+	.combout(\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~93 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~93 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~93 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .lut_mask = 64'hAAF0AAFFAAF0AA33;
+defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~97 (
+// Location: LABCELL_X31_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~106  ))
-// \soc_inst|m0_1|u_logic|Add3~98  = CARRY(( !\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~106  ))
+// \soc_inst|m0_1|u_logic|Add5~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~74  ))
+// \soc_inst|m0_1|u_logic|Add5~22  = CARRY(( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~74  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~106 ),
+	.cin(\soc_inst|m0_1|u_logic|Add5~74 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~97_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~98 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~22 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~97 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~97 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~97 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~21 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~4 (
+// Location: LABCELL_X30_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fq0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o~4_combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~61_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~97_sumout )) # 
-// (\soc_inst|m0_1|u_logic|C61wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~61_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~97_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~61_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~97_sumout )) # (\soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~61_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~97_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|Fq0wx4~combout  = ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (((\soc_inst|m0_1|u_logic|Add3~69_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~69_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~69_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (\soc_inst|m0_1|u_logic|Add3~69_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add3~69_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
 	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add3~97_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o~4 .lut_mask = 64'h000F333F555F777F;
-defparam \soc_inst|m0_1|u_logic|haddr_o~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fq0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fq0wx4 .lut_mask = 64'h050505FF373737FF;
+defparam \soc_inst|m0_1|u_logic|Fq0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdjvx4~0 (
+// Location: LABCELL_X30_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irjvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J7q2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|haddr_o~4_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|haddr_o~4_combout  & 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|J7q2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Irjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|Fq0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Bnx2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|Fq0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( !\soc_inst|m0_1|u_logic|Fq0wx4~combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Bnx2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( !\soc_inst|m0_1|u_logic|Fq0wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Irjvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .lut_mask = 64'h0F03FFF30A02AAA2;
-defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .lut_mask = 64'h0D0DFDFD0D00FD00;
+defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y6_N13
-dffeas \soc_inst|m0_1|u_logic|J7q2z4 (
+// Location: FF_X30_Y5_N1
+dffeas \soc_inst|m0_1|u_logic|W5p2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Irjvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -39517,296 +39583,182 @@ dffeas \soc_inst|m0_1|u_logic|J7q2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J7q2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J7q2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y12_N25
-dffeas \soc_inst|m0_1|u_logic|Psh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psh3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psh3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y11_N56
-dffeas \soc_inst|m0_1|u_logic|Mi23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mi23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mi23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mi23z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y8_N16
-dffeas \soc_inst|m0_1|u_logic|Ft83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ft83z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ft83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ft83z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y11_N7
-dffeas \soc_inst|m0_1|u_logic|Vr33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vr33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|W5p2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vr33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vr33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W5p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W5p2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~7 (
+// Location: LABCELL_X29_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Vr33z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Ft83z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Vr33z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ft83z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Psn2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|W5p2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ft83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vr33z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Psn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .lut_mask = 64'h0054000000040000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~1 .lut_mask = 64'hC00000A000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Naq2z4~feeder (
+// Location: LABCELL_X35_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Naq2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Jq1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ixn2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ixn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Naq2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Naq2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Naq2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y11_N20
-dffeas \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y8_N41
-dffeas \soc_inst|m0_1|u_logic|Wj73z4 (
+// Location: FF_X28_Y9_N46
+dffeas \soc_inst|m0_1|u_logic|Eun2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wj73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Eun2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wj73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eun2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eun2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~6 (
+// Location: LABCELL_X33_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wj73z4~q  & ( (!\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q 
-//  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wj73z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|V223z4~q  & ( \soc_inst|m0_1|u_logic|Eun2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|V223z4~q  & ( !\soc_inst|m0_1|u_logic|Eun2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V223z4~q  & ( !\soc_inst|m0_1|u_logic|Eun2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  $ 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wj73z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|V223z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eun2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .lut_mask = 64'h000000E000000020;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~0 .lut_mask = 64'h2800080020000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~8 (
+// Location: LABCELL_X33_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Z62wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Psh3z4~q  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mi23z4~q )))) # (\soc_inst|m0_1|u_logic|Psh3z4~q  & (((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mi23z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Jq1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|St0wx4~4_combout  & (!\soc_inst|m0_1|u_logic|St0wx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|St0wx4~3_combout  & !\soc_inst|m0_1|u_logic|St0wx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Psh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mi23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z62wx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|St0wx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|St0wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|St0wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|St0wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .lut_mask = 64'hF531000000000000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N46
-dffeas \soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ecawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|K9z2z4~q ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ecawx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .lut_mask = 64'hFF55FF5500000000;
+defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y9_N58
-dffeas \soc_inst|m0_1|u_logic|Arh3z4 (
+// Location: FF_X25_Y8_N26
+dffeas \soc_inst|m0_1|u_logic|Od83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Arh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Od83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Arh3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X42_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~3_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Arh3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Arh3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .lut_mask = 64'h3000000000002200;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Od83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Od83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y12_N25
-dffeas \soc_inst|m0_1|u_logic|Wnu2z4 (
+// Location: FF_X30_Y7_N25
+dffeas \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -39814,1035 +39766,1066 @@ dffeas \soc_inst|m0_1|u_logic|Wnu2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wnu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wnu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wnu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y8_N50
-dffeas \soc_inst|m0_1|u_logic|Rdq2z4 (
+// Location: FF_X34_Y9_N5
+dffeas \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rdq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rdq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~4 (
+// Location: MLABCELL_X25_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Rdq2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Wnu2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Rdq2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Wnu2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Rdq2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|St0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wnu2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .lut_mask = 64'h5000400000004000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~7 .lut_mask = 64'h0050001000400000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y12_N55
-dffeas \soc_inst|m0_1|u_logic|Na63z4 (
+// Location: FF_X31_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|F473z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Na63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F473z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Na63z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X45_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Na63z4~q )) # 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|E0d3z4~q ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Na63z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|E0d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .lut_mask = 64'h0000000000000D08;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F473z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F473z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y9_N43
-dffeas \soc_inst|m0_1|u_logic|E153z4~DUPLICATE (
+// Location: FF_X24_Y9_N11
+dffeas \soc_inst|m0_1|u_logic|Fi93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Fi93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E153z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E153z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fi93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fi93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lph3z4~feeder (
+// Location: LABCELL_X24_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lph3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|St0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fi93z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|F473z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|F473z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fi93z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lph3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lph3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lph3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Lph3z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y12_N25
-dffeas \soc_inst|m0_1|u_logic|Lph3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lph3z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lph3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lph3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lph3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|St0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~6 .lut_mask = 64'h1010000000001100;
+defparam \soc_inst|m0_1|u_logic|St0wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~2 (
+// Location: MLABCELL_X25_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lph3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|St0wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Tvn2z4~q  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Od83z4~q )))) # (\soc_inst|m0_1|u_logic|Tvn2z4~q  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Od83z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lph3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tvn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Od83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|St0wx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .lut_mask = 64'h000000A000C00000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y9_N1
-dffeas \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|St0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~8 .lut_mask = 64'hC4F5000000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T04xx4~0 (
+// Location: LABCELL_X33_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T04xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ecawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ecawx4~0_combout  & ( \soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|St0wx4~5_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ecawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ecawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T04xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T04xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T04xx4~0 .lut_mask = 64'h2000000000000000;
-defparam \soc_inst|m0_1|u_logic|T04xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .lut_mask = 64'h00002F2F00002FFF;
+defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y12_N44
-dffeas \soc_inst|m0_1|u_logic|Ccq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ccq2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~49 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~49_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~22  ))
+// \soc_inst|m0_1|u_logic|Add5~50  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~22  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~22 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~50 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~49 .lut_mask = 64'h0000C03F000000AA;
+defparam \soc_inst|m0_1|u_logic|Add5~49 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~53 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~50  ))
+// \soc_inst|m0_1|u_logic|Add5~54  = CARRY(( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~50  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~50 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~54 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ccq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ccq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~53 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~53 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~0 (
+// Location: LABCELL_X30_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ug0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Ccq2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Ccq2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ug0wx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~61_sumout  & ( \soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Fj0wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~61_sumout  & ( \soc_inst|m0_1|u_logic|Add5~53_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~61_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~53_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~61_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ccq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~61_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .lut_mask = 64'hA000400000004000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ug0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ug0wx4 .lut_mask = 64'h030303FF575757FF;
+defparam \soc_inst|m0_1|u_logic|Ug0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~5 (
+// Location: LABCELL_X30_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M0kvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|T04xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z62wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Z62wx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Z62wx4~1_combout  & !\soc_inst|m0_1|u_logic|Z62wx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|M0kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ug0wx4~combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|B9g3z4~q ))) 
+// # (\soc_inst|m0_1|u_logic|Ug0wx4~combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B9g3z4~q  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Ug0wx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ug0wx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Ug0wx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z62wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z62wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z62wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|T04xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M0kvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .lut_mask = 64'h00FAFAFA0032FA32;
+defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4 (
+// Location: FF_X30_Y16_N1
+dffeas \soc_inst|m0_1|u_logic|Tzg3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|M0kvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tzg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tzg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~combout  = ( \soc_inst|m0_1|u_logic|Z62wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Z62wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .lut_mask = 64'h8800000020002000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ns9wx4~0 (
+// Location: LABCELL_X31_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ns9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Hk0wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Hk0wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Hk0wx4~3_combout  & !\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hk0wx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hk0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hk0wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ns9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .lut_mask = 64'hFFFF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ns9wx4~1 (
+// Location: LABCELL_X31_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9awx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ns9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Z62wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Ns9wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Z62wx4~8_combout  & ( 
-// \soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Z62wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z62wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|M9awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|M9awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( 
+// \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
 // \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
 	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ns9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M9awx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .lut_mask = 64'h050D050D050D0F0F;
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M9awx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M9awx4~1 .lut_mask = 64'h005D005D005D00FF;
+defparam \soc_inst|m0_1|u_logic|M9awx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N72wx4~0 (
+// Location: LABCELL_X31_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N72wx4~0_combout  = ( \soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~54  ))
+// \soc_inst|m0_1|u_logic|Add5~26  = CARRY(( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~54  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~54 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N72wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N72wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N72wx4~0 .lut_mask = 64'hFAFAE400F5F5D800;
-defparam \soc_inst|m0_1|u_logic|N72wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~25 .lut_mask = 64'h0000FF0F00007788;
+defparam \soc_inst|m0_1|u_logic|Add5~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgawx4~0 (
+// Location: LABCELL_X31_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mgawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|Uup2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Add5~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~26  ))
+// \soc_inst|m0_1|u_logic|Add5~2  = CARRY(( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~26  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mgawx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~2 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .lut_mask = 64'hF0FFF0FF00000000;
-defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~1 .lut_mask = 64'h0000FF0F00007788;
+defparam \soc_inst|m0_1|u_logic|Add5~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J61wx4~1 (
+// Location: LABCELL_X31_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C70wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J61wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( \soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( \soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|C70wx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|N90wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add3~101_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add3~101_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|N90wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add3~101_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~101_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add3~101_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J61wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C70wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J61wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J61wx4~1 .lut_mask = 64'h3333555555553333;
-defparam \soc_inst|m0_1|u_logic|J61wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C70wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C70wx4 .lut_mask = 64'hFFCCF0C0AA88A080;
+defparam \soc_inst|m0_1|u_logic|C70wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J61wx4~0 (
+// Location: LABCELL_X36_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9kvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|C61wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|J61wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|C61wx4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|J61wx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|C61wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|C61wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|J61wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Q9kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zfh3z4~q  & ( \soc_inst|m0_1|u_logic|C70wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nox2z4~q )) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q  & ( \soc_inst|m0_1|u_logic|C70wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nox2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Zfh3z4~q  & ( !\soc_inst|m0_1|u_logic|C70wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nox2z4~q 
+// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q  & ( !\soc_inst|m0_1|u_logic|C70wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Nox2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J61wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C70wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J61wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J61wx4~0 .lut_mask = 64'h0D050F0F0D050D05;
-defparam \soc_inst|m0_1|u_logic|J61wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .lut_mask = 64'h4404CC8C5505FFAF;
+defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O51wx4~0 (
+// Location: FF_X36_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Zfh3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zfh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zfh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O51wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|C61wx4~0_combout  & !\soc_inst|m0_1|u_logic|Mgawx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|C61wx4~0_combout  & \soc_inst|m0_1|u_logic|Mgawx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zfh3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Y1n2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zfh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Y1n2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y1n2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O51wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O51wx4~0 .lut_mask = 64'h0A0A0A0AA0A0A0A0;
-defparam \soc_inst|m0_1|u_logic|O51wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .lut_mask = 64'hA040000000400000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M41wx4~0 (
+// Location: MLABCELL_X25_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M41wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|O51wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|S71wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|O51wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|S71wx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Pw03z4~q  & ( \soc_inst|m0_1|u_logic|Vzz2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pw03z4~q  & ( !\soc_inst|m0_1|u_logic|Vzz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pw03z4~q  & ( !\soc_inst|m0_1|u_logic|Vzz2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pw03z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vzz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M41wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M41wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M41wx4~0 .lut_mask = 64'hFF0F0000CC0C0000;
-defparam \soc_inst|m0_1|u_logic|M41wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .lut_mask = 64'h00C0004000800000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N4
-dffeas \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE (
+// Location: FF_X34_Y9_N34
+dffeas \soc_inst|m0_1|u_logic|Ug43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ug43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ug43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y8_N47
-dffeas \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE (
+// Location: FF_X34_Y8_N26
+dffeas \soc_inst|m0_1|u_logic|J0n2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|J0n2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J0n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J0n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~2 (
+// Location: LABCELL_X33_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ai9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Ug43z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Ug43z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ug43z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J0n2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .lut_mask = 64'h1100100001000000;
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y12_N11
-dffeas \soc_inst|m0_1|u_logic|Snd3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Snd3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Snd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Snd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .lut_mask = 64'h0400050004000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~1 (
+// Location: LABCELL_X27_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ai9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hpd3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Snd3z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Wa0wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wa0wx4~3_combout  & (!\soc_inst|m0_1|u_logic|T83xx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wa0wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hpd3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Snd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|T83xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wa0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .lut_mask = 64'h0000000000000A0C;
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y10_N14
-dffeas \soc_inst|m0_1|u_logic|B5e3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B5e3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~combout  = ( \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B5e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B5e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~0 (
+// Location: LABCELL_X29_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[22]~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ai9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|B5e3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Lsd3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uvzvx4~combout  & !\soc_inst|m0_1|u_logic|Y9t2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Uvzvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uvzvx4~combout ) # (\soc_inst|m0_1|u_logic|Y9t2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lsd3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B5e3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .lut_mask = 64'h0C0A000000000000;
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .lut_mask = 64'hCFCFCCCCC0C0CCCC;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y12_N23
-dffeas \soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE (
+// Location: FF_X25_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Fed3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|I0e3z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Fed3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X46_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ai9wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|X1e3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|X1e3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .lut_mask = 64'h00000E0200000000;
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fed3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fed3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4 (
+// Location: MLABCELL_X21_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D0wwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ai9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ai9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ai9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ai9wx4~2_combout  & !\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|D0wwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( \soc_inst|m0_1|u_logic|Fed3z4~q  & ( (\soc_inst|m0_1|u_logic|Qfc3z4~q  & ((!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lhd3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Bjd3z4~q )) # (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Lhd3z4~q ) # (!\soc_inst|m0_1|u_logic|Bjd3z4~q ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( !\soc_inst|m0_1|u_logic|Fed3z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qfc3z4~q  & !\soc_inst|m0_1|u_logic|Bjd3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ai9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|D0wwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ai9wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ai9wx4 .lut_mask = 64'hA0A0000000000000;
-defparam \soc_inst|m0_1|u_logic|Ai9wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .lut_mask = 64'h0000110000003110;
+defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sndwx4~0 (
+// Location: MLABCELL_X21_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D0wwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sndwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|D0wwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|D0wwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pxb3z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .lut_mask = 64'h3333333300FF00FF;
-defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0ewx4~0 (
+// Location: MLABCELL_X21_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B90xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C0ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|H2wwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|B90xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bjd3z4~q  & ( (!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Bjd3z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B90xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B90xx4~0 .lut_mask = 64'h00550055AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|B90xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sndwx4~1 (
+// Location: MLABCELL_X21_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tb0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sndwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Tb0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .lut_mask = 64'h00000F0FF0F0FFFF;
-defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .lut_mask = 64'h0F0F0F0F55555555;
+defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tkdwx4~0 (
+// Location: MLABCELL_X21_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tkdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bywwx4~combout  & ( (\soc_inst|m0_1|u_logic|Svqwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Svqwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Hdzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~1_combout  & ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|B90xx4~0_combout ) # (\soc_inst|m0_1|u_logic|I90xx4~0_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .lut_mask = 64'h003F003F0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Godwx4~0 (
+// Location: LABCELL_X24_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Douvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Godwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pybwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Douvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Godwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Godwx4~0 .lut_mask = 64'h00FF00FF55555555;
-defparam \soc_inst|m0_1|u_logic|Godwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Douvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Douvx4~0 .lut_mask = 64'h0000080000000000;
+defparam \soc_inst|m0_1|u_logic|Douvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tkdwx4~1 (
+// Location: MLABCELL_X28_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W0ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tkdwx4~1_combout  = (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ((\soc_inst|m0_1|u_logic|Godwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & (\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ))
+// \soc_inst|m0_1|u_logic|W0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( (!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & (!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ((!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout 
+// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & ((!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & ((!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .lut_mask = 64'h03F303F303F303F3;
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .lut_mask = 64'h332233223020FFAA;
+defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N43
-dffeas \soc_inst|m0_1|u_logic|J9d3z4 (
+// Location: FF_X28_Y18_N44
+dffeas \soc_inst|m0_1|u_logic|X0c3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J9d3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X0c3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J9d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J9d3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X0c3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X0c3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N17
-dffeas \soc_inst|m0_1|u_logic|Xdb3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xdb3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ylc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Ylc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( \soc_inst|m0_1|u_logic|Ylc3z4~q  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xdb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xdb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .lut_mask = 64'h00FF00FF50FA50FA;
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y12_N23
-dffeas \soc_inst|m0_1|u_logic|J7b3z4 (
+// Location: FF_X28_Y18_N29
+dffeas \soc_inst|m0_1|u_logic|Ylc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J7b3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ylc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J7b3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y10_N44
-dffeas \soc_inst|m0_1|u_logic|Gcb3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gcb3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jruvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jruvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gcb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gcb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .lut_mask = 64'h0000100000000000;
+defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y13_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pab3z4~feeder (
+// Location: MLABCELL_X28_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pab3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  )
+// \soc_inst|m0_1|u_logic|D1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|F4c3z4~q  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|hwdata_o~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ) # (\soc_inst|m0_1|u_logic|D9ovx4~combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|F4c3z4~q  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|F4c3z4~q  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & (\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|F4c3z4~q  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & (\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pab3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pab3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pab3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Pab3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .lut_mask = 64'h03020302FFAAF3A2;
+defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y13_N53
-dffeas \soc_inst|m0_1|u_logic|Pab3z4 (
+// Location: FF_X28_Y19_N50
+dffeas \soc_inst|m0_1|u_logic|F4c3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F4c3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F4c3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F4c3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y19_N23
+dffeas \soc_inst|m0_1|u_logic|Jkc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pab3z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jkc3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jkc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pab3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pab3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jkc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jkc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N27
+// Location: LABCELL_X27_Y19_N21
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jkc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Jkc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( \soc_inst|m0_1|u_logic|Jkc3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Jkc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Jkc3z4~q  & ((!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ) # (!\soc_inst|m0_1|u_logic|Zyovx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & 
+// ( ((\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & \soc_inst|m0_1|u_logic|Zyovx4~combout )) # (\soc_inst|m0_1|u_logic|Jkc3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datad(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -40852,12 +40835,12 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkc3z4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .lut_mask = 64'h00FF00FF50FA50FA;
+defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .lut_mask = 64'h05FF05FF00FA00FA;
 defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N29
-dffeas \soc_inst|m0_1|u_logic|Jkc3z4 (
+// Location: FF_X27_Y19_N22
+dffeas \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Jkc3z4~0_combout ),
 	.asdata(vcc),
@@ -40868,1269 +40851,1455 @@ dffeas \soc_inst|m0_1|u_logic|Jkc3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jkc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jkc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jkc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jruvx4~0 (
+// Location: LABCELL_X29_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K7pwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jruvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q  & (\soc_inst|m0_1|u_logic|R1w2z4~q  & (!\soc_inst|m0_1|u_logic|G0w2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|K7pwx4~combout  = ( !\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K7pwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .lut_mask = 64'h0000000000002000;
-defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K7pwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K7pwx4 .lut_mask = 64'h0001000100000000;
+defparam \soc_inst|m0_1|u_logic|K7pwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L0uvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L0uvx4~combout  = (\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|K7pwx4~combout )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L0uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L0uvx4 .lut_mask = 64'h0303030303030303;
+defparam \soc_inst|m0_1|u_logic|L0uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N8
-dffeas \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE (
+// Location: FF_X28_Y18_N53
+dffeas \soc_inst|m0_1|u_logic|Q6l2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Q6l2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q6l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6l2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1ivx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|D1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & (((\soc_inst|m0_1|u_logic|D9ovx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((\soc_inst|m0_1|u_logic|D9ovx4~combout ) # (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) )
+// Location: FF_X28_Y18_N14
+dffeas \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y18_N56
+dffeas \soc_inst|m0_1|u_logic|H8l2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .lut_mask = 64'h3232323232FA00FA;
-defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H8l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H8l2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N7
-dffeas \soc_inst|m0_1|u_logic|F4c3z4 (
+// Location: FF_X24_Y19_N25
+dffeas \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F4c3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4c3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F4c3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~0 (
+// Location: MLABCELL_X28_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A50xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkpwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|F4c3z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jkc3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|F4c3z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|A50xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H8l2z4~q  & ( \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Q6l2z4~q  & (\soc_inst|m0_1|u_logic|X0c3z4~q  & (\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ylc3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H8l2z4~q  & ( \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & (\soc_inst|m0_1|u_logic|Ylc3z4~q  & ((!\soc_inst|m0_1|u_logic|Q6l2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H8l2z4~q  & ( !\soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & (\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ylc3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A50xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .lut_mask = 64'h000F000F555F555F;
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A50xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A50xx4~0 .lut_mask = 64'h0003000000230002;
+defparam \soc_inst|m0_1|u_logic|A50xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~1 (
+// Location: MLABCELL_X28_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ayzwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkpwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wkpwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gcb3z4~q  & (((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Pab3z4~q )))) # (\soc_inst|m0_1|u_logic|Gcb3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|E0uvx4~combout  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Pab3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ayzwx4~combout  = ( !\soc_inst|m0_1|u_logic|A50xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|F4c3z4~q  & \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A50xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .lut_mask = 64'hEEE0EEE000000000;
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ayzwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ayzwx4 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Ayzwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~2 (
+// Location: MLABCELL_X28_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkpwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wkpwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Z8b3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & (\soc_inst|m0_1|u_logic|J7b3z4~q  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z8b3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( (!\soc_inst|m0_1|u_logic|X0c3z4~q ) # (!\soc_inst|m0_1|u_logic|Ylc3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|J7b3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .lut_mask = 64'h000000008ACF8ACF;
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~3 (
+// Location: LABCELL_X27_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[5] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkpwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wkpwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout  & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # ((!\soc_inst|m0_1|u_logic|J9d3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|K7pwx4~combout  & (!\soc_inst|m0_1|u_logic|Xdb3z4~q  & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # (!\soc_inst|m0_1|u_logic|J9d3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o [5] = ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J9d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o [5]),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .lut_mask = 64'h00000000FCA8FCA8;
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: IOIBUF_X22_Y0_N52
-cyclonev_io_ibuf \SW[6]~input (
-	.i(SW[6]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[6]~input_o ));
-// synopsys translate_off
-defparam \SW[6]~input .bus_hold = "false";
-defparam \SW[6]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .lut_mask = 64'hF0F0F0F0FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y8_N54
-cyclonev_lcell_comb \soc_inst|switches_1|switch_store[0][6]~feeder (
+// Location: MLABCELL_X25_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uic3z4~0 (
 // Equation(s):
-// \soc_inst|switches_1|switch_store[0][6]~feeder_combout  = ( \SW[6]~input_o  )
+// \soc_inst|m0_1|u_logic|Uic3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|m0_1|u_logic|Uic3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Uic3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
 	.datae(gnd),
-	.dataf(!\SW[6]~input_o ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|switch_store[0][6]~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][6]~feeder .extended_lut = "off";
-defparam \soc_inst|switches_1|switch_store[0][6]~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|switches_1|switch_store[0][6]~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .lut_mask = 64'h30FC30FC00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y8_N56
-dffeas \soc_inst|switches_1|switch_store[0][6] (
+// Location: FF_X25_Y18_N50
+dffeas \soc_inst|m0_1|u_logic|Uic3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|switch_store[0][6]~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][6]~q ),
+	.q(\soc_inst|m0_1|u_logic|Uic3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][6] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][6] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X23_Y8_N12
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[6]~36 (
-// Equation(s):
-// \soc_inst|interconnect_1|HRDATA[6]~36_combout  = ( \soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout ) # 
-// (\soc_inst|switches_1|switch_store[0][6]~q ) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) ) # ( 
-// \soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (\soc_inst|switches_1|switch_store[0][6]~q  & \soc_inst|interconnect_1|Equal1~0_combout ) ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) )
-
-	.dataa(!\soc_inst|switches_1|switch_store[0][6]~q ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[6]~36 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[6]~36 .lut_mask = 64'hCCCC0505CCCCF5F5;
-defparam \soc_inst|interconnect_1|HRDATA[6]~36 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uic3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uic3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9iwx4~0 (
+// Location: LABCELL_X24_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iuuvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O9iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkpwx4~3_combout  & ( \soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkpwx4~3_combout  & ( 
-// \soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout ) # (\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkpwx4~3_combout  & ( !\soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( 
-// \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Trq2z4~q  & (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & 
+// !\soc_inst|m0_1|u_logic|R1w2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O9iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .lut_mask = 64'h555500005F5F0F0F;
-defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .lut_mask = 64'h0000100000000000;
+defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9iwx4~1 (
+// Location: MLABCELL_X25_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K1ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O9iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|O9iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Sndwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Tkdwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|K1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o [5] & 
+// (\soc_inst|m0_1|u_logic|D9ovx4~combout )) # (\soc_inst|m0_1|u_logic|hwdata_o [5] & ((\soc_inst|m0_1|u_logic|N7c3z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o 
+// [5] & (\soc_inst|m0_1|u_logic|D9ovx4~combout )) # (\soc_inst|m0_1|u_logic|hwdata_o [5] & ((\soc_inst|m0_1|u_logic|N7c3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & (((\soc_inst|m0_1|u_logic|D9ovx4~combout  & !\soc_inst|m0_1|u_logic|hwdata_o [5])) # (\soc_inst|m0_1|u_logic|N7c3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( ((\soc_inst|m0_1|u_logic|D9ovx4~combout  & !\soc_inst|m0_1|u_logic|hwdata_o [5])) # (\soc_inst|m0_1|u_logic|N7c3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O9iwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .lut_mask = 64'hCEDFCEDF00000000;
-defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .lut_mask = 64'h5F0F4C0C550F440C;
+defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X61wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|X61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|A9iwx4~0_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X61wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y18_N44
+dffeas \soc_inst|m0_1|u_logic|N7c3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X61wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X61wx4~0 .lut_mask = 64'h105030F0115533FF;
-defparam \soc_inst|m0_1|u_logic|X61wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N7c3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N7c3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X61wx4~1 (
+// Location: MLABCELL_X25_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fhc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X61wx4~1_combout  = ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Glnwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Fhc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o [4] & ((\soc_inst|m0_1|u_logic|Fhc3z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o [4] & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Fhc3z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X61wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fhc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X61wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X61wx4~1 .lut_mask = 64'h0500550005015511;
-defparam \soc_inst|m0_1|u_logic|X61wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .lut_mask = 64'h00FF00FF30FC30FC;
+defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M41wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|M41wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J61wx4~0_combout  & (\soc_inst|m0_1|u_logic|M41wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~61_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|M41wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y18_N7
+dffeas \soc_inst|m0_1|u_logic|Fhc3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fhc3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M41wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M41wx4~1 .lut_mask = 64'h00000000080A080A;
-defparam \soc_inst|m0_1|u_logic|M41wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fhc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fhc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y873z4~feeder (
+// Location: LABCELL_X24_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Axm2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y873z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Axm2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y873z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y873z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y873z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Y873z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y19_N16
+dffeas \soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X51_Y9_N50
-dffeas \soc_inst|m0_1|u_logic|Y873z4 (
+// Location: FF_X24_Y18_N34
+dffeas \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Y873z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y873z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y873z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y873z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X51_Y10_N26
-dffeas \soc_inst|m0_1|u_logic|F4q2z4 (
+// Location: FF_X25_Y18_N38
+dffeas \soc_inst|m0_1|u_logic|Xdb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F4q2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xdb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F4q2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xdb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xdb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y19_N49
+dffeas \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O723z4~feeder (
+// Location: MLABCELL_X25_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O723z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Wzvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Xdb3z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Xdb3z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O723z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O723z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O723z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|O723z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y11_N1
-dffeas \soc_inst|m0_1|u_logic|O723z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O723z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O723z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O723z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .lut_mask = 64'h00880088CCEECCEE;
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y10_N22
-dffeas \soc_inst|m0_1|u_logic|Gq43z4 (
+// Location: FF_X24_Y21_N50
+dffeas \soc_inst|m0_1|u_logic|Ipb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gq43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ipb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gq43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gq43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ipb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~6 (
+// Location: MLABCELL_X25_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxuvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Gq43z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Trq2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gq43z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~6 .lut_mask = 64'h3120000000000000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .lut_mask = 64'h0000001000000000;
+defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pz53z4~feeder (
+// Location: LABCELL_X24_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pz53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|R1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Ipb3z4~q )) 
+// # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & \soc_inst|m0_1|u_logic|Ipb3z4~q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|hwdata_o [4] & ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Ipb3z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [4] 
+// & ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ipb3z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.dataf(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pz53z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pz53z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pz53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Pz53z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .lut_mask = 64'h00FF0FCF00AA0A8A;
+defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y10_N7
-dffeas \soc_inst|m0_1|u_logic|Pz53z4 (
+// Location: FF_X24_Y21_N49
+dffeas \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pz53z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pz53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pz53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pz53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~7 (
+// Location: MLABCELL_X25_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~7_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|J7q2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pz53z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pz53z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Wzvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fhc3z4~q  & ((!\soc_inst|m0_1|u_logic|Uic3z4~q ) # ((!\soc_inst|m0_1|u_logic|N7c3z4~q ) # (!\soc_inst|m0_1|u_logic|Wzvwx4~0_combout )))) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pz53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~7 .lut_mask = 64'hC000020000000200;
-defparam \soc_inst|m0_1|u_logic|S71wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .lut_mask = 64'h000000000F0E0F0E;
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~8 (
+// Location: MLABCELL_X25_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|S71wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Y873z4~q  & (!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|F4q2z4~q )))) # (\soc_inst|m0_1|u_logic|Y873z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout )) # (\soc_inst|m0_1|u_logic|F4q2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jjuwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Uic3z4~q ) # (!\soc_inst|m0_1|u_logic|N7c3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y873z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|F4q2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S71wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~8 .lut_mask = 64'hF351000000000000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .lut_mask = 64'hFAFAFAFA00000000;
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgawx4~1 (
+// Location: LABCELL_X22_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mgawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mgawx4~0_combout  & ( \soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|S71wx4~5_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Mgawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mgawx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .lut_mask = 64'h000055F5000077F7;
-defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~61 (
+// Location: MLABCELL_X28_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F40xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~61_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~18  ))
-// \soc_inst|m0_1|u_logic|Add5~62  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~18  ))
+// \soc_inst|m0_1|u_logic|F40xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|H8l2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~18 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~61_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~62 ),
+	.combout(\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~61 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~61 .lut_mask = 64'h00008877000000F0;
-defparam \soc_inst|m0_1|u_logic|Add5~61 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F40xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F40xx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|F40xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~65 (
+// Location: MLABCELL_X25_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N10xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~62  ))
-// \soc_inst|m0_1|u_logic|Add5~66  = CARRY(( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~62  ))
+// \soc_inst|m0_1|u_logic|N10xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~62 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~65_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~66 ),
+	.combout(\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~65 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~65 .lut_mask = 64'h0000FF0F00007788;
-defparam \soc_inst|m0_1|u_logic|Add5~65 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N10xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N10xx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|N10xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q52wx4~0 (
+// Location: LABCELL_X22_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Adzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q52wx4~0_combout  = ( \soc_inst|m0_1|u_logic|N72wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|N72wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Adzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ((\soc_inst|m0_1|u_logic|N10xx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|F40xx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ((\soc_inst|m0_1|u_logic|N10xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N72wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q52wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .lut_mask = 64'h0000AA0A00002202;
-defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .lut_mask = 64'h050F050F05AF05AF;
+defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q52wx4~1 (
+// Location: LABCELL_X22_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A6zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q52wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q52wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Glnwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|U72wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|A6zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Adzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|I90xx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Adzwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|I90xx4~2_combout  & (\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & \soc_inst|m0_1|u_logic|Wvzwx4~0_combout )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Q52wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .lut_mask = 64'h000000CF00000000;
-defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .lut_mask = 64'h000C000C3F3F3F3F;
+defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y7_N41
-dffeas \soc_inst|m0_1|u_logic|E0d3z4 (
+// Location: FF_X17_Y18_N44
+dffeas \soc_inst|m0_1|u_logic|Lee3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E0d3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lee3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E0d3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lee3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lee3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y11_N19
-dffeas \soc_inst|m0_1|u_logic|Naq2z4 (
+// Location: MLABCELL_X25_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[11]~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|R40wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Wq5wx4~combout  & \soc_inst|m0_1|u_logic|R40wx4~combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .lut_mask = 64'h05050505AFAFAFAF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lee3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lee3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Lee3z4~q  & ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  ) ) # ( \soc_inst|m0_1|u_logic|Lee3z4~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|J6i2z4~q ) # (!\soc_inst|m0_1|u_logic|Zyovx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lee3z4~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Zyovx4~combout 
+// ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .lut_mask = 64'h0C0CFCFC0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y18_N43
+dffeas \soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Naq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Naq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Naq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~1 (
+// Location: LABCELL_X24_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9vvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Naq2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|E0d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Naq2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|E0d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|K9vvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Trq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & 
+// !\soc_inst|m0_1|u_logic|G0w2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|E0d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Naq2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .lut_mask = 64'h0000030200000100;
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~0 (
+// Location: MLABCELL_X25_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uzhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rdq2z4~q  & ( \soc_inst|m0_1|u_logic|Wj73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rdq2z4~q  & ( !\soc_inst|m0_1|u_logic|Wj73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rdq2z4~q  & ( !\soc_inst|m0_1|u_logic|Wj73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Uzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (\soc_inst|m0_1|u_logic|Ble3z4~q  & ((!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (\soc_inst|m0_1|u_logic|Ble3z4~q  & ((!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (\soc_inst|m0_1|u_logic|Ble3z4~q  & (!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ((!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rdq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wj73z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .lut_mask = 64'h5000100040000000;
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .lut_mask = 64'h4440FFF055505550;
+defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~2 (
+// Location: FF_X25_Y18_N56
+dffeas \soc_inst|m0_1|u_logic|Ble3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ble3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ble3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ble3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[10]~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ft83z4~q  & ( \soc_inst|m0_1|u_logic|Wnu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ft83z4~q  & ( !\soc_inst|m0_1|u_logic|Wnu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ft83z4~q  & ( !\soc_inst|m0_1|u_logic|Wnu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  = ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wq5wx4~combout  & \soc_inst|m0_1|u_logic|Zh5wx4~9_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ft83z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wnu2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .lut_mask = 64'h0500040001000000;
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N47
-dffeas \soc_inst|m0_1|u_logic|Fxv2z4 (
+// Location: LABCELL_X27_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nnc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nnc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( \soc_inst|m0_1|u_logic|Nnc3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Nnc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nnc3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .lut_mask = 64'h0AFA0AFA00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y19_N40
+dffeas \soc_inst|m0_1|u_logic|Nnc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nnc3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fxv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nnc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fxv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fxv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nnc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nnc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wva2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wva2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .lut_mask = 64'h0000100000000000;
+defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B0ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|D9ovx4~combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .lut_mask = 64'h32FA323200FA00FA;
+defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y12_N43
-dffeas \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE (
+// Location: FF_X27_Y19_N43
+dffeas \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~3 (
+// Location: LABCELL_X29_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey9wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Fxv2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|E0uvx4~combout  = ( \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fxv2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E0uvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .lut_mask = 64'h0050004400000000;
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E0uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0uvx4 .lut_mask = 64'h0000000002000200;
+defparam \soc_inst|m0_1|u_logic|E0uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4 (
+// Location: LABCELL_X24_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qztvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ey9wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ey9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ey9wx4~1_combout  & !\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qztvx4~combout  = ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ey9wx4~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~3_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey9wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey9wx4 .lut_mask = 64'hCC00000000000000;
-defparam \soc_inst|m0_1|u_logic|Ey9wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qztvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qztvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Qztvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y18_N17
+dffeas \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y9_N2
-dffeas \soc_inst|m0_1|u_logic|Euh3z4 (
+// Location: FF_X25_Y19_N5
+dffeas \soc_inst|m0_1|u_logic|Svs2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Euh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Svs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Euh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Euh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Svs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Svs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y9_N44
-dffeas \soc_inst|m0_1|u_logic|E153z4 (
+// Location: FF_X24_Y18_N38
+dffeas \soc_inst|m0_1|u_logic|Bus2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E153z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bus2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E153z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E153z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bus2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bus2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y12_N56
-dffeas \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE (
+// Location: FF_X24_Y18_N44
+dffeas \soc_inst|m0_1|u_logic|Jxs2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Na63z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Jxs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jxs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jxs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~0 (
+// Location: LABCELL_X24_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gyvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Du9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|E153z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Na63z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|E153z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Gyvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jxs2z4~q  & ( (!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svs2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Jxs2z4~q  & ( (!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Bus2z4~q ) # (\soc_inst|m0_1|u_logic|Svs2z4~q ))) # (\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svs2z4~q  & \soc_inst|m0_1|u_logic|Bus2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|E153z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Na63z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Du9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gyvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .lut_mask = 64'h0000000040504000;
-defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .lut_mask = 64'h0CCF0CCF0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~2 (
+// Location: LABCELL_X24_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gyvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Du9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Lph3z4~q  & ( \soc_inst|m0_1|u_logic|Arh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lph3z4~q  & ( !\soc_inst|m0_1|u_logic|Arh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lph3z4~q  & ( !\soc_inst|m0_1|u_logic|Arh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gyvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nnc3z4~q  & ((!\soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ble3z4~q 
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gyvwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nnc3z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lph3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Arh3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Du9wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .lut_mask = 64'h00A0008000200000;
-defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .lut_mask = 64'h00000F0F00000E0E;
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aw9wx4~0 (
+// Location: LABCELL_X24_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aw9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Psh3z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|B6pwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ble3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Psh3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .lut_mask = 64'h0000000000800000;
-defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y11_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~1 (
+// Location: LABCELL_X27_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vve3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Du9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Mi23z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Vr33z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Vve3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( \soc_inst|m0_1|u_logic|Vve3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Vve3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mi23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vr33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Du9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .lut_mask = 64'h00000000B0800000;
-defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .lut_mask = 64'h0CFC0CFC00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~3 (
+// Location: FF_X27_Y18_N50
+dffeas \soc_inst|m0_1|u_logic|Vve3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vve3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vve3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vve3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mxa2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Du9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Aw9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Du9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Du9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Du9wx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Euh3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & 
+// \soc_inst|m0_1|u_logic|G0w2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Euh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Du9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Du9wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Du9wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Du9wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .lut_mask = 64'hD000000000000000;
-defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .lut_mask = 64'h0000000800000000;
+defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P82wx4~0 (
+// Location: LABCELL_X27_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P82wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( \soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & !\soc_inst|m0_1|u_logic|Y8q2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( \soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( !\soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q ) 
-// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( !\soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|I0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Y9l2z4~q )))) # (\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ) # (\soc_inst|m0_1|u_logic|Y9l2z4~q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & (\soc_inst|m0_1|u_logic|Y9l2z4~q  & ((!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Y9l2z4~q )))) # (\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ) # (\soc_inst|m0_1|u_logic|Y9l2z4~q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9l2z4~q  & ((!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Du9wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P82wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P82wx4~0 .lut_mask = 64'hAAF3AAF3AAF3AAC0;
-defparam \soc_inst|m0_1|u_logic|P82wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .lut_mask = 64'h0F0ACF8A0302CF8A;
+defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~3 (
+// Location: FF_X27_Y18_N8
+dffeas \soc_inst|m0_1|u_logic|Y9l2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y9l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y9l2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[8]~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o~3_combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (((\soc_inst|m0_1|u_logic|Add3~93_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|P82wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~93_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~93_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (\soc_inst|m0_1|u_logic|Add3~93_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  = ( \soc_inst|m0_1|u_logic|P12wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Wq5wx4~combout  & \soc_inst|m0_1|u_logic|Zhyvx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~93_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o~3 .lut_mask = 64'h050505FF373737FF;
-defparam \soc_inst|m0_1|u_logic|haddr_o~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zcivx4~0 (
+// Location: LABCELL_X27_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2f3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zcivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|H2f3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( \soc_inst|m0_1|u_logic|H2f3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|H2f3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zcivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .lut_mask = 64'h4545EFEF4500EF00;
-defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .lut_mask = 64'h50FA50FA00FF00FF;
+defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X19_Y10_N49
-dffeas \soc_inst|m0_1|u_logic|Y8q2z4 (
+// Location: FF_X27_Y18_N35
+dffeas \soc_inst|m0_1|u_logic|H2f3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zcivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -42139,2105 +42308,2063 @@ dffeas \soc_inst|m0_1|u_logic|Y8q2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|H2f3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y8q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y8q2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H2f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H2f3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y8_N35
-dffeas \soc_inst|m0_1|u_logic|If33z4 (
+// Location: MLABCELL_X25_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhvvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  
+// & !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .lut_mask = 64'h0000010000000000;
+defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|m0_1|u_logic|T8f3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|m0_1|u_logic|T8f3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & (\soc_inst|m0_1|u_logic|T8f3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .lut_mask = 64'h00E0EEEE00EE00EE;
+defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y18_N29
+dffeas \soc_inst|m0_1|u_logic|T8f3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|If33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|T8f3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|If33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|If33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T8f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T8f3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y7_N25
-dffeas \soc_inst|m0_1|u_logic|Z523z4 (
+// Location: FF_X27_Y18_N5
+dffeas \soc_inst|m0_1|u_logic|Kkb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z523z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kkb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z523z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z523z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kkb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kkb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~1 (
+// Location: LABCELL_X27_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kss2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kq92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Z523z4~q  & ( (!\soc_inst|m0_1|u_logic|If33z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Z523z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|If33z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kss2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|If33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z523z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kq92z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .lut_mask = 64'h00E0000000200000;
-defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y8_N14
-dffeas \soc_inst|m0_1|u_logic|Rbo2z4 (
+// Location: FF_X27_Y18_N17
+dffeas \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rbo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rbo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y8_N50
-dffeas \soc_inst|m0_1|u_logic|Ay53z4 (
+// Location: FF_X27_Y18_N2
+dffeas \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ay53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ay53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ay53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y8_N46
-dffeas \soc_inst|m0_1|u_logic|Ro43z4 (
+// Location: FF_X27_Y18_N43
+dffeas \soc_inst|m0_1|u_logic|Gcb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ro43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gcb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ro43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ro43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gcb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gcb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y8_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~0 (
+// Location: LABCELL_X27_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kq92z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ro43z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ay53z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Whzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gcb3z4~q  & ( \soc_inst|m0_1|u_logic|Vve3z4~q  & ( (\soc_inst|m0_1|u_logic|Y9l2z4~q  & ((!\soc_inst|m0_1|u_logic|Kkb3z4~q  & (!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Kkb3z4~q  & ((!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gcb3z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Vve3z4~q  & ( (\soc_inst|m0_1|u_logic|Kkb3z4~q  & (\soc_inst|m0_1|u_logic|Y9l2z4~q  & !\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ay53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ro43z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kq92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .lut_mask = 64'h0000320200000000;
-defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y5_N38
-dffeas \soc_inst|m0_1|u_logic|O403z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O403z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O403z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y5_N26
-dffeas \soc_inst|m0_1|u_logic|I113z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I113z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I113z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I113z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .lut_mask = 64'h0000000005000D04;
+defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~2 (
+// Location: LABCELL_X27_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whzwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kq92z4~2_combout  = ( !\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|I113z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I113z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I113z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Whzwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Whzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H2f3z4~q  & \soc_inst|m0_1|u_logic|T8f3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I113z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kq92z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .lut_mask = 64'h5000400010000000;
-defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hs92z4~0 (
+// Location: LABCELL_X27_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hs92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cao2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fjzwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vve3z4~q ) # (!\soc_inst|m0_1|u_logic|Y9l2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cao2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hs92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .lut_mask = 64'h0000000020000000;
-defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .lut_mask = 64'hFAFAFAFA00000000;
+defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~3 (
+// Location: LABCELL_X27_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qlzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kq92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Kq92z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Hs92z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kq92z4~1_combout  & (!\soc_inst|m0_1|u_logic|Kq92z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rbo2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kkb3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kq92z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rbo2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kq92z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kq92z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hs92z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kq92z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .lut_mask = 64'h8C00000000000000;
-defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U11wx4~0 (
+// Location: LABCELL_X24_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yizwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U11wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( \soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( \soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ym93z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ym93z4~q 
-// ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ym93z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Yizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Svs2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kq92z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U11wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U11wx4~0 .lut_mask = 64'hE4F5E4F5E4F5E4A0;
-defparam \soc_inst|m0_1|u_logic|U11wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .lut_mask = 64'h3333333355555555;
+defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~69 (
+// Location: LABCELL_X24_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mczwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~69_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~66  ))
-// \soc_inst|m0_1|u_logic|Add5~70  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~66  ))
+// \soc_inst|m0_1|u_logic|Mczwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & \soc_inst|m0_1|u_logic|Qlzwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~66 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~69_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~70 ),
+	.combout(\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~69 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~69 .lut_mask = 64'h00008877000000F0;
-defparam \soc_inst|m0_1|u_logic|Add5~69 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .lut_mask = 64'h005000500FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~73 (
+// Location: LABCELL_X29_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2owx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~70  ))
-// \soc_inst|m0_1|u_logic|Add5~74  = CARRY(( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~70  ))
+// \soc_inst|m0_1|u_logic|T2owx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|J6i2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~70 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~73_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~74 ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~73 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~73 .lut_mask = 64'h0000FF0F00007788;
-defparam \soc_inst|m0_1|u_logic|Add5~73 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T2owx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T2owx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|T2owx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bv0wx4 (
+// Location: LABCELL_X29_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qwowx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bv0wx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~85_sumout  & ( \soc_inst|m0_1|u_logic|Add5~73_sumout  & ( (((\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~85_sumout  & ( \soc_inst|m0_1|u_logic|Add5~73_sumout  & ( ((\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~85_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( ((\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~85_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qwowx4~combout  = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Mjl2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~85_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qwowx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bv0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bv0wx4 .lut_mask = 64'h005533770F5F3F7F;
-defparam \soc_inst|m0_1|u_logic|Bv0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qwowx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qwowx4 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|m0_1|u_logic|Qwowx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tmjvx4~0 (
+// Location: LABCELL_X27_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vytvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tmjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Plx2z4~q 
-// ))) # (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bv0wx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Plx2z4~q ))) # (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Bv0wx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bv0wx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vytvx4~combout  = (\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|Qwowx4~combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tmjvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .lut_mask = 64'h0000FAFAFA32FA32;
-defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vytvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vytvx4 .lut_mask = 64'h0505050505050505;
+defparam \soc_inst|m0_1|u_logic|Vytvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y5_N28
-dffeas \soc_inst|m0_1|u_logic|H4p2z4 (
+// Location: FF_X23_Y19_N23
+dffeas \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tmjvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H4p2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H4p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H4p2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y7_N26
-dffeas \soc_inst|m0_1|u_logic|U9u2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U9u2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tqc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Tqc3z4~q  & ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Tqc3z4~q  & ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout ) 
+// # (!\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tqc3z4~q  & ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zyovx4~combout  & !\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U9u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .lut_mask = 64'h3030FCFC0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N19
-dffeas \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE (
+// Location: FF_X22_Y19_N19
+dffeas \soc_inst|m0_1|u_logic|Tqc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Tqc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tqc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tqc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N46
-dffeas \soc_inst|m0_1|u_logic|U573z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txa2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Txa2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Cam2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U573z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U573z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .lut_mask = 64'h0000000000100000;
+defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4~1 (
+// Location: LABCELL_X23_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zyhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xcuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ozo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|U9u2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ozo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|U9u2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ozo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|U9u2z4~q  & ((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ozo2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|U9u2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Zyhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rym2z4~q  & ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Rym2z4~q  & ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout  & (!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ((!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rym2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U9u2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ozo2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .lut_mask = 64'h00473347CC47FF47;
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .lut_mask = 64'h5544F5C40000FFCC;
+defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y9_N46
-dffeas \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE (
+// Location: FF_X23_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|Rym2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Rym2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rym2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rym2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y10_N38
-dffeas \soc_inst|m0_1|u_logic|Djv2z4 (
+// Location: FF_X24_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Dks2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Djv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dks2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Djv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dks2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dks2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N16
-dffeas \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE (
+// Location: FF_X24_Y19_N23
+dffeas \soc_inst|m0_1|u_logic|Lns2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Lns2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xcuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Djv2z4~q  & ( \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Zxo2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djv2z4~q  & ( \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Zxo2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Djv2z4~q  & ( !\soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zxo2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djv2z4~q  & ( !\soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Zxo2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Zxo2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Djv2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .lut_mask = 64'h470047CC473347FF;
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lns2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lns2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4 (
+// Location: LABCELL_X22_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xcuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Xcuwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xcuwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xcuwx4~1_combout  
-// & ( !\soc_inst|m0_1|u_logic|Xcuwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Xcuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  
-// ) ) )
+// \soc_inst|m0_1|u_logic|Jsc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Jsc3z4~q  & ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ) # (!\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsc3z4~q 
+//  & ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & !\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jsc3z4~q  & ( !\soc_inst|m0_1|u_logic|Zyovx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xcuwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xcuwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xcuwx4 .lut_mask = 64'h5555050550500000;
-defparam \soc_inst|m0_1|u_logic|Xcuwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yj92z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Cn43z4~q  & ( (!\soc_inst|m0_1|u_logic|Lw53z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Cn43z4~q  & ( (!\soc_inst|m0_1|u_logic|Lw53z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Cn43z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Lw53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cn43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yj92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .lut_mask = 64'h0300020000000200;
-defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .lut_mask = 64'h0000FFFF5050FAFA;
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y7_N44
-dffeas \soc_inst|m0_1|u_logic|S2p2z4 (
+// Location: FF_X22_Y19_N25
+dffeas \soc_inst|m0_1|u_logic|Jsc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S2p2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jsc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S2p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S2p2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jsc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jsc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y9_N38
-dffeas \soc_inst|m0_1|u_logic|D1p2z4 (
+// Location: FF_X23_Y19_N20
+dffeas \soc_inst|m0_1|u_logic|Uls2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D1p2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uls2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D1p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D1p2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uls2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uls2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vl92z4~0 (
+// Location: LABCELL_X24_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsa2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vl92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|D1p2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( (\soc_inst|m0_1|u_logic|Trq2z4~q  & (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Tdp2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|D1p2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vl92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .lut_mask = 64'h0000000040000000;
-defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .lut_mask = 64'h0000100000000000;
+defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y10_N32
-dffeas \soc_inst|m0_1|u_logic|K423z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Syhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Syhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Lul2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( ((\soc_inst|m0_1|u_logic|Lul2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Lul2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( \soc_inst|m0_1|u_logic|Lul2z4~q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K423z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K423z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .lut_mask = 64'h333322223F0F2A0A;
+defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y11_N14
-dffeas \soc_inst|m0_1|u_logic|Td33z4 (
+// Location: FF_X25_Y19_N13
+dffeas \soc_inst|m0_1|u_logic|Lul2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Td33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lul2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Td33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Td33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lul2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lul2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~1 (
+// Location: LABCELL_X23_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yj92z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Td33z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Xwvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uls2z4~q  & ( \soc_inst|m0_1|u_logic|Lul2z4~q  & ( (\soc_inst|m0_1|u_logic|Jsc3z4~q  & ((!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Dks2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Lns2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uls2z4~q  & ( \soc_inst|m0_1|u_logic|Lul2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dks2z4~q  & (!\soc_inst|m0_1|u_logic|Lns2z4~q  & 
+// \soc_inst|m0_1|u_logic|Jsc3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Td33z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yj92z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .lut_mask = 64'h0A000C0000000000;
-defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .lut_mask = 64'h00000000002000BA;
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~2 (
+// Location: LABCELL_X23_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yj92z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Z203z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tz03z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xwvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tqc3z4~q  & \soc_inst|m0_1|u_logic|Rym2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z203z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tz03z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yj92z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .lut_mask = 64'h0000A00000008800;
-defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .lut_mask = 64'h0033003300000000;
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~3 (
+// Location: LABCELL_X23_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kizwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yj92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Yj92z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yj92z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yj92z4~0_combout  & (!\soc_inst|m0_1|u_logic|Vl92z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|S2p2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uls2z4~q  & ( (\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Uls2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yj92z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S2p2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vl92z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yj92z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yj92z4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yj92z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .lut_mask = 64'h8C00000000000000;
-defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .lut_mask = 64'h5500550055FF55FF;
+defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hy0wx4~0 (
+// Location: LABCELL_X23_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Xcuwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ym93z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ym93z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|H4p2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ym93z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|H4p2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Arzwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lul2z4~q  & ( (!\soc_inst|m0_1|u_logic|Jsc3z4~q  & !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Lul2z4~q  & ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yj92z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .lut_mask = 64'hE4E4E4E4F5F5A0F5;
-defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .lut_mask = 64'hFF00FF00F000F000;
+defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fx0wx4~0 (
+// Location: FF_X23_Y19_N14
+dffeas \soc_inst|m0_1|u_logic|Tib3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tib3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tib3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tib3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[12]~19 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fx0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fx0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .lut_mask = 64'hFAACACFAF0A0A0F0;
-defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .lut_mask = 64'h00FF00FF55555555;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iv0wx4~1 (
+// Location: LABCELL_X22_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dpc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iv0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~73_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Dpc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dpc3z4~q  & ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  ) ) # ( \soc_inst|m0_1|u_logic|Dpc3z4~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|J6i2z4~q ) # (!\soc_inst|m0_1|u_logic|Zyovx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dpc3z4~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Zyovx4~combout 
+// ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fx0wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iv0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .lut_mask = 64'h008A0000008A008A;
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .lut_mask = 64'h0A0AFAFA0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iv0wx4~0 (
+// Location: FF_X22_Y19_N4
+dffeas \soc_inst|m0_1|u_logic|Dpc3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dpc3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dpc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kwa2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mx0wx4~combout  & ( \soc_inst|m0_1|u_logic|Iv0wx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Cam2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .lut_mask = 64'h00000000000037FF;
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .lut_mask = 64'h0000000000000004;
+defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N20
-dffeas \soc_inst|m0_1|u_logic|Df83z4 (
+// Location: FF_X23_Y19_N44
+dffeas \soc_inst|m0_1|u_logic|Oar2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Df83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Oar2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Df83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oar2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oar2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y7_N25
-dffeas \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE (
+// Location: LABCELL_X23_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nzhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( \soc_inst|m0_1|u_logic|Oar2z4~q  & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( \soc_inst|m0_1|u_logic|Oar2z4~q  & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout  & (!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Oar2z4~q  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .lut_mask = 64'h54540000FC54FCFC;
+defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y19_N43
+dffeas \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y19_N50
+dffeas \soc_inst|m0_1|u_logic|Pab3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pab3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pab3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pab3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~7 (
+// Location: LABCELL_X22_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mis2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Djv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Djv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Djv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Mis2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Djv2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .lut_mask = 64'h1100010010000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y9_N37
-dffeas \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE (
+// Location: FF_X23_Y19_N11
+dffeas \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N17
-dffeas \soc_inst|m0_1|u_logic|Uj93z4 (
+// Location: FF_X23_Y19_N4
+dffeas \soc_inst|m0_1|u_logic|D4g3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uj93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|D4g3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uj93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uj93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D4g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D4g3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N47
-dffeas \soc_inst|m0_1|u_logic|U573z4 (
+// Location: LABCELL_X22_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4g3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D4g3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( \soc_inst|m0_1|u_logic|D4g3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|D4g3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .lut_mask = 64'h2E2E2E2E0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y19_N5
+dffeas \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U573z4~q ),
+	.q(\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U573z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U573z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~6 (
+// Location: LABCELL_X23_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Uj93z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|U573z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zxvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Pab3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Tib3z4~q ))) # (\soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pab3z4~q  & (!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tib3z4~q ))) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uj93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U573z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zxvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .lut_mask = 64'h00000A0000000404;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .lut_mask = 64'h00000000000040F4;
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~8 (
+// Location: LABCELL_X23_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Df83z4~q  & (!\soc_inst|m0_1|u_logic|Yw0wx4~7_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Yw0wx4~7_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zxvwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Zxvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dpc3z4~q  & \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df83z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yw0wx4~7_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~6_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .lut_mask = 64'hC0CC404400000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .lut_mask = 64'h0033003300000000;
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4 (
+// Location: LABCELL_X23_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dizwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~combout  = ( \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|Dizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Tib3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[17]~17 (
+// Location: LABCELL_X23_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Yw0wx4~combout  & (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Tqzwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .lut_mask = 64'h00300030FF3FFF3F;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y10_N40
-dffeas \soc_inst|m0_1|u_logic|B2i3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B2i3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fczwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fczwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kizwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Arzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Kizwx4~0_combout ))) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B2i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B2i3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .lut_mask = 64'h003F003F33333333;
+defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pomvx4~0 (
+// Location: LABCELL_X23_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S3i3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|B2i3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S3i3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|B2i3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|S3i3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~29_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S3i3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~29_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|B6pwx4~1_combout  = (\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & \soc_inst|m0_1|u_logic|Arzwx4~1_combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Add0~29_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B2i3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .lut_mask = 64'h4F4FEFEF0F5FAFFF;
-defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y9_N26
-dffeas \soc_inst|m0_1|u_logic|S3i3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S3i3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ihzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bus2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jxs2z4~q  ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S3i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S3i3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .lut_mask = 64'h3333333300FF00FF;
+defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~17 (
+// Location: LABCELL_X27_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Clzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|O0o2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~30  ))
-// \soc_inst|m0_1|u_logic|Add0~18  = CARRY(( !\soc_inst|m0_1|u_logic|O0o2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~30  ))
+// \soc_inst|m0_1|u_logic|Clzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gcb3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~30 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~17_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~18 ),
+	.combout(\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~17 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iomvx4~0 (
+// Location: LABCELL_X24_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O0o2z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Xyn2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O0o2z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Xyn2z4~q  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|O0o2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~17_sumout ) # (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O0o2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~17_sumout  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|T5zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & \soc_inst|m0_1|u_logic|B6pwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Yizwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Yizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & \soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xyn2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add0~17_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iomvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .lut_mask = 64'h33F3FFF33377FF77;
-defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .lut_mask = 64'h11115DDD51115D5D;
+defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y10_N17
-dffeas \soc_inst|m0_1|u_logic|O0o2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Iomvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O0o2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B6pwx4~2_combout  = ( \soc_inst|m0_1|u_logic|T5zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fczwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~1_combout  & \soc_inst|m0_1|u_logic|Mczwx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|T5zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fczwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B6pwx4~1_combout  ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O0o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O0o2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .lut_mask = 64'h0000F0F0000000F0;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~53 (
+// Location: LABCELL_X24_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jpa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~18  ))
-// \soc_inst|m0_1|u_logic|Add0~54  = CARRY(( !\soc_inst|m0_1|u_logic|Jpa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~18  ))
+// \soc_inst|m0_1|u_logic|B6pwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fczwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & \soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fczwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Mczwx4~0_combout  & !\soc_inst|m0_1|u_logic|B6pwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Mczwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|B6pwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~18 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~53_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~54 ),
+	.combout(\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~53 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~53 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~53 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .lut_mask = 64'h1F111F1111111111;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~45 (
+// Location: LABCELL_X24_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iazwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Z2h3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~54  ))
-// \soc_inst|m0_1|u_logic|Add0~46  = CARRY(( !\soc_inst|m0_1|u_logic|Z2h3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~54  ))
+// \soc_inst|m0_1|u_logic|Iazwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Dks2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lns2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~54 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~45_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~46 ),
+	.combout(\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~45 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~45 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~45 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unmvx4~0 (
+// Location: LABCELL_X23_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Unmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|I1h3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z2h3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~45_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|I1h3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|I1h3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z2h3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~45_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|I1h3z4~q )))) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Arzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pab3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I1h3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add0~45_sumout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .lut_mask = 64'h7377FBFF3337BBBF;
-defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .lut_mask = 64'hCCCCCCCCF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y13_N37
-dffeas \soc_inst|m0_1|u_logic|Z2h3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z2h3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pazwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pazwx4~combout  = ( \soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Iazwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Kizwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Arzwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Iazwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Iazwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Arzwx4~0_combout  & \soc_inst|m0_1|u_logic|Kizwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Arzwx4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Iazwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Arzwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Arzwx4~1_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z2h3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z2h3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pazwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pazwx4 .lut_mask = 64'h2AAA222AAAAA22AA;
+defparam \soc_inst|m0_1|u_logic|Pazwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~69 (
+// Location: LABCELL_X24_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ogo2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~46  ))
-// \soc_inst|m0_1|u_logic|Add0~70  = CARRY(( !\soc_inst|m0_1|u_logic|Ogo2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~46  ))
+// \soc_inst|m0_1|u_logic|J7zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pazwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Pab3z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pazwx4~combout  & ( !\soc_inst|m0_1|u_logic|Iazwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~46 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~69_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~70 ),
+	.combout(\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~69 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~69 .lut_mask = 64'h000000000000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add0~69 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .lut_mask = 64'hFF00FF00E2E2E2E2;
+defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y5_N13
-dffeas \soc_inst|m0_1|u_logic|Llq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Llq2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Llq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Llq2z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X24_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H6zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & (\soc_inst|m0_1|u_logic|Mczwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Fczwx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & (((\soc_inst|m0_1|u_logic|Fczwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & (\soc_inst|m0_1|u_logic|Mczwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Fczwx4~0_combout ))) ) )
 
-// Location: FF_X43_Y5_N28
-dffeas \soc_inst|m0_1|u_logic|Poq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Poq2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Poq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Poq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .lut_mask = 64'h5533553353335333;
+defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~1 (
+// Location: LABCELL_X23_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( \soc_inst|m0_1|u_logic|Poq2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Llq2z4~q  & ( !\soc_inst|m0_1|u_logic|Poq2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( !\soc_inst|m0_1|u_logic|Poq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  $ 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|G2zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pazwx4~combout  & (\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ((\soc_inst|m0_1|u_logic|B6pwx4~3_combout ) # 
+// (\soc_inst|m0_1|u_logic|B6pwx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pazwx4~combout  & (\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & \soc_inst|m0_1|u_logic|B6pwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Poq2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .lut_mask = 64'h8040004080000000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .lut_mask = 64'h0022002202220222;
+defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y8_N14
-dffeas \soc_inst|m0_1|u_logic|Rz13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rz13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rz13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rz13z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X23_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J0zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J0zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|H6zwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) )
 
-// Location: FF_X52_Y7_N1
-dffeas \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .lut_mask = 64'h030F030F330F330F;
+defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~0 (
+// Location: MLABCELL_X21_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fb0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Rz13z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Fb0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pcd3z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rz13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .lut_mask = 64'h40400000A0000000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .lut_mask = 64'h00FF00FF33333333;
+defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y8_N23
-dffeas \soc_inst|m0_1|u_logic|Ji43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ji43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ji43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ji43z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X21_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S00xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S00xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fed3z4~q  & ( (\soc_inst|m0_1|u_logic|Lhd3z4~q ) # (\soc_inst|m0_1|u_logic|D0wwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fed3z4~q  & ( (!\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Lhd3z4~q ) ) )
 
-// Location: FF_X47_Y8_N2
-dffeas \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S00xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S00xx4~0 .lut_mask = 64'h00AA00AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|S00xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~2 (
+// Location: MLABCELL_X21_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kbzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ji43z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ji43z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kbzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ((\soc_inst|m0_1|u_logic|S00xx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout )) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ((\soc_inst|m0_1|u_logic|S00xx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout  & 
+// (((\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|S00xx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|I90xx4~1_combout )) # (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ji43z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .lut_mask = 64'h1000100010100000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y5_N41
-dffeas \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .lut_mask = 64'h007F407744774477;
+defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D03xx4~0 (
+// Location: MLABCELL_X25_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jzzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D03xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jzzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xdb3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D03xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D03xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D03xx4~0 .lut_mask = 64'h0800000000000000;
-defparam \soc_inst|m0_1|u_logic|D03xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .lut_mask = 64'h5555555500FF00FF;
+defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y4_N41
-dffeas \soc_inst|m0_1|u_logic|A933z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|A933z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A933z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|A933z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X28_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qzzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|Q6l2z4~q  ) )
 
-// Location: FF_X42_Y4_N4
-dffeas \soc_inst|m0_1|u_logic|Sr53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sr53z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sr53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sr53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~3 (
+// Location: LABCELL_X22_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Czzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|A933z4~q )) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Sr53z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Czzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N10xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Qzzwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|N10xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A933z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sr53z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .lut_mask = 64'h0000000000008A80;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .lut_mask = 64'h007F207722772277;
+defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N5
-dffeas \soc_inst|m0_1|u_logic|P9h3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|P9h3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P9h3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|P9h3z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X22_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R4zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R4zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|I90xx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & !\soc_inst|m0_1|u_logic|Adzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|I90xx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~2_combout  & \soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & (!\soc_inst|m0_1|u_logic|I90xx4~2_combout  & (\soc_inst|m0_1|u_logic|Adzwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kbzwx4~0_combout ))) ) ) )
 
-// Location: FF_X42_Y5_N46
-dffeas \soc_inst|m0_1|u_logic|A8h3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|A8h3z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A8h3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|A8h3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .lut_mask = 64'h000800CC73FF33FF;
+defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~4 (
+// Location: LABCELL_X24_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|P9h3z4~q  & ( \soc_inst|m0_1|u_logic|A8h3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|P9h3z4~q  & ( !\soc_inst|m0_1|u_logic|A8h3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P9h3z4~q  & ( !\soc_inst|m0_1|u_logic|A8h3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Vzywx4~0_combout  = ( \soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T5zwx4~0_combout  & (!\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & !\soc_inst|m0_1|u_logic|B6pwx4~3_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B6pwx4~3_combout ) # (\soc_inst|m0_1|u_logic|T5zwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|P9h3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|A8h3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .lut_mask = 64'h5000100040000000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .lut_mask = 64'h55FF55FF50005000;
+defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~5 (
+// Location: LABCELL_X23_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Ce0wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Ce0wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ce0wx4~2_combout  & !\soc_inst|m0_1|u_logic|D03xx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vzywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & \soc_inst|m0_1|u_logic|R4zwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & !\soc_inst|m0_1|u_logic|H6zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R4zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (!\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & (\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|R4zwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ce0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D03xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .lut_mask = 64'h000875FF00AA55FF;
+defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N52
-dffeas \soc_inst|m0_1|u_logic|B5u2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B5u2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B5u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B5u2z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X23_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C0zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hzj2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hzj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|J0zwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((!\soc_inst|m0_1|u_logic|Aqp2z4~q  & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q 
+// ) # (\soc_inst|m0_1|u_logic|J0zwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Aqp2z4~q  & (!\soc_inst|m0_1|u_logic|Qrp2z4~q  & \soc_inst|m0_1|u_logic|J0zwx4~0_combout )))) ) ) )
 
-// Location: FF_X43_Y5_N19
-dffeas \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .lut_mask = 64'h008E00CF00FF00FF;
+defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~7 (
+// Location: LABCELL_X23_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2uvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B5u2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|B5u2z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|I2uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( !\soc_inst|m0_1|u_logic|Lz93z4~q  & ( (\soc_inst|m0_1|u_logic|K3l2z4~q  & (\soc_inst|m0_1|u_logic|T2owx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffs2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B5u2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .lut_mask = 64'h0023002000000000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X52_Y7_N8
-dffeas \soc_inst|m0_1|u_logic|Ka83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ka83z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ka83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ka83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .lut_mask = 64'h1010000000000000;
+defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X52_Y7_N14
-dffeas \soc_inst|m0_1|u_logic|B173z4 (
+// Location: FF_X24_Y19_N1
+dffeas \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B173z4~q ),
+	.q(\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B173z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B173z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N58
-dffeas \soc_inst|m0_1|u_logic|Bf93z4 (
+// Location: FF_X27_Y20_N28
+dffeas \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bf93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bf93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bf93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~6 (
+// Location: MLABCELL_X28_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bf93z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|B173z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Bf93z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Bf93z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|B173z4~q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|R40wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Pdbwx4~combout )))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Gm1wx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Pdbwx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Gm1wx4~combout )) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B173z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bf93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .lut_mask = 64'h0040000500400000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y5_N58
-dffeas \soc_inst|m0_1|u_logic|Ebh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ebh3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ebh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .lut_mask = 64'hF3D1E2C0F3D1E2C0;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~8 (
+// Location: MLABCELL_X28_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Knvvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout  & (\soc_inst|m0_1|u_logic|Ka83z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout  & \soc_inst|m0_1|u_logic|Ebh3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout  & 
-// (\soc_inst|m0_1|u_logic|Ka83z4~q  & !\soc_inst|m0_1|u_logic|Ce0wx4~6_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout  & \soc_inst|m0_1|u_logic|Ebh3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout  & 
-// !\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Knvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ny3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ka83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ebh3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .lut_mask = 64'hA0A000A020200020;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4 (
+// Location: MLABCELL_X28_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sx3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~combout  = (\soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & \soc_inst|m0_1|u_logic|Ce0wx4~8_combout )
+// \soc_inst|m0_1|u_logic|Sx3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & !\soc_inst|m0_1|u_logic|Izpvx4~combout )) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Izpvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Izpvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4 .lut_mask = 64'h000F000F000F000F;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .lut_mask = 64'h5511450154104400;
+defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[21]~15 (
+// Location: LABCELL_X27_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imvvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  = ( \soc_inst|m0_1|u_logic|Ce0wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q )) # (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ce0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Imvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wfuwx4~combout  & \soc_inst|m0_1|u_logic|K3l2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .lut_mask = 64'h00DD00DD22FF22FF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y10_N14
-dffeas \soc_inst|m0_1|u_logic|Ieh3z4 (
+// Location: FF_X27_Y20_N5
+dffeas \soc_inst|m0_1|u_logic|Wbk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+	.d(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ieh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wbk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ieh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ieh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wbk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wbk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nnmvx4~0 (
+// Location: LABCELL_X27_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nnmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ogo2z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ogo2z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Ieh3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ogo2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Add0~69_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ogo2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~69_sumout  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|T5mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wbk2z4~q  & ((!\soc_inst|m0_1|u_logic|Uaj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|R1w2z4~q )))) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wbk2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add0~69_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ieh3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T5mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .lut_mask = 64'h22FFEEFF03FFCFFF;
-defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .lut_mask = 64'h5555555555545554;
+defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y11_N31
-dffeas \soc_inst|m0_1|u_logic|Ogo2z4 (
+// Location: LABCELL_X27_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T5mvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T5mvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|K3l2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Knvvx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|T5mvx4~0_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T5mvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .lut_mask = 64'h0000FFFFFFFAFFFF;
+defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y20_N4
+dffeas \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -44246,6494 +44373,7572 @@ dffeas \soc_inst|m0_1|u_logic|Ogo2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y20_N38
+dffeas \soc_inst|m0_1|u_logic|X9n2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X9n2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X9n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X9n2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y20_N31
+dffeas \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ogo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ogo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~85 (
+// Location: LABCELL_X29_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4pwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ddi3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~70  ))
-// \soc_inst|m0_1|u_logic|Add0~86  = CARRY(( !\soc_inst|m0_1|u_logic|Ddi3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~70  ))
+// \soc_inst|m0_1|u_logic|S4pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uyv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|X9n2z4~q  & !\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|X9n2z4~q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uyv2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~70 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~85_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~86 ),
+	.combout(\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~85 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~85 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~85 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .lut_mask = 64'h00000000FFDDDFCD;
+defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cma3z4~0 (
+// Location: LABCELL_X29_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hzywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cma3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  )
+// \soc_inst|m0_1|u_logic|Hzywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|S4pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|S4pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|S4pwx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y10_N19
-dffeas \soc_inst|m0_1|u_logic|Cma3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cma3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cma3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cma3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .lut_mask = 64'h0000FFFF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gnmvx4~0 (
+// Location: LABCELL_X29_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tyywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gnmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ddi3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cma3z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ddi3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Cma3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ddi3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Add0~85_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ddi3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~85_sumout  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Tyywx4~0_combout  = (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout  & (\soc_inst|m0_1|u_logic|X9n2z4~q )) # (\soc_inst|m0_1|u_logic|S4pwx4~0_combout  & ((\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q )))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add0~85_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cma3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .lut_mask = 64'h22FFEEFF03FFCFFF;
-defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y11_N8
-dffeas \soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .lut_mask = 64'h505F505F505F505F;
+defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~0 (
+// Location: LABCELL_X23_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y7iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cma3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|I7owx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cma3z4~q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|G6owx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Pwywx4~0_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & \soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cma3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .lut_mask = 64'h0CFF0CFF0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~1 (
+// Location: LABCELL_X23_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ozywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y7iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Y7iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Avowx4~2_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[22]~35_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ozywx4~0_combout  = ( \soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|H6zwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Hzj2z4~q  & (((\soc_inst|m0_1|u_logic|Qrp2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((\soc_inst|m0_1|u_logic|H6zwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Hzj2z4~q  & (\soc_inst|m0_1|u_logic|Qrp2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|A6zwx4~0_combout  
+// & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hzj2z4~q ) # (\soc_inst|m0_1|u_logic|Qrp2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hzj2z4~q ) # (\soc_inst|m0_1|u_logic|Qrp2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Avowx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .lut_mask = 64'h05010F030511AF33;
+defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~2 (
+// Location: LABCELL_X23_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Y7iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Zudwx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Asdwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Gvywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q ) # (\soc_inst|m0_1|u_logic|Aqp2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Aqp2z4~q  & \soc_inst|m0_1|u_logic|Hzj2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Hzj2z4~q ) # ((\soc_inst|m0_1|u_logic|Qrp2z4~q  & !\soc_inst|m0_1|u_logic|J0zwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Aqp2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  
+// & ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Aqp2z4~q  & (!\soc_inst|m0_1|u_logic|Qrp2z4~q  & (\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & \soc_inst|m0_1|u_logic|Hzj2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .lut_mask = 64'h00000000CDEFCDEF;
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .lut_mask = 64'h0004FF750055FF55;
+defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E9zvx4~0 (
+// Location: LABCELL_X23_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5owx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & \soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & \soc_inst|m0_1|u_logic|F8iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|E5owx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wwywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwywx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwywx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout  & !\soc_inst|m0_1|u_logic|Tyywx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pwywx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E9zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .lut_mask = 64'h0AFF0AFF0A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E5owx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E5owx4~0 .lut_mask = 64'h8F00EF00AF00FF00;
+defparam \soc_inst|m0_1|u_logic|E5owx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E9zvx4~1 (
+// Location: LABCELL_X22_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E9zvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|E9zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|E9zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|X2rvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E9zvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .lut_mask = 64'h50F0000055FF0000;
-defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1ewx4~0 (
+// Location: MLABCELL_X21_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E1ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Nrvwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Wfuwx4~combout  & (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|V3o2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wfuwx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & !\soc_inst|m0_1|u_logic|G2zwx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( \soc_inst|m0_1|u_logic|V3o2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|V3o2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .lut_mask = 64'h33333333FFFF0000;
-defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .lut_mask = 64'h0000555503005755;
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1ewx4~1 (
+// Location: LABCELL_X19_Y16_N24
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~15 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E1ewx4~1_combout  = (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & (\soc_inst|m0_1|u_logic|Eudwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ((\soc_inst|m0_1|u_logic|E1ewx4~0_combout )))
+// \soc_inst|interconnect_1|HRDATA[8]~15_combout  = ( \soc_inst|ram_1|read_cycle~q  & ( \soc_inst|interconnect_1|HRDATA[7]~9_combout  & ( ((\soc_inst|ram_1|byte_select [1] & \soc_inst|interconnect_1|mux_sel [0])) # (\soc_inst|interconnect_1|mux_sel [1]) ) ) 
+// ) # ( !\soc_inst|ram_1|read_cycle~q  & ( \soc_inst|interconnect_1|HRDATA[7]~9_combout  & ( \soc_inst|interconnect_1|mux_sel [1] ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|ram_1|byte_select [1]),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|read_cycle~q ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[7]~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[8]~15_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .lut_mask = 64'h303F303F303F303F;
-defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~15 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~15 .lut_mask = 64'h0000000033333737;
+defparam \soc_inst|interconnect_1|HRDATA[8]~15 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~0 (
+// Location: IOIBUF_X4_Y0_N18
+cyclonev_io_ibuf \SW[8]~input (
+	.i(SW[8]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[8]~input_o ));
+// synopsys translate_off
+defparam \SW[8]~input .bus_hold = "false";
+defparam \SW[8]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X19_Y16_N47
+dffeas \soc_inst|switches_1|switch_store[0][8] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[8]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][8]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][8] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][8] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y17_N0
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[8]~28 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jtdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Eudwx4~1_combout  ) )
+// \soc_inst|ram_1|data_to_memory[8]~28_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (!\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ) # (\soc_inst|ram_1|byte_select [1]))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+	.datab(!\soc_inst|ram_1|byte_select [1]),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[8]~28_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[8]~28 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[8]~28 .lut_mask = 64'h030F030F000C000C;
+defparam \soc_inst|ram_1|data_to_memory[8]~28 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~1 (
+// Location: M10K_X26_Y11_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[8]~28_combout ,\soc_inst|ram_1|data_to_memory[0]~27_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_bit_number = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_bit_number = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init0 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037DF7DEA548497ECA1E29A84B1284B12A0B20B20B20B20B20B20B2872AAAAAAAAAAAAAA048EFF3F0FFFFFFFFFFFF3C01554";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y16_N45
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~33 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wwdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|E1ewx4~1_combout  & \soc_inst|m0_1|u_logic|Kqdwx4~0_combout )) ) )
+// \soc_inst|interconnect_1|HRDATA[8]~33_combout  = ( \soc_inst|switches_1|switch_store[0][8]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( \soc_inst|interconnect_1|HRDATA[8]~15_combout  ) ) ) # ( 
+// !\soc_inst|switches_1|switch_store[0][8]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|interconnect_1|HRDATA[8]~15_combout ) ) ) ) # ( 
+// \soc_inst|switches_1|switch_store[0][8]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( (\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|interconnect_1|HRDATA[8]~15_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[8]~15_combout ),
+	.datae(!\soc_inst|switches_1|switch_store[0][8]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .lut_mask = 64'h00000000000C000C;
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~33 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~33 .lut_mask = 64'h0000000F00F000FF;
+defparam \soc_inst|interconnect_1|HRDATA[8]~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~0 (
+// Location: LABCELL_X18_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Add0~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M2b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~34  ))
+// \soc_inst|m0_1|u_logic|Add0~22  = CARRY(( !\soc_inst|m0_1|u_logic|M2b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~34  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~34 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~21_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~22 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .lut_mask = 64'hF5A0F5A000000000;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~21 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add0~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ycu2z4~feeder (
+// Location: LABCELL_X19_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gha3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Gha3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o [2] )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ycu2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ycu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ycu2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y9_N7
-dffeas \soc_inst|m0_1|u_logic|Ycu2z4 (
+// Location: FF_X19_Y18_N2
+dffeas \soc_inst|m0_1|u_logic|Gha3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ycu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gha3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ycu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ycu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gha3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gha3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N16
-dffeas \soc_inst|m0_1|u_logic|Hi83z4 (
+// Location: LABCELL_X18_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qsmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M2b3z4~q  & ( \soc_inst|m0_1|u_logic|Gha3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~21_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M2b3z4~q  & ( \soc_inst|m0_1|u_logic|Gha3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~21_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|M2b3z4~q  & ( !\soc_inst|m0_1|u_logic|Gha3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~21_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|M2b3z4~q  & ( !\soc_inst|m0_1|u_logic|Gha3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~21_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~21_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gha3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .lut_mask = 64'h2F0FEFCF3F1FFFDF;
+defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y18_N13
+dffeas \soc_inst|m0_1|u_logic|M2b3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hi83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M2b3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hi83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hi83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M2b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M2b3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~2 (
+// Location: LABCELL_X18_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~57 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmqwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Ycu2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Hi83z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|W0b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~22  ))
+// \soc_inst|m0_1|u_logic|Add0~58  = CARRY(( !\soc_inst|m0_1|u_logic|W0b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~22  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ycu2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hi83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~22 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~57_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~58 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .lut_mask = 64'h0000000000AC0000;
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~57 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~57 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N14
-dffeas \soc_inst|m0_1|u_logic|B1q2z4 (
+// Location: FF_X19_Y18_N37
+dffeas \soc_inst|m0_1|u_logic|Wia3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B1q2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wia3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B1q2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wia3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wia3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N31
-dffeas \soc_inst|m0_1|u_logic|Hmv2z4 (
+// Location: LABCELL_X17_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W0b3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wia3z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|W0b3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Wia3z4~q  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|W0b3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Add0~57_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0b3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~57_sumout  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Add0~57_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wia3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .lut_mask = 64'h0FAFFFAF0F3FFF3F;
+defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y18_N25
+dffeas \soc_inst|m0_1|u_logic|W0b3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hmv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|W0b3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hmv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W0b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W0b3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~41 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gza3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~58  ))
+// \soc_inst|m0_1|u_logic|Add0~42  = CARRY(( !\soc_inst|m0_1|u_logic|Gza3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~58  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~58 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~41_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~42 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~41 .lut_mask = 64'h000000000000FF00;
+defparam \soc_inst|m0_1|u_logic|Add0~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~3 (
+// Location: LABCELL_X22_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Taa3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmqwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Hmv2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|B1q2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Taa3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o [4] )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B1q2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hmv2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Taa3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .lut_mask = 64'h0404050000000000;
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y9_N29
-dffeas \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE (
+// Location: FF_X22_Y21_N34
+dffeas \soc_inst|m0_1|u_logic|Taa3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Taa3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Taa3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Taa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Taa3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~0 (
+// Location: LABCELL_X22_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Csmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Y873z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Csmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gza3z4~q  & ( \soc_inst|m0_1|u_logic|Taa3z4~q  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~41_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gza3z4~q  & ( \soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~41_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gza3z4~q  & ( !\soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~41_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gza3z4~q  & ( !\soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~41_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y873z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~41_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Taa3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .lut_mask = 64'h0088000000C00000;
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .lut_mask = 64'h5D55FDF55F57FFF7;
+defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N38
-dffeas \soc_inst|m0_1|u_logic|Mzp2z4 (
+// Location: FF_X22_Y21_N4
+dffeas \soc_inst|m0_1|u_logic|Gza3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mzp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gza3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mzp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mzp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gza3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gza3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N59
-dffeas \soc_inst|m0_1|u_logic|No93z4 (
+// Location: LABCELL_X18_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~65 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Qxa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~42  ))
+// \soc_inst|m0_1|u_logic|Add0~66  = CARRY(( !\soc_inst|m0_1|u_logic|Qxa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~42  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~42 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~65_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~66 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~65 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~65 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y20_N32
+dffeas \soc_inst|m0_1|u_logic|Mka3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [5]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|No93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mka3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|No93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|No93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mka3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mka3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~1 (
+// Location: LABCELL_X17_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vrmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Mzp2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|No93z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Vrmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qxa3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Qxa3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Qxa3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~65_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((\soc_inst|m0_1|u_logic|Mka3z4~q )))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Qxa3z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~65_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout 
+//  & ((\soc_inst|m0_1|u_logic|Mka3z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mzp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|No93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add0~65_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mka3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .lut_mask = 64'h00000000000000AC;
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .lut_mask = 64'h0A03FAF3FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hmqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Hmqwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hmqwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hmqwx4~2_combout  & !\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ) ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hmqwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X17_Y18_N7
+dffeas \soc_inst|m0_1|u_logic|Qxa3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmqwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmqwx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|Hmqwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qxa3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mydwx4~0 (
+// Location: LABCELL_X18_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~89 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mydwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Hmqwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Add0~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Z8b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~66  ))
+// \soc_inst|m0_1|u_logic|Add0~90  = CARRY(( !\soc_inst|m0_1|u_logic|Z8b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~66  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~66 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~89_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~90 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .lut_mask = 64'h0F0F00000F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~89 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~89 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0ewx4~1 (
+// Location: LABCELL_X22_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7b3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C0ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|J7b3z4~0_combout  = !\soc_inst|m0_1|u_logic|hwdata_o~4_combout 
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .lut_mask = 64'h0000FFFF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .lut_mask = 64'hFF00FF00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zndwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Zndwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|H2wwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|H2wwx4~combout ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y20_N5
+dffeas \soc_inst|m0_1|u_logic|J7b3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J7b3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .lut_mask = 64'h00330033CCFFCCFF;
-defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J7b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J7b3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzdwx4~0 (
+// Location: MLABCELL_X28_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ormvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ormvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z8b3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~89_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|J7b3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z8b3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~89_sumout )) 
+// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((\soc_inst|m0_1|u_logic|J7b3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Z8b3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Z8b3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add0~89_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|J7b3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .lut_mask = 64'h0000F0F00F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .lut_mask = 64'h3333FFFFB3F7B3F7;
+defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzdwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Vzdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zndwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Zndwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y16_N37
+dffeas \soc_inst|m0_1|u_logic|Z8b3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z8b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z8b3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zndwx4~1 (
+// Location: LABCELL_X18_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zndwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Zndwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zndwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Add0~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dhb3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~90  ))
+// \soc_inst|m0_1|u_logic|Add0~10  = CARRY(( !\soc_inst|m0_1|u_logic|Dhb3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~90  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~90 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~9_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~10 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .lut_mask = 64'h0F0F00000F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~9 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~0 (
+// Location: MLABCELL_X28_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nfb3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sndwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Nfb3z4~0_combout  = !\soc_inst|m0_1|u_logic|hwdata_o [7]
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .lut_mask = 64'hFF00FF00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wwdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Djdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C0ewx4~1_combout  & \soc_inst|m0_1|u_logic|Vzdwx4~1_combout ) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y16_N23
+dffeas \soc_inst|m0_1|u_logic|Nfb3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nfb3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .lut_mask = 64'h0000000000000303;
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mydwx4~1 (
+// Location: MLABCELL_X28_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hrmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mydwx4~1_combout  = ( \soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Hrmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dhb3z4~q  & ( \soc_inst|m0_1|u_logic|Nfb3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~9_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dhb3z4~q  & ( \soc_inst|m0_1|u_logic|Nfb3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~9_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dhb3z4~q  & ( !\soc_inst|m0_1|u_logic|Nfb3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~9_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dhb3z4~q  & ( !\soc_inst|m0_1|u_logic|Nfb3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~9_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add0~9_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nfb3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .lut_mask = 64'h0000FF0000FFFFFF;
-defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .lut_mask = 64'h40FFEAFF51FFFBFF;
+defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxdwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yxdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Yxdwx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y16_N1
+dffeas \soc_inst|m0_1|u_logic|Dhb3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .lut_mask = 64'h0C0C0C0C3F3F3F3F;
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dhb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dhb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~2 (
+// Location: LABCELL_X18_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~77 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9uwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|B5u2z4~q  & ( \soc_inst|m0_1|u_logic|Ka83z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B5u2z4~q  & ( !\soc_inst|m0_1|u_logic|Ka83z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B5u2z4~q  & ( !\soc_inst|m0_1|u_logic|Ka83z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Add0~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M5f3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~10  ))
+// \soc_inst|m0_1|u_logic|Add0~78  = CARRY(( !\soc_inst|m0_1|u_logic|M5f3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~10  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B5u2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ka83z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9uwx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~77_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~78 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .lut_mask = 64'h1100010010000000;
-defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~77 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add0~77 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y8_N1
-dffeas \soc_inst|m0_1|u_logic|Anq2z4 (
+// Location: FF_X21_Y19_N50
+dffeas \soc_inst|m0_1|u_logic|W3f3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Anq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|W3f3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Anq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Anq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W3f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W3f3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~1 (
+// Location: LABCELL_X18_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Armvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9uwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Bf93z4~q  & ( \soc_inst|m0_1|u_logic|Anq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bf93z4~q  & ( !\soc_inst|m0_1|u_logic|Anq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bf93z4~q  & ( !\soc_inst|m0_1|u_logic|Anq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Armvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5f3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|M5f3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|M5f3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~77_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((\soc_inst|m0_1|u_logic|W3f3z4~q )))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|M5f3z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~77_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout 
+//  & ((\soc_inst|m0_1|u_logic|W3f3z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bf93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Anq2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add0~77_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W3f3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9uwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .lut_mask = 64'h0005000400010000;
-defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Armvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Armvx4~0 .lut_mask = 64'h2023ECEFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Armvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y5_N20
-dffeas \soc_inst|m0_1|u_logic|Kev2z4 (
+// Location: FF_X18_Y18_N19
+dffeas \soc_inst|m0_1|u_logic|M5f3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kev2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M5f3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kev2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kev2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M5f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M5f3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~3 (
+// Location: FF_X27_Y18_N34
+dffeas \soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9uwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Kev2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Poq2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hmyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((\soc_inst|m0_1|u_logic|T8f3z4~q ) # 
+// (\soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|T8f3z4~q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kev2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Poq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9uwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .lut_mask = 64'h0000000000C000A0;
-defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .lut_mask = 64'h0000111103031313;
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X52_Y7_N2
-dffeas \soc_inst|m0_1|u_logic|Eqq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eqq2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|W3f3z4~q  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hmyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M5f3z4~q ))) ) ) 
+// ) # ( \soc_inst|m0_1|u_logic|W3f3z4~q  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hmyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M5f3z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|W3f3z4~q  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hmyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M5f3z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hmyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|W3f3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eqq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eqq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .lut_mask = 64'hC4C4C4C40000C4C4;
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y7_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~0 (
+// Location: LABCELL_X27_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mydwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9uwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Eqq2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|B173z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Mydwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (\soc_inst|m0_1|u_logic|Hmqwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Hmqwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eqq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B173z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9uwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .lut_mask = 64'h0A0C000000000000;
-defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4 (
+// Location: LABCELL_X24_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9uwx4~combout  = ( !\soc_inst|m0_1|u_logic|D9uwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|D9uwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D9uwx4~2_combout  & !\soc_inst|m0_1|u_logic|D9uwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|C0ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|H2wwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( \soc_inst|m0_1|u_logic|H2wwx4~combout  ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D9uwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D9uwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D9uwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9uwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9uwx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|D9uwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .lut_mask = 64'h0F0F00000F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtdwx4~0 (
+// Location: LABCELL_X27_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0ewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (\soc_inst|m0_1|u_logic|D9uwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|D9uwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|C0ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mydwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|C0ewx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Mydwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .lut_mask = 64'h3300330033FF33FF;
+defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtdwx4~1 (
+// Location: LABCELL_X33_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ksbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ksbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Konvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Kzbwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .lut_mask = 64'hF3FCF3FCB8E20000;
+defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tq7wx4~0 (
+// Location: MLABCELL_X28_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ox1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Qtdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ox1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .lut_mask = 64'h303030303F3F3F3F;
-defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .lut_mask = 64'hF0F0F0F050505050;
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Godwx4~1 (
+// Location: LABCELL_X30_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ox1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Godwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Godwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Godwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Godwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ox1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~113_sumout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Godwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Godwx4~1 .lut_mask = 64'h0000F0F00F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|Godwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S08wx4~0 (
+// Location: LABCELL_X24_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iu1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S08wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Godwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Godwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|C0ewx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Godwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0ewx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ksbwx4~0_combout  & (\soc_inst|m0_1|u_logic|Ox1wx4~1_combout  & !\soc_inst|m0_1|u_logic|Ox1wx4~0_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S08wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S08wx4~0 .lut_mask = 64'h00FF00FF0000FFFF;
-defparam \soc_inst|m0_1|u_logic|S08wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .lut_mask = 64'h0000000003000300;
+defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~0 (
+// Location: FF_X25_Y10_N5
+dffeas \soc_inst|m0_1|u_logic|W5s2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|W5s2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W5s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W5s2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y8_N17
+dffeas \soc_inst|m0_1|u_logic|Ug73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ug73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ug73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wwdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mydwx4~1_combout  & \soc_inst|m0_1|u_logic|Yxdwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Pybwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Ug73z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|W5s2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W5s2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ug73z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pybwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .lut_mask = 64'h0000000000000505;
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .lut_mask = 64'h000088000000C000;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~1 (
+// Location: FF_X24_Y11_N26
+dffeas \soc_inst|m0_1|u_logic|Duv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Duv2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Duv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N17
+dffeas \soc_inst|m0_1|u_logic|I4s2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I4s2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I4s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I4s2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wwdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwdwx4~1_combout  & (\soc_inst|m0_1|u_logic|Z78wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wwdwx4~2_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wwdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z78wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Pybwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Duv2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|I4s2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z78wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|I4s2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pybwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .lut_mask = 64'h0F0F0F0F0C000C00;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .lut_mask = 64'h00000C0000000A00;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~4 (
+// Location: FF_X25_Y8_N49
+dffeas \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y9_N8
+dffeas \soc_inst|m0_1|u_logic|Uku2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uku2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uku2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uku2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Pybwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Uku2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uku2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pybwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .lut_mask = 64'hCDC0CDC000000000;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .lut_mask = 64'h0000000000C000A0;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qmdwx4~1 (
+// Location: FF_X21_Y10_N50
+dffeas \soc_inst|m0_1|u_logic|U2s2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U2s2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U2s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U2s2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxc3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qmdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qmdwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Tkdwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Cxc3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cxc3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .lut_mask = 64'h0A0A0A0A5F5F5F5F;
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cxc3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cxc3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Cxc3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~3 (
+// Location: FF_X21_Y10_N22
+dffeas \soc_inst|m0_1|u_logic|Cxc3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cxc3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cxc3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cxc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cxc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djdwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qmdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jmdwx4~1_combout  & (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Pybwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cxc3z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|U2s2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2s2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cxc3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djdwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pybwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .lut_mask = 64'h0000000000010001;
-defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .lut_mask = 64'h0000000A0000000C;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Widwx4~0 (
+// Location: MLABCELL_X25_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Widwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Pybwx4~combout  = ( !\soc_inst|m0_1|u_logic|Pybwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Pybwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pybwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pybwx4~3_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pybwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pybwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pybwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pybwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Widwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pybwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Widwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Widwx4~0 .lut_mask = 64'hCCCCCACA00000000;
-defparam \soc_inst|m0_1|u_logic|Widwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Pybwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jiowx4~1 (
+// Location: LABCELL_X27_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Godwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jiowx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jiowx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jiowx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Xmdwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Godwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pybwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Pybwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .lut_mask = 64'h0A0A0A0A5F5F5F5F;
-defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Godwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Godwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Godwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B28wx4~0 (
+// Location: FF_X23_Y8_N40
+dffeas \soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B28wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jiowx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jiowx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Qmdwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ai9wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|I0e3z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I0e3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B28wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B28wx4~0 .lut_mask = 64'h0C0C0C0C3F3F3F3F;
-defparam \soc_inst|m0_1|u_logic|B28wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .lut_mask = 64'h0202030000000000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkdwx4~1 (
+// Location: FF_X22_Y10_N43
+dffeas \soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fkdwx4~1_combout  = (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & (\soc_inst|m0_1|u_logic|Fkdwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rw7wx4~0_combout )))
+// \soc_inst|m0_1|u_logic|Ai9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Snd3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Snd3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .lut_mask = 64'h550F550F550F550F;
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .lut_mask = 64'h0000000000000C0A;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fq7wx4~0 (
+// Location: FF_X23_Y12_N11
+dffeas \soc_inst|m0_1|u_logic|M3e3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|M3e3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M3e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M3e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vzdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nodwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Nodwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ai9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wqd3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|M3e3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wqd3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|M3e3z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M3e3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wqd3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .lut_mask = 64'h0045000000400000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~1 (
+// Location: FF_X22_Y10_N56
+dffeas \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fkdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tkdwx4~1_combout  & \soc_inst|m0_1|u_logic|B28wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ai9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lsd3z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lsd3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .lut_mask = 64'h0000000000000505;
-defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .lut_mask = 64'h00A0000000C00000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~2 (
+// Location: LABCELL_X24_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Djdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Nodwx4~1_combout  & \soc_inst|m0_1|u_logic|Godwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ai9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ai9wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ai9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ai9wx4~3_combout  & !\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ai9wx4~3_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djdwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .lut_mask = 64'h00000000000A000A;
-defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4 .lut_mask = 64'hA0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~3 (
+// Location: LABCELL_X23_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sndwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Djdwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Widwx4~0_combout  & !\soc_inst|m0_1|u_logic|Djdwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Djdwx4~2_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Widwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Djdwx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Djdwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Sndwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ai9wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Ai9wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Djdwx4~3_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Widwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Djdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Djdwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .lut_mask = 64'h0F0A0F0A0F000F00;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nvdwx4~1 (
+// Location: LABCELL_X27_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Godwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nvdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zudwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Zudwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Godwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Godwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Godwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Godwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Godwx4~1 .lut_mask = 64'h00330033FF33FF33;
+defparam \soc_inst|m0_1|u_logic|Godwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvdwx4~1 (
+// Location: LABCELL_X27_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S08wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|S08wx4~0_combout  = ( \soc_inst|m0_1|u_logic|C0ewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Godwx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|C0ewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Godwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|C0ewx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Godwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S08wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S08wx4~0 .lut_mask = 64'h0000F0F00F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|S08wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~2 (
+// Location: MLABCELL_X21_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zudwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Gvdwx4~0_combout  & (\soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Uvdwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hmyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[8]~33_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Hmyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[8]~33_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hmyvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .lut_mask = 64'h0000000000020002;
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .lut_mask = 64'h00C800C800FA00FA;
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dqdwx4~0 (
+// Location: MLABCELL_X21_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dqdwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|O3pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dqdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .lut_mask = 64'hF780F78000000000;
-defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .lut_mask = 64'h00A200F3A2A2F3F3;
+defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtdwx4~0 (
+// Location: MLABCELL_X21_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dmvwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Dmvwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|O3pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|O3pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .lut_mask = 64'hF000F000F0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .lut_mask = 64'h00000000FF54FF54;
+defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtdwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xtdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Asdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xtdwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Asdwx4~0_combout ) ) )
+// Location: FF_X29_Y9_N40
+dffeas \soc_inst|m0_1|u_logic|Vmj2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vmj2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vmj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vmj2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y9_N55
+dffeas \soc_inst|m0_1|u_logic|C5v2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|C5v2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C5v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C5v2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~3 (
+// Location: LABCELL_X29_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqdwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Xtdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kqdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Qtdwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Mnvwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( \soc_inst|m0_1|u_logic|C5v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|C5v2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|C5v2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vmj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C5v2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .lut_mask = 64'h000000000000000F;
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .lut_mask = 64'h0300010002000000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U18wx4~0 (
+// Location: FF_X29_Y9_N29
+dffeas \soc_inst|m0_1|u_logic|Tvt2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tvt2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U18wx4~0_combout  = (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Xtdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|E1ewx4~1_combout )))
+// \soc_inst|m0_1|u_logic|Mnvwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Tvt2z4~q  & ( \soc_inst|m0_1|u_logic|C183z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tvt2z4~q  & ( !\soc_inst|m0_1|u_logic|C183z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tvt2z4~q  & ( !\soc_inst|m0_1|u_logic|C183z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tvt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C183z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U18wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U18wx4~0 .lut_mask = 64'h0A5F0A5F0A5F0A5F;
-defparam \soc_inst|m0_1|u_logic|U18wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .lut_mask = 64'h0404000404000000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yvtwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yvtwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fexwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  ) ) )
+// Location: FF_X28_Y9_N10
+dffeas \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .lut_mask = 64'hFF00FF00FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y7_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fwtwx4~0 (
+// Location: MLABCELL_X28_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fwtwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eruwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Saqwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Saqwx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Eruwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Mnvwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q 
+//  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .lut_mask = 64'h0000FFFF55555555;
-defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .lut_mask = 64'h4400400004000000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xs7wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xs7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) )
+// Location: FF_X23_Y9_N44
+dffeas \soc_inst|m0_1|u_logic|Zpj2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zpj2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zpj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zpj2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|R293z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|R293z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .lut_mask = 64'h00550055AAFFAAFF;
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R293z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R293z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xs7wx4~1 (
+// Location: LABCELL_X23_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xs7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xs7wx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Uvdwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Mnvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R293z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zpj2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zpj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R293z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .lut_mask = 64'h00550055AAFFAAFF;
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .lut_mask = 64'h0000004400000050;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~1 (
+// Location: LABCELL_X29_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Asdwx4~1_combout  & \soc_inst|m0_1|u_logic|Mrdwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Mnvwx4~combout  = ( !\soc_inst|m0_1|u_logic|Mnvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mnvwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Mnvwx4~2_combout  & !\soc_inst|m0_1|u_logic|Mnvwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mnvwx4~3_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mnvwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mnvwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mnvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .lut_mask = 64'h0000000000000505;
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~2 (
+// Location: LABCELL_X31_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rih2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Kqdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kqdwx4~2_combout  & (\soc_inst|m0_1|u_logic|Dqdwx4~0_combout  & !\soc_inst|m0_1|u_logic|Kqdwx4~3_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kqdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Dqdwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Rih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Eacwx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Eacwx4~9_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dqdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kqdwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .lut_mask = 64'h0F0F0F0F0C000C00;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .lut_mask = 64'hFFCCFFCCF3F3F3F3;
+defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~5 (
+// Location: LABCELL_X31_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ancvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Z78wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Z78wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z78wx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ancvx4~combout  = ( \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z78wx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Z78wx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z78wx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ancvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .lut_mask = 64'hF5F5000000000000;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ancvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ancvx4 .lut_mask = 64'h55555555FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ancvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Beowx4~1 (
+// Location: MLABCELL_X34_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7cwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Beowx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Beowx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Beowx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|T7cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Beowx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Beowx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Beowx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .lut_mask = 64'hBE000000BE00BE00;
+defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7ewx4~0 (
+// Location: FF_X28_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|M4j2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|M4j2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M4j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M4j2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bf9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Beowx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Beowx4~1_combout  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Bf9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .lut_mask = 64'h0000000000880000;
+defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7ewx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q7ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xuxwx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & !\soc_inst|m0_1|u_logic|Xuxwx4~combout )) ) )
+// Location: FF_X31_Y7_N56
+dffeas \soc_inst|m0_1|u_logic|Pgf3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pgf3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pgf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pgf3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y6_N38
+dffeas \soc_inst|m0_1|u_logic|Eif3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Eif3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .lut_mask = 64'h50005000FAFFFAFF;
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eif3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eif3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kvtwx4 (
+// Location: LABCELL_X31_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kvtwx4~combout  = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Xuxwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Xuxwx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Bc82z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pgf3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Eif3z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pgf3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Eif3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bc82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kvtwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kvtwx4 .lut_mask = 64'h050A050A0F000F00;
-defparam \soc_inst|m0_1|u_logic|Kvtwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .lut_mask = 64'h0000300000002200;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gftwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Gftwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cawwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  ) )
+// Location: FF_X35_Y9_N20
+dffeas \soc_inst|m0_1|u_logic|Uuf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uuf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uuf3z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y8_N7
+dffeas \soc_inst|m0_1|u_logic|Qrf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qrf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qrf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kw7wx4~0 (
+// Location: FF_X33_Y8_N58
+dffeas \soc_inst|m0_1|u_logic|Ftf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ftf3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ftf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ftf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Duuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Duuwx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Duuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Bc82z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Ftf3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Qrf3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ftf3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bc82z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .lut_mask = 64'h0000F0F0FFFFF0F0;
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .lut_mask = 64'h0000E20000000000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kw7wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kw7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gftwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kw7wx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Gftwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// Location: FF_X27_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|Ilf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ilf3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ilf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ilf3z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y9_N28
+dffeas \soc_inst|m0_1|u_logic|Tjf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tjf3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .lut_mask = 64'h00330033FF33FF33;
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tjf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tjf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iutwx4~0 (
+// Location: LABCELL_X27_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iutwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xs7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kvtwx4~combout  & !\soc_inst|m0_1|u_logic|Kw7wx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xs7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kvtwx4~combout  & ((!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Bc82z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ilf3z4~q  & ( \soc_inst|m0_1|u_logic|Tjf3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ilf3z4~q  & ( !\soc_inst|m0_1|u_logic|Tjf3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ilf3z4~q  & ( !\soc_inst|m0_1|u_logic|Tjf3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ilf3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjf3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bc82z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .lut_mask = 64'hF030F030C000C000;
-defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .lut_mask = 64'h5000100040000000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuxwx4~0 (
+// Location: LABCELL_X35_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kw7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kw7wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Bc82z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bc82z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Uuf3z4~q  & !\soc_inst|m0_1|u_logic|Bc82z4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bc82z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bc82z4~2_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bc82z4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bc82z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bc82z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .lut_mask = 64'h00CC00CC33FF33FF;
-defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .lut_mask = 64'hFF00550000000000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hr7wx4~0 (
+// Location: LABCELL_X35_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Mzxwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & !\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bc82z4~4_combout  = ( \soc_inst|m0_1|u_logic|Bc82z4~3_combout  & ( \soc_inst|m0_1|u_logic|Icxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bc82z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|M4j2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M4j2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bc82z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bc82z4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bc82z4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .lut_mask = 64'h01003200FFFEFFCD;
-defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .lut_mask = 64'h000000000000F500;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7ewx4~0 (
+// Location: MLABCELL_X34_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X7ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( \soc_inst|m0_1|u_logic|Jiowx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Beowx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( \soc_inst|m0_1|u_logic|Jiowx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Beowx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Jiowx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Beowx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Jiowx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Beowx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Bc82z4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Zfh3z4~q  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Bc82z4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zfh3z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|B6j2z4~q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bc82z4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bc82z4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zfh3z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|B6j2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bc82z4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .lut_mask = 64'h020E202FF2FEE0EF;
-defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .lut_mask = 64'hF0CCF0FFF0CCF000;
+defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A6ewx4~0 (
+// Location: LABCELL_X31_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~125 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A6ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kepwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F7qwx4~combout  & (!\soc_inst|m0_1|u_logic|Zudwx4~1_combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kepwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F7qwx4~combout  & ((!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Add5~125_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) + ( 
+// \soc_inst|m0_1|u_logic|Add5~2  ))
+// \soc_inst|m0_1|u_logic|Add5~126  = CARRY(( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) + ( 
+// \soc_inst|m0_1|u_logic|Add5~2  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|F7qwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~2 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~126 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .lut_mask = 64'hCCC0CCC000C000C0;
-defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~125 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~125 .lut_mask = 64'h0000FF0F000033CC;
+defparam \soc_inst|m0_1|u_logic|Add5~125 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gftwx4~1 (
+// Location: LABCELL_X31_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~121 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gftwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Gftwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Gftwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add5~121_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ancvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~126  ))
+// \soc_inst|m0_1|u_logic|Add5~122  = CARRY(( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ancvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~126  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ancvx4~combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~126 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~122 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~121 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~121 .lut_mask = 64'h000000FF0000FF62;
+defparam \soc_inst|m0_1|u_logic|Add5~121 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5ewx4 (
+// Location: LABCELL_X17_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~117 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F5ewx4~combout  = ( !\soc_inst|m0_1|u_logic|Mouwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gftwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & !\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mouwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gftwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~117_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~106  ))
+// \soc_inst|m0_1|u_logic|Add2~118  = CARRY(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~106  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~106 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F5ewx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~117_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~118 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F5ewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F5ewx4 .lut_mask = 64'hF3F30000C0C00000;
-defparam \soc_inst|m0_1|u_logic|F5ewx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~117 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~117 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~117 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3ewx4~0 (
+// Location: LABCELL_X17_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~113 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W3ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A6ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|F5ewx4~combout  & ( (\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & (\soc_inst|m0_1|u_logic|X7ewx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|M5ewx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~118  ))
+// \soc_inst|m0_1|u_logic|Add2~114  = CARRY(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~118  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|F5ewx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~118 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W3ewx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~113_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~114 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .lut_mask = 64'h0300000000000000;
-defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~113 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~113 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~113 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3ewx4~1 (
+// Location: LABCELL_X17_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W3ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|W3ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J7ewx4~0_combout  & (\soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & !\soc_inst|m0_1|u_logic|Iutwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Duhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add2~113_sumout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W3ewx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Add2~113_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W3ewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .lut_mask = 64'h0000000005000500;
-defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .lut_mask = 64'h00003333F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~6 (
+// Location: LABCELL_X19_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~6_combout  = ( \soc_inst|m0_1|u_logic|W3ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Z78wx4~1_combout  & \soc_inst|m0_1|u_logic|Z78wx4~5_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W3ewx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Manwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z78wx4~1_combout  & \soc_inst|m0_1|u_logic|Z78wx4~5_combout )) ) )
+// \soc_inst|m0_1|u_logic|O3pvx4~combout  = ( \soc_inst|m0_1|u_logic|R7iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O3pvx4~1_combout  & 
+// (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z78wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z78wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W3ewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3pvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .lut_mask = 64'h0030003000F000F0;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4 .lut_mask = 64'h010F010F0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|O3pvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpcvx4 (
+// Location: LABCELL_X19_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wpcvx4~combout  = ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Duhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|O3pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|O3pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O3pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O3pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|H4nwx4~combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duhvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O3pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wpcvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wpcvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wpcvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Wpcvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .lut_mask = 64'hA000A0A080008080;
+defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y6_N50
-dffeas \soc_inst|m0_1|u_logic|Nz73z4 (
+// Location: FF_X19_Y14_N1
+dffeas \soc_inst|m0_1|u_logic|Xyk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Duhvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nz73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xyk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nz73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nz73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xyk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xyk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y4_N31
-dffeas \soc_inst|m0_1|u_logic|Igl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Igl2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Igl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Igl2z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X36_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~113 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~102  ))
+// \soc_inst|m0_1|u_logic|Add3~114  = CARRY(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~102  ))
 
-// Location: FF_X45_Y6_N5
-dffeas \soc_inst|m0_1|u_logic|C193z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C193z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~102 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~113_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~114 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C193z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C193z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~113 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~113 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~113 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N26
-dffeas \soc_inst|m0_1|u_logic|Eq63z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eq63z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X36_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~109 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~114  ))
+// \soc_inst|m0_1|u_logic|Add3~110  = CARRY(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~114  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~114 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~109_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~110 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eq63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eq63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~109 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~109 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~109 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~5 (
+// Location: LABCELL_X31_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1pvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|C193z4~q  & ( \soc_inst|m0_1|u_logic|Eq63z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|C193z4~q  & ( !\soc_inst|m0_1|u_logic|Eq63z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C193z4~q  & ( !\soc_inst|m0_1|u_logic|Eq63z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  $ 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Y1pvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~109_sumout  & ( \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|K1wvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add5~121_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~109_sumout  & ( \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~121_sumout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Add3~109_sumout  & ( !\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|K1wvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add5~121_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~109_sumout  & ( !\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|K1wvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add5~121_sumout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|C193z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eq63z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~109_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .lut_mask = 64'h0201020000010000;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y1pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1pvx4 .lut_mask = 64'hEE00E000EEEEE0E0;
+defparam \soc_inst|m0_1|u_logic|Y1pvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y6_N41
-dffeas \soc_inst|m0_1|u_logic|Eut2z4 (
+// Location: FF_X31_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Q7j2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eut2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Q7j2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eut2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eut2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q7j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q7j2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~6 (
+// Location: LABCELL_X36_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vjnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Eut2z4~q  & ( \soc_inst|m0_1|u_logic|N3v2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eut2z4~q  & ( !\soc_inst|m0_1|u_logic|N3v2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eut2z4~q  & ( !\soc_inst|m0_1|u_logic|N3v2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Vjnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xyk2z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Xyk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Xyk2z4~q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Eut2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|N3v2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vjnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .lut_mask = 64'h0030001000200000;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .lut_mask = 64'hAAAAAAAA0F0F0000;
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~7 (
+// Location: LABCELL_X31_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vjnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Kqzvx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Kqzvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Nz73z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igl2z4~q )))) # (\soc_inst|m0_1|u_logic|Nz73z4~q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Igl2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Vjnvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vjnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y1pvx4~combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Z7i2z4~q )))) # (\soc_inst|m0_1|u_logic|Y1pvx4~combout  & (((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Z7i2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nz73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Igl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kqzvx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vjnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .lut_mask = 64'hCF45000000000000;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .lut_mask = 64'hF351F35100000000;
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N56
-dffeas \soc_inst|m0_1|u_logic|Edl2z4 (
+// Location: FF_X31_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Edl2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Edl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Edl2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X45_Y4_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lgi3z4~q ) # ((!\soc_inst|m0_1|u_logic|Edl2z4~q  & \soc_inst|m0_1|u_logic|U71xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Edl2z4~q  & \soc_inst|m0_1|u_logic|U71xx4~0_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Edl2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y6_N29
-dffeas \soc_inst|m0_1|u_logic|M743z4 (
+// Location: FF_X25_Y11_N44
+dffeas \soc_inst|m0_1|u_logic|Joi3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M743z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Joi3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M743z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M743z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Joi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Joi3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N8
-dffeas \soc_inst|m0_1|u_logic|Pbl2z4 (
+// Location: FF_X25_Y11_N40
+dffeas \soc_inst|m0_1|u_logic|Umi3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pbl2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Umi3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pbl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pbl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Umi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Umi3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~2 (
+// Location: MLABCELL_X25_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M782z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pbl2z4~q  & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|M743z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pbl2z4~q  & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|M743z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pbl2z4~q  ) ) 
-// # ( !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pbl2z4~q  & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|M743z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|M782z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Umi3z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M743z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pbl2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Umi3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M782z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .lut_mask = 64'h5050FFFF50505050;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M782z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M782z4~0 .lut_mask = 64'h1000000000000000;
+defparam \soc_inst|m0_1|u_logic|M782z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y6_N35
-dffeas \soc_inst|m0_1|u_logic|Vg53z4 (
+// Location: FF_X22_Y11_N44
+dffeas \soc_inst|m0_1|u_logic|Sz23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vg53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sz23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vg53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vg53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sz23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sz23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y4_N13
-dffeas \soc_inst|m0_1|u_logic|Dy23z4 (
+// Location: FF_X30_Y9_N22
+dffeas \soc_inst|m0_1|u_logic|Jq13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dy23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jq13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dy23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dy23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jq13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jq13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~3 (
+// Location: LABCELL_X22_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vg53z4~q ) # ((!\soc_inst|m0_1|u_logic|Dy23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dy23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|P582z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Jq13z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sz23z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Jq13z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sz23z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vg53z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dy23z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sz23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jq13z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P582z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .lut_mask = 64'h00F000F0AAFAAAFA;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~1 .lut_mask = 64'h2220000000200000;
+defparam \soc_inst|m0_1|u_logic|P582z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y4_N35
-dffeas \soc_inst|m0_1|u_logic|Csz2z4 (
+// Location: FF_X22_Y11_N38
+dffeas \soc_inst|m0_1|u_logic|Fli3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Csz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fli3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Csz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Csz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fli3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fli3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y4_N44
-dffeas \soc_inst|m0_1|u_logic|Xhl2z4 (
+// Location: FF_X22_Y11_N22
+dffeas \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xhl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y4_N19
-dffeas \soc_inst|m0_1|u_logic|Wo03z4 (
+// Location: LABCELL_X22_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P582z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Fli3z4~q  & ( \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fli3z4~q  & ( !\soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fli3z4~q  & ( !\soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fli3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P582z4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P582z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~2 .lut_mask = 64'h5000100040000000;
+defparam \soc_inst|m0_1|u_logic|P582z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y9_N50
+dffeas \soc_inst|m0_1|u_logic|Ki53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wo03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ki53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wo03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wo03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ki53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ki53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y4_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~4 (
+// Location: MLABCELL_X21_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B943z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~4_combout  = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xhl2z4~q  & (\soc_inst|m0_1|u_logic|Wo03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Csz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xhl2z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q 
-// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wo03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|B943z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Csz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xhl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wo03z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B943z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .lut_mask = 64'hFF550F0533110301;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B943z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B943z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|B943z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N5
-dffeas \soc_inst|m0_1|u_logic|Tel2z4 (
+// Location: FF_X21_Y9_N4
+dffeas \soc_inst|m0_1|u_logic|B943z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|B943z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tel2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B943z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tel2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tel2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B943z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B943z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y4_N22
-dffeas \soc_inst|m0_1|u_logic|Uo13z4 (
+// Location: LABCELL_X22_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P582z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ki53z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|B943z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ki53z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B943z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P582z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P582z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~0 .lut_mask = 64'h00000C0000000A00;
+defparam \soc_inst|m0_1|u_logic|P582z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P582z4~3_combout  = ( !\soc_inst|m0_1|u_logic|P582z4~2_combout  & ( !\soc_inst|m0_1|u_logic|P582z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M782z4~0_combout  & (!\soc_inst|m0_1|u_logic|P582z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Joi3z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Joi3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M782z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P582z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P582z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P582z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P582z4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P582z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~3 .lut_mask = 64'hB000000000000000;
+defparam \soc_inst|m0_1|u_logic|P582z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|P582z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|B6j2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Mnvwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|P582z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|B6j2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|P582z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|B6j2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|P582z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|B6j2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P582z4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .lut_mask = 64'h03F300F003F305F5;
+defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9cwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q9cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Rih2z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rih2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & \soc_inst|m0_1|u_logic|Rih2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Q9cwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .lut_mask = 64'hF3FBC06233330022;
+defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yqzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Q9cwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Q9cwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Q9cwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q9cwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .lut_mask = 64'h00D000D0000000D0;
+defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rqzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Yqzvx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .lut_mask = 64'h000000000000777F;
+defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y9_N49
+dffeas \soc_inst|m0_1|u_logic|C183z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uo13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|C183z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uo13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uo13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C183z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C183z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~0 (
+// Location: LABCELL_X29_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R91xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tel2z4~q ) # (!\soc_inst|m0_1|u_logic|Uo13z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uo13z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Tel2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|R91xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tel2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uo13z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .lut_mask = 64'h0000AAAAF0F0FAFA;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R91xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R91xx4~0 .lut_mask = 64'h0000000003000300;
+defparam \soc_inst|m0_1|u_logic|R91xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4 (
+// Location: LABCELL_X29_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T31xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Kqzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kqzvx4~7_combout  & (!\soc_inst|m0_1|u_logic|Kqzvx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kqzvx4~2_combout  & !\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|T31xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kqzvx4~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kqzvx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4 .lut_mask = 64'h0000400000000000;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T31xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T31xx4~0 .lut_mask = 64'h0500050000000000;
+defparam \soc_inst|m0_1|u_logic|T31xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4awx4~0 (
+// Location: LABCELL_X30_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J4awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~0_combout  = ( \soc_inst|m0_1|u_logic|T31xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tvt2z4~q ) # ((\soc_inst|m0_1|u_logic|R91xx4~0_combout  & !\soc_inst|m0_1|u_logic|C5v2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T31xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R91xx4~0_combout  & !\soc_inst|m0_1|u_logic|C5v2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tvt2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C5v2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J4awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J4awx4~0 .lut_mask = 64'hFFF0FFF0AAFFAAFF;
-defparam \soc_inst|m0_1|u_logic|J4awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .lut_mask = 64'h33003300F3F0F3F0;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~57 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Locvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~122  ))
-// \soc_inst|m0_1|u_logic|Add5~58  = CARRY(( !\soc_inst|m0_1|u_logic|Locvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~122  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Locvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~122 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~57_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~58 ),
-	.shareout());
+// Location: FF_X28_Y9_N11
+dffeas \soc_inst|m0_1|u_logic|Tr63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tr63z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~57 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~57 .lut_mask = 64'h000000B50000FF00;
-defparam \soc_inst|m0_1|u_logic|Add5~57 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tr63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tr63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~5 (
+// Location: MLABCELL_X28_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~5_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Wpcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~58  ))
-// \soc_inst|m0_1|u_logic|Add5~6  = CARRY(( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Wpcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~58  ))
+// \soc_inst|m0_1|u_logic|Eacwx4~7_combout  = ( !\soc_inst|m0_1|u_logic|R293z4~q  & ( \soc_inst|m0_1|u_logic|Tr63z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|R293z4~q  & ( !\soc_inst|m0_1|u_logic|Tr63z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R293z4~q  & ( !\soc_inst|m0_1|u_logic|Tr63z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wpcvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|R293z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tr63z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~58 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~5_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~6 ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~7_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~5 .lut_mask = 64'h000000FF0000FF4A;
-defparam \soc_inst|m0_1|u_logic|Add5~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .lut_mask = 64'h0009000800010000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dih2z4~0 (
+// Location: FF_X25_Y11_N43
+dffeas \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|O7zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|O7zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|O7zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O7zvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~8_combout  = ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Eacwx4~7_combout  & (\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Umi3z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Eacwx4~7_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Umi3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Umi3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eacwx4~7_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .lut_mask = 64'hFFFFAAAAF5F5F5F5;
-defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .lut_mask = 64'hD0D0D0D000D000D0;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y9_N23
+dffeas \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y9_N52
+dffeas \soc_inst|m0_1|u_logic|F9j2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F9j2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F9j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F9j2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ovcvx4 (
+// Location: LABCELL_X30_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ovcvx4~combout  = ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|F9j2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|F9j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|F9j2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  $ (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|F9j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ovcvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ovcvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ovcvx4 .lut_mask = 64'h55555555FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ovcvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .lut_mask = 64'h6000200040000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~117 (
+// Location: LABCELL_X30_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~117_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ducvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~86  ))
-// \soc_inst|m0_1|u_logic|Add5~118  = CARRY(( (!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ducvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~86  ))
+// \soc_inst|m0_1|u_logic|Eacwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Sz23z4~q  & ( \soc_inst|m0_1|u_logic|Ki53z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sz23z4~q  & ( !\soc_inst|m0_1|u_logic|Ki53z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sz23z4~q  & ( !\soc_inst|m0_1|u_logic|Ki53z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ducvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sz23z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ki53z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~86 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~117_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~118 ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~117 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~117 .lut_mask = 64'h000000FF0000FF62;
-defparam \soc_inst|m0_1|u_logic|Add5~117 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .lut_mask = 64'h0404000404000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~9 (
+// Location: LABCELL_X30_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~9_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ovcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~118  ))
-// \soc_inst|m0_1|u_logic|Add5~10  = CARRY(( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ovcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~118  ))
+// \soc_inst|m0_1|u_logic|Eacwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( \soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ovcvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vmj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~118 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~9_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~10 ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~4_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~9 .lut_mask = 64'h000000FF0000FF62;
-defparam \soc_inst|m0_1|u_logic|Add5~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .lut_mask = 64'h8020800000200000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y10_N32
-dffeas \soc_inst|m0_1|u_logic|Szr2z4 (
+// Location: FF_X21_Y9_N5
+dffeas \soc_inst|m0_1|u_logic|B943z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|B943z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Szr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B943z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Szr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Szr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B943z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B943z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y9_N25
-dffeas \soc_inst|m0_1|u_logic|Eyr2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eyr2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~2_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zpj2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|B943z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|B943z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zpj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eyr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .lut_mask = 64'h000A000C00000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y9_N59
-dffeas \soc_inst|m0_1|u_logic|Qwr2z4 (
+// Location: FF_X22_Y11_N23
+dffeas \soc_inst|m0_1|u_logic|Qji3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qwr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qji3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qwr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qwr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qji3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qji3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hp9wx4~0 (
+// Location: LABCELL_X22_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hp9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Qwr2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Qji3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qji3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fli3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qji3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fli3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qwr2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fli3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qji3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .lut_mask = 64'h2000200030000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y13_N25
-dffeas \soc_inst|m0_1|u_logic|Z863z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z863z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Eacwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Eacwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Eacwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Eacwx4~3_combout  & 
+// !\soc_inst|m0_1|u_logic|Eacwx4~4_combout )) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Eacwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eacwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eacwx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Eacwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~5_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~6_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z863z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z863z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .lut_mask = 64'hC000000000000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y10_N14
-dffeas \soc_inst|m0_1|u_logic|Qz43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qz43z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~9_combout  = ( \soc_inst|m0_1|u_logic|Eacwx4~8_combout  & ( \soc_inst|m0_1|u_logic|Eacwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Eacwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|C183z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|C183z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Eacwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Eacwx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~6_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qz43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .lut_mask = 64'h000000000000AF00;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~0 (
+// Location: MLABCELL_X28_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kn9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Z863z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qz43z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|P12wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Zhyvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z863z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qz43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .lut_mask = 64'h000000C0000000A0;
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .lut_mask = 64'hFE32FE32DC10DC10;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y12_N56
-dffeas \soc_inst|m0_1|u_logic|Kc03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+// Location: LABCELL_X27_Y17_N27
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[24]~26 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[24]~26_combout  = ( \soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ))) # 
+// (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Y9t2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 )) ) )
+
+	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datac(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|ram_1|data_to_memory[24]~26_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[24]~26 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[24]~26 .lut_mask = 64'h0050005001510151;
+defparam \soc_inst|ram_1|data_to_memory[24]~26 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y16_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[24]~26_combout ,\soc_inst|ram_1|data_to_memory[16]~25_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kc03z4~q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kc03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kc03z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_bit_number = 16;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_bit_number = 16;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E38E3802A23E655014404031284B128485485485485485485485401400000000000000A87D000000000000000000000000";
 // synopsys translate_on
 
-// Location: FF_X40_Y9_N46
-dffeas \soc_inst|m0_1|u_logic|E913z4 (
+// Location: FF_X27_Y17_N23
+dffeas \soc_inst|switches_1|switch_store[1][8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\SW[8]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E913z4~q ),
+	.q(\soc_inst|switches_1|switch_store[1][8]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E913z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E913z4 .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[1][8] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][8] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~2 (
+// Location: LABCELL_X27_Y17_N21
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~31 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kn9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|E913z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Kc03z4~q )))) ) ) )
+// \soc_inst|interconnect_1|HRDATA[24]~31_combout  = ( \soc_inst|switches_1|switch_store[1][8]~q  & ( (\soc_inst|interconnect_1|HRDATA[24]~17_combout  & ((\soc_inst|interconnect_1|Equal1~0_combout ) # 
+// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ))) ) ) # ( !\soc_inst|switches_1|switch_store[1][8]~q  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24  & (!\soc_inst|interconnect_1|Equal1~0_combout  & 
+// \soc_inst|interconnect_1|HRDATA[24]~17_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kc03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|E913z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|switches_1|switch_store[1][8]~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .lut_mask = 64'h00000000CA000000;
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~31 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~31 .lut_mask = 64'h0404070704040707;
+defparam \soc_inst|interconnect_1|HRDATA[24]~31 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y12_N14
-dffeas \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X21_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rkyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[24]~31_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[24]~31_combout )))) ) )
 
-// Location: FF_X40_Y6_N26
-dffeas \soc_inst|m0_1|u_logic|Hq33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hq33z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hq33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hq33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .lut_mask = 64'hC080C080F0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~1 (
+// Location: MLABCELL_X21_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I21wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kn9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Hq33z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|I21wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ((\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hq33z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I21wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .lut_mask = 64'h0088000000A00000;
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I21wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I21wx4~0 .lut_mask = 64'h7070777700700077;
+defparam \soc_inst|m0_1|u_logic|I21wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~3 (
+// Location: MLABCELL_X21_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I21wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kn9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Kn9wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Kn9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hp9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eyr2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|I21wx4~combout  = ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|I21wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Yilwx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|I21wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eyr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kn9wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I21wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I21wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .lut_mask = 64'hD000000000000000;
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I21wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I21wx4 .lut_mask = 64'h000000005F5F4C5F;
+defparam \soc_inst|m0_1|u_logic|I21wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F32wx4~0 (
+// Location: MLABCELL_X25_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F32wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|I793z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Lr9wx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|I793z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Szr2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|I793z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|I793z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Szr2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|I21wx4~combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I21wx4~combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout  & 
+// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I793z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qz0wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I21wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F32wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F32wx4~0 .lut_mask = 64'hFA0AFF0FFA0AFC0C;
-defparam \soc_inst|m0_1|u_logic|F32wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .lut_mask = 64'h000000770000007F;
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y8_N23
-dffeas \soc_inst|m0_1|u_logic|K9z2z4 (
+// Location: FF_X28_Y7_N29
+dffeas \soc_inst|m0_1|u_logic|J773z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J773z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K9z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K9z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J773z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J773z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuawx4~0 (
+// Location: FF_X28_Y7_N11
+dffeas \soc_inst|m0_1|u_logic|N8o2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|N8o2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N8o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N8o2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tuawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K9z2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xwawx4~0_combout 
-//  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Nrvwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|J773z4~q  & ( \soc_inst|m0_1|u_logic|N8o2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|J773z4~q  & ( !\soc_inst|m0_1|u_logic|N8o2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J773z4~q  & ( !\soc_inst|m0_1|u_logic|N8o2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|J773z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|N8o2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tuawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .lut_mask = 64'h0A00080002000000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuawx4~1 (
+// Location: MLABCELL_X28_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tuawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tuawx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Nrvwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Jbu2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sg83z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tuawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sg83z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .lut_mask = 64'hA020A020AA22AA22;
-defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .lut_mask = 64'h000000000000A820;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y7_N32
+dffeas \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnbwx4~0 (
+// Location: MLABCELL_X25_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hnbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qobwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qobwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # ((\soc_inst|m0_1|u_logic|Rxl2z4~q )))) # (\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|Rxl2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Nrvwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Skv2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Skv2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .lut_mask = 64'h8CAF8CAF0C0F0C0F;
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .lut_mask = 64'h0050004400000000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y8_N29
-dffeas \soc_inst|m0_1|u_logic|Qzq2z4 (
+// Location: FF_X24_Y7_N5
+dffeas \soc_inst|m0_1|u_logic|J5o2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
+	.d(\soc_inst|m0_1|u_logic|J5o2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J5o2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qzq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qzq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J5o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~1 (
+// Location: FF_X25_Y7_N38
+dffeas \soc_inst|m0_1|u_logic|Jl93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jl93z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jl93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jl93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4bwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Nrvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Jl93z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|J5o2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J5o2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jl93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .lut_mask = 64'hAA0AAA0AAAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .lut_mask = 64'h0000000A0000000C;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnbwx4~1 (
+// Location: LABCELL_X29_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hnbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & \soc_inst|m0_1|u_logic|Z4bwx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & \soc_inst|m0_1|u_logic|Z4bwx4~1_combout )) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Nrvwx4~combout  = ( !\soc_inst|m0_1|u_logic|Nrvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nrvwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Nrvwx4~2_combout  & !\soc_inst|m0_1|u_logic|Nrvwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nrvwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nrvwx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nrvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .lut_mask = 64'hBBFBBBFBAAFAAAFA;
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~29 (
+// Location: LABCELL_X23_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~29_sumout  = SUM(( \soc_inst|m0_1|u_logic|E1bvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & (\soc_inst|m0_1|u_logic|Dfd2z4~combout  & (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~134_cout  ))
-// \soc_inst|m0_1|u_logic|Add5~30  = CARRY(( \soc_inst|m0_1|u_logic|E1bvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & (\soc_inst|m0_1|u_logic|Dfd2z4~combout  & (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~134_cout  ))
+// \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ey9wx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dfd2z4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E1bvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~134_cout ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~29_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~30 ),
+	.combout(\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~29 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~29 .lut_mask = 64'h0000FFDF000000FF;
-defparam \soc_inst|m0_1|u_logic|Add5~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .lut_mask = 64'h0F0F0F0F0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~93 (
+// Location: LABCELL_X22_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~93_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) + ( !\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~30  ))
-// \soc_inst|m0_1|u_logic|Add5~94  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) + ( !\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~30  ))
+// \soc_inst|m0_1|u_logic|Yxdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yxdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~30 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~93_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~94 ),
+	.combout(\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~93 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~93 .lut_mask = 64'h00007788000000F0;
-defparam \soc_inst|m0_1|u_logic|Add5~93 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .lut_mask = 64'h000000FFFF00FFFF;
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~101 (
+// Location: LABCELL_X23_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zndwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( !\soc_inst|m0_1|u_logic|Asbvx4~combout  ) + ( 
-// \soc_inst|m0_1|u_logic|Add5~94  ))
-// \soc_inst|m0_1|u_logic|Add5~102  = CARRY(( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( !\soc_inst|m0_1|u_logic|Asbvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~94  
-// ))
+// \soc_inst|m0_1|u_logic|Zndwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H2wwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ai9wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|H2wwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Ai9wx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Asbvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~94 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~101_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~102 ),
+	.combout(\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~101 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~101 .lut_mask = 64'h00000F0F00008877;
-defparam \soc_inst|m0_1|u_logic|Add5~101 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~33 (
+// Location: LABCELL_X24_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nodwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~102  ))
-// \soc_inst|m0_1|u_logic|Add5~34  = CARRY(( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~102  ))
+// \soc_inst|m0_1|u_logic|Nodwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (\soc_inst|m0_1|u_logic|Pybwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Pybwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~102 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~33_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~34 ),
+	.combout(\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~33 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~33 .lut_mask = 64'h0000FF3300005FA0;
-defparam \soc_inst|m0_1|u_logic|Add5~33 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~97 (
+// Location: LABCELL_X23_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zndwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~34  ))
-// \soc_inst|m0_1|u_logic|Add5~98  = CARRY(( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~34  ))
+// \soc_inst|m0_1|u_logic|Zndwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zndwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Zndwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~34 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~97_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~98 ),
+	.combout(\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~97 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~97 .lut_mask = 64'h0000FF3300005FA0;
-defparam \soc_inst|m0_1|u_logic|Add5~97 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~109 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~98  ))
-// \soc_inst|m0_1|u_logic|Add5~110  = CARRY(( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~98  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~98 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~109_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~110 ),
-	.shareout());
+// Location: FF_X19_Y18_N52
+dffeas \soc_inst|m0_1|u_logic|Kxe3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kxe3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~109 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~109 .lut_mask = 64'h0000FF3300005FA0;
-defparam \soc_inst|m0_1|u_logic|Add5~109 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kxe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kxe3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~37 (
+// Location: LABCELL_X18_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~110  ))
-// \soc_inst|m0_1|u_logic|Add5~38  = CARRY(( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~110  ))
+// \soc_inst|m0_1|u_logic|Add0~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Aze3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~78  ))
+// \soc_inst|m0_1|u_logic|Add0~26  = CARRY(( !\soc_inst|m0_1|u_logic|Aze3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~78  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~110 ),
+	.cin(\soc_inst|m0_1|u_logic|Add0~78 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~37_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~38 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~25_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~37 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~37 .lut_mask = 64'h0000FF3300005FA0;
-defparam \soc_inst|m0_1|u_logic|Add5~37 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~25 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~81 (
+// Location: LABCELL_X19_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~38  ))
-// \soc_inst|m0_1|u_logic|Add5~82  = CARRY(( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~38  ))
+// \soc_inst|m0_1|u_logic|Tqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aze3z4~q  & ( \soc_inst|m0_1|u_logic|Kxe3z4~q  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~25_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aze3z4~q  & ( \soc_inst|m0_1|u_logic|Kxe3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~25_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aze3z4~q  & ( !\soc_inst|m0_1|u_logic|Kxe3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~25_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aze3z4~q  & ( !\soc_inst|m0_1|u_logic|Kxe3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~25_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~25_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kxe3z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~38 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~81_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~82 ),
+	.combout(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~81 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~81 .lut_mask = 64'h0000FF0F00007788;
-defparam \soc_inst|m0_1|u_logic|Add5~81 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .lut_mask = 64'h5D55FDF55F57FFF7;
+defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~41 (
+// Location: FF_X19_Y18_N56
+dffeas \soc_inst|m0_1|u_logic|Aze3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aze3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aze3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2twx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~82  ))
-// \soc_inst|m0_1|u_logic|Add5~42  = CARRY(( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~82  ))
+// \soc_inst|m0_1|u_logic|I2twx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|B2uvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~82 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~41_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~42 ),
+	.combout(\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~41 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~41 .lut_mask = 64'h0000FF0F00007788;
-defparam \soc_inst|m0_1|u_logic|Add5~41 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I2twx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I2twx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|I2twx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~0 (
+// Location: LABCELL_X19_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do8wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~37_sumout  & (!\soc_inst|m0_1|u_logic|Add5~33_sumout  & 
-// !\soc_inst|m0_1|u_logic|Add5~29_sumout )) ) ) )
+// \soc_inst|m0_1|u_logic|Khfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vve3z4~q  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Y9l2z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Vve3z4~q  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y9l2z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do8wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .lut_mask = 64'h8080000000000000;
-defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .lut_mask = 64'h0000000000335577;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jf92z4~0 (
+// Location: LABCELL_X19_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jf92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tvn2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Khfwx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[9]~16_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Khfwx4~0_combout ))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[9]~16_combout  & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & !\soc_inst|m0_1|u_logic|Khfwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tvn2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Khfwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jf92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .lut_mask = 64'h0008000000000000;
-defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y7_N14
-dffeas \soc_inst|m0_1|u_logic|Ixn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ixn2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ixn2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y6_N11
-dffeas \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .lut_mask = 64'hC000C00080008000;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~0 (
+// Location: LABCELL_X19_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Md92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nl43z4~q  & ( \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nl43z4~q  & ( !\soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nl43z4~q  & ( !\soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Khfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Khfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # ((\soc_inst|m0_1|u_logic|Kxe3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|I7owx4~combout  & (\soc_inst|m0_1|u_logic|Aze3z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Kxe3z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nl43z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kxe3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Md92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khfwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Md92z4~0 .lut_mask = 64'h0022000200200000;
-defparam \soc_inst|m0_1|u_logic|Md92z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y4_N31
-dffeas \soc_inst|m0_1|u_logic|Ec33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ec33z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ec33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .lut_mask = 64'h000000008ACF8ACF;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y4_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~1 (
+// Location: LABCELL_X22_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Md92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|V223z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ec33z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Khfwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Khfwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Yxdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Zndwx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ec33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|V223z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Md92z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md92z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Md92z4~1 .lut_mask = 64'h00000000E2000000;
-defparam \soc_inst|m0_1|u_logic|Md92z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .lut_mask = 64'h00000000CEDFCEDF;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~2 (
+// Location: LABCELL_X23_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Md92z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|K103z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ey03z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ppzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( 
+// ((\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Khfwx4~3_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K103z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ey03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Md92z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md92z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Md92z4~2 .lut_mask = 64'h00000000C000A000;
-defparam \soc_inst|m0_1|u_logic|Md92z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .lut_mask = 64'h3F0F3F0F33003300;
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~3 (
+// Location: LABCELL_X24_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Md92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Md92z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Md92z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Jf92z4~0_combout  & (!\soc_inst|m0_1|u_logic|Md92z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ixn2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ppzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ppzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jf92z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ixn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Md92z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Md92z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Md92z4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ppzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Md92z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md92z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Md92z4~3 .lut_mask = 64'hA200000000000000;
-defparam \soc_inst|m0_1|u_logic|Md92z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .lut_mask = 64'h5055F0FF00000000;
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs0wx4~0 (
+// Location: LABCELL_X30_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4p2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout 
-//  & (((!\soc_inst|m0_1|u_logic|Md92z4~3_combout )) # (\soc_inst|m0_1|u_logic|H1qwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|H4p2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Md92z4~3_combout )) # (\soc_inst|m0_1|u_logic|H1qwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4p2z4~q  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4p2z4~q ) 
-// # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Oihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & (\soc_inst|m0_1|u_logic|H4nwx4~combout  & !\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Md92z4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oihvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .lut_mask = 64'hCFCFC0C0CFC5CFC5;
-defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .lut_mask = 64'h0F0F0F0F0C000C00;
+defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~21 (
+// Location: LABCELL_X17_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~77 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~21_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~74  ))
-// \soc_inst|m0_1|u_logic|Add5~22  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~74  ))
+// \soc_inst|m0_1|u_logic|Add2~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zpx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~114  ))
+// \soc_inst|m0_1|u_logic|Add2~78  = CARRY(( !\soc_inst|m0_1|u_logic|Zpx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~114  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~74 ),
+	.cin(\soc_inst|m0_1|u_logic|Add2~114 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~21_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~22 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~77_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~78 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~21 .lut_mask = 64'h00008877000000F0;
-defparam \soc_inst|m0_1|u_logic|Add5~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~77 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~77 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6awx4~0 (
+// Location: LABCELL_X36_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~73 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6awx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Add3~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zpx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~110  ))
+// \soc_inst|m0_1|u_logic|Add3~74  = CARRY(( !\soc_inst|m0_1|u_logic|Zpx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~110  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~110 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6awx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~73_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~74 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6awx4~0 .lut_mask = 64'hF0FFF0FF00000000;
-defparam \soc_inst|m0_1|u_logic|U6awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~73 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~73 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6awx4~1 (
+// Location: LABCELL_X33_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rnovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( 
-// \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rnovx4~combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Add3~73_sumout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Nozvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Nozvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~73_sumout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Nozvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Nozvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U6awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add3~73_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rnovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6awx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6awx4~1 .lut_mask = 64'h050D050D050D0F0F;
-defparam \soc_inst|m0_1|u_logic|U6awx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rnovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rnovx4 .lut_mask = 64'hF5F5F500C4C4C400;
+defparam \soc_inst|m0_1|u_logic|Rnovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oaawx4~0 (
+// Location: LABCELL_X33_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C1lvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oaawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|C1lvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lgi3z4~q  & ( \soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q )) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Lgi3z4~q  & ( \soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lgi3z4~q  & ( !\soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q 
+// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lgi3z4~q  & ( !\soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Zpx2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rnovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oaawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C1lvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .lut_mask = 64'hFF0FFF0F00000000;
-defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .lut_mask = 64'h2202AA8A3303FFCF;
+defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y6_N38
+dffeas \soc_inst|m0_1|u_logic|Lgi3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|C1lvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lgi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lgi3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y10_N43
-dffeas \soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE (
+// Location: FF_X30_Y9_N37
+dffeas \soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N56
-dffeas \soc_inst|m0_1|u_logic|Zb83z4 (
+// Location: LABCELL_X27_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Py72z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dy23z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dy23z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dy23z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dy23z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Py72z4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Py72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~1 .lut_mask = 64'h0088000800800000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y11_N44
+dffeas \soc_inst|m0_1|u_logic|Xhl2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zb83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xhl2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zb83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zb83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xhl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xhl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N26
-dffeas \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE (
+// Location: FF_X23_Y10_N38
+dffeas \soc_inst|m0_1|u_logic|M743z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|M743z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M743z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M743z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N32
-dffeas \soc_inst|m0_1|u_logic|Qg93z4 (
+// Location: FF_X23_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qg93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qg93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qg93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~6 (
+// Location: LABCELL_X23_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qg93z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Py72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|M743z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qg93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M743z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Py72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .lut_mask = 64'h000000A00000000C;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~0 .lut_mask = 64'h000000000A0C0000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y10_N1
-dffeas \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE (
+// Location: FF_X24_Y11_N1
+dffeas \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y10_N46
-dffeas \soc_inst|m0_1|u_logic|Zfv2z4 (
+// Location: FF_X27_Y11_N41
+dffeas \soc_inst|m0_1|u_logic|Csz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zfv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Csz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zfv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zfv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Csz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Csz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~7 (
+// Location: LABCELL_X27_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Py72z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Csz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Csz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zfv2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Csz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Py72z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .lut_mask = 64'h1010001010000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~2 .lut_mask = 64'h000080A000008000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~8 (
+// Location: FF_X25_Y8_N32
+dffeas \soc_inst|m0_1|u_logic|Igl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Igl2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Igl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Igl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M082z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Zb83z4~q  & (!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|M082z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Igl2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zb83z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Igl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M082z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .lut_mask = 64'hDD000D0000000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M082z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M082z4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|M082z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oaawx4~1 (
+// Location: LABCELL_X27_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oaawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Nn0wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Py72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Py72z4~2_combout  & ( !\soc_inst|m0_1|u_logic|M082z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Py72z4~1_combout  & (!\soc_inst|m0_1|u_logic|Py72z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xhl2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oaawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Py72z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Py72z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Py72z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M082z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Py72z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .lut_mask = 64'h1111115551515155;
-defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~3 .lut_mask = 64'h8A00000000000000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eq63z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eq63z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Xmzvx4~1_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Eq63z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eq63z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eq63z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Eq63z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y10_N41
-dffeas \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE (
+// Location: FF_X24_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|Eq63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Eq63z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Eq63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eq63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eq63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X36_Y9_N1
-dffeas \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE (
+// Location: FF_X29_Y8_N10
+dffeas \soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|A792z4~0_combout  = ( \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A792z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y9_N1
+dffeas \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A792z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A792z4~0 .lut_mask = 64'h0202000002000200;
-defparam \soc_inst|m0_1|u_logic|A792z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y10_N44
-dffeas \soc_inst|m0_1|u_logic|Xyh3z4 (
+// Location: FF_X29_Y8_N52
+dffeas \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xyh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xyh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xyh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X892z4~0 (
+// Location: LABCELL_X24_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X892z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Xyh3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|U7uwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Eq63z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Eq63z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xyh3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Eq63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X892z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U7uwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X892z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X892z4~0 .lut_mask = 64'h0000000000008000;
-defparam \soc_inst|m0_1|u_logic|X892z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .lut_mask = 64'h0055FF55330F330F;
+defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y11_N11
-dffeas \soc_inst|m0_1|u_logic|Pa33z4 (
+// Location: FF_X30_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|N3v2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pa33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|N3v2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pa33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pa33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N3v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N3v2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|A792z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|G123z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Pa33z4~q ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|G123z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pa33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A792z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Pbl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pbl2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A792z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A792z4~1 .lut_mask = 64'h4540000000000000;
-defparam \soc_inst|m0_1|u_logic|A792z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pbl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pbl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|A792z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tvh3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ixh3z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tvh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ixh3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A792z4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y9_N41
+dffeas \soc_inst|m0_1|u_logic|C193z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|C193z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A792z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A792z4~2 .lut_mask = 64'h00C0008800000000;
-defparam \soc_inst|m0_1|u_logic|A792z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C193z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C193z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|A792z4~3_combout  = ( !\soc_inst|m0_1|u_logic|A792z4~1_combout  & ( !\soc_inst|m0_1|u_logic|A792z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|A792z4~0_combout  & (!\soc_inst|m0_1|u_logic|X892z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|M0i3z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|A792z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M0i3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|X892z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A792z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A792z4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A792z4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y11_N7
+dffeas \soc_inst|m0_1|u_logic|Edl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Edl2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A792z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A792z4~3 .lut_mask = 64'hA020000000000000;
-defparam \soc_inst|m0_1|u_logic|A792z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Edl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Edl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wo0wx4~0 (
+// Location: LABCELL_X24_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|A792z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Bjxwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|A792z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|L7p2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|A792z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W5p2z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|A792z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|L7p2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|U7uwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Edl2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|N3v2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|C193z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Edl2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|N3v2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|C193z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Edl2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q ) # (\soc_inst|m0_1|u_logic|Pbl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Edl2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Pbl2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A792z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|N3v2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pbl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C193z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Edl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U7uwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .lut_mask = 64'hAACCAAFFAACCAA0F;
-defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~49 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~22  ))
-// \soc_inst|m0_1|u_logic|Add5~50  = CARRY(( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~22  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~22 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~49_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~50 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~49 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~49 .lut_mask = 64'h0000FF5500003FC0;
-defparam \soc_inst|m0_1|u_logic|Add5~49 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .lut_mask = 64'h0033FF33550F550F;
+defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~53 (
+// Location: LABCELL_X24_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~50  ))
-// \soc_inst|m0_1|u_logic|Add5~54  = CARRY(( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~50  ))
+// \soc_inst|m0_1|u_logic|U7uwx4~combout  = ( \soc_inst|m0_1|u_logic|U7uwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|U7uwx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|U7uwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U7uwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|U7uwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U7uwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~50 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~53_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~54 ),
+	.combout(\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~53 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~53 .lut_mask = 64'h0000FF5500003FC0;
-defparam \soc_inst|m0_1|u_logic|Add5~53 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4 .lut_mask = 64'h5505550550005000;
+defparam \soc_inst|m0_1|u_logic|U7uwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~25 (
+// Location: LABCELL_X27_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nozvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~25_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~54  ))
-// \soc_inst|m0_1|u_logic|Add5~26  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~54  ))
+// \soc_inst|m0_1|u_logic|Nozvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q7j2z4~q  & ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((\soc_inst|m0_1|u_logic|Lgi3z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Q7j2z4~q  & ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( (\soc_inst|m0_1|u_logic|Lgi3z4~q  & (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Q7j2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Lgi3z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|Py72z4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q7j2z4~q  & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Lgi3z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Py72z4~3_combout ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Py72z4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~54 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~25_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~26 ),
+	.combout(\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~25 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~25 .lut_mask = 64'h0000C03F000000AA;
-defparam \soc_inst|m0_1|u_logic|Add5~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .lut_mask = 64'h0503F5F30500F5F0;
+defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~1 (
+// Location: LABCELL_X27_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Znzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do8wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (\soc_inst|m0_1|u_logic|Do8wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~17_sumout  & 
-// !\soc_inst|m0_1|u_logic|Add5~13_sumout )) ) ) )
+// \soc_inst|m0_1|u_logic|Znzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & \soc_inst|m0_1|u_logic|Nozvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Do8wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do8wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .lut_mask = 64'h3000000000000000;
-defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .lut_mask = 64'h3333333311111111;
+defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~2 (
+// Location: LABCELL_X36_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do8wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Add5~61_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~69_sumout  & !\soc_inst|m0_1|u_logic|Add5~73_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|Xmzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( \soc_inst|m0_1|u_logic|Znzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( \soc_inst|m0_1|u_logic|Znzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Znzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Znzvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do8wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xmzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .lut_mask = 64'hA0A0000000000000;
-defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .lut_mask = 64'hA0A0F0F08080C0C0;
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~3 (
+// Location: MLABCELL_X34_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uozvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do8wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Add5~53_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (\soc_inst|m0_1|u_logic|Do8wx4~2_combout  & !\soc_inst|m0_1|u_logic|Add5~49_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|Uozvx4~1_combout  = ( \soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Do8wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do8wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uozvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .lut_mask = 64'h3030000000000000;
-defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .lut_mask = 64'h00FF00FF44774477;
+defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~4 (
+// Location: MLABCELL_X34_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uozvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do8wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Do8wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~1_sumout  & (!\soc_inst|m0_1|u_logic|Add5~5_sumout  & (!\soc_inst|m0_1|u_logic|Add5~9_sumout  & \soc_inst|m0_1|u_logic|Do8wx4~1_combout 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Uozvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Uozvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Uozvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Uozvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pdi2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Uozvx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Do8wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Do8wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uozvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do8wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .lut_mask = 64'h0000000000800080;
-defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .lut_mask = 64'hA0AA00AAA8AA88AA;
+defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phh2z4~0 (
+// Location: LABCELL_X30_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Phh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Nd3wx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Xmzvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xmzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uozvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add5~57_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xmzvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .lut_mask = 64'hBBBBBBBBFFFFCCCC;
-defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .lut_mask = 64'h0000000045000000;
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y6_N1
-dffeas \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE (
+// Location: FF_X27_Y11_N17
+dffeas \soc_inst|m0_1|u_logic|Dy23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Dy23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dy23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dy23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y4_N47
-dffeas \soc_inst|m0_1|u_logic|Bk23z4 (
+// Location: FF_X23_Y10_N43
+dffeas \soc_inst|m0_1|u_logic|Vg53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bk23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vg53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bk23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vg53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vg53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~1 (
+// Location: MLABCELL_X25_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H972z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bk23z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dy23z4~q ) # ((\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Vg53z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Vg53z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bk23z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Dy23z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vg53z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H972z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H972z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H972z4~1 .lut_mask = 64'h2020000022000000;
-defparam \soc_inst|m0_1|u_logic|H972z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .lut_mask = 64'h0F000F00CFCCCFCC;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y4_N14
-dffeas \soc_inst|m0_1|u_logic|Pfz2z4 (
+// Location: FF_X27_Y11_N40
+dffeas \soc_inst|m0_1|u_logic|Csz2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pfz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Csz2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pfz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pfz2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X48_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|H972z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ehz2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yd03z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ehz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yd03z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H972z4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H972z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H972z4~2 .lut_mask = 64'h5000000044000000;
-defparam \soc_inst|m0_1|u_logic|H972z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Csz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Csz2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y4_N53
-dffeas \soc_inst|m0_1|u_logic|T253z4 (
+// Location: FF_X24_Y11_N2
+dffeas \soc_inst|m0_1|u_logic|Wo03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T253z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wo03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T253z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T253z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X42_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|H972z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T253z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kt33z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|T253z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kt33z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H972z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H972z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H972z4~0 .lut_mask = 64'h000000C0000000A0;
-defparam \soc_inst|m0_1|u_logic|H972z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wo03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wo03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eb72z4~0 (
+// Location: MLABCELL_X28_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N71xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eb72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|X2j2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|N71xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|X2j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eb72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .lut_mask = 64'h0000000020000000;
-defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N71xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N71xx4~0 .lut_mask = 64'h0050005000000000;
+defparam \soc_inst|m0_1|u_logic|N71xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y4_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~3 (
+// Location: LABCELL_X24_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H972z4~3_combout  = ( !\soc_inst|m0_1|u_logic|H972z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Eb72z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H972z4~1_combout  & (!\soc_inst|m0_1|u_logic|H972z4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pfz2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~4_combout  = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xhl2z4~q  & (\soc_inst|m0_1|u_logic|Csz2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wo03z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xhl2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wo03z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Csz2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wo03z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Wo03z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H972z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pfz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H972z4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H972z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eb72z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Csz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wo03z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H972z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H972z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H972z4~3 .lut_mask = 64'h8C00000000000000;
-defparam \soc_inst|m0_1|u_logic|H972z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .lut_mask = 64'hAAFF0A0F22330203;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A67wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|A67wx4~0_combout  = ( \soc_inst|m0_1|u_logic|H972z4~3_combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|V1l2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H972z4~3_combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|V1l2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|H972z4~3_combout  & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|V1l2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H972z4~3_combout  & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|V1l2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H972z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y11_N8
+dffeas \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A67wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A67wx4~0 .lut_mask = 64'h0F220F220F220F77;
-defparam \soc_inst|m0_1|u_logic|A67wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zwcvx4 (
+// Location: LABCELL_X24_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zwcvx4~combout  = ( !\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Lgi3z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Lgi3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q ),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zwcvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zwcvx4 .lut_mask = 64'hAAAAAAAA00000000;
-defparam \soc_inst|m0_1|u_logic|Zwcvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .lut_mask = 64'h55005500DDCCDDCC;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~77 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~77_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Zwcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~10  ))
-// \soc_inst|m0_1|u_logic|Add5~78  = CARRY(( (!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Zwcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~10  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~10 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~77_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~78 ),
-	.shareout());
+// Location: FF_X24_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~77 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~77 .lut_mask = 64'h0000FF000000FF62;
-defparam \soc_inst|m0_1|u_logic|Add5~77 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~0 (
+// Location: MLABCELL_X28_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ab1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  ) ) )
+// \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~0 .lut_mask = 64'hF0F0000000000000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .lut_mask = 64'h0500050000000000;
+defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N45
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[11]~3 (
+// Location: MLABCELL_X28_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V41xx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[11]~3_combout  = ( \soc_inst|ram_1|read_cycle~q  & ( (!\soc_inst|interconnect_1|mux_sel [2] & (!\soc_inst|interconnect_1|mux_sel [1] & (\soc_inst|ram_1|byte_select [1] & \soc_inst|interconnect_1|mux_sel [0]))) ) )
+// \soc_inst|m0_1|u_logic|V41xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|ram_1|byte_select [1]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|read_cycle~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[11]~3 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[11]~3 .lut_mask = 64'h0000000000080008;
-defparam \soc_inst|interconnect_1|HRDATA[11]~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V41xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V41xx4~0 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|V41xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N54
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[12]~13 (
+// Location: LABCELL_X23_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~2 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[12]~13_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (!\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout 
-// )) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ) # (\soc_inst|ram_1|byte_select [1]))) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|M743z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M743z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datac(!\soc_inst|ram_1|byte_select [1]),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M743z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[12]~13_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[12]~13 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[12]~13 .lut_mask = 64'h0333033300300030;
-defparam \soc_inst|ram_1|data_to_memory[12]~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y6_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 (
-	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[28]~14_combout ,\soc_inst|ram_1|data_to_memory[12]~13_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X29_Y8_N53
+dffeas \soc_inst|m0_1|u_logic|Tel2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_bit_number = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_bit_number = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021B6DB6D04814E1D3094C00004210842104CC4CC4CC4CC4CC4CC4CC24C00000000000000E4EB000000000000000000000000";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y8_N24
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[28]~14 (
-// Equation(s):
-// \soc_inst|ram_1|data_to_memory[28]~14_combout  = ( \soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ) # (\soc_inst|ram_1|byte_select [3]))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (!\soc_inst|ram_1|byte_select [3] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 )) ) )
-
-	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select [3]),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[28]~14_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+	.q(\soc_inst|m0_1|u_logic|Tel2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[28]~14 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[28]~14 .lut_mask = 64'h0050005005550555;
-defparam \soc_inst|ram_1|data_to_memory[28]~14 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tel2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tel2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N21
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[12]~22 (
-// Equation(s):
-// \soc_inst|interconnect_1|HRDATA[12]~22_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|Uo13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uo13z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[12]~22 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[12]~22 .lut_mask = 64'hF000F000FF0FFF0F;
-defparam \soc_inst|interconnect_1|HRDATA[12]~22 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uo13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uo13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~0 (
+// Location: LABCELL_X29_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jc1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|L7a3z4~q  & ( \soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Iua3z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7a3z4~q  & ( \soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|m0_1|u_logic|G6owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Iua3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|L7a3z4~q  & ( !\soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Iua3z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|L7a3z4~q  & ( !\soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Iua3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L7a3z4~q ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .lut_mask = 64'hF030FF33A020AA22;
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .lut_mask = 64'h0000F00000000000;
+defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~1 (
+// Location: LABCELL_X29_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xrmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|C0ewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|E1ewx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C0ewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|E1ewx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tel2z4~q ) # ((\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & !\soc_inst|m0_1|u_logic|Uo13z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & !\soc_inst|m0_1|u_logic|Uo13z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xrmwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tel2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Uo13z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .lut_mask = 64'h00000000CCFCCFFF;
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .lut_mask = 64'h0F000F00AFAAAFAA;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dpc3z4~0 (
+// Location: FF_X24_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|Nz73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nz73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nz73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nz73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dpc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( \soc_inst|m0_1|u_logic|Dpc3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Dpc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|C193z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Eq63z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C193z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Eq63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .lut_mask = 64'h30FC30FC00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .lut_mask = 64'h000C00000000000A;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N50
-dffeas \soc_inst|m0_1|u_logic|Dpc3z4 (
+// Location: FF_X25_Y8_N31
+dffeas \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dpc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dpc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dpc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bsvwx4~0 (
+// Location: FF_X29_Y8_N11
+dffeas \soc_inst|m0_1|u_logic|Eut2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Eut2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eut2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eut2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bsvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Dpc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Oar2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|Dpc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|N3v2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Eut2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|N3v2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Eut2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Eut2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|N3v2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .lut_mask = 64'h005500550F5F0F5F;
-defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .lut_mask = 64'h00000D0000000800;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~2 (
+// Location: LABCELL_X24_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Bsvwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & !\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bsvwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Bsvwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & !\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsvwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( \soc_inst|m0_1|u_logic|Xrmwx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~7_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kqzvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Kqzvx4~5_combout  & (\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nz73z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kqzvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Kqzvx4~5_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nz73z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xrmwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nz73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kqzvx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .lut_mask = 64'h0F0F0F000F0A0F00;
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .lut_mask = 64'hCC440C0400000000;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B2uvx4~1 (
+// Location: MLABCELL_X25_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B2uvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & !\soc_inst|m0_1|u_logic|Lz93z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~combout  = ( !\soc_inst|m0_1|u_logic|Kqzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kqzvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Kqzvx4~3_combout  & (\soc_inst|m0_1|u_logic|Kqzvx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kqzvx4~1_combout  & !\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ))) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kqzvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kqzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~7_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4awx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J4awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J4awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J4awx4~0 .lut_mask = 64'hFFAAFFAAF5F5F5F5;
+defparam \soc_inst|m0_1|u_logic|J4awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U1uvx4 (
+// Location: LABCELL_X27_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Locvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U1uvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Locvx4~combout  = ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) # ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Locvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U1uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U1uvx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|U1uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Locvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Locvx4 .lut_mask = 64'h33333333FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Locvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y10_N2
-dffeas \soc_inst|m0_1|u_logic|Adt2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|hwdata_o [4]),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Adt2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~57 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~57_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Locvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~122  ))
+// \soc_inst|m0_1|u_logic|Add5~58  = CARRY(( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Locvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~122  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Locvx4~combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~122 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~58 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Adt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Adt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~57 .lut_mask = 64'h000000FF0000FF62;
+defparam \soc_inst|m0_1|u_logic|Add5~57 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxuvx4~0 (
+// Location: LABCELL_X30_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( (\soc_inst|m0_1|u_logic|G0w2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Uaj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Oihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( \soc_inst|m0_1|u_logic|Zpx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~77_sumout 
+// )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( \soc_inst|m0_1|u_logic|Zpx2z4~q  & ( ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~77_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( !\soc_inst|m0_1|u_logic|Zpx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~77_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( !\soc_inst|m0_1|u_logic|Zpx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~77_sumout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add2~77_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oihvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .lut_mask = 64'h0000000000100000;
-defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .lut_mask = 64'hAA88A080FFDDF0D0;
+defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1ivx4~0 (
+// Location: LABCELL_X30_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout  & (\soc_inst|m0_1|u_logic|Ipb3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( (\soc_inst|m0_1|u_logic|Ipb3z4~q  & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( (\soc_inst|m0_1|u_logic|Ipb3z4~q  & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Oihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oihvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Oihvx4~2_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oihvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Oihvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oihvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oihvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .lut_mask = 64'h0F0C0F0C5F4C5544;
-defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .lut_mask = 64'h000000008888888A;
+defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N50
-dffeas \soc_inst|m0_1|u_logic|Ipb3z4 (
+// Location: FF_X30_Y18_N25
+dffeas \soc_inst|m0_1|u_logic|Zpx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zpx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ipb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zpx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zpx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fhc3z4~0 (
+// Location: LABCELL_X17_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fhc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Fhc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( \soc_inst|m0_1|u_logic|Fhc3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Add2~29_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~78  ))
+// \soc_inst|m0_1|u_logic|Add2~30  = CARRY(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~78  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~78 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fhc3z4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~29_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .lut_mask = 64'h00FF00FF0AFA0AFA;
-defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~29 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N32
-dffeas \soc_inst|m0_1|u_logic|Fhc3z4 (
+// Location: FF_X28_Y6_N16
+dffeas \soc_inst|m0_1|u_logic|X543z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fhc3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X543z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fhc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fhc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X543z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X543z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dewwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Dewwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & ((\soc_inst|m0_1|u_logic|Fhc3z4~q ))) # (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (\soc_inst|m0_1|u_logic|Ipb3z4~q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dewwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y7_N47
+dffeas \soc_inst|m0_1|u_logic|Gf53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gf53z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .lut_mask = 64'h0F550F5500000000;
-defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gf53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dewwx4~1 (
+// Location: LABCELL_X31_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dewwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dewwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Adt2z4~q ) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Dewwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Dewwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ds72z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Gf53z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|X543z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Adt2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dewwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X543z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gf53z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dewwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ds72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .lut_mask = 64'h00000F0055555F55;
-defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .lut_mask = 64'h0000000020203000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Gtmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dewwx4~1_combout  & ( \soc_inst|interconnect_1|HRDATA[4]~23_combout  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout ) # (\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dewwx4~1_combout  & ( \soc_inst|interconnect_1|HRDATA[4]~23_combout  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Dewwx4~1_combout  & ( !\soc_inst|interconnect_1|HRDATA[4]~23_combout  & ( 
-// \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) )
+// Location: FF_X31_Y7_N35
+dffeas \soc_inst|m0_1|u_logic|Nqz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nqz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nqz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nqz2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dewwx4~1_combout ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y6_N25
+dffeas \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .lut_mask = 64'h0000555500FF55FF;
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~1 (
+// Location: LABCELL_X31_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gtmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Taa3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Gza3z4~q ))) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Gza3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ds72z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nqz2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Taa3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ds72z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .lut_mask = 64'hF5F5313100000000;
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .lut_mask = 64'h00C0000000A00000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~2 (
+// Location: FF_X31_Y7_N38
+dffeas \soc_inst|m0_1|u_logic|D7k2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|D7k2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D7k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fn13z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Godwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Fn13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Uhzvx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~1_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .lut_mask = 64'h00000000FFFF505F;
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fn13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fn13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Fn13z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y13_N38
-dffeas \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE (
+// Location: FF_X30_Y6_N58
+dffeas \soc_inst|m0_1|u_logic|Fn13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Fn13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fn13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y9_N38
-dffeas \soc_inst|switches_1|switch_store[1][4] (
+// Location: FF_X33_Y7_N37
+dffeas \soc_inst|m0_1|u_logic|Ow23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[4]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][4]~q ),
+	.q(\soc_inst|m0_1|u_logic|Ow23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][4] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][4] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X24_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sjvwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sjvwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
-// (\soc_inst|switches_1|switch_store[1][4]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (\soc_inst|switches_1|switch_store[1][4]~q  & (\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|m0_1|u_logic|B7owx4~combout  & 
-// \soc_inst|interconnect_1|HRDATA[20]~7_combout ))) ) )
-
-	.dataa(!\soc_inst|switches_1|switch_store[1][4]~q ),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sjvwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .lut_mask = 64'h00010001000D000D;
-defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ow23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y13_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntmwx4~0 (
+// Location: LABCELL_X33_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|m0_1|u_logic|Sjvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|I1h3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|m0_1|u_logic|Sjvwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|I1h3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ds72z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fn13z4~q  & ( \soc_inst|m0_1|u_logic|Ow23z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fn13z4~q  & ( !\soc_inst|m0_1|u_logic|Ow23z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fn13z4~q  & ( !\soc_inst|m0_1|u_logic|Ow23z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|I1h3z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjvwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fn13z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ow23z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ntmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ds72z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .lut_mask = 64'hFF33551100000000;
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .lut_mask = 64'h0A00020008000000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntmwx4~1 (
+// Location: FF_X25_Y11_N5
+dffeas \soc_inst|m0_1|u_logic|O5k2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|O5k2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O5k2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O5k2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Au72z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Xtdwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Xtdwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Au72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5k2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ntmwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5k2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Au72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .lut_mask = 64'h00000000ABABEFEF;
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Au72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Au72z4~0 .lut_mask = 64'h0020000000000000;
+defparam \soc_inst|m0_1|u_logic|Au72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzpvx4~0 (
+// Location: LABCELL_X31_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzpvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|V9iwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ds72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ds72z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Au72z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ds72z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ds72z4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|D7k2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ds72z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ds72z4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D7k2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ds72z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Au72z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ds72z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .lut_mask = 64'h3F3F0F0F33330000;
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .lut_mask = 64'h80A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsmwx4~0 (
+// Location: LABCELL_X33_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hlzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[29]~0_combout  & ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ))))) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|S8k2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|S8k2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|S8k2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
-	.datad(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ds72z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lsmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .lut_mask = 64'hFF00FF0072007200;
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .lut_mask = 64'h0A4E0A4E1B5F0A4E;
+defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsmwx4~1 (
+// Location: LABCELL_X33_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpcvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lsmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wbk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wbk2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Wpcvx4~combout  = ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lsmwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wpcvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .lut_mask = 64'h0000CCC80000FFFA;
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wpcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wpcvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wpcvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzpvx4~1 (
+// Location: MLABCELL_X34_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wzpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|H3awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Djzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzpvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .lut_mask = 64'h33030000FF0F0000;
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3awx4~0 .lut_mask = 64'hFAFAFAFAFF55FF55;
+defparam \soc_inst|m0_1|u_logic|H3awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D47wx4~0 (
+// Location: LABCELL_X31_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D47wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Add5~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Wpcvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~58  ))
+// \soc_inst|m0_1|u_logic|Add5~6  = CARRY(( !\soc_inst|m0_1|u_logic|Wpcvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~58  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wpcvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~58 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D47wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~6 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D47wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D47wx4~0 .lut_mask = 64'h0000000000010001;
-defparam \soc_inst|m0_1|u_logic|D47wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~5 .lut_mask = 64'h0000009D0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add5~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxpvx4~0 (
+// Location: LABCELL_X19_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zxpvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|D47wx4~0_combout  & ( \soc_inst|m0_1|u_logic|P37wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (((!\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lrx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Add2~29_sumout ) # ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) 
+// # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lrx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add2~29_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lrx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Add2~29_sumout ) # 
+// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lrx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add2~29_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D47wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~29_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hihvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .lut_mask = 64'h00000000FFBF0000;
-defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .lut_mask = 64'hC8C8FBFBC800FB00;
+defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phh2z4~1 (
+// Location: LABCELL_X19_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Phh2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Phh2z4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Hihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hihvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hihvx4~2_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hihvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hihvx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hihvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hihvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .lut_mask = 64'h00000000A0A0A0B0;
+defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S17wx4~0 (
+// Location: FF_X19_Y14_N7
+dffeas \soc_inst|m0_1|u_logic|Lrx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lrx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lrx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S17wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Zwcvx4~combout  & \soc_inst|m0_1|u_logic|Phh2z4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( 
-// (\soc_inst|m0_1|u_logic|Zwcvx4~combout  & !\soc_inst|m0_1|u_logic|Phh2z4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add3~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~74  ))
+// \soc_inst|m0_1|u_logic|Add3~22  = CARRY(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~74  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~74 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~21_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~22 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S17wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S17wx4~0 .lut_mask = 64'h0F000F0000F000F0;
-defparam \soc_inst|m0_1|u_logic|S17wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~21 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhnvx4~0 (
+// Location: LABCELL_X35_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nhzvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rhnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q  & \soc_inst|m0_1|u_logic|Wspvx4~combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q  & \soc_inst|m0_1|u_logic|Wspvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wspvx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Nhzvx4~combout  = ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add3~21_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~21_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add3~21_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add3~21_sumout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add3~21_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rhnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .lut_mask = 64'h0F0F0A0A00000A0A;
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nhzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nhzvx4 .lut_mask = 64'hA8A8FCFCA800FC00;
+defparam \soc_inst|m0_1|u_logic|Nhzvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhnvx4~1 (
+// Location: LABCELL_X36_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5lvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rhnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rhnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & ((!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & !\soc_inst|m0_1|u_logic|X4pvx4~combout )))) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (((\soc_inst|m0_1|u_logic|X4pvx4~combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rhnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # ((!\soc_inst|m0_1|u_logic|X4pvx4~combout ) # (\soc_inst|m0_1|u_logic|K0qvx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|R5lvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~q )) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|S8k2z4~q  & ( !\soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~q 
+// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( !\soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Lrx2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rhnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R5lvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .lut_mask = 64'hFFCFD5CF00000000;
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .lut_mask = 64'h2030E0F02233EEFF;
+defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y9_N49
-dffeas \soc_inst|m0_1|u_logic|Idk2z4 (
+// Location: FF_X36_Y11_N38
+dffeas \soc_inst|m0_1|u_logic|S8k2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|R5lvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Idk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|S8k2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Idk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Idk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S8k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S8k2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnawx4~0 (
+// Location: LABCELL_X29_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Whh2z4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Whh2z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Whh2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Whh2z4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|S8k2z4~q  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|K2k2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( ((\soc_inst|m0_1|u_logic|U71xx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|K2k2z4~q )) # (\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K2k2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .lut_mask = 64'hFD20F2F20000F2F2;
-defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .lut_mask = 64'h5F555F550F000F00;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C3qvx4~0 (
+// Location: FF_X31_Y7_N46
+dffeas \soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C3qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Idk2z4~q  & ( \soc_inst|m0_1|u_logic|Mnawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rmawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Izpvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Idk2z4~q  & ( \soc_inst|m0_1|u_logic|Mnawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Izpvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ow23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ow23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mnawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ow23z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .lut_mask = 64'h00000000F0FFC0CC;
-defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~15 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~15_combout  = ( \soc_inst|m0_1|u_logic|Va3wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I30wx4~0_combout  & (\soc_inst|m0_1|u_logic|C3qvx4~0_combout  & \soc_inst|m0_1|u_logic|Yqzvx4~0_combout )) ) )
+// Location: FF_X28_Y6_N17
+dffeas \soc_inst|m0_1|u_logic|X543z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X543z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X543z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X543z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~15_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y10_N59
+dffeas \soc_inst|m0_1|u_logic|V0k2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V0k2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~15 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~15 .lut_mask = 64'h0000000000050005;
-defparam \soc_inst|m0_1|u_logic|N88wx4~15 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V0k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V0k2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ox1wx4~0 (
+// Location: MLABCELL_X28_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ox1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~113_sumout  ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V0k2z4~q ) # ((!\soc_inst|m0_1|u_logic|X543z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X543z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|X543z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|V0k2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .lut_mask = 64'h00000000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .lut_mask = 64'h00CC00CCF0FCF0FC;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~2 (
+// Location: FF_X29_Y10_N23
+dffeas \soc_inst|m0_1|u_logic|Yx73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yx73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yx73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y11_N4
+dffeas \soc_inst|m0_1|u_logic|O5k2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|O5k2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O5k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O5k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y10_N22
+dffeas \soc_inst|m0_1|u_logic|Nz83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nz83z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nz83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nz83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X30_Y8_N26
+dffeas \soc_inst|m0_1|u_logic|Po63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Po63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & \soc_inst|m0_1|u_logic|U6awx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & !\soc_inst|m0_1|u_logic|U6awx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & \soc_inst|m0_1|u_logic|U6awx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|U6awx4~1_combout )) # (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Nz83z4~q  & ( \soc_inst|m0_1|u_logic|Po63z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  
+// & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nz83z4~q  & ( !\soc_inst|m0_1|u_logic|Po63z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nz83z4~q  & ( !\soc_inst|m0_1|u_logic|Po63z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nz83z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Po63z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~2 .lut_mask = 64'h131D131D474C474C;
-defparam \soc_inst|m0_1|u_logic|N88wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .lut_mask = 64'h0021002000010000;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y8_N13
+dffeas \soc_inst|m0_1|u_logic|Pst2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pst2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pst2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pst2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y10_N41
+dffeas \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~3 (
+// Location: LABCELL_X29_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~3_combout  = ( \soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & (((\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # ((!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Pst2z4~q  & ( \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pst2z4~q  & ( !\soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pst2z4~q  & ( !\soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pst2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~3 .lut_mask = 64'h050A050A37CE37CE;
-defparam \soc_inst|m0_1|u_logic|N88wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .lut_mask = 64'h0300010002000000;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nf1wx4~0 (
+// Location: LABCELL_X29_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nf1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Djzvx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Djzvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Yx73z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5k2z4~q )))) # (\soc_inst|m0_1|u_logic|Yx73z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5k2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yx73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5k2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Djzvx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .lut_mask = 64'h000F000F00F000F0;
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .lut_mask = 64'hD0DD000000000000;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjzvx4~0 (
+// Location: FF_X29_Y8_N29
+dffeas \soc_inst|m0_1|u_logic|Z3k2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z3k2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z3k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z3k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rjzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fn13z4~q  & ( (!\soc_inst|m0_1|u_logic|Z3k2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fn13z4~q  & ( ((!\soc_inst|m0_1|u_logic|Z3k2z4~q  & 
+// \soc_inst|m0_1|u_logic|Jc1xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z3k2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fn13z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rjzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .lut_mask = 64'hFF00FF000F000F00;
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .lut_mask = 64'h3B3B3B3B0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Nf1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rjzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~3_combout  & ((!\soc_inst|m0_1|u_logic|F32wx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) )
+// Location: FF_X31_Y7_N37
+dffeas \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N88wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y6_N26
+dffeas \soc_inst|m0_1|u_logic|Hn03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hn03z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~4 .lut_mask = 64'hC8C4000000000000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hn03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hn03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~5 (
+// Location: MLABCELL_X28_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|N88wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~4_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~4_combout  = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqz2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hn03z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hn03z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nqz2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hn03z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Hn03z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N88wx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hn03z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~5 .lut_mask = 64'hCCCC0000EEEEAAAA;
-defparam \soc_inst|m0_1|u_logic|N88wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .lut_mask = 64'hF0FF303350551011;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y3_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ox1wx4~1 (
+// Location: LABCELL_X29_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ox1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~combout  = ( !\soc_inst|m0_1|u_logic|Djzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Djzvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Djzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Djzvx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Djzvx4~2_combout  & \soc_inst|m0_1|u_logic|Djzvx4~7_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Djzvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Djzvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Djzvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Djzvx4~7_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Djzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .lut_mask = 64'hF0F00000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Djzvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wsawx4~0 (
+// Location: LABCELL_X27_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wsawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~10_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Djzvx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Djzvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .lut_mask = 64'hFAE4F5D8FA00F500;
-defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .lut_mask = 64'h4444555044440500;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~6 (
+// Location: LABCELL_X27_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ynvvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Ox1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wsawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout  & (\soc_inst|m0_1|u_logic|Ksbwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|N88wx4~5_combout  & \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ynvvx4~combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (!\soc_inst|m0_1|u_logic|S5b3z4~q  & (\soc_inst|m0_1|u_logic|K3l2z4~q  & (\soc_inst|m0_1|u_logic|Wfuwx4~combout ))) # (\soc_inst|m0_1|u_logic|S5b3z4~q  & 
+// (((\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|Wfuwx4~combout )) # (\soc_inst|m0_1|u_logic|R3uvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (\soc_inst|m0_1|u_logic|S5b3z4~q  & 
+// \soc_inst|m0_1|u_logic|R3uvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N88wx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S5b3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~6 .lut_mask = 64'h0000000000000002;
-defparam \soc_inst|m0_1|u_logic|N88wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ynvvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ynvvx4 .lut_mask = 64'h0055005503570357;
+defparam \soc_inst|m0_1|u_logic|Ynvvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~3 (
+// Location: LABCELL_X27_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~18 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cr1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~18_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Kqzvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Htyvx4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Kqzvx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kqzvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Htyvx4~3_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Kqzvx4~combout ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .lut_mask = 64'h1B271B2722112211;
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .lut_mask = 64'h3311321022003210;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d3z4~0 (
+// Location: LABCELL_X27_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G6d3z4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|P03wx4~0_combout  & (\soc_inst|interconnect_1|HREADY~0_combout  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (\soc_inst|m0_1|u_logic|P03wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|M5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( ((\soc_inst|m0_1|u_logic|M5mvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|K3l2z4~q ) # (!\soc_inst|m0_1|u_logic|Wfuwx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Ynvvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( (\soc_inst|m0_1|u_logic|Ynvvx4~combout ) # (\soc_inst|m0_1|u_logic|M5mvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M5mvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G6d3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .lut_mask = 64'h1030103010101010;
-defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .lut_mask = 64'h5F5F5F5F5F4F5F4F;
+defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y11_N49
-dffeas \soc_inst|m0_1|u_logic|G6d3z4 (
+// Location: FF_X27_Y17_N55
+dffeas \soc_inst|m0_1|u_logic|Hzj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -50742,2087 +51947,2384 @@ dffeas \soc_inst|m0_1|u_logic|G6d3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G6d3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hzj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G6d3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hzj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hzj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[9]~6 (
+// Location: LABCELL_X22_Y19_N30
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[26]~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  = ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|Htyvx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & \soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) )
+// \soc_inst|ram_1|data_to_memory[26]~8_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( !\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[26]~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[26]~8 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[26]~8 .lut_mask = 64'h00000F00000F0F0F;
+defparam \soc_inst|ram_1|data_to_memory[26]~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y10_N29
-dffeas \soc_inst|m0_1|u_logic|Kxe3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+// Location: M10K_X26_Y19_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[26]~8_combout ,\soc_inst|ram_1|data_to_memory[2]~7_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kxe3z4~q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kxe3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kxe3z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_bit_number = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_bit_number = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B2CF7C680700001601080A0501005014A40A00A40A00A40A00A40803FFFFFFFFFFFFD70014110404444400000041001110";
 // synopsys translate_on
 
-// Location: FF_X24_Y11_N26
-dffeas \soc_inst|m0_1|u_logic|Aze3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aze3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X19_Y19_N39
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[2]~7 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[2]~7_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|byte_select [0]),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|ram_1|data_to_memory[2]~7_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aze3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aze3z4 .power_up = "low";
+defparam \soc_inst|ram_1|data_to_memory[2]~7 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[2]~7 .lut_mask = 64'h00000C0C03030F0F;
+defparam \soc_inst|ram_1|data_to_memory[2]~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~9 (
+// Location: LABCELL_X22_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7qwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dhb3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~90  ))
-// \soc_inst|m0_1|u_logic|Add0~10  = CARRY(( !\soc_inst|m0_1|u_logic|Dhb3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~90  ))
+// \soc_inst|m0_1|u_logic|T7qwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout ))) ) 
+// ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~90 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~9_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~10 ),
+	.combout(\soc_inst|m0_1|u_logic|T7qwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~9 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .lut_mask = 64'h5000500055055505;
+defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~77 (
+// Location: LABCELL_X22_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M5f3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~10  ))
-// \soc_inst|m0_1|u_logic|Add0~78  = CARRY(( !\soc_inst|m0_1|u_logic|M5f3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~10  ))
+// \soc_inst|m0_1|u_logic|Jkmwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T7qwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Hzj2z4~q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T7qwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~10 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~77_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~78 ),
+	.combout(\soc_inst|m0_1|u_logic|Jkmwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~77 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~77 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~77 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .lut_mask = 64'hFFFCFFFC00000000;
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y11_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[8]~7 (
+// Location: LABCELL_X23_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F7qwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|P12wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|F7qwx4~combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F7qwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F7qwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F7qwx4 .lut_mask = 64'h050F050F0A000A00;
+defparam \soc_inst|m0_1|u_logic|F7qwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y11_N58
-dffeas \soc_inst|m0_1|u_logic|W3f3z4 (
+// Location: FF_X25_Y10_N32
+dffeas \soc_inst|m0_1|u_logic|Rro2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W3f3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rro2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W3f3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W3f3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X24_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Armvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Armvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5f3z4~q  & ( \soc_inst|m0_1|u_logic|W3f3z4~q  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~77_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M5f3z4~q  & ( \soc_inst|m0_1|u_logic|W3f3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~77_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|M5f3z4~q  & ( !\soc_inst|m0_1|u_logic|W3f3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~77_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M5f3z4~q  & ( !\soc_inst|m0_1|u_logic|W3f3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~77_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~77_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|W3f3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Armvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Armvx4~0 .lut_mask = 64'h5D55FDF55F57FFF7;
-defparam \soc_inst|m0_1|u_logic|Armvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rro2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rro2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y11_N43
-dffeas \soc_inst|m0_1|u_logic|M5f3z4 (
+// Location: FF_X30_Y10_N7
+dffeas \soc_inst|m0_1|u_logic|Uu83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M5f3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uu83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5f3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M5f3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~25 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~78  ))
-// \soc_inst|m0_1|u_logic|Add0~26  = CARRY(( !\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~78  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~78 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~25_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~26 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~25 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~25 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uu83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uu83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqmvx4~0 (
+// Location: MLABCELL_X25_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aze3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|Kxe3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aze3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~25_sumout  & ( ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Kxe3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aze3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Kxe3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aze3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~25_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Kxe3z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kxe3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add0~25_sumout ),
+// \soc_inst|m0_1|u_logic|Saqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rro2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Uu83z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rro2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uu83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Saqwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .lut_mask = 64'h2F3FEFFF0F1FCFDF;
-defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .lut_mask = 64'h0000000000003120;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y11_N25
-dffeas \soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE (
+// Location: FF_X29_Y11_N14
+dffeas \soc_inst|m0_1|u_logic|Vuo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Vuo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vuo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vuo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y10_N11
-dffeas \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE (
+// Location: FF_X29_Y11_N11
+dffeas \soc_inst|m0_1|u_logic|Wj63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Wj63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wj63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mxa2z4~0 (
+// Location: LABCELL_X29_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tdp2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Saqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vuo2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wj63z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vuo2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wj63z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Saqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .lut_mask = 64'h0100000000000000;
-defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .lut_mask = 64'h00D8000000000000;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0ivx4~0 (
+// Location: LABCELL_X27_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gto2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Gto2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gto2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .lut_mask = 64'h0CFF08AA0F0F0A0A;
-defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gto2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gto2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Gto2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y10_N10
-dffeas \soc_inst|m0_1|u_logic|Y9l2z4 (
+// Location: FF_X27_Y6_N41
+dffeas \soc_inst|m0_1|u_logic|Gto2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Gto2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gto2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y9l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y9l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gto2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gto2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y10_N50
-dffeas \soc_inst|m0_1|u_logic|Vve3z4 (
+// Location: FF_X30_Y9_N13
+dffeas \soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vve3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vve3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vve3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vve3z4~0 (
+// Location: LABCELL_X27_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vve3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( \soc_inst|m0_1|u_logic|Vve3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Vve3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Saqwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Gto2z4~q  & ( \soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gto2z4~q  & ( !\soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gto2z4~q  & ( !\soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gto2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Saqwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .lut_mask = 64'h0AFA0AFA00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .lut_mask = 64'h0050001000400000;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y10_N49
-dffeas \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE (
+// Location: FF_X31_Y8_N20
+dffeas \soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~0 (
+// Location: FF_X30_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Ft73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ft73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ft73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ft73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9l2z4~q  & (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Y9l2z4~q  
-// & (((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Saqwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ft73z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ft73z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Saqwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .lut_mask = 64'h0000000005370537;
-defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .lut_mask = 64'h00000A0000000C00;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N27
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~15 (
+// Location: LABCELL_X29_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[8]~15_combout  = ( \soc_inst|interconnect_1|HRDATA[7]~9_combout  & ( ((\soc_inst|ram_1|read_cycle~q  & (\soc_inst|ram_1|byte_select [1] & \soc_inst|interconnect_1|mux_sel [0]))) # (\soc_inst|interconnect_1|mux_sel [1]) ) )
+// \soc_inst|m0_1|u_logic|Saqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Saqwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Saqwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Saqwx4~0_combout  & !\soc_inst|m0_1|u_logic|Saqwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|ram_1|read_cycle~q ),
-	.datab(!\soc_inst|ram_1|byte_select [1]),
-	.datac(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
+	.dataa(!\soc_inst|m0_1|u_logic|Saqwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Saqwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Saqwx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[7]~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Saqwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[8]~15_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Saqwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[8]~15 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[8]~15 .lut_mask = 64'h000000000F1F0F1F;
-defparam \soc_inst|interconnect_1|HRDATA[8]~15 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Saqwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: IOIBUF_X32_Y0_N52
-cyclonev_io_ibuf \SW[9]~input (
-	.i(SW[9]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[9]~input_o ));
+// Location: LABCELL_X27_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kepwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kepwx4~0_combout  = ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( \soc_inst|m0_1|u_logic|Saqwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \SW[9]~input .bus_hold = "false";
-defparam \SW[9]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .lut_mask = 64'h00000F0FF0F0FFFF;
+defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y9_N8
-dffeas \soc_inst|switches_1|switch_store[0][9] (
+// Location: FF_X28_Y12_N14
+dffeas \soc_inst|m0_1|u_logic|Ejm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[9]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][9]~q ),
+	.q(\soc_inst|m0_1|u_logic|Ejm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][9] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][9] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ejm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ejm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N6
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[9]~16 (
+// Location: MLABCELL_X28_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~3 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[9]~16_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[8]~15_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
-// (\soc_inst|interconnect_1|HRDATA[8]~15_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # ((\soc_inst|switches_1|switch_store[0][9]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[8]~15_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[8]~15_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[0][9]~q )))) ) 
-// )
+// \soc_inst|m0_1|u_logic|Cawwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Rvu2z4~q  & ( \soc_inst|m0_1|u_logic|Ejm2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rvu2z4~q  & ( !\soc_inst|m0_1|u_logic|Ejm2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rvu2z4~q  & ( !\soc_inst|m0_1|u_logic|Ejm2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[8]~15_combout ),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[0][9]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rvu2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ejm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cawwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[9]~16 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[9]~16 .lut_mask = 64'hA0B1A0B1E4F5E4F5;
-defparam \soc_inst|interconnect_1|HRDATA[9]~16 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .lut_mask = 64'h1010100000100000;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~1 (
+// Location: FF_X24_Y9_N20
+dffeas \soc_inst|m0_1|u_logic|Rr73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rr73z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rr73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rr73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khfwx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[9]~16_combout  & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & (!\soc_inst|m0_1|u_logic|B7owx4~combout  & 
-// !\soc_inst|m0_1|u_logic|Khfwx4~0_combout ))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[9]~16_combout  & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & !\soc_inst|m0_1|u_logic|Khfwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Cawwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Imt2z4~q  & ( \soc_inst|m0_1|u_logic|Rr73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Imt2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Imt2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Khfwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Imt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rr73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cawwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .lut_mask = 64'h8800880080008000;
-defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .lut_mask = 64'h0022000200200000;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~2 (
+// Location: MLABCELL_X28_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( \soc_inst|m0_1|u_logic|Khfwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Kxe3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( \soc_inst|m0_1|u_logic|Khfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Cawwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Ii63z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Skm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kxe3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ii63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Skm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khfwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cawwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .lut_mask = 64'h00000000F3F35151;
-defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .lut_mask = 64'h0000A00000008080;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~3 (
+// Location: LABCELL_X27_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khfwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Khfwx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Khfwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Yxdwx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Cawwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Gmm2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Unm2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gmm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Unm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cawwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .lut_mask = 64'h00000000F4F4F7F7;
-defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .lut_mask = 64'h0000000000004450;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4~0 (
+// Location: MLABCELL_X28_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vq1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & !\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & !\soc_inst|m0_1|u_logic|Khfwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Cawwx4~combout  = ( !\soc_inst|m0_1|u_logic|Cawwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Cawwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Cawwx4~2_combout  & !\soc_inst|m0_1|u_logic|Cawwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cawwx4~3_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cawwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cawwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cawwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cawwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .lut_mask = 64'hFAF0FAF0AA00AA00;
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Cawwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4~1 (
+// Location: LABCELL_X27_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jiowx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vq1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vq1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Vq1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jiowx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Duuwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cawwx4~combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vq1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .lut_mask = 64'h00F30000F3F30000;
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4 (
+// Location: LABCELL_X27_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kepwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vq1wx4~combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vq1wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & \soc_inst|m0_1|u_logic|Vq1wx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kepwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jiowx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kepwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jiowx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Kepwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vq1wx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vq1wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vq1wx4 .lut_mask = 64'h00CC00CC00CF00CF;
-defparam \soc_inst|m0_1|u_logic|Vq1wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d3z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|G6d3z4~1_combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & (((\soc_inst|m0_1|u_logic|G6d3z4~q )))) # (\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mtqvx4~combout ) # ((\soc_inst|m0_1|u_logic|Qrnvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & (((\soc_inst|m0_1|u_logic|G6d3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & (\soc_inst|m0_1|u_logic|Mtqvx4~combout  & (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G6d3z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X29_Y11_N32
+dffeas \soc_inst|m0_1|u_logic|Jlo2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jlo2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .lut_mask = 64'h01F101F10BFB0BFB;
-defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jlo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jlo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y11_N50
-dffeas \soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE (
+// Location: FF_X27_Y7_N59
+dffeas \soc_inst|m0_1|u_logic|Bk13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Bk13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bk13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ffbwx4~0 (
+// Location: LABCELL_X29_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ffbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bk13z4~q ) # ((!\soc_inst|m0_1|u_logic|Jlo2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jlo2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Jlo2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bk13z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .lut_mask = 64'h0008000800000000;
-defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cr1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  & !\soc_inst|m0_1|u_logic|Uaj2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Uaj2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  & !\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X29_Y10_N31
+dffeas \soc_inst|m0_1|u_logic|Ujo2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ujo2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .lut_mask = 64'h88888080AAAAA0A0;
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ujo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ujo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~0 (
+// Location: LABCELL_X29_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cr1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|Cr1wx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & \soc_inst|m0_1|u_logic|Cr1wx4~2_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|Cr1wx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & 
-// \soc_inst|m0_1|u_logic|Cr1wx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cqo2z4~q ) # ((\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ujo2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ujo2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cr1wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ujo2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .lut_mask = 64'h00CC000C00440004;
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .lut_mask = 64'h55005500F5F0F5F0;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uozvx4~1 (
+// Location: MLABCELL_X34_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fio2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uozvx4~1_combout  = ( \soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Fio2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fdzvx4~0_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uozvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fio2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .lut_mask = 64'h00FF00FF303F303F;
-defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fio2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fio2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Fio2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uozvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Uozvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uozvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Uozvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pdi2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uozvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X34_Y8_N44
+dffeas \soc_inst|m0_1|u_logic|Fio2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fio2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fio2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .lut_mask = 64'hCE0AFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fio2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fio2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|L9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Igi2z4~q  & \soc_inst|m0_1|u_logic|Rmawx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Igi2z4~q  & \soc_inst|m0_1|u_logic|Rmawx4~0_combout )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L9zvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y8_N40
+dffeas \soc_inst|m0_1|u_logic|T243z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T243z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .lut_mask = 64'hAAFAAAFA00F000F0;
-defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T243z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T243z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~2 (
+// Location: MLABCELL_X34_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L9zvx4~2_combout  = (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igi2z4~q )))
+// \soc_inst|m0_1|u_logic|Rtpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T243z4~q ) # ((!\soc_inst|m0_1|u_logic|Fio2z4~q  & \soc_inst|m0_1|u_logic|V41xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fio2z4~q  & \soc_inst|m0_1|u_logic|V41xx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fio2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T243z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L9zvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .lut_mask = 64'hF300F300F300F300;
-defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|L9zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
+// Location: FF_X28_Y8_N25
+dffeas \soc_inst|m0_1|u_logic|Cc53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cc53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc53z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L9zvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y7_N37
+dffeas \soc_inst|m0_1|u_logic|Kt23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kt23z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .lut_mask = 64'hF000F000CC00F000;
-defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kt23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4 (
+// Location: LABCELL_X29_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L9zvx4~combout  = ( \soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & (!\soc_inst|m0_1|u_logic|L9zvx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & (((\soc_inst|m0_1|u_logic|L9zvx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & \soc_inst|m0_1|u_logic|L9zvx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|L9zvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & ((\soc_inst|m0_1|u_logic|L9zvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & \soc_inst|m0_1|u_logic|L9zvx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cc53z4~q ) # ((\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Kt23z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Kt23z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L9zvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L9zvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L9zvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cc53z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kt23z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L9zvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L9zvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L9zvx4 .lut_mask = 64'h03038B8B0303038B;
-defparam \soc_inst|m0_1|u_logic|L9zvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .lut_mask = 64'h55005500F5F0F5F0;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~13 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~13_combout  = ( \soc_inst|m0_1|u_logic|L9zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Luzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J61wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout  & !\soc_inst|m0_1|u_logic|Uozvx4~0_combout ))) ) ) )
+// Location: FF_X29_Y10_N2
+dffeas \soc_inst|m0_1|u_logic|Uu73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uu73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uu73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uu73z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L9zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~13_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X29_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Uyu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uyu2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~13 .lut_mask = 64'h0000800000000000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uyu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uyu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z80wx4~1 (
+// Location: LABCELL_X29_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z80wx4~1_combout  = (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|E5awx4~1_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|E5awx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|E5awx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout ))))
+// \soc_inst|m0_1|u_logic|Rtpvx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uyu2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lpt2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uyu2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Lpt2z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lpt2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uyu2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z80wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .lut_mask = 64'h271B271B271B271B;
-defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .lut_mask = 64'h0000405000004000;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z80wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z80wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z80wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|N90wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Z80wx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Z80wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|N90wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Z80wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) ) ) )
+// Location: FF_X25_Y11_N2
+dffeas \soc_inst|m0_1|u_logic|Ymo2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ymo2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ymo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ymo2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z80wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X29_Y11_N25
+dffeas \soc_inst|m0_1|u_logic|Jw83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jw83z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .lut_mask = 64'h2200333332303333;
-defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jw83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~19 (
+// Location: FF_X29_Y11_N55
+dffeas \soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~19_combout  = ( \soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Jw83z4~q  
+// & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Jw83z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jw83z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~19_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~19 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~19 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~19 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .lut_mask = 64'h0000000000980010;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~21 (
+// Location: LABCELL_X29_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~21_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~7_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rtpvx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~6_combout  & (\soc_inst|m0_1|u_logic|Ymo2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uu73z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rtpvx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uu73z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uu73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ymo2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~21_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~21 .lut_mask = 64'h00F000F0F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|N88wx4~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .lut_mask = 64'hD0D000D000000000;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~8 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~8_combout  = ( \soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # ((\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) )
+// Location: FF_X25_Y9_N28
+dffeas \soc_inst|m0_1|u_logic|Sl03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sl03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sl03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sl03z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~8_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y11_N22
+dffeas \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~8 .lut_mask = 64'h00A500A5C3E7C3E7;
-defparam \soc_inst|m0_1|u_logic|N88wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~7 (
+// Location: FF_X25_Y9_N40
+dffeas \soc_inst|m0_1|u_logic|Yoz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yoz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yoz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yoz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|U6awx4~1_combout  & (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|U6awx4~1_combout  & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|U6awx4~1_combout  & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (\soc_inst|m0_1|u_logic|U6awx4~1_combout  & (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Yoz2z4~q  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sl03z4~q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yoz2z4~q  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout  & (\soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Sl03z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yoz2z4~q  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sl03z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yoz2z4~q  
+// & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sl03z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sl03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yoz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~7 .lut_mask = 64'h09CD09CD093B093B;
-defparam \soc_inst|m0_1|u_logic|N88wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .lut_mask = 64'hA2A2F3F300A200F3;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~20 (
+// Location: LABCELL_X29_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~20_combout  = ( !\soc_inst|m0_1|u_logic|N88wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~8_combout  & ((!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
-// (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~combout  = ( \soc_inst|m0_1|u_logic|Rtpvx4~7_combout  & ( \soc_inst|m0_1|u_logic|Rtpvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Rtpvx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Rtpvx4~2_combout  & !\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N88wx4~8_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rtpvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rtpvx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~20_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~20 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~20 .lut_mask = 64'hD0E0D0E000000000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~20 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4 .lut_mask = 64'h0000000000008000;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~18 (
+// Location: MLABCELL_X34_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wspvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~18_combout  = ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|F32wx4~0_combout  & \soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|F32wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Wspvx4~combout  = ( \soc_inst|m0_1|u_logic|K0qvx4~combout  & ( \soc_inst|m0_1|u_logic|X4pvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~18_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wspvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~18 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~18 .lut_mask = 64'h5050505005050505;
-defparam \soc_inst|m0_1|u_logic|N88wx4~18 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wspvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wspvx4 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Wspvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~9 (
+// Location: LABCELL_X37_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P37wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~9_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~18_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~21_combout  & ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~18_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~21_combout  & ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~18_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~19_combout ) # ((\soc_inst|m0_1|u_logic|N88wx4~21_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~18_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~21_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|P37wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q 
+//  & \soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|X77wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N88wx4~19_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N88wx4~21_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N88wx4~20_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~18_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P37wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~9 .lut_mask = 64'h00AFCCEF00AF00AF;
-defparam \soc_inst|m0_1|u_logic|N88wx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P37wx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|P37wx4~1 .lut_mask = 64'h0000505400405054;
+defparam \soc_inst|m0_1|u_logic|P37wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ri0wx4~1 (
+// Location: MLABCELL_X39_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P37wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( \soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( \soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|P37wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P37wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xx2wx4~combout  & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P37wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P37wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ri0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .lut_mask = 64'h0F0F333333330F0F;
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P37wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P37wx4~0 .lut_mask = 64'hFCFCA8A800000000;
+defparam \soc_inst|m0_1|u_logic|P37wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ri0wx4~0 (
+// Location: LABCELL_X36_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ri0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & \soc_inst|m0_1|u_logic|Fj0wx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Zqpvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ri0wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .lut_mask = 64'h008800FF00F800FF;
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .lut_mask = 64'h5755575500000000;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Znzvx4~0 (
+// Location: LABCELL_X36_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Znzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Zqpvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Zqpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .lut_mask = 64'h00000000CFCFCFCF;
-defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .lut_mask = 64'hDCDCDCDC00000000;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~0 (
+// Location: LABCELL_X36_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fhc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|U6awx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|U6awx4~1_combout  & !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|U6awx4~1_combout  & !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|U6awx4~1_combout  & !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Fhc2z4~0_combout  = (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~0 .lut_mask = 64'h3E223E22BC88BC88;
-defparam \soc_inst|m0_1|u_logic|G79wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .lut_mask = 64'h00CC00CC00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~2 (
+// Location: LABCELL_X37_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|F32wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ejawx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Ejawx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|F32wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zqpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Akewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Emi2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~2 .lut_mask = 64'h3E3E2222BCBC8888;
-defparam \soc_inst|m0_1|u_logic|G79wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .lut_mask = 64'hCFCFCFCF00000000;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dv8wx4~0 (
+// Location: LABCELL_X36_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dv8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Zqpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Zqpvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|P37wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zqpvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|P37wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zqpvx4~1_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zqpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .lut_mask = 64'h00F000F000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .lut_mask = 64'h5010501055115511;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~1 (
+// Location: LABCELL_X37_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lqpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Lqpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( !\soc_inst|m0_1|u_logic|Wspvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & ( 
+// \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~1 .lut_mask = 64'h2F282F28F828F828;
-defparam \soc_inst|m0_1|u_logic|G79wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .lut_mask = 64'h00000000FFFFF0F0;
+defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~3 (
+// Location: LABCELL_X37_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J00wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Dv8wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G79wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C8zvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Znzvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|G79wx4~0_combout  & !\soc_inst|m0_1|u_logic|G79wx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|J00wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G79wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G79wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G79wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J00wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~3 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|G79wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J00wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J00wx4~0 .lut_mask = 64'hAAA00000FFF00000;
+defparam \soc_inst|m0_1|u_logic|J00wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~4 (
+// Location: MLABCELL_X28_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ((\soc_inst|m0_1|u_logic|Ecawx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Gpcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Xucwx4~0_combout  $ 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~4 .lut_mask = 64'h7E7E66663C3C0000;
-defparam \soc_inst|m0_1|u_logic|G79wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .lut_mask = 64'h90909090F690F690;
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~5 (
+// Location: MLABCELL_X28_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpcwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~5_combout  = ( \soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|E5awx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|N90wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|E5awx4~1_combout  & !\soc_inst|m0_1|u_logic|N90wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Gpcwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Xucwx4~0_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~5 .lut_mask = 64'h76507650E6A0E6A0;
-defparam \soc_inst|m0_1|u_logic|G79wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .lut_mask = 64'hFFA5FFA500000000;
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~6 (
+// Location: MLABCELL_X28_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J00wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ((\soc_inst|m0_1|u_logic|R99wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|J00wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~97_sumout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Gpcwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~97_sumout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & \soc_inst|m0_1|u_logic|Gpcwx4~1_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Add5~97_sumout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Gpcwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~97_sumout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J00wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~6 .lut_mask = 64'h5FFA0FF05A5A0000;
-defparam \soc_inst|m0_1|u_logic|G79wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J00wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J00wx4~1 .lut_mask = 64'h1155010500550005;
+defparam \soc_inst|m0_1|u_logic|J00wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~7 (
+// Location: LABCELL_X19_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L6nwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|G79wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|O51wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G79wx4~4_combout  & (!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|G79wx4~5_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|L6nwx4~combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|C3w2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) 
+// ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G79wx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G79wx4~5_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|G79wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L6nwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~7 .lut_mask = 64'hA000000000000000;
-defparam \soc_inst|m0_1|u_logic|G79wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L6nwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L6nwx4 .lut_mask = 64'h0050000000000000;
+defparam \soc_inst|m0_1|u_logic|L6nwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~10 (
+// Location: LABCELL_X22_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~10_combout  = ( \soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & \soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & !\soc_inst|m0_1|u_logic|L6nwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & (!\soc_inst|m0_1|u_logic|L6nwx4~combout  & ((!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S6nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L6nwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~10 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~10 .lut_mask = 64'h0000000005050505;
-defparam \soc_inst|m0_1|u_logic|N88wx4~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .lut_mask = 64'hC800C800CC00CC00;
+defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~3 (
+// Location: LABCELL_X24_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ee8wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Wa0wx4~combout  & (\soc_inst|m0_1|u_logic|R40wx4~combout  & \soc_inst|m0_1|u_logic|Uvzvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Asdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Icxwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Icxwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .lut_mask = 64'h0000000000050005;
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~0 (
+// Location: LABCELL_X24_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ee8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~combout  & ( \soc_inst|m0_1|u_logic|O7zvx4~combout  & ( (\soc_inst|m0_1|u_logic|St0wx4~combout  & (\soc_inst|m0_1|u_logic|W21wx4~combout  & (\soc_inst|m0_1|u_logic|Yw0wx4~combout  
-// & \soc_inst|m0_1|u_logic|S71wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xtdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Asdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xtdwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Asdwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .lut_mask = 64'h0000000000000001;
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~2 (
+// Location: MLABCELL_X34_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ee8wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( \soc_inst|m0_1|u_logic|Nn0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ce0wx4~combout  & (\soc_inst|m0_1|u_logic|Gm1wx4~combout  & (\soc_inst|m0_1|u_logic|Ze1wx4~combout  
-// & \soc_inst|m0_1|u_logic|Z62wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .lut_mask = 64'h0000000000000001;
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~1 (
+// Location: MLABCELL_X28_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[19]~14 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ee8wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ee8wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ee8wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Zhyvx4~combout  & (\soc_inst|m0_1|u_logic|P12wx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Djzvx4~combout  & \soc_inst|m0_1|u_logic|Ee8wx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q )) # (\soc_inst|m0_1|u_logic|R40wx4~combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nn0wx4~combout  & ( (\soc_inst|m0_1|u_logic|R40wx4~combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ee8wx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ee8wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ee8wx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .lut_mask = 64'h0000000000000001;
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .lut_mask = 64'h00F300F30CFF0CFF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~11 (
+// Location: FF_X28_Y17_N44
+dffeas \soc_inst|m0_1|u_logic|L8m2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|L8m2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L8m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L8m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~11_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~10_combout  & ( \soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((\soc_inst|m0_1|u_logic|G79wx4~3_combout  & 
-// \soc_inst|m0_1|u_logic|G79wx4~7_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~10_combout  & ( \soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|G79wx4~3_combout  & \soc_inst|m0_1|u_logic|G79wx4~7_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|N88wx4~10_combout  & ( !\soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((\soc_inst|m0_1|u_logic|G79wx4~3_combout  & \soc_inst|m0_1|u_logic|G79wx4~7_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~10_combout  & ( !\soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((\soc_inst|m0_1|u_logic|G79wx4~3_combout  & \soc_inst|m0_1|u_logic|G79wx4~7_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~combout  = ( \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G79wx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G79wx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N88wx4~10_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ee8wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~11_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~11 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~11 .lut_mask = 64'h888A888A888ACCCF;
-defparam \soc_inst|m0_1|u_logic|N88wx4~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~12 (
+// Location: LABCELL_X27_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[17]~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~12_combout  = ( !\soc_inst|m0_1|u_logic|Ri0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~11_combout  & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z80wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout  & \soc_inst|m0_1|u_logic|N88wx4~9_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  = ( \soc_inst|m0_1|u_logic|Yw0wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Htyvx4~3_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yw0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N88wx4~9_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~11_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~12_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~12 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~12 .lut_mask = 64'h0000000000800000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~12 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .lut_mask = 64'h0C0F0C0F3F0F3F0F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nyawx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nyawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( ((\soc_inst|m0_1|u_logic|E1bvx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E1bvx4~combout  & (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & 
-// ((\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|E1bvx4~combout  & ((!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & 
-// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|E1bvx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|E1bvx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
+// Location: FF_X27_Y17_N43
+dffeas \soc_inst|m0_1|u_logic|B2i3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B2i3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B2i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B2i3z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|E1bvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y17_N31
+dffeas \soc_inst|m0_1|u_logic|Gdo2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gdo2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .lut_mask = 64'h0055005501673377;
-defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gdo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gdo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~17 (
+// Location: LABCELL_X22_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bge3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~17_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~12_combout  & ( !\soc_inst|m0_1|u_logic|Nyawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~1_combout  & (\soc_inst|m0_1|u_logic|Cr1wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & \soc_inst|m0_1|u_logic|N88wx4~13_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bge3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N88wx4~13_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N88wx4~12_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~17_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bge3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~17 .lut_mask = 64'h0000001000000000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bge3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bge3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Bge3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wccwx4~0 (
+// Location: FF_X22_Y21_N29
+dffeas \soc_inst|m0_1|u_logic|Bge3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bge3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bge3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bge3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bge3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wccwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zva3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~26  ))
+// \soc_inst|m0_1|u_logic|Add0~14  = CARRY(( !\soc_inst|m0_1|u_logic|Zva3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~26  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~13_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~14 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .lut_mask = 64'hEED8D8EEAA8888AA;
-defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~13 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyzvx4~0 (
+// Location: LABCELL_X18_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~49 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fyzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Add0~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|She3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~14  ))
+// \soc_inst|m0_1|u_logic|Add0~50  = CARRY(( !\soc_inst|m0_1|u_logic|She3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~14  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|She3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~49_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~50 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .lut_mask = 64'hF0C05040F0C05040;
-defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~49 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~49 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~1 (
+// Location: LABCELL_X17_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fqmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~105_sumout  & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout  & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~105_sumout  & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout  & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add5~109_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Fqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|She3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Bge3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|She3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Bge3z4~q  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|She3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~49_sumout ) # (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|She3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~49_sumout  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bge3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Add0~49_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|She3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fqmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~1 .lut_mask = 64'h0000101100000011;
-defparam \soc_inst|m0_1|u_logic|N88wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .lut_mask = 64'h55F5FFF55577FF77;
+defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~14 (
+// Location: FF_X17_Y18_N19
+dffeas \soc_inst|m0_1|u_logic|She3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fqmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|She3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|She3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|She3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~14_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qppvx4~1_combout  & (\soc_inst|m0_1|u_logic|N88wx4~6_combout  & 
-// (\soc_inst|m0_1|u_logic|Cfzvx4~0_combout  & \soc_inst|m0_1|u_logic|N88wx4~17_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Iua3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~50  ))
+// \soc_inst|m0_1|u_logic|Add0~38  = CARRY(( !\soc_inst|m0_1|u_logic|Iua3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~50  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N88wx4~6_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N88wx4~17_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N88wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~50 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~14_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~37_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~38 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~14 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~14 .lut_mask = 64'h0000000000000001;
-defparam \soc_inst|m0_1|u_logic|N88wx4~14 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~37 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~16 (
+// Location: FF_X25_Y17_N37
+dffeas \soc_inst|m0_1|u_logic|L7a3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|L7a3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L7a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L7a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~16_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~14_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~15_combout  & (((\soc_inst|m0_1|u_logic|Do8wx4~4_combout  & \soc_inst|m0_1|u_logic|N88wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ypmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Iua3z4~q  & ( \soc_inst|m0_1|u_logic|L7a3z4~q  & ( (!\soc_inst|m0_1|u_logic|Add0~37_sumout ) # (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iua3z4~q  & ( \soc_inst|m0_1|u_logic|L7a3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~37_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Iua3z4~q  & ( !\soc_inst|m0_1|u_logic|L7a3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~37_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iua3z4~q  & ( !\soc_inst|m0_1|u_logic|L7a3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~37_sumout  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|Tna3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Do8wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N88wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N88wx4~15_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~14_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add0~37_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|L7a3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ypmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~16 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~16 .lut_mask = 64'h0000000000570057;
-defparam \soc_inst|m0_1|u_logic|N88wx4~16 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .lut_mask = 64'h08FFF8FF0BFFFBFF;
+defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~7 (
+// Location: FF_X17_Y17_N22
+dffeas \soc_inst|m0_1|u_logic|Iua3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ypmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Iua3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iua3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Iua3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~61 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( 
-// !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  ) )
+// \soc_inst|m0_1|u_logic|Add0~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|K7g3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~38  ))
+// \soc_inst|m0_1|u_logic|Add0~62  = CARRY(( !\soc_inst|m0_1|u_logic|K7g3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~38  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~38 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~7_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~61_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~62 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .lut_mask = 64'hFFFF5555AAAA0000;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~61 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~61 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9zvx4~0 (
+// Location: FF_X22_Y17_N25
+dffeas \soc_inst|m0_1|u_logic|T5g3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T5g3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T5g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T5g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rpmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O7zvx4~combout  & ( \soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( ((\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|X4pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O7zvx4~combout  & ( \soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (((\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) # (\soc_inst|m0_1|u_logic|X4pvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O7zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & 
-// (((\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (!\soc_inst|m0_1|u_logic|K0qvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|O7zvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & (!\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & !\soc_inst|m0_1|u_logic|X4pvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K7g3z4~q  & ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~61_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7g3z4~q  & ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~61_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|K7g3z4~q  & ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~61_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7g3z4~q  & ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~61_sumout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z78wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add0~61_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T5g3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .lut_mask = 64'h100030AA105530FF;
-defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .lut_mask = 64'h5D55FDF55D5FFDFF;
+defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y17_N55
+dffeas \soc_inst|m0_1|u_logic|K7g3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K7g3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K7g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K7g3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R38wx4~0 (
+// Location: LABCELL_X18_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~81 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R38wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Add0~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rsa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~62  ))
+// \soc_inst|m0_1|u_logic|Add0~82  = CARRY(( !\soc_inst|m0_1|u_logic|Rsa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~62  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~62 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R38wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~81_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~82 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R38wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R38wx4~0 .lut_mask = 64'h8AAA8AAAAA8AAA8A;
-defparam \soc_inst|m0_1|u_logic|R38wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~81 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~81 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R38wx4~1 (
+// Location: FF_X24_Y21_N44
+dffeas \soc_inst|m0_1|u_logic|U5a3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U5a3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U5a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kpmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R38wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R38wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X77wx4~combout  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|X77wx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))))) ) )
+// \soc_inst|m0_1|u_logic|Kpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~81_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|U5a3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~81_sumout )) 
+// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((\soc_inst|m0_1|u_logic|U5a3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Rsa3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R38wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add0~81_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U5a3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R38wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R38wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R38wx4~1 .lut_mask = 64'hAEA3AEA300000000;
-defparam \soc_inst|m0_1|u_logic|R38wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .lut_mask = 64'h0F0FFFFF8FBF8FBF;
+defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qb3wx4 (
+// Location: FF_X24_Y21_N19
+dffeas \soc_inst|m0_1|u_logic|Rsa3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rsa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rsa3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qb3wx4~combout  = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Op2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((\soc_inst|m0_1|u_logic|R38wx4~1_combout  & !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Op2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|R38wx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Add0~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ara3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~82  ))
+// \soc_inst|m0_1|u_logic|Add0~2  = CARRY(( !\soc_inst|m0_1|u_logic|Ara3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~82  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R38wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~82 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~1_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~2 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qb3wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qb3wx4 .lut_mask = 64'hB0B0B0B0B0A0B0A0;
-defparam \soc_inst|m0_1|u_logic|Qb3wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~1 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z9zvx4~0 (
+// Location: MLABCELL_X28_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4a3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wspvx4~combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & !\soc_inst|m0_1|u_logic|Qb3wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wspvx4~combout  & ( 
-// \soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|D4a3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .lut_mask = 64'h0F0F0F0F0F000F00;
-defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y7_N14
-dffeas \soc_inst|m0_1|u_logic|Igi2z4 (
+// Location: FF_X28_Y16_N28
+dffeas \soc_inst|m0_1|u_logic|D4a3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Igi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|D4a3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Igi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Igi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D4a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D4a3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y5_N59
-dffeas \soc_inst|m0_1|u_logic|Rhi2z4 (
+// Location: MLABCELL_X28_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dpmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ara3z4~q  & ( \soc_inst|m0_1|u_logic|D4a3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~1_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ara3z4~q  & ( \soc_inst|m0_1|u_logic|D4a3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~1_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ara3z4~q  & ( !\soc_inst|m0_1|u_logic|D4a3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~1_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ara3z4~q  & ( !\soc_inst|m0_1|u_logic|D4a3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~1_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add0~1_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|D4a3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .lut_mask = 64'h40FFEAFF51FFFBFF;
+defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y16_N55
+dffeas \soc_inst|m0_1|u_logic|Ara3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -52831,116 +54333,140 @@ dffeas \soc_inst|m0_1|u_logic|Rhi2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rhi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ara3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rhi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ara3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ara3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~1 (
+// Location: LABCELL_X18_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~73 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~14  ))
-// \soc_inst|m0_1|u_logic|Add2~2  = CARRY(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~14  ))
+// \soc_inst|m0_1|u_logic|Add0~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xeo2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~2  ))
+// \soc_inst|m0_1|u_logic|Add0~74  = CARRY(( !\soc_inst|m0_1|u_logic|Xeo2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~2  ))
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~14 ),
+	.cin(\soc_inst|m0_1|u_logic|Add0~2 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~1_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~2 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~73_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~74 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~1 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~73 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add0~73 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~0 (
+// Location: MLABCELL_X21_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Womvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvhvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout  & (\soc_inst|m0_1|u_logic|Add2~1_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Omk2z4~q 
-// ))))
+// \soc_inst|m0_1|u_logic|Womvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xeo2z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Xeo2z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Xeo2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~73_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Gdo2z4~q ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Xeo2z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~73_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Gdo2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~1_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Gdo2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Add0~73_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .lut_mask = 64'h3704370437043704;
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Womvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Womvx4~0 .lut_mask = 64'h0C05FCF5FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Womvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~1 (
+// Location: FF_X21_Y17_N14
+dffeas \soc_inst|m0_1|u_logic|Xeo2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xeo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xeo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & !\soc_inst|m0_1|u_logic|Tvhvx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & !\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add0~29_sumout  = SUM(( !\soc_inst|m0_1|u_logic|S3i3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~74  ))
+// \soc_inst|m0_1|u_logic|Add0~30  = CARRY(( !\soc_inst|m0_1|u_logic|S3i3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~74  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~74 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~29_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .lut_mask = 64'hCC00CC00C000C000;
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~29 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~2 (
+// Location: LABCELL_X17_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pomvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Tvhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Pomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S3i3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|B2i3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S3i3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|B2i3z4~q  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|S3i3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~29_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S3i3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~29_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tvhvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B2i3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~29_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .lut_mask = 64'h00000000F3F0F3F0;
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .lut_mask = 64'h5F55FFF55757F7F7;
+defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y12_N4
-dffeas \soc_inst|m0_1|u_logic|Omk2z4 (
+// Location: FF_X17_Y18_N13
+dffeas \soc_inst|m0_1|u_logic|S3i3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -52949,4805 +54475,4818 @@ dffeas \soc_inst|m0_1|u_logic|Omk2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Omk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|S3i3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Omk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Omk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S3i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S3i3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Velvx4~0 (
+// Location: LABCELL_X18_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Velvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Omk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Rhi2z4~q 
-//  ) )
+// \soc_inst|m0_1|u_logic|Add0~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|O0o2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~30  ))
+// \soc_inst|m0_1|u_logic|Add0~18  = CARRY(( !\soc_inst|m0_1|u_logic|O0o2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~30  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rhi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~30 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~17_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~18 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~17 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~combout  = ( \soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|St0wx4~5_combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Velvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Velvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Velvx4~0 .lut_mask = 64'hF0F0F0F055005500;
-defparam \soc_inst|m0_1|u_logic|Velvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|St0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Velvx4~1 (
+// Location: LABCELL_X27_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[18]~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Velvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Velvx4~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Velvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( (!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igi2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  = ( \soc_inst|m0_1|u_logic|St0wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|St0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Velvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Velvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Velvx4~1 .lut_mask = 64'hF5F50000C4C40000;
-defparam \soc_inst|m0_1|u_logic|Velvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .lut_mask = 64'h00CF00CF30FF30FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y5_N58
-dffeas \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE (
+// Location: FF_X27_Y17_N41
+dffeas \soc_inst|m0_1|u_logic|Xyn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Xyn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xyn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xyn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vr23z4~feeder (
+// Location: MLABCELL_X21_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iomvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vr23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Iomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O0o2z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|O0o2z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|O0o2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~17_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((\soc_inst|m0_1|u_logic|Xyn2z4~q )))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|O0o2z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~17_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout 
+//  & ((\soc_inst|m0_1|u_logic|Xyn2z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Add0~17_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xyn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vr23z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iomvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vr23z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vr23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Vr23z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .lut_mask = 64'h4405EEAFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y5_N17
-dffeas \soc_inst|m0_1|u_logic|Vr23z4 (
+// Location: FF_X21_Y17_N55
+dffeas \soc_inst|m0_1|u_logic|O0o2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vr23z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Iomvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vr23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vr23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vr23z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X51_Y7_N22
-dffeas \soc_inst|m0_1|u_logic|Mi13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mi13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|O0o2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mi13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mi13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O0o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O0o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~1 (
+// Location: LABCELL_X18_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~53 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ec62z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Mi13z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vr23z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jpa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~18  ))
+// \soc_inst|m0_1|u_logic|Add0~54  = CARRY(( !\soc_inst|m0_1|u_logic|Jpa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~18  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vr23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mi13z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~18 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ec62z4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~53_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~54 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .lut_mask = 64'h3022000000000000;
-defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~53 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~53 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Na53z4~feeder (
+// Location: MLABCELL_X21_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bomvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Na53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Bomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~53_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|L8m2z4~q ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~53_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|L8m2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8m2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~53_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Na53z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bomvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na53z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Na53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Na53z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .lut_mask = 64'h0D01FDF1FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y5_N8
-dffeas \soc_inst|m0_1|u_logic|Na53z4 (
+// Location: FF_X21_Y17_N31
+dffeas \soc_inst|m0_1|u_logic|Jpa3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Na53z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Bomvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Na53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jpa3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Na53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jpa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jpa3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E143z4~feeder (
+// Location: LABCELL_X18_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~45 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E143z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Add0~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Z2h3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~54  ))
+// \soc_inst|m0_1|u_logic|Add0~46  = CARRY(( !\soc_inst|m0_1|u_logic|Z2h3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~54  ))
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~54 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E143z4~feeder_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~45_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~46 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E143z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E143z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|E143z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~45 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add0~45 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y5_N29
-dffeas \soc_inst|m0_1|u_logic|E143z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|E143z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E143z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E143z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E143z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~0 (
+// Location: MLABCELL_X28_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[20]~16 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ec62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Na53z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|E143z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  = ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # ((\soc_inst|m0_1|u_logic|Hk0wx4~combout ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Hk0wx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Na53z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|E143z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ec62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .lut_mask = 64'h000000A000000088;
-defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .lut_mask = 64'h00500050AFFFAFFF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N20
-dffeas \soc_inst|m0_1|u_logic|N8i3z4 (
+// Location: FF_X17_Y17_N43
+dffeas \soc_inst|m0_1|u_logic|I1h3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N8i3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I1h3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N8i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N8i3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I1h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I1h3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Be62z4~0 (
+// Location: LABCELL_X17_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Be62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|N8i3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Unmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( \soc_inst|m0_1|u_logic|I1h3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~45_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z2h3z4~q  & ( \soc_inst|m0_1|u_logic|I1h3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~45_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( !\soc_inst|m0_1|u_logic|I1h3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~45_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z2h3z4~q  & ( !\soc_inst|m0_1|u_logic|I1h3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~45_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|N8i3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~45_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I1h3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Be62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Be62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Be62z4~0 .lut_mask = 64'h0020000000000000;
-defparam \soc_inst|m0_1|u_logic|Be62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .lut_mask = 64'h7555FDDD7757FFDF;
+defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y5_N26
-dffeas \soc_inst|m0_1|u_logic|Cai3z4 (
+// Location: FF_X17_Y17_N16
+dffeas \soc_inst|m0_1|u_logic|Z2h3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cai3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z2h3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cai3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cai3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z2h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z2h3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N17
-dffeas \soc_inst|m0_1|u_logic|J5i3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J5i3z4~q ),
-	.prn(vcc));
+// Location: IOIBUF_X2_Y0_N41
+cyclonev_io_ibuf \SW[4]~input (
+	.i(SW[4]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[4]~input_o ));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J5i3z4 .power_up = "low";
+defparam \SW[4]~input .bus_hold = "false";
+defparam \SW[4]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N28
-dffeas \soc_inst|m0_1|u_logic|Y6i3z4 (
+// Location: FF_X19_Y17_N59
+dffeas \soc_inst|switches_1|switch_store[1][4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\SW[4]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y6i3z4~q ),
+	.q(\soc_inst|switches_1|switch_store[1][4]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y6i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y6i3z4 .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[1][4] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][4] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~2 (
+// Location: LABCELL_X19_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sjvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ec62z4~2_combout  = ( !\soc_inst|m0_1|u_logic|J5i3z4~q  & ( \soc_inst|m0_1|u_logic|Y6i3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|J5i3z4~q  & ( !\soc_inst|m0_1|u_logic|Y6i3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J5i3z4~q  & ( !\soc_inst|m0_1|u_logic|Y6i3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Sjvwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
+// (\soc_inst|switches_1|switch_store[1][4]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & 
+// (\soc_inst|switches_1|switch_store[1][4]~q  & \soc_inst|m0_1|u_logic|B7owx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|J5i3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y6i3z4~q ),
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datac(!\soc_inst|switches_1|switch_store[1][4]~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ec62z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sjvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .lut_mask = 64'h5000400010000000;
-defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .lut_mask = 64'h0001000100230023;
+defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~3 (
+// Location: LABCELL_X18_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ec62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ec62z4~2_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ec62z4~1_combout  & (!\soc_inst|m0_1|u_logic|Ec62z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Be62z4~0_combout  & \soc_inst|m0_1|u_logic|Cai3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ec62z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ec62z4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ec62z4~0_combout  & !\soc_inst|m0_1|u_logic|Be62z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjvwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # ((\soc_inst|m0_1|u_logic|Z2h3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|G6owx4~combout  & (\soc_inst|m0_1|u_logic|I1h3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Z2h3z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ec62z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ec62z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Be62z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cai3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ec62z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I1h3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjvwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ec62z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ntmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .lut_mask = 64'h8080000000800000;
-defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .lut_mask = 64'h8ACF8ACF00000000;
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8zvx4~0 (
+// Location: LABCELL_X23_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Cqo2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Saqwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Cqo2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Cqo2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Cqo2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Nvdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Xtdwx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ec62z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ntmwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .lut_mask = 64'h553355335500550F;
-defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .lut_mask = 64'h00000000F4F7F4F7;
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C8zvx4~0 (
+// Location: MLABCELL_X21_Y17_N24
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[28]~14 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C8zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) ) )
+// \soc_inst|ram_1|data_to_memory[28]~14_combout  = ( \soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ) # (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ))) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[28]~14_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .lut_mask = 64'h3333333300003333;
-defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[28]~14 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[28]~14 .lut_mask = 64'h0030003003330333;
+defparam \soc_inst|ram_1|data_to_memory[28]~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F6zvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|F6zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C8zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|L9zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|O7zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C8zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|L9zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O7zvx4~combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L9zvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F6zvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: M10K_X14_Y13_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[28]~14_combout ,\soc_inst|ram_1|data_to_memory[12]~13_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .lut_mask = 64'h00000000F0FFA0AA;
-defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_bit_number = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_bit_number = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021B6DB6D04814E1D3094C00004210842104CC4CC4CC4CC4CC4CC4CC24C00000000000000E4EB000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F6zvx4~1 (
+// Location: LABCELL_X22_Y17_N0
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[12]~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F6zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (\soc_inst|m0_1|u_logic|F6zvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|E9zvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|F6zvx4~0_combout  & \soc_inst|m0_1|u_logic|E9zvx4~1_combout ) ) ) )
+// \soc_inst|ram_1|data_to_memory[12]~13_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout  & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select 
+// [1])) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|F6zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|byte_select [1]),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[12]~13_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .lut_mask = 64'h0303010100000000;
-defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[12]~13 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[12]~13 .lut_mask = 64'h030F030F03000300;
+defparam \soc_inst|ram_1|data_to_memory[12]~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ft73z4~feeder (
+// Location: LABCELL_X24_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ft73z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout ) # ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
+// (\soc_inst|interconnect_1|HRDATA[29]~0_combout  & ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ft73z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lsmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ft73z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ft73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ft73z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y5_N38
-dffeas \soc_inst|m0_1|u_logic|Ft73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ft73z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ft73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ft73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ft73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .lut_mask = 64'hBFAEBFAE00000000;
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~2 (
+// Location: LABCELL_X27_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Beowx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rro2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|E143z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Beowx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Beowx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Beowx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Beowx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E143z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rro2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .lut_mask = 64'h000A0000000C0000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y7_N20
-dffeas \soc_inst|m0_1|u_logic|Gto2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gto2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gto2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gto2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Beowx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Beowx4~1 .lut_mask = 64'h0000F0F00F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|Beowx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~4 (
+// Location: LABCELL_X24_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~4_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Gto2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Gto2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|X7ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Beowx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Jiowx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Beowx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jiowx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jiowx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Beowx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gto2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .lut_mask = 64'hA000008000000080;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .lut_mask = 64'h05F50CFC05F5C5C5;
+defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~1 (
+// Location: LABCELL_X24_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Mi13z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) 
-// # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vuo2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Lsmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Wfuwx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Wfuwx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mi13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vuo2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lsmwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .lut_mask = 64'h0000A00080800000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .lut_mask = 64'h0000AAA80000FFFC;
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~3 (
+// Location: LABCELL_X29_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qmdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Na53z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vr23z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Qmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bdwwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qxuwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdwwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Qxuwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Na53z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vr23z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .lut_mask = 64'h0500040400000000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~5 (
+// Location: MLABCELL_X28_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qmdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Y6i3z4~q  & ( \soc_inst|m0_1|u_logic|J5i3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y6i3z4~q  & ( !\soc_inst|m0_1|u_logic|J5i3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y6i3z4~q  & ( !\soc_inst|m0_1|u_logic|J5i3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Qmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tkdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qmdwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Tkdwx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tkdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qmdwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Y6i3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J5i3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .lut_mask = 64'h0C00040008000000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .lut_mask = 64'h00000F0FFFFF0F0F;
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~6 (
+// Location: LABCELL_X24_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U1uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|O7zvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|O7zvx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~2_combout  & (!\soc_inst|m0_1|u_logic|O7zvx4~4_combout  & 
-// !\soc_inst|m0_1|u_logic|O7zvx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|U1uvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O7zvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O7zvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O7zvx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|O7zvx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .lut_mask = 64'h8080000000000000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U1uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U1uvx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|U1uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N19
-dffeas \soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE (
+// Location: FF_X28_Y20_N2
+dffeas \soc_inst|m0_1|u_logic|Adt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [4]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Adt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Adt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Adt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y7_N41
-dffeas \soc_inst|m0_1|u_logic|Uu83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uu83z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dewwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dewwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|Mjl2z4~q  & ( \soc_inst|m0_1|u_logic|Ipb3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Fhc3z4~q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Dewwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uu83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uu83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .lut_mask = 64'h0F0F000055550000;
+defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~7 (
+// Location: LABCELL_X24_Y21_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dewwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~7_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Uu83z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Wj63z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Dewwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( 
+// ((\soc_inst|m0_1|u_logic|Lz93z4~q  & \soc_inst|m0_1|u_logic|Dewwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Adt2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( !\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & 
+// \soc_inst|m0_1|u_logic|Dewwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wj63z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uu83z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Adt2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dewwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dewwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .lut_mask = 64'h0000000044000050;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .lut_mask = 64'h000F0000555F5555;
+defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~8 (
+// Location: LABCELL_X23_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O7zvx4~7_combout  & ( (\soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Cai3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O7zvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cai3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Gtmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[4]~23_combout  ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[4]~23_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Dewwx4~1_combout  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[4]~23_combout  & ( (\soc_inst|m0_1|u_logic|Dewwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[4]~23_combout  & ( (\soc_inst|m0_1|u_logic|Dewwx4~1_combout  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cai3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dewwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~7_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .lut_mask = 64'h050505050505FFFF;
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gtmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Taa3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Gza3z4~q ))) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Gza3z4~q ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Taa3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .lut_mask = 64'hF0FF303300000000;
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Gtmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Godwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .lut_mask = 64'hF5F5313100000000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .lut_mask = 64'h00000000ABFBABFB;
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~0 (
+// Location: MLABCELL_X25_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Leuvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R91xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wnt2z4~q  & ( !\soc_inst|m0_1|u_logic|Fxu2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|R91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wnt2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Fxu2z4~q ) # (\soc_inst|m0_1|u_logic|T31xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|R91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wnt2z4~q  & ( \soc_inst|m0_1|u_logic|T31xx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Leuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fxu2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wnt2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Leuvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .lut_mask = 64'h0F0FAFAF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .lut_mask = 64'h01051155030F33FF;
+defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4 (
+// Location: MLABCELL_X25_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Leuvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O7zvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ft73z4~q  & (\soc_inst|m0_1|u_logic|O7zvx4~6_combout  & \soc_inst|m0_1|u_logic|O7zvx4~8_combout 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O7zvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O7zvx4~6_combout  & \soc_inst|m0_1|u_logic|O7zvx4~8_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Leuvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Leuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Leuvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Leuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Leuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ft73z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O7zvx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O7zvx4~8_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Leuvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4 .lut_mask = 64'h000F000500000000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .lut_mask = 64'h0A020A020A020F03;
+defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~2 (
+// Location: MLABCELL_X28_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C00wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~2_combout  = ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|O7zvx4~combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q )) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|O7zvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|O7zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|O7zvx4~combout ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|C00wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( \soc_inst|m0_1|u_logic|J00wx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .lut_mask = 64'h00F300D100E200C0;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C00wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C00wx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|C00wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y10_N14
-dffeas \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE (
+// Location: FF_X27_Y12_N29
+dffeas \soc_inst|m0_1|u_logic|Ka93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ka93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ka93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ka93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tyywx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Tyywx4~0_combout  = ( \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|X9n2z4~q ) # (\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout  & \soc_inst|m0_1|u_logic|X9n2z4~q ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y13_N8
+dffeas \soc_inst|m0_1|u_logic|S2r2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|S2r2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S2r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S2r2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y10_N13
-dffeas \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE (
+// Location: FF_X28_Y12_N26
+dffeas \soc_inst|m0_1|u_logic|T9v2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|T9v2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T9v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T9v2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X23_Y10_N35
-dffeas \soc_inst|m0_1|u_logic|Uqi2z4 (
+// Location: FF_X28_Y12_N53
+dffeas \soc_inst|m0_1|u_logic|E1r2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|E1r2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uqi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uqi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E1r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E1r2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hzywx4~0 (
+// Location: MLABCELL_X28_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hzywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uqi2z4~q  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # (\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Uqi2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|S4pwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ixxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|E1r2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|T9v2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Ka93z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|E1r2z4~q  & ( (!\soc_inst|m0_1|u_logic|S2r2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+//  & ( !\soc_inst|m0_1|u_logic|E1r2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|T9v2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Ka93z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|E1r2z4~q  & ( (!\soc_inst|m0_1|u_logic|S2r2z4~q ) # (\soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ka93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S2r2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T9v2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E1r2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .lut_mask = 64'hCCFFF0AACC00F0AA;
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~18 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~18_combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ) # ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y10_N35
+dffeas \soc_inst|m0_1|u_logic|G4r2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G4r2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .lut_mask = 64'h00EF002300EC0020;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G4r2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y9_N2
-dffeas \soc_inst|m0_1|u_logic|Hzj2z4 (
+// Location: FF_X27_Y12_N2
+dffeas \soc_inst|m0_1|u_logic|K0u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K0u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hzj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hzj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K0u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K0u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5mvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|M5mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Uaj2z4~q ) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Hzj2z4~q  ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M5mvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y10_N50
+dffeas \soc_inst|m0_1|u_logic|Kw63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kw63z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .lut_mask = 64'h00FF00FF00EF00EF;
-defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kw63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kw63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y9_N35
-dffeas \soc_inst|m0_1|u_logic|S5b3z4 (
+// Location: FF_X27_Y12_N46
+dffeas \soc_inst|m0_1|u_logic|T583z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S5b3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|T583z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S5b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S5b3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T583z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T583z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~10 (
+// Location: LABCELL_X27_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~10_combout  = ( \soc_inst|m0_1|u_logic|Djzvx4~combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & \soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Djzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Y9t2z4~q  & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ixxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|T583z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|K0u2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|T583z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|G4r2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kw63z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|T583z4~q  & ( (!\soc_inst|m0_1|u_logic|K0u2z4~q ) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|T583z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|G4r2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kw63z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G4r2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|K0u2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kw63z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T583z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .lut_mask = 64'h3332003233100010;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .lut_mask = 64'hBB88F3F3BB88C0C0;
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ynvvx4 (
+// Location: MLABCELL_X28_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ynvvx4~combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (!\soc_inst|m0_1|u_logic|K3l2z4~q  & (\soc_inst|m0_1|u_logic|R3uvx4~0_combout  & (\soc_inst|m0_1|u_logic|S5b3z4~q ))) # (\soc_inst|m0_1|u_logic|K3l2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|R3uvx4~0_combout  & \soc_inst|m0_1|u_logic|S5b3z4~q )) # (\soc_inst|m0_1|u_logic|Wfuwx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (\soc_inst|m0_1|u_logic|R3uvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|S5b3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ixxwx4~combout  = ( \soc_inst|m0_1|u_logic|Ixxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ixxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ixxwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S5b3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ixxwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ynvvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ynvvx4 .lut_mask = 64'h0303030303570357;
-defparam \soc_inst|m0_1|u_logic|Ynvvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4 .lut_mask = 64'h000300030C0F0C0F;
+defparam \soc_inst|m0_1|u_logic|Ixxwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5mvx4~1 (
+// Location: LABCELL_X27_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ynvvx4~combout  ) # ( !\soc_inst|m0_1|u_logic|Ynvvx4~combout  & ( (\soc_inst|m0_1|u_logic|M5mvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|K3l2z4~q ) # (!\soc_inst|m0_1|u_logic|Wfuwx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Svxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M5mvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .lut_mask = 64'h00A000A000A0AAAA;
+defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mj7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mj7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Svxwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  & !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .lut_mask = 64'h33323332FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .lut_mask = 64'h00000000A000A000;
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y9_N1
-dffeas \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X27_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mj7wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mj7wx4~1_combout  = (\soc_inst|m0_1|u_logic|Mj7wx4~0_combout  & \soc_inst|m0_1|u_logic|Ok7wx4~1_combout )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N11
-dffeas \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE (
+// Location: FF_X27_Y10_N25
+dffeas \soc_inst|m0_1|u_logic|Gf63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Gf63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gf63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bec3z4~0 (
+// Location: LABCELL_X27_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bec3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o [2] & ((\soc_inst|m0_1|u_logic|Bec3z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o [2] & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Bec3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Xowwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gjt2z4~q  & ( \soc_inst|m0_1|u_logic|Po73z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Eol2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Gf63z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gjt2z4~q  & ( \soc_inst|m0_1|u_logic|Po73z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Eol2z4~q ) 
+// # (\soc_inst|m0_1|u_logic|Svk2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Gf63z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gjt2z4~q  & ( !\soc_inst|m0_1|u_logic|Po73z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Eol2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Gf63z4~q ) # ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Gjt2z4~q  & ( !\soc_inst|m0_1|u_logic|Po73z4~q  & ( ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Eol2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Gf63z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
-	.datad(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gf63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Eol2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gjt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Po73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xowwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .lut_mask = 64'h00FF00FF0CFC0CFC;
-defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .lut_mask = 64'hEF4FE545EA4AE040;
+defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N44
-dffeas \soc_inst|m0_1|u_logic|Bec3z4 (
+// Location: FF_X27_Y12_N37
+dffeas \soc_inst|m0_1|u_logic|Grl2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bec3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Grl2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bec3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bec3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Grl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Grl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ckuvx4~0 (
+// Location: LABCELL_X27_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ckuvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xowwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Grl2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Spl2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Psu2z4~q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qml2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qml2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Grl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Spl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Psu2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xowwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .lut_mask = 64'h0000000000800000;
-defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .lut_mask = 64'hAAAAFF00F0F0CCCC;
+defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F2ivx4~0 (
+// Location: MLABCELL_X28_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o [2] & (\soc_inst|m0_1|u_logic|Pxb3z4~q )) 
-// # (\soc_inst|m0_1|u_logic|hwdata_o [2] & ((\soc_inst|m0_1|u_logic|D9ovx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|hwdata_o [2] & \soc_inst|m0_1|u_logic|D9ovx4~combout )) # (\soc_inst|m0_1|u_logic|Pxb3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o 
-// [2] & (\soc_inst|m0_1|u_logic|Pxb3z4~q )) # (\soc_inst|m0_1|u_logic|hwdata_o [2] & ((\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
-// ((\soc_inst|m0_1|u_logic|hwdata_o [2] & \soc_inst|m0_1|u_logic|D9ovx4~combout )) # (\soc_inst|m0_1|u_logic|Pxb3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Xowwx4~combout  = ( \soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xowwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Xowwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Xowwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
-	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xowwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xowwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xowwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .lut_mask = 64'h555F505F444C404C;
-defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4 .lut_mask = 64'h000000F0000F00FF;
+defparam \soc_inst|m0_1|u_logic|Xowwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y12_N35
-dffeas \soc_inst|m0_1|u_logic|Pxb3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pxb3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ok7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xowwx4~combout  & ( !\soc_inst|m0_1|u_logic|Qowwx4~combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Xowwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qowwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pxb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pxb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .lut_mask = 64'hFFFF000000000000;
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N35
-dffeas \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X27_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jl7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jl7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & !\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Wai2z4~q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .lut_mask = 64'hF040F040F000F000;
+defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N29
-dffeas \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gftwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gftwx4~0_combout  = ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cawwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Cawwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D0wwx4~0 (
+// Location: LABCELL_X24_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kw7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D0wwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qfc3z4~q  & ( \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qfc3z4~q  & ( !\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Kw7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gftwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gftwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Kw7wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D0wwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .lut_mask = 64'h0000103100001010;
-defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D0wwx4~1 (
+// Location: LABCELL_X24_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D0wwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pxb3z4~q  & ( !\soc_inst|m0_1|u_logic|D0wwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bec3z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rw7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rw7wx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Kw7wx4~1_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .lut_mask = 64'h0000333300000000;
-defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .lut_mask = 64'h00550055AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~0 (
+// Location: LABCELL_X23_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I90xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Qfc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Vzdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zndwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Zndwx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I90xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I90xx4~0 .lut_mask = 64'hFFF0FFF000000000;
-defparam \soc_inst|m0_1|u_logic|I90xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iuuvx4~0 (
+// Location: LABCELL_X24_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fq7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q  & (\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nodwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nodwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Vzdwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .lut_mask = 64'h0000000000002000;
-defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .lut_mask = 64'h00AA00AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K1ivx4~0 (
+// Location: LABCELL_X24_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tq7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qtdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|X0ewx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qtdwx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|X0ewx4~1_combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .lut_mask = 64'h4440FFF055505550;
-defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y12_N2
-dffeas \soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uic3z4~0 (
+// Location: LABCELL_X23_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uic3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|m0_1|u_logic|Uic3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Uic3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Uvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|U7uwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|U7uwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
+	.dataf(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .lut_mask = 64'h50FA50FA00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y12_N59
-dffeas \soc_inst|m0_1|u_logic|Uic3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uic3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uic3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uic3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X28_Y12_N44
-dffeas \soc_inst|m0_1|u_logic|Bmb3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bmb3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bmb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bmb3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X28_Y12_N47
-dffeas \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .lut_mask = 64'hAAFFAAFFAA00AA00;
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzvwx4~0 (
+// Location: LABCELL_X24_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xdb3z4~q  & ( (!\soc_inst|m0_1|u_logic|Bmb3z4~q  & (!\soc_inst|m0_1|u_logic|Axm2z4~q  & !\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Bmb3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Axm2z4~q ) # (!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Xdb3z4~q  & ( (\soc_inst|m0_1|u_logic|Bmb3z4~q  & !\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Uvdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .lut_mask = 64'h33003300F330F330;
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzvwx4~1 (
+// Location: LABCELL_X27_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fwtwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fhc3z4~q  & (\soc_inst|m0_1|u_logic|Ipb3z4~q  & ((!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Uic3z4~q )))) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Wzvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fhc3z4~q  & \soc_inst|m0_1|u_logic|Ipb3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Fwtwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( (\soc_inst|m0_1|u_logic|Eruwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Eruwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .lut_mask = 64'h0303030303020302;
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~0 (
+// Location: LABCELL_X23_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xs7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jjuwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Uic3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Xs7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .lut_mask = 64'hFAFAFAFA00000000;
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Douvx4~0 (
+// Location: LABCELL_X24_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xs7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Douvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Cam2z4~q  & !\soc_inst|m0_1|u_logic|R1w2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xs7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xs7wx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Uvdwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Douvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Douvx4~0 .lut_mask = 64'h0000200000000000;
-defparam \soc_inst|m0_1|u_logic|Douvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .lut_mask = 64'h00330033CCFFCCFF;
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W0ivx4~0 (
+// Location: LABCELL_X27_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|X0c3z4~q )) 
-// # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|X0c3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & \soc_inst|m0_1|u_logic|X0c3z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( \soc_inst|m0_1|u_logic|X0c3z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Et7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .lut_mask = 64'h0F0F0C0C0AFF08CC;
-defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y12_N46
-dffeas \soc_inst|m0_1|u_logic|X0c3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X0c3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X0c3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X0c3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .lut_mask = 64'h051105BBAF11AFBB;
+defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylc3z4~0 (
+// Location: LABCELL_X24_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U18wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ylc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Ylc3z4~q  & ((!\soc_inst|m0_1|u_logic|hwdata_o [7]) # (!\soc_inst|m0_1|u_logic|Zyovx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|hwdata_o [7] & \soc_inst|m0_1|u_logic|Zyovx4~combout )) # (\soc_inst|m0_1|u_logic|Ylc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|U18wx4~0_combout  = ( \soc_inst|m0_1|u_logic|E1ewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E1ewx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Xtdwx4~1_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .lut_mask = 64'h03FF03FF00FC00FC;
-defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U18wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U18wx4~0 .lut_mask = 64'h00CC00CC33FF33FF;
+defparam \soc_inst|m0_1|u_logic|U18wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N38
-dffeas \soc_inst|m0_1|u_logic|Ylc3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ylc3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X27_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nu7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nu7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|S08wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((\soc_inst|m0_1|u_logic|U18wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|S08wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & \soc_inst|m0_1|u_logic|U18wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|S08wx4~0_combout  & (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((\soc_inst|m0_1|u_logic|U18wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|S08wx4~0_combout  & (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & \soc_inst|m0_1|u_logic|U18wx4~0_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ylc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .lut_mask = 64'h04340737C4F4C7F7;
+defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N14
-dffeas \soc_inst|m0_1|u_logic|Z4l2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z4l2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X27_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z4l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .lut_mask = 64'hCCC0C8C80C00C8C8;
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y12_N1
-dffeas \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Po7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Po7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  $ 
+// (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Po7wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .lut_mask = 64'h50A0500000A00000;
+defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A50xx4~0 (
+// Location: LABCELL_X24_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hr7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A50xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Q6l2z4~q  & ( \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & (\soc_inst|m0_1|u_logic|Z4l2z4~q  & (\soc_inst|m0_1|u_logic|G8n2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ylc3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6l2z4~q  & ( !\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & (\soc_inst|m0_1|u_logic|Z4l2z4~q  & \soc_inst|m0_1|u_logic|Ylc3z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Q6l2z4~q  & ( !\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & (\soc_inst|m0_1|u_logic|Ylc3z4~q  & ((\soc_inst|m0_1|u_logic|G8n2z4~q ) # (\soc_inst|m0_1|u_logic|Z4l2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Mzxwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & !\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A50xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A50xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A50xx4~0 .lut_mask = 64'h0015001100010000;
-defparam \soc_inst|m0_1|u_logic|A50xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .lut_mask = 64'h0100FFFE3200FFCD;
+defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ayzwx4 (
+// Location: MLABCELL_X21_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ayzwx4~combout  = ( !\soc_inst|m0_1|u_logic|A50xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jkc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Fc7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout  & \soc_inst|m0_1|u_logic|U2ewx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout  & \soc_inst|m0_1|u_logic|U2ewx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout  & \soc_inst|m0_1|u_logic|U2ewx4~0_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A50xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fc7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ayzwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ayzwx4 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Ayzwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .lut_mask = 64'h0A0AFFFF0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~1 (
+// Location: MLABCELL_X21_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( (!\soc_inst|m0_1|u_logic|X0c3z4~q ) # (!\soc_inst|m0_1|u_logic|Ylc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Fc7wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fc7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Po7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Po7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Po7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fc7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .lut_mask = 64'hFFCCFFCC00000000;
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .lut_mask = 64'hA2F3A2F300000000;
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N44
-dffeas \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE (
+// Location: MLABCELL_X34_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dtpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Et7wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Dtpvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .lut_mask = 64'h0000FFFC0000ECEC;
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y8_N41
+dffeas \soc_inst|m0_1|u_logic|Koj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Koj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Koj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Koj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N53
-dffeas \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE (
+// Location: FF_X34_Y8_N53
+dffeas \soc_inst|m0_1|u_logic|Kt33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Kt33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y14_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9ovx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|K9ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Uaj2z4~q  & \soc_inst|m0_1|u_logic|R1w2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .lut_mask = 64'h0000002000000000;
-defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kt33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2ivx4~0 (
+// Location: MLABCELL_X34_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & 
-// ((\soc_inst|m0_1|u_logic|Gxk2z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & (\soc_inst|m0_1|u_logic|D9ovx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ((\soc_inst|m0_1|u_logic|Gxk2z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & (\soc_inst|m0_1|u_logic|D9ovx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|D9ovx4~combout  & \soc_inst|m0_1|u_logic|hwdata_o~5_combout )) # (\soc_inst|m0_1|u_logic|Gxk2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( ((\soc_inst|m0_1|u_logic|D9ovx4~combout  & \soc_inst|m0_1|u_logic|hwdata_o~5_combout )) # (\soc_inst|m0_1|u_logic|Gxk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kt33z4~q ) # ((!\soc_inst|m0_1|u_logic|Koj2z4~q  & \soc_inst|m0_1|u_logic|V41xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Koj2z4~q  & \soc_inst|m0_1|u_logic|V41xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Koj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kt33z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .lut_mask = 64'h1F1F1F001D1D1D00;
-defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .lut_mask = 64'h00CC00CCF0FCF0FC;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N8
-dffeas \soc_inst|m0_1|u_logic|Gxk2z4 (
+// Location: FF_X33_Y7_N50
+dffeas \soc_inst|m0_1|u_logic|Sa13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gxk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sa13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gxk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gxk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sa13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sa13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N28
-dffeas \soc_inst|m0_1|u_logic|Mcc3z4 (
+// Location: FF_X29_Y11_N17
+dffeas \soc_inst|m0_1|u_logic|Isi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Isi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mcc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mcc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Isi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Isi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mcc3z4~0 (
+// Location: LABCELL_X35_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mcc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Mcc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( \soc_inst|m0_1|u_logic|Mcc3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Isi2z4~q  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sa13z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Isi2z4~q  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Sa13z4~q ) # (\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Isi2z4~q  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Sa13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Isi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .lut_mask = 64'h00FF00FF22EE22EE;
-defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .lut_mask = 64'h0F0F0000CFCFCCCC;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N29
-dffeas \soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE (
+// Location: FF_X25_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N2
-dffeas \soc_inst|m0_1|u_logic|Zad3z4 (
+// Location: FF_X35_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Pfz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zad3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pfz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zad3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zad3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pfz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pfz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ruvvx4~0 (
+// Location: FF_X25_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|Ehz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ehz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ehz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Cam2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ehz2z4~q  & ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pfz2z4~q )))) # (\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pfz2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ehz2z4~q  & ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pfz2z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pfz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ehz2z4~q  & ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pfz2z4~q )))) # (\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q  & 
+// (((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pfz2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pfz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .lut_mask = 64'h0000200000000000;
-defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .lut_mask = 64'hF531F5310000F531;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M2ivx4~0 (
+// Location: LABCELL_X23_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sndwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( (!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( ((\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( (\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Sndwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C0ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|C0ewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .lut_mask = 64'h5555505044FF40F0;
-defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N20
-dffeas \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE (
+// Location: FF_X21_Y18_N13
+dffeas \soc_inst|m0_1|u_logic|J9d3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|J9d3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J9d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J9d3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G10xx4~0 (
+// Location: FF_X27_Y18_N44
+dffeas \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G10xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zad3z4~q  & ( \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ) # 
-// ((\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pcd3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zad3z4~q  & ( \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pcd3z4~q  & !\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wkpwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Jkc3z4~q )) # (\soc_inst|m0_1|u_logic|F4c3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Jkc3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G10xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G10xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G10xx4~0 .lut_mask = 64'h0000000010005510;
-defparam \soc_inst|m0_1|u_logic|G10xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .lut_mask = 64'h000F000F333F333F;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ztc3z4~0 (
+// Location: LABCELL_X27_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ztc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Ztc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( \soc_inst|m0_1|u_logic|Ztc3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Wkpwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wkpwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E0uvx4~combout  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # ((!\soc_inst|m0_1|u_logic|Pab3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|E0uvx4~combout  & (!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Pab3z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .lut_mask = 64'h00FF00FF22EE22EE;
-defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .lut_mask = 64'hFCA8FCA800000000;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N26
-dffeas \soc_inst|m0_1|u_logic|Ztc3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ztc3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkpwx4~2_combout  = ( \soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J7b3z4~q  & (\soc_inst|m0_1|u_logic|Wkpwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z8b3z4~q )))) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wkpwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z8b3z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|J7b3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkpwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ztc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ztc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .lut_mask = 64'h00CF00CF00450045;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G10xx4~1 (
+// Location: LABCELL_X22_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G10xx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ztc3z4~q  & ( (\soc_inst|m0_1|u_logic|Gxk2z4~q  & !\soc_inst|m0_1|u_logic|G10xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wkpwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wkpwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|J9d3z4~q  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Xdb3z4~q )))) # (\soc_inst|m0_1|u_logic|J9d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|N1uvx4~combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Xdb3z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|G10xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J9d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G10xx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G10xx4~1 .lut_mask = 64'h0000000033003300;
-defparam \soc_inst|m0_1|u_logic|G10xx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .lut_mask = 64'h00000000FCA8FCA8;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fb0xx4~0 (
+// Location: LABCELL_X22_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fb0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|O9iwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( ((\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & !\soc_inst|m0_1|u_logic|Wkpwx4~3_combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & !\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O9iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .lut_mask = 64'h0F0F0F0F33333333;
-defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .lut_mask = 64'h0F000F005F555F55;
+defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S00xx4~0 (
+// Location: LABCELL_X23_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9iwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S00xx4~0_combout  = ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|O9iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|O9iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Sndwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O9iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S00xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S00xx4~0 .lut_mask = 64'h0F0F0F0F33333333;
-defparam \soc_inst|m0_1|u_logic|S00xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .lut_mask = 64'hCDEFCDEF00000000;
+defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~1 (
+// Location: LABCELL_X23_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nvdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I90xx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( (!\soc_inst|m0_1|u_logic|U7uwx4~combout ) # (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|U7uwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I90xx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I90xx4~1 .lut_mask = 64'hFFAAFFAA00000000;
-defparam \soc_inst|m0_1|u_logic|I90xx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .lut_mask = 64'h00F000F0FFF0FFF0;
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tb0xx4~0 (
+// Location: LABCELL_X23_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tb0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zad3z4~q  & ( \soc_inst|m0_1|u_logic|G10xx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Zad3z4~q  & ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q 
-//  ) ) ) # ( !\soc_inst|m0_1|u_logic|Zad3z4~q  & ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Asdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Asdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Asdwx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .lut_mask = 64'h0F0F0F0F0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B90xx4~0 (
+// Location: LABCELL_X24_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B90xx4~0_combout  = ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Avowx4~0_combout  = ( \soc_inst|m0_1|u_logic|X9n2z4~q  & ( ((\soc_inst|m0_1|u_logic|E0uvx4~combout  & \soc_inst|m0_1|u_logic|Bus2z4~q )) # (\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X9n2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|E0uvx4~combout  & \soc_inst|m0_1|u_logic|Bus2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Avowx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B90xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B90xx4~0 .lut_mask = 64'h00FF00FF55555555;
-defparam \soc_inst|m0_1|u_logic|B90xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~0 .lut_mask = 64'h0055005533773377;
+defparam \soc_inst|m0_1|u_logic|Avowx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjuwx4~0 (
+// Location: LABCELL_X24_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cjuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|I90xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~1_combout  ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & \soc_inst|m0_1|u_logic|I90xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|I90xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Avowx4~1_combout  = ( \soc_inst|m0_1|u_logic|K7pwx4~combout  & ( !\soc_inst|m0_1|u_logic|Avowx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dks2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Qwowx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7pwx4~combout  & ( !\soc_inst|m0_1|u_logic|Avowx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dks2z4~q ) # (!\soc_inst|m0_1|u_logic|Qwowx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Avowx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Avowx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .lut_mask = 64'hB0F000F0F0F0B0F0;
-defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~1 .lut_mask = 64'hFAFAC8C800000000;
+defparam \soc_inst|m0_1|u_logic|Avowx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvzwx4~1 (
+// Location: LABCELL_X23_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wvzwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I90xx4~0_combout  & (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & \soc_inst|m0_1|u_logic|Jjuwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Avowx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fed3z4~q  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Avowx4~1_combout ) # (\soc_inst|m0_1|u_logic|N1uvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fed3z4~q  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Avowx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Avowx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Avowx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .lut_mask = 64'h0005000500000000;
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~2 .lut_mask = 64'h00000000F0F0F3F3;
+defparam \soc_inst|m0_1|u_logic|Avowx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwywx4~0 (
+// Location: LABCELL_X17_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cma3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pwywx4~0_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Cma3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .lut_mask = 64'h000000000A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .lut_mask = 64'hFFFF0000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y10_N37
-dffeas \soc_inst|m0_1|u_logic|Qrp2z4 (
+// Location: FF_X17_Y17_N49
+dffeas \soc_inst|m0_1|u_logic|Cma3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cma3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qrp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qrp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cma3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cma3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdzwx4~0 (
+// Location: LABCELL_X18_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hdzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I90xx4~1_combout ) # (\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & \soc_inst|m0_1|u_logic|I90xx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Y7iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cma3z4~q ) # ((!\soc_inst|m0_1|u_logic|Ddi3z4~q  & \soc_inst|m0_1|u_logic|I7owx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & 
+// ( (!\soc_inst|m0_1|u_logic|Ddi3z4~q  & \soc_inst|m0_1|u_logic|I7owx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cma3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .lut_mask = 64'h003000303F3F3F3F;
-defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .lut_mask = 64'h00CC00CCF0FCF0FC;
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N46
-dffeas \soc_inst|m0_1|u_logic|Usl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Usl2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y7iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Y7iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Avowx4~2_combout  & ((!\soc_inst|interconnect_1|HRDATA[22]~35_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) )
+
+	.dataa(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Avowx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Usl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Usl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N10xx4~0 (
+// Location: LABCELL_X23_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N10xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bmb3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Usl2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Y7iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Zudwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Asdwx4~1_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N10xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N10xx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|N10xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .lut_mask = 64'h00000000CDEFCDEF;
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F40xx4~0 (
+// Location: MLABCELL_X25_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E9zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F40xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|Z4l2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|E9zvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( \soc_inst|m0_1|u_logic|V9iwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E9zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F40xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F40xx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|F40xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .lut_mask = 64'h5F5F55550F0F0000;
+defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Adzwx4~0 (
+// Location: LABCELL_X31_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E9zvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Adzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (\soc_inst|m0_1|u_logic|N10xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|F40xx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) # (\soc_inst|m0_1|u_logic|N10xx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|E9zvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|E9zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & (\soc_inst|m0_1|u_logic|A9iwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|D7iwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & (((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|D7iwx4~1_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E9zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .lut_mask = 64'h003F003F303F303F;
-defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .lut_mask = 64'h7707770700000000;
+defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvzwx4~0 (
+// Location: FF_X30_Y18_N19
+dffeas \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jjuwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Add2~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~30  ))
+// \soc_inst|m0_1|u_logic|Add2~22  = CARRY(( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~30  ))
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~30 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~21_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~22 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~21 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~22  ))
+// \soc_inst|m0_1|u_logic|Add2~10  = CARRY(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~22  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~22 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~9_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~10 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~9 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Vvx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~10  ))
+// \soc_inst|m0_1|u_logic|Add2~14  = CARRY(( !\soc_inst|m0_1|u_logic|Vvx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~10  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~13_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~14 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~13 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add2~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~2 (
+// Location: LABCELL_X17_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I90xx4~2_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( \soc_inst|m0_1|u_logic|I90xx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Add2~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~14  ))
+// \soc_inst|m0_1|u_logic|Add2~2  = CARRY(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~14  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~1_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~2 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I90xx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I90xx4~2 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|I90xx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~1 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A6zwx4~0 (
+// Location: LABCELL_X18_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A6zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( \soc_inst|m0_1|u_logic|Adzwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Tvhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Omk2z4~q  & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Omk2z4~q  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Add2~1_sumout  & 
+// \soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Omk2z4~q  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Add2~1_sumout  & \soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Add2~1_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .lut_mask = 64'h055505550F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y9_N14
-dffeas \soc_inst|m0_1|u_logic|Wuq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wuq2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wuq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wuq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .lut_mask = 64'h03030303FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yauvx4~0 (
+// Location: LABCELL_X37_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yauvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|G0w2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (\soc_inst|m0_1|u_logic|Uaj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Tvhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( \soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tvhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tvhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( 
+// !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tvhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .lut_mask = 64'h0000000001000000;
-defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .lut_mask = 64'hA0A0A0A0A0A00000;
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzhvx4~0 (
+// Location: LABCELL_X37_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wuq2z4~q ))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ) # (\soc_inst|m0_1|u_logic|Wuq2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout )) # (\soc_inst|m0_1|u_logic|Wuq2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ) # (\soc_inst|m0_1|u_logic|Wuq2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Wuq2z4~q  & (\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Wuq2z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Tvhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Tvhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & \soc_inst|m0_1|u_logic|E9zvx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wuq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tvhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .lut_mask = 64'h32320032FA32FA32;
-defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .lut_mask = 64'h00000000FF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y9_N13
-dffeas \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE (
+// Location: FF_X37_Y12_N56
+dffeas \soc_inst|m0_1|u_logic|Omk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Omk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Omk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Omk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqzwx4~0 (
+// Location: LABCELL_X17_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tqzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|D4g3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D4g3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Add2~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J0l2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~2  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~2 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~5_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .lut_mask = 64'hFF00FF00AA00AA00;
-defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~5 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y14_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsa2z4~0 (
+// Location: LABCELL_X18_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wthvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (\soc_inst|m0_1|u_logic|Cam2z4~q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wthvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~5_sumout ) # ((!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|J0l2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~5_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wthvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .lut_mask = 64'h0000000004000000;
-defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .lut_mask = 64'hE0EFE0EF00000000;
+defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Syhvx4~0 (
+// Location: LABCELL_X37_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Syhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & (\soc_inst|m0_1|u_logic|Lul2z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|m0_1|u_logic|Lul2z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|m0_1|u_logic|Lul2z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|R5zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout  & ( 
+// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .lut_mask = 64'h00EE00EE00E0EEEE;
-defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .lut_mask = 64'h00000000333FFFFF;
+defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y13_N32
-dffeas \soc_inst|m0_1|u_logic|Lul2z4 (
+// Location: FF_X25_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Yd03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lul2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lul2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lul2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X27_Y13_N1
-dffeas \soc_inst|m0_1|u_logic|Jsc3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Yd03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jsc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jsc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yd03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yd03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsc3z4~0 (
+// Location: MLABCELL_X25_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jsc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Jsc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q 
-// )) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( \soc_inst|m0_1|u_logic|Jsc3z4~q  ) )
+// \soc_inst|m0_1|u_logic|H972z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ehz2z4~q  & ( \soc_inst|m0_1|u_logic|Yd03z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ehz2z4~q  & ( !\soc_inst|m0_1|u_logic|Yd03z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ehz2z4~q  & ( !\soc_inst|m0_1|u_logic|Yd03z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yd03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H972z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .lut_mask = 64'h00FF00FF30FC30FC;
-defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~2 .lut_mask = 64'h00C0008000400000;
+defparam \soc_inst|m0_1|u_logic|H972z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y13_N2
-dffeas \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE (
+// Location: FF_X35_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|X2j2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|X2j2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X2j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X2j2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y13_N53
-dffeas \soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X35_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eb72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eb72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|X2j2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|X2j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Eb72z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y13_N29
-dffeas \soc_inst|m0_1|u_logic|Cps2z4 (
+// Location: FF_X31_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|T253z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cps2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|T253z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cps2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cps2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T253z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T253z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y13_N44
-dffeas \soc_inst|m0_1|u_logic|Uls2z4 (
+// Location: FF_X34_Y8_N52
+dffeas \soc_inst|m0_1|u_logic|Kt33z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uls2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kt33z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uls2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uls2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kt33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt33z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwvwx4~0 (
+// Location: LABCELL_X31_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xwvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uls2z4~q  & ( \soc_inst|m0_1|u_logic|Lns2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cps2z4~q  & (\soc_inst|m0_1|u_logic|Lul2z4~q  & \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Uls2z4~q  & ( !\soc_inst|m0_1|u_logic|Lns2z4~q  & ( (\soc_inst|m0_1|u_logic|Lul2z4~q  & (\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Cps2z4~q ) # (\soc_inst|m0_1|u_logic|Dks2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Uls2z4~q  & ( !\soc_inst|m0_1|u_logic|Lns2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cps2z4~q  & (\soc_inst|m0_1|u_logic|Lul2z4~q  & (\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Dks2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|H972z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Kt33z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|T253z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T253z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kt33z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H972z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .lut_mask = 64'h0002020300000202;
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~0 .lut_mask = 64'h000000000000A088;
+defparam \soc_inst|m0_1|u_logic|H972z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwvwx4~1 (
+// Location: FF_X27_Y7_N50
+dffeas \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xwvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rym2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|H972z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sa13z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sa13z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H972z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .lut_mask = 64'h0055005500000000;
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~1 .lut_mask = 64'h3000000022000000;
+defparam \soc_inst|m0_1|u_logic|H972z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~1 (
+// Location: LABCELL_X35_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Arzwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lul2z4~q ) # (!\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|H972z4~3_combout  = ( !\soc_inst|m0_1|u_logic|H972z4~0_combout  & ( !\soc_inst|m0_1|u_logic|H972z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H972z4~2_combout  & (!\soc_inst|m0_1|u_logic|Eb72z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pfz2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pfz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H972z4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eb72z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H972z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H972z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H972z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .lut_mask = 64'hFFCCFFCC00000000;
-defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y13_N38
-dffeas \soc_inst|m0_1|u_logic|Vgs2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vgs2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vgs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vgs2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X27_Y13_N26
-dffeas \soc_inst|m0_1|u_logic|Tib3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tib3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tib3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tib3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H972z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~3 .lut_mask = 64'hB000000000000000;
+defparam \soc_inst|m0_1|u_logic|H972z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dizwx4~0 (
+// Location: LABCELL_X35_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A67wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tib3z4~q  & ( (\soc_inst|m0_1|u_logic|Vgs2z4~q ) # (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tib3z4~q  & ( (!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Vgs2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|A67wx4~0_combout  = ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( \soc_inst|m0_1|u_logic|H972z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|V1l2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( \soc_inst|m0_1|u_logic|H972z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|V1l2z4~q )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( !\soc_inst|m0_1|u_logic|H972z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|V1l2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( !\soc_inst|m0_1|u_logic|H972z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|V1l2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H972z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A67wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A67wx4~0 .lut_mask = 64'h330A330A330A335F;
+defparam \soc_inst|m0_1|u_logic|A67wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kizwx4~0 (
+// Location: LABCELL_X35_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zwcvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uls2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Cps2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Zwcvx4~combout  = ( !\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .lut_mask = 64'h00FF00FF33333333;
-defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zwcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zwcvx4 .lut_mask = 64'hFFFF000000000000;
+defparam \soc_inst|m0_1|u_logic|Zwcvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fczwx4~0 (
+// Location: LABCELL_X31_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dih2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fczwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & (\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & \soc_inst|m0_1|u_logic|Dizwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Dih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|O7zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|O7zvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .lut_mask = 64'h000C000C33FF33FF;
-defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .lut_mask = 64'hFFCCFFCCBBBBBBBB;
+defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9vvx4~0 (
+// Location: MLABCELL_X34_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ducvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K9vvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ducvx4~combout  = ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) # ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ducvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ducvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ducvx4 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ducvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uzhvx4~0 (
+// Location: LABCELL_X31_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kih2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ble3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ) # (\soc_inst|m0_1|u_logic|Ble3z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Ble3z4~q  & (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Ble3z4~q  & ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .lut_mask = 64'h51515100DDDDDD00;
-defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y11_N53
-dffeas \soc_inst|m0_1|u_logic|Ble3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ble3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ble3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .lut_mask = 64'hFCFCFCFCFF33FF33;
+defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lee3z4~0 (
+// Location: LABCELL_X33_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whh2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lee3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( \soc_inst|m0_1|u_logic|Lee3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Lee3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Whh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Izpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Izpvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .lut_mask = 64'h0AFA0AFA00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y12_N19
-dffeas \soc_inst|m0_1|u_logic|Lee3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lee3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lee3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lee3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .lut_mask = 64'hFAFAFAFAFF55FF55;
+defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[10]~9 (
+// Location: LABCELL_X31_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sscvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  = (!\soc_inst|m0_1|u_logic|Wq5wx4~combout  & (\soc_inst|m0_1|u_logic|Zh5wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ((\soc_inst|m0_1|u_logic|Sh5wx4~0_combout )))
+// \soc_inst|m0_1|u_logic|Sscvx4~combout  = ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sscvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .lut_mask = 64'h550F550F550F550F;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sscvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sscvx4 .lut_mask = 64'h33333333FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Sscvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y14_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wva2z4~0 (
+// Location: LABCELL_X30_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yih2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wva2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (\soc_inst|m0_1|u_logic|R1w2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Uaj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Yih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Pdbwx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .lut_mask = 64'h0000020000000000;
-defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .lut_mask = 64'hFFAAFFAAFFFF5555;
+defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B0ivx4~0 (
+// Location: MLABCELL_X25_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Ipn2z4~q )))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ) # (\soc_inst|m0_1|u_logic|Ipn2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ) # ((\soc_inst|m0_1|u_logic|Ipn2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ) # (\soc_inst|m0_1|u_logic|Ipn2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & (\soc_inst|m0_1|u_logic|Ipn2z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Ipn2z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fm72z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Skh3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Djh3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Djh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Skh3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fm72z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .lut_mask = 64'h0F0A0302CF8ACF8A;
-defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .lut_mask = 64'h00000000E0200000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y9_N55
-dffeas \soc_inst|m0_1|u_logic|Ipn2z4 (
+// Location: FF_X25_Y11_N32
+dffeas \soc_inst|m0_1|u_logic|Wnh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wnh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ipn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wnh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nnc3z4~0 (
+// Location: FF_X27_Y6_N59
+dffeas \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Zu23z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nnc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nnc3z4~q  & ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  ) ) # ( \soc_inst|m0_1|u_logic|Nnc3z4~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Zyovx4~combout ) # (!\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nnc3z4~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (\soc_inst|m0_1|u_logic|Zyovx4~combout  & !\soc_inst|m0_1|u_logic|J6i2z4~q 
-// ) ) ) )
+// \soc_inst|m0_1|u_logic|Fm72z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Ql13z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ql13z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nnc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fm72z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .lut_mask = 64'h3030FCFC0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .lut_mask = 64'h00000000E0400000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y11_N1
-dffeas \soc_inst|m0_1|u_logic|Nnc3z4 (
+// Location: FF_X25_Y11_N13
+dffeas \soc_inst|m0_1|u_logic|Hmh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nnc3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nnc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hmh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nnc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nnc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hmh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hmh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y11_N26
-dffeas \soc_inst|m0_1|u_logic|Azs2z4 (
+// Location: MLABCELL_X25_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Co72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Co72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hmh3z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hmh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Co72z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Co72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Co72z4~0 .lut_mask = 64'h0200000000000000;
+defparam \soc_inst|m0_1|u_logic|Co72z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y6_N32
+dffeas \soc_inst|m0_1|u_logic|I443z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Azs2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I443z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Azs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Azs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I443z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I443z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y14_N8
-dffeas \soc_inst|m0_1|u_logic|Svs2z4 (
+// Location: FF_X24_Y6_N17
+dffeas \soc_inst|m0_1|u_logic|Rd53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rd53z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Svs2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rd53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Svs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rd53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gyvwx4~0 (
+// Location: LABCELL_X24_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gyvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svs2z4~q  & ( (!\soc_inst|m0_1|u_logic|Azs2z4~q ) # ((\soc_inst|m0_1|u_logic|Bus2z4~q  & !\soc_inst|m0_1|u_logic|Jxs2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Svs2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Bus2z4~q  & (!\soc_inst|m0_1|u_logic|Azs2z4~q  & !\soc_inst|m0_1|u_logic|Jxs2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Fm72z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rd53z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|I443z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|I443z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rd53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gyvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fm72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .lut_mask = 64'h50005000F5F0F5F0;
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .lut_mask = 64'h00000A0000000C00;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gyvwx4~1 (
+// Location: MLABCELL_X25_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gyvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ipn2z4~q  & (\soc_inst|m0_1|u_logic|Nnc3z4~q  & ((!\soc_inst|m0_1|u_logic|Ble3z4~q ) # (!\soc_inst|m0_1|u_logic|Lee3z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gyvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ipn2z4~q  & \soc_inst|m0_1|u_logic|Nnc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Fm72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Co72z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fm72z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fm72z4~2_combout  & (!\soc_inst|m0_1|u_logic|Fm72z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wnh3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fm72z4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wnh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fm72z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Co72z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fm72z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fm72z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .lut_mask = 64'h1111111111101110;
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~0 (
+// Location: LABCELL_X30_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B6pwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ble3z4~q ) # (!\soc_inst|m0_1|u_logic|Lee3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( \soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  
+// & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Fexwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( \soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Fexwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|S8k2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( !\soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|S8k2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fm72z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .lut_mask = 64'hFFF0FFF000000000;
-defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .lut_mask = 64'h00CC22EE10DC32FE;
+defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2f3z4~0 (
+// Location: LABCELL_X31_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hrcvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2f3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( \soc_inst|m0_1|u_logic|H2f3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|H2f3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Hrcvx4~combout  = ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hrcvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .lut_mask = 64'h30FC30FC00FF00FF;
-defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y11_N1
-dffeas \soc_inst|m0_1|u_logic|H2f3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H2f3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2f3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H2f3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X23_Y11_N17
-dffeas \soc_inst|m0_1|u_logic|T8f3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T8f3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T8f3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T8f3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hrcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hrcvx4 .lut_mask = 64'h55555555FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Hrcvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhvvx4~0 (
+// Location: LABCELL_X31_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~89 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q 
-//  & \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~89_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Hrcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~6  ))
+// \soc_inst|m0_1|u_logic|Add5~90  = CARRY(( (!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Hrcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~6  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hrcvx4~combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~6 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~90 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .lut_mask = 64'h0000000000020000;
-defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~89 .lut_mask = 64'h000000FF0000FF62;
+defparam \soc_inst|m0_1|u_logic|Add5~89 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0ivx4~0 (
+// Location: LABCELL_X31_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~85 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|T8f3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|T8f3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout  & (\soc_inst|m0_1|u_logic|T8f3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|D9ovx4~combout  & (((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~85_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Sscvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~90  ))
+// \soc_inst|m0_1|u_logic|Add5~86  = CARRY(( (!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Sscvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~90  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sscvx4~combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~90 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~86 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .lut_mask = 64'h7770333055503330;
-defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X23_Y11_N16
-dffeas \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X27_Y10_N41
-dffeas \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~85 .lut_mask = 64'h000000FF0000FF62;
+defparam \soc_inst|m0_1|u_logic|Add5~85 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y10_N20
-dffeas \soc_inst|m0_1|u_logic|Tqs2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tqs2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tqs2z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X31_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~117 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~117_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ducvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ijcwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout )))) ) + ( \soc_inst|m0_1|u_logic|Add5~86  ))
+// \soc_inst|m0_1|u_logic|Add5~118  = CARRY(( !\soc_inst|m0_1|u_logic|Ducvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ijcwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout )))) ) + ( \soc_inst|m0_1|u_logic|Add5~86  ))
 
-// Location: FF_X27_Y11_N56
-dffeas \soc_inst|m0_1|u_logic|Kkb3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kkb3z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ducvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~86 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~118 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kkb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~117 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~117 .lut_mask = 64'h000000A70000FF00;
+defparam \soc_inst|m0_1|u_logic|Add5~117 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whzwx4~0 (
+// Location: LABCELL_X31_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kkb3z4~q  & ( \soc_inst|m0_1|u_logic|Gcb3z4~q  & ( (\soc_inst|m0_1|u_logic|Vve3z4~q  & (\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Tqs2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkb3z4~q  & ( \soc_inst|m0_1|u_logic|Gcb3z4~q  & ( (\soc_inst|m0_1|u_logic|Vve3z4~q  & (!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Tqs2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kkb3z4~q  & ( !\soc_inst|m0_1|u_logic|Gcb3z4~q  & ( (\soc_inst|m0_1|u_logic|Vve3z4~q  & (\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tqs2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ovcvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ijcwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout )))) ) + ( \soc_inst|m0_1|u_logic|Add5~118  ))
+// \soc_inst|m0_1|u_logic|Add5~10  = CARRY(( !\soc_inst|m0_1|u_logic|Ovcvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ijcwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout )))) ) + ( \soc_inst|m0_1|u_logic|Add5~118  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ovcvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~118 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whzwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~10 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .lut_mask = 64'h0000050004000504;
-defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~9 .lut_mask = 64'h000000A70000FF00;
+defparam \soc_inst|m0_1|u_logic|Add5~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whzwx4~1 (
+// Location: LABCELL_X31_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~77 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whzwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Whzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H2f3z4~q  & \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Add5~77_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Zwcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~10  ))
+// \soc_inst|m0_1|u_logic|Add5~78  = CARRY(( (!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Zwcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~10  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~78 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~77 .lut_mask = 64'h0000FF000000FF62;
+defparam \soc_inst|m0_1|u_logic|Add5~77 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjzwx4~0 (
+// Location: LABCELL_X37_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wthvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fjzwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Wthvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (\soc_inst|m0_1|u_logic|Wthvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|R5zvx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (\soc_inst|m0_1|u_logic|Wthvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|R5zvx4~2_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wthvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wthvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .lut_mask = 64'hFFF0FFF000000000;
-defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .lut_mask = 64'h3303330322022202;
+defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y12_N37
+dffeas \soc_inst|m0_1|u_logic|J0l2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wthvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J0l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J0l2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qlzwx4~0 (
+// Location: LABCELL_X37_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tqs2z4~q  & ( (!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Kkb3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Tqs2z4~q  & ( (\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Kkb3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|O3ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|J0l2z4~q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|V1l2z4~q 
+//  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .lut_mask = 64'hAAAAAAAA00F000F0;
+defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yizwx4~0 (
+// Location: LABCELL_X36_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Svs2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Azs2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Add3~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~22  ))
+// \soc_inst|m0_1|u_logic|Add3~18  = CARRY(( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~22  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~22 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~17_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~18 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~17 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mczwx4~0 (
+// Location: LABCELL_X36_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mczwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & \soc_inst|m0_1|u_logic|Qlzwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Add3~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~18  ))
+// \soc_inst|m0_1|u_logic|Add3~14  = CARRY(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~18  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~18 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~13_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~14 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .lut_mask = 64'h003000300FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~13 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~1 (
+// Location: LABCELL_X36_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B6pwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Tqzwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Add3~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Vvx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~14  ))
+// \soc_inst|m0_1|u_logic|Add3~10  = CARRY(( !\soc_inst|m0_1|u_logic|Vvx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~14  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~9_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~10 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~9 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~3 (
+// Location: LABCELL_X36_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B6pwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fczwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & \soc_inst|m0_1|u_logic|B6pwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fczwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Mczwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & (\soc_inst|m0_1|u_logic|B6pwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Mczwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & \soc_inst|m0_1|u_logic|B6pwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Add3~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~10  ))
+// \soc_inst|m0_1|u_logic|Add3~6  = CARRY(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~10  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~5_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~6 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .lut_mask = 64'h5703570303030303;
-defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y13_N52
-dffeas \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pab3z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~5 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add3~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iazwx4~0 (
+// Location: LABCELL_X36_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iazwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Dks2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lns2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Add3~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J0l2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~6  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~6 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~1_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~1 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7zwx4~0 (
+// Location: LABCELL_X30_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J7zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pazwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Mis2z4~q )) # (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Pazwx4~combout  & ( !\soc_inst|m0_1|u_logic|Iazwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|haddr_o~0_combout  = ( \soc_inst|m0_1|u_logic|Add3~1_sumout  & ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~1_sumout  & ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~1_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~1_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|A67wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .lut_mask = 64'hFF00FF00ACACACAC;
-defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~0 .lut_mask = 64'hCCFFC0F088AA80A0;
+defparam \soc_inst|m0_1|u_logic|haddr_o~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihzwx4~0 (
+// Location: LABCELL_X36_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phh2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ihzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bus2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jxs2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Phh2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Phh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Clzwx4~0 (
+// Location: LABCELL_X35_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Clzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gcb3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Y5zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Gci2z4~q  & \soc_inst|m0_1|u_logic|Rmawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nd3wx4~combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gci2z4~q  & \soc_inst|m0_1|u_logic|Rmawx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .lut_mask = 64'h333333330F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .lut_mask = 64'h00F000F055F555F5;
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5zwx4~0 (
+// Location: LABCELL_X35_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T5zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Yizwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|B6pwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & !\soc_inst|m0_1|u_logic|Yizwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & \soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Y5zvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Y5zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Phh2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y5zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Phh2z4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .lut_mask = 64'h005540557F557755;
-defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .lut_mask = 64'hACCF00000C0F0000;
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~2 (
+// Location: LABCELL_X31_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B6pwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fczwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mczwx4~0_combout  & (\soc_inst|m0_1|u_logic|T5zwx4~0_combout  & !\soc_inst|m0_1|u_logic|B6pwx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fczwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T5zwx4~0_combout  & !\soc_inst|m0_1|u_logic|B6pwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (\soc_inst|m0_1|u_logic|Y5zvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (\soc_inst|m0_1|u_logic|Y5zvx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .lut_mask = 64'h0F000F0005000500;
-defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .lut_mask = 64'h5050505000500050;
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6zwx4~0 (
+// Location: LABCELL_X37_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cb3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H6zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Mczwx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fczwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & (\soc_inst|m0_1|u_logic|Fczwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Mczwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & (\soc_inst|m0_1|u_logic|Fczwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Cb3wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wai2z4~q  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & (((\soc_inst|m0_1|u_logic|R5zvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nd3wx4~combout ) # (\soc_inst|m0_1|u_logic|K0qvx4~combout 
+// )))))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Nd3wx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (((\soc_inst|m0_1|u_logic|Fc7wx4~1_combout )))))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wai2z4~q  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & (((\soc_inst|m0_1|u_logic|R5zvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nd3wx4~combout ) # (\soc_inst|m0_1|u_logic|K0qvx4~combout )))))) # 
+// (\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Nd3wx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (((\soc_inst|m0_1|u_logic|Y5zvx4~2_combout )))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .lut_mask = 64'h11DD11DD15D515D5;
-defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .lut_mask = 64'h44054405CCAFCCAF;
+defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ozywx4~0 (
+// Location: LABCELL_X37_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R38wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ozywx4~0_combout  = ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qrp2z4~q  & (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qrp2z4~q  & (((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qrp2z4~q  & ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qrp2z4~q  & (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Qrp2z4~q  & (((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|R38wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R38wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .lut_mask = 64'h000031F5310531F5;
-defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R38wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R38wx4~0 .lut_mask = 64'hF6F6FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|R38wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J0zwx4~0 (
+// Location: LABCELL_X37_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R38wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J0zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|H6zwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ((\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|R38wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( !\soc_inst|m0_1|u_logic|R38wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|X77wx4~combout  & ( !\soc_inst|m0_1|u_logic|R38wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R38wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R38wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .lut_mask = 64'h003F003F0C3F0C3F;
-defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R38wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R38wx4~1 .lut_mask = 64'hFF00CFC300000000;
+defparam \soc_inst|m0_1|u_logic|R38wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzywx4~0 (
+// Location: LABCELL_X35_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qb3wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vzywx4~0_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ((\soc_inst|m0_1|u_logic|T5zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & (\soc_inst|m0_1|u_logic|T5zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Qb3wx4~combout  = ( !\soc_inst|m0_1|u_logic|Op2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|R38wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Op2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R38wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Tki2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R38wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .lut_mask = 64'h3F0C3F0C3F003F00;
-defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qb3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qb3wx4 .lut_mask = 64'hAAAA0000FFEE0000;
+defparam \soc_inst|m0_1|u_logic|Qb3wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kbzwx4~0 (
+// Location: MLABCELL_X34_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z9zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kbzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|I90xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (((\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout )) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ((\soc_inst|m0_1|u_logic|S00xx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ((!\soc_inst|m0_1|u_logic|I90xx4~0_combout  & ((\soc_inst|m0_1|u_logic|S00xx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|I90xx4~0_combout  & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout )))) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (((\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout  & ((\soc_inst|m0_1|u_logic|I90xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (((\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Z9zvx4~0_combout  = (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Qb3wx4~combout ) # (!\soc_inst|m0_1|u_logic|Wspvx4~combout )))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .lut_mask = 64'h1353335353531353;
-defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .lut_mask = 64'h0F0A0F0A0F0A0F0A;
+defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N16
-dffeas \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE (
+// Location: FF_X37_Y12_N19
+dffeas \soc_inst|m0_1|u_logic|Gci2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Gci2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gci2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gci2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y14_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jzzwx4~0 (
+// Location: LABCELL_X36_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3ivx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jzzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzvwx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Axm2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Axm2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|O3ivx4~1_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( \soc_inst|m0_1|u_logic|Gci2z4~q  & ( !\soc_inst|m0_1|u_logic|O3ivx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Gci2z4~q  & ( (!\soc_inst|m0_1|u_logic|O3ivx4~0_combout  & !\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( !\soc_inst|m0_1|u_logic|Gci2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|O3ivx4~0_combout  & !\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( !\soc_inst|m0_1|u_logic|Gci2z4~q  & ( (!\soc_inst|m0_1|u_logic|O3ivx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & !\soc_inst|m0_1|u_logic|P0pvx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|O3ivx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .lut_mask = 64'h555555550000FFFF;
-defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .lut_mask = 64'h8080A0A08888AAAA;
+defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y14_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qzzwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|G8n2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|Q6l2z4~q  ) )
+// Location: FF_X36_Y12_N8
+dffeas \soc_inst|m0_1|u_logic|V1l2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V1l2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V1l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V1l2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y8_N19
+dffeas \soc_inst|m0_1|u_logic|Glj2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Glj2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .lut_mask = 64'h333333330F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Glj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Glj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Czzwx4~0 (
+// Location: LABCELL_X29_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Czzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|N10xx4~0_combout  & !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|N10xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & \soc_inst|m0_1|u_logic|Jjuwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V1l2z4~q ) # ((\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Glj2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Glj2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Glj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .lut_mask = 64'h005040507F5F5F5F;
-defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .lut_mask = 64'h33003300F3F0F3F0;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R4zwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|R4zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( 
-// ((\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Adzwx4~0_combout  & !\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & \soc_inst|m0_1|u_logic|Adzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ))) ) ) )
+// Location: FF_X31_Y7_N25
+dffeas \soc_inst|m0_1|u_logic|T253z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T253z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T253z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y7_N49
+dffeas \soc_inst|m0_1|u_logic|Bk23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bk23z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .lut_mask = 64'h020F00004F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bk23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzywx4~1 (
+// Location: MLABCELL_X34_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vzywx4~1_combout  = ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & ((\soc_inst|m0_1|u_logic|R4zwx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|R4zwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|R4zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
-// (((\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vzywx4~0_combout  & (((\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bk23z4~q  & ( !\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bk23z4~q  & ( (!\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bk23z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bk23z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .lut_mask = 64'h070F038F03CF03CF;
-defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .lut_mask = 64'h0F0FAFAF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvywx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Gvywx4~0_combout  = ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Aqp2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Qrp2z4~q  & !\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Aqp2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Aqp2z4~q  & (\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) 
-// # (\soc_inst|m0_1|u_logic|G2zwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Aqp2z4~q  & (\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|G2zwx4~1_combout )) ) ) )
+// Location: FF_X35_Y9_N37
+dffeas \soc_inst|m0_1|u_logic|X2j2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X2j2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X2j2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X2j2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X34_Y8_N32
+dffeas \soc_inst|m0_1|u_logic|Ll73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ll73z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .lut_mask = 64'h00030203F7F3F3F3;
-defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ll73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5owx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|E5owx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wwywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwywx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwywx4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tyywx4~0_combout  & !\soc_inst|m0_1|u_logic|Hzywx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pwywx4~0_combout ))) ) ) )
+// Location: FF_X28_Y11_N58
+dffeas \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y11_N23
+dffeas \soc_inst|m0_1|u_logic|Cgt2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cgt2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E5owx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E5owx4~0 .lut_mask = 64'h80AAA8AAA0AAAAAA;
-defparam \soc_inst|m0_1|u_logic|E5owx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cgt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cgt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0zwx4~0 (
+// Location: MLABCELL_X34_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C0zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|G2zwx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qrp2z4~q  & ((!\soc_inst|m0_1|u_logic|Aqp2z4~q ) # ((\soc_inst|m0_1|u_logic|Vzywx4~1_combout ) # (\soc_inst|m0_1|u_logic|J0zwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qrp2z4~q  & (\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Aqp2z4~q ) # (\soc_inst|m0_1|u_logic|Vzywx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Cgt2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cgt2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cgt2z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cgt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .lut_mask = 64'h00008EAF0000FFFF;
-defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .lut_mask = 64'h0202000002000200;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~0 (
+// Location: LABCELL_X24_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc63z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X2rvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Cc63z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J3qvx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cc63z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cc63z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc63z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Cc63z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~0 (
+// Location: FF_X24_Y7_N14
+dffeas \soc_inst|m0_1|u_logic|Cc63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cc63z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cc63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y11_N5
+dffeas \soc_inst|m0_1|u_logic|Xti2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xti2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xti2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xti2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V3o2z4~q  & (\soc_inst|m0_1|u_logic|Wfuwx4~combout  & (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout 
-// ))) # (\soc_inst|m0_1|u_logic|V3o2z4~q  & (((\soc_inst|m0_1|u_logic|Wfuwx4~combout  & !\soc_inst|m0_1|u_logic|G2zwx4~1_combout )) # (\soc_inst|m0_1|u_logic|A5uvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V3o2z4~q  & \soc_inst|m0_1|u_logic|A5uvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|V3o2z4~q  & \soc_inst|m0_1|u_logic|A5uvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V3o2z4~q  & \soc_inst|m0_1|u_logic|A5uvx4~0_combout 
-// ) ) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Xti2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Cc63z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V3o2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cc63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xti2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .lut_mask = 64'h0055005500553075;
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .lut_mask = 64'h0000000040400500;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahowx4~0 (
+// Location: MLABCELL_X34_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ahowx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Ztc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Gxk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|Ztc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Nd3wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|X2j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ll73z4~q )))) # (\soc_inst|m0_1|u_logic|X2j2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|S61xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ll73z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X2j2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ll73z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ahowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .lut_mask = 64'h0505050537373737;
-defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .lut_mask = 64'hF351000000000000;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tgowx4~0 (
+// Location: MLABCELL_X34_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tgowx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ahowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ahowx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|A5uvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~3_combout  & ( \soc_inst|m0_1|u_logic|Nd3wx4~7_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~3_combout  & ( \soc_inst|m0_1|u_logic|Nd3wx4~7_combout  & ( 
+// (((!\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ) # (\soc_inst|m0_1|u_logic|Nd3wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Nd3wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nd3wx4~3_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Nd3wx4~7_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~7_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ahowx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tgowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .lut_mask = 64'h0005000555555555;
-defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4 .lut_mask = 64'hFFFFFFFFF7FFFFFF;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tlyvx4~0 (
+// Location: LABCELL_X35_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phh2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tlyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( (\soc_inst|m0_1|u_logic|F2o2z4~q  & (!\soc_inst|m0_1|u_logic|Tgowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Aea3z4~q )))) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tgowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Aea3z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Phh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Nd3wx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Nd3wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aea3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tgowx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tlyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .lut_mask = 64'hF500F50031003100;
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .lut_mask = 64'hFF5FFF5FFA5AFA5A;
+defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tlyvx4~1 (
+// Location: LABCELL_X31_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~129 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tlyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[0]~32_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Tlyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[0]~32_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Add5~129_sumout  = SUM(( GND ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add5~78  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tlyvx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~78 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~129_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .lut_mask = 64'h0C080C080F0A0F0A;
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~129 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~129 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Add5~129 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rkyvx4~0 (
+// Location: MLABCELL_X34_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~31_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Q7ewx4~1_combout )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[24]~31_combout  & ( (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Dtpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~129_sumout  & ( (!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wai2z4~q  & ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~129_sumout  & ( ((!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) # (\soc_inst|m0_1|u_logic|Wai2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~129_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .lut_mask = 64'hC0F0C0F080A080A0;
-defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .lut_mask = 64'hE0FFE0FFE000E000;
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N21
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[8]~28 (
+// Location: MLABCELL_X34_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zei2z4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[8]~28_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select [1]) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|byte_select [1]) ) ) )
+// \soc_inst|m0_1|u_logic|Zei2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( \soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|K0qvx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X4pvx4~combout  & \soc_inst|m0_1|u_logic|K0qvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|K0qvx4~combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select [1]),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[8]~28_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zei2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[8]~28 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[8]~28 .lut_mask = 64'h0505555500005050;
-defparam \soc_inst|ram_1|data_to_memory[8]~28 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X14_Y2_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[8]~28_combout ,\soc_inst|ram_1|data_to_memory[0]~27_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_bit_number = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_bit_number = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init0 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037DF7DEA548497ECA1E29A84B1284B12A0B20B20B20B20B20B20B2872AAAAAAAAAAAAAA048EFF3F0FFFFFFFFFFFF3C01554";
-// synopsys translate_on
-
-// Location: IOIBUF_X28_Y0_N35
-cyclonev_io_ibuf \SW[8]~input (
-	.i(SW[8]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[8]~input_o ));
-// synopsys translate_off
-defparam \SW[8]~input .bus_hold = "false";
-defparam \SW[8]~input .simulate_z_as = "z";
-// synopsys translate_on
-
-// Location: FF_X30_Y9_N8
-dffeas \soc_inst|switches_1|switch_store[0][8] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[8]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][8]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][8] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][8] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .lut_mask = 64'hF3F30303F0F00000;
+defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N6
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~33 (
+// Location: MLABCELL_X34_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zei2z4~1 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[8]~33_combout  = ( \soc_inst|interconnect_1|HRDATA[8]~15_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 )) # (\soc_inst|interconnect_1|Equal1~0_combout  
-// & ((\soc_inst|switches_1|switch_store[0][8]~q ))) ) )
+// \soc_inst|m0_1|u_logic|Zei2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Zei2z4~q  & ( \soc_inst|m0_1|u_logic|Zei2z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q  & ( \soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Lqpvx4~0_combout  
+// ) ) ) # ( \soc_inst|m0_1|u_logic|Zei2z4~q  & ( !\soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q  & ( !\soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lqpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ),
-	.datad(!\soc_inst|switches_1|switch_store[0][8]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[8]~15_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zei2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[8]~33 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[8]~33 .lut_mask = 64'h000000000C3F0C3F;
-defparam \soc_inst|interconnect_1|HRDATA[8]~33 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .lut_mask = 64'h5100FBAA5555FFFF;
+defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y11_N44
-dffeas \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE (
+// Location: FF_X34_Y15_N8
+dffeas \soc_inst|m0_1|u_logic|Zei2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -57756,7553 +59295,6745 @@ dffeas \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Zei2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X23_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hmyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & (\soc_inst|m0_1|u_logic|H2f3z4~q  & ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & (((\soc_inst|m0_1|u_logic|H2f3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|T8f3z4~q ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .lut_mask = 64'h0000000005370537;
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X23_Y11_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hmyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Hmyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # ((\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|G6owx4~combout  & (\soc_inst|m0_1|u_logic|W3f3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|W3f3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hmyvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .lut_mask = 64'h8ACF8ACF00000000;
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zei2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zei2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~2 (
+// Location: LABCELL_X30_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mdzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hmyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[8]~33_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Hmyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[8]~33_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Mdzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zei2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rmawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rtpvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rtpvx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hmyvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mdzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .lut_mask = 64'h00C800C800FA00FA;
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .lut_mask = 64'hAF00AF008C008C00;
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4~0 (
+// Location: LABCELL_X30_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ehcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ehcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .lut_mask = 64'h00B0B0B000BBBBBB;
-defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .lut_mask = 64'hA0A0FF00A820FFCC;
+defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4~1 (
+// Location: LABCELL_X30_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mdzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|F8iwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (\soc_inst|m0_1|u_logic|Mdzvx4~0_combout  & \soc_inst|m0_1|u_logic|Ehcwx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (\soc_inst|m0_1|u_logic|Mdzvx4~0_combout  & \soc_inst|m0_1|u_logic|Ehcwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (\soc_inst|m0_1|u_logic|Mdzvx4~0_combout  & \soc_inst|m0_1|u_logic|Ehcwx4~0_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mdzvx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ehcwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .lut_mask = 64'h00000000FF00FFFC;
-defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .lut_mask = 64'h0033003300000033;
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rqzvx4~0 (
+// Location: LABCELL_X29_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fdzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yqzvx4~0_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yqzvx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fdzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bspvx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
 	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .lut_mask = 64'h000007070000070F;
-defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X48_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R293z4~feeder (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|R293z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R293z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R293z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R293z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|R293z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y5_N8
-dffeas \soc_inst|m0_1|u_logic|R293z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|R293z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R293z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R293z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R293z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .lut_mask = 64'h0000000000005F7F;
+defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y7_N2
-dffeas \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE (
+// Location: FF_X28_Y11_N8
+dffeas \soc_inst|m0_1|u_logic|Lpt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Lpt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X48_Y7_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mnvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|R293z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  
-// & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|R293z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|R293z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .lut_mask = 64'h0000000000320002;
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lpt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y6_N52
-dffeas \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE (
+// Location: FF_X29_Y10_N1
+dffeas \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~3 (
+// Location: MLABCELL_X28_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnvwx4~3_combout  = ( \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vmj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Vmj2z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Eruwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lpt2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lpt2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vmj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lpt2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eruwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .lut_mask = 64'h0000000020302000;
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .lut_mask = 64'h0400050004000000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y6_N31
-dffeas \soc_inst|m0_1|u_logic|C183z4~DUPLICATE (
+// Location: FF_X29_Y11_N56
+dffeas \soc_inst|m0_1|u_logic|Ll63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ll63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C183z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C183z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ll63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~2 (
+// Location: LABCELL_X29_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnvwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Tvt2z4~q  & ( \soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q 
-//  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tvt2z4~q  & ( !\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tvt2z4~q  & ( !\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Eruwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ll63z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Jlo2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll63z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jlo2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tvt2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jlo2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ll63z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eruwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .lut_mask = 64'h1100010010000000;
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .lut_mask = 64'h4044400000000000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~0 (
+// Location: LABCELL_X29_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnvwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|F9j2z4~q  & ( \soc_inst|m0_1|u_logic|Tr63z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|F9j2z4~q  & ( !\soc_inst|m0_1|u_logic|Tr63z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F9j2z4~q  & ( !\soc_inst|m0_1|u_logic|Tr63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Eruwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Ujo2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Uyu2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|F9j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tr63z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ujo2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uyu2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eruwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .lut_mask = 64'h3000100020000000;
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .lut_mask = 64'h000000000000B800;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4 (
+// Location: FF_X29_Y11_N26
+dffeas \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnvwx4~combout  = ( !\soc_inst|m0_1|u_logic|Mnvwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mnvwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Mnvwx4~3_combout  & !\soc_inst|m0_1|u_logic|Mnvwx4~2_combout )) ) )
+// \soc_inst|m0_1|u_logic|Eruwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fio2z4~q  & ( \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fio2z4~q  & ( !\soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+//  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fio2z4~q  & ( !\soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mnvwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mnvwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mnvwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mnvwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fio2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eruwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnvwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnvwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Mnvwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .lut_mask = 64'h0003000100020000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrdwx4~0 (
+// Location: LABCELL_X29_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Icxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mnvwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Icxwx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Mnvwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Eruwx4~combout  = ( !\soc_inst|m0_1|u_logic|Eruwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Eruwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Eruwx4~2_combout  & !\soc_inst|m0_1|u_logic|Eruwx4~0_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Eruwx4~2_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Eruwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Eruwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eruwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eruwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4 .lut_mask = 64'hCC00000000000000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrdwx4~1 (
+// Location: FF_X36_Y11_N50
+dffeas \soc_inst|m0_1|u_logic|Zkk2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zkk2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zkk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zkk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X30_Y10_N55
+dffeas \soc_inst|m0_1|u_logic|Aru2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aru2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aru2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aru2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kjk2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kjk2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kjk2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kjk2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kjk2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Kjk2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y11_N32
-dffeas \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE (
+// Location: FF_X27_Y8_N7
+dffeas \soc_inst|m0_1|u_logic|Kjk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kjk2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Kjk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kjk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kjk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jymwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jymwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Ieh3z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ieh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jymwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y11_N40
+dffeas \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .lut_mask = 64'hDDDD00DDD0D000D0;
-defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jymwx4~1 (
+// Location: LABCELL_X36_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jymwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jymwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gvdwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jymwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gvdwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|F8wwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kjk2z4~q  & ( \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Aru2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zkk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kjk2z4~q  & ( \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (((!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # (\soc_inst|m0_1|u_logic|Aru2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zkk2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kjk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Aru2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sjj2z4~q 
+// )) # (\soc_inst|m0_1|u_logic|Zkk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kjk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Aru2z4~q 
+// ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zkk2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jymwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zkk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aru2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kjk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F8wwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .lut_mask = 64'h00000000FF0CFF3F;
-defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .lut_mask = 64'h010D313DC1CDF1FD;
+defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y12_N1
-dffeas \soc_inst|m0_1|u_logic|N7c3z4 (
+// Location: FF_X29_Y8_N32
+dffeas \soc_inst|m0_1|u_logic|Vhk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vhk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N7c3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N7c3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vhk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vhk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cymwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Uic3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|N7c3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|Uic3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cymwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y8_N1
+dffeas \soc_inst|m0_1|u_logic|An73z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|An73z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .lut_mask = 64'h0303030303FF03FF;
-defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|An73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An73z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cymwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mka3z4~q  & \soc_inst|m0_1|u_logic|H6tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~0_combout ) ) )
+// Location: FF_X29_Y8_N56
+dffeas \soc_inst|m0_1|u_logic|Rht2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rht2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rht2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rht2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mka3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cymwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cymwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y8_N44
+dffeas \soc_inst|m0_1|u_logic|Rd63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rd63z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .lut_mask = 64'h000000000FAF0FAF;
-defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rd63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~2 (
+// Location: LABCELL_X29_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cymwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Cymwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (((!\soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|Qxa3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|interconnect_1|HRDATA[5]~28_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Qxa3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|F8wwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rd63z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Rht2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|An73z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rd63z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Rht2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|An73z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rd63z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Vhk2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rd63z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Vhk2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cymwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vhk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|An73z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rht2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rd63z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cymwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F8wwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .lut_mask = 64'hFA32FA3200000000;
-defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .lut_mask = 64'h2222777705AF05AF;
+defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~3 (
+// Location: LABCELL_X35_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cymwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Cymwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Zndwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Fkdwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|F8wwx4~combout  = ( \soc_inst|m0_1|u_logic|F8wwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|F8wwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|F8wwx4~1_combout  & 
+// ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|F8wwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|F8wwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cymwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F8wwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .lut_mask = 64'h00000000AEBFAEBF;
-defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4 .lut_mask = 64'h0F0C0F0C03000300;
+defparam \soc_inst|m0_1|u_logic|F8wwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qe0wx4~0 (
+// Location: LABCELL_X27_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Beowx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qe0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout )) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Beowx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Eruwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eruwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .lut_mask = 64'hF555F555F000F000;
-defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Beowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Beowx4~0 .lut_mask = 64'hF0FFF0FF000F000F;
+defparam \soc_inst|m0_1|u_logic|Beowx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qe0wx4 (
+// Location: LABCELL_X23_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zudwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qe0wx4~combout  = ( !\soc_inst|m0_1|u_logic|Qe0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qe0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zudwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Beowx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zudwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Beowx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Zudwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qe0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qe0wx4 .lut_mask = 64'h45450000CFCF0000;
-defparam \soc_inst|m0_1|u_logic|Qe0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Je0wx4~0 (
+// Location: LABCELL_X23_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A6ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Je0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
+// \soc_inst|m0_1|u_logic|A6ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|F7qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kepwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F7qwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Je0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .lut_mask = 64'hEDE8DE8EA8A88A8A;
-defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .lut_mask = 64'hF5A0F5A000000000;
+defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mc0wx4~1 (
+// Location: LABCELL_X19_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mc0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Je0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ce0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Je0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ce0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|F7qwx4~combout  & ( \soc_inst|m0_1|u_logic|A6ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Jkmwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|F7qwx4~combout  & ( \soc_inst|m0_1|u_logic|A6ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & \soc_inst|m0_1|u_logic|Jkmwx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|F7qwx4~combout  & ( !\soc_inst|m0_1|u_logic|A6ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & \soc_inst|m0_1|u_logic|Jkmwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F7qwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|A6ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jkmwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Je0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jkmwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|F7qwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mc0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .lut_mask = 64'h000088CC0000080C;
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .lut_mask = 64'h00FF00F000CC00C0;
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mc0wx4~0 (
+// Location: LABCELL_X22_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yjzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mc0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qe0wx4~combout  & ( \soc_inst|m0_1|u_logic|Mc0wx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Yjzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|V9iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout  & \soc_inst|m0_1|u_logic|Ojmwx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yjzvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|V9iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout  & \soc_inst|m0_1|u_logic|Ojmwx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & !\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .lut_mask = 64'h0000000000005F7F;
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y5_N40
-dffeas \soc_inst|m0_1|u_logic|Tch3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tch3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tch3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tch3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .lut_mask = 64'h50500050F0F000F0;
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iq82z4~0 (
+// Location: LABCELL_X35_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iq82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ebh3z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & !\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ebh3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iq82z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rjzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .lut_mask = 64'h0200000000000000;
-defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .lut_mask = 64'hF3C0FB6233003322;
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y4_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~1 (
+// Location: LABCELL_X36_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uhzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lo82z4~1_combout  = ( \soc_inst|m0_1|u_logic|Rz13z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|A933z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rz13z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|A933z4~q ) 
-// # (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (\soc_inst|m0_1|u_logic|Rjzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Djzvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (\soc_inst|m0_1|u_logic|Rjzvx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Djzvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( 
+// (\soc_inst|m0_1|u_logic|Rjzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Djzvx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A933z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rz13z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rjzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lo82z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uhzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .lut_mask = 64'h00000000C8000800;
-defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .lut_mask = 64'h0B000B0000000B00;
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~2 (
+// Location: LABCELL_X29_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uhzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lo82z4~2_combout  = ( !\soc_inst|m0_1|u_logic|A8h3z4~q  & ( \soc_inst|m0_1|u_logic|P9h3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|A8h3z4~q  & ( !\soc_inst|m0_1|u_logic|P9h3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A8h3z4~q  & ( !\soc_inst|m0_1|u_logic|P9h3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Uhzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & (((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|A8h3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|P9h3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uhzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lo82z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .lut_mask = 64'h00A0008000200000;
-defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .lut_mask = 64'h00000000030F070F;
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y8_N22
-dffeas \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE (
+// Location: FF_X29_Y8_N28
+dffeas \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~0 (
+// Location: FF_X29_Y10_N22
+dffeas \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lo82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sr53z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sr53z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sr53z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Feqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Pst2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Po63z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sr53z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pst2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Po63z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lo82z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Feqwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .lut_mask = 64'h0404000404000000;
-defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .lut_mask = 64'h555500FF33330F0F;
+defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~3 (
+// Location: FF_X29_Y10_N40
+dffeas \soc_inst|m0_1|u_logic|Y1v2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y1v2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1v2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y10_N55
+dffeas \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lo82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Lo82z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Lo82z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Iq82z4~0_combout  & (!\soc_inst|m0_1|u_logic|Lo82z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tch3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Feqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Nz83z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// ( \soc_inst|m0_1|u_logic|Y1v2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|V0k2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  
+// & ( \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tch3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Iq82z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lo82z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lo82z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lo82z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y1v2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|V0k2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nz83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lo82z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Feqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .lut_mask = 64'hC400000000000000;
-defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .lut_mask = 64'h0F0F3333555500FF;
+defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lf0wx4~0 (
+// Location: LABCELL_X33_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tzg3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tzg3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tzg3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Tzg3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Feqwx4~combout  = ( \soc_inst|m0_1|u_logic|Feqwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Feqwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Feqwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Feqwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lo82z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Feqwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Feqwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Feqwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .lut_mask = 64'hACAFACAFACAFACA0;
-defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4 .lut_mask = 64'h00CF00CF00C000C0;
+defparam \soc_inst|m0_1|u_logic|Feqwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~1 (
+// Location: LABCELL_X23_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zudwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~26  ))
-// \soc_inst|m0_1|u_logic|Add5~2  = CARRY(( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~26  ))
+// \soc_inst|m0_1|u_logic|Zudwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fexwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fexwx4~combout ) # (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~26 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~1_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~2 ),
+	.combout(\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~1 .lut_mask = 64'h0000FF5500003FC0;
-defparam \soc_inst|m0_1|u_logic|Add5~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .lut_mask = 64'hFFF0FFF000F000F0;
+defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~61 (
+// Location: LABCELL_X23_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nvdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~66  ))
-// \soc_inst|m0_1|u_logic|Add2~62  = CARRY(( !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~66  ))
+// \soc_inst|m0_1|u_logic|Nvdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zudwx4~0_combout  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~66 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~61_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~62 ),
+	.combout(\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~61 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~61 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~61 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .lut_mask = 64'h5555555500FF00FF;
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~105 (
+// Location: LABCELL_X24_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~105_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~62  ))
-// \soc_inst|m0_1|u_logic|Add2~106  = CARRY(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~62  ))
+// \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Beowx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Beowx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Nvdwx4~1_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~62 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~105_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~106 ),
+	.combout(\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~105 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~105 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~105 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .lut_mask = 64'h00550055AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~117 (
+// Location: LABCELL_X24_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7ewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~117_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~106  ))
-// \soc_inst|m0_1|u_logic|Add2~118  = CARRY(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~106  ))
+// \soc_inst|m0_1|u_logic|Q7ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Xuxwx4~combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xuxwx4~combout  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~106 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~117_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~118 ),
+	.combout(\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~117 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~117 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add2~117 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .lut_mask = 64'h00A000A0FFF5FFF5;
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdhvx4~0 (
+// Location: LABCELL_X23_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kvtwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zdhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~117_sumout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Kaf3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~117_sumout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kaf3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Kvtwx4~combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add2~117_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zdhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .lut_mask = 64'hDDDDD1D100000000;
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kvtwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kvtwx4 .lut_mask = 64'h1133113322002200;
+defparam \soc_inst|m0_1|u_logic|Kvtwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4~0 (
+// Location: LABCELL_X23_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iutwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oa3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|G9lwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Walwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|G9lwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Iutwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kvtwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .lut_mask = 64'hFF44FF4444444444;
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .lut_mask = 64'hF3C0F3C000000000;
+defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4~1 (
+// Location: LABCELL_X23_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oa3wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Oa3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Palwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|U9lwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Xmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qmdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qmdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Xmdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oa3wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .lut_mask = 64'hF5C4F5C400000000;
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4 (
+// Location: LABCELL_X23_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oa3wx4~combout  = ( \soc_inst|m0_1|u_logic|Oa3wx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|J7ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// (((\soc_inst|m0_1|u_logic|Kepwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout  & (\soc_inst|m0_1|u_logic|Kepwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Xuxwx4~combout  & (\soc_inst|m0_1|u_logic|Kepwx4~1_combout )))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
-	.dataf(gnd),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oa3wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oa3wx4 .lut_mask = 64'h0000777F0000777F;
-defparam \soc_inst|m0_1|u_logic|Oa3wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .lut_mask = 64'h0F3F1F2F0F0C0E0D;
+defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdhvx4~1 (
+// Location: LABCELL_X23_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gftwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zdhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Oa3wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Add5~125_sumout  & \soc_inst|m0_1|u_logic|Zdhvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Oa3wx4~combout  & ( \soc_inst|m0_1|u_logic|Zdhvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( !\soc_inst|m0_1|u_logic|Oa3wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Add5~125_sumout  & (\soc_inst|m0_1|u_logic|Zdhvx4~0_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( !\soc_inst|m0_1|u_logic|Oa3wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Zdhvx4~0_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Gftwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Gftwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Gftwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zdhvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oa3wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .lut_mask = 64'h0F000C000F0F0C0C;
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y13_N37
-dffeas \soc_inst|m0_1|u_logic|Kaf3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kaf3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kaf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kaf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duhvx4~0 (
+// Location: MLABCELL_X28_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zetwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xyk2z4~q  & ( (\soc_inst|m0_1|u_logic|S5pvx4~combout  & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & \soc_inst|m0_1|u_logic|Add2~113_sumout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xyk2z4~q  & 
-// ( ((\soc_inst|m0_1|u_logic|S5pvx4~combout  & \soc_inst|m0_1|u_logic|Add2~113_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Zetwx4~combout  = ( \soc_inst|m0_1|u_logic|A7ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~113_sumout ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zetwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .lut_mask = 64'h3737373704040404;
-defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zetwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zetwx4 .lut_mask = 64'h000F000F0F000F00;
+defparam \soc_inst|m0_1|u_logic|Zetwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duhvx4~1 (
+// Location: LABCELL_X23_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdtwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( \soc_inst|m0_1|u_logic|O3pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( \soc_inst|m0_1|u_logic|O3pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( !\soc_inst|m0_1|u_logic|O3pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & 
-// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( !\soc_inst|m0_1|u_logic|O3pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & 
-// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Qdtwx4~combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Zetwx4~combout  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zetwx4~combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Duhvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zetwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .lut_mask = 64'hC0008000CC008800;
-defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y12_N26
-dffeas \soc_inst|m0_1|u_logic|Xyk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Duhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xyk2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xyk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xyk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qdtwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdtwx4 .lut_mask = 64'h0C0F0C0F03000300;
+defparam \soc_inst|m0_1|u_logic|Qdtwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~109 (
+// Location: LABCELL_X23_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~114  ))
-// \soc_inst|m0_1|u_logic|Add3~110  = CARRY(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~114  ))
+// \soc_inst|m0_1|u_logic|M5ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qdtwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gftwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~114 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~109_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~110 ),
+	.combout(\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~109 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~109 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~109 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .lut_mask = 64'hF5A0F5A000000000;
+defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1pvx4 (
+// Location: LABCELL_X23_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mouwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y1pvx4~combout  = ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Add3~109_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Add3~109_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( 
-// !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Add3~109_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mouwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zetwx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zetwx4~combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add3~109_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zetwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1pvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y1pvx4 .lut_mask = 64'hE0EEE0EEE0EE0000;
-defparam \soc_inst|m0_1|u_logic|Y1pvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .lut_mask = 64'h0050005055055505;
+defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vjnvx4~0 (
+// Location: LABCELL_X23_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5ewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vjnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Xyk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q 
-//  ) )
+// \soc_inst|m0_1|u_logic|F5ewx4~combout  = ( \soc_inst|m0_1|u_logic|Gftwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & !\soc_inst|m0_1|u_logic|Mouwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Gftwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mouwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vjnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F5ewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .lut_mask = 64'hF0F0F0F055005500;
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F5ewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5ewx4 .lut_mask = 64'hAF00AF00A000A000;
+defparam \soc_inst|m0_1|u_logic|F5ewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vjnvx4~1 (
+// Location: LABCELL_X24_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vjnvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vjnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Z7i2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Y1pvx4~combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z7i2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|W3ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|F5ewx4~combout  & ( (!\soc_inst|m0_1|u_logic|A6ewx4~0_combout  & (\soc_inst|m0_1|u_logic|X7ewx4~0_combout  & (\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|M5ewx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vjnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F5ewx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W3ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .lut_mask = 64'h8ACF8ACF00000000;
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y5_N5
-dffeas \soc_inst|m0_1|u_logic|Q7j2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q7j2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q7j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q7j2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y4_N14
-dffeas \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .lut_mask = 64'h0200020000000000;
+defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y4_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~1 (
+// Location: LABCELL_X24_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3ewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Py72z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Uo13z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|W3ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|W3ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & (!\soc_inst|m0_1|u_logic|Iutwx4~0_combout  & \soc_inst|m0_1|u_logic|J7ewx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uo13z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W3ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Py72z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W3ewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Py72z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Py72z4~1 .lut_mask = 64'h00000000A0880000;
-defparam \soc_inst|m0_1|u_logic|Py72z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y4_N20
-dffeas \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~2 (
+// Location: LABCELL_X27_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Py72z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Csz2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|E1ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Nrvwx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Csz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Py72z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Py72z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Py72z4~2 .lut_mask = 64'h008800C000000000;
-defparam \soc_inst|m0_1|u_logic|Py72z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .lut_mask = 64'h0000F0F0FFFFF0F0;
+defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~0 (
+// Location: LABCELL_X27_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mydwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Py72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|M743z4~q  & ( \soc_inst|m0_1|u_logic|Vg53z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|M743z4~q  & ( !\soc_inst|m0_1|u_logic|Vg53z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M743z4~q  & ( !\soc_inst|m0_1|u_logic|Vg53z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mydwx4~1_combout  = ( \soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mydwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Mydwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|M743z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vg53z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Py72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Py72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Py72z4~0 .lut_mask = 64'h0202000202000000;
-defparam \soc_inst|m0_1|u_logic|Py72z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y4_N32
-dffeas \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .lut_mask = 64'h00330033FF33FF33;
+defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y4_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M082z4~0 (
+// Location: MLABCELL_X25_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M082z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wwdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yxdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|S08wx4~0_combout  & (\soc_inst|m0_1|u_logic|Mydwx4~1_combout  & \soc_inst|m0_1|u_logic|Tq7wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M082z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M082z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M082z4~0 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|M082z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~3 (
+// Location: MLABCELL_X25_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Py72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Py72z4~0_combout  & ( !\soc_inst|m0_1|u_logic|M082z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Py72z4~1_combout  & (!\soc_inst|m0_1|u_logic|Py72z4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xhl2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & !\soc_inst|m0_1|u_logic|Manwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Py72z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xhl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Py72z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Py72z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|M082z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Py72z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Py72z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Py72z4~3 .lut_mask = 64'hA020000000000000;
-defparam \soc_inst|m0_1|u_logic|Py72z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .lut_mask = 64'hCF00CF00C000C000;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nozvx4~0 (
+// Location: LABCELL_X22_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jtdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nozvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Q7j2z4~q  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Q7j2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Py72z4~3_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Q7j2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Lgi3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Q7j2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Lgi3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Jtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jtdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|X0ewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jtdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|X0ewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Py72z4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .lut_mask = 64'h33553355330F3300;
-defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Locvx4 (
+// Location: LABCELL_X23_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Locvx4~combout  = ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) ) # ( 
-// \soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Kqdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eudwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jtdwx4~1_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Locvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Locvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Locvx4 .lut_mask = 64'h0000FFFFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Locvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmzvx4~0 (
+// Location: LABCELL_X24_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xmzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wwdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Kqdwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|E1ewx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xmzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .lut_mask = 64'hAA88FFCC00000000;
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .lut_mask = 64'h0000000004040404;
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmzvx4~1 (
+// Location: MLABCELL_X25_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xmzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xmzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uozvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add5~57_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Djdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Sndwx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xmzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .lut_mask = 64'h00000D0000000000;
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y6_N1
-dffeas \soc_inst|m0_1|u_logic|N3v2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N3v2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N3v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4~0 (
+// Location: MLABCELL_X25_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U7uwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C193z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pbl2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|N3v2z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Edl2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Wwdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Djdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Vzdwx4~1_combout  & \soc_inst|m0_1|u_logic|C0ewx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N3v2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pbl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C193z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Edl2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U7uwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .lut_mask = 64'h00FF555533330F0F;
-defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N4
-dffeas \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z78wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wwdwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wwdwx4~0_combout  & \soc_inst|m0_1|u_logic|Z78wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wwdwx4~2_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Z78wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Z78wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .lut_mask = 64'h0F0A0F0A0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y4_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4~1 (
+// Location: MLABCELL_X21_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U7uwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Eq63z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nz73z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Eq63z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nz73z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Eut2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Eut2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eq63z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Eut2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nz73z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U7uwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .lut_mask = 64'h0303CFCF44774477;
-defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .lut_mask = 64'hC0C4C0C480808080;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4 (
+// Location: MLABCELL_X25_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U7uwx4~combout  = ( \soc_inst|m0_1|u_logic|U7uwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U7uwx4~0_combout  & \soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U7uwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U7uwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Kqdwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Zudwx4~1_combout  & (\soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Gvdwx4~0_combout )) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U7uwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|U7uwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U7uwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U7uwx4 .lut_mask = 64'h00000000FFF000F0;
-defparam \soc_inst|m0_1|u_logic|U7uwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .lut_mask = 64'h0000000000050000;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvdwx4~0 (
+// Location: LABCELL_X24_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Kqdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & (\soc_inst|m0_1|u_logic|U18wx4~0_combout  & \soc_inst|m0_1|u_logic|Asdwx4~1_combout )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .lut_mask = 64'hF0F0F0F0FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .lut_mask = 64'h0000000001010101;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvdwx4~0 (
+// Location: MLABCELL_X21_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dqdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yvtwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yvtwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Dqdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & !\soc_inst|m0_1|u_logic|Manwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dqdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .lut_mask = 64'hE040E040C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5ewx4~0 (
+// Location: LABCELL_X24_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M5ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gftwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qdtwx4~combout  & !\soc_inst|m0_1|u_logic|Gvdwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gftwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qdtwx4~combout  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Kqdwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qtdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Kqdwx4~0_combout  & \soc_inst|m0_1|u_logic|Xtdwx4~1_combout )) ) )
 
 	.dataa(gnd),
 	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .lut_mask = 64'hF0C0F0C030003000;
-defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgfwx4~0 (
+// Location: MLABCELL_X25_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pgfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5ewx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & \soc_inst|m0_1|u_logic|Qdtwx4~combout )) # (\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M5ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & \soc_inst|m0_1|u_logic|Qdtwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Kqdwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kqdwx4~1_combout  & \soc_inst|m0_1|u_logic|Dqdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqdwx4~3_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Dqdwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dqdwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kqdwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pgfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .lut_mask = 64'h0033003355775577;
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .lut_mask = 64'h00FA00FA00F000F0;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgfwx4~1 (
+// Location: LABCELL_X24_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pgfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~18_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Djdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fkdwx4~1_combout  & (\soc_inst|m0_1|u_logic|B28wx4~0_combout  & \soc_inst|m0_1|u_logic|Tkdwx4~1_combout )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .lut_mask = 64'hF0C0F0C000000000;
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppzvx4~0 (
+// Location: LABCELL_X24_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Djdwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Jmdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Qmdwx4~1_combout  & (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djdwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .lut_mask = 64'h00F000F0AAFAAAFA;
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppzvx4~1 (
+// Location: MLABCELL_X21_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Widwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ppzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ppzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Widwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Widwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .lut_mask = 64'h0A0FAAFF00000000;
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Widwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Widwx4~0 .lut_mask = 64'hC0C4C0C4C080C080;
+defparam \soc_inst|m0_1|u_logic|Widwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~2 (
+// Location: MLABCELL_X25_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & (\soc_inst|m0_1|u_logic|H4nwx4~combout  & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Djdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Djdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Godwx4~1_combout  & \soc_inst|m0_1|u_logic|Nodwx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oihvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djdwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .lut_mask = 64'h0F0F0F0F0A000A00;
-defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~1 (
+// Location: MLABCELL_X25_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add2~77_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Zpx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~77_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Zpx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Djdwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Djdwx4~1_combout  & \soc_inst|m0_1|u_logic|Widwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Djdwx4~2_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Widwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Djdwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Djdwx4~3_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~77_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Djdwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Djdwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Widwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Djdwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oihvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .lut_mask = 64'hBBBBBB11B0B0B010;
-defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .lut_mask = 64'h00FA00FA00AA00AA;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~0 (
+// Location: MLABCELL_X25_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oihvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Oihvx4~2_combout ) # 
-// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Ppzvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Oihvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oihvx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Z78wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Z78wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z78wx4~4_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oihvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Oihvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z78wx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z78wx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Z78wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .lut_mask = 64'h0000CC000000CD00;
-defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y12_N1
-dffeas \soc_inst|m0_1|u_logic|Zpx2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zpx2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zpx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .lut_mask = 64'hCF00CF0000000000;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~73 (
+// Location: MLABCELL_X25_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zpx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~110  ))
-// \soc_inst|m0_1|u_logic|Add3~74  = CARRY(( !\soc_inst|m0_1|u_logic|Zpx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~110  ))
+// \soc_inst|m0_1|u_logic|Z78wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Z78wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Z78wx4~1_combout  & ((\soc_inst|m0_1|u_logic|W3ewx4~1_combout ) # (\soc_inst|m0_1|u_logic|Manwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W3ewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z78wx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Z78wx4~5_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~110 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~73_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~74 ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~73 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~73 .lut_mask = 64'h0000FFFF0000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add3~73 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .lut_mask = 64'h000000005F005F00;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rnovx4 (
+// Location: LABCELL_X31_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rnovx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~73_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~73_sumout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~73_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add3~73_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|Do8wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~29_sumout  & (!\soc_inst|m0_1|u_logic|Add5~33_sumout  & 
+// !\soc_inst|m0_1|u_logic|Add5~37_sumout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add3~73_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do8wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rnovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rnovx4 .lut_mask = 64'hFFF03330AAA02220;
-defparam \soc_inst|m0_1|u_logic|Rnovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .lut_mask = 64'h8080000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y4_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C1lvx4~0 (
+// Location: LABCELL_X31_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C1lvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lgi3z4~q  & ( \soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q )) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Lgi3z4~q  & ( \soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Lgi3z4~q  & ( !\soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q 
-// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lgi3z4~q  & ( !\soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Zpx2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Do8wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~13_sumout  & (!\soc_inst|m0_1|u_logic|Add5~17_sumout  & 
+// \soc_inst|m0_1|u_logic|Do8wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Do8wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C1lvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do8wx4~1_combout ),
 	.sumout(),
 	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .lut_mask = 64'h2300EF002323EFEF;
-defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y4_N16
-dffeas \soc_inst|m0_1|u_logic|Lgi3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|C1lvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lgi3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lgi3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lgi3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X39_Y6_N11
-dffeas \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .lut_mask = 64'h00C0000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ow23z4~feeder (
+// Location: LABCELL_X31_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ow23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Uhzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Do8wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~65_sumout  & !\soc_inst|m0_1|u_logic|Add5~61_sumout ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ow23z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do8wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow23z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ow23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ow23z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y4_N50
-dffeas \soc_inst|m0_1|u_logic|Ow23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ow23z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fn13z4~feeder (
+// Location: LABCELL_X31_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fn13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Uhzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Do8wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (\soc_inst|m0_1|u_logic|Do8wx4~2_combout  & !\soc_inst|m0_1|u_logic|Add5~49_sumout ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Do8wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do8wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fn13z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fn13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Fn13z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y4_N56
-dffeas \soc_inst|m0_1|u_logic|Fn13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fn13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fn13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fn13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .lut_mask = 64'h0F00000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~1 (
+// Location: LABCELL_X31_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ds72z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fn13z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Ow23z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Do8wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( \soc_inst|m0_1|u_logic|Do8wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~1_sumout  & (!\soc_inst|m0_1|u_logic|Add5~9_sumout  & 
+// \soc_inst|m0_1|u_logic|Do8wx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ow23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fn13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Do8wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Do8wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ds72z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do8wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .lut_mask = 64'h0C0A000000000000;
-defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y6_N38
-dffeas \soc_inst|m0_1|u_logic|X543z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X543z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X543z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X543z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .lut_mask = 64'h0000000000A00000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~0 (
+// Location: LABCELL_X31_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ds72z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gf53z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|X543z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~81_sumout  & !\soc_inst|m0_1|u_logic|Add5~85_sumout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X543z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gf53z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ds72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .lut_mask = 64'h00000A0000000C00;
-defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y4_N26
-dffeas \soc_inst|m0_1|u_logic|Hn03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hn03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hn03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hn03z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X40_Y4_N14
-dffeas \soc_inst|m0_1|u_logic|Nqz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nqz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nqz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nqz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N88wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~0 .lut_mask = 64'hAA00AA0000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y4_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~2 (
+// Location: LABCELL_X33_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6cwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ds72z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Hn03z4~q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Nqz2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|D6cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T7cwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T7cwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hn03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nqz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ds72z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D6cwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .lut_mask = 64'h000088C000000000;
-defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y7_N5
-dffeas \soc_inst|m0_1|u_logic|O5k2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O5k2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O5k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .lut_mask = 64'hFAFAC480F5F5C840;
+defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Au72z4~0 (
+// Location: LABCELL_X33_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Va3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Au72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5k2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Va3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (\soc_inst|m0_1|u_logic|D6cwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|D6cwx4~0_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (\soc_inst|m0_1|u_logic|D6cwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (\soc_inst|m0_1|u_logic|D6cwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5k2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D6cwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Au72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Au72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Au72z4~0 .lut_mask = 64'h0000000040000000;
-defparam \soc_inst|m0_1|u_logic|Au72z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .lut_mask = 64'h0C000F0004000500;
+defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~3 (
+// Location: MLABCELL_X25_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O2bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ds72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ds72z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Au72z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ds72z4~1_combout  & (!\soc_inst|m0_1|u_logic|Ds72z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|O2bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ds72z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ds72z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ds72z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Au72z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ds72z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O2bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .lut_mask = 64'hB000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .lut_mask = 64'hFCE2F3B8FC00F300;
+defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hlzvx4~0 (
+// Location: LABCELL_X37_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Lgi3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Ds72z4~3_combout  & !\soc_inst|m0_1|u_logic|Feqwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Lgi3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Ds72z4~3_combout  & !\soc_inst|m0_1|u_logic|Feqwx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|S8k2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Lgi3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lgi3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|I30wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O2bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q ) # (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ds72z4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O2bwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .lut_mask = 64'h50505F5F53505350;
-defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~0 .lut_mask = 64'h00000000FFCCFFCC;
+defparam \soc_inst|m0_1|u_logic|I30wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y3_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjzvx4~1 (
+// Location: MLABCELL_X34_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~15 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & !\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~15_combout  = ( \soc_inst|m0_1|u_logic|Yqzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C3qvx4~0_combout  & (\soc_inst|m0_1|u_logic|Va3wx4~0_combout  & \soc_inst|m0_1|u_logic|I30wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rjzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~15_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .lut_mask = 64'hCFC0EF4A0F000F0A;
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~15 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~15 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|N88wx4~15 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uhzvx4~1 (
+// Location: LABCELL_X30_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zbbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Djzvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Rjzvx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Djzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Zbbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Yih2z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Yih2z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Yih2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Yih2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rjzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uhzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zbbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .lut_mask = 64'h00C000F000400050;
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .lut_mask = 64'hAACA0000CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uhzvx4~0 (
+// Location: MLABCELL_X34_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cfzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uhzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & (((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Cfzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|Zbbwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( 
+// \soc_inst|m0_1|u_logic|Zbbwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uhzvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zbbwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .lut_mask = 64'h0000005F0000007F;
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .lut_mask = 64'h00FF00FF000F000F;
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y6_N44
-dffeas \soc_inst|m0_1|u_logic|Gf53z4 (
+// Location: FF_X29_Y19_N19
+dffeas \soc_inst|m0_1|u_logic|Thm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Thm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Thm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Thm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~3 (
+// Location: MLABCELL_X39_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gf53z4~q ) # ((!\soc_inst|m0_1|u_logic|Ow23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ow23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|G5qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Thm2z4~q  & (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Thm2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|R1w2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Gf53z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ow23z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .lut_mask = 64'h00F000F0CCFCCCFC;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y4_N55
-dffeas \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .lut_mask = 64'h000011F000001100;
+defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~0 (
+// Location: LABCELL_X33_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ya1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Z3k2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Z3k2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Ya1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Z3k2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ya1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .lut_mask = 64'h0000F0F0CCCCFCFC;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .lut_mask = 64'h0F0F555555550F0F;
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~2 (
+// Location: MLABCELL_X34_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ya1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( \soc_inst|m0_1|u_logic|V0k2z4~q  & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|X543z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( \soc_inst|m0_1|u_logic|V0k2z4~q  & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|X543z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|V0k2z4~q  ) ) 
-// # ( !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|V0k2z4~q  & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|X543z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ya1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ya1wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ya1wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|X543z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|V0k2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ya1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .lut_mask = 64'h5500FFFF55005500;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .lut_mask = 64'h0000F2220000FFFF;
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y6_N44
-dffeas \soc_inst|m0_1|u_logic|Yx73z4 (
+// Location: FF_X34_Y13_N8
+dffeas \soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yx73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yx73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yx73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~6 (
+// Location: LABCELL_X30_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Pst2z4~q  & ( \soc_inst|m0_1|u_logic|Y1v2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pst2z4~q  & ( !\soc_inst|m0_1|u_logic|Y1v2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pst2z4~q  & ( !\soc_inst|m0_1|u_logic|Y1v2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|L9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rmawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rmawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pst2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y1v2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L9zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .lut_mask = 64'h0300010002000000;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .lut_mask = 64'hF000FAAAF000FAAA;
+defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y6_N17
-dffeas \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X40_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L9zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rmawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Igi2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Rmawx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|L9zvx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .lut_mask = 64'hFFFF0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N1
-dffeas \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L9zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|L9zvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .lut_mask = 64'hF000F000B080B080;
+defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~5 (
+// Location: MLABCELL_X34_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|L9zvx4~combout  = ( \soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|L9zvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & (((\soc_inst|m0_1|u_logic|L9zvx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & \soc_inst|m0_1|u_logic|L9zvx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|L9zvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & ((\soc_inst|m0_1|u_logic|L9zvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & \soc_inst|m0_1|u_logic|L9zvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L9zvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L9zvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L9zvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L9zvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .lut_mask = 64'h0021002000010000;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4 .lut_mask = 64'h0033C0F300334073;
+defparam \soc_inst|m0_1|u_logic|L9zvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~7 (
+// Location: LABCELL_X30_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Djzvx4~5_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5k2z4~q  & (!\soc_inst|m0_1|u_logic|Djzvx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yx73z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~5_combout  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Djzvx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yx73z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Luzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yx73z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5k2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Djzvx4~6_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Djzvx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .lut_mask = 64'hBB0000000B000000;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .lut_mask = 64'h05F505F5505F505F;
+defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~1 (
+// Location: LABCELL_X30_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K2k2z4~q ) # (!\soc_inst|m0_1|u_logic|S8k2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S8k2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|K2k2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Luzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Luzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Euzvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Luzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Euzvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Luzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Luzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|K2k2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Luzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .lut_mask = 64'h0000CCCCFF00FFCC;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y4_N13
-dffeas \soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X40_Y4_N25
-dffeas \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X39_Y6_N10
-dffeas \soc_inst|m0_1|u_logic|D7k2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D7k2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D7k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .lut_mask = 64'h3032002233333333;
+defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~4 (
+// Location: MLABCELL_X34_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|D7k2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D7k2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~13_combout  = ( !\soc_inst|m0_1|u_logic|Xk1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|J61wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uozvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|L9zvx4~combout  & !\soc_inst|m0_1|u_logic|Luzvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D7k2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L9zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~13_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .lut_mask = 64'hF5F500F531310031;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~13 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4 (
+// Location: MLABCELL_X25_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~combout  = ( !\soc_inst|m0_1|u_logic|Djzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Djzvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Djzvx4~3_combout  & (!\soc_inst|m0_1|u_logic|Djzvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Djzvx4~2_combout  & \soc_inst|m0_1|u_logic|Djzvx4~7_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Z4bwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( 
+// \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z4bwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Djzvx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Djzvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Djzvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Djzvx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Djzvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~4_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4 .lut_mask = 64'h0000000000800000;
-defparam \soc_inst|m0_1|u_logic|Djzvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .lut_mask = 64'hFF00FF000F00FF00;
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3awx4~0 (
+// Location: MLABCELL_X34_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qobwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Djzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qobwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Q77wx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3awx4~0 .lut_mask = 64'hEEEEEEEEFF55FF55;
-defparam \soc_inst|m0_1|u_logic|H3awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~89 (
+// Location: MLABCELL_X25_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~89_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Hrcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~6  ))
-// \soc_inst|m0_1|u_logic|Add5~90  = CARRY(( (!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Hrcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~6  ))
+// \soc_inst|m0_1|u_logic|Hnbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hrcvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~6 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~89_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~90 ),
+	.combout(\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~89 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~89 .lut_mask = 64'h000000FF0000FF4A;
-defparam \soc_inst|m0_1|u_logic|Add5~89 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .lut_mask = 64'hFF3333330F030303;
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zbbwx4~0 (
+// Location: MLABCELL_X25_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnbwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zbbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yih2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|Fuawx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hnbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Z4bwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hnbwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hnbwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Z4bwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hnbwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hnbwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Z4bwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zbbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .lut_mask = 64'h8888FF00C808FFF0;
-defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .lut_mask = 64'hFFFFFFFF3030FF30;
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cfzvx4~0 (
+// Location: MLABCELL_X25_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R29wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cfzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Zbbwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~89_sumout  & 
-// \soc_inst|m0_1|u_logic|Zbbwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|R29wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qobwx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zbbwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .lut_mask = 64'h00F000F000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R29wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R29wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|R29wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cfzvx4~1 (
+// Location: MLABCELL_X28_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U09wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cfzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdbwx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|U09wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( \soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & \soc_inst|m0_1|u_logic|Y29wx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( \soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  & \soc_inst|m0_1|u_logic|Y29wx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .lut_mask = 64'h0000080A00000000;
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U09wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U09wx4~0 .lut_mask = 64'hFF3BFF0A3B3B0A0A;
+defparam \soc_inst|m0_1|u_logic|U09wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y6_N20
-dffeas \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE (
+// Location: FF_X27_Y13_N35
+dffeas \soc_inst|m0_1|u_logic|L753z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|L753z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|T31xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Art2z4~q ) # ((\soc_inst|m0_1|u_logic|R91xx4~0_combout  & !\soc_inst|m0_1|u_logic|J0v2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|T31xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R91xx4~0_combout  & !\soc_inst|m0_1|u_logic|J0v2z4~q ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J0v2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Art2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .lut_mask = 64'h50505050FF50FF50;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L753z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L753z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N13
-dffeas \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE (
+// Location: FF_X25_Y14_N49
+dffeas \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N14
-dffeas \soc_inst|m0_1|u_logic|Hmh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hmh3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X27_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Punvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|L753z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L753z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Punvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hmh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Punvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~0 .lut_mask = 64'h1100101000000000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y7_N43
-dffeas \soc_inst|m0_1|u_logic|An63z4 (
+// Location: FF_X27_Y10_N14
+dffeas \soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|An63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|An63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|An63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y6_N14
-dffeas \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE (
+// Location: FF_X27_Y13_N10
+dffeas \soc_inst|m0_1|u_logic|To23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|To23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~7 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~7_combout  = ( !\soc_inst|m0_1|u_logic|An63z4~q  & ( \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|An63z4~q  & ( !\soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|An63z4~q  & ( !\soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  $ 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|An63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .lut_mask = 64'h0009000100080000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|To23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|To23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~8 (
+// Location: LABCELL_X27_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Pdbwx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (\soc_inst|m0_1|u_logic|Hmh3z4~q  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Punvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|To23z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|To23z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hmh3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|To23z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Punvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .lut_mask = 64'h8ACF8ACF00000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~1 .lut_mask = 64'h4050000040000000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y4_N1
-dffeas \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE (
+// Location: FF_X25_Y14_N32
+dffeas \soc_inst|m0_1|u_logic|Wlz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Wlz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wlz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wlz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N59
-dffeas \soc_inst|m0_1|u_logic|Rd53z4 (
+// Location: FF_X25_Y14_N44
+dffeas \soc_inst|m0_1|u_logic|Qi03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rd53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qi03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rd53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rd53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qi03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qi03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~3 (
+// Location: MLABCELL_X25_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rd53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rd53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rd53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Punvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Qi03z4~q ))) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wlz2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rd53z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wlz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qi03z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Punvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .lut_mask = 64'h0500010004000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~2 .lut_mask = 64'h00000000A0880000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N26
-dffeas \soc_inst|m0_1|u_logic|I443z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I443z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I443z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I443z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X27_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Punvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Duuwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Punvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Duuwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Duuwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Duuwx4~2_combout  & !\soc_inst|m0_1|u_logic|Punvx4~1_combout ))) ) ) )
 
-// Location: FF_X48_Y7_N25
-dffeas \soc_inst|m0_1|u_logic|Gfq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gfq2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Punvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Punvx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Punvx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gfq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gfq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Punvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~3 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~2 (
+// Location: MLABCELL_X39_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X5gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|I443z4~q  & ( \soc_inst|m0_1|u_logic|Gfq2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I443z4~q  & ( !\soc_inst|m0_1|u_logic|Gfq2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I443z4~q  & ( !\soc_inst|m0_1|u_logic|Gfq2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|X5gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|I443z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gfq2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .lut_mask = 64'h0044000400400000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~4 (
+// Location: LABCELL_X40_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~4_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Vgq2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Vgq2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) 
-// ) )
+// \soc_inst|m0_1|u_logic|D4mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q ) # ((\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  
+// & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vgq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D4mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .lut_mask = 64'h8800400000004000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .lut_mask = 64'h0F000F00CFCC0F00;
+defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y4_N14
-dffeas \soc_inst|m0_1|u_logic|Ql13z4 (
+// Location: FF_X39_Y13_N58
+dffeas \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ql13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ql13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y4_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~1 (
+// Location: MLABCELL_X39_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Kiq2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ql13z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|D4mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R1w2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|R1w2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kiq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ql13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D4mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .lut_mask = 64'h0C000000A0000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .lut_mask = 64'hCCCCFCFC0000F0F0;
+defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N26
-dffeas \soc_inst|m0_1|u_logic|Skh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Skh3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X39_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D4mvx4~2_combout  = ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D4mvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D4mvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Z7i2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D4mvx4~1_combout  ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D4mvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D4mvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Skh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .lut_mask = 64'hFFFFF03000000000;
+defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N43
-dffeas \soc_inst|m0_1|u_logic|Djh3z4 (
+// Location: FF_X39_Y13_N59
+dffeas \soc_inst|m0_1|u_logic|Iwp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Djh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Iwp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Djh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Iwp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Iwp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~5 (
+// Location: LABCELL_X27_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Skh3z4~q  & ( \soc_inst|m0_1|u_logic|Djh3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Skh3z4~q  & ( !\soc_inst|m0_1|u_logic|Djh3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Skh3z4~q  & ( !\soc_inst|m0_1|u_logic|Djh3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Punvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Punvx4~3_combout ) # (\soc_inst|m0_1|u_logic|Punvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Skh3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Djh3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Punvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Punvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Iwp2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .lut_mask = 64'h5000100040000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~4 .lut_mask = 64'hFF00AAAAFF00F3F3;
+defparam \soc_inst|m0_1|u_logic|Punvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~6 (
+// Location: LABCELL_X27_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1bvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Pdbwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pdbwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdbwx4~4_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|E1bvx4~combout  = ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & !\soc_inst|m0_1|u_logic|R29wx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ ((((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & !\soc_inst|m0_1|u_logic|R29wx4~0_combout )) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdbwx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pdbwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E1bvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .lut_mask = 64'hA000000000000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E1bvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E1bvx4 .lut_mask = 64'h2DA52DA53CF03CF0;
+defparam \soc_inst|m0_1|u_logic|E1bvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4 (
+// Location: MLABCELL_X34_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qynvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~combout  = ( \soc_inst|m0_1|u_logic|Pdbwx4~8_combout  & ( \soc_inst|m0_1|u_logic|Pdbwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qynvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Zei2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Zei2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Zei2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Zei2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdbwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pdbwx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qynvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4 .lut_mask = 64'h000000000000D0D0;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .lut_mask = 64'h0300031103000300;
+defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yih2z4~0 (
+// Location: MLABCELL_X34_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qynvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qynvx4~1_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Qynvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qynvx4~0_combout  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qynvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qynvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .lut_mask = 64'hFFF0FFF0AFAFAFAF;
-defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .lut_mask = 64'h0033003300370037;
+defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~85 (
+// Location: MLABCELL_X34_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zznvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Sscvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~90  ))
-// \soc_inst|m0_1|u_logic|Add5~86  = CARRY(( !\soc_inst|m0_1|u_logic|Sscvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~90  ))
+// \soc_inst|m0_1|u_logic|Zznvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q 
+// ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sscvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~90 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~85_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~86 ),
+	.combout(\soc_inst|m0_1|u_logic|Zznvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~85 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~85 .lut_mask = 64'h000000B50000FF00;
-defparam \soc_inst|m0_1|u_logic|Add5~85 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .lut_mask = 64'h0000000000040004;
+defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mdzvx4~1 (
+// Location: MLABCELL_X34_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (\soc_inst|m0_1|u_logic|Ehcwx4~0_combout  & \soc_inst|m0_1|u_logic|Mdzvx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (\soc_inst|m0_1|u_logic|Ehcwx4~0_combout  & \soc_inst|m0_1|u_logic|Mdzvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Vxnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ehcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mdzvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vxnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .lut_mask = 64'h000F000F00030003;
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .lut_mask = 64'hF300F30000000000;
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fdzvx4~0 (
+// Location: MLABCELL_X34_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fdzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Bspvx4~1_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Bspvx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vxnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vxnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qynvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Zznvx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qynvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zznvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vxnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .lut_mask = 64'h000000000707070F;
-defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .lut_mask = 64'h00000000A8A0A8A0;
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jlo2z4~feeder (
+// Location: LABCELL_X31_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~134 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jlo2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fdzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Add5~134_cout  = CARRY(( !\soc_inst|m0_1|u_logic|Vxnvx4~1_combout  ) + ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  ) + ( !VCC ))
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jlo2z4~feeder_combout ),
+	.combout(),
 	.sumout(),
-	.cout(),
+	.cout(\soc_inst|m0_1|u_logic|Add5~134_cout ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jlo2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jlo2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Jlo2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~134 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~134 .lut_mask = 64'h000000FF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add5~134 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y4_N41
-dffeas \soc_inst|m0_1|u_logic|Jlo2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jlo2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jlo2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~29 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~29_sumout  = SUM(( \soc_inst|m0_1|u_logic|E1bvx4~combout  ) + ( (\soc_inst|m0_1|u_logic|Dfd2z4~combout  & (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~134_cout  ))
+// \soc_inst|m0_1|u_logic|Add5~30  = CARRY(( \soc_inst|m0_1|u_logic|E1bvx4~combout  ) + ( (\soc_inst|m0_1|u_logic|Dfd2z4~combout  & (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~134_cout  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Dfd2z4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E1bvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~134_cout ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~30 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jlo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jlo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~29 .lut_mask = 64'h0000FFBF000000FF;
+defparam \soc_inst|m0_1|u_logic|Add5~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bk13z4~feeder (
+// Location: LABCELL_X31_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~93 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bk13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fdzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Add5~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~30  ))
+// \soc_inst|m0_1|u_logic|Add5~94  = CARRY(( !\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~30  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~30 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bk13z4~feeder_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~94 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk13z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bk13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Bk13z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~93 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~93 .lut_mask = 64'h0000FF0F00008877;
+defparam \soc_inst|m0_1|u_logic|Add5~93 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y4_N11
-dffeas \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bk13z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~101 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Asbvx4~combout  ) + ( 
+// \soc_inst|m0_1|u_logic|Add5~94  ))
+// \soc_inst|m0_1|u_logic|Add5~102  = CARRY(( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Asbvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~94  
+// ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Asbvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~94 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~102 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~101 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~101 .lut_mask = 64'h00000F0F00008877;
+defparam \soc_inst|m0_1|u_logic|Add5~101 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~0 (
+// Location: MLABCELL_X25_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jlo2z4~q ) # (!\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Jlo2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Cr1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Hnbwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Hnbwx4~1_combout )))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Hnbwx4~1_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jlo2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .lut_mask = 64'h0000CCCCFF00FFCC;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y8_N52
-dffeas \soc_inst|m0_1|u_logic|T243z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T243z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T243z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T243z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .lut_mask = 64'h0069006982EB82EB;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~2 (
+// Location: LABCELL_X37_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P03wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fio2z4~q  & ( (!\soc_inst|m0_1|u_logic|T243z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fio2z4~q  & ( ((!\soc_inst|m0_1|u_logic|T243z4~q  & 
-// \soc_inst|m0_1|u_logic|Ab1xx4~0_combout )) # (\soc_inst|m0_1|u_logic|V41xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|P03wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T243z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fio2z4~q ),
-	.dataf(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .lut_mask = 64'h0CFF0C0C0CFF0C0C;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P03wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P03wx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|P03wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y4_N25
-dffeas \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X37_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G6d3z4~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|P03wx4~0_combout ))) ) )
 
-// Location: FF_X42_Y4_N25
-dffeas \soc_inst|m0_1|u_logic|Kt23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kt23z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G6d3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kt23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kt23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .lut_mask = 64'h0000000020F020F0;
+defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~3 (
+// Location: LABCELL_X37_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d3z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Kt23z4~q  & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kt23z4~q  & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Kt23z4~q  & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kt23z4~q  & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|G6d3z4~1_combout  = ( \soc_inst|m0_1|u_logic|G6d3z4~q  & ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Mtqvx4~combout ) # (!\soc_inst|m0_1|u_logic|G6d3z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G6d3z4~q  & ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mtqvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G6d3z4~q  & ( !\soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6d3z4~0_combout ) # ((\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Mtqvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G6d3z4~q  & ( !\soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & (\soc_inst|m0_1|u_logic|Mtqvx4~combout  & 
+// \soc_inst|m0_1|u_logic|G6d3z4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G6d3z4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Kt23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .lut_mask = 64'h0C0C0C0CFFFF0C0C;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .lut_mask = 64'h0101F1F10D0DFDFD;
+defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y6_N40
-dffeas \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE (
+// Location: FF_X37_Y14_N7
+dffeas \soc_inst|m0_1|u_logic|G6d3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ujo2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|G6d3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G6d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G6d3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~1 (
+// Location: LABCELL_X40_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ffbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cqo2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|U71xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|U71xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ffbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( !\soc_inst|m0_1|u_logic|G6d3z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .lut_mask = 64'h00AAF0FA00AAF0FA;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .lut_mask = 64'h0404000000000000;
+defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N7
-dffeas \soc_inst|m0_1|u_logic|Yoz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yoz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yoz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yoz2z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X37_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cr1wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Uaj2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Uaj2z4~q ))) ) ) )
 
-// Location: FF_X42_Y5_N40
-dffeas \soc_inst|m0_1|u_logic|Noo2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Noo2z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Noo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Noo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .lut_mask = 64'hF0C00000FFCC0000;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N1
-dffeas \soc_inst|m0_1|u_logic|Sl03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sl03z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cr1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add5~101_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cr1wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add5~101_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cr1wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sl03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sl03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .lut_mask = 64'h0000CF0000004500;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~4 (
+// Location: LABCELL_X35_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nyawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Sl03z4~q  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Noo2z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ))) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Sl03z4~q  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & (\soc_inst|m0_1|u_logic|Noo2z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q )))) ) ) 
-// ) # ( \soc_inst|m0_1|u_logic|Sl03z4~q  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sl03z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nyawx4~0_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Oxnvx4~3_combout )) # 
+// (\soc_inst|m0_1|u_logic|E1bvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|E1bvx4~combout )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|E1bvx4~combout  & ((\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) # (\soc_inst|m0_1|u_logic|E1bvx4~combout  & ((!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|E1bvx4~combout  & (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yoz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Noo2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sl03z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|E1bvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .lut_mask = 64'h8C8CAFAF008C00AF;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .lut_mask = 64'h0001336700553377;
+defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N14
-dffeas \soc_inst|m0_1|u_logic|Uu73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uu73z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X37_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z80wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z80wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( (\soc_inst|m0_1|u_logic|E5awx4~1_combout ) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|E5awx4~1_combout ) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|E5awx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & \soc_inst|m0_1|u_logic|E5awx4~1_combout ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Z80wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uu73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uu73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .lut_mask = 64'h00333300FF3333FF;
+defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N53
-dffeas \soc_inst|m0_1|u_logic|Ymo2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ymo2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X37_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z80wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z80wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pdi2z4~q  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Z80wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Z80wx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pdi2z4~q  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z80wx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Z80wx4~1_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Z80wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ymo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ymo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .lut_mask = 64'h00F5005500FD00DD;
+defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~5 (
+// Location: LABCELL_X33_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~18 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Jw83z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Jw83z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Ll63z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Jw83z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Ll63z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~18_combout  = (\soc_inst|m0_1|u_logic|F32wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ll63z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Jw83z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~18_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .lut_mask = 64'h0020002000110000;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~18 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~18 .lut_mask = 64'h0A050A050A050A05;
+defparam \soc_inst|m0_1|u_logic|N88wx4~18 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~6 (
+// Location: LABCELL_X33_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Uyu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lpt2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Uyu2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Lpt2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~21_combout  = ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lpt2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uyu2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~21_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .lut_mask = 64'h000B000000080000;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~21 .lut_mask = 64'h3F3F3F3F00000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~7 (
+// Location: LABCELL_X35_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~19 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Rtpvx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Rtpvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Uu73z4~q )))) # (\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (\soc_inst|m0_1|u_logic|Ymo2z4~q  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uu73z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~19_combout  = ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H3awx4~0_combout  & !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uu73z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ymo2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~19_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .lut_mask = 64'h8ACF000000000000;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~19 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~19 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~19 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4 (
+// Location: LABCELL_X33_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~combout  = ( \soc_inst|m0_1|u_logic|Rtpvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Rtpvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Rtpvx4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|Rtpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~7_combout  = ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Oaawx4~1_combout ) # (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ) # (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Oaawx4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rtpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rtpvx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4 .lut_mask = 64'h0000000000008000;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~7 .lut_mask = 64'h22221111A7A7B5B5;
+defparam \soc_inst|m0_1|u_logic|N88wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~12 (
+// Location: LABCELL_X33_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~12_combout  = ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~combout  & (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Rtpvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Rtpvx4~combout )) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Rtpvx4~combout ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~8_combout  = ( \soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # ((\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .lut_mask = 64'h00BB00B8008B0088;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~8 .lut_mask = 64'h00A500A5C3E7C3E7;
+defparam \soc_inst|m0_1|u_logic|N88wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N9
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[29]~22 (
+// Location: LABCELL_X33_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~20 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[29]~22_combout  = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ) # (\soc_inst|ram_1|byte_select [3]) ) ) ) # ( 
-// \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ( (!\soc_inst|ram_1|byte_select [3] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~20_combout  = ( \soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~7_combout  & (!\soc_inst|m0_1|u_logic|N88wx4~8_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~7_combout  & (!\soc_inst|m0_1|u_logic|N88wx4~8_combout  & ((!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select [3]),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
-	.datae(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N88wx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N88wx4~8_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[29]~22_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~20_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[29]~22 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[29]~22 .lut_mask = 64'h000000F000000FFF;
-defparam \soc_inst|ram_1|data_to_memory[29]~22 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~20 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~20 .lut_mask = 64'hC040C040C080C080;
+defparam \soc_inst|m0_1|u_logic|N88wx4~20 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X14_Y7_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 (
-	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[29]~22_combout ,\soc_inst|ram_1|data_to_memory[13]~21_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+// Location: LABCELL_X33_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~9_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~19_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~21_combout  & ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~19_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~18_combout ) # ((\soc_inst|m0_1|u_logic|N88wx4~21_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|N88wx4~19_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~21_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~19_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~21_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N88wx4~18_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N88wx4~21_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N88wx4~19_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~20_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~9_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_bit_number = 13;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_bit_number = 13;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003FFFFFF03C1488390A24181DEF7BDEF785645645645645645645642A555555555555541C313000000000000000000000000";
+defparam \soc_inst|m0_1|u_logic|N88wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~9 .lut_mask = 64'h00DD00DDF0FD00DD;
+defparam \soc_inst|m0_1|u_logic|N88wx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N15
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[13]~21 (
+// Location: LABCELL_X36_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cs0wx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[13]~21_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & !\soc_inst|ram_1|byte_select 
-// [1]) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( (\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ) ) ) )
+// \soc_inst|m0_1|u_logic|Cs0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
-	.datab(!\soc_inst|ram_1|byte_select [1]),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
-	.dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[13]~21_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[13]~21 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[13]~21 .lut_mask = 64'h0000000077774444;
-defparam \soc_inst|ram_1|data_to_memory[13]~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .lut_mask = 64'h00F00FFF000FF0FF;
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxmwx4~0 (
+// Location: LABCELL_X36_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cs0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hxmwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & !\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( 
-// !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Cs0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cs0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Cs0wx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Cs0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Cs0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hxmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .lut_mask = 64'hCCCCCCCCCCCCC0C0;
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .lut_mask = 64'h2200333332303333;
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxmwx4~1 (
+// Location: LABCELL_X33_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|F5ewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Hxmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Mouwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|F5ewx4~combout  & ( (\soc_inst|m0_1|u_logic|Hxmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|G79wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|U11wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|U11wx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hxmwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F5ewx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .lut_mask = 64'h00FC00FC00A800A8;
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~4 .lut_mask = 64'h5E445E44DA88DA88;
+defparam \soc_inst|m0_1|u_logic|G79wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mb1wx4~0 (
+// Location: LABCELL_X33_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mb1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Pmnwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|G79wx4~5_combout  = ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( \soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|N90wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( \soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|N90wx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mb1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .lut_mask = 64'hF0FFF0F000FF0000;
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~5 .lut_mask = 64'h5454E4E4D8D8A8A8;
+defparam \soc_inst|m0_1|u_logic|G79wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mb1wx4~1 (
+// Location: LABCELL_X24_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mb1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mb1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & (\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & (((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|G79wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # ((!\soc_inst|m0_1|u_logic|R99wx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|R99wx4~1_combout  & !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mb1wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .lut_mask = 64'h135F135F00000000;
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~6 .lut_mask = 64'h3F333C00FCCC3C00;
+defparam \soc_inst|m0_1|u_logic|G79wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~81 (
+// Location: LABCELL_X33_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~86  ))
-// \soc_inst|m0_1|u_logic|Add2~82  = CARRY(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~86  ))
+// \soc_inst|m0_1|u_logic|G79wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|G79wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Qtzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G79wx4~4_combout  & (!\soc_inst|m0_1|u_logic|G79wx4~5_combout  & 
+// !\soc_inst|m0_1|u_logic|O51wx4~0_combout )) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|G79wx4~4_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|G79wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G79wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~86 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~81_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~82 ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~7_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~81 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~81 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~81 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~7 .lut_mask = 64'hA000000000000000;
+defparam \soc_inst|m0_1|u_logic|G79wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~109 (
+// Location: LABCELL_X36_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~82  ))
-// \soc_inst|m0_1|u_logic|Add2~110  = CARRY(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~82  ))
+// \soc_inst|m0_1|u_logic|N88wx4~10_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdbwx4~combout  ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~82 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~109_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~110 ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~10_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~109 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~109 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add2~109 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~10 .lut_mask = 64'h0000000000003333;
+defparam \soc_inst|m0_1|u_logic|N88wx4~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nehvx4~1 (
+// Location: LABCELL_X30_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nehvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~17_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Tme3z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~109_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tme3z4~q )))))) ) )
+// \soc_inst|m0_1|u_logic|Ee8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|St0wx4~combout  & ( \soc_inst|m0_1|u_logic|W21wx4~combout  & ( (\soc_inst|m0_1|u_logic|Hk0wx4~combout  & (\soc_inst|m0_1|u_logic|S71wx4~combout  & (\soc_inst|m0_1|u_logic|O7zvx4~combout  
+// & \soc_inst|m0_1|u_logic|Yw0wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~109_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nehvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .lut_mask = 64'hC000C800F300FB00;
-defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nehvx4~0 (
+// Location: LABCELL_X27_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nehvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nehvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & !\soc_inst|m0_1|u_logic|Glnwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ee8wx4~3_combout  = ( \soc_inst|m0_1|u_logic|R40wx4~combout  & ( (\soc_inst|m0_1|u_logic|Uvzvx4~combout  & (\soc_inst|m0_1|u_logic|Kqzvx4~combout  & \soc_inst|m0_1|u_logic|Wa0wx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nehvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .lut_mask = 64'h0000BBAA0000BBAB;
-defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y12_N8
-dffeas \soc_inst|m0_1|u_logic|Tme3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tme3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tme3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tme3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y9_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9jvx4~0 (
+// Location: LABCELL_X33_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A9jvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ee8wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nn0wx4~combout  & (\soc_inst|m0_1|u_logic|Gm1wx4~combout  & (\soc_inst|m0_1|u_logic|Z62wx4~combout  
+// & \soc_inst|m0_1|u_logic|Ce0wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .lut_mask = 64'h4545EFEF4500EF00;
-defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y9_N47
-dffeas \soc_inst|m0_1|u_logic|Slr2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Slr2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Slr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Slr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ty92z4~0 (
+// Location: LABCELL_X33_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ty92z4~0_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|F4q2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ee8wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ee8wx4~3_combout  & ( \soc_inst|m0_1|u_logic|Ee8wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Djzvx4~combout  & (\soc_inst|m0_1|u_logic|Zhyvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Ee8wx4~0_combout  & \soc_inst|m0_1|u_logic|P12wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F4q2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ee8wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ee8wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ee8wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ty92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .lut_mask = 64'h0000000000008000;
-defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y10_N44
-dffeas \soc_inst|m0_1|u_logic|U5q2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U5q2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U5q2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y10_N17
-dffeas \soc_inst|m0_1|u_logic|D603z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D603z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D603z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D603z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X33_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|U6awx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & !\soc_inst|m0_1|u_logic|U6awx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & \soc_inst|m0_1|u_logic|U6awx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & !\soc_inst|m0_1|u_logic|U6awx4~1_combout )))) ) )
 
-// Location: FF_X50_Y9_N28
-dffeas \soc_inst|m0_1|u_logic|X213z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X213z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X213z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X213z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G79wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~0 .lut_mask = 64'h0CEA0CEAAEC0AEC0;
+defparam \soc_inst|m0_1|u_logic|G79wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~2 (
+// Location: LABCELL_X33_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ww92z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|X213z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|D603z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|G79wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|F32wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & (!\soc_inst|m0_1|u_logic|F32wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & (!\soc_inst|m0_1|u_logic|F32wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & !\soc_inst|m0_1|u_logic|F32wx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|D603z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|X213z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ww92z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .lut_mask = 64'h00000000A0880000;
-defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~2 .lut_mask = 64'h75607560EA60EA60;
+defparam \soc_inst|m0_1|u_logic|G79wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~0 (
+// Location: LABCELL_X33_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dv8wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ww92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Gq43z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pz53z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Dv8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pz53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gq43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ww92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .lut_mask = 64'h000000000C0A0000;
-defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .lut_mask = 64'h0F0F0F0F05050505;
+defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y11_N2
-dffeas \soc_inst|m0_1|u_logic|O723z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O723z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O723z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O723z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O723z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X33_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~1_combout  = ( \soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & !\soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & !\soc_inst|m0_1|u_logic|Hy0wx4~0_combout )))) ) )
 
-// Location: FF_X50_Y9_N37
-dffeas \soc_inst|m0_1|u_logic|Xg33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xg33z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xg33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xg33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G79wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~1 .lut_mask = 64'h7E667E665A005A00;
+defparam \soc_inst|m0_1|u_logic|G79wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~1 (
+// Location: MLABCELL_X34_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C8zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ww92z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Xg33z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O723z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|C8zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O723z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xg33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ww92z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .lut_mask = 64'h000080800000C000;
-defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .lut_mask = 64'h00000000FF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~3 (
+// Location: LABCELL_X33_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ww92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ww92z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ty92z4~0_combout  & (\soc_inst|m0_1|u_logic|U5q2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Ww92z4~2_combout  & !\soc_inst|m0_1|u_logic|Ww92z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ww92z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ty92z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ww92z4~2_combout  & !\soc_inst|m0_1|u_logic|Ww92z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|G79wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|G79wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|C8zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G79wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Znzvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|G79wx4~2_combout  & !\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ty92z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U5q2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ww92z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ww92z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ww92z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G79wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G79wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G79wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ww92z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .lut_mask = 64'hA000000020000000;
-defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~3 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|G79wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C61wx4~0 (
+// Location: LABCELL_X33_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hmqwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Slr2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|J7q2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Slr2z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Slr2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|J7q2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~11_combout  = ( \soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & ( \soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|G79wx4~7_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|N88wx4~10_combout )))) # (\soc_inst|m0_1|u_logic|G79wx4~7_combout  & (((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|N88wx4~10_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & ( \soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|G79wx4~7_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|N88wx4~10_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & !\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ww92z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G79wx4~7_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N88wx4~10_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ee8wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G79wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C61wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C61wx4~0 .lut_mask = 64'hACACAFAFACACAFA0;
-defparam \soc_inst|m0_1|u_logic|C61wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~11 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~11 .lut_mask = 64'hCC00CC0CDD00DD0D;
+defparam \soc_inst|m0_1|u_logic|N88wx4~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~101 (
+// Location: LABCELL_X33_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~12 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~110  ))
-// \soc_inst|m0_1|u_logic|Add2~102  = CARRY(( !\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~110  ))
+// \soc_inst|m0_1|u_logic|N88wx4~12_combout  = ( !\soc_inst|m0_1|u_logic|Cs0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~11_combout  & ( (!\soc_inst|m0_1|u_logic|Z80wx4~0_combout  & (\soc_inst|m0_1|u_logic|N88wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N88wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~11_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~110 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~101_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~102 ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~12_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~101 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~101 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~101 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y10_N2
-dffeas \soc_inst|m0_1|u_logic|Rix2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rix2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rix2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rix2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N88wx4~12 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~12 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xjhvx4~0 (
+// Location: MLABCELL_X34_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rix2z4~q  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Add2~101_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rix2z4~q  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~101_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~17_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~12_combout  & ( \soc_inst|m0_1|u_logic|J00wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & (\soc_inst|m0_1|u_logic|N88wx4~13_combout  & 
+// (\soc_inst|m0_1|u_logic|Cr1wx4~0_combout  & !\soc_inst|m0_1|u_logic|Nyawx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add2~101_sumout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N88wx4~13_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N88wx4~12_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xjhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~17_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .lut_mask = 64'hAA88FFDD00000000;
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~17 .lut_mask = 64'h0000000000000200;
+defparam \soc_inst|m0_1|u_logic|N88wx4~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xjhvx4~1 (
+// Location: LABCELL_X31_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xjhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~61_sumout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Xjhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~61_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~105_sumout  & ( (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Do1wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~105_sumout  & ( (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Do1wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~105_sumout  & ( (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Do1wx4~0_combout  & !\soc_inst|m0_1|u_logic|Add5~109_sumout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xjhvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .lut_mask = 64'h0000CCC00000FFF0;
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~1 .lut_mask = 64'h0100010100000101;
+defparam \soc_inst|m0_1|u_logic|N88wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y10_N1
-dffeas \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wsawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wsawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .lut_mask = 64'hFCFCE200F3F3B800;
+defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~89 (
+// Location: LABCELL_X33_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~94  ))
-// \soc_inst|m0_1|u_logic|Add3~90  = CARRY(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~94  ))
+// \soc_inst|m0_1|u_logic|N88wx4~2_combout  = ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & \soc_inst|m0_1|u_logic|Oaawx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Oaawx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Oaawx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Oaawx4~1_combout )) # (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~94 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~89_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~90 ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~89 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~89 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~89 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~2 .lut_mask = 64'h0573057337503750;
+defparam \soc_inst|m0_1|u_logic|N88wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~69 (
+// Location: LABCELL_X33_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~86  ))
-// \soc_inst|m0_1|u_logic|Add3~70  = CARRY(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~86  ))
+// \soc_inst|m0_1|u_logic|N88wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & \soc_inst|m0_1|u_logic|P82wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Gdawx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & \soc_inst|m0_1|u_logic|P82wx4~0_combout )))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~86 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~69_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~70 ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~69 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~69 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~69 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~3 .lut_mask = 64'h005A005A667E667E;
+defparam \soc_inst|m0_1|u_logic|N88wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~65 (
+// Location: LABCELL_X33_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~70  ))
-// \soc_inst|m0_1|u_logic|Add3~66  = CARRY(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~70  ))
+// \soc_inst|m0_1|u_logic|Rjzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & \soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~70 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~65_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~66 ),
+	.combout(\soc_inst|m0_1|u_logic|Rjzvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~65 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~65 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~65 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .lut_mask = 64'hF0F0F0F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ug0wx4 (
+// Location: MLABCELL_X28_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nf1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ug0wx4~combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~53_sumout  ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~53_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~61_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~61_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Add3~61_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~61_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~61_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~61_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nf1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~61_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ug0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ug0wx4 .lut_mask = 64'h111F111F111FFFFF;
-defparam \soc_inst|m0_1|u_logic|Ug0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .lut_mask = 64'h000000000FF00FF0;
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M0kvx4~0 (
+// Location: LABCELL_X33_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M0kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( \soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|B9g3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( \soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|B9g3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Nf1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|F32wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Nf1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|F32wx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|N88wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M0kvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .lut_mask = 64'h0D0DFDFD0D00FD00;
-defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y5_N7
-dffeas \soc_inst|m0_1|u_logic|Tzg3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M0kvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tzg3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tzg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tzg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N88wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~4 .lut_mask = 64'hA080A02000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~1 (
+// Location: LABCELL_X33_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Sog3z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Sog3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~5_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|N88wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sog3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N88wx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .lut_mask = 64'h8840000000400000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y10_N8
-dffeas \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N88wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~5 .lut_mask = 64'hC0C0C0C0FFC0FFC0;
+defparam \soc_inst|m0_1|u_logic|N88wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~2 (
+// Location: LABCELL_X33_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Kig3z4~q  & ( \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kig3z4~q  & ( !\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kig3z4~q  & ( !\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Y5zvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ox1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ox1wx4~1_combout  & (\soc_inst|m0_1|u_logic|Wsawx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|N88wx4~5_combout  & \soc_inst|m0_1|u_logic|Ksbwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kig3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N88wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .lut_mask = 64'h0404000404000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~6 .lut_mask = 64'h0000000100000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~4 (
+// Location: MLABCELL_X34_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~14 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ltg3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Avg3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~14_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~6_combout  & ( \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Cfzvx4~0_combout  & (\soc_inst|m0_1|u_logic|Qppvx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|N88wx4~17_combout  & \soc_inst|m0_1|u_logic|N88wx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Avg3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ltg3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N88wx4~17_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N88wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N88wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~14_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .lut_mask = 64'h0088000000C00000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~14 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~14 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|N88wx4~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~5 (
+// Location: MLABCELL_X34_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~16 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Hk0wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Xi2xx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Hk0wx4~0_combout  & !\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~16_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~14_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~15_combout  & (((\soc_inst|m0_1|u_logic|Do8wx4~4_combout  & \soc_inst|m0_1|u_logic|N88wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hk0wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hk0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Do8wx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N88wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N88wx4~15_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~14_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~16 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~16 .lut_mask = 64'h0000000000370037;
+defparam \soc_inst|m0_1|u_logic|N88wx4~16 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4 (
+// Location: MLABCELL_X34_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~7_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & !\soc_inst|m0_1|u_logic|Z78wx4~6_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ) # (\soc_inst|m0_1|u_logic|Wai2z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .lut_mask = 64'hFF0FFF0FF000F000;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wh0wx4~0 (
+// Location: MLABCELL_X34_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wh0wx4~0_combout  = (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|M9awx4~1_combout ))))
+// \soc_inst|m0_1|u_logic|S9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|E9zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|m0_1|u_logic|K0qvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|O7zvx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & ((\soc_inst|m0_1|u_logic|Z78wx4~7_combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|E9zvx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (\soc_inst|m0_1|u_logic|O7zvx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (((!\soc_inst|m0_1|u_logic|X4pvx4~combout ) # (\soc_inst|m0_1|u_logic|Z78wx4~7_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (\soc_inst|m0_1|u_logic|O7zvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|K0qvx4~combout  & ((\soc_inst|m0_1|u_logic|Z78wx4~7_combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X4pvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (\soc_inst|m0_1|u_logic|O7zvx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & ((\soc_inst|m0_1|u_logic|Z78wx4~7_combout ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z78wx4~7_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .lut_mask = 64'h1200120012001200;
-defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .lut_mask = 64'h0027002777270027;
+defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y13_N7
+dffeas \soc_inst|m0_1|u_logic|Igi2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Igi2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Igi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Igi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y12_N56
+dffeas \soc_inst|m0_1|u_logic|Rhi2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rhi2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bh0wx4~0 (
+// Location: LABCELL_X36_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Velvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bh0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wh0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ri0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hk0wx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Velvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rhi2z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Omk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhi2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Omk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhi2z4~q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rhi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bh0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Velvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .lut_mask = 64'hCFCF000000000000;
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Velvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Velvx4~0 .lut_mask = 64'hFFFF000050505050;
+defparam \soc_inst|m0_1|u_logic|Velvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ia0wx4 (
+// Location: LABCELL_X36_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Velvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ia0wx4~combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Velvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Velvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|haddr_o~1_combout )))) # 
+// (\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Igi2z4~q  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|haddr_o~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Velvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ia0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ia0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ia0wx4 .lut_mask = 64'h707070707070F0F0;
-defparam \soc_inst|m0_1|u_logic|Ia0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Velvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Velvx4~1 .lut_mask = 64'hA8FCA8FC00000000;
+defparam \soc_inst|m0_1|u_logic|Velvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tj0wx4~0 (
+// Location: FF_X36_Y12_N55
+dffeas \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X31_Y8_N56
+dffeas \soc_inst|m0_1|u_logic|Cai3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cai3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cai3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cai3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N53
+dffeas \soc_inst|m0_1|u_logic|Y6i3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y6i3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y6i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6i3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5i3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tj0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|W6iwx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|J5i3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tj0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J5i3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .lut_mask = 64'hCFCFCCCC0F0F0000;
-defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J5i3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J5i3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|J5i3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y9_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tj0wx4 (
+// Location: FF_X24_Y8_N14
+dffeas \soc_inst|m0_1|u_logic|J5i3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J5i3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J5i3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5i3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tj0wx4~combout  = ( \soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tj0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tj0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ec62z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Y6i3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|J5i3z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tj0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y6i3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J5i3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ec62z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tj0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tj0wx4 .lut_mask = 64'h3033F0FF00000000;
-defparam \soc_inst|m0_1|u_logic|Tj0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .lut_mask = 64'h0000000088C00000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bh0wx4~1 (
+// Location: LABCELL_X24_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E143z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bh0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ia0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tj0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Bh0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~53_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|E143z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bh0wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ia0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E143z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .lut_mask = 64'h0000000000002233;
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E143z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E143z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|E143z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N1
-dffeas \soc_inst|m0_1|u_logic|Pwg3z4 (
+// Location: FF_X24_Y8_N26
+dffeas \soc_inst|m0_1|u_logic|E143z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|E143z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pwg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|E143z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pwg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pwg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E143z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E143z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y8_N55
-dffeas \soc_inst|m0_1|u_logic|Hqg3z4 (
+// Location: FF_X27_Y7_N1
+dffeas \soc_inst|m0_1|u_logic|Na53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hqg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Na53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hqg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hqg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Na53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~7 (
+// Location: MLABCELL_X25_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Dng3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hqg3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dng3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hqg3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ec62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Na53z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|E143z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Na53z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|E143z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hqg3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dng3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|E143z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Na53z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ec62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .lut_mask = 64'h000D000800000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .lut_mask = 64'h0000000045004000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~6 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Nag3z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gfg3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Gfg3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nag3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~6_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y8_N26
+dffeas \soc_inst|m0_1|u_logic|N8i3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|N8i3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .lut_mask = 64'h0000080800000300;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N8i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N8i3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~8 (
+// Location: LABCELL_X31_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Be62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Hk0wx4~6_combout  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout  & (\soc_inst|m0_1|u_logic|Rdg3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwg3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwg3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Be62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|N8i3z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pwg3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rdg3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|N8i3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Be62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .lut_mask = 64'hD0D0000000D00000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Be62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Be62z4~0 .lut_mask = 64'h0008000000000000;
+defparam \soc_inst|m0_1|u_logic|Be62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9awx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|M9awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|M9awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( 
-// \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+// Location: FF_X30_Y9_N10
+dffeas \soc_inst|m0_1|u_logic|Mi13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mi13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mi13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi13z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|M9awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y6_N28
+dffeas \soc_inst|m0_1|u_logic|Vr23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vr23z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M9awx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M9awx4~1 .lut_mask = 64'h030B030B030B0F0F;
-defparam \soc_inst|m0_1|u_logic|M9awx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vr23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y13_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tjlwx4~0 (
+// Location: LABCELL_X30_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ec62z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vr23z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Mi13z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mi13z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vr23z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ec62z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .lut_mask = 64'h8CCC8CCC8CCCCCCC;
-defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .lut_mask = 64'h00000000A000C000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y13_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldhvx4~1 (
+// Location: LABCELL_X31_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ldhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tj0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~53_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tj0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add5~53_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ec62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Be62z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ec62z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ec62z4~2_combout  & (!\soc_inst|m0_1|u_logic|Ec62z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cai3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cai3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ec62z4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ec62z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Be62z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ec62z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ldhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ec62z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .lut_mask = 64'h00000000A800A8A8;
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y13_N56
-dffeas \soc_inst|m0_1|u_logic|B9g3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ldhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B9g3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B9g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B9g3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .lut_mask = 64'hC400000000000000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y13_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gehvx4~0 (
+// Location: LABCELL_X35_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & \soc_inst|m0_1|u_logic|Add2~61_sumout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Add2~61_sumout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Cqo2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) # (\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Cqo2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Cqo2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Cqo2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~61_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ec62z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gehvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .lut_mask = 64'h0F0F0FFF000000F0;
-defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .lut_mask = 64'h10BA10BA10BA15BF;
+defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gehvx4~1 (
+// Location: LABCELL_X31_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ovcvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gehvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( \soc_inst|m0_1|u_logic|Qe0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
-// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( \soc_inst|m0_1|u_logic|Qe0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout  & \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( !\soc_inst|m0_1|u_logic|Qe0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
-// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( !\soc_inst|m0_1|u_logic|Qe0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & 
-// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ovcvx4~combout  = ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gehvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ovcvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .lut_mask = 64'h0088008000AA00A0;
-defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y13_N25
-dffeas \soc_inst|m0_1|u_logic|Foe3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Foe3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Foe3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Foe3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ovcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ovcvx4 .lut_mask = 64'h55555555FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ovcvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc0wx4 (
+// Location: LABCELL_X36_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F6zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fc0wx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add3~57_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add3~57_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add3~57_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~57_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|F6zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|L9zvx4~combout  & ( \soc_inst|m0_1|u_logic|C8zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|O7zvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L9zvx4~combout  & ( !\soc_inst|m0_1|u_logic|C8zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O7zvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~57_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L9zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|F6zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fc0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fc0wx4 .lut_mask = 64'hFAFAC8C8FA00C800;
-defparam \soc_inst|m0_1|u_logic|Fc0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .lut_mask = 64'h0000F3F30000F300;
+defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B5kvx4~0 (
+// Location: LABCELL_X30_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F6zvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B5kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Llq2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fc0wx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (\soc_inst|m0_1|u_logic|Fc0wx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Llq2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|F6zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|E9zvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Add5~9_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|F6zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .lut_mask = 64'h2233EEFF02030E0F;
-defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .lut_mask = 64'h000000000000F300;
+defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y5_N14
-dffeas \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE (
+// Location: FF_X30_Y9_N14
+dffeas \soc_inst|m0_1|u_logic|Fxu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Fxu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fxu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fxu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y4_N35
-dffeas \soc_inst|m0_1|u_logic|L733z4~DUPLICATE (
+// Location: FF_X31_Y8_N19
+dffeas \soc_inst|m0_1|u_logic|Wnt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L733z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Wnt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L733z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L733z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wnt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~1 (
+// Location: LABCELL_X30_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh82z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Cy13z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|L733z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wnt2z4~q  & ( \soc_inst|m0_1|u_logic|T31xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fxu2z4~q  & \soc_inst|m0_1|u_logic|R91xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wnt2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|T31xx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Wnt2z4~q  & ( !\soc_inst|m0_1|u_logic|T31xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fxu2z4~q  & \soc_inst|m0_1|u_logic|R91xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wnt2z4~q  
+// & ( !\soc_inst|m0_1|u_logic|T31xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fxu2z4~q  & \soc_inst|m0_1|u_logic|R91xx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cy13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L733z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fxu2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wnt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh82z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .lut_mask = 64'h0000000088A00000;
-defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .lut_mask = 64'h0C0C0C0CFFFF0C0C;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Zh82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dq53z4~q  & ( \soc_inst|m0_1|u_logic|Ug43z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dq53z4~q  & ( !\soc_inst|m0_1|u_logic|Ug43z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dq53z4~q  & ( !\soc_inst|m0_1|u_logic|Ug43z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dq53z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ug43z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh82z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .lut_mask = 64'h0500040001000000;
-defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~2 (
+// Location: LABCELL_X30_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh82z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vzz2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pw03z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Vr23z4~q  & ( \soc_inst|m0_1|u_logic|Na53z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vr23z4~q  & ( !\soc_inst|m0_1|u_logic|Na53z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vr23z4~q  & ( !\soc_inst|m0_1|u_logic|Na53z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pw03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vzz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vr23z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Na53z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh82z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .lut_mask = 64'h000000008080C000;
-defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .lut_mask = 64'h0044000400400000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y7_N46
-dffeas \soc_inst|m0_1|u_logic|C5n2z4 (
+// Location: FF_X29_Y11_N13
+dffeas \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C5n2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C5n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj82z4~0 (
+// Location: LABCELL_X30_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wj82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|C5n2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mi13z4~q  & ( \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mi13z4~q  & ( !\soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mi13z4~q  & ( !\soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  $ (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|C5n2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mi13z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wj82z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .lut_mask = 64'h0000000040000000;
-defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .lut_mask = 64'h6000200040000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~3 (
+// Location: LABCELL_X24_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Zh82z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Wj82z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh82z4~1_combout  & (!\soc_inst|m0_1|u_logic|Zh82z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|R6n2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rro2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|E143z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R6n2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zh82z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zh82z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zh82z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wj82z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E143z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rro2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh82z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .lut_mask = 64'hD000000000000000;
-defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .lut_mask = 64'h000000A0000000C0;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N90wx4~0 (
+// Location: LABCELL_X30_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N90wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Zfh3z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Gto2z4~q  & ( \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gto2z4~q  & ( !\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gto2z4~q  & ( !\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zh82z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gto2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N90wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N90wx4~0 .lut_mask = 64'hCACFCACFCACFCAC0;
-defparam \soc_inst|m0_1|u_logic|N90wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .lut_mask = 64'h8200800002000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~1 (
+// Location: FF_X24_Y8_N13
+dffeas \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J5i3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J70wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N90wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( ((\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Y6i3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y6i3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J70wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J70wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J70wx4~1 .lut_mask = 64'h1F2F0F0F11220000;
-defparam \soc_inst|m0_1|u_logic|J70wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .lut_mask = 64'h00000000A0C00000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~2 (
+// Location: LABCELL_X30_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J70wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|J70wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Z80wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|J70wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|Z80wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|O7zvx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~3_combout  & (!\soc_inst|m0_1|u_logic|O7zvx4~1_combout  & (!\soc_inst|m0_1|u_logic|O7zvx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|O7zvx4~4_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|J70wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O7zvx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O7zvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O7zvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O7zvx4~4_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J70wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J70wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J70wx4~2 .lut_mask = 64'hC000C00040004000;
-defparam \soc_inst|m0_1|u_logic|J70wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ba0wx4~0 (
+// Location: MLABCELL_X28_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ba0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( \soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|W6iwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~7_combout  = ( \soc_inst|m0_1|u_logic|Wj63z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Uu83z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wj63z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Uu83z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uu83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wj63z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ba0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .lut_mask = 64'hF0FF00FFF0F00000;
-defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .lut_mask = 64'h0000000021200100;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ba0wx4 (
+// Location: MLABCELL_X28_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ba0wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ba0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ba0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~7_combout  & (\soc_inst|m0_1|u_logic|Cai3z4~q  & \soc_inst|m0_1|u_logic|N8i3z4~q )) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~7_combout  & \soc_inst|m0_1|u_logic|Cai3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~7_combout  & \soc_inst|m0_1|u_logic|N8i3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|O7zvx4~7_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ba0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O7zvx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cai3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|N8i3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ba0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ba0wx4 .lut_mask = 64'h7070000077770000;
-defparam \soc_inst|m0_1|u_logic|Ba0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .lut_mask = 64'hCCCC00CC0C0C000C;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~0 (
+// Location: LABCELL_X30_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J70wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ba0wx4~combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J70wx4~2_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ba0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J70wx4~2_combout  & 
-// ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~combout  = ( \soc_inst|m0_1|u_logic|O7zvx4~6_combout  & ( \soc_inst|m0_1|u_logic|O7zvx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J70wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O7zvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O7zvx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J70wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J70wx4~0 .lut_mask = 64'h000007070000070F;
-defparam \soc_inst|m0_1|u_logic|J70wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y8_N8
-dffeas \soc_inst|m0_1|u_logic|V883z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V883z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V883z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V883z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O7zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4 .lut_mask = 64'h000000000000AA0A;
+defparam \soc_inst|m0_1|u_logic|O7zvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~7 (
+// Location: LABCELL_X27_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Vcv2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|M3u2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vcv2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|M3u2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~2_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & (!\soc_inst|m0_1|u_logic|Uvzvx4~combout  & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|O7zvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Uvzvx4~combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|O7zvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|M3u2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vcv2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .lut_mask = 64'h0045004000000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .lut_mask = 64'h4444555044440050;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~6 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Mz63z4~q  & ( \soc_inst|m0_1|u_logic|Md93z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mz63z4~q  & ( !\soc_inst|m0_1|u_logic|Md93z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mz63z4~q  & ( !\soc_inst|m0_1|u_logic|Md93z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  $ 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mz63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Md93z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~6_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y20_N29
+dffeas \soc_inst|m0_1|u_logic|Lhd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .lut_mask = 64'h0201000102000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lhd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lhd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~8 (
+// Location: LABCELL_X23_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|C5n2z4~q  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|V883z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C5n2z4~q  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|V883z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Repwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mjl2z4~q  & ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|Ffs2z4~q  & \soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & (\soc_inst|m0_1|u_logic|J6i2z4~q  & ((\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Lz93z4~q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|Ffs2z4~q  & !\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|V883z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C5n2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Repwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .lut_mask = 64'h8C00AF0000000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~0 .lut_mask = 64'h050000000070000A;
+defparam \soc_inst|m0_1|u_logic|Repwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5awx4~1 (
+// Location: LABCELL_X24_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E5awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|E5awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( 
-// \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|E5awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|E5awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|E5awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Repwx4~1_combout  = ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aqp2z4~q  & (!\soc_inst|m0_1|u_logic|Repwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jxs2z4~q ) # (!\soc_inst|m0_1|u_logic|E0uvx4~combout )))) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|K3uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Repwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jxs2z4~q ) # (!\soc_inst|m0_1|u_logic|E0uvx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E5awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Repwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Repwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E5awx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E5awx4~1 .lut_mask = 64'h050D050D050D0F0F;
-defparam \soc_inst|m0_1|u_logic|E5awx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~1 .lut_mask = 64'hFC00FC00A800A800;
+defparam \soc_inst|m0_1|u_logic|Repwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vihvx4~0 (
+// Location: LABCELL_X23_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Add2~105_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Nox2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nox2z4~q  & \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Repwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Q6l2z4~q  & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout  & (\soc_inst|m0_1|u_logic|Repwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Lns2z4~q )))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Q6l2z4~q  & ( (\soc_inst|m0_1|u_logic|Repwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Lns2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Add2~105_sumout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Repwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vihvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Repwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .lut_mask = 64'h00AA33AA00AA33AA;
-defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~2 .lut_mask = 64'h0F0C0F0C0A080A08;
+defparam \soc_inst|m0_1|u_logic|Repwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vihvx4~1 (
+// Location: LABCELL_X23_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ncpwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ba0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add5~1_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ba0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~1_sumout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ncpwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Repwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lhd3z4~q  & \soc_inst|m0_1|u_logic|N1uvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Repwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vihvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Repwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ncpwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .lut_mask = 64'h00000000E000EE00;
-defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y13_N1
-dffeas \soc_inst|m0_1|u_logic|Nox2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nox2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nox2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nox2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .lut_mask = 64'h00000000FFFF0505;
+defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C70wx4 (
+// Location: LABCELL_X23_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C70wx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|N90wx4~0_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~101_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~101_sumout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|N90wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~101_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add3~101_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|A9iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[30]~34_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|J7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[30]~34_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~101_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C70wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C70wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C70wx4 .lut_mask = 64'hFAFAC8C8FA00C800;
-defparam \soc_inst|m0_1|u_logic|C70wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .lut_mask = 64'h88808880AAA0AAA0;
+defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9kvx4~0 (
+// Location: LABCELL_X23_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X61wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q9kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zfh3z4~q  & ( \soc_inst|m0_1|u_logic|C70wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nox2z4~q ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q  & ( \soc_inst|m0_1|u_logic|C70wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nox2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Zfh3z4~q  & ( !\soc_inst|m0_1|u_logic|C70wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nox2z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q  & ( !\soc_inst|m0_1|u_logic|C70wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Nox2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|X61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pmnwx4~combout  & (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & 
+// ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|A9iwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C70wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X61wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .lut_mask = 64'h3100FD003131FDFD;
-defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y5_N2
-dffeas \soc_inst|m0_1|u_logic|Zfh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zfh3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zfh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zfh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X61wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X61wx4~0 .lut_mask = 64'h113355FF0103050F;
+defparam \soc_inst|m0_1|u_logic|X61wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bf9wx4~0 (
+// Location: LABCELL_X22_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X61wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bf9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) )
+// \soc_inst|m0_1|u_logic|X61wx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & ((\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ((\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ((\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|X61wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .lut_mask = 64'h0000000030000000;
-defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y5_N8
-dffeas \soc_inst|m0_1|u_logic|M4j2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M4j2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M4j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M4j2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y4_N17
-dffeas \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y4_N22
-dffeas \soc_inst|m0_1|u_logic|Pgf3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pgf3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pgf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pgf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X61wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X61wx4~1 .lut_mask = 64'h1050105010501155;
+defparam \soc_inst|m0_1|u_logic|X61wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~0 (
+// Location: LABCELL_X23_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M41wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bc82z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Pgf3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Pgf3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|M41wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J61wx4~0_combout  & \soc_inst|m0_1|u_logic|M41wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J61wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~61_sumout  & \soc_inst|m0_1|u_logic|M41wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pgf3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|M41wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bc82z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .lut_mask = 64'h0000405000004000;
-defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y3_N49
-dffeas \soc_inst|m0_1|u_logic|Tjf3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tjf3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tjf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tjf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M41wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M41wx4~1 .lut_mask = 64'h0000000000C000CC;
+defparam \soc_inst|m0_1|u_logic|M41wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y6_N8
-dffeas \soc_inst|m0_1|u_logic|Ilf3z4 (
+// Location: FF_X29_Y8_N41
+dffeas \soc_inst|m0_1|u_logic|Y873z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ilf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Y873z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ilf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ilf3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y3_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bc82z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tjf3z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Ilf3z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tjf3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ilf3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bc82z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .lut_mask = 64'h5000404000000000;
-defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y873z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y873z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N23
-dffeas \soc_inst|m0_1|u_logic|Ftf3z4 (
+// Location: FF_X23_Y10_N13
+dffeas \soc_inst|m0_1|u_logic|F4q2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ftf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F4q2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ftf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ftf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F4q2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F4q2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N55
-dffeas \soc_inst|m0_1|u_logic|Qrf3z4 (
+// Location: FF_X23_Y10_N22
+dffeas \soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qrf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qrf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~2 (
+// Location: MLABCELL_X28_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bc82z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Ftf3z4~q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Qrf3z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( \soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|J7q2z4~q  & ( !\soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( !\soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ftf3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qrf3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bc82z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .lut_mask = 64'h0000AC0000000000;
-defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~7 .lut_mask = 64'h8100010080000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y5_N14
-dffeas \soc_inst|m0_1|u_logic|Uuf3z4 (
+// Location: FF_X34_Y12_N49
+dffeas \soc_inst|m0_1|u_logic|O723z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uuf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uuf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O723z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O723z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~3 (
+// Location: MLABCELL_X28_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bc82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Bc82z4~2_combout  & ( \soc_inst|m0_1|u_logic|Uuf3z4~q  & ( !\soc_inst|m0_1|u_logic|Bc82z4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Bc82z4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Uuf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Bc82z4~1_combout  & !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gq43z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gq43z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gq43z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bc82z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bc82z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gq43z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bc82z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .lut_mask = 64'hF0000000F0F00000;
-defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~6 .lut_mask = 64'h4040004040000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~4 (
+// Location: LABCELL_X29_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bc82z4~4_combout  = ( \soc_inst|m0_1|u_logic|Icxwx4~combout  & ( \soc_inst|m0_1|u_logic|Bc82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Bc82z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|M4j2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|S71wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|F4q2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & (\soc_inst|m0_1|u_logic|Y873z4~q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|F4q2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|M4j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bc82z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bc82z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y873z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|F4q2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S71wx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bc82z4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .lut_mask = 64'h000000000000CF00;
-defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~8 .lut_mask = 64'hBB0B000000000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntnvx4~0 (
+// Location: LABCELL_X29_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bc82z4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Zfh3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bc82z4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Zfh3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~combout  = ( \soc_inst|m0_1|u_logic|S71wx4~5_combout  & ( \soc_inst|m0_1|u_logic|S71wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bc82z4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .lut_mask = 64'hACAFACAFACA0ACA0;
-defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|S71wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6cwx4~0 (
+// Location: LABCELL_X27_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bq5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D6cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T7cwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T7cwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|S71wx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D6cwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .lut_mask = 64'hFFCCC0A0CCFFA0C0;
-defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .lut_mask = 64'h00000F0FFFFF0F0F;
+defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Va3wx4~0 (
+// Location: LABCELL_X24_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pcd3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Va3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|D6cwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|D6cwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & \soc_inst|m0_1|u_logic|D6cwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|D6cwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Pcd3z4~0_combout  = !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout 
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D6cwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .lut_mask = 64'h00AA0022000A0002;
-defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .lut_mask = 64'hFF00FF00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fa2wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Fa2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Va3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oa3wx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ) ) ) )
+// Location: FF_X24_Y20_N19
+dffeas \soc_inst|m0_1|u_logic|Pcd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pcd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y21_N43
+dffeas \soc_inst|m0_1|u_logic|U5a3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U5a3z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .lut_mask = 64'h00000000000057FF;
-defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U5a3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5a3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y5_N5
-dffeas \soc_inst|m0_1|u_logic|Fpi2z4 (
+// Location: FF_X23_Y19_N10
+dffeas \soc_inst|m0_1|u_logic|Mis2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fpi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mis2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fpi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fpi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mis2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mis2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~0 (
+// Location: LABCELL_X27_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ilf3z4~q ) # ((!\soc_inst|m0_1|u_logic|Fpi2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fpi2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|M1pwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Tqc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rym2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|Tqc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fpi2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ilf3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1pwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .lut_mask = 64'h0303030303FF03FF;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S652z4~0 (
+// Location: LABCELL_X27_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S652z4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bqf3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|M1pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Lz93z4~q )) # (\soc_inst|m0_1|u_logic|E0uvx4~combout ) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Lz93z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|E0uvx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bqf3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S652z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1pwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S652z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S652z4~0 .lut_mask = 64'h1000100000000000;
-defparam \soc_inst|m0_1|u_logic|S652z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y7_N11
-dffeas \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .lut_mask = 64'h0000333300F033F3;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W852z4~0 (
+// Location: LABCELL_X27_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W852z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|M1pwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|M1pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M1pwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Mis2z4~q ) # (!\soc_inst|m0_1|u_logic|Qwowx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M1pwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1pwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W852z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1pwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W852z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W852z4~0 .lut_mask = 64'h0001000100000000;
-defparam \soc_inst|m0_1|u_logic|W852z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y5_N58
-dffeas \soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G752z4~0 (
+// Location: LABCELL_X27_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G752z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|M1pwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|M1pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5a3z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|M1pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5a3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U5a3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1pwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G752z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1pwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G752z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G752z4~0 .lut_mask = 64'h0100010000000000;
-defparam \soc_inst|m0_1|u_logic|G752z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .lut_mask = 64'h00000000A0F0AAFF;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P852z4~0 (
+// Location: LABCELL_X24_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P852z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aff3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|M1pwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1pwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout  & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Pcd3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1pwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # (!\soc_inst|m0_1|u_logic|Pcd3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aff3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1pwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P852z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1pwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P852z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P852z4~0 .lut_mask = 64'h0040004000000000;
-defparam \soc_inst|m0_1|u_logic|P852z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .lut_mask = 64'h00000000EEEEEE00;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~4 (
+// Location: MLABCELL_X28_Y19_N27
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[30]~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~4_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P852z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S652z4~0_combout  & (\soc_inst|m0_1|u_logic|M4j2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|W852z4~0_combout  & !\soc_inst|m0_1|u_logic|G752z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P852z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S652z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|W852z4~0_combout  & !\soc_inst|m0_1|u_logic|G752z4~0_combout )) ) ) )
+// \soc_inst|ram_1|data_to_memory[30]~29_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|hwdata_o~2_combout ))) 
+// ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|m0_1|u_logic|hwdata_o~2_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S652z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M4j2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W852z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G752z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P852z4~0_combout ),
+	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~4_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[30]~29_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .lut_mask = 64'hA000200000000000;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[30]~29 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[30]~29 .lut_mask = 64'h0005000550555055;
+defparam \soc_inst|ram_1|data_to_memory[30]~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y5_N43
-dffeas \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+// Location: M10K_X38_Y14_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[30]~29_combout ,\soc_inst|ram_1|data_to_memory[14]~30_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_bit_number = 14;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_bit_number = 14;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002BB6DB6C3D723122C3230DCF739CE739CCB30B30B30B30B30B30B30DB3FFFFFFFFFFFFC3FA14000000000000000000000001";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~1 (
+// Location: MLABCELL_X28_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qapwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|B6j2z4~q  & \soc_inst|m0_1|u_logic|Ta1xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B6j2z4~q  & \soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qapwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & \soc_inst|m0_1|u_logic|B7owx4~combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qapwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .lut_mask = 64'h0000000000550055;
+defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I852z4~0 (
+// Location: LABCELL_X23_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I852z4~0_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q  ) )
+// \soc_inst|m0_1|u_logic|D7iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qapwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Eudwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Mydwx4~1_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ldf3z4~q ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qapwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I852z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I852z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I852z4~0 .lut_mask = 64'h00000000CCCCCCCC;
-defparam \soc_inst|m0_1|u_logic|I852z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .lut_mask = 64'hCDEFCDEF00000000;
+defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M352z4~0 (
+// Location: LABCELL_X23_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7iwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M352z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qrf3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|D7iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M1pwx4~4_combout  & (\soc_inst|m0_1|u_logic|D7iwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|X2rvx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|D7iwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1pwx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D7iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M352z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M352z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M352z4~0 .lut_mask = 64'h0200020000000000;
-defparam \soc_inst|m0_1|u_logic|M352z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y5_N22
-dffeas \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .lut_mask = 64'h0F0F0F0F05040504;
+defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T352z4~0 (
+// Location: LABCELL_X23_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ba0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T352z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Ba0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|O9iwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ) # ((\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|O9iwx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T352z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ba0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T352z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T352z4~0 .lut_mask = 64'h0800080000000000;
-defparam \soc_inst|m0_1|u_logic|T352z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .lut_mask = 64'hFF30FF3030303030;
+defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y5_N13
-dffeas \soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ba0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ba0wx4~combout  = ( \soc_inst|m0_1|u_logic|A9iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ba0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|A9iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ba0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D7iwx4~1_combout ))) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ba0wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ba0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ba0wx4 .lut_mask = 64'h3033F0FF00000000;
+defparam \soc_inst|m0_1|u_logic|Ba0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C552z4~0 (
+// Location: LABCELL_X37_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C552z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pgf3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|J70wx4~1_combout  = ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|N90wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// \soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|N90wx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// \soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// \soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pgf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C552z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J70wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C552z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C552z4~0 .lut_mask = 64'h0002000200000000;
-defparam \soc_inst|m0_1|u_logic|C552z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~1 .lut_mask = 64'h333B33B3000A00A0;
+defparam \soc_inst|m0_1|u_logic|J70wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O452z4~0 (
+// Location: LABCELL_X27_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O452z4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Tjf3z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|J70wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Z80wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J70wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Add5~1_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tjf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|J70wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O452z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J70wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O452z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O452z4~0 .lut_mask = 64'h0200020000000000;
-defparam \soc_inst|m0_1|u_logic|O452z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~2 .lut_mask = 64'h80C080C000000000;
+defparam \soc_inst|m0_1|u_logic|J70wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~3 (
+// Location: LABCELL_X27_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|C552z4~0_combout  & ( !\soc_inst|m0_1|u_logic|O452z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M352z4~0_combout  & (!\soc_inst|m0_1|u_logic|T352z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|J70wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ba0wx4~combout  & ( \soc_inst|m0_1|u_logic|J70wx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M352z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T352z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|C552z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O452z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J70wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .lut_mask = 64'h80C0000000000000;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~0 .lut_mask = 64'h00000000000057FF;
+defparam \soc_inst|m0_1|u_logic|J70wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y4_N16
-dffeas \soc_inst|m0_1|u_logic|Eif3z4 (
+// Location: FF_X29_Y9_N43
+dffeas \soc_inst|m0_1|u_logic|Y1n2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eif3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Y1n2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eif3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eif3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X45_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~2_combout  = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Orj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Eif3z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Eif3z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Eif3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X45_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~5_combout  = ( \soc_inst|m0_1|u_logic|R6cwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|R6cwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|R6cwx4~0_combout  & (\soc_inst|m0_1|u_logic|R6cwx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|R6cwx4~1_combout  & !\soc_inst|m0_1|u_logic|I852z4~0_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|R6cwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R6cwx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R6cwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I852z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R6cwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .lut_mask = 64'h0000200000000000;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y1n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N54
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[23]~0 (
+// Location: LABCELL_X29_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~3 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[23]~0_combout  = ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|G4qwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Y1n2z4~q  & ( \soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y1n2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y1n2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Y1n2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vcv2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[23]~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G4qwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[23]~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[23]~0 .lut_mask = 64'hF3F0F3F0C0F0C0F0;
-defparam \soc_inst|ram_1|data_to_memory[23]~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .lut_mask = 64'h000C000400080000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V4ovx4~0 (
+// Location: MLABCELL_X28_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V4ovx4~0_combout  = (\soc_inst|ram_1|data_to_memory[23]~0_combout  & \soc_inst|m0_1|u_logic|K3l2z4~q )
+// \soc_inst|m0_1|u_logic|G4qwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|V883z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|M3u2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|V883z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|M3u2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|data_to_memory[23]~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|M3u2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|V883z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G4qwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .lut_mask = 64'h000F000F000F000F;
-defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .lut_mask = 64'h0000501000004000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N34
-dffeas \soc_inst|m0_1|u_logic|Vfd3z4 (
+// Location: FF_X28_Y7_N32
+dffeas \soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vfd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vfd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vfd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~0 (
+// Location: MLABCELL_X28_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6xwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uqi2z4~q  & ( ((\soc_inst|m0_1|u_logic|E0uvx4~combout  & \soc_inst|m0_1|u_logic|Svs2z4~q )) # (\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uqi2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|E0uvx4~combout  & \soc_inst|m0_1|u_logic|Svs2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|G4qwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mz63z4~q  & ( \soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mz63z4~q  & ( !\soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mz63z4~q  & ( !\soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mz63z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6xwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G4qwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .lut_mask = 64'h005500550F5F0F5F;
-defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .lut_mask = 64'h00A0008000200000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~1 (
+// Location: LABCELL_X29_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6xwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R6xwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uls2z4~q  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|R6xwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|G4qwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Md93z4~q  & ( \soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Md93z4~q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Md93z4~q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|R6xwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Md93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J0n2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6xwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G4qwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .lut_mask = 64'hFFF00000CCC00000;
-defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .lut_mask = 64'h0101010000010000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~2 (
+// Location: LABCELL_X29_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6xwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R6xwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|Vfd3z4~q  & \soc_inst|m0_1|u_logic|N1uvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|G4qwx4~combout  = ( !\soc_inst|m0_1|u_logic|G4qwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|G4qwx4~3_combout  & (!\soc_inst|m0_1|u_logic|G4qwx4~2_combout  & !\soc_inst|m0_1|u_logic|G4qwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vfd3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R6xwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|G4qwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G4qwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G4qwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6xwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G4qwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .lut_mask = 64'h00000000F0F5F0F5;
-defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jca3z4~0 (
+// Location: LABCELL_X24_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jca3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|V4ovx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|D9uwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|D9uwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y12_N31
-dffeas \soc_inst|m0_1|u_logic|Jca3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jca3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jca3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jca3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~5 (
+// Location: LABCELL_X24_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Uei3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~86  ))
+// \soc_inst|m0_1|u_logic|Qtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~86 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~5_sumout ),
+	.combout(\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~5 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zmmvx4~0 (
+// Location: MLABCELL_X21_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zmmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uei3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~5_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Jca3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uei3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~5_sumout )) 
-// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((\soc_inst|m0_1|u_logic|Jca3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uei3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Uei3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Rilwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ecowx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|L8m2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add0~5_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jca3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8m2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zmmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rilwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .lut_mask = 64'h00FFFFFF8DFF8DFF;
-defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y11_N43
-dffeas \soc_inst|m0_1|u_logic|Uei3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zmmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uei3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uei3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uei3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .lut_mask = 64'hFF55FF5500000000;
+defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y9_N14
-dffeas \soc_inst|switches_1|switch_store[1][7] (
+// Location: FF_X19_Y17_N8
+dffeas \soc_inst|switches_1|switch_store[1][3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[7]~input_o ),
+	.asdata(\SW[3]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -65310,40 +66041,40 @@ dffeas \soc_inst|switches_1|switch_store[1][7] (
 	.ena(\soc_inst|switches_1|always0~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][7]~q ),
+	.q(\soc_inst|switches_1|switch_store[1][3]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][7] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][7] .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[1][3] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][3] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X15_Y9_N0
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[23]~3 (
+// Location: MLABCELL_X28_Y17_N54
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[19]~18 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[23]~3_combout  = ( \soc_inst|ram_1|data_to_memory[23]~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ) # (\soc_inst|ram_1|byte_select [2]))) ) ) # ( 
-// !\soc_inst|ram_1|data_to_memory[23]~0_combout  & ( (!\soc_inst|ram_1|byte_select [2] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) ) )
+// \soc_inst|ram_1|data_to_memory[19]~18_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & !\soc_inst|ram_1|byte_select[2]~DUPLICATE_q )) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ))) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [2]),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ),
+	.datad(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|data_to_memory[23]~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[23]~3_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[19]~18_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[23]~3 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[23]~3 .lut_mask = 64'h0022002200770077;
-defparam \soc_inst|ram_1|data_to_memory[23]~3 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[19]~18 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[19]~18 .lut_mask = 64'h0333033303000300;
+defparam \soc_inst|ram_1|data_to_memory[19]~18 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X14_Y9_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 (
+// Location: M10K_X26_Y9_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 (
 	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
@@ -65359,7 +66090,7 @@ cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 (
 	.clr0(gnd),
 	.clr1(gnd),
 	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[23]~3_combout ,\soc_inst|ram_1|data_to_memory[7]~4_combout }),
+	.portadatain({\soc_inst|ram_1|data_to_memory[19]~18_combout ,\soc_inst|ram_1|data_to_memory[11]~17_combout }),
 	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
 \soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
 \soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
@@ -65372,2868 +66103,2841 @@ cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_bit_number = 7;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_bit_number = 7;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init0 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029249242C1040001218480A0000000000204204204204204204204907FFFFFFFFFFFFC33002000000000000000000001554";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_bit_number = 11;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_bit_number = 11;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A6BA6001C08432C03F03C043B8E63B0C0300300300300300300300F0000000000000000644000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N12
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[23]~8 (
+// Location: LABCELL_X22_Y17_N15
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[11]~17 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[11]~17_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ) # (!\soc_inst|ram_1|byte_select 
+// [1]))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & \soc_inst|ram_1|byte_select [1])) ) )
+
+	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.datad(!\soc_inst|ram_1|byte_select [1]),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|ram_1|data_to_memory[11]~17_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[11]~17 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[11]~17 .lut_mask = 64'h0050005055505550;
+defparam \soc_inst|ram_1|data_to_memory[11]~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y17_N6
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[19]~25 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[19]~25_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
+// (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # ((\soc_inst|switches_1|switch_store[1][3]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( 
+// (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][3]~q )))) ) 
+// )
+
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[1][3]~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[19]~25 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[19]~25 .lut_mask = 64'hC0D1C0D1E2F3E2F3;
+defparam \soc_inst|interconnect_1|HRDATA[19]~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~1 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[23]~8_combout  = ( \soc_inst|switches_1|switch_store[1][7]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
-// (\soc_inst|interconnect_1|HRDATA[20]~7_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][7]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & 
-// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][7]~q  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & 
-// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][7]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
-// !\soc_inst|interconnect_1|HRDATA[20]~7_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Rilwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rilwx4~0_combout  & ( \soc_inst|interconnect_1|HRDATA[19]~25_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Jpa3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rilwx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[19]~25_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Jpa3z4~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datae(!\soc_inst|switches_1|switch_store[1][7]~q ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ),
+	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rilwx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rilwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[23]~8 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[23]~8 .lut_mask = 64'hC0C0C0CFCFC0CFCF;
-defparam \soc_inst|interconnect_1|HRDATA[23]~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .lut_mask = 64'h0000FF0F0000CC0C;
+defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Walwx4~0 (
+// Location: LABCELL_X22_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Walwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[23]~8_combout  & ( ((!\soc_inst|m0_1|u_logic|Uei3z4~q  & \soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[23]~8_combout  & ( (!\soc_inst|m0_1|u_logic|Uei3z4~q  & \soc_inst|m0_1|u_logic|I7owx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Rilwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Qtdwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Qtdwx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rilwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .lut_mask = 64'h00CD00CD00EF00EF;
+defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bo0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bo0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & \soc_inst|m0_1|u_logic|Phlwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & \soc_inst|m0_1|u_logic|Phlwx4~0_combout )) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Bo0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .lut_mask = 64'h33F333F300F000F0;
+defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bo0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bo0wx4~combout  = ( !\soc_inst|m0_1|u_logic|Bo0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rilwx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & (((\soc_inst|m0_1|u_logic|Yilwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rilwx4~2_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bo0wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bo0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bo0wx4 .lut_mask = 64'h135F135F00000000;
+defparam \soc_inst|m0_1|u_logic|Bo0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Un0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Un0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Walwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Un0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Walwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Walwx4~0 .lut_mask = 64'h222222222F2F2F2F;
-defparam \soc_inst|m0_1|u_logic|Walwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .lut_mask = 64'hEDDEED84ED00ED00;
+defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Walwx4~1 (
+// Location: MLABCELL_X34_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xl0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Walwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Walwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Jca3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|Walwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Jca3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Walwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Jca3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xl0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( (\soc_inst|m0_1|u_logic|Un0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( (\soc_inst|m0_1|u_logic|Un0wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( 
+// (\soc_inst|m0_1|u_logic|Un0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R6xwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jca3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Walwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Un0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xl0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Walwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Walwx4~1 .lut_mask = 64'h8C0000008C008C00;
-defparam \soc_inst|m0_1|u_logic|Walwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .lut_mask = 64'h0B000B0000000B00;
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U72wx4~0 (
+// Location: LABCELL_X27_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xl0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U72wx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Walwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & (\soc_inst|m0_1|u_logic|Pmnwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Walwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Walwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Walwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( \soc_inst|m0_1|u_logic|Xl0wx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xl0wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U72wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U72wx4~0 .lut_mask = 64'h3303FF0F11015505;
-defparam \soc_inst|m0_1|u_logic|U72wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .lut_mask = 64'h00000000000057FF;
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y12_N50
-dffeas \soc_inst|m0_1|u_logic|Jwf3z4 (
+// Location: FF_X30_Y7_N53
+dffeas \soc_inst|m0_1|u_logic|Pap2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pap2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jwf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jwf3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~97 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~102  ))
-// \soc_inst|m0_1|u_logic|Add2~98  = CARRY(( !\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~102  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~102 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~97_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~98 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~97 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~97 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~97 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pap2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pap2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sdhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add2~97_sumout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jwf3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~97_sumout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add2~97_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jwf3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~97_sumout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add2~97_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y9_N43
+dffeas \soc_inst|m0_1|u_logic|Zfv2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zfv2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .lut_mask = 64'hFF55F055CC44C044;
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zfv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zfv2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sdhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|H4nwx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sdhvx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .lut_mask = 64'h00000000FD00FD00;
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~0 (
+// Location: LABCELL_X30_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sdhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U72wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U72wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Bjxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|A9p2z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q  
+// & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|A9p2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Pap2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Zfv2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Pap2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Zfv2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sdhvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pap2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zfv2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|A9p2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .lut_mask = 64'h00000000AAAAFFAB;
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .lut_mask = 64'h5353535300F00FFF;
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y12_N49
-dffeas \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE (
+// Location: FF_X24_Y9_N56
+dffeas \soc_inst|m0_1|u_logic|Zb83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Zb83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zb83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zb83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~93 (
+// Location: LABCELL_X30_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~98  ))
-// \soc_inst|m0_1|u_logic|Add2~94  = CARRY(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~98  ))
+// \soc_inst|m0_1|u_logic|Bjxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Zb83z4~q  & ( (\soc_inst|m0_1|u_logic|Q6u2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Zb83z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ecp2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Q273z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Zb83z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Q6u2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Zb83z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Ecp2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Q273z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Q273z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ecp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6u2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zb83z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~98 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~93_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~94 ),
+	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~93 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~93 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~93 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .lut_mask = 64'h1D1D00CC1D1D33FF;
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qjhvx4~0 (
+// Location: LABCELL_X30_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~93_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dkx2z4~q 
-// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~93_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Dkx2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Bjxwx4~combout  = ( \soc_inst|m0_1|u_logic|Bjxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Bjxwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Bjxwx4~1_combout  & 
+// ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add2~93_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qjhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .lut_mask = 64'h3300330077447744;
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4 .lut_mask = 64'h3322332211001100;
+defparam \soc_inst|m0_1|u_logic|Bjxwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I21wx4~0 (
+// Location: LABCELL_X35_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X892z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I21wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|X892z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xyh3z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xyh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I21wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X892z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I21wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I21wx4~0 .lut_mask = 64'h5055F0FF10113033;
-defparam \soc_inst|m0_1|u_logic|I21wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X892z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X892z4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|X892z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I21wx4 (
+// Location: FF_X35_Y9_N44
+dffeas \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I21wx4~combout  = ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|I21wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Fjlwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|I21wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|A792z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ht53z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Yj43z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I21wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ht53z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yj43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I21wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|A792z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I21wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I21wx4 .lut_mask = 64'h000000003F3F2A3F;
-defparam \soc_inst|m0_1|u_logic|I21wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~0 .lut_mask = 64'h000000000C000808;
+defparam \soc_inst|m0_1|u_logic|A792z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qjhvx4~1 (
+// Location: FF_X34_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( \soc_inst|m0_1|u_logic|I21wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( \soc_inst|m0_1|u_logic|I21wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout  & \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( !\soc_inst|m0_1|u_logic|I21wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout  & (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|H4nwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( !\soc_inst|m0_1|u_logic|I21wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout  & (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|H4nwx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|A792z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tvh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tvh3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tvh3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I21wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tvh3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qjhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A792z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .lut_mask = 64'h0C0008000C0C0808;
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~2 .lut_mask = 64'h3000100020000000;
+defparam \soc_inst|m0_1|u_logic|A792z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y13_N55
-dffeas \soc_inst|m0_1|u_logic|Dkx2z4 (
+// Location: FF_X33_Y7_N20
+dffeas \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qjhvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dkx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dkx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X21_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vpovx4 (
+// Location: LABCELL_X33_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vpovx4~combout  = ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~89_sumout )) # 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~89_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~89_sumout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~89_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|A792z4~1_combout  = ( !\soc_inst|m0_1|u_logic|G123z4~q  & ( \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G123z4~q  & ( !\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G123z4~q  & ( !\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add3~89_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|G123z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|A792z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vpovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vpovx4 .lut_mask = 64'h005533770F5F3F7F;
-defparam \soc_inst|m0_1|u_logic|Vpovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~1 .lut_mask = 64'h00A0002000800000;
+defparam \soc_inst|m0_1|u_logic|A792z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eijvx4~0 (
+// Location: LABCELL_X35_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eijvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( \soc_inst|m0_1|u_logic|Vpovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( \soc_inst|m0_1|u_logic|Vpovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( !\soc_inst|m0_1|u_logic|Vpovx4~combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( !\soc_inst|m0_1|u_logic|Vpovx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|A792z4~3_combout  = ( !\soc_inst|m0_1|u_logic|A792z4~2_combout  & ( !\soc_inst|m0_1|u_logic|A792z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X892z4~0_combout  & (!\soc_inst|m0_1|u_logic|A792z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X892z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|A792z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|A792z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A792z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A792z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .lut_mask = 64'h00F3FFF300A2AAA2;
-defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|A792z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y5_N7
-dffeas \soc_inst|m0_1|u_logic|Ym93z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ym93z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wo0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|A792z4~3_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|L7p2z4~q ))) 
+// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Bjxwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|A792z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|L7p2z4~q ))) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Bjxwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|A792z4~3_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|L7p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|A792z4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|L7p2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A792z4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ym93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ym93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .lut_mask = 64'hFFF50F05FBF10B01;
+defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~4 (
+// Location: LABCELL_X31_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ql0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~4_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Y6o2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Y6o2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ql0wx4~combout  = ( \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~65_sumout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~65_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~65_sumout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~65_sumout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y6o2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add3~65_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~4 .lut_mask = 64'hA000400000004000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ql0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ql0wx4 .lut_mask = 64'h003355770F3F5F7F;
+defparam \soc_inst|m0_1|u_logic|Ql0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skv2z4~feeder (
+// Location: LABCELL_X35_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xvjvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Skv2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Xvjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( \soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( \soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Skv2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skv2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Skv2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Skv2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .lut_mask = 64'h00DDFFDD00D0F0D0;
+defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X52_Y9_N53
-dffeas \soc_inst|m0_1|u_logic|Skv2z4 (
+// Location: FF_X35_Y15_N8
+dffeas \soc_inst|m0_1|u_logic|L7p2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Skv2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Skv2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Skv2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X45_Y8_N52
-dffeas \soc_inst|m0_1|u_logic|Jbu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|L7p2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jbu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jbu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L7p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L7p2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~0 (
+// Location: LABCELL_X31_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jbu2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Skv2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jbu2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Skv2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xu82z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Avg3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Ltg3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Avg3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Ltg3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Skv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Jbu2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ltg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Avg3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu82z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~0 .lut_mask = 64'h0000000000E00020;
-defparam \soc_inst|m0_1|u_logic|W21wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y8_N38
-dffeas \soc_inst|m0_1|u_logic|J5o2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J5o2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J5o2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .lut_mask = 64'h0E00000004000000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y8_N47
-dffeas \soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE (
+// Location: FF_X31_Y7_N17
+dffeas \soc_inst|m0_1|u_logic|Vgg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Vgg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vgg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~2 (
+// Location: LABCELL_X31_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|J5o2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xu82z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Kig3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Vgg3z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Kig3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Vgg3z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Kig3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J5o2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vgg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kig3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~2 .lut_mask = 64'h0000541000000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .lut_mask = 64'h0050004000000040;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y7_N44
-dffeas \soc_inst|m0_1|u_logic|N8o2z4 (
+// Location: FF_X30_Y6_N2
+dffeas \soc_inst|m0_1|u_logic|Zjg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N8o2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zjg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N8o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N8o2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zjg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~1 (
+// Location: LABCELL_X30_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Z523z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|N8o2z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Xu82z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zjg3z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Olg3z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z523z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|N8o2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zjg3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Olg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu82z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~1 .lut_mask = 64'h00A0880000000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .lut_mask = 64'h00000000C000A000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N37
-dffeas \soc_inst|m0_1|u_logic|O403z4 (
+// Location: FF_X31_Y8_N47
+dffeas \soc_inst|m0_1|u_logic|Pwg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O403z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pwg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O403z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O403z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~5 (
+// Location: LABCELL_X31_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uw82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|I113z4~q  & ( \soc_inst|m0_1|u_logic|O403z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I113z4~q  & ( !\soc_inst|m0_1|u_logic|O403z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I113z4~q  & ( !\soc_inst|m0_1|u_logic|O403z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Uw82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Pwg3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|I113z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O403z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pwg3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uw82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~5 .lut_mask = 64'h00C0004000800000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~6 (
+// Location: LABCELL_X31_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|W21wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|W21wx4~3_combout  & (!\soc_inst|m0_1|u_logic|W21wx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|W21wx4~0_combout  & !\soc_inst|m0_1|u_logic|W21wx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xu82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Xu82z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Uw82z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xu82z4~2_combout  & (!\soc_inst|m0_1|u_logic|Xu82z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eyg3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W21wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W21wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W21wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W21wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W21wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xu82z4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xu82z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eyg3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xu82z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uw82z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu82z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~6 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .lut_mask = 64'h8808000000000000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfawx4~0 (
+// Location: LABCELL_X33_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fj0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Tzg3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Dmvwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Tzg3z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xu82z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .lut_mask = 64'hFFFF0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .lut_mask = 64'hF0F0FF55F0F0BB11;
+defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfawx4~1 (
+// Location: LABCELL_X30_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ri0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mddwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kfawx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|W21wx4~6_combout  & \soc_inst|m0_1|u_logic|W21wx4~8_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kfawx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|W21wx4~6_combout  & \soc_inst|m0_1|u_logic|W21wx4~8_combout )) # 
-// (\soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M9awx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|M9awx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kfawx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ri0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .lut_mask = 64'h00000000777F555F;
-defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .lut_mask = 64'h00A55AFF00A55AFF;
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y7_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G11wx4~1 (
+// Location: LABCELL_X30_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ri0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G11wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ri0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fj0wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ri0wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G11wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G11wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G11wx4~1 .lut_mask = 64'h05F5505F05F5505F;
-defparam \soc_inst|m0_1|u_logic|G11wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .lut_mask = 64'h00C000FF00EA00FF;
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G11wx4~0 (
+// Location: LABCELL_X30_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wh0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G11wx4~0_combout  = ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) # (\soc_inst|m0_1|u_logic|G11wx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|G11wx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Wh0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|M9awx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G11wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G11wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G11wx4~0 .lut_mask = 64'h00008F8F0000FF8F;
-defparam \soc_inst|m0_1|u_logic|G11wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .lut_mask = 64'h1122000011220000;
+defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~1 (
+// Location: LABCELL_X30_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bh0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qz0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|W21wx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|U11wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|W21wx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|U11wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~combout  ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|U11wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Bh0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wh0wx4~0_combout  & \soc_inst|m0_1|u_logic|Hk0wx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bh0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .lut_mask = 64'h0440FFFF04400440;
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .lut_mask = 64'hA0A0A0A000A000A0;
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~2 (
+// Location: LABCELL_X23_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tj0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qz0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qz0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qz0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Tj0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout )) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tj0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .lut_mask = 64'hC0C0000000C00000;
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .lut_mask = 64'hCF0FCF0FCC00CC00;
+defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~0 (
+// Location: LABCELL_X24_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tj0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout  & \soc_inst|m0_1|u_logic|I21wx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout  & (\soc_inst|m0_1|u_logic|I21wx4~combout  & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout  & (\soc_inst|m0_1|u_logic|I21wx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout  & 
-// (\soc_inst|m0_1|u_logic|I21wx4~combout  & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Tj0wx4~combout  = ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tj0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tj0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qz0wx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I21wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tj0wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .lut_mask = 64'h0105010501050505;
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y7_N25
-dffeas \soc_inst|m0_1|u_logic|Y6o2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y6o2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y6o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y6o2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tj0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tj0wx4 .lut_mask = 64'h7000700077007700;
+defparam \soc_inst|m0_1|u_logic|Tj0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~3 (
+// Location: MLABCELL_X25_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ia0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nrvwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Skv2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Y6o2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Skv2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Y6o2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ia0wx4~combout  = ( \soc_inst|m0_1|u_logic|D31wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D31wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y6o2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Skv2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ia0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .lut_mask = 64'h0405040000000000;
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ia0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ia0wx4 .lut_mask = 64'h10F010F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ia0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~0 (
+// Location: LABCELL_X30_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bh0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nrvwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|J773z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|N8o2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|J773z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|N8o2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Bh0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ia0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Bh0wx4~0_combout  & (\soc_inst|m0_1|u_logic|Tj0wx4~combout  & ((!\soc_inst|m0_1|u_logic|Add5~53_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|N8o2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J773z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bh0wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ia0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .lut_mask = 64'h00C4000000800000;
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .lut_mask = 64'h0000000000450045;
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y9_N47
-dffeas \soc_inst|m0_1|u_logic|Jl93z4 (
+// Location: FF_X31_Y6_N47
+dffeas \soc_inst|m0_1|u_logic|Wrg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jl93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wrg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jl93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jl93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wrg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wrg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~1 (
+// Location: FF_X31_Y6_N1
+dffeas \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nrvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jl93z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|J5o2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jl93z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|J5o2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Dmvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Gfg3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Hqg3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Wrg3z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J5o2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Jl93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wrg3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hqg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gfg3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .lut_mask = 64'h0000000004050400;
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .lut_mask = 64'h555533330F0F00FF;
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y8_N47
-dffeas \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE (
+// Location: FF_X30_Y7_N8
+dffeas \soc_inst|m0_1|u_logic|Sog3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Sog3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sog3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sog3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~2 (
+// Location: LABCELL_X30_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nrvwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Jbu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Jbu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Jbu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Dmvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Nag3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Ccg3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Dng3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Sog3z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ccg3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nag3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sog3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dng3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .lut_mask = 64'h0050004000100000;
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .lut_mask = 64'h0F0F00FF55553333;
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4 (
+// Location: LABCELL_X30_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nrvwx4~combout  = ( !\soc_inst|m0_1|u_logic|Nrvwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Nrvwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nrvwx4~3_combout  & !\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Dmvwx4~combout  = ( \soc_inst|m0_1|u_logic|Dmvwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Dmvwx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Dmvwx4~0_combout  
+// & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nrvwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nrvwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nrvwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nrvwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nrvwx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|Nrvwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4 .lut_mask = 64'h3131313120202020;
+defparam \soc_inst|m0_1|u_logic|Dmvwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxdwx4~0 (
+// Location: LABCELL_X24_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Xtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dmvwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|Dmvwx4~combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .lut_mask = 64'hF000F000FF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X0ewx4~0 (
+// Location: LABCELL_X24_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eudwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X0ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|H1qwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|H1qwx4~combout ) # (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Eudwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xtdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eudwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xtdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Eudwx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .lut_mask = 64'hFFF0FFF000F000F0;
-defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X0ewx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|X0ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|X0ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X0ewx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Yxdwx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: IOIBUF_X8_Y0_N35
+cyclonev_io_ibuf \SW[2]~input (
+	.i(SW[2]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[2]~input_o ));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .shared_arith = "off";
+defparam \SW[2]~input .bus_hold = "false";
+defparam \SW[2]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: FF_X28_Y9_N47
-dffeas \soc_inst|m0_1|u_logic|C9a3z4 (
+// Location: FF_X22_Y17_N38
+dffeas \soc_inst|switches_1|switch_store[1][2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.asdata(\SW[2]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C9a3z4~q ),
+	.q(\soc_inst|switches_1|switch_store[1][2]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C9a3z4 .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[1][2] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~13 (
+// Location: MLABCELL_X28_Y17_N15
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[18]~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zva3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~26  ))
-// \soc_inst|m0_1|u_logic|Add0~14  = CARRY(( !\soc_inst|m0_1|u_logic|Zva3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~26  ))
+// \soc_inst|ram_1|data_to_memory[18]~6_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select[2]~DUPLICATE_q )) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~26 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~13_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~14 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~13 .lut_mask = 64'h000000000000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add0~13 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X23_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mqmvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zva3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) # (\soc_inst|m0_1|u_logic|C9a3z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zva3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|C9a3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Zva3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~13_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zva3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~13_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C9a3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Add0~13_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mqmvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[18]~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .lut_mask = 64'h50FFFAFF11FFBBFF;
-defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[18]~6 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[18]~6 .lut_mask = 64'h030F030F03000300;
+defparam \soc_inst|ram_1|data_to_memory[18]~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y11_N14
-dffeas \soc_inst|m0_1|u_logic|Zva3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mqmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+// Location: M10K_X26_Y15_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[18]~6_combout ,\soc_inst|ram_1|data_to_memory[10]~5_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zva3z4~q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zva3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zva3z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_bit_number = 10;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_bit_number = 10;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B659EF10300000010004040000020000000000000000000000000501555555555555412841000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~49 (
+// Location: MLABCELL_X25_Y17_N0
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[10]~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|She3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~14  ))
-// \soc_inst|m0_1|u_logic|Add0~50  = CARRY(( !\soc_inst|m0_1|u_logic|She3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~14  ))
+// \soc_inst|ram_1|data_to_memory[10]~5_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select [1]) # (!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout 
+// ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|byte_select [1] & !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|She3z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|byte_select [1]),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~14 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~49_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~50 ),
+	.combout(\soc_inst|ram_1|data_to_memory[10]~5_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~49 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~49 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~49 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y9_N38
-dffeas \soc_inst|m0_1|u_logic|Bge3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bge3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bge3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bge3z4 .power_up = "low";
+defparam \soc_inst|ram_1|data_to_memory[10]~5 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[10]~5 .lut_mask = 64'h0300030033303330;
+defparam \soc_inst|ram_1|data_to_memory[10]~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fqmvx4~0 (
+// Location: LABCELL_X22_Y17_N45
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[18]~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|She3z4~q  & ( \soc_inst|m0_1|u_logic|Bge3z4~q  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~49_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|She3z4~q  & ( \soc_inst|m0_1|u_logic|Bge3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~49_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|She3z4~q  & ( !\soc_inst|m0_1|u_logic|Bge3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~49_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|She3z4~q  & ( !\soc_inst|m0_1|u_logic|Bge3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~49_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|interconnect_1|HRDATA[18]~13_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
+// (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|Equal1~0_combout )) # (\soc_inst|switches_1|switch_store[1][2]~q ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( 
+// (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (\soc_inst|switches_1|switch_store[1][2]~q  & (\soc_inst|interconnect_1|Equal1~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~49_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|She3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bge3z4~q ),
+	.dataa(!\soc_inst|switches_1|switch_store[1][2]~q ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fqmvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .lut_mask = 64'h3B33FBF33F37FFF7;
-defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y11_N55
-dffeas \soc_inst|m0_1|u_logic|She3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fqmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|She3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|She3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|She3z4 .power_up = "low";
+defparam \soc_inst|interconnect_1|HRDATA[18]~13 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[18]~13 .lut_mask = 64'hF101F101FD0DFD0D;
+defparam \soc_inst|interconnect_1|HRDATA[18]~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~1 (
+// Location: MLABCELL_X21_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whlwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bge3z4~q ) # ((\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[11]~24_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[11]~24_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ajmwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|Xyn2z4~q  & !\soc_inst|m0_1|u_logic|Ecowx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Ecowx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xyn2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bge3z4~q ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
-	.datae(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
 	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whlwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .lut_mask = 64'h00550055F0F5F0F5;
-defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .lut_mask = 64'hFF00000055000000;
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~0 (
+// Location: LABCELL_X22_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whlwx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Lee3z4~q )))) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Lee3z4~q )) # (\soc_inst|m0_1|u_logic|Ble3z4~q )))
+// \soc_inst|m0_1|u_logic|Ajmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ajmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|O0o2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|interconnect_1|HRDATA[18]~13_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|O0o2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ajmwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .lut_mask = 64'h0537053705370537;
-defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .lut_mask = 64'h00000000EE0EEE0E;
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~2 (
+// Location: LABCELL_X22_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whlwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Whlwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Whlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Whlwx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Whlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|She3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ajmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ajmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Asdwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Eudwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|She3z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Whlwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Whlwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ajmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whlwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .lut_mask = 64'hEFEF0000AAAA0000;
-defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .lut_mask = 64'h00000000CDEFCDEF;
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~3 (
+// Location: LABCELL_X22_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whlwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Vzdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Whlwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|X0ewx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Whlwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|X0ewx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Zluvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & \soc_inst|m0_1|u_logic|Omyvx4~1_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Omyvx4~1_combout ))))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Whlwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zluvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .lut_mask = 64'h00AE00AE00BF00BF;
-defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .lut_mask = 64'hA0ECA0ECA0ECA0EC;
+defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L6nwx4 (
+// Location: LABCELL_X19_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L6nwx4~combout  = ( \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|C3w2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zluvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L6nwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zluvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L6nwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L6nwx4 .lut_mask = 64'h0000404000000000;
-defparam \soc_inst|m0_1|u_logic|L6nwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .lut_mask = 64'hFFFFC0C0C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjyvx4~0 (
+// Location: MLABCELL_X25_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & (!\soc_inst|m0_1|u_logic|L6nwx4~combout  & ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & !\soc_inst|m0_1|u_logic|L6nwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Zluvx4~2_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zluvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zluvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zluvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zluvx4~0_combout  & !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S6nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L6nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zluvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .lut_mask = 64'hA0A0A0A080A080A0;
-defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .lut_mask = 64'hA0A0A0AA00000000;
+defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~0 (
+// Location: MLABCELL_X25_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U0vvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & \soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & \soc_inst|m0_1|u_logic|Omyvx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Cr1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Nen2z4~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U0vvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .lut_mask = 64'hF0FCF0FC00CC00CC;
-defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .lut_mask = 64'h000000000000FFF0;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~1 (
+// Location: FF_X25_Y12_N55
+dffeas \soc_inst|m0_1|u_logic|Yfn2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yfn2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yfn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yfn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y12_N4
+dffeas \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Ylbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Psv2z4~q  & ( \soc_inst|m0_1|u_logic|Mhn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yfn2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Psv2z4~q  & ( \soc_inst|m0_1|u_logic|Mhn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Wzy2z4~q ) # ((\soc_inst|m0_1|u_logic|Yfn2z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Psv2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Mhn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Yfn2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q ) # 
+// ((\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Psv2z4~q  & ( !\soc_inst|m0_1|u_logic|Mhn2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yfn2z4~q )) 
+// # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yfn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Psv2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhn2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .lut_mask = 64'h00FF00CC00FF00C0;
-defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .lut_mask = 64'h021346578A9BCEDF;
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~0 (
+// Location: FF_X19_Y12_N55
+dffeas \soc_inst|m0_1|u_logic|Po83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Po83z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Po83z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N25
+dffeas \soc_inst|m0_1|u_logic|Ajn2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ajn2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ajn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|C3w2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q  & !\soc_inst|m0_1|u_logic|C3w2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ylbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ajn2z4~q  & ( \soc_inst|m0_1|u_logic|Gf73z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Gju2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Po83z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ajn2z4~q  & ( \soc_inst|m0_1|u_logic|Gf73z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Gju2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Po83z4~q ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ajn2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Gf73z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Wzy2z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Gju2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Po83z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ajn2z4~q  & ( !\soc_inst|m0_1|u_logic|Gf73z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Gju2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Po83z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gju2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Po83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ajn2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gf73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .lut_mask = 64'h8888888880008000;
-defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .lut_mask = 64'h1015B0B51A1FBABF;
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~2 (
+// Location: MLABCELL_X28_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Amyvx4~1_combout  & !\soc_inst|m0_1|u_logic|Amyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ylbwx4~combout  = ( \soc_inst|m0_1|u_logic|Ylbwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ylbwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ylbwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Amyvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Amyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .lut_mask = 64'h000000003F333F33;
-defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4 .lut_mask = 64'h3330333003000300;
+defparam \soc_inst|m0_1|u_logic|Ylbwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ykyvx4~0 (
+// Location: LABCELL_X24_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X77wx4~combout  & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((!\soc_inst|m0_1|u_logic|C3w2z4~q ) # ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q ))))) ) ) # ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .lut_mask = 64'hF0F0F0F0E0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .lut_mask = 64'hFF00FF000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~1 (
+// Location: LABCELL_X24_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jiowx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U0vvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Jiowx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jiowx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jiowx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Xmdwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U0vvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .lut_mask = 64'hFCF0FCF0CC00CC00;
-defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .lut_mask = 64'h505050505F5F5F5F;
+defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~2 (
+// Location: LABCELL_X24_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B28wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U0vvx4~2_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U0vvx4~0_combout  & !\soc_inst|m0_1|u_logic|U0vvx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U0vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout  & !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U0vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout  & !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U0vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout  & !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|B28wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qmdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jiowx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qmdwx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Jiowx4~1_combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U0vvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U0vvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .lut_mask = 64'hC000C000C000C0C0;
-defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B28wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B28wx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|B28wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~2 (
+// Location: MLABCELL_X21_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tlyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I30wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|I30wx4~1_combout  & \soc_inst|m0_1|u_logic|I30wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~33_sumout  & (!\soc_inst|m0_1|u_logic|I30wx4~1_combout  & \soc_inst|m0_1|u_logic|I30wx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Tlyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[0]~32_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Tlyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[0]~32_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|I30wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tlyvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I30wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I30wx4~2 .lut_mask = 64'h0000000000C000F0;
-defparam \soc_inst|m0_1|u_logic|I30wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .lut_mask = 64'h00C800C800FA00FA;
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N2
-dffeas \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X21_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K22wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K22wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout )))) ) ) )
 
-// Location: FF_X47_Y9_N58
-dffeas \soc_inst|m0_1|u_logic|Hbv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hbv2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|K22wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hbv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hbv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K22wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K22wx4~1 .lut_mask = 64'h003100F53131F5F5;
+defparam \soc_inst|m0_1|u_logic|K22wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~3 (
+// Location: MLABCELL_X21_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K22wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ebbwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Hbv2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|K22wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pmnwx4~combout  & (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pmnwx4~combout  & (((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Pmnwx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hbv2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K22wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .lut_mask = 64'h0022003000000000;
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K22wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K22wx4~0 .lut_mask = 64'h0000000077777770;
+defparam \soc_inst|m0_1|u_logic|K22wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y9_N5
-dffeas \soc_inst|m0_1|u_logic|T0m2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T0m2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zz1wx4~1_combout  & (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|Zz1wx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zz1wx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Zz1wx4~2_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Zz1wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zz1wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T0m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T0m2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .lut_mask = 64'h0000000000550001;
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y9_N11
-dffeas \soc_inst|m0_1|u_logic|Yb93z4 (
+// Location: FF_X24_Y10_N2
+dffeas \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yb93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yb93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yb93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~1 (
+// Location: LABCELL_X24_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ebbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Yb93z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|T0m2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Lr9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Otr2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Otr2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Otr2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T0m2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yb93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Otr2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .lut_mask = 64'h0000000000220030;
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .lut_mask = 64'h1010100000100000;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y8_N38
-dffeas \soc_inst|m0_1|u_logic|Y1u2z4 (
+// Location: FF_X25_Y10_N17
+dffeas \soc_inst|m0_1|u_logic|Cvr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y1u2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cvr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y1u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cvr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cvr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y8_N17
-dffeas \soc_inst|m0_1|u_logic|H783z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H783z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lr9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ii73z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Cvr2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ii73z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Cvr2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cvr2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ii73z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H783z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H783z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .lut_mask = 64'h0000880800008000;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~2 (
+// Location: LABCELL_X24_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ebbwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H783z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y1u2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Lr9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qyc3z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Asr2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y1u2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H783z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Asr2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qyc3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .lut_mask = 64'h000000A0000000C0;
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .lut_mask = 64'h0000000A0000000C;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y10_N59
-dffeas \soc_inst|m0_1|u_logic|Yx63z4 (
+// Location: FF_X23_Y9_N23
+dffeas \soc_inst|m0_1|u_logic|Rr83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yx63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rr83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yx63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yx63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rr83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y10_N2
-dffeas \soc_inst|m0_1|u_logic|V3m2z4 (
+// Location: FF_X23_Y9_N8
+dffeas \soc_inst|m0_1|u_logic|Imu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V3m2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Imu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V3m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V3m2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Imu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Imu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~0 (
+// Location: LABCELL_X23_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ebbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|V3m2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yx63z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V3m2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Yx63z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Lr9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rr83z4~q  & ( \soc_inst|m0_1|u_logic|Imu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rr83z4~q  & ( !\soc_inst|m0_1|u_logic|Imu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rr83z4~q  & ( !\soc_inst|m0_1|u_logic|Imu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yx63z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|V3m2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rr83z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Imu2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .lut_mask = 64'h0E00020000000000;
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .lut_mask = 64'h0202020000020000;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4 (
+// Location: LABCELL_X24_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ebbwx4~combout  = ( !\soc_inst|m0_1|u_logic|Ebbwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ebbwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ebbwx4~3_combout  & !\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Lr9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Lr9wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lr9wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lr9wx4~3_combout  & !\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ebbwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ebbwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lr9wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lr9wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebbwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebbwx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ebbwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jmdwx4~0 (
+// Location: LABCELL_X24_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bdwwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Fkdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bywwx4~combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .lut_mask = 64'h00FF00FF33333333;
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jmdwx4~1 (
+// Location: LABCELL_X24_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nodwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kw7wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Jmdwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nodwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fkdwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6twx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q6twx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Mcc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mcc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+// Location: FF_X19_Y18_N38
+dffeas \soc_inst|m0_1|u_logic|Wia3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wia3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wia3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wia3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6twx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X21_Y18_N31
+dffeas \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .lut_mask = 64'h005500550F5F0F5F;
-defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6twx4~1 (
+// Location: LABCELL_X27_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6twx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Q6twx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R0t2z4~q  & ((!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|S5b3z4~q )))) # (\soc_inst|m0_1|u_logic|R0t2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|S5b3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ihlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hub3z4~q  & ( 
+// \soc_inst|m0_1|u_logic|M5tvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R0t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S5b3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q6twx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6twx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .lut_mask = 64'hFCA8FCA800000000;
-defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .lut_mask = 64'h000055550F0F5F5F;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~0 (
+// Location: LABCELL_X19_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rhfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qfa3z4~q ) # ((\soc_inst|m0_1|u_logic|I7owx4~combout  & !\soc_inst|m0_1|u_logic|C4b3z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & 
-// ( (\soc_inst|m0_1|u_logic|I7owx4~combout  & !\soc_inst|m0_1|u_logic|C4b3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ihlwx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[3]~26_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[3]~26_combout  & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qfa3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .lut_mask = 64'h33003300F3F0F3F0;
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .lut_mask = 64'hCCC0CCC088808880;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~1 (
+// Location: LABCELL_X19_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rhfwx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[1]~21_combout  & ( !\soc_inst|m0_1|u_logic|Rhfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Q6twx4~1_combout ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[1]~21_combout  & ( !\soc_inst|m0_1|u_logic|Rhfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q6twx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ihlwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # ((\soc_inst|m0_1|u_logic|Wia3z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|I7owx4~combout  & (\soc_inst|m0_1|u_logic|W0b3z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Wia3z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q6twx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wia3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .lut_mask = 64'hAFAF8C8C00000000;
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .lut_mask = 64'h000000008CAF8CAF;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~2 (
+// Location: LABCELL_X23_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fkdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rhfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Jmdwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fkdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rhfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Jmdwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Nodwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
 	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .lut_mask = 64'h00000000AAAFFAFF;
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .lut_mask = 64'h00000000CDFDCDFD;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mx0wx4~0 (
+// Location: LABCELL_X23_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mx0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) # ((!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|U0vvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U0vvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .lut_mask = 64'hFCF0FCF0CC00CC00;
+defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mx0wx4 (
+// Location: LABCELL_X22_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mx0wx4~combout  = ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|U0vvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Omyvx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|U0vvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mx0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mx0wx4 .lut_mask = 64'h1050105030F030F0;
-defparam \soc_inst|m0_1|u_logic|Mx0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .lut_mask = 64'hCCFFCCCC00FF0000;
+defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~89 (
+// Location: MLABCELL_X25_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~94  ))
-// \soc_inst|m0_1|u_logic|Add2~90  = CARRY(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~94  ))
+// \soc_inst|m0_1|u_logic|U0vvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|U0vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U0vvx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~94 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~89_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~90 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~89 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~89 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~89 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~89_sumout  & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~89_sumout  & ( 
-// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Add2~89_sumout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|S5pvx4~combout  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add2~89_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U0vvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jjhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .lut_mask = 64'h00005555F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .lut_mask = 64'hF100F10000000000;
+defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjhvx4~1 (
+// Location: MLABCELL_X21_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bmhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~73_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Mx0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Mx0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bmhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~33_sumout  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & \soc_inst|m0_1|u_logic|Bmhvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Add5~33_sumout  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Bmhvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~33_sumout  & ( !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Bmhvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~33_sumout  & ( !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Bmhvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
 	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bmhvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .lut_mask = 64'h00000000D0D0D000;
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .lut_mask = 64'h0C0C08080F0F0A0A;
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y13_N52
-dffeas \soc_inst|m0_1|u_logic|Plx2z4 (
+// Location: FF_X21_Y14_N28
+dffeas \soc_inst|m0_1|u_logic|G7x2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Plx2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Plx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Plx2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bnx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout  & \soc_inst|m0_1|u_logic|Add2~73_sumout )) ) ) # ( !\soc_inst|m0_1|u_logic|Bnx2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|S5pvx4~combout  & \soc_inst|m0_1|u_logic|Add2~73_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~73_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .lut_mask = 64'h333F000C333F000C;
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y10_N53
-dffeas \soc_inst|switches_1|switch_store[1][2] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[2]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][2]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][2] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][2] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X24_Y5_N6
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[18]~6 (
-// Equation(s):
-// \soc_inst|ram_1|data_to_memory[18]~6_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select [2])) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select [2]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ))) ) )
-
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ),
-	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|byte_select [2]),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[18]~6_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[18]~6 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[18]~6 .lut_mask = 64'h1133113311001100;
-defparam \soc_inst|ram_1|data_to_memory[18]~6 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X26_Y3_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 (
-	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[18]~6_combout ,\soc_inst|ram_1|data_to_memory[10]~5_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_bit_number = 10;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_bit_number = 10;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B659EF10300000010004040000020000000000000000000000000501555555555555412841000000000000000000000000";
-// synopsys translate_on
-
-// Location: LABCELL_X24_Y9_N0
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[10]~5 (
-// Equation(s):
-// \soc_inst|ram_1|data_to_memory[10]~5_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select [1])) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ))) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
-	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datad(!\soc_inst|ram_1|byte_select [1]),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[10]~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G7x2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[10]~5 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[10]~5 .lut_mask = 64'h030F030F03000300;
-defparam \soc_inst|ram_1|data_to_memory[10]~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G7x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G7x2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N51
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[18]~13 (
+// Location: LABCELL_X36_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~29 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[18]~13_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[1][2]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|switches_1|switch_store[1][2]~q )))) ) )
+// \soc_inst|m0_1|u_logic|Add3~29_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Bnnvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tyx2z4~q  & (!\soc_inst|m0_1|u_logic|J4x2z4~q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( 
+// !VCC ))
+// \soc_inst|m0_1|u_logic|Add3~30  = CARRY(( (!\soc_inst|m0_1|u_logic|Bnnvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tyx2z4~q  & (!\soc_inst|m0_1|u_logic|J4x2z4~q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( !VCC 
+// ))
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[1][2]~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bnnvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ),
+	.dataf(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~29_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[18]~13 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[18]~13 .lut_mask = 64'hA0A3A0A3ACAFACAF;
-defparam \soc_inst|interconnect_1|HRDATA[18]~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~29 .lut_mask = 64'h000000FF0000FF08;
+defparam \soc_inst|m0_1|u_logic|Add3~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~0 (
+// Location: LABCELL_X36_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & \soc_inst|m0_1|u_logic|Xyn2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & !\soc_inst|m0_1|u_logic|Ecowx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Add3~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~30  ))
+// \soc_inst|m0_1|u_logic|Add3~26  = CARRY(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~30  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xyn2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~30 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~25_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .lut_mask = 64'hC0C0C0C000C000C0;
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~25 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~1 (
+// Location: LABCELL_X36_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~33 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ajmwx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[18]~13_combout  & (((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|O0o2z4~q )))) # 
-// (\soc_inst|interconnect_1|HRDATA[18]~13_combout  & (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|O0o2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Add3~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Cax2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~26  ))
+// \soc_inst|m0_1|u_logic|Add3~34  = CARRY(( !\soc_inst|m0_1|u_logic|Cax2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~26  ))
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ajmwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~33_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~34 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .lut_mask = 64'h00000000EE0EEE0E;
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~33 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~2 (
+// Location: LABCELL_X36_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~53 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Asdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ajmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Eudwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Asdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ajmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Eudwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Add3~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nbx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~34  ))
+// \soc_inst|m0_1|u_logic|Add3~54  = CARRY(( !\soc_inst|m0_1|u_logic|Nbx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~34  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ajmwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~34 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~53_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~54 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .lut_mask = 64'h0C0D0C0D0E0F0E0F;
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~53 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add3~53 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~0 (
+// Location: LABCELL_X36_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~49 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qkmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Nnc3z4~q )) # (\soc_inst|m0_1|u_logic|Ipn2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Nnc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Add3~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~54  ))
+// \soc_inst|m0_1|u_logic|Add3~50  = CARRY(( !\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~54  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~54 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~49_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~50 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .lut_mask = 64'h0505050505FF05FF;
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~49 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~49 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N33
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[10]~12 (
+// Location: LABCELL_X36_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~45 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[10]~12_combout  = ( \soc_inst|interconnect_1|HRDATA[11]~3_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[11]~3_combout  & ( 
-// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Add3~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~50  ))
+// \soc_inst|m0_1|u_logic|Add3~46  = CARRY(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~50  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~50 ),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~45_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~46 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[10]~12 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[10]~12 .lut_mask = 64'hF0F0F0F000FF00FF;
-defparam \soc_inst|interconnect_1|HRDATA[10]~12 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~45 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~45 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~1 (
+// Location: LABCELL_X36_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~41 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qkmwx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[10]~12_combout  & ( ((!\soc_inst|m0_1|u_logic|C9a3z4~q  & \soc_inst|m0_1|u_logic|G6owx4~combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[10]~12_combout  & ( (!\soc_inst|m0_1|u_logic|C9a3z4~q  & \soc_inst|m0_1|u_logic|G6owx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Add3~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~46  ))
+// \soc_inst|m0_1|u_logic|Add3~42  = CARRY(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~46  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|C9a3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~46 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~41_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~42 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .lut_mask = 64'h00CC00CC0FCF0FCF;
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~41 .lut_mask = 64'h0000FFFF0000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add3~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~2 (
+// Location: LABCELL_X36_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qkmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Zva3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Qkmwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~42  ))
+// \soc_inst|m0_1|u_logic|Add3~38  = CARRY(( !\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~42  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qkmwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~42 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~37_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~38 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .lut_mask = 64'hFAFABABA00000000;
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~37 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~3 (
+// Location: LABCELL_X36_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~81 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qkmwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sndwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qkmwx4~2_combout  & (((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mydwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qkmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Mydwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Add3~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~38  ))
+// \soc_inst|m0_1|u_logic|Add3~82  = CARRY(( !\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~38  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qkmwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~38 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~81_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~82 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .lut_mask = 64'h0C0E0C0E0D0F0D0F;
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~81 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~81 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et0wx4~0 (
+// Location: LABCELL_X36_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~77 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Et0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) # ((\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Add3~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Fhx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~82  ))
+// \soc_inst|m0_1|u_logic|Add3~78  = CARRY(( !\soc_inst|m0_1|u_logic|Fhx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~82  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fhx2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~82 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Et0wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~77_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~78 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .lut_mask = 64'hCFCCCFCC0F000F00;
-defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~77 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~77 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et0wx4 (
+// Location: LABCELL_X33_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Et0wx4~combout  = ( \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Et0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Et0wx4~0_combout  & (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout )))) ) )
+// \soc_inst|m0_1|u_logic|haddr_o~5_combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~17_sumout  ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Add3~105_sumout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// (\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|Add3~105_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Add3~105_sumout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Et0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add3~105_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Et0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Et0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Et0wx4 .lut_mask = 64'h080C080C88CC88CC;
-defparam \soc_inst|m0_1|u_logic|Et0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~5 .lut_mask = 64'h053705370537FFFF;
+defparam \soc_inst|m0_1|u_logic|haddr_o~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjhvx4~1 (
+// Location: LABCELL_X33_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9jvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Et0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Et0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|A9jvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Et0wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .lut_mask = 64'h00000000CC0C8808;
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .lut_mask = 64'h0B0BFBFB0B00FB00;
+defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y13_N1
-dffeas \soc_inst|m0_1|u_logic|Bnx2z4 (
+// Location: FF_X33_Y6_N35
+dffeas \soc_inst|m0_1|u_logic|Slr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -68242,815 +68946,1151 @@ dffeas \soc_inst|m0_1|u_logic|Bnx2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Slr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bnx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bnx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Slr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Slr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fq0wx4 (
+// Location: FF_X21_Y12_N56
+dffeas \soc_inst|m0_1|u_logic|Vr43z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vr43z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vr43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y9_N16
+dffeas \soc_inst|m0_1|u_logic|E163z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|E163z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E163z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E163z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fq0wx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~69_sumout )) # 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~69_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~69_sumout )) # (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~69_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|I3a2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Vr43z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|E163z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~69_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vr43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|E163z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|I3a2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fq0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fq0wx4 .lut_mask = 64'h0505373705FF37FF;
-defparam \soc_inst|m0_1|u_logic|Fq0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .lut_mask = 64'h000000000000AC00;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irjvx4~0 (
+// Location: FF_X23_Y13_N50
+dffeas \soc_inst|m0_1|u_logic|Z0g3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z0g3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z0g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z0g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5a2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Irjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fq0wx4~combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|Fq0wx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|F5a2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Z0g3z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z0g3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Irjvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F5a2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .lut_mask = 64'h5151FBFB5100FB00;
-defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y6_N19
-dffeas \soc_inst|m0_1|u_logic|W5p2z4 (
+// Location: FF_X33_Y12_N20
+dffeas \soc_inst|m0_1|u_logic|O2g3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Irjvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|O2g3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W5p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W5p2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O2g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O2g3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~1 (
+// Location: LABCELL_X33_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q 
-//  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|I3a2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mi33z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Mi33z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|D923z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mi33z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|D923z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|D923z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mi33z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I3a2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~1 .lut_mask = 64'h8200800002000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .lut_mask = 64'h0800080008080000;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y6_N10
-dffeas \soc_inst|m0_1|u_logic|Wu53z4 (
+// Location: FF_X21_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Vxf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vxf3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vxf3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vxf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vxf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y12_N28
+dffeas \soc_inst|m0_1|u_logic|Kzf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wu53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kzf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wu53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wu53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kzf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kzf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~3 (
+// Location: LABCELL_X22_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ec33z4~q  & ( (!\soc_inst|m0_1|u_logic|Wu53z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ec33z4~q  & ( (!\soc_inst|m0_1|u_logic|Wu53z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ec33z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|I3a2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Vxf3z4~q  & ( \soc_inst|m0_1|u_logic|Kzf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vxf3z4~q  & ( !\soc_inst|m0_1|u_logic|Kzf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vxf3z4~q  & ( !\soc_inst|m0_1|u_logic|Kzf3z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wu53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ec33z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vxf3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kzf3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|I3a2z4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .lut_mask = 64'h0808080000080000;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I3a2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|I3a2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|I3a2z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|I3a2z4~0_combout  & (!\soc_inst|m0_1|u_logic|F5a2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|O2g3z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I3a2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|F5a2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O2g3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|I3a2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I3a2z4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|I3a2z4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .lut_mask = 64'h80C0000000000000;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ra1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|I3a2z4~3_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3a2z4~3_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Slr2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|I3a2z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Slr2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3a2z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Slr2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I3a2z4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .lut_mask = 64'hCACFCACFCACFCAC0;
+defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nehvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nehvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~17_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tme3z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add2~109_sumout ) # ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tme3z4~q )))))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~109_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nehvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~3 .lut_mask = 64'h0030002000000020;
-defparam \soc_inst|m0_1|u_logic|St0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .lut_mask = 64'h80808880A2A2AAA2;
+defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~5 (
+// Location: LABCELL_X18_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nehvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|St0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|St0wx4~2_combout  & (!\soc_inst|m0_1|u_logic|St0wx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|St0wx4~0_combout  & !\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nehvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nehvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|St0wx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|St0wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|St0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|St0wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nehvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .lut_mask = 64'h00000000AAAAFAFB;
+defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecawx4~0 (
+// Location: FF_X18_Y14_N32
+dffeas \soc_inst|m0_1|u_logic|Tme3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tme3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tme3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tme3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~101 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ecawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|K9z2z4~q  & !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Add2~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~110  ))
+// \soc_inst|m0_1|u_logic|Add2~102  = CARRY(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~110  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~110 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ecawx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~101_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~102 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .lut_mask = 64'hFF00FF000F000F00;
-defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~101 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~101 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~101 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecawx4~1 (
+// Location: LABCELL_X18_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xjhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ecawx4~1_combout  = ( \soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|St0wx4~5_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|St0wx4~5_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Xjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rix2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rix2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ecawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~101_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xjhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .lut_mask = 64'h0303131333033313;
-defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .lut_mask = 64'hCF00CF008B008B00;
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cs0wx4~1 (
+// Location: MLABCELL_X21_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xjhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cs0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Xjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xjhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~61_sumout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (\soc_inst|m0_1|u_logic|Xjhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~61_sumout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xjhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .lut_mask = 64'h05AF05AF0A5F0A5F;
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .lut_mask = 64'h0C080C080F0A0F0A;
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cs0wx4~0 (
+// Location: FF_X21_Y14_N4
+dffeas \soc_inst|m0_1|u_logic|Rix2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rix2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rix2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rix2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~97 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cs0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Cs0wx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~102  ))
+// \soc_inst|m0_1|u_logic|Add2~98  = CARRY(( !\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~102  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~102 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~97_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~98 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .lut_mask = 64'h0000F3330000FBBB;
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~97 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~97 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add2~97 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~1 (
+// Location: MLABCELL_X21_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mq0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|St0wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|St0wx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Sdhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (\soc_inst|m0_1|u_logic|Jwf3z4~q  & !\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Add2~97_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( \soc_inst|m0_1|u_logic|Jwf3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Add2~97_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Add2~97_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .lut_mask = 64'h000C00C0AAAEAAEA;
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .lut_mask = 64'hFFCC5555F0C05050;
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~2 (
+// Location: MLABCELL_X21_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mq0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Mq0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Cs0wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mq0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sdhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (!\soc_inst|m0_1|u_logic|U9lwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Mq0wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sdhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .lut_mask = 64'hC0C0000040400000;
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .lut_mask = 64'h00000000CCC4CCC4;
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~0 (
+// Location: MLABCELL_X21_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Et0wx4~combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mq0wx4~2_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Et0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mq0wx4~2_combout  & 
-// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Sdhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U72wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U72wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mq0wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Et0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sdhvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .lut_mask = 64'h000000770000007F;
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .lut_mask = 64'h00000000CCCCFCFD;
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y7_N56
-dffeas \soc_inst|m0_1|u_logic|Psn2z4 (
+// Location: FF_X21_Y14_N49
+dffeas \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y6_N14
-dffeas \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X17_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~93 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~98  ))
+// \soc_inst|m0_1|u_logic|Add2~94  = CARRY(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~98  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~98 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~93_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~94 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~93 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~93 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~93 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4~0 (
+// Location: LABCELL_X19_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qjhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H1qwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fi93z4~q  & ( (\soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fi93z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Psn2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Arn2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fi93z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Fi93z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Psn2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Arn2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~93_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|S5pvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Dkx2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~93_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Dkx2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Psn2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Arn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fi93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~93_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H1qwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qjhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .lut_mask = 64'h474700CC474733FF;
-defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .lut_mask = 64'h5050505050FA50FA;
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y7_N20
-dffeas \soc_inst|m0_1|u_logic|F8u2z4 (
+// Location: MLABCELL_X21_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qjhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I21wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add5~69_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I21wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~69_sumout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|I21wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Qjhvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .lut_mask = 64'h000000008880AAA0;
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y13_N4
+dffeas \soc_inst|m0_1|u_logic|Dkx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qjhvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F8u2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dkx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F8u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dkx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dkx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4~1 (
+// Location: LABCELL_X17_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~89 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H1qwx4~1_combout  = ( \soc_inst|m0_1|u_logic|F473z4~q  & ( \soc_inst|m0_1|u_logic|Eun2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|F8u2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Od83z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F473z4~q  & ( \soc_inst|m0_1|u_logic|Eun2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|F8u2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((\soc_inst|m0_1|u_logic|Od83z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|F473z4~q  & ( !\soc_inst|m0_1|u_logic|Eun2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|F8u2z4~q  & ((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Od83z4~q )))) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|F473z4~q  & ( !\soc_inst|m0_1|u_logic|Eun2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|F8u2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Od83z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~94  ))
+// \soc_inst|m0_1|u_logic|Add2~90  = CARRY(( !\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~94  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|F8u2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Od83z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|F473z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eun2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~94 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H1qwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~89_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~90 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .lut_mask = 64'h00473347CC47FF47;
-defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~89 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add2~89 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4 (
+// Location: LABCELL_X19_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H1qwx4~combout  = ( \soc_inst|m0_1|u_logic|H1qwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|H1qwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|H1qwx4~1_combout  & 
-// ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|H1qwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Jjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Add2~89_sumout  & \soc_inst|m0_1|u_logic|S5pvx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Add2~89_sumout  & \soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H1qwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~89_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H1qwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jjhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H1qwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H1qwx4 .lut_mask = 64'h5550555005000500;
-defparam \soc_inst|m0_1|u_logic|H1qwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .lut_mask = 64'h555F555F000A000A;
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eudwx4~0 (
+// Location: LABCELL_X19_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eudwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H1qwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|H1qwx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|H1qwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Jjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mx0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~73_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mx0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add5~73_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .lut_mask = 64'hFFFF0000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .lut_mask = 64'h000000008880CCC0;
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eudwx4~1 (
+// Location: FF_X19_Y13_N44
+dffeas \soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~73 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eudwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Eudwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xtdwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Add2~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~90  ))
+// \soc_inst|m0_1|u_logic|Add2~74  = CARRY(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~90  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~90 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~73_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~74 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~73 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~73 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Bnx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & \soc_inst|m0_1|u_logic|Add2~73_sumout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Bnx2z4~q  & ( (\soc_inst|m0_1|u_logic|Add2~73_sumout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Bnx2z4~q  
+// & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~73_sumout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .lut_mask = 64'h55555F5F00000A0A;
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y8_N48
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[30]~29 (
+// Location: LABCELL_X19_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjhvx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[30]~29_combout  = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|hwdata_o~2_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ) # (\soc_inst|ram_1|byte_select [3]) ) ) ) # ( 
-// \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|hwdata_o~2_combout  & ( (!\soc_inst|ram_1|byte_select [3] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ) ) ) )
+// \soc_inst|m0_1|u_logic|Cjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Et0wx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Cjhvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Et0wx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Et0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Et0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|H4nwx4~combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|byte_select [3]),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Et0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[30]~29_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[30]~29 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[30]~29 .lut_mask = 64'h00000C0C00003F3F;
-defparam \soc_inst|ram_1|data_to_memory[30]~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .lut_mask = 64'h5000505040004040;
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X14_Y6_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[30]~29_combout ,\soc_inst|ram_1|data_to_memory[14]~30_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X19_Y13_N14
+dffeas \soc_inst|m0_1|u_logic|Bnx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_bit_number = 14;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_bit_number = 14;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002BB6DB6C3D723122C3230DCF739CE739CCB30B30B30B30B30B30B30DB3FFFFFFFFFFFFC3FA14000000000000000000000001";
+defparam \soc_inst|m0_1|u_logic|Bnx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bnx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~69 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~74  ))
+// \soc_inst|m0_1|u_logic|Add2~70  = CARRY(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~74  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~74 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~69_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~70 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~69 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~69 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qapwx4~0 (
+// Location: FF_X19_Y13_N20
+dffeas \soc_inst|m0_1|u_logic|Zjq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zjq2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zjq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ithvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qapwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ithvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zjq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Add2~69_sumout  & \soc_inst|m0_1|u_logic|S5pvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Zjq2z4~q  & ( 
+// ((\soc_inst|m0_1|u_logic|Add2~69_sumout  & \soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~69_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zjq2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qapwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ithvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .lut_mask = 64'h555F555F000A000A;
+defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7iwx4~0 (
+// Location: LABCELL_X19_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ithvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qapwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mydwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Eudwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qapwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mydwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Eudwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ithvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( \soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout  & (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Xdfwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( \soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout  & \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( !\soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout  & (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( !\soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qapwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ithvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .lut_mask = 64'hAAFA0000AFFF0000;
-defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .lut_mask = 64'h080808000C0C0C00;
+defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7iwx4~1 (
+// Location: FF_X19_Y13_N19
+dffeas \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~65 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D7iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|M1pwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Wfuwx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Add2~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~70  ))
+// \soc_inst|m0_1|u_logic|Add2~66  = CARRY(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~70  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|M1pwx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~70 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~65_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~66 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~65 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~65 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ldhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B9g3z4~q 
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~65_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|B9g3z4~q ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D7iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~65_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ldhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .lut_mask = 64'h00000000AFAEAFAE;
-defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .lut_mask = 64'h330033003F0C3F0C;
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zuzvx4~0 (
+// Location: LABCELL_X19_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zuzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|A9iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|A9iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|O9iwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|A9iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ldhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tj0wx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout  & (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Xdfwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tj0wx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tj0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tj0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zuzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ldhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .lut_mask = 64'h0000135F135F135F;
-defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .lut_mask = 64'h08080C0C08000C00;
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zuzvx4~1 (
+// Location: FF_X19_Y13_N49
+dffeas \soc_inst|m0_1|u_logic|B9g3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ldhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B9g3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B9g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B9g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Fc0wx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~57_sumout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~57_sumout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~57_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~57_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~57_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .lut_mask = 64'h00000000A0A2F0F3;
-defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fc0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fc0wx4 .lut_mask = 64'hFFF0CCC0AAA08880;
+defparam \soc_inst|m0_1|u_logic|Fc0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oszvx4~1 (
+// Location: LABCELL_X33_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B5kvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oszvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Luzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oszvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~37_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|B5kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Llq2z4~q  & ( \soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Foe3z4~q ) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( \soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Llq2z4~q  & ( !\soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Foe3z4~q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( !\soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Foe3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oszvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .lut_mask = 64'h000000000F030000;
-defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .lut_mask = 64'h00D0F0D000DDFFDD;
+defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y11_N25
-dffeas \soc_inst|m0_1|u_logic|Mvm2z4 (
+// Location: FF_X33_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|Llq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Llq2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Llq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Llq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y9_N22
+dffeas \soc_inst|m0_1|u_logic|Tch3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -69058,211 +70098,364 @@ dffeas \soc_inst|m0_1|u_logic|Mvm2z4 (
 	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mvm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tch3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mvm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mvm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tch3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tch3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y12_N41
-dffeas \soc_inst|m0_1|u_logic|Ytm2z4 (
+// Location: FF_X33_Y7_N2
+dffeas \soc_inst|m0_1|u_logic|Ji43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ytm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ji43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ytm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ytm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ji43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ji43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N11
-dffeas \soc_inst|m0_1|u_logic|G493z4~DUPLICATE (
+// Location: FF_X27_Y7_N14
+dffeas \soc_inst|m0_1|u_logic|Sr53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G493z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Sr53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G493z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G493z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sr53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sr53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4~0 (
+// Location: LABCELL_X27_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qowwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ipm2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R6v2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G493z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|R6v2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G493z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ipm2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wqm2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wqm2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Lo82z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sr53z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ji43z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R6v2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wqm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G493z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ipm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ji43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sr53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qowwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lo82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .lut_mask = 64'hF3F3C0C0BB88BB88;
-defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .lut_mask = 64'h0000000000A000C0;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N43
-dffeas \soc_inst|m0_1|u_logic|It63z4~DUPLICATE (
+// Location: FF_X33_Y8_N53
+dffeas \soc_inst|m0_1|u_logic|A8h3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|A8h3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|It63z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|A8h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A8h3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lo82z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|P9h3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|A8h3z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|A8h3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|P9h3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lo82z4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .lut_mask = 64'h0C0A000000000000;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y10_N25
-dffeas \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE (
+// Location: FF_X33_Y7_N46
+dffeas \soc_inst|m0_1|u_logic|Rz13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Rz13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rz13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rz13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qowwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R283z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// ( !\soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ksm2z4~q  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ksm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R283z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qowwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y7_N11
+dffeas \soc_inst|m0_1|u_logic|A933z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|A933z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .lut_mask = 64'hF0F0CCCCAAAAFF00;
-defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A933z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A933z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4 (
+// Location: LABCELL_X33_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qowwx4~combout  = ( \soc_inst|m0_1|u_logic|Qowwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q ) # (\soc_inst|m0_1|u_logic|Qowwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qowwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Qowwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Lo82z4~1_combout  = ( \soc_inst|m0_1|u_logic|A933z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rz13z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A933z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Rz13z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qowwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qowwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rz13z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|A933z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qowwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lo82z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qowwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qowwx4 .lut_mask = 64'h000300030C0F0C0F;
-defparam \soc_inst|m0_1|u_logic|Qowwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .lut_mask = 64'h00000000B0008000;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y8_N38
-dffeas \soc_inst|m0_1|u_logic|H133z4 (
+// Location: FF_X24_Y7_N35
+dffeas \soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H133z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H133z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H133z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y11_N59
-dffeas \soc_inst|m0_1|u_logic|Yr13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yr13z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iq82z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iq82z4~0_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Iq82z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yr13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yr13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .lut_mask = 64'h0000400000000000;
+defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N10
-dffeas \soc_inst|m0_1|u_logic|Lq03z4 (
+// Location: LABCELL_X33_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lo82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Lo82z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Iq82z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lo82z4~0_combout  & (!\soc_inst|m0_1|u_logic|Lo82z4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tch3z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Tch3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lo82z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lo82z4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lo82z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iq82z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lo82z4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .lut_mask = 64'hC040000000000000;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lf0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Llq2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|D9uwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Llq2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lo82z4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .lut_mask = 64'hCCCCAFAFCCCCAFA0;
+defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Je0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Je0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Je0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .lut_mask = 64'hFFAAC840FF55C480;
+defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mc0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mc0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (\soc_inst|m0_1|u_logic|Je0wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ce0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (\soc_inst|m0_1|u_logic|Je0wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ce0wx4~combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Je0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mc0wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .lut_mask = 64'h0C0F000004050000;
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mc0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mc0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qe0wx4~combout  & ( \soc_inst|m0_1|u_logic|Mc0wx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .lut_mask = 64'h00000000000057FF;
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y8_N44
+dffeas \soc_inst|m0_1|u_logic|P9h3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -69270,45 +70463,96 @@ dffeas \soc_inst|m0_1|u_logic|Lq03z4 (
 	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lq03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|P9h3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lq03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lq03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|P9h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|P9h3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|A8h3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|P9h3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|A8h3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|P9h3z4~q ) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|P9h3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A8h3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .lut_mask = 64'h080A000008000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rz13z4~q  & ( \soc_inst|m0_1|u_logic|Eqq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rz13z4~q  & ( !\soc_inst|m0_1|u_logic|Eqq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rz13z4~q  & ( !\soc_inst|m0_1|u_logic|Eqq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  $ 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rz13z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eqq2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .lut_mask = 64'h2800080020000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~2 (
+// Location: LABCELL_X33_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lq03z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H133z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lq03z4~q  
-// & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H133z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Lq03z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|U593z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yr13z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lq03z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|U593z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yr13z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Poq2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Llq2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H133z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yr13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|U593z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lq03z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Poq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .lut_mask = 64'h03F303F30505F5F5;
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .lut_mask = 64'hC000080800000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y13_N44
-dffeas \soc_inst|m0_1|u_logic|Zj53z4 (
+// Location: FF_X27_Y7_N13
+dffeas \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -69316,225 +70560,258 @@ dffeas \soc_inst|m0_1|u_logic|Zj53z4 (
 	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zj53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zj53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zj53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y13_N17
-dffeas \soc_inst|m0_1|u_logic|Rtz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rtz2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|A933z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|A933z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rtz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .lut_mask = 64'h0030002200000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y11_N1
-dffeas \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE (
+// Location: FF_X24_Y9_N49
+dffeas \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~1 (
+// Location: LABCELL_X33_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Zj53z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Rtz2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ji43z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Ji43z4~q ) # (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zj53z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rtz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ji43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .lut_mask = 64'h0000F0F0FF00CCCC;
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .lut_mask = 64'h00000B0000000800;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~0 (
+// Location: MLABCELL_X25_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D03xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Uvzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Uvzvx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout  & !\soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout  & !\soc_inst|m0_1|u_logic|T1d3z4~q ) ) 
-// ) )
+// \soc_inst|m0_1|u_logic|D03xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Tch3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tch3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D03xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .lut_mask = 64'hCC000000CC00FF00;
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D03xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D03xx4~0 .lut_mask = 64'h4000000000000000;
+defparam \soc_inst|m0_1|u_logic|D03xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4 (
+// Location: LABCELL_X33_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvzvx4~combout  = ( !\soc_inst|m0_1|u_logic|Qowwx4~combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Ytm2z4~q )))) # (\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & (\soc_inst|m0_1|u_logic|Mvm2z4~q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ytm2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Ce0wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|D03xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~4_combout  & (!\soc_inst|m0_1|u_logic|Ce0wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ce0wx4~1_combout  & !\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mvm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ytm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qowwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ce0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ce0wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D03xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvzvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvzvx4 .lut_mask = 64'h8CAF000000000000;
-defparam \soc_inst|m0_1|u_logic|Uvzvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~4 (
+// Location: LABCELL_X33_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~4_combout  = ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~combout  = ( \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7b3z4~0 (
+// Location: MLABCELL_X28_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[21]~15 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J7b3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  )
+// \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  = ( \soc_inst|m0_1|u_logic|Ce0wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ce0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .lut_mask = 64'h0B0B0B0B4F4F4F4F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y12_N22
-dffeas \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE (
+// Location: FF_X28_Y17_N53
+dffeas \soc_inst|m0_1|u_logic|Ieh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ieh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ieh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ieh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ormvx4~0 (
+// Location: LABCELL_X18_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~69 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ogo2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~46  ))
+// \soc_inst|m0_1|u_logic|Add0~70  = CARRY(( !\soc_inst|m0_1|u_logic|Ogo2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~46  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~46 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~69_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~70 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~69 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~69 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nnmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ormvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z8b3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Z8b3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Z8b3z4~q  & ( !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Add0~89_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z8b3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~89_sumout  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Nnmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ogo2z4~q  & ( \soc_inst|m0_1|u_logic|Add0~69_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Ieh3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ogo2z4~q  & ( \soc_inst|m0_1|u_logic|Add0~69_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (\soc_inst|m0_1|u_logic|Ieh3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ogo2z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~69_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q ))) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ogo2z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~69_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add0~89_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ieh3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add0~69_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .lut_mask = 64'h2F2FEFEF0F3FCFFF;
-defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .lut_mask = 64'h7757FFDF5557DDDF;
+defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y12_N32
-dffeas \soc_inst|m0_1|u_logic|Z8b3z4 (
+// Location: FF_X17_Y18_N37
+dffeas \soc_inst|m0_1|u_logic|Ogo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -69543,45 +70820,89 @@ dffeas \soc_inst|m0_1|u_logic|Z8b3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ogo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z8b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z8b3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ogo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ogo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hrmvx4~0 (
+// Location: LABCELL_X18_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~85 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hrmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dhb3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|Nfb3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dhb3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~9_sumout  & ( ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Nfb3z4~q  & \soc_inst|m0_1|u_logic|Tna3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dhb3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nfb3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dhb3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~9_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Nfb3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ddi3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~70  ))
+// \soc_inst|m0_1|u_logic|Add0~86  = CARRY(( !\soc_inst|m0_1|u_logic|Ddi3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~70  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nfb3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~70 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~85_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~86 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~85 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add0~85 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y17_N50
+dffeas \soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gnmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gnmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ddi3z4~q  & ( \soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Add0~85_sumout ) # (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout 
+// )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ddi3z4~q  & ( \soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~85_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ddi3z4~q  & ( !\soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # 
+// (((!\soc_inst|m0_1|u_logic|Add0~85_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ddi3z4~q  & ( !\soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE_q  & ( 
+// ((!\soc_inst|m0_1|u_logic|Add0~85_sumout  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|Tna3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Add0~85_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
 	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add0~9_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .lut_mask = 64'h0BFFFBFF01FFF1FF;
-defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .lut_mask = 64'h08FFF8FF0BFFFBFF;
+defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y12_N14
-dffeas \soc_inst|m0_1|u_logic|Dhb3z4 (
+// Location: FF_X17_Y17_N58
+dffeas \soc_inst|m0_1|u_logic|Ddi3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -69590,72 +70911,119 @@ dffeas \soc_inst|m0_1|u_logic|Dhb3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ddi3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dhb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dhb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ddi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ddi3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~1 (
+// Location: LABCELL_X18_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~1_combout  = ( \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Dhb3z4~q  & (\soc_inst|m0_1|u_logic|Z8b3z4~q  & \soc_inst|m0_1|u_logic|She3z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Add0~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Uei3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~86  ))
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|She3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~86 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~5_sumout ),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~5 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zmmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zmmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uei3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|Jca3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uei3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~5_sumout  & ( ((\soc_inst|m0_1|u_logic|Jca3z4~q  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uei3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~5_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Jca3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uei3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~5_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Jca3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Jca3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add0~5_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oytvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zmmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .lut_mask = 64'h0000000000030003;
-defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .lut_mask = 64'h31FFFDFF01FFCDFF;
+defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~3 (
+// Location: FF_X17_Y17_N10
+dffeas \soc_inst|m0_1|u_logic|Uei3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Zmmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uei3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uei3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uei3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Iua3z4~q  & ( (\soc_inst|m0_1|u_logic|Qxa3z4~q  & (\soc_inst|m0_1|u_logic|Zva3z4~q  & \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Oytvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( (\soc_inst|m0_1|u_logic|Uei3z4~q  & (\soc_inst|m0_1|u_logic|Ddi3z4~q  & (\soc_inst|m0_1|u_logic|K7g3z4~q  & \soc_inst|m0_1|u_logic|S3i3z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oytvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oytvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .lut_mask = 64'h0000000000030003;
-defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y11_N42
+// Location: LABCELL_X19_Y17_N30
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ara3z4~q  & (\soc_inst|m0_1|u_logic|Xeo2z4~q  & (\soc_inst|m0_1|u_logic|O0o2z4~q  & \soc_inst|m0_1|u_logic|Jpa3z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Oytvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ara3z4~q  & ( (\soc_inst|m0_1|u_logic|Ogo2z4~q  & (\soc_inst|m0_1|u_logic|O0o2z4~q  & (\soc_inst|m0_1|u_logic|Xeo2z4~q  & \soc_inst|m0_1|u_logic|Jpa3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -69669,18 +71037,41 @@ defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .lut_mask = 64'h0000000000010001;
 defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N12
+// Location: MLABCELL_X21_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oytvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Iua3z4~q  & ( (\soc_inst|m0_1|u_logic|Zva3z4~q  & (\soc_inst|m0_1|u_logic|Qxa3z4~q  & \soc_inst|m0_1|u_logic|Gza3z4~q )) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Oytvx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y18_N6
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|M2b3z4~q  & (\soc_inst|m0_1|u_logic|Oytvx4~3_combout  & \soc_inst|m0_1|u_logic|Oytvx4~2_combout )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Oytvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Oytvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Oytvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|M2b3z4~q  & (\soc_inst|m0_1|u_logic|Rsa3z4~q  & \soc_inst|m0_1|u_logic|W0b3z4~q )) ) ) )
 
 	.dataa(gnd),
 	.datab(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oytvx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oytvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Oytvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oytvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -69694,61 +71085,41 @@ defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .lut_mask = 64'h0000000000000003;
 defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y11_N56
-dffeas \soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~0 (
+// Location: LABCELL_X18_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( (\soc_inst|m0_1|u_logic|S3i3z4~q  & (\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Uei3z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Oytvx4~1_combout  = ( \soc_inst|m0_1|u_logic|C4b3z4~q  & ( (\soc_inst|m0_1|u_logic|Dhb3z4~q  & (\soc_inst|m0_1|u_logic|Z8b3z4~q  & \soc_inst|m0_1|u_logic|She3z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|She3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oytvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oytvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .lut_mask = 64'h0000000000010001;
-defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y11_N18
+// Location: LABCELL_X18_Y18_N24
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~combout  = ( \soc_inst|m0_1|u_logic|Oytvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oytvx4~1_combout  & (\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aze3z4~q  & \soc_inst|m0_1|u_logic|Oytvx4~4_combout 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Oytvx4~combout  = ( \soc_inst|m0_1|u_logic|M5f3z4~q  & ( (\soc_inst|m0_1|u_logic|Oytvx4~0_combout  & (\soc_inst|m0_1|u_logic|Oytvx4~4_combout  & (\soc_inst|m0_1|u_logic|Oytvx4~1_combout  & \soc_inst|m0_1|u_logic|Aze3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oytvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Oytvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Oytvx4~0_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Oytvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oytvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oytvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -69758,23 +71129,22 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Oytvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oytvx4 .lut_mask = 64'h0000000100000001;
+defparam \soc_inst|m0_1|u_logic|Oytvx4 .lut_mask = 64'h0000000000010001;
 defparam \soc_inst|m0_1|u_logic|Oytvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y13_N57
+// Location: LABCELL_X19_Y18_N15
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Etmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Etmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oytvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|F2o2z4~q  & ((\soc_inst|m0_1|u_logic|Tna3z4~q ))) # (\soc_inst|m0_1|u_logic|F2o2z4~q  & ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Aea3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Oytvx4~combout  & ( (!\soc_inst|m0_1|u_logic|F2o2z4~q  $ (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Etmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|F2o2z4~q  & (((\soc_inst|m0_1|u_logic|Tna3z4~q )))) # (\soc_inst|m0_1|u_logic|F2o2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Aea3z4~q  & \soc_inst|m0_1|u_logic|Oytvx4~combout )))) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Aea3z4~q ),
 	.datab(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
 	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -69784,11 +71154,11 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Etmvx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .lut_mask = 64'h3CFF3CFF3DFF3DFF;
+defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .lut_mask = 64'h3C3D3C3DFFFFFFFF;
 defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N59
+// Location: FF_X19_Y18_N17
 dffeas \soc_inst|m0_1|u_logic|F2o2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Etmvx4~0_combout ),
@@ -69807,14 +71177,14 @@ defparam \soc_inst|m0_1|u_logic|F2o2z4 .is_wysiwyg = "true";
 defparam \soc_inst|m0_1|u_logic|F2o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N54
+// Location: LABCELL_X18_Y18_N3
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mxtvx4 (
 // Equation(s):
 // \soc_inst|m0_1|u_logic|Mxtvx4~combout  = ( \soc_inst|m0_1|u_logic|Oytvx4~combout  & ( \soc_inst|m0_1|u_logic|F2o2z4~q  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
@@ -69827,1322 +71197,1145 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mxtvx4 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Mxtvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mxtvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Mxtvx4 .lut_mask = 64'h0000000055555555;
 defparam \soc_inst|m0_1|u_logic|Mxtvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bomvx4~0 (
+// Location: FF_X21_Y17_N37
+dffeas \soc_inst|m0_1|u_logic|C9a3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|C9a3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C9a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C9a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mqmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~53_sumout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|L8m2z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~53_sumout  & ( ((\soc_inst|m0_1|u_logic|L8m2z4~q  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~53_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|L8m2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~53_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|L8m2z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Mqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zva3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~13_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|C9a3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zva3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~13_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|C9a3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Zva3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~13_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|C9a3z4~q ))) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zva3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~13_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|C9a3z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8m2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
 	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add0~53_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|C9a3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add0~13_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bomvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mqmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .lut_mask = 64'h31FFFDFF01FFCDFF;
-defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .lut_mask = 64'h7577FDFF5557DDDF;
+defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y9_N2
-dffeas \soc_inst|m0_1|u_logic|Jpa3z4 (
+// Location: FF_X22_Y21_N17
+dffeas \soc_inst|m0_1|u_logic|Zva3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bomvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mqmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zva3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zva3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zva3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y19_N44
+dffeas \soc_inst|m0_1|u_logic|Ipn2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ipn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qkmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Nnc3z4~q )) # (\soc_inst|m0_1|u_logic|Ipn2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Nnc3z4~q ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .lut_mask = 64'h000F000F333F333F;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y17_N38
+dffeas \soc_inst|m0_1|u_logic|C9a3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|C9a3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jpa3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jpa3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C9a3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C9a3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~1 (
+// Location: MLABCELL_X21_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rilwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[19]~25_combout ) # 
-// (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[19]~25_combout ) # 
-// (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q  & ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[19]~25_combout ) # 
-// (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qkmwx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[10]~12_combout  & ( ((!\soc_inst|m0_1|u_logic|C9a3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|G6owx4~combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[10]~12_combout  & ( (!\soc_inst|m0_1|u_logic|C9a3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|G6owx4~combout ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rilwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C9a3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rilwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .lut_mask = 64'h0E0E0E0E00000E0E;
-defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .lut_mask = 64'h0A0A0A0A0AFF0AFF;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~2 (
+// Location: MLABCELL_X21_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rilwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Qtdwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Qtdwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Qkmwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qkmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Zva3z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rilwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qkmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .lut_mask = 64'h0A0B0A0B0E0F0E0F;
-defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .lut_mask = 64'hFFB0FFB000000000;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll1wx4~0 (
+// Location: LABCELL_X22_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ll1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & !\soc_inst|m0_1|u_logic|Whlwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pmnwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & !\soc_inst|m0_1|u_logic|Whlwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Qkmwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sndwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qkmwx4~2_combout  & (((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mydwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qkmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Mydwx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qkmwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ll1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .lut_mask = 64'hF8F8F8F888888888;
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .lut_mask = 64'h0C0E0C0E0D0F0D0F;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll1wx4~1 (
+// Location: LABCELL_X22_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Imnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rilwx4~2_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Imnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rilwx4~2_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Et0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) # ((!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Et0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .lut_mask = 64'h23002300AF00AF00;
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .lut_mask = 64'hF000F000FCCCFCCC;
+defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~0 (
+// Location: LABCELL_X22_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout  & (\soc_inst|m0_1|u_logic|Aj1wx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Aj1wx4~2_combout  & !\soc_inst|m0_1|u_logic|Glnwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Et0wx4~combout  = ( \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Et0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Et0wx4~0_combout  & (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Aj1wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Et0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Et0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .lut_mask = 64'h0000220000002202;
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y6_N50
-dffeas \soc_inst|m0_1|u_logic|Ibe3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ibe3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ibe3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ibe3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Et0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Et0wx4 .lut_mask = 64'h00D000D0D0D0D0D0;
+defparam \soc_inst|m0_1|u_logic|Et0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~2 (
+// Location: LABCELL_X36_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cc9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Q6e3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|F8e3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mq0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|St0wx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|St0wx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~combout  ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F8e3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Q6e3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .lut_mask = 64'h0A0000000C000000;
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y6_N35
-dffeas \soc_inst|m0_1|u_logic|U9e3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U9e3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U9e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .lut_mask = 64'h1200FFFF12001200;
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge9wx4~0 (
+// Location: LABCELL_X35_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ge9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U9e3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Mq0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Cs0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (!\soc_inst|m0_1|u_logic|Mq0wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cs0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (!\soc_inst|m0_1|u_logic|Mq0wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U9e3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mq0wx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ge9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .lut_mask = 64'h1000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .lut_mask = 64'hA0A0000000A00000;
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~0 (
+// Location: MLABCELL_X34_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cc9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aud3z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pvd3z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aud3z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Pvd3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mq0wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Et0wx4~combout  & (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mq0wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Et0wx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pvd3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aud3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Et0wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .lut_mask = 64'h00000000080C0800;
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .lut_mask = 64'h000000000077007F;
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y12_N20
-dffeas \soc_inst|m0_1|u_logic|Tyd3z4 (
+// Location: FF_X30_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|F8u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tyd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F8u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tyd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tyd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F8u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N31
-dffeas \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE (
+// Location: FF_X25_Y8_N25
+dffeas \soc_inst|m0_1|u_logic|Od83z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Od83z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cc9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tyd3z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tyd3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .lut_mask = 64'h00A000C000000000;
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cc9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Cc9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cc9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Cc9wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Ge9wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ibe3z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ibe3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cc9wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ge9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cc9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cc9wx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .lut_mask = 64'hD000000000000000;
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Od83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Od83z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qk1wx4~0 (
+// Location: LABCELL_X30_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Rkd3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Wce3z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rkd3z4~q 
-// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Wce3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|H1qwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Od83z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|F473z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|F8u2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Eun2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|F8u2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Eun2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|F473z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Od83z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H1qwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .lut_mask = 64'hE4E4F5F5E4E4F5A0;
-defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .lut_mask = 64'h333355550F0F00FF;
+defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Owovx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Owovx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~45_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Add3~81_sumout ))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~81_sumout )) # (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~45_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Add3~81_sumout ))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~81_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// (\soc_inst|m0_1|u_logic|Add3~81_sumout ))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~81_sumout )) # (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~81_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Owovx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X34_Y9_N4
+dffeas \soc_inst|m0_1|u_logic|Ohv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ohv2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Owovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Owovx4 .lut_mask = 64'h035703570357FFFF;
-defparam \soc_inst|m0_1|u_logic|Owovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ohv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ohv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y6_N4
-dffeas \soc_inst|ram_1|saved_word_address[9] (
+// Location: FF_X24_Y9_N10
+dffeas \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Owovx4~combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [9]),
+	.q(\soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[9] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[9] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N48
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[9]~9 (
+// Location: LABCELL_X30_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[9]~9_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & (\soc_inst|m0_1|u_logic|Owovx4~combout )) # (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|saved_word_address [9]))) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [9] ) )
+// \soc_inst|m0_1|u_logic|H1qwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Arn2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Ohv2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Psn2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
-	.datab(!\soc_inst|ram_1|saved_word_address [9]),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|write_cycle~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ohv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Psn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Arn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[9]~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H1qwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .lut_mask = 64'h3333333355335533;
-defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .lut_mask = 64'h333355550F0F00FF;
+defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N9
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~11 (
+// Location: LABCELL_X30_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[7]~11_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[0][7]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (((\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|switches_1|switch_store[0][7]~q )))) ) )
+// \soc_inst|m0_1|u_logic|H1qwx4~combout  = ( \soc_inst|m0_1|u_logic|H1qwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|H1qwx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|H1qwx4~0_combout  
+// & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|H1qwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[0][7]~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H1qwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H1qwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H1qwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[7]~11 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[7]~11 .lut_mask = 64'hA0A3A0A3ACAFACAF;
-defparam \soc_inst|interconnect_1|HRDATA[7]~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4 .lut_mask = 64'h0F050F050A000A00;
+defparam \soc_inst|m0_1|u_logic|H1qwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~0 (
+// Location: MLABCELL_X25_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eudwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wywwx4~0_combout  = ( \soc_inst|m0_1|u_logic|X0c3z4~q  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|X0c3z4~q  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ylc3z4~q  & 
-// \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|X0c3z4~q  & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ylc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|X0c3z4~q 
-//  & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ylc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Eudwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|H1qwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|H1qwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wywwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .lut_mask = 64'h050505050505FFFF;
-defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y12_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wywwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wywwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E0uvx4~combout  & (((!\soc_inst|m0_1|u_logic|Tib3z4~q ) # (!\soc_inst|m0_1|u_logic|Qwowx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|E0uvx4~combout  & (!\soc_inst|m0_1|u_logic|Kkb3z4~q  & ((!\soc_inst|m0_1|u_logic|Tib3z4~q ) # (!\soc_inst|m0_1|u_logic|Qwowx4~combout )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wywwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wywwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .lut_mask = 64'hEEE0EEE000000000;
-defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .lut_mask = 64'hF0FFF0FFF000F000;
+defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~2 (
+// Location: LABCELL_X24_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1ewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wywwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wywwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Dhb3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & (\soc_inst|m0_1|u_logic|Nfb3z4~q  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dhb3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|E1ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Eudwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Eudwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nfb3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wywwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wywwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .lut_mask = 64'h00000000AF23AF23;
-defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~3 (
+// Location: LABCELL_X22_Y17_N39
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[12]~22 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wywwx4~3_combout  = ( \soc_inst|m0_1|u_logic|K7pwx4~combout  & ( \soc_inst|m0_1|u_logic|Wywwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bmb3z4~q  & ((!\soc_inst|m0_1|u_logic|Zad3z4~q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|K7pwx4~combout  & ( \soc_inst|m0_1|u_logic|Wywwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Zad3z4~q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout ) ) ) )
+// \soc_inst|interconnect_1|HRDATA[12]~22_combout  = (!\soc_inst|interconnect_1|HRDATA[11]~3_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & 
+// ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout )))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wywwx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wywwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .lut_mask = 64'h00000000FFAAF0A0;
-defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G9lwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|G9lwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[7]~11_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wywwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .lut_mask = 64'h8880CCC0AAA0FFF0;
-defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|R5zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & \soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & \soc_inst|m0_1|u_logic|V9iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R5zvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .lut_mask = 64'h0FCF0FCF00CC00CC;
-defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[12]~22 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[12]~22 .lut_mask = 64'hAA0FAA0FAA0FAA0F;
+defparam \soc_inst|interconnect_1|HRDATA[12]~22 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~1 (
+// Location: LABCELL_X22_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R5zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|R5zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|R5zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|Iua3z4~q  & (\soc_inst|m0_1|u_logic|L7a3z4~q  & ((!\soc_inst|interconnect_1|HRDATA[12]~22_combout ) 
+// # (!\soc_inst|m0_1|u_logic|B7owx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|L7a3z4~q  & ((!\soc_inst|interconnect_1|HRDATA[12]~22_combout ) # 
+// (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|Iua3z4~q  & ((!\soc_inst|interconnect_1|HRDATA[12]~22_combout ) # 
+// (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R5zvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L7a3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .lut_mask = 64'hCFCFCF0000000000;
-defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .lut_mask = 64'hFFCC55440F0C0504;
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~2 (
+// Location: LABCELL_X23_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R5zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R5zvx4~1_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R5zvx4~1_combout  & ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xrmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|E1ewx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|C0ewx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xrmwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .lut_mask = 64'h1313131313331333;
-defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .lut_mask = 64'h00000000DCDFDCDF;
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Po7wx4~0 (
+// Location: LABCELL_X23_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Po7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Arzwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Iazwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & \soc_inst|m0_1|u_logic|Dizwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Iazwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dizwx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Arzwx4~0_combout  & \soc_inst|m0_1|u_logic|Dizwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Po7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Arzwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .lut_mask = 64'h6040604020002000;
-defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .lut_mask = 64'h80A880A800880088;
+defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc7wx4~0 (
+// Location: LABCELL_X22_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fc7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout  & \soc_inst|m0_1|u_logic|U2ewx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout  & \soc_inst|m0_1|u_logic|U2ewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Arzwx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|D4g3z4~q  & (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Arzwx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~2_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fc7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .lut_mask = 64'h00F000F0CCFCCCFC;
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .lut_mask = 64'hFFFF10100F0F0000;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc7wx4~1 (
+// Location: LABCELL_X22_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5pwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fc7wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fc7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Po7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Po7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fc7wx4~0_combout ),
+// \soc_inst|m0_1|u_logic|U5pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & (\soc_inst|m0_1|u_logic|Adzwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Kbzwx4~0_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .lut_mask = 64'hF531F53100000000;
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .lut_mask = 64'h8C08CCCC8C8CCCCC;
+defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cb3wx4~0 (
+// Location: LABCELL_X22_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cb3wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & (((\soc_inst|m0_1|u_logic|R5zvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nd3wx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|K0qvx4~combout )))))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Nd3wx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & 
-// (((\soc_inst|m0_1|u_logic|Fc7wx4~1_combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & (((\soc_inst|m0_1|u_logic|R5zvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nd3wx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|K0qvx4~combout )))))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Nd3wx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & 
-// (((\soc_inst|m0_1|u_logic|Y5zvx4~2_combout )))))) ) )
+// \soc_inst|m0_1|u_logic|Jjuwx4~2_combout  = ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|N10xx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (!\soc_inst|m0_1|u_logic|N10xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .lut_mask = 64'h44054405CCAFCCAF;
-defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y13_N1
-dffeas \soc_inst|m0_1|u_logic|Gci2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gci2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gci2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gci2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .lut_mask = 64'hA020AAA2AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~0 (
+// Location: MLABCELL_X21_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y5zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Gci2z4~q  & \soc_inst|m0_1|u_logic|Rmawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gci2z4~q  & \soc_inst|m0_1|u_logic|Rmawx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Cjuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( \soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) # (\soc_inst|m0_1|u_logic|I90xx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) # (\soc_inst|m0_1|u_logic|I90xx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout  & !\soc_inst|m0_1|u_logic|Tb0xx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|I90xx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .lut_mask = 64'h00F000F033F333F3;
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .lut_mask = 64'h80CCC8CCC0CCCCCC;
+defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~1 (
+// Location: MLABCELL_X21_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y5zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|A67wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Phh2z4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|A67wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Phh2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~2_combout  = ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ) # (\soc_inst|m0_1|u_logic|G10xx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|G10xx4~1_combout  & \soc_inst|m0_1|u_logic|Cjuwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .lut_mask = 64'hA280AA220000AA22;
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .lut_mask = 64'h05050505F5F5F5F5;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~2 (
+// Location: LABCELL_X22_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|Y5zvx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ayzwx4~combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ))) # 
+// (\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kkrvx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & 
+// ((\soc_inst|m0_1|u_logic|Ayzwx4~combout )))) # (\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kkrvx4~2_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kkrvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .lut_mask = 64'h00CC00CC000C000C;
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .lut_mask = 64'h058D058D27AF27AF;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3qvx4~0 (
+// Location: LABCELL_X24_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Viuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J3qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & 
-// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Viuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yizwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|B6pwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Yizwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & \soc_inst|m0_1|u_logic|Yizwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .lut_mask = 64'h000000000707070F;
-defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y8_N19
-dffeas \soc_inst|m0_1|u_logic|Cc63z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cc63z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cc63z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y7_N32
-dffeas \soc_inst|m0_1|u_logic|Isi2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Isi2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Isi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Isi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .lut_mask = 64'hD5FDF5FF00000000;
+defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~0 (
+// Location: LABCELL_X24_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N3ywx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cc63z4~q  & ( \soc_inst|m0_1|u_logic|Isi2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cc63z4~q  & ( !\soc_inst|m0_1|u_logic|Isi2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cc63z4~q  & ( !\soc_inst|m0_1|u_logic|Isi2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Kkrvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Viuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Whzwx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Viuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cc63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Isi2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N3ywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .lut_mask = 64'h4040400000400000;
-defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y6_N7
-dffeas \soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Glj2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X48_Y6_N32
-dffeas \soc_inst|m0_1|u_logic|Lpu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lpu2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lpu2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lpu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lpu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .lut_mask = 64'h333333330F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~3 (
+// Location: LABCELL_X24_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N3ywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Lpu2z4~q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|B6pwx4~4_combout  = ( \soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & !\soc_inst|m0_1|u_logic|B6pwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|B6pwx4~3_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lpu2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N3ywx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .lut_mask = 64'h0000080800000A00;
-defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y7_N25
-dffeas \soc_inst|m0_1|u_logic|Cgt2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cgt2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cgt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cgt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .lut_mask = 64'hFF00FF00F000F000;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~2 (
+// Location: LABCELL_X23_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6pwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N3ywx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ll73z4~q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Cgt2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|I6pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|G2zwx4~0_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|G2zwx4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (((!\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & !\soc_inst|m0_1|u_logic|R4zwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|G2zwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cgt2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ll73z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N3ywx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .lut_mask = 64'h0000080800000A00;
-defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .lut_mask = 64'h8A0A8A8AAA8AAAAA;
+defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~1 (
+// Location: LABCELL_X22_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N3ywx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xti2z4~q  & ( \soc_inst|m0_1|u_logic|Koj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xti2z4~q  & ( !\soc_inst|m0_1|u_logic|Koj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xti2z4~q  & ( !\soc_inst|m0_1|u_logic|Koj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  = ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kkrvx4~0_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & ((\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xti2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Koj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kkrvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N3ywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .lut_mask = 64'h0005000400010000;
-defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .lut_mask = 64'hAA0FAA0F33333333;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4 (
+// Location: LABCELL_X23_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N3ywx4~combout  = ( !\soc_inst|m0_1|u_logic|N3ywx4~2_combout  & ( !\soc_inst|m0_1|u_logic|N3ywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|N3ywx4~0_combout  & !\soc_inst|m0_1|u_logic|N3ywx4~3_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & \soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & \soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wwywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & \soc_inst|m0_1|u_logic|G2zwx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N3ywx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|N3ywx4~3_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|N3ywx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kkrvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3ywx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N3ywx4 .lut_mask = 64'hA0A0000000000000;
-defparam \soc_inst|m0_1|u_logic|N3ywx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .lut_mask = 64'h0050F050CCDCCCDC;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U2ewx4~0 (
+// Location: LABCELL_X23_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U2ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|X77wx4~combout )))) ) 
-// )
+// \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q  & \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ywi2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .lut_mask = 64'hAA08AA0800000000;
-defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .lut_mask = 64'hAAAAAAAA00AA00AA;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M7qwx4~0 (
+// Location: FF_X22_Y19_N5
+dffeas \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bsvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M7qwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & (((\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Qxc2z4~combout ))) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ((\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Qxc2z4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Bsvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .lut_mask = 64'h0333033303130313;
-defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .lut_mask = 64'h0303030357575757;
+defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mjlwx4~0 (
+// Location: LABCELL_X23_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mjlwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & 
-// \soc_inst|interconnect_1|HRDATA[25]~1_combout )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & (((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # 
-// (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( \soc_inst|m0_1|u_logic|Bsvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & !\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( \soc_inst|m0_1|u_logic|Bsvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & !\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bsvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bsvwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xrmwx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xrmwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mjlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .lut_mask = 64'hF700F700F200F200;
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .lut_mask = 64'h3333323230303030;
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mjlwx4~1 (
+// Location: LABCELL_X23_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uf1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Iutwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mjlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Kvtwx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Iutwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Kvtwx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Uf1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Pmnwx4~combout  & (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mjlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uf1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .lut_mask = 64'h0E0E0E0E0E000E00;
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .lut_mask = 64'h1050115530F033FF;
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bo0wx4~0 (
+// Location: LABCELL_X22_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uf1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bo0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & \soc_inst|m0_1|u_logic|Phlwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & \soc_inst|m0_1|u_logic|Phlwx4~0_combout )) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uf1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & (((\soc_inst|m0_1|u_logic|Xrmwx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) # (\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Uf1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uf1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bo0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .lut_mask = 64'h0CFF0CFF0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .lut_mask = 64'h000022AA000023AF;
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bo0wx4 (
+// Location: LABCELL_X19_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bo0wx4~combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bo0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bo0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ekhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Uf1wx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bo0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ekhvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bo0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bo0wx4 .lut_mask = 64'h0707777700000000;
-defparam \soc_inst|m0_1|u_logic|Bo0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .lut_mask = 64'h4455445540504050;
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y10_N26
-dffeas \soc_inst|m0_1|u_logic|Zjq2z4 (
+// Location: FF_X19_Y14_N23
+dffeas \soc_inst|m0_1|u_logic|Fhx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -71151,445 +72344,422 @@ dffeas \soc_inst|m0_1|u_logic|Zjq2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zjq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fhx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zjq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zjq2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X50_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ithvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ithvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Add2~69_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Zjq2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zjq2z4~q  & \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Zjq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Add2~69_sumout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ithvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .lut_mask = 64'h00AA33AA00AA33AA;
-defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fhx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fhx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ithvx4~1 (
+// Location: LABCELL_X30_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cqovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ithvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Bo0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Bo0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Cqovx4~combout  = ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( (((\soc_inst|m0_1|u_logic|Add3~77_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~77_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~77_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( (\soc_inst|m0_1|u_logic|Add3~77_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ithvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add3~77_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .lut_mask = 64'h00000000CF008A00;
-defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cqovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cqovx4 .lut_mask = 64'h0505373705FF37FF;
+defparam \soc_inst|m0_1|u_logic|Cqovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y10_N25
-dffeas \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE (
+// Location: FF_X30_Y14_N56
+dffeas \soc_inst|ram_1|saved_word_address[10] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+	.q(\soc_inst|ram_1|saved_word_address [10]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[10] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[10] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ql0wx4 (
+// Location: LABCELL_X29_Y13_N0
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[10]~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ql0wx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~65_sumout  & ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( (((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~65_sumout  & ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( ((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~65_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( ((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~65_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[10]~10_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & (\soc_inst|m0_1|u_logic|Cqovx4~combout )) # (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|saved_word_address [10]))) ) ) # ( 
+// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [10] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~65_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+	.datad(!\soc_inst|ram_1|saved_word_address [10]),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[10]~10_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .lut_mask = 64'h00FF00FF0C3F0C3F;
+defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y17_N3
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[25]~11 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[25]~11_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ))) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & !\soc_inst|ram_1|byte_select[3]~DUPLICATE_q )) ) )
+
+	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ),
+	.datad(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|ram_1|data_to_memory[25]~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ql0wx4 .lut_mask = 64'h00330F3F55775F7F;
-defparam \soc_inst|m0_1|u_logic|Ql0wx4 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[25]~11 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[25]~11 .lut_mask = 64'h0500050005550555;
+defparam \soc_inst|ram_1|data_to_memory[25]~11 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y14_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[25]~11_combout ,\soc_inst|ram_1|data_to_memory[1]~12_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_bit_number = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_bit_number = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B6CF6C2BE25FCC0210494BF83E4F93E0F94F94F94F94F94F94F94817FFFFFFFFFFFFC338EC000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xvjvx4~0 (
+// Location: LABCELL_X29_Y16_N36
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[1]~12 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xvjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( \soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( \soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|ram_1|data_to_memory[1]~12_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ) # (\soc_inst|ram_1|byte_select [0]))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( (!\soc_inst|ram_1|byte_select [0] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|byte_select [0]),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
+	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[1]~12_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .lut_mask = 64'h0B0BFBFB0B00FB00;
-defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y6_N25
-dffeas \soc_inst|m0_1|u_logic|L7p2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L7p2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L7p2z4 .power_up = "low";
+defparam \soc_inst|ram_1|data_to_memory[1]~12 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[1]~12 .lut_mask = 64'h000C000C003F003F;
+defparam \soc_inst|ram_1|data_to_memory[1]~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~1 (
+// Location: LABCELL_X27_Y17_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[25]~18 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  $ (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|interconnect_1|HRDATA[25]~18_combout  = ( \soc_inst|switches_1|switch_store[1][9]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
+// (\soc_inst|interconnect_1|HRDATA[24]~17_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][9]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (!\soc_inst|interconnect_1|HRDATA[24]~17_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[24]~17_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][9]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (!\soc_inst|interconnect_1|HRDATA[24]~17_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[24]~17_combout  & 
+// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][9]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[24]~17_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|switches_1|switch_store[1][9]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .lut_mask = 64'h8400800004000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y10_N40
-dffeas \soc_inst|m0_1|u_logic|Ht53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ht53z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ht53z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y11_N10
-dffeas \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|interconnect_1|HRDATA[25]~18 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[25]~18 .lut_mask = 64'hA0A0A3A3ACACAFAF;
+defparam \soc_inst|interconnect_1|HRDATA[25]~18 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~3 (
+// Location: LABCELL_X23_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ht53z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Pgfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qdtwx4~combout  & ( ((\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & \soc_inst|m0_1|u_logic|M5ewx4~0_combout )) # (\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qdtwx4~combout  & ( (\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & \soc_inst|m0_1|u_logic|M5ewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ht53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pgfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .lut_mask = 64'h000000CA00000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y9_N2
-dffeas \soc_inst|m0_1|u_logic|Yj43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yj43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yj43z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X36_Y9_N59
-dffeas \soc_inst|m0_1|u_logic|A9p2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|A9p2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A9p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|A9p2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .lut_mask = 64'h000F000F333F333F;
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~2 (
+// Location: LABCELL_X23_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|A9p2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yj43z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pgfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~18_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yj43z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A9p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .lut_mask = 64'h000000A0000000C0;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .lut_mask = 64'hF0A0F0A000000000;
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~5 (
+// Location: LABCELL_X23_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mx0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Nn0wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~4_combout  & (!\soc_inst|m0_1|u_logic|Nn0wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Nr2xx4~0_combout  & !\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Mx0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) # ((!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nn0wx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nn0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nn0wx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4 (
+// Location: LABCELL_X23_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mx0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~combout  = (\soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & \soc_inst|m0_1|u_logic|Nn0wx4~8_combout )
+// \soc_inst|m0_1|u_logic|Mx0wx4~combout  = ( \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4 .lut_mask = 64'h000F000F000F000F;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mx0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mx0wx4 .lut_mask = 64'h130013005F005F00;
+defparam \soc_inst|m0_1|u_logic|Mx0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Un0wx4~0 (
+// Location: LABCELL_X36_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fx0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Un0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fx0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Un0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fx0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .lut_mask = 64'hEDDEE8D4E0D0E0D0;
-defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .lut_mask = 64'hEBE8C8C8BE8E8C8C;
+defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xl0wx4~1 (
+// Location: MLABCELL_X25_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iv0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xl0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Un0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Un0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Iv0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~73_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Un0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fx0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xl0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iv0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .lut_mask = 64'h0000F03000005010;
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .lut_mask = 64'h0000CC4400000C04;
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xl0wx4~0 (
+// Location: MLABCELL_X25_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iv0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xl0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mx0wx4~combout  & ( \soc_inst|m0_1|u_logic|Iv0wx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xl0wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .lut_mask = 64'h0000000000003F7F;
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .lut_mask = 64'h0000000000005F7F;
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y10_N2
-dffeas \soc_inst|m0_1|u_logic|Q6u2z4 (
+// Location: FF_X30_Y7_N56
+dffeas \soc_inst|m0_1|u_logic|U9u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -71597,82 +72767,83 @@ dffeas \soc_inst|m0_1|u_logic|Q6u2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q6u2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U9u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q6u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U9u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y10_N25
-dffeas \soc_inst|m0_1|u_logic|Q273z4 (
+// Location: FF_X25_Y6_N26
+dffeas \soc_inst|m0_1|u_logic|Ozo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ozo2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q273z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ozo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q273z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q273z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ozo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ozo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N55
-dffeas \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE (
+// Location: LABCELL_X30_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xcuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Df83z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U9u2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Df83z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|U9u2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Df83z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Ozo2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|U573z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Df83z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Ozo2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|U573z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|U9u2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|U573z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ozo2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Df83z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .lut_mask = 64'h03F303F350505F5F;
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y7_N2
+dffeas \soc_inst|m0_1|u_logic|Djv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Djv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y10_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bjxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Q273z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Q6u2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Ecp2z4~q  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Q6u2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Q273z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ecp2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .lut_mask = 64'h00FF555533330F0F;
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Djv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y10_N26
-dffeas \soc_inst|m0_1|u_logic|Pap2z4 (
+// Location: FF_X25_Y7_N52
+dffeas \soc_inst|m0_1|u_logic|Zxo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -71680,3534 +72851,3234 @@ dffeas \soc_inst|m0_1|u_logic|Pap2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pap2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zxo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pap2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pap2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zxo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zxo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4~0 (
+// Location: MLABCELL_X25_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bjxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Qg93z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// ( \soc_inst|m0_1|u_logic|A9p2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Zfv2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  
-// & ( \soc_inst|m0_1|u_logic|Pap2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Xcuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uj93z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ( \soc_inst|m0_1|u_logic|Kwo2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Djv2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  
+// & ( \soc_inst|m0_1|u_logic|Zxo2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pap2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A9p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qg93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zfv2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Djv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zxo2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uj93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kwo2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .lut_mask = 64'h555500FF33330F0F;
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .lut_mask = 64'h3333555500FF0F0F;
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4 (
+// Location: LABCELL_X30_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bjxwx4~combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Bjxwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xcuwx4~combout  = ( \soc_inst|m0_1|u_logic|Xcuwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Xcuwx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~0_combout  
+// & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bjxwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xcuwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjxwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bjxwx4 .lut_mask = 64'h00000000F5A0F5A0;
-defparam \soc_inst|m0_1|u_logic|Bjxwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4 .lut_mask = 64'h3311331122002200;
+defparam \soc_inst|m0_1|u_logic|Xcuwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jtdwx4~0 (
+// Location: LABCELL_X23_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X0ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dmvwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|X0ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H1qwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .lut_mask = 64'hF0F0F0F0FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jtdwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|X0ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X0ewx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .lut_mask = 64'h00AA00AA55FF55FF;
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: IOIBUF_X16_Y0_N1
-cyclonev_io_ibuf \SW[1]~input (
-	.i(SW[1]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[1]~input_o ));
-// synopsys translate_off
-defparam \SW[1]~input .bus_hold = "false";
-defparam \SW[1]~input .simulate_z_as = "z";
-// synopsys translate_on
-
-// Location: FF_X24_Y10_N47
-dffeas \soc_inst|switches_1|switch_store[1][1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[1]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][1]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][1] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .lut_mask = 64'hF0F0F0F0FF00FF00;
+defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbtwx4~0 (
+// Location: LABCELL_X24_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X0ewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mbtwx4~0_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & \soc_inst|switches_1|switch_store[1][1]~q ) ) ) ) # ( 
-// !\soc_inst|interconnect_1|Equal1~0_combout  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ) ) ) )
+// \soc_inst|m0_1|u_logic|X0ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X0ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yxdwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|X0ewx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
-	.datad(!\soc_inst|switches_1|switch_store[1][1]~q ),
-	.datae(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mbtwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .lut_mask = 64'h0000000003030033;
-defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bgfwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bgfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mbtwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # ((\soc_inst|m0_1|u_logic|B2i3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|I7owx4~combout  & (\soc_inst|m0_1|u_logic|S3i3z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|B2i3z4~q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B2i3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mbtwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bgfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .lut_mask = 64'h8CAF8CAF00000000;
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bgfwx4~1 (
+// Location: LABCELL_X22_Y17_N3
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[11]~24 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bgfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ))) ) )
+// \soc_inst|interconnect_1|HRDATA[11]~24_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bgfwx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .lut_mask = 64'h00000000ABEFABEF;
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[11]~24 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[11]~24 .lut_mask = 64'hAA00AA00FF55FF55;
+defparam \soc_inst|interconnect_1|HRDATA[11]~24 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~0 (
+// Location: LABCELL_X22_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C2rvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & \soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & \soc_inst|m0_1|u_logic|Omyvx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Whlwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bge3z4~q ) # ((\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[11]~24_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[11]~24_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bge3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C2rvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whlwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .lut_mask = 64'hCCFCCCFC00F000F0;
-defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .lut_mask = 64'h000F000FCCCFCCCF;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~1 (
+// Location: LABCELL_X22_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C2rvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout )) ) )
+// \soc_inst|m0_1|u_logic|Whlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lee3z4~q ) # (\soc_inst|m0_1|u_logic|Ble3z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lee3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ble3z4~q  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C2rvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .lut_mask = 64'hFFC0FFC0C0C0C0C0;
-defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .lut_mask = 64'h000033330F0F3F3F;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~2 (
+// Location: LABCELL_X22_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C2rvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|C2rvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C2rvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C2rvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|C2rvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Whlwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Whlwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Whlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Whlwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Whlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (\soc_inst|m0_1|u_logic|She3z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C2rvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C2rvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|She3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Whlwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Whlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whlwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .lut_mask = 64'hCC000000CF000000;
-defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .lut_mask = 64'hEEFF0000CCCC0000;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~2 (
+// Location: LABCELL_X23_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qppvx4~2_combout  = ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qppvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Htyvx4~3_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Whlwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Whlwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|X0ewx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vzdwx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Whlwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .lut_mask = 64'h0000000050555055;
-defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y8_N23
-dffeas \soc_inst|m0_1|u_logic|Ukt2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ukt2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ukt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ukt2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y9_N44
-dffeas \soc_inst|m0_1|u_logic|Ug63z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ug63z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ug63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ug63z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X48_Y8_N52
-dffeas \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .lut_mask = 64'h00000000F5F3F5F3;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4~1 (
+// Location: LABCELL_X22_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V7ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ruj2z4~q  & ( \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Ukt2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ug63z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruj2z4~q  & ( \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ukt2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ug63z4~q )))) ) ) 
-// ) # ( \soc_inst|m0_1|u_logic|Ruj2z4~q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Ukt2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ug63z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruj2z4~q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ukt2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ug63z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Qfzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Whlwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ( 
+// ((\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Whlwx4~3_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ukt2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ug63z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ruj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V7ywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qfzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .lut_mask = 64'hFDB97531ECA86420;
-defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y9_N19
-dffeas \soc_inst|m0_1|u_logic|Txj2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Txj2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Txj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Txj2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y9_N28
-dffeas \soc_inst|m0_1|u_logic|Duu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Duu2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Duu2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y12_N55
-dffeas \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .lut_mask = 64'h5F555F550F000F00;
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4~0 (
+// Location: LABCELL_X23_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V7ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Duu2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Txj2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fwj2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Duu2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Txj2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fwj2z4~q ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Qfzvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qfzvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fwj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Txj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Duu2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qfzvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V7ywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .lut_mask = 64'hFAFAFC0C0A0AFC0C;
-defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .lut_mask = 64'h2A002A003F003F00;
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4 (
+// Location: LABCELL_X30_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V7ywx4~combout  = ( \soc_inst|m0_1|u_logic|V7ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|V7ywx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V7ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|V7ywx4~1_combout  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Aihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|V7ywx4~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V7ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V7ywx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aihvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V7ywx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V7ywx4 .lut_mask = 64'h1100110011551155;
-defparam \soc_inst|m0_1|u_logic|V7ywx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .lut_mask = 64'h5555555540404040;
+defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A7ywx4~0 (
+// Location: LABCELL_X30_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A7ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|V7ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|V7ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Aihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Add5~89_sumout  & (((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Add5~89_sumout  & ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V7ywx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~21_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aihvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .lut_mask = 64'h220022002F002F00;
-defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .lut_mask = 64'hAAA08880FFF5CCC4;
+defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D5ywx4~0 (
+// Location: LABCELL_X30_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|A7ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q 
-// ) # (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Aihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aihvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Aihvx4~2_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aihvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Aihvx4~2_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aihvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aihvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .lut_mask = 64'hFFF0FFF0000F000F;
-defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .lut_mask = 64'h00000000C0C0C0C4;
+defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F7qwx4 (
+// Location: FF_X30_Y18_N20
+dffeas \soc_inst|m0_1|u_logic|Xsx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xsx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xsx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vezvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F7qwx4~combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Vezvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~17_sumout  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~17_sumout  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~17_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~17_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~17_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F7qwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vezvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F7qwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F7qwx4 .lut_mask = 64'h050F050F0A000A00;
-defparam \soc_inst|m0_1|u_logic|F7qwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vezvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vezvx4 .lut_mask = 64'hCFCFCF008A8A8A00;
+defparam \soc_inst|m0_1|u_logic|Vezvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N36
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[26]~8 (
+// Location: LABCELL_X30_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Galvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[26]~8_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select [3]) # (\soc_inst|m0_1|u_logic|hwdata_o~10_combout ))) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & \soc_inst|ram_1|byte_select [3])) ) )
+// \soc_inst|m0_1|u_logic|Galvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( \soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Xsx2z4~q )) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( \soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xsx2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Hak2z4~q  & ( !\soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Xsx2z4~q 
+// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( !\soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Xsx2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
-	.datad(!\soc_inst|ram_1|byte_select [3]),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vezvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[26]~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[26]~8 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[26]~8 .lut_mask = 64'h0005000555055505;
-defparam \soc_inst|ram_1|data_to_memory[26]~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Galvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Galvx4~0 .lut_mask = 64'h00B0F0B000BBFFBB;
+defparam \soc_inst|m0_1|u_logic|Galvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y8_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 (
-	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[26]~8_combout ,\soc_inst|ram_1|data_to_memory[2]~7_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X30_Y16_N37
+dffeas \soc_inst|m0_1|u_logic|Hak2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_bit_number = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_bit_number = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B2CF7C680700001601080A0501005014A40A00A40A00A40A00A40803FFFFFFFFFFFFD70014110404444400000041001110";
+defparam \soc_inst|m0_1|u_logic|Hak2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hak2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7qwx4~0 (
+// Location: LABCELL_X29_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T7qwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[29]~0_combout  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[29]~0_combout  & 
-// ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & \soc_inst|m0_1|u_logic|B7owx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Vgq2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) 
+// # (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vgq2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vgq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T7qwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .lut_mask = 64'h0C0C0C0C000F000F;
-defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .lut_mask = 64'h8480040000000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkmwx4~0 (
+// Location: FF_X27_Y8_N46
+dffeas \soc_inst|m0_1|u_logic|Gfq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gfq2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gfq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gfq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jkmwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T7qwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Hzj2z4~q ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Gfq2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I443z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Gfq2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|I443z4~q ) # 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T7qwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|I443z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gfq2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jkmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .lut_mask = 64'hFFFCFFFC00000000;
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .lut_mask = 64'h00000D0000000800;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkmwx4~1 (
+// Location: LABCELL_X29_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|A6ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Jkmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|F7qwx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|A6ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jkmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|F7qwx4~combout ) # (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Pdbwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~5_combout  & 
+// !\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|F7qwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jkmwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdbwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdbwx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .lut_mask = 64'h0F0C0F0C0A080A08;
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y7_N32
+dffeas \soc_inst|m0_1|u_logic|Art2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Art2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Art2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Art2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y8_N41
+dffeas \soc_inst|m0_1|u_logic|J0v2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J0v2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J0v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J0v2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yjzvx4~0 (
+// Location: LABCELL_X29_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yjzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) # ((\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J0v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Art2z4~q  & \soc_inst|m0_1|u_logic|T31xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|J0v2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Art2z4~q  & 
+// \soc_inst|m0_1|u_logic|T31xx4~0_combout )) # (\soc_inst|m0_1|u_logic|R91xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Art2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J0v2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .lut_mask = 64'h55005500F5F0F5F0;
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .lut_mask = 64'h0FCF0FCF00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y10_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yjzvx4~1 (
+// Location: FF_X29_Y7_N56
+dffeas \soc_inst|m0_1|u_logic|An63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|An63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|An63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X30_Y10_N50
+dffeas \soc_inst|m0_1|u_logic|Yx83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yx83z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yx83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yjzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yjzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yjzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~7_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yx83z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|An63z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|An63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yx83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .lut_mask = 64'h2323AFAF00000000;
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .lut_mask = 64'h0000000008080300;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~2 (
+// Location: MLABCELL_X28_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|R7iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & \soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~8_combout  = ( \soc_inst|m0_1|u_logic|Hmh3z4~q  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~7_combout  & \soc_inst|m0_1|u_logic|Wnh3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hmh3z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~7_combout  & \soc_inst|m0_1|u_logic|Wnh3z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Hmh3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdbwx4~7_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hmh3z4~q  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wnh3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hmh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hihvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .lut_mask = 64'h00FA00F000FA00F0;
-defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .lut_mask = 64'h8888CCCC08080C0C;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~1 (
+// Location: LABCELL_X29_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( \soc_inst|m0_1|u_logic|Lrx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~29_sumout ) 
-// # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( \soc_inst|m0_1|u_logic|Lrx2z4~q  & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~29_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( !\soc_inst|m0_1|u_logic|Lrx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~29_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( !\soc_inst|m0_1|u_logic|Lrx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~29_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~combout  = ( \soc_inst|m0_1|u_logic|Pdbwx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Pdbwx4~6_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Jw73z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~29_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdbwx4~6_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdbwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jw73z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hihvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .lut_mask = 64'hCC88C080FFBBF0B0;
-defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4 .lut_mask = 64'h0000000044044404;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~0 (
+// Location: LABCELL_X30_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cfzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hihvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hihvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hihvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hihvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Cfzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdbwx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hihvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hihvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .lut_mask = 64'h00000000FF000100;
-defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .lut_mask = 64'h000000000000D000;
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y14_N28
-dffeas \soc_inst|m0_1|u_logic|Lrx2z4 (
+// Location: FF_X29_Y7_N53
+dffeas \soc_inst|m0_1|u_logic|Jw73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jw73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lrx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lrx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jw73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~21 (
+// Location: LABCELL_X29_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~74  ))
-// \soc_inst|m0_1|u_logic|Add3~22  = CARRY(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~74  ))
+// \soc_inst|m0_1|u_logic|Fexwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Jw73z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// ( \soc_inst|m0_1|u_logic|Art2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|An63z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  
+// & ( \soc_inst|m0_1|u_logic|Kiq2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Jw73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Art2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kiq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|An63z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~74 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~21_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~22 ),
+	.combout(\soc_inst|m0_1|u_logic|Fexwx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~21 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .lut_mask = 64'h0F0F00FF33335555;
+defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nhzvx4 (
+// Location: LABCELL_X27_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nhzvx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( \soc_inst|m0_1|u_logic|Add3~21_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( \soc_inst|m0_1|u_logic|Add3~21_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~21_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~21_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Fexwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yx83z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ( \soc_inst|m0_1|u_logic|Gfq2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|J0v2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  
+// & ( \soc_inst|m0_1|u_logic|Vgq2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add3~21_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vgq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yx83z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gfq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|J0v2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fexwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nhzvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nhzvx4 .lut_mask = 64'hFF33AA22F030A020;
-defparam \soc_inst|m0_1|u_logic|Nhzvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .lut_mask = 64'h555500FF0F0F3333;
+defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5lvx4~0 (
+// Location: MLABCELL_X28_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R5lvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~q )) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|S8k2z4~q  & ( !\soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~q 
-// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( !\soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Lrx2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Fexwx4~combout  = ( \soc_inst|m0_1|u_logic|Fexwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fexwx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fexwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fexwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fexwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fexwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R5lvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fexwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .lut_mask = 64'h2030E0F02233EEFF;
-defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y4_N46
-dffeas \soc_inst|m0_1|u_logic|S8k2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|R5lvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S8k2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S8k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S8k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fexwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4 .lut_mask = 64'h3303330330003000;
+defparam \soc_inst|m0_1|u_logic|Fexwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~0 (
+// Location: LABCELL_X22_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yvtwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fm72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rd53z4~q  & ( \soc_inst|m0_1|u_logic|I443z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rd53z4~q  & ( !\soc_inst|m0_1|u_logic|I443z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rd53z4~q  & ( !\soc_inst|m0_1|u_logic|I443z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Yvtwx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|Fexwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fexwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rd53z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I443z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fm72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .lut_mask = 64'h0050004000100000;
-defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y5_N14
-dffeas \soc_inst|m0_1|u_logic|Wnh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wnh3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wnh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wnh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .lut_mask = 64'hFF0FFF0FF000F000;
+defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~2 (
+// Location: LABCELL_X22_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fm72z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Djh3z4~q  & ( \soc_inst|m0_1|u_logic|Skh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Djh3z4~q  & ( !\soc_inst|m0_1|u_logic|Skh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djh3z4~q  & ( !\soc_inst|m0_1|u_logic|Skh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Gvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Yvtwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Djh3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Skh3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fm72z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .lut_mask = 64'h0A00080002000000;
-defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y4_N2
-dffeas \soc_inst|m0_1|u_logic|Zu23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zu23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zu23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zu23z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y4_N13
-dffeas \soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y4_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~1 (
+// Location: LABCELL_X19_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jymwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fm72z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zu23z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Jymwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ieh3z4~q  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[21]~29_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|B7owx4~combout )))) # (\soc_inst|m0_1|u_logic|I7owx4~combout  & (\soc_inst|m0_1|u_logic|Ogo2z4~q  & ((!\soc_inst|interconnect_1|HRDATA[21]~29_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ieh3z4~q  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[21]~29_combout ) # ((!\soc_inst|m0_1|u_logic|B7owx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|I7owx4~combout  & (\soc_inst|m0_1|u_logic|Ogo2z4~q  & ((!\soc_inst|interconnect_1|HRDATA[21]~29_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ieh3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[21]~29_combout ) # ((!\soc_inst|m0_1|u_logic|B7owx4~combout )))) # (\soc_inst|m0_1|u_logic|I7owx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Ogo2z4~q  & ((!\soc_inst|interconnect_1|HRDATA[21]~29_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zu23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ieh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fm72z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jymwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .lut_mask = 64'h00000000E2000000;
-defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .lut_mask = 64'hAF8CAF8C0000AF8C;
+defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Co72z4~0 (
+// Location: LABCELL_X22_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jymwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Co72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Hmh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jymwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jymwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jymwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Gvdwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hmh3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jymwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Co72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Co72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Co72z4~0 .lut_mask = 64'h0008000000000000;
-defparam \soc_inst|m0_1|u_logic|Co72z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .lut_mask = 64'h0000F3F00000F3FF;
+defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~3 (
+// Location: LABCELL_X22_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fm72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fm72z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Co72z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fm72z4~0_combout  & (!\soc_inst|m0_1|u_logic|Fm72z4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wnh3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Cymwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uic3z4~q ) # (\soc_inst|m0_1|u_logic|N7c3z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N7c3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Uic3z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fm72z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wnh3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fm72z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fm72z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Co72z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fm72z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cymwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .lut_mask = 64'hA020000000000000;
-defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .lut_mask = 64'h000000FF555555FF;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsnvx4~0 (
+// Location: LABCELL_X22_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( \soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Hak2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( \soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Hak2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( !\soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Hak2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( !\soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Hak2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Cymwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mka3z4~q  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cymwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mka3z4~q  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cymwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fm72z4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Cymwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Mka3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cymwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .lut_mask = 64'h303A303A353F303A;
-defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .lut_mask = 64'h000000003F3F3333;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~17 (
+// Location: LABCELL_X22_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xsx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~22  ))
-// \soc_inst|m0_1|u_logic|Add3~18  = CARRY(( !\soc_inst|m0_1|u_logic|Xsx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~22  ))
+// \soc_inst|m0_1|u_logic|Cymwx4~2_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[5]~28_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (\soc_inst|m0_1|u_logic|Qxa3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Cymwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[5]~28_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & !\soc_inst|m0_1|u_logic|Cymwx4~1_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[5]~28_combout  & ( (\soc_inst|m0_1|u_logic|Qxa3z4~q  & !\soc_inst|m0_1|u_logic|Cymwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( 
+// !\soc_inst|interconnect_1|HRDATA[5]~28_combout  & ( !\soc_inst|m0_1|u_logic|Cymwx4~1_combout  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cymwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~22 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~17_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~18 ),
+	.combout(\soc_inst|m0_1|u_logic|Cymwx4~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~17 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .lut_mask = 64'hFF000F00AA000A00;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vezvx4 (
+// Location: LABCELL_X22_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vezvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~17_sumout  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~17_sumout  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~17_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~17_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Cymwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Cymwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fkdwx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Cymwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Fkdwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~17_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Cymwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vezvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vezvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vezvx4 .lut_mask = 64'hCFCFCF008A8A8A00;
-defparam \soc_inst|m0_1|u_logic|Vezvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .lut_mask = 64'h0000ABAB0000FBFB;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Galvx4~0 (
+// Location: LABCELL_X22_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qe0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Galvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Xsx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vezvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Xsx2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Xsx2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qe0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Cymwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Cymwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vezvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Galvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Galvx4~0 .lut_mask = 64'h2E3F00002E3F2E3F;
-defparam \soc_inst|m0_1|u_logic|Galvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y5_N14
-dffeas \soc_inst|m0_1|u_logic|Hak2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hak2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hak2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hak2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y4_N20
-dffeas \soc_inst|m0_1|u_logic|Aez2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aez2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aez2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aez2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y4_N1
-dffeas \soc_inst|m0_1|u_logic|Zu33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zu33z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zu33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zu33z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y4_N55
-dffeas \soc_inst|m0_1|u_logic|I453z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I453z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I453z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I453z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .lut_mask = 64'hCFCCCFCC0F000F00;
+defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~0 (
+// Location: LABCELL_X22_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qe0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tf72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zu33z4~q  & ( \soc_inst|m0_1|u_logic|I453z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zu33z4~q  & ( !\soc_inst|m0_1|u_logic|I453z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zu33z4~q  & ( !\soc_inst|m0_1|u_logic|I453z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zu33z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I453z4~q ),
+// \soc_inst|m0_1|u_logic|Qe0wx4~combout  = ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Qe0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qe0wx4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tf72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .lut_mask = 64'h0044000400400000;
-defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y4_N32
-dffeas \soc_inst|m0_1|u_logic|Ql23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ql23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ql23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qe0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qe0wx4 .lut_mask = 64'h0A00AA000F00FF00;
+defparam \soc_inst|m0_1|u_logic|Qe0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc13z4~feeder (
+// Location: LABCELL_X17_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~61 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Add2~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Foe3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~66  ))
+// \soc_inst|m0_1|u_logic|Add2~62  = CARRY(( !\soc_inst|m0_1|u_logic|Foe3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~66  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~66 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc13z4~feeder_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~61_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~62 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc13z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Hc13z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y7_N59
-dffeas \soc_inst|m0_1|u_logic|Hc13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hc13z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hc13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hc13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~61 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~61 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y4_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~1 (
+// Location: LABCELL_X19_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gehvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tf72z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Hc13z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ql23z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Hc13z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Ql23z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Gehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~61_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|S5pvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Foe3z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~61_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Foe3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ql23z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc13z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~61_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tf72z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gehvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .lut_mask = 64'h2220000000200000;
-defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .lut_mask = 64'h5050505050FA50FA;
+defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tiz2z4~feeder (
+// Location: MLABCELL_X21_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gehvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tiz2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Gehvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~25_sumout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Qe0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Qe0wx4~combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gehvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tiz2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tiz2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tiz2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Tiz2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .lut_mask = 64'h00000000D0D0D000;
+defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y4_N59
-dffeas \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE (
+// Location: FF_X21_Y13_N46
+dffeas \soc_inst|m0_1|u_logic|Foe3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tiz2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Foe3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Foe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Foe3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N4
-dffeas \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X17_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~105 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~105_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~62  ))
+// \soc_inst|m0_1|u_logic|Add2~106  = CARRY(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~62  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~62 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~105_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~106 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~105 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~105 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~105 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~2 (
+// Location: LABCELL_X17_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vihvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tf72z4~2_combout  = ( \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q 
-//  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Vihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~105_sumout  & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~105_sumout  & ( 
+// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Add2~105_sumout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|S5pvx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Add2~105_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tf72z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vihvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .lut_mask = 64'h0E00040000000000;
-defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .lut_mask = 64'h00003333F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N44
-dffeas \soc_inst|m0_1|u_logic|Rek2z4 (
+// Location: LABCELL_X19_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vihvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ba0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add5~1_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ba0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~1_sumout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vihvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .lut_mask = 64'h00000000A080F0C0;
+defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y13_N37
+dffeas \soc_inst|m0_1|u_logic|Nox2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rek2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nox2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rek2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rek2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nox2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nox2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qh72z4~0 (
+// Location: LABCELL_X19_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qh72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rek2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zdhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kaf3z4~q  & ( ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~117_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kaf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add2~117_sumout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rek2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add2~117_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qh72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zdhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .lut_mask = 64'h0000000020000000;
-defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .lut_mask = 64'hCCC00000FFF30000;
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y4_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~3 (
+// Location: LABCELL_X19_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tf72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Tf72z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Qh72z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tf72z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tf72z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Aez2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Oa3wx4~combout  = ( \soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oa3wx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oa3wx4~1_combout  & 
+// (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aez2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tf72z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tf72z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tf72z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qh72z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tf72z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .lut_mask = 64'hC400000000000000;
-defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4 .lut_mask = 64'h001F001F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Oa3wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Esnvx4~0 (
+// Location: LABCELL_X19_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Esnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( \soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( \soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Ohh3z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( !\soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( !\soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zdhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Oa3wx4~combout  & ( (\soc_inst|m0_1|u_logic|Zdhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~125_sumout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Oa3wx4~combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (\soc_inst|m0_1|u_logic|Zdhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~125_sumout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tf72z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zdhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Oa3wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .lut_mask = 64'h02F202F207F702F2;
-defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .lut_mask = 64'h0A080A080F0C0F0C;
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sscvx4 (
+// Location: FF_X19_Y14_N25
+dffeas \soc_inst|m0_1|u_logic|Kaf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kaf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kaf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y92wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sscvx4~combout  = ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  ) ) # ( 
-// \soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Esnvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Y92wx4~combout  = ( \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~113_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~113_sumout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~113_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add3~113_sumout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add3~113_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sscvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y92wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sscvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sscvx4 .lut_mask = 64'h0000FFFFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Sscvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y92wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y92wx4 .lut_mask = 64'hEEEEE0E0EE00E000;
+defparam \soc_inst|m0_1|u_logic|Y92wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C3qvx4~1 (
+// Location: LABCELL_X36_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C3qvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|C3qvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add5~85_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|K8ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|B6j2z4~q  & ( \soc_inst|m0_1|u_logic|Y92wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  & ( \soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|B6j2z4~q  & ( !\soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kaf3z4~q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  & ( !\soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Kaf3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y92wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .lut_mask = 64'h00000000080A0000;
-defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .lut_mask = 64'h0C04CCC40F05FFF5;
+defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N26
-dffeas \soc_inst|m0_1|u_logic|Vhk2z4 (
+// Location: FF_X36_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|B6j2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vhk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B6j2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vhk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vhk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B6j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B6j2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~0 (
+// Location: LABCELL_X35_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hc13z4~q  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vhk2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc13z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Y91xx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Hc13z4~q  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vhk2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc13z4~q  
-// & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vhk2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|R6cwx4~1_combout  = ( \soc_inst|m0_1|u_logic|B6j2z4~q  & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Mof3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|B6j2z4~q  & ( !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Mof3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  
+// & ( !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Mof3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vhk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Mof3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .lut_mask = 64'h55005500FFFF5500;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldf3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ldf3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fa2wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hc13z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ldf3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .lut_mask = 64'h0A0A0A0AFFFF0A0A;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ldf3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ldf3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ldf3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y4_N41
-dffeas \soc_inst|m0_1|u_logic|Ggk2z4 (
+// Location: FF_X34_Y8_N20
+dffeas \soc_inst|m0_1|u_logic|Ldf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ldf3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ggk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ldf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ggk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ggk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ldf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ldf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y4_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~1 (
+// Location: MLABCELL_X34_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I852z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ggk2z4~q ) # (!\soc_inst|m0_1|u_logic|Ohh3z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ohh3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ggk2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|I852z4~0_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ggk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ldf3z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I852z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .lut_mask = 64'h0000CCCCF0F0FCFC;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I852z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I852z4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|I852z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y5_N5
-dffeas \soc_inst|m0_1|u_logic|Nf03z4 (
+// Location: FF_X28_Y11_N2
+dffeas \soc_inst|m0_1|u_logic|Bqf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nf03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bqf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nf03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nf03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bqf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bqf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y4_N19
-dffeas \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X29_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S652z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S652z4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Bqf3z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bqf3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|S652z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S652z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S652z4~0 .lut_mask = 64'h0000000020002000;
+defparam \soc_inst|m0_1|u_logic|S652z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y4_N58
-dffeas \soc_inst|m0_1|u_logic|Tiz2z4 (
+// Location: FF_X28_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tiz2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tiz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tiz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tiz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~4 (
+// Location: MLABCELL_X28_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W852z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tiz2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nf03z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nf03z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tiz2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nf03z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Nf03z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|W852z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wbf3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nf03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tiz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wbf3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W852z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .lut_mask = 64'hF5F500F531310031;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W852z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W852z4~0 .lut_mask = 64'h0001000100000000;
+defparam \soc_inst|m0_1|u_logic|W852z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y7_N41
-dffeas \soc_inst|m0_1|u_logic|Rd63z4 (
+// Location: FF_X27_Y9_N58
+dffeas \soc_inst|m0_1|u_logic|Xmf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rd63z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rd63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xmf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rd63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rd63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xmf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xmf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~5 (
+// Location: MLABCELL_X28_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G752z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zkk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rd63z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zkk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rd63z4~q )) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|G752z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Xmf3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rd63z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zkk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xmf3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G752z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .lut_mask = 64'h0000410100004000;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G752z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G752z4~0 .lut_mask = 64'h0100010000000000;
+defparam \soc_inst|m0_1|u_logic|G752z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y5_N50
-dffeas \soc_inst|m0_1|u_logic|Aru2z4 (
+// Location: FF_X28_Y9_N23
+dffeas \soc_inst|m0_1|u_logic|Aff3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aru2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Aff3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aru2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aru2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aff3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aff3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~6 (
+// Location: MLABCELL_X28_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P852z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Aru2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rht2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Aru2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Rht2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|P852z4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Aff3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rht2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aru2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aff3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P852z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .lut_mask = 64'h0000080C00000800;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P852z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P852z4~0 .lut_mask = 64'h0000000040004000;
+defparam \soc_inst|m0_1|u_logic|P852z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~7 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Izpvx4~6_combout  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|An73z4~q  & (!\soc_inst|m0_1|u_logic|Izpvx4~5_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rek2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Izpvx4~6_combout  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Izpvx4~5_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rek2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|An73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rek2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Izpvx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Izpvx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+// Location: MLABCELL_X28_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6cwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|P852z4~0_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S652z4~0_combout  & (\soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|W852z4~0_combout  & !\soc_inst|m0_1|u_logic|G752z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P852z4~0_combout  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S652z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|W852z4~0_combout  & !\soc_inst|m0_1|u_logic|G752z4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|S652z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|W852z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G752z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P852z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .lut_mask = 64'hF030000050100000;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .lut_mask = 64'hA000000020000000;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y4_N31
-dffeas \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE (
+// Location: FF_X29_Y6_N41
+dffeas \soc_inst|m0_1|u_logic|Orj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Orj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Orj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Orj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~3 (
+// Location: LABCELL_X29_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I453z4~q ) # ((\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|R6cwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Eif3z4~q ) # ((!\soc_inst|m0_1|u_logic|Orj2z4~q  & \soc_inst|m0_1|u_logic|V41xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Orj2z4~q  & \soc_inst|m0_1|u_logic|V41xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I453z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Orj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eif3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .lut_mask = 64'h0F000F00AFAAAFAA;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kjk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zu33z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zu33z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Kjk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zu33z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y9_N41
+dffeas \soc_inst|m0_1|u_logic|Fpi2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fpi2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .lut_mask = 64'h00F000F0CCFCCCFC;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fpi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fpi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4 (
+// Location: MLABCELL_X28_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~combout  = ( !\soc_inst|m0_1|u_logic|Izpvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Izpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Izpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Izpvx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Izpvx4~4_combout  & \soc_inst|m0_1|u_logic|Izpvx4~7_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|R6cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fpi2z4~q ) # (!\soc_inst|m0_1|u_logic|Ilf3z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ilf3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Fpi2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Izpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Izpvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Izpvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Izpvx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Izpvx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fpi2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ilf3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4 .lut_mask = 64'h0008000000000000;
-defparam \soc_inst|m0_1|u_logic|Izpvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .lut_mask = 64'h0000CCCCFF00FFCC;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sx3wx4~0 (
+// Location: MLABCELL_X28_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O452z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sx3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( \soc_inst|m0_1|u_logic|Izpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( \soc_inst|m0_1|u_logic|Izpvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  
-// & ((!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( !\soc_inst|m0_1|u_logic|Izpvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( !\soc_inst|m0_1|u_logic|Izpvx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|O452z4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Tjf3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tjf3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O452z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .lut_mask = 64'h00FE00CE00320002;
-defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O452z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O452z4~0 .lut_mask = 64'h0000000000800080;
+defparam \soc_inst|m0_1|u_logic|O452z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imvvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Imvvx4~0_combout  = (\soc_inst|m0_1|u_logic|Wfuwx4~combout  & (\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|Sx3wx4~0_combout ))
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y7_N55
+dffeas \soc_inst|m0_1|u_logic|Pgf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pgf3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .lut_mask = 64'h0003000300030003;
-defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pgf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pgf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5mvx4~0 (
+// Location: MLABCELL_X28_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C552z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T5mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wbk2z4~q  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Sta2z4~0_combout 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|Wbk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|C552z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pgf3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pgf3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T5mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C552z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .lut_mask = 64'h5555555555545554;
-defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C552z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C552z4~0 .lut_mask = 64'h0002000200000000;
+defparam \soc_inst|m0_1|u_logic|C552z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5mvx4~1 (
+// Location: LABCELL_X27_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M352z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|T5mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K3l2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Imvvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|T5mvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|M352z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qrf3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T5mvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M352z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .lut_mask = 64'h0F0F0F0FFFEFFFEF;
-defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M352z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M352z4~0 .lut_mask = 64'h0000000030000000;
+defparam \soc_inst|m0_1|u_logic|M352z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y10_N20
-dffeas \soc_inst|m0_1|u_logic|Wbk2z4 (
+// Location: FF_X33_Y8_N59
+dffeas \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wbk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wbk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwywx4~0 (
+// Location: LABCELL_X33_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T352z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wwywx4~0_combout  = (!\soc_inst|m0_1|u_logic|Wbk2z4~q  & !\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q )
+// \soc_inst|m0_1|u_logic|T352z4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T352z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .lut_mask = 64'hF000F000F000F000;
-defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T352z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T352z4~0 .lut_mask = 64'h00C0000000000000;
+defparam \soc_inst|m0_1|u_logic|T352z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6pwx4~0 (
+// Location: MLABCELL_X28_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I6pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|R6cwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|M352z4~0_combout  & ( !\soc_inst|m0_1|u_logic|T352z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O452z4~0_combout  & (!\soc_inst|m0_1|u_logic|C552z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uuf3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O452z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C552z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M352z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T352z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .lut_mask = 64'h8A00EF00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .lut_mask = 64'hC040000000000000;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N4rvx4~0 (
+// Location: MLABCELL_X34_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N4rvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|C0zwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|C0zwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & \soc_inst|m0_1|u_logic|C0zwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|C0zwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|R6cwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|R6cwx4~0_combout  & ( \soc_inst|m0_1|u_logic|R6cwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|R6cwx4~1_combout  & (!\soc_inst|m0_1|u_logic|I852z4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|R6cwx4~4_combout  & !\soc_inst|m0_1|u_logic|R6cwx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R6cwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I852z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R6cwx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R6cwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R6cwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .lut_mask = 64'h3233003332333233;
-defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbnvx4~0 (
+// Location: LABCELL_X29_Y16_N24
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[23]~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[3]~26_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[3]~26_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[3]~26_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[3]~26_combout )))) ) ) )
+// \soc_inst|ram_1|data_to_memory[23]~0_combout  = ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[23]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .lut_mask = 64'hC080F0A0CC88FFAA;
-defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y10_N13
-dffeas \soc_inst|m0_1|u_logic|Gtp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gtp2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gtp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gtp2z4 .power_up = "low";
+defparam \soc_inst|ram_1|data_to_memory[23]~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[23]~0 .lut_mask = 64'hF3F0F3F0C0F0C0F0;
+defparam \soc_inst|ram_1|data_to_memory[23]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L8mvx4~0 (
+// Location: MLABCELL_X28_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V4ovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L8mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout 
-// )))) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gtp2z4~q  & ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|V4ovx4~0_combout  = (\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|ram_1|data_to_memory[23]~0_combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datad(!\soc_inst|ram_1|data_to_memory[23]~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .lut_mask = 64'hA0ECAFEF00CC0FCF;
-defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y14_N2
-dffeas \soc_inst|m0_1|u_logic|Cam2z4 (
+// Location: FF_X21_Y18_N4
+dffeas \soc_inst|m0_1|u_logic|Vfd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vfd3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cam2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cam2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y14_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kwa2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|R1w2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & 
-// \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .lut_mask = 64'h0000000000000002;
-defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vfd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vfd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nzhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oar2z4~q  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout  & (\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Oar2z4~q  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & (!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Oar2z4~q  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Oar2z4~q  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & (!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y18_N13
+dffeas \soc_inst|m0_1|u_logic|Z4l2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .lut_mask = 64'h5400FCFC540054FC;
-defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z4l2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y12_N37
-dffeas \soc_inst|m0_1|u_logic|Oar2z4 (
+// Location: FF_X27_Y20_N29
+dffeas \soc_inst|m0_1|u_logic|Uqi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Oar2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uqi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oar2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Oar2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uqi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uqi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxvwx4~0 (
+// Location: LABCELL_X24_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zxvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tib3z4~q  & ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|D4g3z4~q  & ((!\soc_inst|m0_1|u_logic|Vgs2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Mis2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tib3z4~q  & ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vgs2z4~q  & (!\soc_inst|m0_1|u_logic|Mis2z4~q  & (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|D4g3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tib3z4~q  & ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vgs2z4~q  & (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|D4g3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|R6xwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svs2z4~q  & ( ((\soc_inst|m0_1|u_logic|K3uvx4~0_combout  & \soc_inst|m0_1|u_logic|Uqi2z4~q )) # (\soc_inst|m0_1|u_logic|E0uvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Svs2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|K3uvx4~0_combout  & \soc_inst|m0_1|u_logic|Uqi2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zxvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6xwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .lut_mask = 64'h0000000A0008000E;
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .lut_mask = 64'h000F000F555F555F;
+defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxvwx4~1 (
+// Location: LABCELL_X23_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zxvwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Zxvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oar2z4~q  & \soc_inst|m0_1|u_logic|Dpc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|R6xwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R6xwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # ((!\soc_inst|m0_1|u_logic|Uls2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|K7pwx4~combout  & (!\soc_inst|m0_1|u_logic|Z4l2z4~q  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Uls2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R6xwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6xwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .lut_mask = 64'h0055005500000000;
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .lut_mask = 64'hFCA8FCA800000000;
+defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~0 (
+// Location: LABCELL_X23_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Arzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Mis2z4~q  & !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Mis2z4~q ) # (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|R6xwx4~2_combout  = ( \soc_inst|m0_1|u_logic|R6xwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (\soc_inst|m0_1|u_logic|N1uvx4~combout  & \soc_inst|m0_1|u_logic|Vfd3z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|R6xwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vfd3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R6xwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6xwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .lut_mask = 64'hF0FFF0FFF000F000;
-defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .lut_mask = 64'h5555555501010101;
+defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y13_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pazwx4 (
+// Location: FF_X17_Y17_N37
+dffeas \soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Walwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pazwx4~combout  = ( \soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Arzwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Iazwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Arzwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & \soc_inst|m0_1|u_logic|Arzwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Arzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Iazwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Arzwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Walwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[23]~8_combout  & ( ((\soc_inst|m0_1|u_logic|I7owx4~combout  & !\soc_inst|m0_1|u_logic|Uei3z4~q )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[23]~8_combout  & ( (\soc_inst|m0_1|u_logic|I7owx4~combout  & !\soc_inst|m0_1|u_logic|Uei3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Walwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pazwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pazwx4 .lut_mask = 64'h4CCC00CCCCCC4CCC;
-defparam \soc_inst|m0_1|u_logic|Pazwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Walwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Walwx4~0 .lut_mask = 64'h444444444F4F4F4F;
+defparam \soc_inst|m0_1|u_logic|Walwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2zwx4~0 (
+// Location: LABCELL_X24_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Walwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G2zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pazwx4~combout  & (\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ((\soc_inst|m0_1|u_logic|J7zwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|B6pwx4~3_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pazwx4~combout  & (\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & \soc_inst|m0_1|u_logic|B6pwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Walwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Walwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Walwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R6xwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Walwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .lut_mask = 64'h0202020202220222;
-defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Walwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Walwx4~1 .lut_mask = 64'h88080000AA0A0000;
+defparam \soc_inst|m0_1|u_logic|Walwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2zwx4~1 (
+// Location: MLABCELL_X25_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G2zwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|R5zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Walwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( 
+// ((\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Walwx4~1_combout )) # (\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R5zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .lut_mask = 64'h5F0F5F0F55005500;
+defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W5rvx4 (
+// Location: MLABCELL_X25_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R5zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|R5zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|R5zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R5zvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .lut_mask = 64'hFF33F03000000000;
+defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W5rvx4~combout  = ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|J3qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W5rvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W5rvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W5rvx4 .lut_mask = 64'h0000000000AA00AA;
-defparam \soc_inst|m0_1|u_logic|W5rvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .lut_mask = 64'h0000000000003F7F;
+defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbnvx4~0 (
+// Location: FF_X28_Y11_N59
+dffeas \soc_inst|m0_1|u_logic|Lpu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lpu2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lpu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Owq2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[4]~23_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Owq2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[4]~23_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Owq2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W5rvx4~combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[4]~23_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Owq2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W5rvx4~combout  & (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[4]~23_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|N3ywx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Lpu2z4~q  & ( \soc_inst|m0_1|u_logic|Glj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  
+// & !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lpu2z4~q  & ( !\soc_inst|m0_1|u_logic|Glj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lpu2z4~q  & ( !\soc_inst|m0_1|u_logic|Glj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W5rvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Lpu2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Glj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N3ywx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .lut_mask = 64'hE000E0E0EE00EEEE;
-defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .lut_mask = 64'h1100100001000000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y10_N55
-dffeas \soc_inst|m0_1|u_logic|Owq2z4 (
+// Location: FF_X29_Y11_N4
+dffeas \soc_inst|m0_1|u_logic|Xti2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Owq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xti2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Owq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Owq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xti2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xti2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Leuvx4~0 (
+// Location: LABCELL_X29_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Leuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|N3ywx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Koj2z4~q  & ( \soc_inst|m0_1|u_logic|Xti2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Koj2z4~q  & ( !\soc_inst|m0_1|u_logic|Xti2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Koj2z4~q  & ( !\soc_inst|m0_1|u_logic|Xti2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+// )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Koj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xti2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Leuvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N3ywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .lut_mask = 64'h0000077707770777;
-defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .lut_mask = 64'h0003000100020000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Leuvx4~1 (
+// Location: MLABCELL_X28_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Leuvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & (\soc_inst|m0_1|u_logic|Leuvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Leuvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Leuvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|N3ywx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Cgt2z4~q  & ( \soc_inst|m0_1|u_logic|Ll73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cgt2z4~q  & ( !\soc_inst|m0_1|u_logic|Ll73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cgt2z4~q  & ( !\soc_inst|m0_1|u_logic|Ll73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Leuvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cgt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ll73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N3ywx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .lut_mask = 64'h00AF00AF00000023;
-defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .lut_mask = 64'h0022000200200000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pamvx4~0 (
+// Location: LABCELL_X29_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pamvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~q  & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Trq2z4~q  & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Trq2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Trq2z4~q  & ( !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout 
-// )))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Owq2z4~q  & ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|N3ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Cc63z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Isi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Cc63z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Isi2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Isi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cc63z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N3ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .lut_mask = 64'hA0ECF5FD00CC55DD;
-defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .lut_mask = 64'h0000808800008000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y14_N43
-dffeas \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X29_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N3ywx4~combout  = ( !\soc_inst|m0_1|u_logic|N3ywx4~2_combout  & ( !\soc_inst|m0_1|u_logic|N3ywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N3ywx4~3_combout  & !\soc_inst|m0_1|u_logic|N3ywx4~1_combout ) ) ) )
 
-// Location: FF_X37_Y4_N14
-dffeas \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|N3ywx4~3_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|N3ywx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N3ywx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N3ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4 .lut_mask = 64'hAA00000000000000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjkvx4~0 (
+// Location: MLABCELL_X25_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U2ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bjkvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) ) )
+// \soc_inst|m0_1|u_logic|U2ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # (\soc_inst|m0_1|u_logic|X77wx4~combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bjkvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .lut_mask = 64'hCCCCCFCF00000F0F;
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .lut_mask = 64'hF050F00000000000;
+defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjkvx4~1 (
+// Location: MLABCELL_X25_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M7qwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bjkvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yuovx4~combout  & ( !\soc_inst|m0_1|u_logic|Bjkvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|R8x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yuovx4~combout  & ( !\soc_inst|m0_1|u_logic|Bjkvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|R8x2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|M7qwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qxc2z4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qxc2z4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bjkvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .lut_mask = 64'hF3F3A2A200000000;
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y4_N13
-dffeas \soc_inst|m0_1|u_logic|Ovc3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ovc3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ovc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ovc3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y11_N44
-dffeas \soc_inst|m0_1|u_logic|Nl53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nl53z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nl53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nl53z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y11_N59
-dffeas \soc_inst|m0_1|u_logic|Ec43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ec43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ec43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .lut_mask = 64'h000000000F0FDFDF;
+defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~0 (
+// Location: LABCELL_X27_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~12 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qw62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ec43z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nl53z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~12_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Y9t2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Rtpvx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Rtpvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nl53z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ec43z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qw62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .lut_mask = 64'h000000000E040000;
-defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .lut_mask = 64'h0F000E0E0F000404;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y11_N14
-dffeas \soc_inst|m0_1|u_logic|Wmp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wmp2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wmp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wmp2z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X25_Y17_N18
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[29]~22 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[29]~22_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ))) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select[3]~DUPLICATE_q )) ) )
 
-// Location: FF_X42_Y11_N29
-dffeas \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|ram_1|data_to_memory[29]~22_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|ram_1|data_to_memory[29]~22 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[29]~22 .lut_mask = 64'h1010131310101313;
+defparam \soc_inst|ram_1|data_to_memory[29]~22 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y11_N35
-dffeas \soc_inst|m0_1|u_logic|V233z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+// Location: M10K_X26_Y10_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[29]~22_combout ,\soc_inst|ram_1|data_to_memory[13]~21_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V233z4~q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V233z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V233z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_bit_number = 13;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_bit_number = 13;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003FFFFFF03C1488390A24181DEF7BDEF785645645645645645645642A555555555555541C313000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~1 (
+// Location: LABCELL_X22_Y17_N30
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[13]~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qw62z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|V233z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|ram_1|data_to_memory[13]~21_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ) # (!\soc_inst|ram_1|byte_select 
+// [1]))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & (\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|V233z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+	.datac(!\soc_inst|ram_1|byte_select [1]),
+	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qw62z4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[13]~21_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .lut_mask = 64'h2200300000000000;
-defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[13]~21 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[13]~21 .lut_mask = 64'h000C000C00FC00FC;
+defparam \soc_inst|ram_1|data_to_memory[13]~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny62z4~0 (
+// Location: MLABCELL_X21_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Ilp2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Hxmwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) # 
+// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ilp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hxmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .lut_mask = 64'h0000000040000000;
-defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .lut_mask = 64'hCCCCCCCCCCC0CCC0;
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N14
-dffeas \soc_inst|m0_1|u_logic|Zr03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zr03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zr03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zr03z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X23_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|F5ewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Hxmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Mouwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|F5ewx4~combout  & ( (\soc_inst|m0_1|u_logic|Hxmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ))) ) )
 
-// Location: FF_X43_Y12_N47
-dffeas \soc_inst|m0_1|u_logic|Fvz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fvz2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hxmwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F5ewx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fvz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fvz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .lut_mask = 64'h0F0C0F0C0A080A08;
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~2 (
+// Location: LABCELL_X22_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mb1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qw62z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fvz2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zr03z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mb1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & !\soc_inst|m0_1|u_logic|Pmnwx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & !\soc_inst|m0_1|u_logic|Pmnwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zr03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fvz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qw62z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mb1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .lut_mask = 64'h0000A0000000C000;
-defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .lut_mask = 64'hAA00AA00EECCEECC;
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~3 (
+// Location: LABCELL_X22_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mb1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qw62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ny62z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qw62z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qw62z4~0_combout  & (!\soc_inst|m0_1|u_logic|Qw62z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wmp2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mb1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mb1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mb1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qw62z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wmp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qw62z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ny62z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qw62z4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mb1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qw62z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .lut_mask = 64'hA200000000000000;
-defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .lut_mask = 64'h0707777700000000;
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mpnvx4~0 (
+// Location: LABCELL_X23_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ovc3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qw62z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ovc3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ovc3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ovc3z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|B91wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( ((\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Ciawx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qw62z4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B91wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .lut_mask = 64'hCCAACCAACCFFCCF0;
-defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~1 .lut_mask = 64'h12FF00FF12120000;
+defparam \soc_inst|m0_1|u_logic|B91wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcuvx4~0 (
+// Location: LABCELL_X23_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vcuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout )))) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Cymwx4~3_combout )))) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|B91wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|B91wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|B91wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|B91wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B91wx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vcuvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B91wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .lut_mask = 64'h0000153F153F153F;
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~2 .lut_mask = 64'hA0A0A0A00000A0A0;
+defparam \soc_inst|m0_1|u_logic|B91wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcuvx4~1 (
+// Location: LABCELL_X23_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & (\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|B91wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ( \soc_inst|m0_1|u_logic|B91wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ( \soc_inst|m0_1|u_logic|B91wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
 	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .lut_mask = 64'h000000008C8C8CAF;
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~0 .lut_mask = 64'h0000000030300010;
+defparam \soc_inst|m0_1|u_logic|B91wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxzvx4~0 (
+// Location: MLABCELL_X21_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxf3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~109_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Vxf3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vxf3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .lut_mask = 64'h00000000000B000B;
-defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vxf3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vxf3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Vxf3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y10_N32
-dffeas \soc_inst|m0_1|u_logic|Ilp2z4 (
+// Location: FF_X21_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vxf3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ilp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ilp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ilp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~6 (
+// Location: MLABCELL_X21_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fvz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q 
-//  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Wmp2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Fvz2z4~q 
-// )) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vr43z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fvz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wmp2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vr43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .lut_mask = 64'hCCAAFF0000AAFF00;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .lut_mask = 64'h0500000040400000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y11_N28
-dffeas \soc_inst|m0_1|u_logic|Mt13z4 (
+// Location: LABCELL_X22_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Lqr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Neu2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lqr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Neu2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lqr2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Neu2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lqr2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .lut_mask = 64'h0C00080000000800;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y12_N29
+dffeas \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mt13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mt13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mt13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y11_N34
-dffeas \soc_inst|m0_1|u_logic|V233z4~DUPLICATE (
+// Location: LABCELL_X22_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Wnv2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Wnv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Wnv2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wnv2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .lut_mask = 64'h0800040408000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y9_N17
+dffeas \soc_inst|m0_1|u_logic|E163z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|E163z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V233z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V233z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E163z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E163z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~5 (
+// Location: LABCELL_X22_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Mt13z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Zr03z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Mt13z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ))) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q ) # (!\soc_inst|m0_1|u_logic|Zr03z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Cq93z4~q  & ( \soc_inst|m0_1|u_logic|E163z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cq93z4~q  & ( !\soc_inst|m0_1|u_logic|E163z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cq93z4~q  & ( !\soc_inst|m0_1|u_logic|E163z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+// )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mt13z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zr03z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cq93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E163z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .lut_mask = 64'hFFF0ACAC0F00ACAC;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .lut_mask = 64'h0003000200010000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~1 (
+// Location: LABCELL_X23_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Eo5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # 
-// ((!\soc_inst|m0_1|u_logic|Ec43z4~q  & \soc_inst|m0_1|u_logic|Eo5wx4~6_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Eo5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Ec43z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Eo5wx4~6_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~5_combout  & ( 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Eo5wx4~6_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Wor2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Wor2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ec43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wor2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .lut_mask = 64'h00500040A0F0A0E0;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .lut_mask = 64'hA000400000004000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y11_N38
-dffeas \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE (
+// Location: FF_X33_Y12_N19
+dffeas \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~3 (
+// Location: MLABCELL_X34_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X94xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|W893z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// ( \soc_inst|m0_1|u_logic|F8v2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Gip2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|X94xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|F8v2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W893z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gip2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X94xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .lut_mask = 64'h00FF555533330F0F;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X94xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X94xx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|X94xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~4 (
+// Location: LABCELL_X22_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~4_combout  = ( \soc_inst|m0_1|u_logic|F483z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Wyt2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F483z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|Wyt2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|F483z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Ujp2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Wu63z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F483z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Ujp2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Wu63z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Hc1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X94xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Hc1wx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Hc1wx4~3_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wyt2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ujp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wu63z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|F483z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hc1wx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X94xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .lut_mask = 64'h330F330F550055FF;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y11_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~0 (
+// Location: LABCELL_X23_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Eo5wx4~3_combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~4_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Eo5wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~4_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~3_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Eo5wx4~4_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .lut_mask = 64'h5555550000550000;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y11_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nl53z4~q  & (!\soc_inst|m0_1|u_logic|Eo5wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ilp2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Eo5wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ilp2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ilp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nl53z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eo5wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .lut_mask = 64'hF500310000000000;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N27
+// Location: LABCELL_X27_Y17_N36
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[13]~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Wq5wx4~combout  & \soc_inst|m0_1|u_logic|Eo5wx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  = ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wq5wx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
 	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -75218,66 +76089,68 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[13]~11 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .lut_mask = 64'h05050505AFAFAFAF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .lut_mask = 64'h00003333CCCCFFFF;
 defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4g3z4~0 (
+// Location: MLABCELL_X25_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D4g3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) # (\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & 
-// ((\soc_inst|m0_1|u_logic|D4g3z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|D4g3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Gzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( (\soc_inst|m0_1|u_logic|Wuq2z4~q  & !\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( \soc_inst|m0_1|u_logic|Wuq2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Wuq2z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Wuq2z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wuq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .lut_mask = 64'h00FF00FFA0F5A0F5;
-defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .lut_mask = 64'h5D5D5D000F0F0F00;
+defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N20
-dffeas \soc_inst|m0_1|u_logic|D4g3z4 (
+// Location: FF_X25_Y19_N7
+dffeas \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D4g3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D4g3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N51
+// Location: LABCELL_X22_Y21_N21
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Geuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Geuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|D4g3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D4g3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Geuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|D4g3z4~q  & ( ((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|D4g3z4~q  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.datac(gnd),
 	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -75287,151 +76160,100 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Geuwx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .lut_mask = 64'h005500550F5F0F5F;
+defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .lut_mask = 64'h111111FF111111FF;
 defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jjuwx4~2_combout  = ( \soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ((\soc_inst|m0_1|u_logic|F40xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout  & \soc_inst|m0_1|u_logic|F40xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|F40xx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .lut_mask = 64'hA2AA22A2AAAA22AA;
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5pwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|U5pwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wvzwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout  & (\soc_inst|m0_1|u_logic|Adzwx4~0_combout  & !\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .lut_mask = 64'hB2FF0000F3FF0000;
-defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~1 (
+// Location: LABCELL_X22_Y17_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[13]~27 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U5pwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  ) )
+// \soc_inst|interconnect_1|HRDATA[13]~27_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & !\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzqvx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .lut_mask = 64'hF0F0F0F0FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[13]~27 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[13]~27 .lut_mask = 64'hF000F000F0FFF0FF;
+defparam \soc_inst|interconnect_1|HRDATA[13]~27 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y11_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Viuwx4~0 (
+// Location: LABCELL_X22_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Viuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Yizwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|B6pwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Yizwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & \soc_inst|m0_1|u_logic|Yizwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Twmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( \soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( \soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout  & (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|K7g3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T5g3z4~q ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Twmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .lut_mask = 64'h8FEFCFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .lut_mask = 64'hA0AAF0FF8088C0CC;
+defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~4 (
+// Location: LABCELL_X22_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B6pwx4~4_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & !\soc_inst|m0_1|u_logic|J7zwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|B6pwx4~3_combout  ) )
+// \soc_inst|m0_1|u_logic|Twmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yxdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Jtdwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yxdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Jtdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Twmwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Twmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .lut_mask = 64'hF0F0F0F0F000F000;
-defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .lut_mask = 64'h00000000BABABFBF;
+defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N18
+// Location: LABCELL_X23_Y18_N27
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzqvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pazwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Viuwx4~0_combout  & \soc_inst|m0_1|u_logic|B6pwx4~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pazwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & (!\soc_inst|m0_1|u_logic|Viuwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Kzqvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Viuwx4~0_combout  & \soc_inst|m0_1|u_logic|B6pwx4~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Pazwx4~combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & (!\soc_inst|m0_1|u_logic|Viuwx4~0_combout )) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -75441,144 +76263,75 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~2 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .lut_mask = 64'hFA0AFA0A0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .lut_mask = 64'hF0AAF0AA00AA00AA;
 defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kzqvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ))) # (\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .lut_mask = 64'h00E2000000000000;
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y11_N13
-dffeas \soc_inst|m0_1|u_logic|T5g3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T5g3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T5g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T5g3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y8_N15
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[13]~27 (
+// Location: LABCELL_X22_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~1 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[13]~27_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & !\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kzqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[13]~27 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[13]~27 .lut_mask = 64'hF000F000F0FFF0FF;
-defparam \soc_inst|interconnect_1|HRDATA[13]~27 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Twmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( \soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( \soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|m0_1|u_logic|G6owx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|T5g3z4~q ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Twmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzqvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .lut_mask = 64'hCC0CFF0F8808AA0A;
-defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .lut_mask = 64'hFFAAFFAA55005500;
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~1 (
+// Location: LABCELL_X22_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Twmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Twmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jtdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Yxdwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Kzqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzqvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & (!\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kzqvx4~2_combout  & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kzqvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ) # (\soc_inst|m0_1|u_logic|I6pwx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Twmwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Twmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .lut_mask = 64'h00000000F4F7F4F7;
-defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .lut_mask = 64'h5100400000000000;
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y12_N18
+// Location: LABCELL_X22_Y13_N33
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Twmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Geuwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout  & !\soc_inst|m0_1|u_logic|Geuwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Twmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Geuwx4~0_combout  & \soc_inst|m0_1|u_logic|Twmwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Geuwx4~0_combout  & (\soc_inst|m0_1|u_logic|Twmwx4~1_combout  & !\soc_inst|m0_1|u_logic|Wfuwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Twmwx4~1_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Geuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Twmwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Geuwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Twmwx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -75588,859 +76341,866 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~2 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .lut_mask = 64'h00000000FFC0FFF0;
+defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .lut_mask = 64'h3333220033332222;
 defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bspvx4~0 (
+// Location: LABCELL_X23_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcuvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bspvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & \soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & \soc_inst|m0_1|u_logic|V9iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Vcuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Jymwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Jymwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jymwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jymwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bspvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vcuvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .lut_mask = 64'h0AFF0AFF0A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .lut_mask = 64'h0015003F15153F3F;
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bspvx4~1 (
+// Location: LABCELL_X24_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcuvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bspvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Bspvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & (((\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout )))) # 
-// (\soc_inst|m0_1|u_logic|W6iwx4~combout  & (\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ((\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bspvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .lut_mask = 64'h0BBB0BBB00000000;
-defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xowwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Grl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Spl2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Grl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qml2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Psu2z4~q )) 
-// ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Grl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Spl2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Grl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qml2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Psu2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Psu2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Spl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qml2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Grl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vcuvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xowwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .lut_mask = 64'hEE22F3F3EE22C0C0;
-defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .lut_mask = 64'h0B000B000B000B0B;
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4~1 (
+// Location: MLABCELL_X25_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wamvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xowwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Po73z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Gjt2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Gf63z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Eol2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Wamvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Tdp2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q  & (((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|H1rvx4~0_combout 
+// ))) # (\soc_inst|m0_1|u_logic|F0y2z4~q  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eol2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gjt2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gf63z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Po73z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xowwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .lut_mask = 64'hAAAAF0F0CCCCFF00;
-defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .lut_mask = 64'hC0EACFEF00AA0FAF;
+defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4 (
+// Location: FF_X25_Y20_N19
+dffeas \soc_inst|m0_1|u_logic|Tdp2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tdp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tdp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnkvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xowwx4~combout  = ( \soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Xowwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Xowwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Qnkvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Tdp2z4~q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xowwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xowwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xowwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qnkvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xowwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xowwx4 .lut_mask = 64'h0011001144554455;
-defparam \soc_inst|m0_1|u_logic|Xowwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .lut_mask = 64'hAA00AA00AF0FAF0F;
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ok7wx4~0 (
+// Location: LABCELL_X29_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnkvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qowwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xowwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Qnkvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Qnkvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # ((\soc_inst|m0_1|u_logic|Cax2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Cax2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xowwx4~combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qowwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qnkvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .lut_mask = 64'hC8FAC8FA00000000;
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mj7wx4~0 (
+// Location: FF_X29_Y14_N50
+dffeas \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Euzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mj7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & !\soc_inst|m0_1|u_logic|Svxwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Euzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|U593z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qp62z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Svqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|U593z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Svqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U593z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qp62z4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .lut_mask = 64'h5000500000000000;
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .lut_mask = 64'hF0F0AAFFF0F0AACC;
+defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jl7wx4~0 (
+// Location: LABCELL_X31_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jl7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mj7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mj7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Qtzvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .lut_mask = 64'hFFFF0A0000000000;
-defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .lut_mask = 64'h0FF00FF000000000;
+defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et7wx4~0 (
+// Location: LABCELL_X40_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oszvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Et7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Fq7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fq7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+// \soc_inst|m0_1|u_logic|Oszvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qtzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Uvzvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qtzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvzvx4~combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oszvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .lut_mask = 64'h04073437C4C7F4F7;
-defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .lut_mask = 64'hDDDDD0D000000000;
+defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nu7wx4~0 (
+// Location: LABCELL_X24_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oszvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nu7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|U18wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|B28wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|U18wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|B28wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|U18wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|B28wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((\soc_inst|m0_1|u_logic|U18wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|B28wx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Oszvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Luzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oszvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~37_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oszvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .lut_mask = 64'h0123456789ABCDEF;
-defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .lut_mask = 64'h0000000033030000;
+defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mj7wx4~1 (
+// Location: FF_X28_Y12_N23
+dffeas \soc_inst|m0_1|u_logic|R6v2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|R6v2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R6v2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y14_N19
+dffeas \soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mj7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mj7wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Svqwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|R6v2z4~q  & ( \soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|R6v2z4~q  & ( !\soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R6v2z4~q  & ( !\soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|R6v2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Svqwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .lut_mask = 64'h0500040001000000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~2 (
+// Location: LABCELL_X27_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Fij2z4~q ))))) ) )
+// \soc_inst|m0_1|u_logic|Svqwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ixt2z4~q  & ( \soc_inst|m0_1|u_logic|R283z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ixt2z4~q  & ( !\soc_inst|m0_1|u_logic|R283z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ixt2z4~q  & ( !\soc_inst|m0_1|u_logic|R283z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ixt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R283z4~q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Svqwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .lut_mask = 64'hFA00FC000A00FC00;
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .lut_mask = 64'h0050001000400000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~0 (
+// Location: LABCELL_X27_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dtpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Et7wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Et7wx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Svqwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G493z4~q  & ( \soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  
+// & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G493z4~q  & ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G493z4~q  & ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dtpvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|G493z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ipm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Svqwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .lut_mask = 64'h0000FFEE0000FAAA;
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .lut_mask = 64'h0003000200010000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~129 (
+// Location: MLABCELL_X21_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~129_sumout  = SUM(( GND ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add5~78  ))
+// \soc_inst|m0_1|u_logic|Svqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|It63z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ksm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ksm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|It63z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~78 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~129_sumout ),
+	.combout(\soc_inst|m0_1|u_logic|Svqwx4~0_combout ),
+	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~129 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~129 .lut_mask = 64'h0000FFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Add5~129 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .lut_mask = 64'h000000008080C000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~1 (
+// Location: MLABCELL_X28_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dtpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~129_sumout  & ( (!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~129_sumout  & ( ((!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Svqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Svqwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Svqwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Svqwx4~3_combout  & !\soc_inst|m0_1|u_logic|Svqwx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~129_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Svqwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svqwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Svqwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svqwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Svqwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .lut_mask = 64'hA8FFA8FFA800A800;
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zei2z4~0 (
+// Location: LABCELL_X27_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tkdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zei2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( \soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|K0qvx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X4pvx4~combout  & \soc_inst|m0_1|u_logic|K0qvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|K0qvx4~combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Tkdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bywwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Svqwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Bywwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zei2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .lut_mask = 64'hF5F50505F0F00000;
-defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .lut_mask = 64'h00550055FF55FF55;
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zei2z4~1 (
+// Location: LABCELL_X27_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tkdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zei2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Zei2z4~q  & ( \soc_inst|m0_1|u_logic|Zei2z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q  & ( \soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Lqpvx4~0_combout  
-// ) ) ) # ( \soc_inst|m0_1|u_logic|Zei2z4~q  & ( !\soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q  & ( !\soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lqpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Tkdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Godwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Godwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Tkdwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zei2z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .lut_mask = 64'h3010FCDC3333FFFF;
-defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y13_N56
-dffeas \soc_inst|m0_1|u_logic|Zei2z4 (
+// Location: FF_X22_Y19_N47
+dffeas \soc_inst|switches_1|switch_store[0][2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\SW[2]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zei2z4~q ),
+	.q(\soc_inst|switches_1|switch_store[0][2]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zei2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zei2z4 .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[0][2] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qynvx4~0 (
+// Location: LABCELL_X22_Y19_N45
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[2]~14 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qynvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zei2z4~q  & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Zei2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & (((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~q )))) 
-// ) ) )
+// \soc_inst|interconnect_1|HRDATA[2]~14_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout  & 
+// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout )) # (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[0][2]~q ))))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( 
+// (!\soc_inst|interconnect_1|HRDATA[7]~10_combout ) # ((!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout )) # (\soc_inst|interconnect_1|Equal1~0_combout  & 
+// ((\soc_inst|switches_1|switch_store[0][2]~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[0][2]~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qynvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .lut_mask = 64'h0000550300005500;
-defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[2]~14 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[2]~14 .lut_mask = 64'hF4F7F4F704070407;
+defparam \soc_inst|interconnect_1|HRDATA[2]~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qynvx4~1 (
+// Location: FF_X28_Y20_N34
+dffeas \soc_inst|m0_1|u_logic|Mbt2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mbt2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mbt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mbt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yrqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qynvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qynvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Qynvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Yrqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mbt2z4~q  & ((!\soc_inst|m0_1|u_logic|Pxb3z4~q ) # ((!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mbt2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pxb3z4~q ) # (!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mbt2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qynvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qynvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .lut_mask = 64'h0001000133333333;
-defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .lut_mask = 64'hFCA8FCA800000000;
+defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxnvx4~1 (
+// Location: LABCELL_X19_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vxnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vxnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qynvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zznvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ojmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yrqwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Gha3z4~q  & 
+// \soc_inst|m0_1|u_logic|H6tvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Gha3z4~q  & \soc_inst|m0_1|u_logic|H6tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Bec3z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yrqwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zznvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vxnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qynvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gha3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .lut_mask = 64'h0000FAF000000000;
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .lut_mask = 64'h00000000FFFF11F1;
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~134 (
+// Location: LABCELL_X19_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~134_cout  = CARRY(( !\soc_inst|m0_1|u_logic|Pdi2z4~q  ) + ( !\soc_inst|m0_1|u_logic|Vxnvx4~1_combout  ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|Ojmwx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( !\soc_inst|m0_1|u_logic|Ojmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|M2b3z4~q ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( !\soc_inst|m0_1|u_logic|Ojmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M2b3z4~q ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
+	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~1_combout ),
 	.sumout(),
-	.cout(\soc_inst|m0_1|u_logic|Add5~134_cout ),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~134 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~134 .lut_mask = 64'h00000F0F0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add5~134 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .lut_mask = 64'hF5F5F50000000000;
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y13_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~2 (
+// Location: LABCELL_X22_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G5qvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~29_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~29_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~29_sumout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ojmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xmdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ojmwx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xmdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ojmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Tkdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G5qvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .lut_mask = 64'h8088000080888088;
-defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .lut_mask = 64'h00000000F3F0F3FF;
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~1 (
+// Location: LABCELL_X22_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wn1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G5qvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G5qvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nyawx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G5qvx4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nyawx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Wn1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & !\soc_inst|m0_1|u_logic|Imnwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & !\soc_inst|m0_1|u_logic|Imnwx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G5qvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wn1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .lut_mask = 64'h0000440000004500;
-defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y9_N47
-dffeas \soc_inst|m0_1|u_logic|Ejm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ejm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ejm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ejm2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X48_Y9_N17
-dffeas \soc_inst|m0_1|u_logic|Gmm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gmm2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gmm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gmm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gmm2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y9_N52
-dffeas \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .lut_mask = 64'hFCCCFCCCF000F000;
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4~1 (
+// Location: LABCELL_X22_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wn1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rvu2z4~q  & ( \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Ejm2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Gmm2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rvu2z4~q  & ( \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Ejm2z4~q ) # 
-// ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Gmm2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rvu2z4~q  & ( !\soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Ejm2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((!\soc_inst|m0_1|u_logic|Gmm2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rvu2z4~q  & ( !\soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Ejm2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Gmm2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Wn1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Wn1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ejm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gmm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rvu2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wn1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .lut_mask = 64'hBF8FB383BC8CB080;
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .lut_mask = 64'h5055F0FF00000000;
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N41
-dffeas \soc_inst|m0_1|u_logic|Imt2z4 (
+// Location: FF_X18_Y14_N20
+dffeas \soc_inst|m0_1|u_logic|Ufx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Imt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ufx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Imt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ufx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ufx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4~0 (
+// Location: LABCELL_X18_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lkhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rr73z4~q  & ( (!\soc_inst|m0_1|u_logic|Ii63z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  
-// & ( \soc_inst|m0_1|u_logic|Rr73z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Skm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Imt2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Rr73z4~q  & ( (!\soc_inst|m0_1|u_logic|Ii63z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rr73z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Skm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Imt2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~105_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ufx2z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~41_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ufx2z4~q )))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ii63z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Skm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Imt2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rr73z4~q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~41_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lkhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .lut_mask = 64'hCCF0AAFFCCF0AA00;
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .lut_mask = 64'hC000C800F300FB00;
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4 (
+// Location: LABCELL_X18_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lkhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8ywx4~combout  = ( \soc_inst|m0_1|u_logic|Q8ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Q8ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Q8ywx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Lkhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lkhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8ywx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8ywx4 .lut_mask = 64'h000300030C0F0C0F;
-defparam \soc_inst|m0_1|u_logic|Q8ywx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .lut_mask = 64'h00000000F0F0FAFB;
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4ywx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q8ywx4~combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Q8ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Q8ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Q8ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X18_Y14_N19
+dffeas \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .lut_mask = 64'h0A000A000A00FF00;
-defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mzxwx4~0 (
+// Location: LABCELL_X30_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jxovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Jxovx4~combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~105_sumout  & ( (((\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Add3~37_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~105_sumout  & ( ((\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~105_sumout  & ( ((\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Add3~37_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~105_sumout  & ( (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add3~37_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jxovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jxovx4 .lut_mask = 64'h000F555F333F777F;
+defparam \soc_inst|m0_1|u_logic|Jxovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oldwx4~0 (
+// Location: LABCELL_X30_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qknvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oldwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  $ 
-// (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Qknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ekovx4~combout  $ (!\soc_inst|m0_1|u_logic|Jxovx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ekovx4~combout  $ (!\soc_inst|m0_1|u_logic|Jxovx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .lut_mask = 64'hF00FF00FF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .lut_mask = 64'h5555DDDD0550CDDC;
+defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y11_N2
-dffeas \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE (
+// Location: FF_X30_Y15_N37
+dffeas \soc_inst|m0_1|u_logic|Ffs2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -76449,264 +77209,330 @@ dffeas \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ffs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ffs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y12_N5
-dffeas \soc_inst|m0_1|u_logic|Mbt2z4 (
+// Location: LABCELL_X24_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2owx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T2owx4~1_combout  = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T2owx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T2owx4~1 .lut_mask = 64'h0000000000200020;
+defparam \soc_inst|m0_1|u_logic|T2owx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y16_N50
+dffeas \soc_inst|ram_1|byte_select[3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.d(\soc_inst|ram_1|byte3~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mbt2z4~q ),
+	.q(\soc_inst|ram_1|byte_select [3]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mbt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mbt2z4 .power_up = "low";
+defparam \soc_inst|ram_1|byte_select[3] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yrqwx4~0 (
+// Location: LABCELL_X29_Y16_N57
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[27]~19 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yrqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pxb3z4~q  & ((!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Mbt2z4~q )))) # (\soc_inst|m0_1|u_logic|Pxb3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Mbt2z4~q )))) ) )
+// \soc_inst|ram_1|data_to_memory[27]~19_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( \soc_inst|m0_1|u_logic|Knvvx4~0_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( \soc_inst|m0_1|u_logic|Knvvx4~0_combout  & ( (\soc_inst|ram_1|byte_select [3] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  
+// & ( !\soc_inst|m0_1|u_logic|Knvvx4~0_combout  & ( (!\soc_inst|ram_1|byte_select [3] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mbt2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select [3]),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+	.dataf(!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[27]~19_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .lut_mask = 64'hFCA8FCA800000000;
-defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[27]~19 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[27]~19 .lut_mask = 64'h00000A0A05050F0F;
+defparam \soc_inst|ram_1|data_to_memory[27]~19 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ojmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gha3z4~q  & 
-// \soc_inst|m0_1|u_logic|H6tvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Bec3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Gha3z4~q  & \soc_inst|m0_1|u_logic|H6tvx4~0_combout )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Gha3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: M10K_X26_Y18_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[27]~19_combout ,\soc_inst|ram_1|data_to_memory[3]~20_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .lut_mask = 64'h00000000FF0AFF3B;
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_bit_number = 3;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_bit_number = 3;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031C34C0760580BC0621191721DC731D91E11E11A11A11E11E11A1021555555555555559860140500505000000050001410";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~1 (
+// Location: MLABCELL_X28_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mjlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojmwx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( !\soc_inst|m0_1|u_logic|Ojmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( !\soc_inst|m0_1|u_logic|Ojmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Mjlwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # ((\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[29]~0_combout )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & (((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # 
+// (\soc_inst|interconnect_1|HRDATA[29]~0_combout )) # (\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mjlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .lut_mask = 64'hDDDDD0D000000000;
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .lut_mask = 64'hA2AAA2AAA2A0A2A0;
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~2 (
+// Location: LABCELL_X23_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mjlwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ojmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Iutwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mjlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kvtwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Iutwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kvtwx4~combout ) # (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mjlwx4~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .lut_mask = 64'h00000000CDEFCDEF;
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .lut_mask = 64'h5550555044404440;
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wn1wx4~0 (
+// Location: LABCELL_X23_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wn1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Imnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Sknwx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Imnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Imnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ll1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & !\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pmnwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & !\soc_inst|m0_1|u_logic|Sknwx4~2_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wn1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ll1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .lut_mask = 64'hFFF0F0F0FF000000;
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .lut_mask = 64'hFFA0FFA0A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wn1wx4~1 (
+// Location: LABCELL_X22_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wn1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wn1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ll1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rilwx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rilwx4~2_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wn1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .lut_mask = 64'h33030000FF0F0000;
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .lut_mask = 64'h51F351F300000000;
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~41 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ufx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~46  ))
-// \soc_inst|m0_1|u_logic|Add2~42  = CARRY(( !\soc_inst|m0_1|u_logic|Ufx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~46  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~46 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~41_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~42 ),
-	.shareout());
+// Location: FF_X18_Y14_N35
+dffeas \soc_inst|m0_1|u_logic|Gmd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~41 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~41 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~41 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gmd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gmd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lkhvx4~1 (
+// Location: LABCELL_X18_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uehvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~105_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~41_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q )))))) ) )
+// \soc_inst|m0_1|u_logic|Uehvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~45_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gmd3z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~85_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Gmd3z4~q )))))) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~41_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~85_sumout ),
 	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
 	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
-	.datag(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lkhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uehvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .lut_mask = 64'hC000C800F300FB00;
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .lut_mask = 64'hC000C800F300FB00;
+defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lkhvx4~0 (
+// Location: LABCELL_X18_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uehvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lkhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Uehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uehvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uehvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lkhvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uehvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .lut_mask = 64'h00000000AAAAFAFB;
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .lut_mask = 64'h00000000AAAAFFAB;
+defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y12_N52
-dffeas \soc_inst|m0_1|u_logic|Ufx2z4 (
+// Location: FF_X18_Y14_N34
+dffeas \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -76715,1706 +77541,1659 @@ dffeas \soc_inst|m0_1|u_logic|Ufx2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ufx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ufx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ufx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~85 (
+// Location: LABCELL_X33_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gmd3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~42  ))
-// \soc_inst|m0_1|u_logic|Add2~86  = CARRY(( !\soc_inst|m0_1|u_logic|Gmd3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~42  ))
+// \soc_inst|m0_1|u_logic|Wzivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( \soc_inst|m0_1|u_logic|Owovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wce3z4~q  & ( \soc_inst|m0_1|u_logic|Owovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( !\soc_inst|m0_1|u_logic|Owovx4~combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wce3z4~q  & ( !\soc_inst|m0_1|u_logic|Owovx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~42 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~85_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~86 ),
+	.combout(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~85 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~85 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~85 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .lut_mask = 64'h00F3FFF300A2AAA2;
+defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uehvx4~1 (
+// Location: FF_X33_Y14_N56
+dffeas \soc_inst|m0_1|u_logic|Wce3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wce3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wce3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wce3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X33_Y12_N7
+dffeas \soc_inst|m0_1|u_logic|Ibe3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ibe3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ibe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ibe3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uehvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~45_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Gmd3z4~q ))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Add2~85_sumout ) # (!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Gmd3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Cc9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Exd3z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Tyd3z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Exd3z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Tyd3z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~85_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tyd3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Exd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .lut_mask = 64'h080A080000000000;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cc9wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Q6e3z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|F8e3z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|F8e3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6e3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uehvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .lut_mask = 64'hB1B1BBB100000000;
-defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .lut_mask = 64'h4040500000000000;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uehvx4~0 (
+// Location: LABCELL_X23_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uehvx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|H4nwx4~combout )) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uehvx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uehvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|H4nwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uehvx4~1_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ge9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|U9e3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uehvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U9e3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ge9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .lut_mask = 64'h0F000F0C0F000F0D;
-defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y9_N1
-dffeas \soc_inst|m0_1|u_logic|Gmd3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gmd3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gmd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gmd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y13_N47
-dffeas \soc_inst|m0_1|u_logic|Fhx2z4 (
+// Location: FF_X23_Y10_N53
+dffeas \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fhx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fhx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fhx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekhvx4~0 (
+// Location: LABCELL_X23_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ekhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~81_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Fhx2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Cc9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Aud3z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~81_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fhx2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aud3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ekhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .lut_mask = 64'hC8FBC8FB00000000;
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .lut_mask = 64'h00000000008800C0;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uf1wx4~0 (
+// Location: LABCELL_X33_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uf1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Cc9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ge9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cc9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cc9wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Cc9wx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ibe3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ibe3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cc9wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cc9wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ge9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cc9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uf1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .lut_mask = 64'h1050115530F033FF;
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .lut_mask = 64'hC040000000000000;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uf1wx4~1 (
+// Location: LABCELL_X33_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qk1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uf1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & (\soc_inst|m0_1|u_logic|Uf1wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Uf1wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Uf1wx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( \soc_inst|m0_1|u_logic|Cc9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Rkd3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Wce3z4~q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( \soc_inst|m0_1|u_logic|Cc9wx4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Rkd3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wce3z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( !\soc_inst|m0_1|u_logic|Cc9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Rkd3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wce3z4~q 
+// ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( !\soc_inst|m0_1|u_logic|Cc9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Rkd3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wce3z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uf1wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .lut_mask = 64'h000A00AA000B00BB;
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .lut_mask = 64'hFB0BFB0BFB0BF808;
+defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekhvx4~1 (
+// Location: LABCELL_X30_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Owovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ekhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ekhvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( !\soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & !\soc_inst|m0_1|u_logic|Xdfwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( !\soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Owovx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~81_sumout  & ( \soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (((\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~81_sumout  & ( \soc_inst|m0_1|u_logic|Add5~45_sumout  & ( ((\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~81_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( ((\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~81_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ekhvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~81_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Owovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .lut_mask = 64'h5050500055555500;
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y13_N46
-dffeas \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Owovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Owovx4 .lut_mask = 64'h00550F5F33773F7F;
+defparam \soc_inst|m0_1|u_logic|Owovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L4jvx4~0 (
+// Location: LABCELL_X30_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L4jvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dkr2z4~q  & ( \soc_inst|m0_1|u_logic|Cqovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( \soc_inst|m0_1|u_logic|Cqovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dkr2z4~q  & ( !\soc_inst|m0_1|u_logic|Cqovx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( !\soc_inst|m0_1|u_logic|Cqovx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Owovx4~combout  & ((!\soc_inst|m0_1|u_logic|Fvovx4~combout  & ((!\soc_inst|m0_1|u_logic|Yuovx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & !\soc_inst|m0_1|u_logic|Z6ovx4~combout )))) # (\soc_inst|m0_1|u_logic|Fvovx4~combout  & (((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & !\soc_inst|m0_1|u_logic|Z6ovx4~combout )))))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|Owovx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) # (\soc_inst|m0_1|u_logic|Owovx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|S4qvx4~combout  & \soc_inst|m0_1|u_logic|Z6ovx4~combout ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .lut_mask = 64'h2323EFEF2300EF00;
-defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y4_N43
-dffeas \soc_inst|m0_1|u_logic|Dkr2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dkr2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dkr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dkr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .lut_mask = 64'hCC80CC0080803000;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~7 (
+// Location: LABCELL_X30_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( \soc_inst|m0_1|u_logic|T263z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dkr2z4~q  & ( !\soc_inst|m0_1|u_logic|T263z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( !\soc_inst|m0_1|u_logic|T263z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Nlovx4~8_combout  & (!\soc_inst|m0_1|u_logic|Bv0wx4~combout  & \soc_inst|m0_1|u_logic|Vezvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T263z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nlovx4~8_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vezvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .lut_mask = 64'h8004000480000000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~8 (
+// Location: LABCELL_X29_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Cc73z4~q  & (!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~5_combout  = ( \soc_inst|m0_1|u_logic|S4qvx4~combout  & ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Xxovx4~combout  & (!\soc_inst|m0_1|u_logic|Ekovx4~combout  & !\soc_inst|m0_1|u_logic|Z6ovx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4qvx4~combout  & ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Xxovx4~combout ) # ((!\soc_inst|m0_1|u_logic|Ekovx4~combout  & !\soc_inst|m0_1|u_logic|Z6ovx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|S4qvx4~combout  & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) # (\soc_inst|m0_1|u_logic|Xxovx4~combout  & (!\soc_inst|m0_1|u_logic|Ekovx4~combout  & !\soc_inst|m0_1|u_logic|Z6ovx4~combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S4qvx4~combout  & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ekovx4~combout  & ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Yuovx4~combout ))) # (\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ))))) # (\soc_inst|m0_1|u_logic|Ekovx4~combout  & (((!\soc_inst|m0_1|u_logic|Xxovx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cc73z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .lut_mask = 64'hBB000B0000000000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .lut_mask = 64'h7CF00CF0FCF00CF0;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejawx4~1 (
+// Location: LABCELL_X29_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ejawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ejawx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~5_combout  & ( 
-// \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ejawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ejawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ejawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fvovx4~combout  & ( \soc_inst|m0_1|u_logic|Owovx4~combout  & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Owovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Yuovx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # ((!\soc_inst|m0_1|u_logic|Ekovx4~combout )))) # (\soc_inst|m0_1|u_logic|Yuovx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # (!\soc_inst|m0_1|u_logic|Ekovx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fvovx4~combout  & ( !\soc_inst|m0_1|u_logic|Owovx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Rxzvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout  & ( !\soc_inst|m0_1|u_logic|Owovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ekovx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ejawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .lut_mask = 64'h002F002F002F00FF;
-defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .lut_mask = 64'hF0C0F0F0FAC8F0F0;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nf1wx4~1 (
+// Location: LABCELL_X30_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nf1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~1_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( (!\soc_inst|m0_1|u_logic|hsize_o~0_combout  & (!\soc_inst|m0_1|u_logic|Hszvx4~combout  & !\soc_inst|m0_1|u_logic|Vpovx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nf1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .lut_mask = 64'hFAF5E4D8FAF50000;
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .lut_mask = 64'h00000000A000A000;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qd1wx4~0 (
+// Location: LABCELL_X30_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qd1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nf1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ze1wx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nlovx4~1_combout  & (!\soc_inst|m0_1|u_logic|Ql0wx4~combout  & !\soc_inst|m0_1|u_logic|Fq0wx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nlovx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nf1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qd1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .lut_mask = 64'h00000000A0AAA0AA;
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .lut_mask = 64'h5000500000000000;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qd1wx4~1 (
+// Location: LABCELL_X30_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qd1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qd1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~13_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~4_combout  = ( \soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nlovx4~3_combout  & (\soc_inst|m0_1|u_logic|haddr_o~5_combout  & \soc_inst|m0_1|u_logic|Nlovx4~2_combout )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qd1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nlovx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y92wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .lut_mask = 64'h000000000C0F0C0F;
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y6_N25
-dffeas \soc_inst|m0_1|u_logic|Oir2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Oir2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oir2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Oir2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dy4xx4~0 (
+// Location: LABCELL_X31_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dy4xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Oir2z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~6_combout  = ( \soc_inst|m0_1|u_logic|Y1pvx4~combout  & ( \soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (\soc_inst|m0_1|u_logic|haddr_o~4_combout  & (\soc_inst|m0_1|u_logic|C70wx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Cqovx4~combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oir2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|C70wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dy4xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .lut_mask = 64'h0000800000000000;
-defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .lut_mask = 64'h0000000000000500;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y8_N19
-dffeas \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlovx4~7_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Nlovx4~0_combout  & (\soc_inst|m0_1|u_logic|Nlovx4~5_combout  & (\soc_inst|m0_1|u_logic|Nlovx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Rnovx4~combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Nlovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nlovx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nlovx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~6_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~4 (
+// Location: LABCELL_X30_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xknvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~4_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Kfr2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Xknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( (((!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Nlovx4~7_combout )) # 
+// (\soc_inst|m0_1|u_logic|Rxzvx4~combout )) # (\soc_inst|m0_1|u_logic|Ekovx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rxzvx4~combout )) # (\soc_inst|m0_1|u_logic|Ekovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( !\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kfr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .lut_mask = 64'h0000A0C000000000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .lut_mask = 64'h0000F0F0FF77FFF7;
+defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y12_N37
-dffeas \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE (
+// Location: FF_X30_Y15_N13
+dffeas \soc_inst|m0_1|u_logic|Kop2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Kop2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kop2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kop2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~3 (
+// Location: LABCELL_X24_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N1uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Gcr2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Gcr2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|N1uvx4~combout  = ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Kop2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (\soc_inst|m0_1|u_logic|Ffs2z4~q  & \soc_inst|m0_1|u_logic|Lz93z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gcr2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N1uvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .lut_mask = 64'h0000030100000200;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N1uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N1uvx4 .lut_mask = 64'h0002000200000000;
+defparam \soc_inst|m0_1|u_logic|N1uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~1 (
+// Location: LABCELL_X24_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Lpv2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Vdr2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Z0uvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|N1uvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vdr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lpv2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .lut_mask = 64'h0000440000005000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z0uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z0uvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Z0uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N50
-dffeas \soc_inst|m0_1|u_logic|M413z4 (
+// Location: FF_X24_Y20_N1
+dffeas \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M413z4~q ),
+	.q(\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M413z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M413z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~2 (
+// Location: FF_X28_Y16_N56
+dffeas \soc_inst|m0_1|u_logic|Ara3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ara3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ara3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ara3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|S703z4~q  & ( (!\soc_inst|m0_1|u_logic|M413z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|S703z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|M413z4~q ) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Wjxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jsc3z4~q ) # (\soc_inst|m0_1|u_logic|Lul2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jsc3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Lul2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M413z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S703z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .lut_mask = 64'h0B00000008000000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .lut_mask = 64'h000055550F0F5F5F;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N46
-dffeas \soc_inst|m0_1|u_logic|Ll83z4 (
+// Location: FF_X27_Y18_N1
+dffeas \soc_inst|m0_1|u_logic|Tqs2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ll83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tqs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ll83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tqs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tqs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~0 (
+// Location: FF_X23_Y19_N28
+dffeas \soc_inst|m0_1|u_logic|Vgs2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vgs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgs2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bk33z4~q  & ( \soc_inst|m0_1|u_logic|Ll83z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bk33z4~q  & ( !\soc_inst|m0_1|u_logic|Ll83z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bk33z4~q  & ( !\soc_inst|m0_1|u_logic|Ll83z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Wjxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vgs2z4~q  & ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|J6i2z4~q )) # (\soc_inst|m0_1|u_logic|Qwowx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vgs2z4~q  & ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vgs2z4~q  & ( !\soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Qwowx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bk33z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ll83z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .lut_mask = 64'h1010001010000000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .lut_mask = 64'h0000555530307575;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~5 (
+// Location: MLABCELL_X28_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Ze1wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dy4xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ze1wx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ze1wx4~3_combout  & !\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wjxwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wjxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wjxwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Tqs2z4~q ) # (!\soc_inst|m0_1|u_logic|E0uvx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dy4xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ze1wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wjxwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .lut_mask = 64'hAAA0AAA000000000;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4 (
+// Location: MLABCELL_X28_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~combout  = ( \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|Wjxwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wjxwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ara3z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & (\soc_inst|m0_1|u_logic|D4a3z4~q  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ara3z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D4a3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ara3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .lut_mask = 64'h00000000BB0BBB0B;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[12]~19 (
+// Location: MLABCELL_X25_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  = ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & \soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Wjxwx4~4_combout  = ( \soc_inst|m0_1|u_logic|K7pwx4~combout  & ( \soc_inst|m0_1|u_logic|Wjxwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|N1uvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7pwx4~combout  & ( \soc_inst|m0_1|u_logic|Wjxwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .lut_mask = 64'h05050505F5F5F5F5;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y9_N19
-dffeas \soc_inst|m0_1|u_logic|L7a3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L7a3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L7a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .lut_mask = 64'h00000000FFAAF0A0;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~37 (
+// Location: MLABCELL_X25_Y17_N54
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[15]~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Iua3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~50  ))
-// \soc_inst|m0_1|u_logic|Add0~38  = CARRY(( !\soc_inst|m0_1|u_logic|Iua3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~50  ))
+// \soc_inst|ram_1|data_to_memory[15]~2_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout 
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & !\soc_inst|ram_1|byte_select [1])) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
+	.datad(!\soc_inst|ram_1|byte_select [1]),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~50 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~37_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~38 ),
+	.combout(\soc_inst|ram_1|data_to_memory[15]~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~37 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~37 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~37 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[15]~2 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[15]~2 .lut_mask = 64'h0300030003330333;
+defparam \soc_inst|ram_1|data_to_memory[15]~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypmvx4~0 (
+// Location: LABCELL_X29_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ypmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Iua3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # (\soc_inst|m0_1|u_logic|L7a3z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Iua3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|L7a3z4~q  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Iua3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~37_sumout ) # (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iua3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~37_sumout  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~0_combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  
+// & ((!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L7a3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add0~37_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ypmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .lut_mask = 64'h33F3FFF33377FF77;
-defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .lut_mask = 64'h003200FE000200CE;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y11_N20
-dffeas \soc_inst|m0_1|u_logic|Iua3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ypmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+// Location: M10K_X26_Y17_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[31]~1_combout ,\soc_inst|ram_1|data_to_memory[15]~2_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Iua3z4~q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iua3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Iua3z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_bit_number = 15;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_bit_number = 15;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B6DB6D0401461C3084C000000000000048C48C48C48C48C48C48C24D55555555555541E4BB000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~61 (
+// Location: MLABCELL_X25_Y17_N24
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[31]~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|K7g3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~38  ))
-// \soc_inst|m0_1|u_logic|Add0~62  = CARRY(( !\soc_inst|m0_1|u_logic|K7g3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~38  ))
+// \soc_inst|ram_1|data_to_memory[31]~1_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|hwdata_o~0_combout ))) ) 
+// ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|m0_1|u_logic|hwdata_o~0_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~38 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~61_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~62 ),
+	.combout(\soc_inst|ram_1|data_to_memory[31]~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~61 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~61 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~61 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[31]~1 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[31]~1 .lut_mask = 64'h0003000330333033;
+defparam \soc_inst|ram_1|data_to_memory[31]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rpmvx4~0 (
+// Location: MLABCELL_X25_Y17_N9
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[15]~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K7g3z4~q  & ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( (!\soc_inst|m0_1|u_logic|Add0~61_sumout ) # (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7g3z4~q  & ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~61_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|K7g3z4~q  & ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~61_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7g3z4~q  & ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~61_sumout  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|Tna3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|interconnect_1|HRDATA[15]~4_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add0~61_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T5g3z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .lut_mask = 64'h08FFF8FF0BFFFBFF;
-defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y11_N55
-dffeas \soc_inst|m0_1|u_logic|K7g3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K7g3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K7g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K7g3z4 .power_up = "low";
+defparam \soc_inst|interconnect_1|HRDATA[15]~4 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[15]~4 .lut_mask = 64'hA0A0F5F5A0A0F5F5;
+defparam \soc_inst|interconnect_1|HRDATA[15]~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~81 (
+// Location: LABCELL_X24_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9lwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rsa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~62  ))
-// \soc_inst|m0_1|u_logic|Add0~82  = CARRY(( !\soc_inst|m0_1|u_logic|Rsa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~62  ))
+// \soc_inst|m0_1|u_logic|U9lwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[15]~4_combout  & ( ((\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[15]~4_combout  & ( (\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~62 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~81_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~82 ),
+	.combout(\soc_inst|m0_1|u_logic|U9lwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~81 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~81 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~81 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .lut_mask = 64'h0F000F003F333F33;
+defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kpmvx4~0 (
+// Location: LABCELL_X24_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9lwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|U5a3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~81_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|U5a3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~81_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( !\soc_inst|m0_1|u_logic|U5a3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~81_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rsa3z4~q  & ( !\soc_inst|m0_1|u_logic|U5a3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~81_sumout  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|Tna3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|U9lwx4~1_combout  = ( \soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ) # (\soc_inst|m0_1|u_logic|Wfuwx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|U9lwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout )) # (\soc_inst|m0_1|u_logic|U9lwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add0~81_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U5a3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U9lwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .lut_mask = 64'h55D5FFD555DFFFDF;
-defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y12_N1
-dffeas \soc_inst|m0_1|u_logic|Rsa3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rsa3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rsa3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rsa3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .lut_mask = 64'h0FAF0FAF0FBF0FBF;
+defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4a3z4~0 (
+// Location: MLABCELL_X25_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D4a3z4~0_combout  = !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout 
+// \soc_inst|m0_1|u_logic|Oa3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Walwx4~1_combout  & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Walwx4~1_combout  & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout )) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .lut_mask = 64'hFF00FF00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .lut_mask = 64'hF333F333F000F000;
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y12_N28
-dffeas \soc_inst|m0_1|u_logic|D4a3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D4a3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oa3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oa3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oa3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oa3wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D4a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .lut_mask = 64'hAFAFAF0000000000;
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dpmvx4~0 (
+// Location: LABCELL_X27_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fa2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ara3z4~q  & ( \soc_inst|m0_1|u_logic|D4a3z4~q  & ( (!\soc_inst|m0_1|u_logic|Add0~1_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ara3z4~q  & ( \soc_inst|m0_1|u_logic|D4a3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~1_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ara3z4~q  & ( !\soc_inst|m0_1|u_logic|D4a3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~1_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ara3z4~q  & ( !\soc_inst|m0_1|u_logic|D4a3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~1_sumout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Fa2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oa3wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Va3wx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add0~1_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|D4a3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .lut_mask = 64'h2F0FEFCF2F3FEFFF;
-defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .lut_mask = 64'h0000000000005F7F;
+defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y12_N43
-dffeas \soc_inst|m0_1|u_logic|Ara3z4 (
+// Location: FF_X29_Y9_N20
+dffeas \soc_inst|m0_1|u_logic|Wbf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ara3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wbf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ara3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ara3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wbf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wbf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~1 (
+// Location: LABCELL_X29_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jsc3z4~q  & ( ((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Lul2z4~q )) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsc3z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Lul2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Icxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Orj2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wbf3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wbf3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Icxwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .lut_mask = 64'h0055005533773377;
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .lut_mask = 64'h0000000000000C0A;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~0 (
+// Location: MLABCELL_X28_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vgs2z4~q  & ( ((!\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & \soc_inst|m0_1|u_logic|B2uvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Qwowx4~combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Vgs2z4~q  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & \soc_inst|m0_1|u_logic|B2uvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Icxwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aff3z4~q  & ( \soc_inst|m0_1|u_logic|Fpi2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aff3z4~q  & ( !\soc_inst|m0_1|u_logic|Fpi2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aff3z4~q  & ( !\soc_inst|m0_1|u_logic|Fpi2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aff3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fpi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Icxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .lut_mask = 64'h0202020202FF02FF;
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .lut_mask = 64'h4040400000400000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~2 (
+// Location: LABCELL_X29_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjxwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wjxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wjxwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|E0uvx4~combout ) # (!\soc_inst|m0_1|u_logic|Tqs2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Icxwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Mof3z4~q  & ( \soc_inst|m0_1|u_logic|Xmf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mof3z4~q  & ( !\soc_inst|m0_1|u_logic|Xmf3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mof3z4~q  & ( !\soc_inst|m0_1|u_logic|Xmf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wjxwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mof3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xmf3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Icxwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .lut_mask = 64'hFC00FC0000000000;
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .lut_mask = 64'h000C000400080000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~3 (
+// Location: FF_X34_Y8_N19
+dffeas \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ldf3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjxwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wjxwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ara3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & (\soc_inst|m0_1|u_logic|D4a3z4~q  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ara3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Icxwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Bqf3z4~q  & ( \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bqf3z4~q  & ( !\soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bqf3z4~q  & ( !\soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|D4a3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bqf3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Icxwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .lut_mask = 64'h000000008ACF8ACF;
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .lut_mask = 64'h0202000202000000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~4 (
+// Location: LABCELL_X29_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjxwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Usl2z4~q  & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout  & (\soc_inst|m0_1|u_logic|Wjxwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Usl2z4~q  & ( (\soc_inst|m0_1|u_logic|Wjxwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # (!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Icxwx4~combout  = ( !\soc_inst|m0_1|u_logic|Icxwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Icxwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Icxwx4~0_combout  & !\soc_inst|m0_1|u_logic|Icxwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wjxwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Icxwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Icxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Icxwx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icxwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Icxwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .lut_mask = 64'h00FC00FC00A800A8;
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~0_combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  
-// & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+// Location: LABCELL_X24_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mrdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( (\soc_inst|m0_1|u_logic|Icxwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Icxwx4~combout ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .lut_mask = 64'h003200FE001000DC;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N39
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[31]~1 (
+// Location: LABCELL_X23_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrdwx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[31]~1_combout  = ( \soc_inst|ram_1|byte_select [3] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|m0_1|u_logic|hwdata_o~0_combout ) ) ) # ( !\soc_inst|ram_1|byte_select [3] & ( 
-// (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ) ) )
+// \soc_inst|m0_1|u_logic|Mrdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|byte_select [3]),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[31]~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[31]~1 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[31]~1 .lut_mask = 64'h0505050500550055;
-defparam \soc_inst|ram_1|data_to_memory[31]~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X26_Y7_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 (
-	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[31]~1_combout ,\soc_inst|ram_1|data_to_memory[15]~2_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_bit_number = 15;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_bit_number = 15;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B6DB6D0401461C3084C000000000000048C48C48C48C48C48C48C24D55555555555541E4BB000000000000000000000000";
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N36
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[15]~4 (
+// Location: LABCELL_X19_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbtwx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[15]~4_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & !\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|Mbtwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
+// (\soc_inst|switches_1|switch_store[1][1]~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( (\soc_inst|interconnect_1|Equal1~0_combout  & 
+// (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & \soc_inst|switches_1|switch_store[1][1]~q )) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[1][1]~q ),
+	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mbtwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[15]~4 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[15]~4 .lut_mask = 64'hF000F000F0FFF0FF;
-defparam \soc_inst|interconnect_1|HRDATA[15]~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .lut_mask = 64'h0000000500000A0F;
+defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9lwx4~0 (
+// Location: LABCELL_X18_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bgfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9lwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( \soc_inst|interconnect_1|HRDATA[15]~4_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( (\soc_inst|interconnect_1|HRDATA[15]~4_combout ) # (\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Lcowx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Bgfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mbtwx4~0_combout  & ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( (\soc_inst|m0_1|u_logic|S3i3z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|B2i3z4~q ))) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Mbtwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|B2i3z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B2i3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Mbtwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9lwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bgfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .lut_mask = 64'h0F0F0FFF000000FF;
-defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .lut_mask = 64'hAFAF000023230000;
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9lwx4~1 (
+// Location: LABCELL_X22_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bgfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9lwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U9lwx4~0_combout  & ( \soc_inst|m0_1|u_logic|N4rvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~0_combout  & ( \soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ) # (\soc_inst|m0_1|u_logic|Wfuwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N4rvx4~0_combout  ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bgfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Mrdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jtdwx4~1_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U9lwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bgfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .lut_mask = 64'h00F0FFFF00F3FFFF;
-defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .lut_mask = 64'h00000000CEDFCEDF;
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtwwx4~0 (
+// Location: LABCELL_X22_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|C3w2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # (((\soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Walwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|C3w2z4~q  & ( (((!\soc_inst|m0_1|u_logic|Wxp2z4~q  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Vq1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & !\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pmnwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & !\soc_inst|m0_1|u_logic|Khfwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .lut_mask = 64'hDFFFFDFFDFFF75FF;
-defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .lut_mask = 64'hFFC0FFC0C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~2 (
+// Location: LABCELL_X22_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zz1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|P12wx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Add5~41_sumout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|P12wx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Vq1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vq1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|Pgfwx4~1_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|Pgfwx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .lut_mask = 64'h8A008A008A8A8A8A;
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .lut_mask = 64'h0BBB0BBB00000000;
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~1 (
+// Location: LABCELL_X22_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zz1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vq1wx4~combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .lut_mask = 64'hFFAAE040FF55D080;
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4 .lut_mask = 64'h00000000F0F3F0F3;
+defparam \soc_inst|m0_1|u_logic|Vq1wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K22wx4~1 (
+// Location: MLABCELL_X21_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K22wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bfhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & \soc_inst|m0_1|u_logic|Bfhvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Bfhvx4~0_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~113_sumout  & ( \soc_inst|m0_1|u_logic|Bfhvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~113_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Bfhvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bfhvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K22wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K22wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K22wx4~1 .lut_mask = 64'h1133010355FF050F;
-defparam \soc_inst|m0_1|u_logic|K22wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .lut_mask = 64'h0C0C0F0F08080A0A;
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K22wx4~0 (
+// Location: FF_X21_Y14_N46
+dffeas \soc_inst|m0_1|u_logic|V4d3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V4d3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V4d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V4d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K22wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|K22wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( \soc_inst|m0_1|u_logic|K22wx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & (\soc_inst|m0_1|u_logic|K22wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & \soc_inst|m0_1|u_logic|K22wx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Dmivx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G6d3z4~q ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & !\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & !\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K22wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dmivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K22wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K22wx4~0 .lut_mask = 64'h030303020F0F0F0A;
-defparam \soc_inst|m0_1|u_logic|K22wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .lut_mask = 64'hF000F000FAAAFAAA;
+defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~0 (
+// Location: LABCELL_X29_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmivx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zz1wx4~2_combout  & (\soc_inst|m0_1|u_logic|Zz1wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Zz1wx4~2_combout  & \soc_inst|m0_1|u_logic|Zz1wx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Dmivx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Dmivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V4d3z4~q  & (!\soc_inst|m0_1|u_logic|W0pvx4~combout  & ((!\soc_inst|m0_1|u_logic|Xxovx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|V4d3z4~q  & (((!\soc_inst|m0_1|u_logic|Xxovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zz1wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zz1wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dmivx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .lut_mask = 64'h00000000000A000B;
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .lut_mask = 64'hDDD0DDD000000000;
+defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y6_N25
-dffeas \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE (
+// Location: FF_X29_Y13_N44
+dffeas \soc_inst|m0_1|u_logic|G1s2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|G1s2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G1s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G1s2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y9_N47
-dffeas \soc_inst|m0_1|u_logic|E913z4~DUPLICATE (
+// Location: FF_X27_Y11_N56
+dffeas \soc_inst|m0_1|u_logic|Rpe3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Rpe3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E913z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E913z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~7 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~7_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~7_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~7 .lut_mask = 64'hF3F3F0F000F0F0F0;
-defparam \soc_inst|m0_1|u_logic|P12wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rpe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rpe3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X45_Y8_N1
-dffeas \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE (
+// Location: FF_X24_Y11_N35
+dffeas \soc_inst|m0_1|u_logic|Fre3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Fre3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fre3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fre3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~4 (
+// Location: LABCELL_X24_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cvr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cvr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Oubwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Fre3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rpe3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Fre3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rpe3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Fre3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cvr2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rpe3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fre3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oubwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~4 .lut_mask = 64'hFAFA00000A0A0000;
-defparam \soc_inst|m0_1|u_logic|P12wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .lut_mask = 64'h0A00080000000800;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y9_N26
-dffeas \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE (
+// Location: FF_X25_Y11_N22
+dffeas \soc_inst|m0_1|u_logic|Hue3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -78422,349 +79201,394 @@ dffeas \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Hue3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hue3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hue3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y9_N17
-dffeas \soc_inst|m0_1|u_logic|Otr2z4 (
+// Location: FF_X28_Y8_N2
+dffeas \soc_inst|m0_1|u_logic|Cy43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Otr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cy43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Otr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Otr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cy43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Otr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Asr2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// ( \soc_inst|m0_1|u_logic|Otr2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Otr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Asr2z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Otr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Asr2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Otr2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y8_N44
+dffeas \soc_inst|m0_1|u_logic|L763z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|L763z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~5 .lut_mask = 64'hFF0F0A0AF0000A0A;
-defparam \soc_inst|m0_1|u_logic|P12wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L763z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L763z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~6 (
+// Location: MLABCELL_X28_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qyc3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Kc03z4~q )) # (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Rvv2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Oubwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Cy43z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|L763z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qyc3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kc03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rvv2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cy43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|L763z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oubwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~6 .lut_mask = 64'hF0F00000CFC00A0A;
-defparam \soc_inst|m0_1|u_logic|P12wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .lut_mask = 64'h000000000A0C0000;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~0 (
+// Location: LABCELL_X24_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kf23z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~0_combout  = ( \soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~7_combout ) # ((\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|P12wx4~7_combout ))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (((\soc_inst|m0_1|u_logic|P12wx4~4_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|P12wx4~7_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( 
-// !\soc_inst|m0_1|u_logic|P12wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P12wx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Kf23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|P12wx4~7_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|P12wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|P12wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~6_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kf23z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~0 .lut_mask = 64'h00F008F8C5C5CDCD;
-defparam \soc_inst|m0_1|u_logic|P12wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kf23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kf23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Kf23z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y6_N38
-dffeas \soc_inst|m0_1|u_logic|Rr83z4 (
+// Location: FF_X24_Y8_N4
+dffeas \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kf23z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rr83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rr83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rr83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y10_N13
-dffeas \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE (
+// Location: FF_X27_Y7_N20
+dffeas \soc_inst|m0_1|u_logic|To33z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|To33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|To33z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y12_N13
-dffeas \soc_inst|m0_1|u_logic|Yg23z4 (
+// Location: MLABCELL_X25_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oubwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Oubwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .lut_mask = 64'h000000008800C000;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y8_N23
+dffeas \soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yg23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yg23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~1 (
+// Location: MLABCELL_X25_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Yg23z4~q  & ( (!\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yg23z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Lwbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yg23z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .lut_mask = 64'h0008000000000000;
+defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oubwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Oubwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lwbwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oubwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Oubwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hue3z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Oubwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hue3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Oubwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oubwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oubwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~1 .lut_mask = 64'h00E0000000200000;
-defparam \soc_inst|m0_1|u_logic|P12wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y13_N26
-dffeas \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~2 (
+// Location: MLABCELL_X25_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Konvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Konvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pybwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|G1s2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|G1s2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oubwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~2 .lut_mask = 64'h8004000480000000;
-defparam \soc_inst|m0_1|u_logic|P12wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Konvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Konvx4~0 .lut_mask = 64'hAACCAACCAAFFAAF0;
+defparam \soc_inst|m0_1|u_logic|Konvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~3 (
+// Location: LABCELL_X30_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xxovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ii73z4~q  & (!\soc_inst|m0_1|u_logic|P12wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qwr2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qwr2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xxovx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~41_sumout  & ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( (((\soc_inst|m0_1|u_logic|Konvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~41_sumout  & ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( ((\soc_inst|m0_1|u_logic|Konvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~41_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~113_sumout  & ( ((\soc_inst|m0_1|u_logic|Konvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~41_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~113_sumout  & ( (\soc_inst|m0_1|u_logic|Konvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ii73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qwr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|P12wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~41_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~3 .lut_mask = 64'hF030501000000000;
-defparam \soc_inst|m0_1|u_logic|P12wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xxovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xxovx4 .lut_mask = 64'h00550F5F33773F7F;
+defparam \soc_inst|m0_1|u_logic|Xxovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4 (
+// Location: FF_X30_Y14_N32
+dffeas \soc_inst|ram_1|saved_word_address[7] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|saved_word_address [7]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[7] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N21
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[7]~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~combout  = ( \soc_inst|m0_1|u_logic|Rr83z4~q  & ( \soc_inst|m0_1|u_logic|P12wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rr83z4~q  & ( \soc_inst|m0_1|u_logic|P12wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & (!\soc_inst|m0_1|u_logic|P12wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[7]~7_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Xxovx4~combout )) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// ((\soc_inst|ram_1|saved_word_address [7]))) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [7] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P12wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rr83z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|saved_word_address [7]),
+	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[7]~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4 .lut_mask = 64'h00000000A200F300;
-defparam \soc_inst|m0_1|u_logic|P12wx4 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .lut_mask = 64'h0F0F0F0F550F550F;
+defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lk9wx4~1 (
+// Location: LABCELL_X30_Y19_N57
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[0]~32 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|P12wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|W7z2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|P12wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|W7z2z4~q )))) ) )
+// \soc_inst|interconnect_1|HRDATA[0]~32_combout  = ( \soc_inst|interconnect_1|HRDATA[1]~20_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (\soc_inst|switches_1|switch_store[0][0]~q ) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout ) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [0]))) ) ) ) # ( \soc_inst|interconnect_1|HRDATA[1]~20_combout  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & \soc_inst|switches_1|switch_store[0][0]~q ) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & 
+// ((\soc_inst|switches_1|DataValid [0]))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(!\soc_inst|switches_1|DataValid [0]),
+	.datac(!\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[0][0]~q ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .lut_mask = 64'hD000D000D0D0D0D0;
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[0]~32 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[0]~32 .lut_mask = 64'hA3A300F0A3A30FFF;
+defparam \soc_inst|interconnect_1|HRDATA[0]~32 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfhvx4~1 (
+// Location: LABCELL_X23_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H4nwx4~combout  & ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Bfhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add5~113_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  & ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Bfhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add5~113_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  & ( !\soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Bfhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add5~113_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vcnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kyi2z4~q  & ( \soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[0]~32_combout  & (((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout )) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) # (\soc_inst|interconnect_1|HRDATA[0]~32_combout  & (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Kyi2z4~q  & ( !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[0]~32_combout  & (((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout )) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) # 
+// (\soc_inst|interconnect_1|HRDATA[0]~32_combout  & (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kyi2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[0]~32_combout  & (((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout )) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) # (\soc_inst|interconnect_1|HRDATA[0]~32_combout  & 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bfhvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .lut_mask = 64'h0F0A00000F0A0F0A;
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .lut_mask = 64'hF3A2F3A20000F3A2;
+defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y10_N53
-dffeas \soc_inst|m0_1|u_logic|V4d3z4 (
+// Location: FF_X23_Y17_N14
+dffeas \soc_inst|m0_1|u_logic|Kyi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -78773,508 +79597,435 @@ dffeas \soc_inst|m0_1|u_logic|V4d3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V4d3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kyi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V4d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V4d3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kyi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kyi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xxovx4 (
+// Location: LABCELL_X23_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xxovx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Add5~113_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (\soc_inst|m0_1|u_logic|Add3~41_sumout  & ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (((\soc_inst|m0_1|u_logic|Add3~41_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Konvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// (\soc_inst|m0_1|u_logic|Add3~41_sumout  & ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (((\soc_inst|m0_1|u_logic|Add3~41_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|Konvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~113_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (\soc_inst|m0_1|u_logic|Add3~41_sumout  & 
-// ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (((\soc_inst|m0_1|u_logic|Add3~41_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Konvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|C9rvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kyi2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add3~41_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xxovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xxovx4 .lut_mask = 64'h053705370537FFFF;
-defparam \soc_inst|m0_1|u_logic|Xxovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y4_N11
-dffeas \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X36_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .lut_mask = 64'h0A000A00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmivx4~0 (
+// Location: LABCELL_X31_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dmivx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G6d3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|G6d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Irqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) 
+// )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dmivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .lut_mask = 64'hCCCCFCFC0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .lut_mask = 64'h30300000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmivx4~1 (
+// Location: LABCELL_X33_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hhpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dmivx4~1_combout  = ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dmivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|V4d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dmivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|V4d3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Hhpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Viy2z4~q ) # (!\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dmivx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .lut_mask = 64'hAAFFA0F000000000;
-defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y4_N10
-dffeas \soc_inst|m0_1|u_logic|G1s2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G1s2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G1s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G1s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .lut_mask = 64'h00000000F0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y6_N38
-dffeas \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X40_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) )
 
-// Location: FF_X43_Y6_N59
-dffeas \soc_inst|m0_1|u_logic|Dcs2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dcs2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dcs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .lut_mask = 64'h0000303022223232;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ria2z4~0 (
+// Location: LABCELL_X36_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ria2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Dcs2z4~q  & 
-// (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kfpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kfpvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kfpvx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dcs2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ria2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .lut_mask = 64'h0400000000000000;
-defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y10_N34
-dffeas \soc_inst|m0_1|u_logic|H903z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H903z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H903z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H903z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .lut_mask = 64'hF0F0F0F0F0C0F0C0;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~2 (
+// Location: LABCELL_X35_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uga2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|B613z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|H903z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Kfpvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kfpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Kfpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B613z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H903z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uga2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .lut_mask = 64'h000000008C800000;
-defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .lut_mask = 64'h00000000F0A00000;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y11_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~1 (
+// Location: LABCELL_X36_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uga2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Hc23z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Ql33z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kfpvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Kfpvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Jipvx4~0_combout  & \soc_inst|m0_1|u_logic|Kfpvx4~3_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q 
+//  & ( (\soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Kfpvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Jipvx4~0_combout  & \soc_inst|m0_1|u_logic|Kfpvx4~3_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ql33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hc23z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jipvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kfpvx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uga2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .lut_mask = 64'h0000E20000000000;
-defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .lut_mask = 64'h0040004000C000C0;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y12_N13
-dffeas \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE (
+// Location: FF_X36_Y15_N44
+dffeas \soc_inst|m0_1|u_logic|Qzq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y11_N41
-dffeas \soc_inst|m0_1|u_logic|I463z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I463z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qzq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I463z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I463z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qzq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qzq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~0 (
+// Location: LABCELL_X27_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylwwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uga2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|I463z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ylwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qzq2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|I463z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uga2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ylwwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .lut_mask = 64'h0000000040405000;
-defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .lut_mask = 64'h0000000F00000000;
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~3 (
+// Location: LABCELL_X27_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylwwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uga2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Uga2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Uga2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ria2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Uga2z4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ylwwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (\soc_inst|m0_1|u_logic|Zcn2z4~q  & \soc_inst|m0_1|u_logic|Ylwwx4~0_combout )) ) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ria2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uga2z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uga2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uga2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ylwwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uga2z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .lut_mask = 64'hC040000000000000;
-defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .lut_mask = 64'h0000000000000202;
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxnvx4~0 (
+// Location: LABCELL_X22_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ok7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|G1s2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uga2z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|G1s2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|G1s2z4~q 
-// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|G1s2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ok7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Wai2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wai2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uga2z4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .lut_mask = 64'hACACAFAFACACAFA0;
-defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .lut_mask = 64'h88CC88CCC8CCC8CC;
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jxovx4 (
+// Location: LABCELL_X22_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Manwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jxovx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~105_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Add5~105_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & (\soc_inst|m0_1|u_logic|Add3~37_sumout  & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) # (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~37_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~105_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Add3~37_sumout  & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) # (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~37_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~105_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & (\soc_inst|m0_1|u_logic|Add3~37_sumout  & 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) # (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~37_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Manwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add3~37_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jxovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jxovx4 .lut_mask = 64'h035703570357FFFF;
-defparam \soc_inst|m0_1|u_logic|Jxovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Manwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Manwx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Manwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qknvx4~0 (
+// Location: MLABCELL_X21_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ekovx4~combout  $ (!\soc_inst|m0_1|u_logic|Jxovx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ekovx4~combout  $ (!\soc_inst|m0_1|u_logic|Jxovx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Pwdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & !\soc_inst|m0_1|u_logic|Manwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .lut_mask = 64'h0F0FAFAF030CABAE;
-defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .lut_mask = 64'h3F003F000C000C00;
+defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X17_Y5_N50
-dffeas \soc_inst|m0_1|u_logic|Ffs2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glnwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Glnwx4~0_combout  & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (\soc_inst|m0_1|u_logic|Glnwx4~0_combout )) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ffs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .lut_mask = 64'h5F505F5050505050;
+defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4nvx4~0 (
+// Location: MLABCELL_X21_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F4nvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Skhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~41_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q ))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Add2~49_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~49_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Skhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .lut_mask = 64'hC0C0000000000000;
-defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .lut_mask = 64'hF055FC5500000000;
+defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4nvx4~1 (
+// Location: MLABCELL_X21_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|K3l2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( !\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & 
-// \soc_inst|m0_1|u_logic|F4nvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Skhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Skhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Skhvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Skhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F4nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .lut_mask = 64'h000000CC0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .lut_mask = 64'h00000000CCCCFFCD;
+defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X19_Y6_N40
-dffeas \soc_inst|m0_1|u_logic|K3l2z4 (
+// Location: FF_X21_Y14_N53
+dffeas \soc_inst|m0_1|u_logic|Jex2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|F4nvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -79283,2353 +80034,2193 @@ dffeas \soc_inst|m0_1|u_logic|K3l2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jex2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K3l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K3l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jex2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jex2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ux4wx4~0 (
+// Location: LABCELL_X30_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z6ovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Z6ovx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~45_sumout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~45_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~45_sumout )) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~45_sumout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add3~45_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z6ovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z6ovx4 .lut_mask = 64'h11111F1F11FF1FFF;
+defparam \soc_inst|m0_1|u_logic|Z6ovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nmnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nmnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & (!\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|Mjl2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Mjl2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( 
+// ((!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Mjl2z4~q )) # (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .lut_mask = 64'h55DD55DD50DC50DC;
+defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y10_N14
-dffeas \soc_inst|m0_1|u_logic|P2a3z4 (
+// Location: FF_X30_Y15_N44
+dffeas \soc_inst|m0_1|u_logic|Mjl2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|P2a3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mjl2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P2a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|P2a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mjl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mjl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Inb2z4 (
+// Location: LABCELL_X24_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B2uvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Inb2z4~combout  = ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vgs2z4~q  ) )
+// \soc_inst|m0_1|u_logic|B2uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & !\soc_inst|m0_1|u_logic|Kop2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Inb2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Inb2z4 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Inb2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~3 (
+// Location: LABCELL_X24_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfuwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkb3z4~q  & (!\soc_inst|m0_1|u_logic|Svs2z4~q  & ((!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Zad3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkb3z4~q  & ((!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Zad3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Svs2z4~q  & ((!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Zad3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zad3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Wfuwx4~combout  = ( \soc_inst|m0_1|u_logic|Lz93z4~q  & ( (\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|B2uvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .lut_mask = 64'hFCFCFC00A8A8A800;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wfuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfuwx4 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Wfuwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~1 (
+// Location: LABCELL_X27_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Owgvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~1_combout  = ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Azs2z4~q  & (!\soc_inst|m0_1|u_logic|Cps2z4~q  & ((!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Tqs2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cps2z4~q  & ((!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Tqs2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Azs2z4~q  & ((!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Tqs2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Tqs2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Owgvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Wfuwx4~combout )) # (\soc_inst|m0_1|u_logic|Ywi2z4~q ))) 
+// # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ((\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (\soc_inst|m0_1|u_logic|Ywi2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (\soc_inst|m0_1|u_logic|Ywi2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ywi2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ye4wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ywi2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .lut_mask = 64'hFFCCAA88F0C0A080;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .lut_mask = 64'h3333323233FF32FA;
+defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N28
-dffeas \soc_inst|m0_1|u_logic|Bjd3z4 (
+// Location: FF_X27_Y20_N8
+dffeas \soc_inst|m0_1|u_logic|Ywi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bjd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ywi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bjd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ywi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ywi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~0 (
+// Location: LABCELL_X23_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bjd3z4~q  & ((!\soc_inst|m0_1|u_logic|Uls2z4~q ) 
-// # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Uls2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bjd3z4~q  & ((!\soc_inst|m0_1|u_logic|Uls2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uls2z4~q ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ywi2z4~q  & ( !\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .lut_mask = 64'hFCFCFC00A8A8A800;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~4 (
+// Location: LABCELL_X23_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~4_combout  = ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Uaj2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Qrp2z4~q )))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Uqi2z4~q  & ((\soc_inst|m0_1|u_logic|Uaj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~q  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qrp2z4~q ))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Uqi2z4~q )))) ) 
-// ) )
+// \soc_inst|m0_1|u_logic|X2rvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & !\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & !\soc_inst|m0_1|u_logic|B6pwx4~4_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X2rvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .lut_mask = 64'h000000000035F035;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y14_N14
-dffeas \soc_inst|m0_1|u_logic|T7d3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T7d3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T7d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T7d3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .lut_mask = 64'hF000F000C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y14_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~5 (
+// Location: LABCELL_X23_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T7d3z4~q  & (!\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Usl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Usl2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T7d3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Usl2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Usl2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|X2rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|X2rvx4~1_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & !\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X2rvx4~1_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & !\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|X2rvx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|X2rvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|C0zwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|T7d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X2rvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .lut_mask = 64'hFFAACC88F0A0C080;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .lut_mask = 64'h0303333333003300;
+defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~2 (
+// Location: MLABCELL_X34_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tbnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Bmb3z4~q  & ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tib3z4~q  & ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bmb3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q )))) # (\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Tib3z4~q  & ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bmb3z4~q  & ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q )))) # (\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tib3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Tbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[2]~14_combout  & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & (!\soc_inst|interconnect_1|HRDATA[2]~14_combout  & 
+// ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .lut_mask = 64'hEEE0EEE0EEE00000;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .lut_mask = 64'h8C8CAFAF8C00AF00;
+defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~6 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~6_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~5_combout  & ( \soc_inst|m0_1|u_logic|Vsywx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Vsywx4~3_combout  & (\soc_inst|m0_1|u_logic|Vsywx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Vsywx4~0_combout  & !\soc_inst|m0_1|u_logic|Vsywx4~4_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Vsywx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vsywx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vsywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vsywx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vsywx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X34_Y19_N44
+dffeas \soc_inst|m0_1|u_logic|Lbn2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lbn2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .lut_mask = 64'h0000000000000100;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lbn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lbn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtywx4~0 (
+// Location: MLABCELL_X25_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xtywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (\soc_inst|m0_1|u_logic|Cam2z4~q  & (!\soc_inst|m0_1|u_logic|G0w2z4~q  & !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (\soc_inst|m0_1|u_logic|Cam2z4~q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & (!\soc_inst|m0_1|u_logic|G0w2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|U9mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lbn2z4~q )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lbn2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lbn2z4~q ))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lbn2z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lbn2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .lut_mask = 64'h4000FF005000FF00;
-defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .lut_mask = 64'hBA30FF7530307575;
+defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypa2z4~1 (
+// Location: FF_X25_Y20_N44
+dffeas \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rryvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Xtywx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Inb2z4~combout  & \soc_inst|m0_1|u_logic|Vsywx4~6_combout )) # (\soc_inst|m0_1|u_logic|P2a3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Rryvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cam2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .lut_mask = 64'h0000000033F333F3;
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .lut_mask = 64'h0000400000000000;
+defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8b2z4 (
+// Location: MLABCELL_X39_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Upyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N8b2z4~combout  = ( \soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dks2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Txa2z4~0_combout  )
+// \soc_inst|m0_1|u_logic|Upyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rryvx4~0_combout  & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N8b2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Upyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N8b2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N8b2z4 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|N8b2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .lut_mask = 64'h0000330000000000;
+defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypa2z4~0 (
+// Location: LABCELL_X40_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ypa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( \soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|N8b2z4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|P2a3z4~q ) # (\soc_inst|m0_1|u_logic|Inb2z4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( \soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|N8b2z4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|P2a3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Inb2z4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( !\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|R3mwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & (!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|B73wx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|N8b2z4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datag(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .lut_mask = 64'hAAAAA0AA88888088;
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .lut_mask = 64'h0100010100000101;
+defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C34wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|C34wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( !\soc_inst|m0_1|u_logic|Thm2z4~q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X35_Y12_N7
+dffeas \soc_inst|m0_1|u_logic|Pet2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pet2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C34wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C34wx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|C34wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pet2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pet2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C34wx4 (
+// Location: LABCELL_X37_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nen2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C34wx4~combout  = ( \soc_inst|m0_1|u_logic|C34wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ) # (\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nen2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Pet2z4~q  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|J4x2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Pet2z4~q  & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|J4x2z4~q ) # (\soc_inst|m0_1|u_logic|Kryvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pet2z4~q  & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pet2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C34wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nen2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C34wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C34wx4 .lut_mask = 64'h00000000AAFFAAFF;
-defparam \soc_inst|m0_1|u_logic|C34wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .lut_mask = 64'h5555F5F50000F0F0;
+defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr0xx4~1 (
+// Location: MLABCELL_X39_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nen2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cr0xx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Nen2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Nen2z4~q  & ( \soc_inst|m0_1|u_logic|Nen2z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nen2z4~q  & ( \soc_inst|m0_1|u_logic|Nen2z4~0_combout  & ( 
+// (\soc_inst|interconnect_1|HREADY~0_combout  & (((\soc_inst|m0_1|u_logic|Msyvx4~combout ) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout )) # (\soc_inst|m0_1|u_logic|Upyvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nen2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Nen2z4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Upyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & !\soc_inst|m0_1|u_logic|Msyvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Upyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nen2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .lut_mask = 64'h0000222200000000;
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .lut_mask = 64'h0000F8F0070FFFFF;
+defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~0 (
+// Location: FF_X39_Y15_N25
+dffeas \soc_inst|m0_1|u_logic|Nen2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nen2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nen2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F5mvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Y9t2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Qppvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nen2z4~q  & ( \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ez8wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Nen2z4~q  & ( !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nen2z4~q  & ( !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qppvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .lut_mask = 64'h00CC000000CC0000;
-defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .lut_mask = 64'h03000B0800000808;
+defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5vvx4~0 (
+// Location: MLABCELL_X28_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lz8wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( \soc_inst|m0_1|u_logic|Ye4wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Lz8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Punvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Punvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Punvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Punvx4~4_combout  & (!\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Punvx4~4_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lz8wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .lut_mask = 64'hDEEDD4E8D0E0D0E0;
+defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kofwx4~0 (
+// Location: MLABCELL_X28_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kofwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Qppvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~93_sumout  & ( \soc_inst|m0_1|u_logic|Lz8wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Qppvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Add5~93_sumout  & ( \soc_inst|m0_1|u_logic|Lz8wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qppvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qppvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lz8wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .lut_mask = 64'h000000000A000A00;
-defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .lut_mask = 64'h00000000F0F05050;
+defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bk4wx4 (
+// Location: LABCELL_X22_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bk4wx4~combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & \soc_inst|m0_1|u_logic|Socwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|C2rvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Khfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Bgfwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|C2rvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk4wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bk4wx4 .lut_mask = 64'h0000000000300030;
-defparam \soc_inst|m0_1|u_logic|Bk4wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .lut_mask = 64'hA0FFA0FFA0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Si4wx4~0 (
+// Location: LABCELL_X23_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Si4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|C2rvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Si4wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C2rvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .lut_mask = 64'h00000000000C000C;
-defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .lut_mask = 64'hFAFAAAAAF0F00000;
+defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~0 (
+// Location: LABCELL_X24_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pd4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Si4wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )))) # (\soc_inst|m0_1|u_logic|Si4wx4~0_combout 
-//  & (((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Si4wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|C2rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C2rvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C2rvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C2rvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|C2rvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Si4wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C2rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .lut_mask = 64'h11111F1111111F11;
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .lut_mask = 64'hF000F50000000000;
+defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~1 (
+// Location: LABCELL_X27_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pd4wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pd4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X77wx4~combout ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Bk4wx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Qppvx4~2_combout  = ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qppvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Htyvx4~3_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pd4wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .lut_mask = 64'hFFFCFFFC00000000;
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .lut_mask = 64'h0000000030333033;
+defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y6_N50
-dffeas \soc_inst|m0_1|u_logic|H9i2z4 (
+// Location: FF_X28_Y12_N50
+dffeas \soc_inst|m0_1|u_logic|Fwj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fwj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H9i2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H9i2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fwj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fwj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y6_N2
-dffeas \soc_inst|m0_1|u_logic|Lny2z4 (
+// Location: FF_X27_Y12_N25
+dffeas \soc_inst|m0_1|u_logic|Txj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lny2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Txj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lny2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lny2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W7hwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|W7hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xly2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Nqy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Nqy2z4~q  & \soc_inst|m0_1|u_logic|Lny2z4~q )) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .lut_mask = 64'h000C000C0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Poa2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Poa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .lut_mask = 64'h0000000022002200;
-defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Txj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Txj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ik4wx4~0 (
+// Location: MLABCELL_X28_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q 
-// ))) # (\soc_inst|m0_1|u_logic|W7hwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|V7ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Txj2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Fwj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Duu2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|Dtj2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fwj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Duu2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Txj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dtj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ik4wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V7ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .lut_mask = 64'hFFFFFFDF00000000;
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .lut_mask = 64'hFF00CCCCAAAAF0F0;
+defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y6_N23
-dffeas \soc_inst|m0_1|u_logic|Qdj2z4 (
+// Location: FF_X27_Y12_N59
+dffeas \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qdj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ik4wx4~1 (
+// Location: LABCELL_X27_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ik4wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~q  & ( \soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Ik4wx4~0_combout  & (!\soc_inst|m0_1|u_logic|H9i2z4~q  $ 
-// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qdj2z4~q  & ( \soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ik4wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) # 
-// ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qdj2z4~q  & ( !\soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qdj2z4~q  & ( !\soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|V7ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ukt2z4~q  & ( \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ruj2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ug63z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ukt2z4~q  & ( \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (((!\soc_inst|m0_1|u_logic|Ruj2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ug63z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ukt2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ruj2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ug63z4~q 
+// ) # ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ukt2z4~q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ruj2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ug63z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ik4wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ug63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ruj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ukt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V7ywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .lut_mask = 64'h00FF00FF00BA0090;
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .lut_mask = 64'hCAFFCA0FCAF0CA00;
+defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~2 (
+// Location: MLABCELL_X28_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pd4wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pd4wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C34wx4~combout  & (\soc_inst|m0_1|u_logic|Kofwx4~0_combout  & !\soc_inst|m0_1|u_logic|S4w2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pd4wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|S4w2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Pd4wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|S4w2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pd4wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|S4w2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|V7ywx4~combout  = ( \soc_inst|m0_1|u_logic|V7ywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|V7ywx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|V7ywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|V7ywx4~0_combout  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|V7ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|V7ywx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V7ywx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .lut_mask = 64'hF0F0F0F0F0F02020;
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4 .lut_mask = 64'h0003000333033303;
+defparam \soc_inst|m0_1|u_logic|V7ywx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y10_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5vvx4~1 (
+// Location: MLABCELL_X28_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A7ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q5vvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pd4wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|C34wx4~combout  & (!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout  & ((!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Q5vvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|C34wx4~combout  & (((!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q5vvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|A7ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & \soc_inst|m0_1|u_logic|V7ywx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & \soc_inst|m0_1|u_logic|V7ywx4~combout )) # (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V7ywx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pd4wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .lut_mask = 64'hD0DDD0DD00000000;
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .lut_mask = 64'h444C444C000C000C;
+defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7mvx4~0 (
+// Location: MLABCELL_X28_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mzxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q7mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U7w2z4~q  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U7w2z4~q  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q5vvx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|U7w2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|U7w2z4~q  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q5vvx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .lut_mask = 64'hAAAAFFFFAAAAFFAF;
-defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X22_Y10_N56
-dffeas \soc_inst|m0_1|u_logic|U7w2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U7w2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U7w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U7w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .lut_mask = 64'hAAAAAAAA00000000;
+defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~1 (
+// Location: LABCELL_X22_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9nwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Viuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Whzwx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Viuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Svxwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tzxwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .lut_mask = 64'h3133313333333333;
+defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y15_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~2 (
+// Location: MLABCELL_X21_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Arzwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Arzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & !\soc_inst|m0_1|u_logic|Kizwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Arzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Iazwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dizwx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Iazwx4~0_combout  & (\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & !\soc_inst|m0_1|u_logic|Kizwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Manwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & \soc_inst|m0_1|u_logic|Y9nwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Manwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Arzwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .lut_mask = 64'hAF0A0F0000000000;
-defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .lut_mask = 64'h010F010F030F030F;
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y13_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~0 (
+// Location: LABCELL_X23_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zuzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & \soc_inst|m0_1|u_logic|Arzwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|D4g3z4~q  & (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Arzwx4~2_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Zuzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|O9iwx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Arzwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zuzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .lut_mask = 64'hCDCCCDCC00CC00CC;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .lut_mask = 64'h0111055503330FFF;
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~2 (
+// Location: MLABCELL_X25_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zuzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~2_combout  = ( \soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|Cjuwx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|D0wwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .lut_mask = 64'h0F0F0F0F0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .lut_mask = 64'h00000000AAAF2223;
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~3 (
+// Location: MLABCELL_X21_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~3_combout  = ( \soc_inst|m0_1|u_logic|U5pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & 
-// (\soc_inst|m0_1|u_logic|Ayzwx4~combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Glhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~37_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (\soc_inst|m0_1|u_logic|Glhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Zuzvx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~37_sumout  & ( (\soc_inst|m0_1|u_logic|Glhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kkrvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Glhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .lut_mask = 64'h330F330F55555555;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .lut_mask = 64'h3033303320222022;
+defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~4 (
+// Location: FF_X21_Y14_N58
+dffeas \soc_inst|m0_1|u_logic|Nbx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nbx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nbx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hszvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  = ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & (\soc_inst|m0_1|u_logic|Kkrvx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Hszvx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~37_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~53_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Euzvx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~37_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~53_sumout )) # (\soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~37_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~53_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~37_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~53_sumout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kkrvx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add3~53_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .lut_mask = 64'hB1B1B1B100FF00FF;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hszvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hszvx4 .lut_mask = 64'h0505373705FF37FF;
+defparam \soc_inst|m0_1|u_logic|Hszvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~5 (
+// Location: FF_X30_Y14_N7
+dffeas \soc_inst|ram_1|saved_word_address[4] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|saved_word_address [4]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[4] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y13_N15
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[4]~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  = ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wwywx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & (\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( 
-// (\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & (\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout )) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[4]~4_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hszvx4~combout )) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// ((\soc_inst|ram_1|saved_word_address [4]))) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [4] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|saved_word_address [4]),
+	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[4]~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .lut_mask = 64'h1100F1F0BB00F1F0;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .lut_mask = 64'h0F0F0F0F550F550F;
+defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~6 (
+// Location: FF_X29_Y16_N5
+dffeas \soc_inst|ram_1|byte_select[2] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|byte2~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|byte_select [2]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[2] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y16_N27
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[23]~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( (\soc_inst|m0_1|u_logic|U7w2z4~q  & !\soc_inst|m0_1|u_logic|Ywi2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ywi2z4~q  ) )
+// \soc_inst|ram_1|data_to_memory[23]~3_combout  = ( \soc_inst|ram_1|data_to_memory[23]~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ) # (\soc_inst|ram_1|byte_select [2]))) ) ) # ( 
+// !\soc_inst|ram_1|data_to_memory[23]~0_combout  & ( (!\soc_inst|ram_1|byte_select [2] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|ram_1|byte_select [2]),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
+	.dataf(!\soc_inst|ram_1|data_to_memory[23]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[23]~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .lut_mask = 64'hFF00FF000F000F00;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[23]~3 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[23]~3 .lut_mask = 64'h000A000A050F050F;
+defparam \soc_inst|ram_1|data_to_memory[23]~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y9_N50
-dffeas \soc_inst|m0_1|u_logic|Kyi2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+// Location: M10K_X26_Y13_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[23]~3_combout ,\soc_inst|ram_1|data_to_memory[7]~4_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kyi2z4~q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_bit_number = 7;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_bit_number = 7;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init0 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029249242C1040001218480A0000000000204204204204204204204907FFFFFFFFFFFFC33002000000000000000000001554";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y17_N15
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[23]~8 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[23]~8_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
+// (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # ((\soc_inst|switches_1|switch_store[1][7]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( 
+// (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][7]~q )))) ) 
+// )
+
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[1][7]~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kyi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kyi2z4 .power_up = "low";
+defparam \soc_inst|interconnect_1|HRDATA[23]~8 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[23]~8 .lut_mask = 64'hC0D1C0D1E2F3E2F3;
+defparam \soc_inst|interconnect_1|HRDATA[23]~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcnvx4~0 (
+// Location: LABCELL_X19_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tohvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vcnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kyi2z4~q  & ( \soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & 
-// ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Kyi2z4~q  & ( !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kyi2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Tohvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[23]~8_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[23]~8_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tohvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .lut_mask = 64'hF5C4F5C40000F5C4;
-defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .lut_mask = 64'hFFFFFFFFFF00FF00;
+defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y9_N49
-dffeas \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE (
+// Location: FF_X19_Y17_N46
+dffeas \soc_inst|m0_1|u_logic|Sow2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Tohvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Sow2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sow2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sow2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~0 (
+// Location: LABCELL_X30_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C9rvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nbm2z4~q  ) )
+// \soc_inst|m0_1|u_logic|C6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W4y2z4~q ) # (!\soc_inst|m0_1|u_logic|Sow2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout 
+//  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sow2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W4y2z4~q  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sow2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .lut_mask = 64'h00000000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .lut_mask = 64'h0000AAAAFF00FFAA;
+defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~1 (
+// Location: LABCELL_X36_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|C6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|interconnect_1|HRDATA[7]~11_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # ((\soc_inst|interconnect_1|HRDATA[7]~11_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .lut_mask = 64'h1010101033103310;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .lut_mask = 64'hCCCFCCCF000F000F;
+defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~2 (
+// Location: LABCELL_X35_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Kfpvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( !\soc_inst|m0_1|u_logic|Kfpvx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|C6nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|C6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C6nvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[23]~8_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C6nvx4~1_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C6nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .lut_mask = 64'hF0F0F0F0F0A0F0A0;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .lut_mask = 64'hF0A0F0A000000000;
+defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X35_Y16_N22
+dffeas \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .lut_mask = 64'h0F000000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~3 (
+// Location: MLABCELL_X39_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|My6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Kfpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kfpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Irqvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|My6wx4~0_combout  = (\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))
 
-	.dataa(!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kfpvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .lut_mask = 64'h0E000E0000000000;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|My6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|My6wx4~0 .lut_mask = 64'h0400040004000400;
+defparam \soc_inst|m0_1|u_logic|My6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~4 (
+// Location: MLABCELL_X39_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # ((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vopvx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|My6wx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|K6yvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Vnxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|K6yvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K6yvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .lut_mask = 64'h50505050FF50FF50;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .lut_mask = 64'h002200220A220A22;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jipvx4~0 (
+// Location: LABCELL_X42_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jipvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ljpvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jipvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .lut_mask = 64'h00000000A5A50F0F;
-defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Kfpvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Jipvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kfpvx4~3_combout  & ((\soc_inst|m0_1|u_logic|Yzi2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kfpvx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jipvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .lut_mask = 64'h050F000000000000;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y8_N28
-dffeas \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .lut_mask = 64'h00000000F0F0FFFF;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz8wx4 (
+// Location: LABCELL_X31_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xiwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zz8wx4~combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Xiwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qdj2z4~q  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zz8wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zz8wx4 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Zz8wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .lut_mask = 64'h0000000033330000;
+defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J00wx4~0 (
+// Location: MLABCELL_X39_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J00wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~3_combout  = ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|C9yvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|C9yvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J00wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J00wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J00wx4~0 .lut_mask = 64'h88808880AAA0AAA0;
-defparam \soc_inst|m0_1|u_logic|J00wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .lut_mask = 64'h004400440F4F0F4F;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpcwx4~0 (
+// Location: MLABCELL_X39_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gpcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~4_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|K6yvx4~3_combout  & ( 
+// \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K6yvx4~2_combout  & (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K6yvx4~3_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K6yvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|K6yvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .lut_mask = 64'h8D888D884E444E44;
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .lut_mask = 64'h0000F0F00020F0F0;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpcwx4~1 (
+// Location: LABCELL_X37_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X8kwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gpcwx4~1_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & \soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|X8kwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & \soc_inst|m0_1|u_logic|Srgwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .lut_mask = 64'hCCCCC0C0CCCC0C0C;
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J00wx4~1 (
+// Location: LABCELL_X37_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J00wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gpcwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~97_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gpcwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~97_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gpcwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & (\soc_inst|m0_1|u_logic|Gpcwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add5~97_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J00wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J00wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J00wx4~1 .lut_mask = 64'h000B0B0B00000B0B;
-defparam \soc_inst|m0_1|u_logic|J00wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .lut_mask = 64'h00F000F000300030;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C00wx4~0 (
+// Location: LABCELL_X40_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zzfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C00wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( \soc_inst|m0_1|u_logic|J00wx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C00wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C00wx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|C00wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y8_N29
-dffeas \soc_inst|m0_1|u_logic|Bn53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bn53z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bn53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bn53z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y10_N8
-dffeas \soc_inst|m0_1|u_logic|U5r2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U5r2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5r2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U5r2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y10_N49
-dffeas \soc_inst|m0_1|u_logic|Twz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Twz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Twz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Twz2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y6_N2
-dffeas \soc_inst|m0_1|u_logic|J433z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J433z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J433z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J433z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X40_Y5_N53
-dffeas \soc_inst|m0_1|u_logic|Av13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Av13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Av13z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X39_Y8_N19
-dffeas \soc_inst|m0_1|u_logic|Nt03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nt03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nt03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nt03z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Am5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|J433z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Av13z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nt03z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|J433z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Av13z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nt03z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Am5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .lut_mask = 64'hCCCCFF00F0F0AAAA;
-defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y8_N50
-dffeas \soc_inst|m0_1|u_logic|I7r2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I7r2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I7r2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I7r2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y10_N44
-dffeas \soc_inst|m0_1|u_logic|Sd43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sd43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sd43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sd43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y8_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~3 (
+// Location: LABCELL_X42_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Am5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sd43z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-//  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I7r2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Sd43z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Tuwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I7r2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sd43z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Am5wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .lut_mask = 64'hAAF0FF0000F0FF00;
-defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Am5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Am5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Twz2z4~q 
-// ) # (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Am5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Twz2z4~q ) # (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Am5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Twz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Am5wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Am5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .lut_mask = 64'h000088882220AAA8;
-defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .lut_mask = 64'h0505000000000000;
+defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~1 (
+// Location: MLABCELL_X39_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Am5wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Am5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bn53z4~q  & (!\soc_inst|m0_1|u_logic|Ixxwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5r2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Am5wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ixxwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5r2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1xvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1xvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bn53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U5r2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Am5wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .lut_mask = 64'hCF00000045000000;
-defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .lut_mask = 64'hFAFAFA0A00000000;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H0dwx4~0 (
+// Location: LABCELL_X37_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H0dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~7_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H0dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .lut_mask = 64'h0000100000000000;
-defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .lut_mask = 64'h0A0A0A0A000F000F;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O0dwx4~0 (
+// Location: LABCELL_X37_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O0dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Z4bwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~8_combout  = ( !\soc_inst|m0_1|u_logic|I2mwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K6yvx4~7_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K6yvx4~7_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O0dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .lut_mask = 64'h8888888808880888;
-defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .lut_mask = 64'hE0F0E0F000000000;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xucwx4~0 (
+// Location: LABCELL_X37_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xucwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O0dwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & (!\soc_inst|m0_1|u_logic|H0dwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O0dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H0dwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~9_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|K6yvx4~5_combout  & (\soc_inst|m0_1|u_logic|K6yvx4~6_combout  & ((!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H0dwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O0dwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K6yvx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K6yvx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .lut_mask = 64'hF500310000000000;
-defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .lut_mask = 64'h00000000080C080C;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~25 (
+// Location: MLABCELL_X39_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J4x2z4~q  ) + ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  ) + ( !VCC ))
-// \soc_inst|m0_1|u_logic|Add2~26  = CARRY(( !\soc_inst|m0_1|u_logic|J4x2z4~q  ) + ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|K6yvx4~10_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~9_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (((\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|K6yvx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|K6yvx4~4_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|K6yvx4~9_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|K6yvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K6yvx4~4_combout ),
+	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~25_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~26 ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~25 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~25 .lut_mask = 64'h000055550000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .lut_mask = 64'h00FF00FF001F001F;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~17 (
+// Location: FF_X28_Y10_N35
+dffeas \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L61xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~26  ))
-// \soc_inst|m0_1|u_logic|Add2~18  = CARRY(( !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~26  ))
+// \soc_inst|m0_1|u_logic|L61xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~26 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~17_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~18 ),
+	.combout(\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~17 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L61xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L61xx4~0 .lut_mask = 64'h00A000A000000000;
+defparam \soc_inst|m0_1|u_logic|L61xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~33 (
+// Location: LABCELL_X27_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz33z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~18  ))
-// \soc_inst|m0_1|u_logic|Add2~34  = CARRY(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~18  ))
+// \soc_inst|m0_1|u_logic|Qz33z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~18 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~33_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~34 ),
+	.combout(\soc_inst|m0_1|u_logic|Qz33z4~feeder_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~33 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~33 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~33 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qz33z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz33z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Qz33z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ulhvx4~0 (
+// Location: FF_X27_Y6_N35
+dffeas \soc_inst|m0_1|u_logic|Qz33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qz33z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qz33z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qz33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg13z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ulhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~33_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|R8x2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Yg13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~33_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ulhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .lut_mask = 64'hCF8BCF8B00000000;
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ulhvx4~1 (
+// Location: FF_X28_Y5_N55
+dffeas \soc_inst|m0_1|u_logic|Yg13z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yg13z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yg13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yg13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ulhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ulhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~97_sumout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ulhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~97_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zhyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qz33z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yg13z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ulhvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qz33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yg13z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ulhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .lut_mask = 64'h0000E0E00000EEEE;
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .lut_mask = 64'h0000C0000000A000;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y10_N8
-dffeas \soc_inst|m0_1|u_logic|R8x2z4 (
+// Location: FF_X27_Y13_N56
+dffeas \soc_inst|m0_1|u_logic|Hq23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ulhvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R8x2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hq23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R8x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R8x2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hq23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hq23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~29 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~29_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Bnnvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J4x2z4~q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) + ( 
-// !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( !VCC ))
-// \soc_inst|m0_1|u_logic|Add3~30  = CARRY(( (!\soc_inst|m0_1|u_logic|Bnnvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J4x2z4~q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|G7x2z4~q  
-// ) + ( !VCC ))
+// Location: FF_X28_Y10_N38
+dffeas \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bnnvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~29_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~30 ),
-	.shareout());
+// Location: FF_X27_Y13_N49
+dffeas \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z853z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~29 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~29 .lut_mask = 64'h000000FF0000FF08;
-defparam \soc_inst|m0_1|u_logic|Add3~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~25 (
+// Location: MLABCELL_X28_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~30  ))
-// \soc_inst|m0_1|u_logic|Add3~26  = CARRY(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~30  ))
+// \soc_inst|m0_1|u_logic|Zhyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Z853z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Z853z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~30 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~25_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~26 ),
+	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~25 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~25 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .lut_mask = 64'hAF00AF00AF55AF55;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~33 (
+// Location: MLABCELL_X28_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Cax2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~26  ))
-// \soc_inst|m0_1|u_logic|Add3~34  = CARRY(( !\soc_inst|m0_1|u_logic|Cax2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~26  ))
+// \soc_inst|m0_1|u_logic|Zhyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Iwp2z4~q  & ( \soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Iwp2z4~q  & ( !\soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hq23z4~q ) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iwp2z4~q  & ( !\soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Hq23z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Hq23z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Iwp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~2_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~26 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~33_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~34 ),
+	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~33 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~33 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~33 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .lut_mask = 64'h080C080CC0000000;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~53 (
+// Location: MLABCELL_X28_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~34  ))
-// \soc_inst|m0_1|u_logic|Add3~54  = CARRY(( !\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~34  ))
+// \soc_inst|m0_1|u_logic|Zhyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Zhyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Q8ywx4~combout  & (!\soc_inst|m0_1|u_logic|Zhyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ek03z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ek03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zhyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~34 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~53_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~54 ),
+	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~53 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~53 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~53 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4 .lut_mask = 64'hB000B00000000000;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~49 (
+// Location: MLABCELL_X28_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O24wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~54  ))
-// \soc_inst|m0_1|u_logic|Add3~50  = CARRY(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~54  ))
+// \soc_inst|m0_1|u_logic|O24wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W21wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|W21wx4~combout  & ( (\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~54 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~49_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~50 ),
+	.combout(\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~49 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~49 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~49 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O24wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O24wx4~0 .lut_mask = 64'h00AF00AF50FF50FF;
+defparam \soc_inst|m0_1|u_logic|O24wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4qvx4 (
+// Location: MLABCELL_X25_Y16_N45
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[16]~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S4qvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~49_sumout  & ( \soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Yonvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~49_sumout  & ( \soc_inst|m0_1|u_logic|Add5~81_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Yonvx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~49_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Yonvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~49_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) ) )
+// \soc_inst|ram_1|data_to_memory[16]~25_combout  = ( \soc_inst|m0_1|u_logic|O24wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout )) ) ) # ( !\soc_inst|m0_1|u_logic|O24wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ) # 
+// (\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~49_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datab(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[16]~25_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S4qvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S4qvx4 .lut_mask = 64'h000F333F555F777F;
-defparam \soc_inst|m0_1|u_logic|S4qvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X18_Y5_N17
-dffeas \soc_inst|ram_1|saved_word_address[5] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [5]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[5] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[5] .power_up = "low";
+defparam \soc_inst|ram_1|data_to_memory[16]~25 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[16]~25 .lut_mask = 64'h1155115500440044;
+defparam \soc_inst|ram_1|data_to_memory[16]~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N9
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[5]~5 (
+// Location: LABCELL_X19_Y16_N3
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[16]~30 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[5]~5_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|S4qvx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [5])) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [5] ) )
+// \soc_inst|interconnect_1|HRDATA[16]~30_combout  = ( \soc_inst|switches_1|switch_store[1][0]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
+// (\soc_inst|interconnect_1|HRDATA[20]~7_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][0]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & 
+// ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (!\soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( \soc_inst|switches_1|switch_store[1][0]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & 
+// (\soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][0]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|saved_word_address [5]),
-	.datad(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datae(!\soc_inst|switches_1|switch_store[1][0]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[5]~5_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .lut_mask = 64'h0F0F0F0F05AF05AF;
-defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[16]~30 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[16]~30 .lut_mask = 64'hF000F303FC0CFF0F;
+defparam \soc_inst|interconnect_1|HRDATA[16]~30 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y9_N57
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[19]~18 (
+// Location: LABCELL_X30_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qqhvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[19]~18_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & (!\soc_inst|ram_1|byte_select [2] & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select [2]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ))) ) )
+// \soc_inst|m0_1|u_logic|Qqhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[16]~30_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[16]~30_combout  )
 
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select [2]),
-	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[19]~18_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qqhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[19]~18 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[19]~18 .lut_mask = 64'h005F005F00500050;
-defparam \soc_inst|ram_1|data_to_memory[19]~18 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .lut_mask = 64'hFFFFFFFFCCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y9_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 (
-	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[19]~18_combout ,\soc_inst|ram_1|data_to_memory[11]~17_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X30_Y20_N7
+dffeas \soc_inst|m0_1|u_logic|Ydw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qqhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Ydw2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_bit_number = 11;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_bit_number = 11;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A6BA6001C08432C03F03C043B8E63B0C0300300300300300300300F0000000000000000644000000000000000000000000";
+defparam \soc_inst|m0_1|u_logic|Ydw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ydw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N18
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[19]~25 (
+// Location: LABCELL_X30_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~1 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[19]~25_combout  = ( \soc_inst|switches_1|switch_store[1][3]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
-// (\soc_inst|interconnect_1|HRDATA[20]~7_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][3]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & 
-// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][3]~q  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & 
-// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][3]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
-// !\soc_inst|interconnect_1|HRDATA[20]~7_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qdnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ydw2z4~q ) # ((!\soc_inst|m0_1|u_logic|Kyi2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
+//  & ( (!\soc_inst|m0_1|u_logic|Kyi2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datae(!\soc_inst|switches_1|switch_store[1][3]~q ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ydw2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[19]~25 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[19]~25 .lut_mask = 64'hC0C0C0CFCFC0CFCF;
-defparam \soc_inst|interconnect_1|HRDATA[19]~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .lut_mask = 64'h00F000F0AAFAAAFA;
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y9_N50
-dffeas \soc_inst|m0_1|u_logic|Jky2z4 (
+// Location: FF_X30_Y20_N44
+dffeas \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -81638,355 +82229,493 @@ dffeas \soc_inst|m0_1|u_logic|Jky2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jky2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jky2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~0 (
+// Location: LABCELL_X30_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E7nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & !\soc_inst|m0_1|u_logic|Jky2z4~q )) # (\soc_inst|interconnect_1|HRDATA[3]~26_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & !\soc_inst|m0_1|u_logic|Jky2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Qdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( (\soc_inst|interconnect_1|HRDATA[0]~32_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[0]~32_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E7nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .lut_mask = 64'hC0C0C0C0C0FFC0FF;
-defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vphvx4~0 (
+// Location: LABCELL_X30_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vphvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[19]~25_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[19]~25_combout  )
+// \soc_inst|m0_1|u_logic|Qdnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qdnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qdnvx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[16]~30_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qdnvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vphvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .lut_mask = 64'hFFFFFFFFAAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .lut_mask = 64'hFC00FC0000000000;
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y9_N59
-dffeas \soc_inst|m0_1|u_logic|Oiw2z4 (
+// Location: FF_X30_Y20_N43
+dffeas \soc_inst|m0_1|u_logic|Yzi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vphvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Oiw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Yzi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oiw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Oiw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yzi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yzi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~1 (
+// Location: LABCELL_X40_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Keiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q ) # ((!\soc_inst|m0_1|u_logic|Oiw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Oiw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Keiwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oiw2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E7nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
-defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~2 (
+// Location: LABCELL_X36_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Celwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Celwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Keiwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yzi2z4~q ) # (!\soc_inst|m0_1|u_logic|R1d2z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Keiwx4~0_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Celwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Celwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Celwx4~0 .lut_mask = 64'hF0F0F0F0F0D0F0D0;
+defparam \soc_inst|m0_1|u_logic|Celwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Celwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Celwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ocfwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Celwx4~0_combout  & ((\soc_inst|m0_1|u_logic|G27wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Ocfwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Celwx4~0_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Celwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Celwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Celwx4~1 .lut_mask = 64'h0F0F0F0F01030103;
+defparam \soc_inst|m0_1|u_logic|Celwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbfwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fbfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qem2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Qem2z4~q 
+// )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fbfwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .lut_mask = 64'h0000000000B70037;
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A2iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E7nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|E7nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|E7nvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[19]~25_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|A2iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|V2iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|V2iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E7nvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|A2iwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .lut_mask = 64'h0000F0F0AAAAFAFA;
+defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A2iwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A2iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|A2iwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Yzi2z4~q ) # (\soc_inst|m0_1|u_logic|E4iwx4~0_combout ))) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E7nvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A2iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .lut_mask = 64'h0333033300000000;
+defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y9_N49
-dffeas \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE (
+// Location: FF_X28_Y11_N37
+dffeas \soc_inst|m0_1|u_logic|Sjj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sjj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sjj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjswx4~0 (
+// Location: LABCELL_X33_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mvc2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fjswx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mvc2z4~combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjswx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mvc2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .lut_mask = 64'h008A00CC008A0000;
-defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mvc2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mvc2z4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Mvc2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Emewx4~0 (
+// Location: MLABCELL_X34_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Awc2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Emewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W7z2z4~q ) # ((!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Awc2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Awc2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Emewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Emewx4~0 .lut_mask = 64'hFFFFFFFFFFFCFFFC;
-defparam \soc_inst|m0_1|u_logic|Emewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .lut_mask = 64'h8A888A8888888888;
+defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvswx4~0 (
+// Location: LABCELL_X33_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vwc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wvswx4~0_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( \soc_inst|m0_1|u_logic|Emewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Vwc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Emi2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wvswx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .lut_mask = 64'h0000FFFF00002020;
-defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .lut_mask = 64'hA0F0A0F000000000;
+defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjswx4~1 (
+// Location: LABCELL_X35_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kuc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fjswx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fjswx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvswx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kuc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fjswx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wvswx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kuc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .lut_mask = 64'h2323000000000000;
-defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .lut_mask = 64'h00FF0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y9_N32
-dffeas \soc_inst|m0_1|u_logic|T1d3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Awc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Awc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Awc2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T1d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T1d3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .lut_mask = 64'hC0CCC0CCCCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L61xx4~0 (
+// Location: MLABCELL_X34_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kuc2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L61xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Kuc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Awc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Mvc2z4~combout  & 
+// !\soc_inst|m0_1|u_logic|Vwc2z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Awc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Mvc2z4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Awc2z4~1_combout  & !\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mvc2z4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Awc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Awc2z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .lut_mask = 64'h8000000088000000;
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xhbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q713z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # (!\soc_inst|m0_1|u_logic|Fn33z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Q713z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fn33z4~q ) # (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fn33z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q713z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L61xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L61xx4~0 .lut_mask = 64'h0C000C0000000000;
-defparam \soc_inst|m0_1|u_logic|L61xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .lut_mask = 64'h33FC33FC00FC00FC;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y9_N25
-dffeas \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE (
+// Location: FF_X33_Y12_N40
+dffeas \soc_inst|m0_1|u_logic|Wd23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wd23z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Wd23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wd23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wd23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y9_N14
-dffeas \soc_inst|m0_1|u_logic|Hq23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hq23z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xhbwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ow43z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (((\soc_inst|m0_1|u_logic|Wd23z4~q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|X563z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ow43z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((\soc_inst|m0_1|u_logic|Wd23z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|X563z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|X563z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wd23z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ow43z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hq23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hq23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .lut_mask = 64'h0189018923AB23AB;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y9_N23
-dffeas \soc_inst|m0_1|u_logic|Z853z4 (
+// Location: FF_X25_Y13_N1
+dffeas \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z853z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z853z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z853z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y13_N56
-dffeas \soc_inst|m0_1|u_logic|Knz2z4 (
+// Location: FF_X25_Y13_N23
+dffeas \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -81994,359 +82723,414 @@ dffeas \soc_inst|m0_1|u_logic|Knz2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Knz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Knz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Knz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~2 (
+// Location: LABCELL_X30_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zhyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Knz2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Z853z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Xhbwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Cmn2z4~q  & !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Cmn2z4~q ) # (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Cmn2z4~q  & !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Cmn2z4~q ) # (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z853z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Knz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cmn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .lut_mask = 64'hFF00FF000F550F55;
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .lut_mask = 64'hF5FFF555A0AAA000;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~1 (
+// Location: LABCELL_X30_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zhyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hq23z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hq23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .lut_mask = 64'h00C000F0A0000000;
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .lut_mask = 64'h0C4400000CCC0088;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y13_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz33z4~feeder (
+// Location: MLABCELL_X34_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qrnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qz33z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xhbwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .lut_mask = 64'h13DF02CE02CE02CE;
+defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asbvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Asbvx4~combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Donvx4~2_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Asbvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Asbvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Asbvx4 .lut_mask = 64'h0F8F0F0FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Asbvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~33 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~102  ))
+// \soc_inst|m0_1|u_logic|Add5~34  = CARRY(( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~102  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~102 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~34 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~33 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~33 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~18  ))
+// \soc_inst|m0_1|u_logic|Add2~34  = CARRY(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~18  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~18 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~33_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~34 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~33 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ulhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ulhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R8x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~33_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|R8x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add2~33_sumout )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add2~33_sumout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qz33z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ulhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz33z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qz33z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Qz33z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y13_N53
-dffeas \soc_inst|m0_1|u_logic|Qz33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qz33z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qz33z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qz33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .lut_mask = 64'h88808880AAA2AAA2;
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y13_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg13z4~feeder (
+// Location: LABCELL_X19_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ulhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yg13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Ulhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ulhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~97_sumout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (\soc_inst|m0_1|u_logic|Ulhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~97_sumout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ulhvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ulhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .lut_mask = 64'h00A800A800FC00FC;
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y13_N16
-dffeas \soc_inst|m0_1|u_logic|Yg13z4 (
+// Location: FF_X19_Y14_N28
+dffeas \soc_inst|m0_1|u_logic|R8x2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ulhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yg13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|R8x2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yg13z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X45_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Zhyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qz33z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) 
-// # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Yg13z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qz33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yg13z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .lut_mask = 64'h0000C00000008080;
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R8x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R8x2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4 (
+// Location: LABCELL_X19_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zhyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Q8ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zhyvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Zhyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Nlhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cax2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Add2~37_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Cax2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~37_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zhyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~37_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zhyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zhyvx4 .lut_mask = 64'hB000B00000000000;
-defparam \soc_inst|m0_1|u_logic|Zhyvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .lut_mask = 64'h88808880AAA2AAA2;
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~5 (
+// Location: LABCELL_X19_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~5_combout  = ( !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Nlhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (\soc_inst|m0_1|u_logic|Nlhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Vcuvx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (\soc_inst|m0_1|u_logic|Nlhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nlhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .lut_mask = 64'h0A0F0A0F080C080C;
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y9_N27
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[0]~27 (
-// Equation(s):
-// \soc_inst|ram_1|data_to_memory[0]~27_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|byte_select [0]) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select [0]) ) ) )
-
-	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datab(!\soc_inst|ram_1|byte_select [0]),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[0]~27_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y14_N16
+dffeas \soc_inst|m0_1|u_logic|Cax2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cax2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[0]~27 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[0]~27 .lut_mask = 64'h0000444411115555;
-defparam \soc_inst|ram_1|data_to_memory[0]~27 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cax2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cax2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N0
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[0]~32 (
+// Location: LABCELL_X29_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rxzvx4 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[0]~32_combout  = ( \soc_inst|switches_1|switch_store[0][0]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & 
-// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [0])))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][0]~q  & ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [0]))))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout  & (((\soc_inst|interconnect_1|HRDATA[1]~19_combout )))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][0]~q  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [0]))))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout  & (((!\soc_inst|interconnect_1|HRDATA[1]~19_combout )))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][0]~q  & 
-// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [0]))))) ) ) )
+// \soc_inst|m0_1|u_logic|Rxzvx4~combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~109_sumout  ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Add3~33_sumout  & (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Add3~33_sumout  & (((\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~33_sumout  & 
+// (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Add3~33_sumout  & (((\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~33_sumout  & (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Add3~33_sumout  & (((\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(!\soc_inst|switches_1|DataValid [0]),
-	.datac(!\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
-	.datae(!\soc_inst|switches_1|switch_store[0][0]~q ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add3~33_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[0]~32 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[0]~32 .lut_mask = 64'hA030AF30A03FAF3F;
-defparam \soc_inst|interconnect_1|HRDATA[0]~32 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rxzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rxzvx4 .lut_mask = 64'h053705370537FFFF;
+defparam \soc_inst|m0_1|u_logic|Rxzvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~q  & ( (\soc_inst|interconnect_1|HRDATA[0]~32_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[0]~32_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X29_Y14_N19
+dffeas \soc_inst|ram_1|saved_word_address[3] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|saved_word_address [3]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|saved_word_address[3] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N54
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[16]~25 (
+// Location: LABCELL_X29_Y13_N36
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[3]~3 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[16]~25_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( (!\soc_inst|ram_1|byte_select [2]) # (!\soc_inst|m0_1|u_logic|O24wx4~0_combout ) ) 
-// ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( (\soc_inst|ram_1|byte_select [2] & !\soc_inst|m0_1|u_logic|O24wx4~0_combout ) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[3]~3_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & (\soc_inst|m0_1|u_logic|Rxzvx4~combout )) # (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|saved_word_address [3]))) ) ) # ( 
+// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [3] ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|byte_select [2]),
-	.datac(!\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
-	.dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datab(!\soc_inst|ram_1|write_cycle~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.datad(!\soc_inst|ram_1|saved_word_address [3]),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[16]~25_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[3]~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[16]~25 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[16]~25 .lut_mask = 64'h000000003030FCFC;
-defparam \soc_inst|ram_1|data_to_memory[16]~25 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .lut_mask = 64'h00FF00FF0C3F0C3F;
+defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~1 (
+// Location: MLABCELL_X28_Y17_N48
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[21]~24 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Eacwx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & (!\soc_inst|m0_1|u_logic|P12wx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zhyvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Eacwx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|P12wx4~combout )) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zhyvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Eacwx4~9_combout  ) )
+// \soc_inst|ram_1|data_to_memory[21]~24_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & !\soc_inst|ram_1|byte_select[2]~DUPLICATE_q )) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ),
+	.datad(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[21]~24_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .lut_mask = 64'hFFFFF5A00000F5A0;
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[21]~24 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[21]~24 .lut_mask = 64'h0333033303000300;
+defparam \soc_inst|ram_1|data_to_memory[21]~24 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y4_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 (
+// Location: M10K_X26_Y12_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 (
 	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
@@ -82362,7 +83146,7 @@ cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 (
 	.clr0(gnd),
 	.clr1(gnd),
 	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[24]~26_combout ,\soc_inst|ram_1|data_to_memory[16]~25_combout }),
+	.portadatain({\soc_inst|ram_1|data_to_memory[21]~24_combout ,\soc_inst|ram_1|data_to_memory[5]~23_combout }),
 	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
 \soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
 \soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
@@ -82375,218 +83159,223 @@ cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_bit_number = 16;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_bit_number = 16;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E38E3802A23E655014404031284B128485485485485485485485401400000000000000A87D000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_bit_number = 5;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_bit_number = 5;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003FF6DFE14020000010004040000000000800800800800800800800401555555555555412000000505550000000000001550";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y8_N57
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[24]~26 (
+// Location: LABCELL_X22_Y20_N24
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[5]~23 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[24]~26_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select [3]) # ((\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ny3wx4~1_combout )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & (\soc_inst|ram_1|byte_select [3] & 
-// \soc_inst|m0_1|u_logic|Ny3wx4~1_combout ))) ) )
+// \soc_inst|ram_1|data_to_memory[5]~23_combout  = ( !\soc_inst|ram_1|byte_select [0] & ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ) ) ) ) # ( 
+// \soc_inst|ram_1|byte_select [0] & ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( !\soc_inst|ram_1|byte_select [0] & ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(!\soc_inst|ram_1|byte_select [3]),
-	.datad(!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|byte_select [0]),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[24]~26_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[5]~23_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[24]~26 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[24]~26 .lut_mask = 64'h0001000150515051;
-defparam \soc_inst|ram_1|data_to_memory[24]~26 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y9_N8
-dffeas \soc_inst|switches_1|switch_store[1][0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[0]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][0]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][0] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][0] .power_up = "low";
+defparam \soc_inst|ram_1|data_to_memory[5]~23 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[5]~23 .lut_mask = 64'h0303333303030000;
+defparam \soc_inst|ram_1|data_to_memory[5]~23 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N6
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[16]~30 (
+// Location: LABCELL_X19_Y17_N9
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[21]~29 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[16]~30_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & 
-// ((\soc_inst|switches_1|switch_store[1][0]~q ))) ) ) # ( !\soc_inst|interconnect_1|Equal1~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  
-// & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ))) ) )
+// \soc_inst|interconnect_1|HRDATA[21]~29_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
+// (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # ((\soc_inst|switches_1|switch_store[1][5]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( 
+// (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][5]~q )))) ) 
+// )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
-	.datad(!\soc_inst|switches_1|switch_store[1][0]~q ),
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[1][5]~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[16]~30 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[16]~30 .lut_mask = 64'h8D8D8D8D88DD88DD;
-defparam \soc_inst|interconnect_1|HRDATA[16]~30 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[21]~29 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[21]~29 .lut_mask = 64'hC0D1C0D1E2F3E2F3;
+defparam \soc_inst|interconnect_1|HRDATA[21]~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qqhvx4~0 (
+// Location: LABCELL_X19_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hphvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qqhvx4~0_combout  = ( !\soc_inst|interconnect_1|HRDATA[16]~30_combout  & ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( \soc_inst|interconnect_1|HRDATA[16]~30_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[16]~30_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Hphvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qqhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hphvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .lut_mask = 64'hFFFFFFFFFFFF0000;
-defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .lut_mask = 64'hFFFFFFFFFF00FF00;
+defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y9_N32
-dffeas \soc_inst|m0_1|u_logic|Ydw2z4 (
+// Location: FF_X19_Y17_N19
+dffeas \soc_inst|m0_1|u_logic|Qlw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qqhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hphvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ydw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qlw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ydw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ydw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qlw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qlw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~1 (
+// Location: LABCELL_X31_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qdnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Kyi2z4~q ) # ((\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & !\soc_inst|m0_1|u_logic|Ydw2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & !\soc_inst|m0_1|u_logic|Ydw2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Q6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qlw2z4~q ) # ((!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
+//  & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ydw2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qlw2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .lut_mask = 64'h33003300F3F0F3F0;
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .lut_mask = 64'h00F000F0CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~2 (
+// Location: LABCELL_X36_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qdnvx4~2_combout  = ( \soc_inst|interconnect_1|HRDATA[16]~30_combout  & ( !\soc_inst|m0_1|u_logic|Qdnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qdnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[16]~30_combout  & ( !\soc_inst|m0_1|u_logic|Qdnvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qdnvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Q6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Vapvx4~combout  & \soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Vapvx4~combout  & \soc_inst|interconnect_1|HRDATA[5]~28_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdnvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .lut_mask = 64'hAAAAA0A000000000;
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y9_N19
-dffeas \soc_inst|m0_1|u_logic|Yzi2z4 (
+// Location: LABCELL_X35_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Q6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q6nvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[21]~29_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Q6nvx4~1_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q6nvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .lut_mask = 64'hF0A0F0A000000000;
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y16_N11
+dffeas \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -82595,1772 +83384,1780 @@ dffeas \soc_inst|m0_1|u_logic|Yzi2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yzi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yzi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A2iwx4~0 (
+// Location: LABCELL_X42_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & 
+// ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .lut_mask = 64'h0C0C0C0CACAC0C0C;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( \soc_inst|m0_1|u_logic|U6wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~3_combout  & (!\soc_inst|m0_1|u_logic|U6wvx4~4_combout  & 
+// !\soc_inst|m0_1|u_logic|U6wvx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U6wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~3_combout  & (!\soc_inst|m0_1|u_logic|U6wvx4~4_combout  & 
+// !\soc_inst|m0_1|u_logic|U6wvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U6wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~3_combout  & (!\soc_inst|m0_1|u_logic|U6wvx4~4_combout  & 
+// !\soc_inst|m0_1|u_logic|U6wvx4~1_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U6wvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .lut_mask = 64'h8080808080800000;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A2iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|V2iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|J3iwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|J3iwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|U6wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & \soc_inst|m0_1|u_logic|Na6wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout  
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .lut_mask = 64'h00FF00FF000F000F;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3xvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q3xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ) 
+// ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A2iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q3xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .lut_mask = 64'h0A0A0A0AFF0AFF0A;
-defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .lut_mask = 64'h0000000020FF20FF;
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A2iwx4~1 (
+// Location: LABCELL_X37_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3xvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A2iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|A2iwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & ((\soc_inst|m0_1|u_logic|E4iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yzi2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Q3xvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Q3xvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rexvx4~0_combout )) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A2iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q3xvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .lut_mask = 64'h030F030F00000000;
-defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y7_N17
-dffeas \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .lut_mask = 64'hFF5FFF5F00000000;
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mvc2z4 (
+// Location: MLABCELL_X39_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mvc2z4~combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|U6wvx4~6_combout  = ( \soc_inst|m0_1|u_logic|J3xvx4~combout  & ( !\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U6wvx4~5_combout  & (!\soc_inst|m0_1|u_logic|U6wvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Q3xvx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~5_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|J3xvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mvc2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mvc2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mvc2z4 .lut_mask = 64'hAA00000000000000;
-defparam \soc_inst|m0_1|u_logic|Mvc2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .lut_mask = 64'h0000040400000000;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kuc2z4~1 (
+// Location: MLABCELL_X39_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Awc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mvc2z4~combout  & ( (!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Vwc2z4~0_combout  & \soc_inst|m0_1|u_logic|Awc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Awc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mvc2z4~combout  & ( (!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout  & !\soc_inst|m0_1|u_logic|Vwc2z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|U6wvx4~7_combout  = ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~q  & (\soc_inst|interconnect_1|HREADY~0_combout  & 
+// \soc_inst|m0_1|u_logic|Lu6wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Awc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Awc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mvc2z4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .lut_mask = 64'h8080008000000000;
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y11_N2
-dffeas \soc_inst|m0_1|u_logic|Qa43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qa43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qa43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qa43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .lut_mask = 64'h0F0F0F0F0F0F000C;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y11_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~0 (
+// Location: MLABCELL_X39_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qp62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qa43z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zj53z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ukpvx4~combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qa43z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zj53z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qp62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .lut_mask = 64'h0000000022300000;
-defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y8_N37
-dffeas \soc_inst|m0_1|u_logic|H133z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H133z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H133z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~1 (
+// Location: LABCELL_X37_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qp62z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yr13z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Hklwx4~1_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yr13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qp62z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .lut_mask = 64'h0D08000000000000;
-defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .lut_mask = 64'hC000C000C0FFC0FF;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~2 (
+// Location: LABCELL_X37_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qp62z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Lq03z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Rtz2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Z5wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wpkwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hklwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lq03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rtz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qp62z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .lut_mask = 64'h00000000D0800000;
-defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .lut_mask = 64'h000000000AFF0AFF;
+defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nr62z4~0 (
+// Location: LABCELL_X40_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nr62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Ytm2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|I3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Auk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Auk2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ytm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nr62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I3mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .lut_mask = 64'h0008000000000000;
-defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .lut_mask = 64'hF0F0FCFCA0A0A8A8;
+defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y11_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~3 (
+// Location: LABCELL_X42_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qp62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Qp62z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Nr62z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qp62z4~0_combout  & (!\soc_inst|m0_1|u_logic|Qp62z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mvm2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|K8wvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qp62z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mvm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qp62z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qp62z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nr62z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qp62z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K8wvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .lut_mask = 64'hA200000000000000;
-defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .lut_mask = 64'h0000000002020505;
+defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Euzvx4~0 (
+// Location: MLABCELL_X39_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Euzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( \soc_inst|m0_1|u_logic|Qp62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & !\soc_inst|m0_1|u_logic|U593z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svqwx4~combout  & ( \soc_inst|m0_1|u_logic|Qp62z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|U593z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Qp62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|U593z4~q ) 
-// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Qp62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|U593z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|K8wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Efp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U593z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qp62z4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K8wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .lut_mask = 64'hAAF3AAF3AAF3AAC0;
-defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hszvx4 (
+// Location: LABCELL_X40_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hszvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~53_sumout  & ( \soc_inst|m0_1|u_logic|Add5~37_sumout  & ( (((\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~53_sumout  & ( \soc_inst|m0_1|u_logic|Add5~37_sumout  & ( ((\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~53_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~37_sumout  & ( ((\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~53_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~37_sumout  & ( (\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vhwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ohwvx4~combout  & (((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~53_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vhwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hszvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hszvx4 .lut_mask = 64'h003355770F3F5F7F;
-defparam \soc_inst|m0_1|u_logic|Hszvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y5_N31
-dffeas \soc_inst|ram_1|saved_word_address[4] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [4]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[4] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[4] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .lut_mask = 64'h0455045500000000;
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y5_N27
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[4]~4 (
+// Location: LABCELL_X40_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhwvx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[4]~4_combout  = ( \soc_inst|m0_1|u_logic|Hszvx4~combout  & ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q ) # (\soc_inst|ram_1|saved_word_address [4]) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hszvx4~combout  & ( \soc_inst|ram_1|always1~0_combout  & ( (\soc_inst|ram_1|saved_word_address [4] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Hszvx4~combout  & ( !\soc_inst|ram_1|always1~0_combout  & ( 
-// \soc_inst|ram_1|saved_word_address [4] ) ) ) # ( !\soc_inst|m0_1|u_logic|Hszvx4~combout  & ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [4] ) ) )
+// \soc_inst|m0_1|u_logic|Vhwvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vhwvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ukpvx4~combout )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
 
-	.dataa(!\soc_inst|ram_1|saved_word_address [4]),
-	.datab(!\soc_inst|ram_1|write_cycle~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vhwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[4]~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .lut_mask = 64'h555555551111DDDD;
-defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .lut_mask = 64'hFFF5FFF500000000;
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N9
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[20]~16 (
+// Location: LABCELL_X42_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~2 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[20]~16_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select [2]) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( !\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|byte_select [2]) ) ) )
+// \soc_inst|m0_1|u_logic|K8wvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Vhwvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|K8wvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|K8wvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Qem2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datac(!\soc_inst|ram_1|byte_select [2]),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|K8wvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K8wvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[20]~16_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[20]~16 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[20]~16 .lut_mask = 64'h0303333300003030;
-defparam \soc_inst|ram_1|data_to_memory[20]~16 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X14_Y4_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[20]~16_combout ,\soc_inst|ram_1|data_to_memory[4]~15_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_bit_number = 4;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_bit_number = 4;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001DAD96D5546F162857A17955294AD6BDD9619619619619219219214A1555555555555553240400505005555555500001540";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .lut_mask = 64'h00000000F010F010;
+defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y8_N54
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[4]~15 (
+// Location: LABCELL_X42_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndwvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[4]~15_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ) # (\soc_inst|ram_1|byte_select [0]))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( (!\soc_inst|ram_1|byte_select [0] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Ndwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & (((\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & (\soc_inst|m0_1|u_logic|Pty2z4~q  & ((\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & (((\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & (\soc_inst|m0_1|u_logic|Pty2z4~q  & ((\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & (((\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Pty2z4~q  & ((\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|byte_select [0]),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
-	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[4]~15_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[4]~15 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[4]~15 .lut_mask = 64'h000C003F000C003F;
-defparam \soc_inst|ram_1|data_to_memory[4]~15 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .lut_mask = 64'h00000BBB0BBB0BBB;
+defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ophvx4~0 (
+// Location: LABCELL_X37_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ophvx4~0_combout  = ( \soc_inst|switches_1|switch_store[1][4]~q  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout ) # ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & 
-// !\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) # ( !\soc_inst|switches_1|switch_store[1][4]~q  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout ) # ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # 
-// ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ) # (\soc_inst|interconnect_1|Equal1~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|I3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|K1z2z4~q  & ( \soc_inst|m0_1|u_logic|Ndwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|K1z2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Ndwvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & !\soc_inst|m0_1|u_logic|I3mvx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|K1z2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Ndwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
-	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|switches_1|switch_store[1][4]~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I3mvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ndwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ophvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .lut_mask = 64'hFEFFFEFFFEEEFEEE;
-defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .lut_mask = 64'h000088884040CCCC;
+defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y9_N31
-dffeas \soc_inst|m0_1|u_logic|Ckw2z4 (
+// Location: FF_X37_Y9_N56
+dffeas \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ophvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ckw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ckw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ckw2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pxrvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pxrvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[20]~7_combout  & ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 )) # 
-// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][4]~q ))) ) ) )
-
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
-	.datab(!\soc_inst|switches_1|switch_store[1][4]~q ),
-	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pxrvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .lut_mask = 64'h0000000000005353;
-defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X6nvx4~0 (
+// Location: LABCELL_X37_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X6nvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pxrvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[4]~23_combout  & (((\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ))) # 
-// (\soc_inst|interconnect_1|HRDATA[4]~23_combout  & (!\soc_inst|m0_1|u_logic|Vapvx4~combout  & ((\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout )))) ) )
+// \soc_inst|m0_1|u_logic|E4xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pxrvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X6nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .lut_mask = 64'h32FA32FA00000000;
-defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X6nvx4~1 (
+// Location: LABCELL_X37_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V8yvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|X6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ckw2z4~q  & (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Owq2z4~q )))) 
-// # (\soc_inst|m0_1|u_logic|Ckw2z4~q  & (((!\soc_inst|m0_1|u_logic|Wfovx4~combout )) # (\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|V8yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & (\soc_inst|m0_1|u_logic|Auk2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & ((\soc_inst|m0_1|u_logic|I6z2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Auk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & \soc_inst|m0_1|u_logic|I6z2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ckw2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X6nvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V8yvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .lut_mask = 64'h00000000F351F351;
-defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y6_N31
-dffeas \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .lut_mask = 64'h0000050522222727;
+defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ctrwx4~0 (
+// Location: LABCELL_X43_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ctrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & (\soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & !\soc_inst|m0_1|u_logic|F0y2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  
-// & ( (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Nbm2z4~q  & (\soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & !\soc_inst|m0_1|u_logic|F0y2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|D6yvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Csewx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xly2z4~q  & ( !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ctrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D6yvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .lut_mask = 64'hFF10FF1010101010;
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .lut_mask = 64'h55FF111144FF0000;
+defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ctrwx4~1 (
+// Location: LABCELL_X40_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ctrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Surwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ((\soc_inst|m0_1|u_logic|Surwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|D6yvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Auk2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Auk2z4~q ) # (\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Icyvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D6yvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .lut_mask = 64'h7000700070707070;
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .lut_mask = 64'h0F0F0000AFAFAAAA;
+defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kghvx4~0 (
+// Location: LABCELL_X40_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6z2z4~q  & ( \soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ( \soc_inst|m0_1|u_logic|Ctrwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|I6z2z4~q  & ( \soc_inst|m0_1|u_logic|Qllwx4~4_combout 
-//  & ( (\soc_inst|m0_1|u_logic|Ctrwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Cllwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I6z2z4~q  & ( !\soc_inst|m0_1|u_logic|Qllwx4~4_combout  ) )
+// \soc_inst|m0_1|u_logic|D6yvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|D6yvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|G2lwx4~0_combout  & (!\soc_inst|m0_1|u_logic|D6yvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|V8yvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|C9yvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|V8yvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D6yvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D6yvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .lut_mask = 64'h0000FFFF050F0F0F;
-defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .lut_mask = 64'hA800A80000000000;
+defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y8_N13
-dffeas \soc_inst|m0_1|u_logic|I6z2z4 (
+// Location: FF_X28_Y10_N34
+dffeas \soc_inst|m0_1|u_logic|H3d3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I6z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H3d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H3d3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dghvx4~1 (
+// Location: LABCELL_X29_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sd1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dghvx4~1_combout  = ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( \soc_inst|m0_1|u_logic|I6z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W7z2z4~q  & 
-// ( \soc_inst|m0_1|u_logic|I6z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout  & (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ((\soc_inst|m0_1|u_logic|Cllwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qtrwx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|W7z2z4~q  & ( !\soc_inst|m0_1|u_logic|I6z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( !\soc_inst|m0_1|u_logic|I6z2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Cllwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout  & \soc_inst|m0_1|u_logic|Qllwx4~4_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .lut_mask = 64'h0030FFF00070FFF0;
-defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .lut_mask = 64'h0000000003000300;
+defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y8_N44
-dffeas \soc_inst|m0_1|u_logic|W7z2z4 (
+// Location: FF_X25_Y11_N56
+dffeas \soc_inst|m0_1|u_logic|U5r2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U5r2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W7z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W7z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U5r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5r2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uz9wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Uz9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & !\soc_inst|m0_1|u_logic|W7z2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( 
-// ((\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & !\soc_inst|m0_1|u_logic|W7z2z4~q )) # (\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
+// Location: FF_X23_Y11_N13
+dffeas \soc_inst|m0_1|u_logic|Bn53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bn53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bn53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bn53z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uz9wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y12_N46
+dffeas \soc_inst|m0_1|u_logic|Twz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Twz2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .lut_mask = 64'h50FF50FF50505050;
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Twz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Twz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uz9wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Uz9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) )
+// Location: FF_X29_Y12_N50
+dffeas \soc_inst|m0_1|u_logic|I7r2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I7r2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I7r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I7r2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y13_N5
+dffeas \soc_inst|m0_1|u_logic|Sd43z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sd43z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .lut_mask = 64'hCC440000CC44CC44;
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sd43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sd43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~37 (
+// Location: LABCELL_X29_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Cax2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~34  ))
-// \soc_inst|m0_1|u_logic|Add2~38  = CARRY(( !\soc_inst|m0_1|u_logic|Cax2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~34  ))
+// \soc_inst|m0_1|u_logic|Am5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sd43z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sd43z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|I7r2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|I7r2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sd43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~34 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~37_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~38 ),
+	.combout(\soc_inst|m0_1|u_logic|Am5wx4~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~37 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~37 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~37 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .lut_mask = 64'hAFAF0F0FF000F000;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~57 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~38  ))
-// \soc_inst|m0_1|u_logic|Add2~58  = CARRY(( !\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~38  ))
+// Location: FF_X22_Y12_N38
+dffeas \soc_inst|m0_1|u_logic|Nt03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nt03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nt03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nt03z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~38 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~57_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~58 ),
-	.shareout());
+// Location: FF_X22_Y12_N14
+dffeas \soc_inst|m0_1|u_logic|J433z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J433z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~57 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~57 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~57 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J433z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J433z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y13_N22
-dffeas \soc_inst|m0_1|u_logic|Nbx2z4 (
+// Location: FF_X27_Y10_N41
+dffeas \soc_inst|m0_1|u_logic|Av13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Av13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nbx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nbx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Av13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Av13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glhvx4~0 (
+// Location: LABCELL_X22_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Glhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nbx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Add2~57_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Nbx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~57_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Am5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nt03z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|J433z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Av13z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nt03z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|J433z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Av13z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~57_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nt03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J433z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Av13z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Am5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .lut_mask = 64'h88808880AAA2AAA2;
-defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .lut_mask = 64'hFFF0AACC00F0AACC;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glhvx4~1 (
+// Location: MLABCELL_X28_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Glhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~37_sumout  & \soc_inst|m0_1|u_logic|Glhvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Glhvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( !\soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Add5~37_sumout  & (\soc_inst|m0_1|u_logic|Glhvx4~0_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( !\soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Glhvx4~0_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Am5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Am5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Twz2z4~q  & \soc_inst|m0_1|u_logic|Am5wx4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Am5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Am5wx4~3_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Am5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Twz2z4~q  & (\soc_inst|m0_1|u_logic|Am5wx4~3_combout  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Am5wx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Am5wx4~3_combout  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Glhvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Twz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Am5wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Am5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .lut_mask = 64'h3030202033332222;
-defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .lut_mask = 64'h000A0008AA0AAA08;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y13_N23
-dffeas \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Am5wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|U5r2z4~q )))) # (\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & (\soc_inst|m0_1|u_logic|Bn53z4~q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5r2z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U5r2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bn53z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .lut_mask = 64'h8ACF000000000000;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y10_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkhvx4~1 (
+// Location: MLABCELL_X28_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[4] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Add5~81_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ycx2z4~q )))) # (\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Add2~53_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Ycx2z4~q ))))) # (\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o [4] = ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~53_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o [4]),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .lut_mask = 64'h5FFF57FF0AFF02FF;
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4zvx4~0 (
+// Location: MLABCELL_X28_Y17_N21
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[20]~16 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W4zvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Palwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Palwx4~0_combout ) ) ) )
+// \soc_inst|ram_1|data_to_memory[20]~16_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W4zvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[20]~16_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .lut_mask = 64'hF3F3F0F033330000;
-defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[20]~16 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[20]~16 .lut_mask = 64'h050005000F0A0F0A;
+defparam \soc_inst|ram_1|data_to_memory[20]~16 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4zvx4~1 (
+// Location: M10K_X41_Y13_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[20]~16_combout ,\soc_inst|ram_1|data_to_memory[4]~15_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_bit_number = 4;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_bit_number = 4;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001DAD96D5546F162857A17955294AD6BDD9619619619619219219214A1555555555555553240400505005555555500001540";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y20_N18
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[4]~15 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W4zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & !\soc_inst|m0_1|u_logic|W4zvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|W4zvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & (!\soc_inst|m0_1|u_logic|W4zvx4~0_combout  & \soc_inst|m0_1|u_logic|Wjyvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W4zvx4~0_combout  & \soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) )
+// \soc_inst|ram_1|data_to_memory[4]~15_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select [0]) # (\soc_inst|m0_1|u_logic|hwdata_o [4]))) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|hwdata_o [4] & \soc_inst|ram_1|byte_select [0])) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W4zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.datad(!\soc_inst|ram_1|byte_select [0]),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[4]~15_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .lut_mask = 64'h0C0C0808CCCC8888;
-defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[4]~15 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[4]~15 .lut_mask = 64'h0003000333033303;
+defparam \soc_inst|ram_1|data_to_memory[4]~15 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkhvx4~0 (
+// Location: LABCELL_X23_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ophvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|W4zvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|W4zvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|W4zvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|W4zvx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ophvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout ) # ((!\soc_inst|interconnect_1|Equal1~0_combout  & (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 )) # 
+// (\soc_inst|interconnect_1|Equal1~0_combout  & ((!\soc_inst|switches_1|switch_store[1][4]~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
+	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[1][4]~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ophvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .lut_mask = 64'h88A888A888A888AA;
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .lut_mask = 64'hFFFFFFFFEFEAEFEA;
+defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y10_N1
-dffeas \soc_inst|m0_1|u_logic|Ycx2z4 (
+// Location: FF_X23_Y20_N37
+dffeas \soc_inst|m0_1|u_logic|Ckw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ophvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ckw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ycx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ycx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ckw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ckw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z6ovx4 (
+// Location: LABCELL_X23_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pxrvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z6ovx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (((\soc_inst|m0_1|u_logic|Add3~45_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~45_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~45_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (\soc_inst|m0_1|u_logic|Add3~45_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Pxrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 )) # 
+// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][4]~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~45_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
+	.datac(!\soc_inst|switches_1|switch_store[1][4]~q ),
+	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pxrvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z6ovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z6ovx4 .lut_mask = 64'h11111F1F11FF1FFF;
-defparam \soc_inst|m0_1|u_logic|Z6ovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .lut_mask = 64'h0000000011051105;
+defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~3 (
+// Location: LABCELL_X23_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X6nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fvovx4~combout  & ( \soc_inst|m0_1|u_logic|Owovx4~combout  & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Owovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rxzvx4~combout  & (((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # (!\soc_inst|m0_1|u_logic|Ekovx4~combout )))) # (\soc_inst|m0_1|u_logic|Rxzvx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|Yuovx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # (!\soc_inst|m0_1|u_logic|Ekovx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fvovx4~combout  & ( !\soc_inst|m0_1|u_logic|Owovx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Rxzvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout  & ( !\soc_inst|m0_1|u_logic|Owovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ekovx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|X6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Pxrvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[4]~23_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Pxrvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xly2z4~q  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[4]~23_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pxrvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X6nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .lut_mask = 64'hAAA0AAAAEEE0AAAA;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .lut_mask = 64'h3232FAFA00000000;
+defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~1 (
+// Location: LABCELL_X35_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X6nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~1_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( (!\soc_inst|m0_1|u_logic|Vpovx4~combout  & (!\soc_inst|m0_1|u_logic|hsize_o~0_combout  & !\soc_inst|m0_1|u_logic|Hszvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|X6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|X6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Owq2z4~q  & (!\soc_inst|m0_1|u_logic|Wfovx4~combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ckw2z4~q )))) 
+// # (\soc_inst|m0_1|u_logic|Owq2z4~q  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ckw2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Vpovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ckw2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X6nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .lut_mask = 64'h00000000C000C000;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .lut_mask = 64'h00000000CF45CF45;
+defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~2 (
+// Location: FF_X35_Y16_N25
+dffeas \soc_inst|m0_1|u_logic|Xly2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xly2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xly2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ql0wx4~combout  & (\soc_inst|m0_1|u_logic|Nlovx4~1_combout  & !\soc_inst|m0_1|u_logic|Fq0wx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Rblwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nlovx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rblwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .lut_mask = 64'h0A000A0000000000;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .lut_mask = 64'h0050005000000000;
+defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~4 (
+// Location: LABCELL_X43_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~4_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Nlovx4~3_combout  & (\soc_inst|m0_1|u_logic|Y92wx4~combout  & \soc_inst|m0_1|u_logic|haddr_o~5_combout )) ) )
+// \soc_inst|m0_1|u_logic|Rblwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Enrwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rblwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Enrwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Rblwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Enrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rblwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Xly2z4~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nlovx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y92wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rblwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rblwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .lut_mask = 64'h0000000000030003;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .lut_mask = 64'hCC000000CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~6 (
+// Location: MLABCELL_X28_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~6_combout  = ( \soc_inst|m0_1|u_logic|Y1pvx4~combout  & ( \soc_inst|m0_1|u_logic|C70wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cqovx4~combout  & (\soc_inst|m0_1|u_logic|haddr_o~4_combout  & 
-// \soc_inst|m0_1|u_logic|Fc0wx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Rblwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rblwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|E4iwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & (((\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|E4iwx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C70wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rblwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .lut_mask = 64'h000000000000000A;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .lut_mask = 64'h000000000DDD0000;
+defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~5 (
+// Location: FF_X28_Y11_N25
+dffeas \soc_inst|m0_1|u_logic|Fgm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fgm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fgm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y12_N47
+dffeas \soc_inst|m0_1|u_logic|T583z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T583z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T583z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T583z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~5_combout  = ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( !\soc_inst|m0_1|u_logic|Xxovx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( !\soc_inst|m0_1|u_logic|Xxovx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xxovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|S4qvx4~combout ))) # (\soc_inst|m0_1|u_logic|Xxovx4~combout  & (!\soc_inst|m0_1|u_logic|Ekovx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Xxovx4~combout  & (!\soc_inst|m0_1|u_logic|S4qvx4~combout  & ((\soc_inst|m0_1|u_logic|Yuovx4~combout ) # (\soc_inst|m0_1|u_logic|Ekovx4~combout )))) # (\soc_inst|m0_1|u_logic|Xxovx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|Ekovx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Bdwwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|K0u2z4~q  & ( \soc_inst|m0_1|u_logic|T583z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K0u2z4~q  & ( !\soc_inst|m0_1|u_logic|T583z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K0u2z4~q  & ( !\soc_inst|m0_1|u_logic|T583z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|K0u2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T583z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .lut_mask = 64'h64E4E4E4AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .lut_mask = 64'h0202000202000000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~8 (
+// Location: LABCELL_X27_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Owovx4~combout  & ((!\soc_inst|m0_1|u_logic|Fvovx4~combout  & ((!\soc_inst|m0_1|u_logic|Yuovx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & !\soc_inst|m0_1|u_logic|Z6ovx4~combout )))) # (\soc_inst|m0_1|u_logic|Fvovx4~combout  & (!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout )))))) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|Owovx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) # (\soc_inst|m0_1|u_logic|Owovx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|S4qvx4~combout  & \soc_inst|m0_1|u_logic|Z6ovx4~combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Bdwwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Ka93z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|E1r2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ka93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|E1r2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .lut_mask = 64'hEC00CC00A00000C0;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .lut_mask = 64'h0000050000000404;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~0 (
+// Location: MLABCELL_X28_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bv0wx4~combout  & (\soc_inst|m0_1|u_logic|Nlovx4~8_combout  & \soc_inst|m0_1|u_logic|Nhzvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Bdwwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|T9v2z4~q  & ( \soc_inst|m0_1|u_logic|S2r2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T9v2z4~q  & ( !\soc_inst|m0_1|u_logic|S2r2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T9v2z4~q  & ( !\soc_inst|m0_1|u_logic|S2r2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nlovx4~8_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vezvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T9v2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S2r2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .lut_mask = 64'h00000000000A000A;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .lut_mask = 64'h1010100000100000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~7 (
+// Location: LABCELL_X27_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~7_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (\soc_inst|m0_1|u_logic|Nlovx4~4_combout  & (\soc_inst|m0_1|u_logic|Nlovx4~6_combout  & 
-// \soc_inst|m0_1|u_logic|Nlovx4~5_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Bdwwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G4r2z4~q  & ( \soc_inst|m0_1|u_logic|Kw63z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G4r2z4~q  & ( !\soc_inst|m0_1|u_logic|Kw63z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G4r2z4~q  & ( !\soc_inst|m0_1|u_logic|Kw63z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nlovx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nlovx4~6_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~5_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nlovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|G4r2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kw63z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .lut_mask = 64'h0000000000000011;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .lut_mask = 64'h00A0002000800000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jknvx4~0 (
+// Location: LABCELL_X30_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & (!\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|Lz93z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Yuovx4~combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Lz93z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( 
-// ((!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Lz93z4~q )) # (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|Bdwwx4~combout  = ( !\soc_inst|m0_1|u_logic|Bdwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bdwwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Bdwwx4~1_combout  & !\soc_inst|m0_1|u_logic|Bdwwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bdwwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bdwwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bdwwx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .lut_mask = 64'h55DD55DD50DC50DC;
-defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X17_Y5_N25
-dffeas \soc_inst|m0_1|u_logic|Lz93z4 (
+// Location: FF_X23_Y11_N14
+dffeas \soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lz93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lz93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N1uvx4 (
+// Location: LABCELL_X23_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N1uvx4~combout  = ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|Kop2z4~q  & (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Mjl2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|C372z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sd43z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sd43z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|C372z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N1uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N1uvx4 .lut_mask = 64'h0004000400000000;
-defparam \soc_inst|m0_1|u_logic|N1uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~0 .lut_mask = 64'h0000000000A00088;
+defparam \soc_inst|m0_1|u_logic|C372z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y12_N2
-dffeas \soc_inst|m0_1|u_logic|H8l2z4 (
+// Location: FF_X22_Y12_N13
+dffeas \soc_inst|m0_1|u_logic|J433z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J433z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H8l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H8l2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X22_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|S9ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mjl2z4~q  & !\soc_inst|m0_1|u_logic|Lz93z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & (((\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Lz93z4~q ))) # (\soc_inst|m0_1|u_logic|Mjl2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Lz93z4~q  & ((\soc_inst|m0_1|u_logic|Cps2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S9ywx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .lut_mask = 64'h000000002A3B4444;
-defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J433z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J433z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~1 (
+// Location: LABCELL_X23_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S9ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Azs2z4~q  & (!\soc_inst|m0_1|u_logic|S9ywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # (!\soc_inst|m0_1|u_logic|K3uvx4~0_combout )))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|E0uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|S9ywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # (!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|C372z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|J433z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Av13z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|S9ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Av13z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|J433z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S9ywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C372z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .lut_mask = 64'hEE00EE00E000E000;
-defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~1 .lut_mask = 64'h0000808000008800;
+defparam \soc_inst|m0_1|u_logic|C372z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~2 (
+// Location: MLABCELL_X25_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z472z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S9ywx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wfuwx4~combout  & ( \soc_inst|m0_1|u_logic|S9ywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q  & ((!\soc_inst|m0_1|u_logic|H8l2z4~q ) # (!\soc_inst|m0_1|u_logic|K7pwx4~combout ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Wfuwx4~combout  & ( \soc_inst|m0_1|u_logic|S9ywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H8l2z4~q ) # (!\soc_inst|m0_1|u_logic|K7pwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Z472z4~0_combout  = ( !\soc_inst|m0_1|u_logic|U5r2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S9ywx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|U5r2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S9ywx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z472z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .lut_mask = 64'h00000000FAFAC8C8;
-defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z472z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z472z4~0 .lut_mask = 64'h1000000000000000;
+defparam \soc_inst|m0_1|u_logic|Z472z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Otxwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Otxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S9ywx4~2_combout  & ( (\soc_inst|m0_1|u_logic|N1uvx4~combout  & (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|Bjd3z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S9ywx4~2_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S9ywx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Otxwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y12_N47
+dffeas \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .lut_mask = 64'h0F0F0F0F00030003;
-defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Palwx4~0 (
+// Location: LABCELL_X22_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Palwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (((!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & \soc_inst|m0_1|u_logic|Lcowx4~0_combout )) # (\soc_inst|interconnect_1|HRDATA[31]~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & \soc_inst|m0_1|u_logic|Lcowx4~0_combout )) # (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|C372z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nt03z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nt03z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nt03z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Otxwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nt03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C372z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Palwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Palwx4~0 .lut_mask = 64'h5D5D5D5D5DFF5DFF;
-defparam \soc_inst|m0_1|u_logic|Palwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~2 .lut_mask = 64'h0088008000080000;
+defparam \soc_inst|m0_1|u_logic|C372z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kswwx4~0 (
+// Location: LABCELL_X29_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kswwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fij2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|C372z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Z472z4~0_combout  & ( !\soc_inst|m0_1|u_logic|C372z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|C372z4~0_combout  & (!\soc_inst|m0_1|u_logic|C372z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|I7r2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|C372z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I7r2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C372z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z472z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C372z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kswwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C372z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|C372z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y13_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttwwx4~0 (
+// Location: LABCELL_X30_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tpnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ttwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|C3w2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Wxp2z4~q  & !\soc_inst|m0_1|u_logic|C3w2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C372z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Bdwwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C372z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C372z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ovc3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C372z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ovc3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|C372z4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .lut_mask = 64'h8F008F0F8F008F0F;
-defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .lut_mask = 64'hFC0CFC0CFF0FFA0A;
+defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8nwx4~0 (
+// Location: LABCELL_X30_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yuovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B8nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U2ewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Yuovx4~combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~97_sumout  ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~97_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Add3~25_sumout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~97_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// (\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|Add3~25_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~97_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Add3~25_sumout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add3~25_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B8nwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .lut_mask = 64'hF000F000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yuovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yuovx4 .lut_mask = 64'h053705370537FFFF;
+defparam \soc_inst|m0_1|u_logic|Yuovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8nwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kswwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout  & \soc_inst|m0_1|u_logic|Wxp2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wxp2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kswwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y14_N43
+dffeas \soc_inst|ram_1|saved_word_address[2] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|saved_word_address [2]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .lut_mask = 64'h00000000FEFECE00;
-defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|saved_word_address[2] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~2 (
+// Location: LABCELL_X29_Y13_N15
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[2]~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & !\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  ) )
+// \soc_inst|ram_1|memory.raddr_a[2]~2_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yuovx4~combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// (\soc_inst|ram_1|saved_word_address [2])) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [2] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.dataa(!\soc_inst|ram_1|saved_word_address [2]),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aihvx4~2_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[2]~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .lut_mask = 64'h00000000FFFFA0A0;
-defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .lut_mask = 64'h555555550F550F55;
+defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~1 (
+// Location: MLABCELL_X25_Y15_N18
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xsx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) 
-// # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xsx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xsx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # 
-// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xsx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) )
+// \soc_inst|interconnect_1|HRDATA[7]~11_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
+// (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # ((\soc_inst|switches_1|switch_store[0][7]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( 
+// (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[0][7]~q )))) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add2~21_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[0][7]~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aihvx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .lut_mask = 64'hC8C8FBFBC800FB00;
-defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[7]~11 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[7]~11 .lut_mask = 64'hC0D1C0D1E2F3E2F3;
+defparam \soc_inst|interconnect_1|HRDATA[7]~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Aihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aihvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Aihvx4~2_combout ) # 
-// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Qfzvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aihvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Aihvx4~2_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aihvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Aihvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y16_N2
+dffeas \soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .lut_mask = 64'h0000F0000000F010;
-defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y14_N56
-dffeas \soc_inst|m0_1|u_logic|Xsx2z4 (
+// Location: FF_X28_Y18_N28
+dffeas \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -84369,477 +85166,507 @@ dffeas \soc_inst|m0_1|u_logic|Xsx2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xsx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xsx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~13 (
+// Location: MLABCELL_X28_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~18  ))
-// \soc_inst|m0_1|u_logic|Add3~14  = CARRY(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~18  ))
+// \soc_inst|m0_1|u_logic|Wywwx4~0_combout  = ( \soc_inst|m0_1|u_logic|X0c3z4~q  & ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X0c3z4~q  & ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|X0c3z4~q  & ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~18 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~13_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~14 ),
+	.combout(\soc_inst|m0_1|u_logic|Wywwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~13 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .lut_mask = 64'h000033330F0F3F3F;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V2qvx4 (
+// Location: MLABCELL_X28_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V2qvx4~combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~13_sumout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~13_sumout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Wywwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kkb3z4~q  & ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|E0uvx4~combout  & (!\soc_inst|m0_1|u_logic|Tib3z4~q  & !\soc_inst|m0_1|u_logic|Wywwx4~0_combout )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Kkb3z4~q  & ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tib3z4~q  & !\soc_inst|m0_1|u_logic|Wywwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Kkb3z4~q  & ( !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|E0uvx4~combout  & !\soc_inst|m0_1|u_logic|Wywwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkb3z4~q  & ( !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( !\soc_inst|m0_1|u_logic|Wywwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~13_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wywwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wywwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V2qvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V2qvx4 .lut_mask = 64'hF0FFA0AAC0CC8088;
-defparam \soc_inst|m0_1|u_logic|V2qvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .lut_mask = 64'hF0F0A0A0C0C08080;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khnvx4~0 (
+// Location: MLABCELL_X28_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & \soc_inst|m0_1|u_logic|Idk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Ohh3z4~q 
-// ) # ((\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & \soc_inst|m0_1|u_logic|Idk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Wywwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wywwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nfb3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & (\soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nfb3z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nfb3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wywwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wywwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .lut_mask = 64'hF0F3F0F300330033;
-defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .lut_mask = 64'h00000000A2F3A2F3;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khnvx4~1 (
+// Location: LABCELL_X27_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|V2qvx4~combout  & ( !\soc_inst|m0_1|u_logic|Khnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Jux2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V2qvx4~combout  & ( !\soc_inst|m0_1|u_logic|Khnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Jux2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wywwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|N1uvx4~combout  & ( (\soc_inst|m0_1|u_logic|Wywwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|K7pwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|N1uvx4~combout  & ( (\soc_inst|m0_1|u_logic|Wywwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|K7pwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|N1uvx4~combout  & ( (\soc_inst|m0_1|u_logic|Wywwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|K7pwx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Khnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wywwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wywwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .lut_mask = 64'hA0F0AAFF00000000;
-defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .lut_mask = 64'h3232323232320000;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y4_N40
-dffeas \soc_inst|m0_1|u_logic|Ohh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ohh3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G9lwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G9lwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # 
+// (!\soc_inst|interconnect_1|HRDATA[7]~11_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wywwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ohh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .lut_mask = 64'hE000E0E0EE00EEEE;
+defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~2 (
+// Location: MLABCELL_X21_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N662z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sl03z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Yoz2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|W4zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Palwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Palwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sl03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yoz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N662z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W4zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N662z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N662z4~2 .lut_mask = 64'h0000000088A00000;
-defparam \soc_inst|m0_1|u_logic|N662z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .lut_mask = 64'hF5F0F5F055005500;
+defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y5_N41
-dffeas \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W4zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W4zvx4~0_combout  & !\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|W4zvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4zvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Omyvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4zvx4~0_combout  & \soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|W4zvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .lut_mask = 64'h22222200AAAAAA00;
+defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y4_N10
-dffeas \soc_inst|m0_1|u_logic|Bk13z4 (
+// Location: FF_X18_Y14_N14
+dffeas \soc_inst|m0_1|u_logic|Ycx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bk13z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bk13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ycx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bk13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ycx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ycx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y4_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~1 (
+// Location: LABCELL_X18_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N662z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Bk13z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kt23z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Zkhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Add5~81_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ycx2z4~q )))) # (\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Add2~53_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Ycx2z4~q ))))) # (\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bk13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kt23z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~53_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N662z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N662z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N662z4~1 .lut_mask = 64'h0000000088A00000;
-defparam \soc_inst|m0_1|u_logic|N662z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .lut_mask = 64'h3FFF37FF0CFF04FF;
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K862z4~0 (
+// Location: LABCELL_X18_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K862z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ymo2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zkhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|W4zvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|W4zvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ymo2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K862z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K862z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K862z4~0 .lut_mask = 64'h0000000020000000;
-defparam \soc_inst|m0_1|u_logic|K862z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .lut_mask = 64'hAAFFAAAB00000000;
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y4_N26
-dffeas \soc_inst|m0_1|u_logic|Cc53z4 (
+// Location: FF_X18_Y14_N13
+dffeas \soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cc53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cc53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~0 (
+// Location: LABCELL_X29_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4qvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N662z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|T243z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cc53z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|S4qvx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~81_sumout  & ( \soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|Add3~49_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( \soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Add3~49_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~81_sumout  & ( !\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Add3~49_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( !\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Add3~49_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cc53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T243z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add3~49_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N662z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N662z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N662z4~0 .lut_mask = 64'h000000000000E020;
-defparam \soc_inst|m0_1|u_logic|N662z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S4qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S4qvx4 .lut_mask = 64'h050505FF373737FF;
+defparam \soc_inst|m0_1|u_logic|S4qvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~3 (
+// Location: LABCELL_X30_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Elnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N662z4~3_combout  = ( !\soc_inst|m0_1|u_logic|K862z4~0_combout  & ( !\soc_inst|m0_1|u_logic|N662z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N662z4~2_combout  & (!\soc_inst|m0_1|u_logic|N662z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Elnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fvovx4~combout ))) # (\soc_inst|m0_1|u_logic|S4qvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fvovx4~combout )) # (\soc_inst|m0_1|u_logic|S4qvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( !\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N662z4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N662z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K862z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N662z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N662z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Elnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N662z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N662z4~3 .lut_mask = 64'hA200000000000000;
-defparam \soc_inst|m0_1|u_logic|N662z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .lut_mask = 64'h0000CCCCFF5FFFDF;
+defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrnvx4~0 (
+// Location: FF_X30_Y15_N19
+dffeas \soc_inst|m0_1|u_logic|J6i2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Elnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J6i2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J6i2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eruwx4~combout  & ( \soc_inst|m0_1|u_logic|N662z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) # (\soc_inst|m0_1|u_logic|Cqo2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout  & ( \soc_inst|m0_1|u_logic|N662z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Cqo2z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Eruwx4~combout  & ( !\soc_inst|m0_1|u_logic|N662z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Cqo2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout  & ( !\soc_inst|m0_1|u_logic|N662z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Cqo2z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qfc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( \soc_inst|m0_1|u_logic|Qfc3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Qfc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N662z4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .lut_mask = 64'h2722272227222777;
-defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .lut_mask = 64'h0CFC0CFC00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~9 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Vvx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~14  ))
-// \soc_inst|m0_1|u_logic|Add3~10  = CARRY(( !\soc_inst|m0_1|u_logic|Vvx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~14  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~14 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~9_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~10 ),
-	.shareout());
+// Location: FF_X21_Y18_N32
+dffeas \soc_inst|m0_1|u_logic|Qfc3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~9 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o[29] (
+// Location: MLABCELL_X21_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o [29] = ( \soc_inst|m0_1|u_logic|Add3~9_sumout  & ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~9_sumout  & ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~9_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~9_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|I90xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qfc3z4~q ) # (!\soc_inst|m0_1|u_logic|Hub3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~9_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.combout(\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o[29] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o[29] .lut_mask = 64'hF3F3A2A2F300A200;
-defparam \soc_inst|m0_1|u_logic|haddr_o[29] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~0 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|I90xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~2 (
+// Location: LABCELL_X22_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvzwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S6ovx4~2_combout  = ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (!\soc_inst|m0_1|u_logic|haddr_o [29] & (\soc_inst|m0_1|u_logic|V2qvx4~combout  & \soc_inst|m0_1|u_logic|haddr_o~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Wvzwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|I90xx4~0_combout  & \soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|haddr_o [29]),
-	.datac(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .lut_mask = 64'h000C000C00000000;
-defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .lut_mask = 64'h0000000003030000;
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~3 (
+// Location: LABCELL_X23_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2zwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S6ovx4~3_combout  = ( \soc_inst|m0_1|u_logic|S6ovx4~1_combout  & ( (\soc_inst|m0_1|u_logic|U5qvx4~combout  & \soc_inst|m0_1|u_logic|S6ovx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|G2zwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wvzwx4~1_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U5qvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X17_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nmnvx4~0 (
+// Location: LABCELL_X23_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N4rvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nmnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & (!\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|Mjl2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Mjl2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( 
-// ((!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Mjl2z4~q )) # (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|N4rvx4~0_combout  = ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .lut_mask = 64'h55DD55DD50DC50DC;
-defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .lut_mask = 64'h00E000EE00FF00FF;
+defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X17_Y5_N28
-dffeas \soc_inst|m0_1|u_logic|Mjl2z4 (
+// Location: FF_X34_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|Gtp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -84848,195 +85675,161 @@ dffeas \soc_inst|m0_1|u_logic|Mjl2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gtp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mjl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mjl2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y9_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B7owx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|B7owx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & \soc_inst|m0_1|u_logic|F4nvx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B7owx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B7owx4 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|B7owx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pjyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # ((\soc_inst|m0_1|u_logic|Gdo2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|I7owx4~combout  & (\soc_inst|m0_1|u_logic|Xeo2z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Gdo2z4~q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gdo2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .lut_mask = 64'h8CAF8CAF00000000;
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gtp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gtp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~2 (
+// Location: MLABCELL_X34_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pjyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|U18wx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|interconnect_1|HRDATA[16]~30_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|U18wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Mbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[3]~26_combout  & ((!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & (!\soc_inst|interconnect_1|HRDATA[3]~26_combout  & 
+// ((!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pjyvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .lut_mask = 64'h00000000CF8ACF8A;
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .lut_mask = 64'hD0D0DDDDD000DD00;
+defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9pvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|F9pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F9pvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X34_Y19_N1
+dffeas \soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .lut_mask = 64'h000B0B0B00BBBBBB;
-defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9pvx4~1 (
+// Location: MLABCELL_X25_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L8mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F9pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|F9pvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Lstwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|F9pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|L8mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Cam2z4~q  & ( !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|F9pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .lut_mask = 64'h000000005F5F4F4F;
-defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .lut_mask = 64'h88F8DDFD00F055F5;
+defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkyvx4~1 (
+// Location: FF_X25_Y20_N49
+dffeas \soc_inst|m0_1|u_logic|Cam2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cam2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cam2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mekvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Mekvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & \soc_inst|m0_1|u_logic|Cam2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Xx93z4~q 
+// ) # ((\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & \soc_inst|m0_1|u_logic|Cam2z4~q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xx93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mekvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .lut_mask = 64'h0F0F0F0F0F000F00;
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .lut_mask = 64'hF0F5F0F500550055;
+defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ocnvx4~0 (
+// Location: LABCELL_X36_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mekvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ocnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|m0_1|u_logic|F9pvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Kkyvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q )))) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Mekvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ekovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mekvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|G7x2z4~q 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ekovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mekvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|G7x2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkyvx4~1_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mekvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .lut_mask = 64'h5F130F030F030F03;
-defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .lut_mask = 64'hA0F0A0F080C080C0;
+defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y14_N13
-dffeas \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE (
+// Location: FF_X36_Y12_N40
+dffeas \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -85045,283 +85838,402 @@ dffeas \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7mvx4~0 (
+// Location: FF_X31_Y10_N38
+dffeas \soc_inst|m0_1|u_logic|X6m2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X6m2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X6m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X6m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X31_Y10_N56
+dffeas \soc_inst|m0_1|u_logic|Ow13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ow13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ow13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y8_N49
+dffeas \soc_inst|m0_1|u_logic|X533z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X533z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X533z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X533z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X7mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S4w2z4~q  & ( \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J5vvx4~combout  & (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Y9t2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4w2z4~q  & ( \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J5vvx4~combout  & (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Y9t2z4~q  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|S4w2z4~q  & ( !\soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J5vvx4~combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|D7bwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ow13z4~q  & ( \soc_inst|m0_1|u_logic|X533z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ow13z4~q  & ( !\soc_inst|m0_1|u_logic|X533z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ow13z4~q  & ( !\soc_inst|m0_1|u_logic|X533z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J5vvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ow13z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X533z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X7mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7bwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .lut_mask = 64'h0000000500100015;
-defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .lut_mask = 64'h4040004040000000;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7mvx4~1 (
+// Location: LABCELL_X31_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hyz2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X7mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I6w2z4~q  & ( \soc_inst|m0_1|u_logic|X7mvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I6w2z4~q  & ( \soc_inst|m0_1|u_logic|X7mvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|I6w2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|X7mvx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Hyz2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|I30wx4~2_combout  )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|I6w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|X7mvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X7mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hyz2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .lut_mask = 64'h0000FAFAFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Hyz2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y8_N19
-dffeas \soc_inst|m0_1|u_logic|I6w2z4 (
+// Location: FF_X31_Y10_N25
+dffeas \soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|X7mvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hyz2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I6w2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I6w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~1 (
+// Location: FF_X25_Y14_N5
+dffeas \soc_inst|m0_1|u_logic|Bv03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bv03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bv03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bv03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( \soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( \soc_inst|m0_1|u_logic|J4x2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( !\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( \soc_inst|m0_1|u_logic|J4x2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|D7bwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Bv03z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bv03z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bv03z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bv03z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F5mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7bwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .lut_mask = 64'h333300003333AAAA;
-defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .lut_mask = 64'h5000000040004000;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~2 (
+// Location: LABCELL_X36_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5m2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F5mvx4~2_combout  = ( \soc_inst|m0_1|u_logic|U5x2z4~q  & ( \soc_inst|m0_1|u_logic|F5mvx4~1_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|F5mvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U5x2z4~q  & ( \soc_inst|m0_1|u_logic|F5mvx4~1_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|F5mvx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|U5x2z4~q  & ( !\soc_inst|m0_1|u_logic|F5mvx4~1_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|J5m2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|I30wx4~2_combout  )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U5x2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|F5mvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F5mvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .lut_mask = 64'h0000FAFA1111FBFB;
-defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y7_N55
-dffeas \soc_inst|m0_1|u_logic|U5x2z4 (
+// Location: FF_X36_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|J5m2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|F5mvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U5x2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J5m2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U5x2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J5m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5m2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y14_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lefwx4~0 (
+// Location: LABCELL_X37_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lefwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z5pvx4~4_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|U5x2z4~q ))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|I6w2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|A9bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|J5m2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I6w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|U5x2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J5m2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A9bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .lut_mask = 64'h01510000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .lut_mask = 64'h0000000000008000;
+defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlhvx4~0 (
+// Location: FF_X25_Y14_N26
+dffeas \soc_inst|m0_1|u_logic|Gf43z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gf43z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gf43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y8_N59
+dffeas \soc_inst|m0_1|u_logic|Po53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Po53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~37_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Cax2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~37_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Cax2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|D7bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Gf43z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Po53z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add2~37_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gf43z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Po53z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .lut_mask = 64'h8A8A8A8A8A028A02;
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .lut_mask = 64'h0000000000D80000;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlhvx4~1 (
+// Location: LABCELL_X31_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Nlhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nlhvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Nlhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & !\soc_inst|m0_1|u_logic|Xdfwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Nlhvx4~0_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|D7bwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|A9bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D7bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D7bwx4~1_combout  & (!\soc_inst|m0_1|u_logic|D7bwx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|X6m2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nlhvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X6m2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D7bwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D7bwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|A9bwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D7bwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7bwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .lut_mask = 64'h3030300033333300;
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y13_N50
-dffeas \soc_inst|m0_1|u_logic|Cax2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cax2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aqnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( \soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jw93z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( \soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jw93z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( !\soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jw93z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( !\soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Jw93z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D7bwx4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cax2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cax2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .lut_mask = 64'hCACFCACFCACFCAC0;
+defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rxzvx4 (
+// Location: LABCELL_X29_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rxzvx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (((\soc_inst|m0_1|u_logic|Add3~33_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~33_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~33_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (\soc_inst|m0_1|u_logic|Add3~33_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ekovx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~33_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~29_sumout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~33_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~29_sumout )) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~33_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~29_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~33_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~29_sumout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~33_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
 	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add3~29_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ekovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rxzvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rxzvx4 .lut_mask = 64'h0505373705FF37FF;
-defparam \soc_inst|m0_1|u_logic|Rxzvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ekovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekovx4 .lut_mask = 64'h000F333F555F777F;
+defparam \soc_inst|m0_1|u_logic|Ekovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y5_N55
-dffeas \soc_inst|ram_1|saved_word_address[3] (
+// Location: FF_X29_Y15_N31
+dffeas \soc_inst|ram_1|saved_word_address[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Ekovx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -85330,2819 +86242,2662 @@ dffeas \soc_inst|ram_1|saved_word_address[3] (
 	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [3]),
+	.q(\soc_inst|ram_1|saved_word_address [1]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[3] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[3] .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[1] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N24
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[3]~3 (
+// Location: LABCELL_X29_Y13_N18
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[1]~1 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[3]~3_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & (\soc_inst|m0_1|u_logic|Rxzvx4~combout )) # (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|saved_word_address [3]))) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [3] ) )
+// \soc_inst|ram_1|memory.raddr_a[1]~1_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & (\soc_inst|m0_1|u_logic|Ekovx4~combout )) # (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|saved_word_address [1]))) ) ) # ( 
+// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [1] ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(!\soc_inst|ram_1|saved_word_address [3]),
+	.datab(!\soc_inst|ram_1|write_cycle~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datad(!\soc_inst|ram_1|saved_word_address [1]),
 	.datae(gnd),
 	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[3]~3_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[1]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .lut_mask = 64'h00FF00FF303F303F;
-defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .lut_mask = 64'h00FF00FF0C3F0C3F;
+defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N3
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[22]~31 (
+// Location: LABCELL_X19_Y16_N15
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[17]~10 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[22]~31_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select [2]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22  & !\soc_inst|ram_1|byte_select [2])) ) )
+// \soc_inst|ram_1|data_to_memory[17]~10_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & ( (!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) 
+// ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( !\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & ( (\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ),
-	.datad(!\soc_inst|ram_1|byte_select [2]),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[22]~31_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[17]~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[22]~31 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[22]~31 .lut_mask = 64'h0300030003330333;
-defparam \soc_inst|ram_1|data_to_memory[22]~31 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[17]~10 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[17]~10 .lut_mask = 64'h005500FF000000AA;
+defparam \soc_inst|ram_1|data_to_memory[17]~10 .shared_arith = "off";
 // synopsys translate_on
-
-// Location: M10K_X14_Y8_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 (
-	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[22]~31_combout ,\soc_inst|ram_1|data_to_memory[6]~32_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_bit_number = 6;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_bit_number = 6;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003FFFFB63C12700003100C0E0000000000A00A00A00A00A00A00A00D03FFFFFFFFFFFFC32000551000000000000000001554";
+
+// Location: M10K_X14_Y12_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[17]~10_combout ,\soc_inst|ram_1|data_to_memory[9]~9_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_bit_number = 9;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_bit_number = 9;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000396D9EC5014763FC5AF14D427C1F07C9D0710710710710710710717F1555555555555553706000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y8_N51
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[6]~32 (
+// Location: LABCELL_X19_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jqhvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[6]~32_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ) # (\soc_inst|ram_1|byte_select [0]))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (!\soc_inst|ram_1|byte_select [0] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout )) ) )
+// \soc_inst|m0_1|u_logic|Jqhvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout ) # ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((\soc_inst|interconnect_1|Equal1~0_combout  & 
+// !\soc_inst|switches_1|switch_store[1][1]~q ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( (!\soc_inst|interconnect_1|Equal1~0_combout ) # ((!\soc_inst|interconnect_1|HRDATA[20]~7_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|switches_1|switch_store[1][1]~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|byte_select [0]),
-	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[1][1]~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[6]~32_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jqhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[6]~32 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[6]~32 .lut_mask = 64'h000C030F000C030F;
-defparam \soc_inst|ram_1|data_to_memory[6]~32 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .lut_mask = 64'hFFFEFFFEFDFCFDFC;
+defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y10_N20
-dffeas \soc_inst|switches_1|switch_store[1][6] (
+// Location: FF_X19_Y17_N37
+dffeas \soc_inst|m0_1|u_logic|Mfw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[6]~input_o ),
+	.d(\soc_inst|m0_1|u_logic|Jqhvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][6]~q ),
+	.q(\soc_inst|m0_1|u_logic|Mfw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][6] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][6] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mfw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mfw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N18
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[22]~35 (
+// Location: LABCELL_X19_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pqrvx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[22]~35_combout  = ( \soc_inst|interconnect_1|HRDATA[20]~7_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 )) # 
-// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][6]~q ))) ) )
+// \soc_inst|m0_1|u_logic|Pqrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) # 
+// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][1]~q ))))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ),
-	.datad(!\soc_inst|switches_1|switch_store[1][6]~q ),
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
+	.datad(!\soc_inst|switches_1|switch_store[1][1]~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pqrvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[22]~35 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[22]~35 .lut_mask = 64'h000000000C3F0C3F;
-defparam \soc_inst|interconnect_1|HRDATA[22]~35 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .lut_mask = 64'h0000000002130213;
+defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~0 (
+// Location: FF_X19_Y17_N26
+dffeas \soc_inst|m0_1|u_logic|Rxl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rxl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rxl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S7nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( (\soc_inst|interconnect_1|HRDATA[6]~36_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[6]~36_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|S7nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rxl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) # (!\soc_inst|m0_1|u_logic|Vapvx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rxl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout  & (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) # (!\soc_inst|m0_1|u_logic|Vapvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J6nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S7nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .lut_mask = 64'hFF05FF0505050505;
-defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .lut_mask = 64'h0C080C08CC88CC88;
+defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aphvx4~0 (
+// Location: LABCELL_X19_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S7nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aphvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[22]~35_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[22]~35_combout  )
+// \soc_inst|m0_1|u_logic|S7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mfw2z4~q  & ( \soc_inst|m0_1|u_logic|S7nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mfw2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|S7nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mfw2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S7nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aphvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .lut_mask = 64'hFFFFFFFFAAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .lut_mask = 64'h00000000AA0AFF0F;
+defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y9_N11
-dffeas \soc_inst|m0_1|u_logic|Enw2z4 (
+// Location: FF_X19_Y17_N25
+dffeas \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Aphvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Enw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Enw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Enw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~3 (
+// Location: LABCELL_X37_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irqvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C9rvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( (\soc_inst|m0_1|u_logic|F0y2z4~q  & (!\soc_inst|m0_1|u_logic|C9rvx4~0_combout  $ (((\soc_inst|m0_1|u_logic|U7w2z4~q  & !\soc_inst|m0_1|u_logic|Ywi2z4~q ))))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( (\soc_inst|m0_1|u_logic|F0y2z4~q  & (!\soc_inst|m0_1|u_logic|C9rvx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Ywi2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Irqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Irqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9rvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .lut_mask = 64'h005A005A009A009A;
-defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~4 (
+// Location: LABCELL_X37_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C9rvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & (\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Nbm2z4~q  & (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Owq2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & (\soc_inst|m0_1|u_logic|Dwl2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & (\soc_inst|m0_1|u_logic|Dwl2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & (\soc_inst|m0_1|u_logic|Dwl2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fmqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dwl2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Dsqvx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dwl2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dwl2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9rvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .lut_mask = 64'h303F303F303F1A15;
-defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .lut_mask = 64'h22222222FFFF2222;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~1 (
+// Location: MLABCELL_X39_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C9rvx4~1_combout  = ( \soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C9rvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q  & (\soc_inst|m0_1|u_logic|C9rvx4~3_combout  & (!\soc_inst|m0_1|u_logic|Dwl2z4~q  $ 
-// (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C9rvx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Gtp2z4~q  & (\soc_inst|m0_1|u_logic|C9rvx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|Dwl2z4~q  $ (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zpqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ukpvx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C9rvx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~4_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9rvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .lut_mask = 64'h0000000000410082;
-defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .lut_mask = 64'h000F000F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~2 (
+// Location: LABCELL_X33_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C9rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|X2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|C9rvx4~1_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (\soc_inst|m0_1|u_logic|Nbm2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|X2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Lbn2z4~q  & 
-// \soc_inst|m0_1|u_logic|C9rvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (\soc_inst|m0_1|u_logic|Nbm2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Fmqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Mnpvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|C9rvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .lut_mask = 64'h111D111D11D111D1;
-defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .lut_mask = 64'h22222222F2F2F2F2;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~5 (
+// Location: LABCELL_X36_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvxvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~5_sumout  = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~34_cout  ))
-// \soc_inst|m0_1|u_logic|Add1~6  = CARRY(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~34_cout  ))
+// \soc_inst|m0_1|u_logic|Jvxvx4~combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Xly2z4~q  & (\soc_inst|m0_1|u_logic|Viy2z4~q  & \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Yzi2z4~q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~q  & (\soc_inst|m0_1|u_logic|Viy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Xly2z4~q  & ((\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Viy2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~q  & ((!\soc_inst|m0_1|u_logic|Viy2z4~q ) # (!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Xly2z4~q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Yzi2z4~q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Xly2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Viy2z4~q  & \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~34_cout ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~5_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~6 ),
+	.combout(\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~5 .lut_mask = 64'h0000AAFF0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Add1~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jvxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jvxvx4 .lut_mask = 64'hE881E88181178117;
+defparam \soc_inst|m0_1|u_logic|Jvxvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~9 (
+// Location: LABCELL_X36_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vnqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~9_sumout  = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ) ) + ( \soc_inst|m0_1|u_logic|Add1~6  ))
-// \soc_inst|m0_1|u_logic|Add1~10  = CARRY(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ) ) + ( \soc_inst|m0_1|u_logic|Add1~6  ))
+// \soc_inst|m0_1|u_logic|Vnqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  $ (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Jvxvx4~combout  $ (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~6 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~9_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~10 ),
+	.combout(\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~9 .lut_mask = 64'h0000AAFF0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Add1~9 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y8_N49
-dffeas \soc_inst|m0_1|u_logic|W4y2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W4y2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W4y2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .lut_mask = 64'h93369336366C366C;
+defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kanvx4~0 (
+// Location: LABCELL_X36_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Onqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kanvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~11_combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~9_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~11_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~9_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W4y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~9_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~9_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Onqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vnqvx4~0_combout  $ ((((!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Bsy2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add1~9_sumout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Onqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .lut_mask = 64'h00EEEEEE00E0E0E0;
-defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y8_N50
-dffeas \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .lut_mask = 64'h000000000F870F87;
+defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~21 (
+// Location: LABCELL_X33_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~21_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|K6y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~10  ))
-// \soc_inst|m0_1|u_logic|Add1~22  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|K6y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~10  ))
+// \soc_inst|m0_1|u_logic|Fmqvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Onqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Vopvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Onqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~10 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~21_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~22 ),
+	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~21 .lut_mask = 64'h0000000000005050;
-defparam \soc_inst|m0_1|u_logic|Add1~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .lut_mask = 64'h90F090F000000000;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Danvx4~0 (
+// Location: LABCELL_X33_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Danvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K6y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[8]~33_combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~21_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K6y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[8]~33_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~21_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|K6y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~21_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K6y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~21_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fmqvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fmqvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Fmqvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Fmqvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add1~21_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fmqvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fmqvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Danvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Danvx4~0 .lut_mask = 64'h0F0CFFCC0A08AA88;
-defparam \soc_inst|m0_1|u_logic|Danvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .lut_mask = 64'h0000000040C040C0;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y8_N56
-dffeas \soc_inst|m0_1|u_logic|K6y2z4 (
+// Location: FF_X33_Y16_N56
+dffeas \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K6y2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X24_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~1_sumout  = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Qcy2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~14  ))
-// \soc_inst|m0_1|u_logic|Add1~2  = CARRY(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Qcy2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~14  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~14 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~1_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~2 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~1 .lut_mask = 64'h0000AAFF0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Add1~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~17 (
+// Location: LABCELL_X33_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~17_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Bdm2z4~q  & \soc_inst|m0_1|u_logic|Nbm2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~2  ))
+// \soc_inst|m0_1|u_logic|S4bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Z4bwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~2 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~17_sumout ),
+	.combout(\soc_inst|m0_1|u_logic|S4bwx4~0_combout ),
+	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~17 .lut_mask = 64'h0000000000000A0A;
-defparam \soc_inst|m0_1|u_logic|Add1~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .lut_mask = 64'h8888888808880888;
+defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U8nvx4~0 (
+// Location: LABCELL_X27_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bdm2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~17_sumout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[13]~27_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdm2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~17_sumout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[13]~27_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bdm2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[13]~27_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdm2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[13]~27_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Q3bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|S4bwx4~0_combout  & ( \soc_inst|m0_1|u_logic|R40wx4~combout  & ( (!\soc_inst|m0_1|u_logic|L4bwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & (!\soc_inst|m0_1|u_logic|L4bwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add1~17_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L4bwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S4bwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .lut_mask = 64'h0F0CFFCC0A08AA88;
-defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y8_N2
-dffeas \soc_inst|m0_1|u_logic|Bdm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bdm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bdm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .lut_mask = 64'hD0000000DD000000;
+defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oylwx4~0 (
+// Location: MLABCELL_X21_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oylwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I3y2z4~q  & ( (\soc_inst|m0_1|u_logic|K6y2z4~q  & (\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bdm2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|I30wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R40wx4~combout ) # ((\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Rryvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Rryvx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oylwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I30wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .lut_mask = 64'h0000000000030003;
-defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~1 .lut_mask = 64'h05050505FF05FF05;
+defparam \soc_inst|m0_1|u_logic|I30wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~25 (
+// Location: MLABCELL_X25_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~25_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~22  ))
-// \soc_inst|m0_1|u_logic|Add1~26  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~22  ))
+// \soc_inst|m0_1|u_logic|I30wx4~2_combout  = ( \soc_inst|m0_1|u_logic|I30wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I30wx4~1_combout  & (\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Add5~33_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I30wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
 	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~22 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~25_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~26 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~25 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~25 .lut_mask = 64'h0000000000005500;
-defparam \soc_inst|m0_1|u_logic|Add1~25 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W9nvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|W9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y7y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~25_sumout  & ((!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~25_sumout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
-// ((!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y7y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) )
-
-	.dataa(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add1~25_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W9nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .lut_mask = 64'h00EEEEEE00E0E0E0;
-defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~2 .lut_mask = 64'h0000000000B000B0;
+defparam \soc_inst|m0_1|u_logic|I30wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y10_N37
+dffeas \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y8_N50
-dffeas \soc_inst|m0_1|u_logic|Y7y2z4 (
+// Location: FF_X36_Y10_N43
+dffeas \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|W9nvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y7y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y7y2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~29 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~29_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|M9y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~26  ))
-// \soc_inst|m0_1|u_logic|Add1~30  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|M9y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~26  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~26 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~29_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~30 ),
-	.shareout());
+// Location: FF_X25_Y12_N16
+dffeas \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~29 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~29 .lut_mask = 64'h0000000000005050;
-defparam \soc_inst|m0_1|u_logic|Add1~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P9nvx4~0 (
+// Location: MLABCELL_X28_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M9y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[10]~12_combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~29_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[10]~12_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~29_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|M9y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~29_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~29_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fzxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T0m2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Hbv2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|H2m2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add1~29_sumout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T0m2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hbv2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H2m2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .lut_mask = 64'h00EEEEEE00E0E0E0;
-defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .lut_mask = 64'hFF00CCCCAAAAF0F0;
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y8_N44
-dffeas \soc_inst|m0_1|u_logic|M9y2z4 (
+// Location: FF_X27_Y10_N55
+dffeas \soc_inst|m0_1|u_logic|V3m2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M9y2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|V3m2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M9y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M9y2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V3m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V3m2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oylwx4~1 (
+// Location: LABCELL_X27_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oylwx4~1_combout  = ( \soc_inst|m0_1|u_logic|M9y2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qcy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Oylwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Bby2z4~q ) # (!\soc_inst|m0_1|u_logic|Y7y2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M9y2z4~q  )
+// \soc_inst|m0_1|u_logic|Fzxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Y1u2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yx63z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|H783z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Y1u2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|V3m2z4~q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Y1u2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yx63z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H783z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Y1u2z4~q  & ( (!\soc_inst|m0_1|u_logic|V3m2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Oylwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|V3m2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yx63z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H783z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y1u2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .lut_mask = 64'hFFFFFFFFFFFEFFFE;
-defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .lut_mask = 64'hDDDDF5A08888F5A0;
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~34 (
+// Location: MLABCELL_X28_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~34_cout  = CARRY(( (!\soc_inst|m0_1|u_logic|Nbm2z4~q ) # (!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ) ) + ( VCC ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|Fzxwx4~combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fzxwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(),
-	.sumout(),
-	.cout(\soc_inst|m0_1|u_logic|Add1~34_cout ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~34 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~34 .lut_mask = 64'h000000000000FFAA;
-defparam \soc_inst|m0_1|u_logic|Add1~34 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ranvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ranvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I3y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~5_sumout  & ((!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|m0_1|u_logic|Add1~5_sumout  & 
-// ((!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I3y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) )
-
-	.dataa(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add1~5_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ranvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .lut_mask = 64'h0E0EEEEE0E00EE00;
-defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4 .lut_mask = 64'h0000000003CF03CF;
+defparam \soc_inst|m0_1|u_logic|Fzxwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y8_N43
-dffeas \soc_inst|m0_1|u_logic|I3y2z4 (
+// Location: FF_X28_Y8_N50
+dffeas \soc_inst|m0_1|u_logic|X533z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ranvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X533z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I3y2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X533z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X533z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~1 (
+// Location: MLABCELL_X28_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|I3y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Enw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Enw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|R40wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bv03z4~q  & ( ((\soc_inst|m0_1|u_logic|X533z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bv03z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Bv03z4~q  & ( ((\soc_inst|m0_1|u_logic|X533z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Enw2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X533z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bv03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J6nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R40wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
-defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~2 .lut_mask = 64'h000005FF0F0005FF;
+defparam \soc_inst|m0_1|u_logic|R40wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|J6nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|J6nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J6nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[22]~35_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J6nvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6nvx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y14_N25
+dffeas \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y6_N28
-dffeas \soc_inst|m0_1|u_logic|Zoy2z4 (
+// Location: FF_X31_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|Hyz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hyz2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hyz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zoy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zoy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ho3wx4~0 (
+// Location: LABCELL_X31_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ho3wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|R40wx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|Hyz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|Ow13z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|Hyz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ow13z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ow13z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R40wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .lut_mask = 64'h2200220000000000;
-defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~1 .lut_mask = 64'h0044CF33CC44CF33;
+defparam \soc_inst|m0_1|u_logic|R40wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~1 (
+// Location: MLABCELL_X28_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ho3wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ho3wx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & (\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & \soc_inst|m0_1|u_logic|W28wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|R40wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Po53z4~q  & 
+// (\soc_inst|m0_1|u_logic|R40wx4~2_combout  & \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Po53z4~q  & (\soc_inst|m0_1|u_logic|R40wx4~2_combout  & \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|R40wx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|R40wx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Po53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R40wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R40wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .lut_mask = 64'h0003000303030303;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~0 .lut_mask = 64'hAAA0A0A000080008;
+defparam \soc_inst|m0_1|u_logic|R40wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~0 (
+// Location: LABCELL_X27_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|R40wx4~combout  = ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fzxwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fzxwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R40wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4 .lut_mask = 64'hCF00450000000000;
+defparam \soc_inst|m0_1|u_logic|R40wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~2 (
+// Location: LABCELL_X27_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~20 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Df3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Df3wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jp3wx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~20_combout  = ( \soc_inst|m0_1|u_logic|Y9t2z4~q  & ( \soc_inst|m0_1|u_logic|R40wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Y9t2z4~q  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .lut_mask = 64'hA800A80000000000;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .lut_mask = 64'hFFFFFFFF00FF00FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpkwx4~0 (
+// Location: LABCELL_X19_Y19_N6
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[3]~20 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+// \soc_inst|ram_1|data_to_memory[3]~20_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select [0]) ) ) 
+// ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & 
+// ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|byte_select [0]) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|ram_1|byte_select [0]),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[3]~20_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[3]~20 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[3]~20 .lut_mask = 64'h0033333300003300;
+defparam \soc_inst|ram_1|data_to_memory[3]~20 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~6 (
+// Location: LABCELL_X22_Y19_N6
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[3]~26 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G27wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ukpvx4~combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|G27wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ukpvx4~combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|G27wx4~0_combout  & \soc_inst|m0_1|u_logic|Wpkwx4~0_combout ) ) )
+// \soc_inst|interconnect_1|HRDATA[3]~26_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
+// (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[0][3]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( 
+// (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (((\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|switches_1|switch_store[0][3]~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[0][3]~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~6_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .lut_mask = 64'h111111111F111F11;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[3]~26 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[3]~26 .lut_mask = 64'h888B888BB8BBB8BB;
+defparam \soc_inst|interconnect_1|HRDATA[3]~26 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~7 (
+// Location: FF_X34_Y19_N50
+dffeas \soc_inst|m0_1|u_logic|Jky2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jky2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jky2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Df3wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (((\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|O5t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|E7nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~q  & ( (\soc_inst|interconnect_1|HRDATA[3]~26_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jky2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[3]~26_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E7nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .lut_mask = 64'hBFBBBFBB00000000;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .lut_mask = 64'hF0F3F0F300330033;
+defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~5 (
+// Location: MLABCELL_X34_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vphvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|B73wx4~combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|A0zvx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Vphvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[19]~25_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[19]~25_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.dataf(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vphvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .lut_mask = 64'h0303232303032323;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~8 (
+// Location: FF_X34_Y19_N32
+dffeas \soc_inst|m0_1|u_logic|Oiw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vphvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Oiw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oiw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oiw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Df3wx4~7_combout  & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Df3wx4~7_combout  & !\soc_inst|m0_1|u_logic|Df3wx4~5_combout ) ) )
+// \soc_inst|m0_1|u_logic|E7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oiw2z4~q ) # ((\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Gtp2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Gtp2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~7_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oiw2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E7nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .lut_mask = 64'h3030303033113311;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .lut_mask = 64'h0F000F00CFCCCFCC;
+defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~9 (
+// Location: MLABCELL_X34_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~2_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Df3wx4~4_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|E7nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|E7nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|E7nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[19]~25_combout ))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|E7nvx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E7nvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .lut_mask = 64'h5555555551115111;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .lut_mask = 64'hF0A0F0A000000000;
+defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1pvx4~0 (
+// Location: FF_X34_Y19_N49
+dffeas \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjswx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R1pvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (((\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|Df3wx4~9_combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|U2x2z4~q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|W28wx4~0_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Fjswx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjswx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .lut_mask = 64'h000000000A0AFFCF;
-defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .lut_mask = 64'h00C000CC00A000A0;
+defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mekvx4~0 (
+// Location: LABCELL_X36_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Emewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mekvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( 
-// \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xx93z4~q ) # (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Xx93z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Emewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W7z2z4~q ) # ((!\soc_inst|m0_1|u_logic|K9z2z4~q ) # (!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xx93z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mekvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .lut_mask = 64'hAAAA0000AFAF0F0F;
-defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Emewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Emewx4~0 .lut_mask = 64'hFFFFFFFFFEFEFEFE;
+defparam \soc_inst|m0_1|u_logic|Emewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mekvx4~1 (
+// Location: LABCELL_X23_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvswx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mekvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mekvx4~0_combout  & ( \soc_inst|m0_1|u_logic|W0pvx4~combout  & ( (\soc_inst|m0_1|u_logic|G7x2z4~q  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ekovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mekvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W0pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ekovx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Wvswx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emewx4~0_combout  & \soc_inst|m0_1|u_logic|C9yvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|C9yvx4~combout  & ((!\soc_inst|m0_1|u_logic|Emewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mekvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wvswx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .lut_mask = 64'h0D0C0D0C0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjswx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fjswx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wvswx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjswx4~0_combout  & (\soc_inst|m0_1|u_logic|G2lwx4~combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjswx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wvswx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .lut_mask = 64'hFCFC000000FC0000;
-defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .lut_mask = 64'h008C008C00000000;
+defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y4_N25
-dffeas \soc_inst|m0_1|u_logic|Xx93z4 (
+// Location: FF_X28_Y10_N49
+dffeas \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xx93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xx93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xx93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|C372z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bn53z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Bn53z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sd43z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bn53z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sd43z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sd43z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bn53z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C372z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|To33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|To33z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C372z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C372z4~0 .lut_mask = 64'h0020002000300000;
-defparam \soc_inst|m0_1|u_logic|C372z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|To33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|To33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~1 (
+// Location: MLABCELL_X28_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C372z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|J433z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) 
-// # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Av13z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|To33z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L763z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
+//  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|To33z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|L763z4~q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J433z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Av13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|L763z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|To33z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C372z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C372z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C372z4~1 .lut_mask = 64'h0000C0000000A000;
-defparam \soc_inst|m0_1|u_logic|C372z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .lut_mask = 64'h000000A800000008;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y10_N50
-dffeas \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE (
+// Location: FF_X21_Y10_N49
+dffeas \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~2 (
+// Location: MLABCELL_X28_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C372z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nt03z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Cy43z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Cy43z4~q ) # (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nt03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cy43z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C372z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C372z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C372z4~2 .lut_mask = 64'h00000000C000A000;
-defparam \soc_inst|m0_1|u_logic|C372z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .lut_mask = 64'h0000000040444000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y10_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z472z4~0 (
+// Location: LABCELL_X27_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z472z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|U5r2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~4_combout  = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rpe3z4~q  & (\soc_inst|m0_1|u_logic|Hue3z4~q  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fre3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hue3z4~q  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fre3z4~q 
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rpe3z4~q  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fre3z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fre3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U5r2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rpe3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fre3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hue3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z472z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z472z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z472z4~0 .lut_mask = 64'h0400000000000000;
-defparam \soc_inst|m0_1|u_logic|Z472z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .lut_mask = 64'hF3F3515100F30051;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~3 (
+// Location: FF_X24_Y8_N5
+dffeas \soc_inst|m0_1|u_logic|Kf23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kf23z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kf23z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kf23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kf23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C372z4~3_combout  = ( !\soc_inst|m0_1|u_logic|C372z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Z472z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C372z4~0_combout  & (!\soc_inst|m0_1|u_logic|C372z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|I7r2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Kf23z4~q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|W5s2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C372z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C372z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I7r2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|C372z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z472z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W5s2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kf23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C372z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C372z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C372z4~3 .lut_mask = 64'h80C0000000000000;
-defparam \soc_inst|m0_1|u_logic|C372z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .lut_mask = 64'h0088C00000000000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tpnvx4~0 (
+// Location: LABCELL_X27_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C372z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Xx93z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Bdwwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C372z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xx93z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C372z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Xx93z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C372z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Xx93z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|I4s2z4~q  & ( \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I4s2z4~q  & ( !\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I4s2z4~q  & ( !\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xx93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C372z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|I4s2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .lut_mask = 64'hAACCAACCAAFFAAF0;
-defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .lut_mask = 64'h8008800000080000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yuovx4 (
+// Location: MLABCELL_X25_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yuovx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~25_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Add5~97_sumout )) # (\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~25_sumout )) # (\soc_inst|m0_1|u_logic|Add5~97_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~25_sumout )) # (\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~25_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ug73z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cxc3z4~q  
+// & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ug73z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cxc3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~25_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cxc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ug73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yuovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yuovx4 .lut_mask = 64'h0303575703FF57FF;
-defparam \soc_inst|m0_1|u_logic|Yuovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .lut_mask = 64'h0000441000000010;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X19_Y6_N55
-dffeas \soc_inst|ram_1|saved_word_address[2] (
+// Location: FF_X25_Y8_N22
+dffeas \soc_inst|m0_1|u_logic|Tse3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [2]),
+	.q(\soc_inst|m0_1|u_logic|Tse3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[2] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[2] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tse3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tse3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N6
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[2]~2 (
-// Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[2]~2_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|Yuovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [2])) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [2] ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|saved_word_address [2]),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[2]~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y9_N7
+dffeas \soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .lut_mask = 64'h3333333303F303F3;
-defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N0
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[21]~24 (
+// Location: LABCELL_X24_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~6 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[21]~24_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ) # (!\soc_inst|ram_1|byte_select [2]))) ) ) # 
-// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  & \soc_inst|ram_1|byte_select [2])) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Duv2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
-	.datad(!\soc_inst|ram_1|byte_select [2]),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Duv2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[21]~24_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[21]~24 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[21]~24 .lut_mask = 64'h0030003033303330;
-defparam \soc_inst|ram_1|data_to_memory[21]~24 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .lut_mask = 64'h0000000008080C00;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X14_Y5_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[21]~24_combout ,\soc_inst|ram_1|data_to_memory[5]~23_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X25_Y8_N50
+dffeas \soc_inst|m0_1|u_logic|Dq83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Dq83z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_bit_number = 5;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_bit_number = 5;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003FF6DFE14020000010004040000000000800800800800800800800401555555555555412000000505550000000000001550";
+defparam \soc_inst|m0_1|u_logic|Dq83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N48
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[21]~29 (
+// Location: MLABCELL_X25_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~7 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[21]~29_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[1][5]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & (((\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|switches_1|switch_store[1][5]~q )))) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~7_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~5_combout  & (\soc_inst|m0_1|u_logic|Tse3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout  & \soc_inst|m0_1|u_logic|Dq83z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~5_combout  & 
+// (\soc_inst|m0_1|u_logic|Tse3z4~q  & !\soc_inst|m0_1|u_logic|Vf5wx4~6_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~5_combout  & 
+// (!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout  & \soc_inst|m0_1|u_logic|Dq83z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~5_combout  & 
+// !\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[1][5]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~5_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tse3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dq83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[21]~29 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[21]~29 .lut_mask = 64'hA0A3A0A3ACAFACAF;
-defparam \soc_inst|interconnect_1|HRDATA[21]~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .lut_mask = 64'hA0A000A020200020;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hphvx4~0 (
+// Location: MLABCELL_X28_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hphvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Vf5wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Vf5wx4~2_combout  & 
+// (\soc_inst|m0_1|u_logic|Vf5wx4~4_combout  & !\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vf5wx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hphvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .lut_mask = 64'hFFFFFFFFFF00FF00;
-defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y9_N26
-dffeas \soc_inst|m0_1|u_logic|Qlw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hphvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qlw2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qlw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qlw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~1 (
+// Location: LABCELL_X27_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[9]~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qlw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Qlw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qlw2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .lut_mask = 64'h0A0A0A0AFF0AFF0A;
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~0 (
+// Location: LABCELL_X19_Y16_N6
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[9]~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( \soc_inst|interconnect_1|HRDATA[5]~28_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
-// \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # (\soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  ) ) )
+// \soc_inst|ram_1|data_to_memory[9]~9_combout  = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & !\soc_inst|ram_1|byte_select [1]) ) ) 
+// ) # ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( (\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
+	.datac(!\soc_inst|ram_1|byte_select [1]),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .lut_mask = 64'hCCCC0000CFCF0F0F;
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q6nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Q6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q6nvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[21]~29_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q6nvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q6nvx4~0_combout ),
+	.datae(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[9]~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[9]~9 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[9]~9 .lut_mask = 64'h00003F3F00003030;
+defparam \soc_inst|ram_1|data_to_memory[9]~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y6_N1
-dffeas \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE (
+// Location: FF_X19_Y16_N20
+dffeas \soc_inst|switches_1|switch_store[0][9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\SW[9]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.q(\soc_inst|switches_1|switch_store[0][9]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[0][9] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][9] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvxvx4 (
+// Location: LABCELL_X19_Y16_N18
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[9]~16 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jvxvx4~combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~q  & ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Xly2z4~q  & \soc_inst|m0_1|u_logic|Rxl2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Rxl2z4~q ) # (\soc_inst|m0_1|u_logic|Xly2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Xly2z4~q  & !\soc_inst|m0_1|u_logic|Rxl2z4~q )) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Xly2z4~q  & \soc_inst|m0_1|u_logic|Rxl2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yzi2z4~q  & ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Xly2z4~q  & !\soc_inst|m0_1|u_logic|Rxl2z4~q )) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Xly2z4~q  & \soc_inst|m0_1|u_logic|Rxl2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Rxl2z4~q ))) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Xly2z4~q  & !\soc_inst|m0_1|u_logic|Rxl2z4~q )) ) ) )
+// \soc_inst|interconnect_1|HRDATA[9]~16_combout  = ( \soc_inst|switches_1|switch_store[0][9]~q  & ( \soc_inst|interconnect_1|HRDATA[8]~15_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ) # 
+// (\soc_inst|interconnect_1|Equal1~0_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][9]~q  & ( \soc_inst|interconnect_1|HRDATA[8]~15_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ) ) ) ) # ( \soc_inst|switches_1|switch_store[0][9]~q  & ( !\soc_inst|interconnect_1|HRDATA[8]~15_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) ) # ( 
+// !\soc_inst|switches_1|switch_store[0][9]~q  & ( !\soc_inst|interconnect_1|HRDATA[8]~15_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
+	.datae(!\soc_inst|switches_1|switch_store[0][9]~q ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[8]~15_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jvxvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jvxvx4 .lut_mask = 64'hEE88881188111177;
-defparam \soc_inst|m0_1|u_logic|Jvxvx4 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[9]~16 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[9]~16 .lut_mask = 64'hF0F0F0F000CC33FF;
+defparam \soc_inst|interconnect_1|HRDATA[9]~16 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vnqvx4~0 (
+// Location: MLABCELL_X34_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vnqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  $ (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~q 
-// ))) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  $ 
-// (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Zoy2z4~q ) # (\soc_inst|m0_1|u_logic|Nqy2z4~q ))) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~q ))))) ) )
+// \soc_inst|m0_1|u_logic|O5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|interconnect_1|HRDATA[9]~16_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[9]~16_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O5nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .lut_mask = 64'h817E817E17E817E8;
-defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .lut_mask = 64'hCCCFCCCF000F000F;
+defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y7_N26
-dffeas \soc_inst|m0_1|u_logic|Bsy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~21 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~21_sumout  = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|K6y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~10  ))
+// \soc_inst|m0_1|u_logic|Add1~22  = CARRY(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|K6y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~10  ))
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~10 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~21_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~22 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~21 .lut_mask = 64'h0000CCFF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Add1~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~25 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~25_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~22  ))
+// \soc_inst|m0_1|u_logic|Add1~26  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~22  ))
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~22 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~25_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~26 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bsy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bsy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add1~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~25 .lut_mask = 64'h0000000000003300;
+defparam \soc_inst|m0_1|u_logic|Add1~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7xvx4 (
+// Location: LABCELL_X31_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y7xvx4~combout  = ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Vnqvx4~0_combout  & \soc_inst|m0_1|u_logic|Ljpvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|C9rvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Owq2z4~q  $ (((!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dwl2z4~q  & ((!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Owq2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dwl2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9rvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y7xvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y7xvx4 .lut_mask = 64'h000C000C00000000;
-defparam \soc_inst|m0_1|u_logic|Y7xvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .lut_mask = 64'h0F0F33330F053399;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gqxvx4 (
+// Location: LABCELL_X23_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gqxvx4~combout  = ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Jvxvx4~combout  & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Zoy2z4~q )))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Jvxvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zoy2z4~q  & !\soc_inst|m0_1|u_logic|Jvxvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|C9rvx4~3_combout  = ( \soc_inst|m0_1|u_logic|C9rvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q  & (\soc_inst|m0_1|u_logic|F0y2z4~q  & ((!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ) # (\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|C9rvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|F0y2z4~q  & (((!\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Kkrvx4~5_combout )) # (\soc_inst|m0_1|u_logic|Ywi2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9rvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gqxvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gqxvx4 .lut_mask = 64'h0480048048004800;
-defparam \soc_inst|m0_1|u_logic|Gqxvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .lut_mask = 64'h002F002F00D000D0;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irxvx4~0 (
+// Location: LABCELL_X31_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Irxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q  & (!\soc_inst|m0_1|u_logic|Xly2z4~q  & (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yzi2z4~q ))) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~q  & ((!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Yzi2z4~q ))) # (\soc_inst|m0_1|u_logic|Xly2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yzi2z4~q )))) # (\soc_inst|m0_1|u_logic|Rxl2z4~q  & (!\soc_inst|m0_1|u_logic|Xly2z4~q  & (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yzi2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|C9rvx4~1_combout  = ( \soc_inst|m0_1|u_logic|C9rvx4~4_combout  & ( \soc_inst|m0_1|u_logic|C9rvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Dwl2z4~q  & (!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Dwl2z4~q  & (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout  $ 
+// (!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|C9rvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Irxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9rvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .lut_mask = 64'hE880E88080008000;
-defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .lut_mask = 64'h0000000000000990;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpxvx4~0 (
+// Location: LABCELL_X31_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zpxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvxvx4~combout  & ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jvxvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  & ( !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout  $ 
-// (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|C9rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (((\soc_inst|m0_1|u_logic|C9rvx4~1_combout  & !\soc_inst|m0_1|u_logic|X2rvx4~2_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (((\soc_inst|m0_1|u_logic|C9rvx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|X2rvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Irxvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .lut_mask = 64'h1E1EF0F07878F0F0;
-defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .lut_mask = 64'h111B111B1B111B11;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnxvx4~0 (
+// Location: LABCELL_X31_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W9nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hnxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y7xvx4~combout  & (\soc_inst|m0_1|u_logic|Gqxvx4~combout  & !\soc_inst|m0_1|u_logic|Zpxvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Y7xvx4~combout  & ((!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gqxvx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|W9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y7y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[9]~16_combout  & ((!\soc_inst|m0_1|u_logic|Add1~25_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[9]~16_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add1~25_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y7y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~25_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~25_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add1~25_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hnxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W9nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .lut_mask = 64'h000000005F055F05;
-defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .lut_mask = 64'h00FCFCFC00A8A8A8;
+defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y7_N32
-dffeas \soc_inst|m0_1|u_logic|Zcn2z4 (
+// Location: FF_X31_Y19_N43
+dffeas \soc_inst|m0_1|u_logic|Y7y2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
+	.d(\soc_inst|m0_1|u_logic|W9nvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Y7y2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zcn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zcn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y7y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y7y2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mmxvx4~0 (
+// Location: MLABCELL_X34_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fohvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mmxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uup2z4~q  $ (((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (!\soc_inst|m0_1|u_logic|Zcn2z4~q  & !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Fohvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~18_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~18_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mmxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fohvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .lut_mask = 64'h78F078F000000000;
-defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~1 (
+// Location: FF_X34_Y19_N14
+dffeas \soc_inst|m0_1|u_logic|Urw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fohvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Urw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Urw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Urw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbxvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mmxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|O5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Urw2z4~q  & ( (!\soc_inst|m0_1|u_logic|Y7y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Urw2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Y7y2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wfovx4~combout )) # (\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mmxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Urw2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O5nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .lut_mask = 64'hFA72FA7200000000;
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .lut_mask = 64'h55F555F500F000F0;
+defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~2 (
+// Location: MLABCELL_X34_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbxvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sbxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Sbxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|O5nvx4~2_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~18_combout  & ( (!\soc_inst|m0_1|u_logic|O5nvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & !\soc_inst|m0_1|u_logic|O5nvx4~1_combout )) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[25]~18_combout  & ( (!\soc_inst|m0_1|u_logic|O5nvx4~0_combout  & !\soc_inst|m0_1|u_logic|O5nvx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sbxvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O5nvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5nvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .lut_mask = 64'h0C0F0C0F04050405;
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .lut_mask = 64'hCC00CC00C000C000;
+defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gokwx4~0 (
+// Location: FF_X34_Y19_N25
+dffeas \soc_inst|m0_1|u_logic|Pty2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pty2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pty2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gokwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|F9wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q 
+// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Pty2z4~q  & ((\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F9wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .lut_mask = 64'h0005000500000000;
-defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .lut_mask = 64'h055501110FFF0333;
+defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~0 (
+// Location: LABCELL_X37_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P3mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|A1yvx4~0_combout  & \soc_inst|m0_1|u_logic|U2x2z4~q )) 
-// # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( !\soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|A1yvx4~0_combout  & \soc_inst|m0_1|u_logic|U2x2z4~q )) # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|A1yvx4~0_combout  & \soc_inst|m0_1|u_logic|U2x2z4~q )) # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|P3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P3mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .lut_mask = 64'h02AA02AAFFFF02AA;
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .lut_mask = 64'hFFFF0C0C00000000;
+defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~3 (
+// Location: LABCELL_X37_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P3mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbxvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Sbxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hnxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Sbxvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Rmpvx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|P3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( (\soc_inst|m0_1|u_logic|F9wvx4~0_combout  & !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Auk2z4~q  & ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( (\soc_inst|m0_1|u_logic|F9wvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & !\soc_inst|m0_1|u_logic|P3mvx4~0_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Auk2z4~q  & ( !\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hnxvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sbxvx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|F9wvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P3mvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .lut_mask = 64'h004C004C00000000;
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .lut_mask = 64'h0000CCCC40404444;
+defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y8_N34
-dffeas \soc_inst|m0_1|u_logic|Uup2z4 (
+// Location: FF_X37_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Auk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
+	.d(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uup2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uup2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y9_N1
-dffeas \soc_inst|m0_1|u_logic|H2m2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H2m2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Auk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H2m2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Auk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Auk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4~0 (
+// Location: LABCELL_X40_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4xvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yb93z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Hbv2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|T0m2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|H2m2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|E4xvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Auk2z4~q ) # (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T0m2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yb93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hbv2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H2m2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E4xvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .lut_mask = 64'hFF00AAAAF0F0CCCC;
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y8_N16
-dffeas \soc_inst|m0_1|u_logic|H783z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H783z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H783z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X48_Y8_N37
-dffeas \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y10_N58
-dffeas \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y10_N1
-dffeas \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .lut_mask = 64'hFFFF0000FAFA0000;
+defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4~1 (
+// Location: LABCELL_X40_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B3mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (((\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q 
-//  & (!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|B3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|E4xvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|E4xvx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E4xvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B3mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .lut_mask = 64'hFAEEFA4450EE5044;
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .lut_mask = 64'h00000000FFFF5050;
+defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4 (
+// Location: MLABCELL_X39_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oowvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzxwx4~combout  = ( \soc_inst|m0_1|u_logic|Fzxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fzxwx4~1_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fzxwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Fzxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fzxwx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Oowvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qdj2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fzxwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzxwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzxwx4 .lut_mask = 64'h0000050550505555;
-defparam \soc_inst|m0_1|u_logic|Fzxwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wxxwx4~0 (
+// Location: MLABCELL_X39_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wxxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Uup2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Uup2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Ejwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Oowvx4~0_combout 
+// ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .lut_mask = 64'h4040404040CC40CC;
-defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .lut_mask = 64'h00F000F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9nwx4~0 (
+// Location: LABCELL_X42_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (((!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Svxwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Tzxwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wlwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( \soc_inst|m0_1|u_logic|Ejwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Ejwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( !\soc_inst|m0_1|u_logic|Ejwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G27wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wlwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .lut_mask = 64'h00000000F7FFF7FF;
-defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .lut_mask = 64'h0000A000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkyvx4~0 (
+// Location: LABCELL_X42_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlwvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Wlwvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vhwvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wlwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vhwvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wlwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wlwvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wlwvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .lut_mask = 64'h0111011155555555;
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .lut_mask = 64'h51005100F300F300;
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~1 (
+// Location: FF_X37_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|C3z2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C3z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C3z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B3mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zluvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & !\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & !\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) ) )
+// \soc_inst|m0_1|u_logic|B3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|C3z2z4~q  & ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|B3mvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Wlwvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C3z2z4~q  & ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|B3mvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Wlwvx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|C3z2z4~q  & ( !\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|B3mvx4~0_combout  & !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B3mvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wlwvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zluvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .lut_mask = 64'hFFA0FFA0A0A0A0A0;
-defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .lut_mask = 64'h0000888808080808;
+defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~0 (
+// Location: FF_X37_Y9_N52
+dffeas \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ijcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zluvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & \soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & \soc_inst|m0_1|u_logic|Omyvx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ijcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zluvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .lut_mask = 64'hCCEECCEE00AA00AA;
-defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .lut_mask = 64'hAA00AA00FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~2 (
+// Location: LABCELL_X31_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zluvx4~2_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zluvx4~1_combout  & !\soc_inst|m0_1|u_logic|Zluvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zluvx4~1_combout  & !\soc_inst|m0_1|u_logic|Zluvx4~0_combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zluvx4~1_combout  & !\soc_inst|m0_1|u_logic|Zluvx4~0_combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zluvx4~1_combout  & !\soc_inst|m0_1|u_logic|Zluvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|O3awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Wzawx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zluvx4~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zluvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .lut_mask = 64'h880088008800CC00;
-defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O3awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3awx4~0 .lut_mask = 64'h0F0F0F0FF000F000;
+defparam \soc_inst|m0_1|u_logic|O3awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9mvx4~0 (
+// Location: LABCELL_X30_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout 
-// )))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lbn2z4~q  & ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mnawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mnawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .lut_mask = 64'hA0ECF5FD00CC55DD;
-defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y14_N32
-dffeas \soc_inst|m0_1|u_logic|Uaj2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uaj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uaj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .lut_mask = 64'hAA00F0F0A280FCFC;
+defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rryvx4~0 (
+// Location: LABCELL_X30_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C3qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rryvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~q  & 
-// (\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|C3qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mnawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Izpvx4~combout  & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mnawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .lut_mask = 64'h00000000A8FCA8FC;
+defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Upyvx4~0 (
+// Location: LABCELL_X23_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Upyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rryvx4~0_combout  & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Wzpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( 
+// \soc_inst|m0_1|u_logic|V9iwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Upyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wzpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .lut_mask = 64'h0000000044440000;
-defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .lut_mask = 64'h00FFAAFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3mwx4~0 (
+// Location: LABCELL_X31_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R3mwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( ((\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|B73wx4~combout  & (\soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Wzpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Wzpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzpvx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .lut_mask = 64'h0002000300000003;
-defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y7_N46
-dffeas \soc_inst|m0_1|u_logic|Pet2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pet2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pet2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pet2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .lut_mask = 64'h5F005F5F00000000;
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nen2z4~0 (
+// Location: LABCELL_X30_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C3qvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nen2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Pet2z4~q  & !\soc_inst|m0_1|u_logic|J4x2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( ((\soc_inst|m0_1|u_logic|Pet2z4~q  & 
-// !\soc_inst|m0_1|u_logic|J4x2z4~q )) # (\soc_inst|m0_1|u_logic|Kryvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|C3qvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|C3qvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add5~85_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pet2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nen2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .lut_mask = 64'h3F0F3F0F33003300;
-defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .lut_mask = 64'h0000000044040000;
+defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nen2z4~1 (
+// Location: LABCELL_X24_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zu33z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nen2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Nen2z4~q  & ( \soc_inst|m0_1|u_logic|Nen2z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nen2z4~q  & ( \soc_inst|m0_1|u_logic|Nen2z4~0_combout  & ( 
-// (\soc_inst|interconnect_1|HREADY~0_combout  & (((\soc_inst|m0_1|u_logic|Upyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout )) # (\soc_inst|m0_1|u_logic|Msyvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nen2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Nen2z4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Msyvx4~combout  & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & !\soc_inst|m0_1|u_logic|Upyvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zu33z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Upyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nen2z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zu33z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .lut_mask = 64'h0000ECCC1333FFFF;
-defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zu33z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zu33z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Zu33z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y7_N16
-dffeas \soc_inst|m0_1|u_logic|Nen2z4 (
+// Location: FF_X24_Y8_N22
+dffeas \soc_inst|m0_1|u_logic|Zu33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zu33z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zu33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nen2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nen2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zu33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~1 (
+// Location: MLABCELL_X25_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Cr1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Nen2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zu33z4~q ) # (!\soc_inst|m0_1|u_logic|Kjk2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kjk2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Zu33z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zu33z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kjk2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .lut_mask = 64'h0000000000FA00FA;
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y9_N2
-dffeas \soc_inst|m0_1|u_logic|Okn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Okn2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Okn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Okn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .lut_mask = 64'h0000AAAAF0F0FAFA;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y9_N44
-dffeas \soc_inst|m0_1|u_logic|X563z4 (
+// Location: FF_X30_Y11_N7
+dffeas \soc_inst|m0_1|u_logic|I453z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -88150,1812 +88905,1869 @@ dffeas \soc_inst|m0_1|u_logic|X563z4 (
 	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X563z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X563z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X563z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y9_N5
-dffeas \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y9_N8
-dffeas \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X39_Y7_N25
-dffeas \soc_inst|m0_1|u_logic|Yfn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yfn2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yfn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yfn2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X40_Y7_N49
-dffeas \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|I453z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I453z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I453z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4~0 (
+// Location: LABCELL_X29_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ql23z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q1ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yfn2z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Ql23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yfn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ql23z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .lut_mask = 64'hCCCCF0F0FF00AAAA;
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ql23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ql23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ql23z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y9_N7
-dffeas \soc_inst|m0_1|u_logic|Gf73z4 (
+// Location: FF_X29_Y6_N10
+dffeas \soc_inst|m0_1|u_logic|Ql23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ql23z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ql23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ql23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X35_Y9_N17
-dffeas \soc_inst|m0_1|u_logic|Po83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po83z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po83z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X24_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Izpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I453z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ql23z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ql23z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|I453z4~DUPLICATE_q  ) ) )
 
-// Location: FF_X40_Y7_N26
-dffeas \soc_inst|m0_1|u_logic|Gju2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gju2z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|I453z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ql23z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gju2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gju2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .lut_mask = 64'h0000CCCCF0F0FCFC;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y5_N46
-dffeas \soc_inst|m0_1|u_logic|Ajn2z4 (
+// Location: FF_X24_Y11_N41
+dffeas \soc_inst|m0_1|u_logic|Ggk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ajn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ggk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ajn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ggk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ggk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4~1 (
+// Location: LABCELL_X24_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q1ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Po83z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gf73z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gju2z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ajn2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ohh3z4~q  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ggk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ohh3z4~q  & ( ((\soc_inst|m0_1|u_logic|U71xx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Ggk2z4~q )) # (\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gf73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Po83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gju2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ajn2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ggk2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .lut_mask = 64'hFF00F0F0AAAACCCC;
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .lut_mask = 64'h44FF444444FF4444;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4 (
+// Location: LABCELL_X29_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc13z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q1ywx4~combout  = ( \soc_inst|m0_1|u_logic|Q1ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q1ywx4~1_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Q1ywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Q1ywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Q1ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q1ywx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Hc13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Q1ywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc13z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q1ywx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q1ywx4 .lut_mask = 64'h0000050550505555;
-defparam \soc_inst|m0_1|u_logic|Q1ywx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y9_N49
-dffeas \soc_inst|m0_1|u_logic|Wa03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wa03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wa03z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X45_Y9_N8
-dffeas \soc_inst|m0_1|u_logic|Fn33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fn33z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fn33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fn33z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X45_Y9_N26
-dffeas \soc_inst|m0_1|u_logic|Q713z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q713z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q713z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q713z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hc13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Hc13z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y10_N17
-dffeas \soc_inst|m0_1|u_logic|Wd23z4 (
+// Location: FF_X29_Y6_N50
+dffeas \soc_inst|m0_1|u_logic|Hc13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hc13z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wd23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hc13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wd23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wd23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hc13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hc13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~2 (
+// Location: LABCELL_X29_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sh5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wd23z4~q  & ( \soc_inst|m0_1|u_logic|Jw93z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Q713z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fn33z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wd23z4~q  & ( \soc_inst|m0_1|u_logic|Jw93z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Q713z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fn33z4~q ) # ((!\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wd23z4~q  & ( !\soc_inst|m0_1|u_logic|Jw93z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~q ) # (!\soc_inst|m0_1|u_logic|Q713z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fn33z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Wd23z4~q  & ( !\soc_inst|m0_1|u_logic|Jw93z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Q713z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fn33z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vhk2z4~q  & ( (\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & !\soc_inst|m0_1|u_logic|Hc13z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Vhk2z4~q  & ( ((\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Hc13z4~q )) # (\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fn33z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Q713z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wd23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hc13z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vhk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .lut_mask = 64'hFEF4AEA45E540E04;
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .lut_mask = 64'h3F0F3F0F33003300;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y9_N25
-dffeas \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE (
+// Location: FF_X25_Y8_N2
+dffeas \soc_inst|m0_1|u_logic|An73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|An73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|An73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y7_N19
-dffeas \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE (
+// Location: FF_X25_Y8_N38
+dffeas \soc_inst|m0_1|u_logic|Rek2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Rek2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X45_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sh5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE_q ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .lut_mask = 64'hF5A0F5A055005500;
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rek2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rek2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sh5wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sh5wx4~2_combout )))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sh5wx4~1_combout )))) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (((\soc_inst|m0_1|u_logic|Sh5wx4~2_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wa03z4~q ))))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wa03z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y10_N56
+dffeas \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .lut_mask = 64'h020220008A8AA888;
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~0 (
+// Location: LABCELL_X29_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Q1ywx4~combout  & ( !\soc_inst|m0_1|u_logic|Sh5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Okn2z4~q  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X563z4~q )))) # (\soc_inst|m0_1|u_logic|Okn2z4~q  & (((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X563z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Rht2z4~q  & ( \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rht2z4~q  & ( !\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rht2z4~q  & ( !\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Okn2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X563z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rht2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .lut_mask = 64'hDD0D000000000000;
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .lut_mask = 64'h0030001000200000;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[2] (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o [2] = ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o [2]),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X36_Y11_N49
+dffeas \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y8_N27
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[2]~7 (
+// Location: MLABCELL_X25_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~5 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[2]~7_combout  = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ) # (\soc_inst|ram_1|byte_select [0]) ) ) ) # ( 
-// \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ) ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rd63z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rd63z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|byte_select [0]),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rd63z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[2]~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[2]~7 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[2]~7 .lut_mask = 64'h00000C0C00003F3F;
-defparam \soc_inst|ram_1|data_to_memory[2]~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .lut_mask = 64'h0040001100400000;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y9_N45
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[2]~14 (
+// Location: MLABCELL_X25_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~7 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[2]~14_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( \soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout ) # 
-// (\soc_inst|switches_1|switch_store[0][2]~q ) ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( \soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( (\soc_inst|interconnect_1|Equal1~0_combout  & 
-// \soc_inst|switches_1|switch_store[0][2]~q ) ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( !\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( !\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Izpvx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Izpvx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|An73z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rek2z4~q )))) # (\soc_inst|m0_1|u_logic|An73z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rek2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[0][2]~q ),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|An73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rek2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Izpvx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[2]~14 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[2]~14 .lut_mask = 64'hF0F0F0F00055AAFF;
-defparam \soc_inst|interconnect_1|HRDATA[2]~14 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .lut_mask = 64'hDD0D000000000000;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|L7nvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( ((!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L7nvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y11_N37
+dffeas \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .lut_mask = 64'hA0A0A0A0A0FFA0FF;
-defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cqhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cqhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[18]~13_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[18]~13_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cqhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y11_N50
+dffeas \soc_inst|m0_1|u_logic|Nf03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nf03z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nf03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nf03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X23_Y9_N16
-dffeas \soc_inst|m0_1|u_logic|Ahw2z4 (
+// Location: FF_X25_Y10_N50
+dffeas \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cqhvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ahw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ahw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ahw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~1 (
+// Location: LABCELL_X24_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ahw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Ahw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nf03z4~q  & (\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nf03z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ahw2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nf03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L7nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .lut_mask = 64'hF5F500F531310031;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~2 (
+// Location: LABCELL_X24_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L7nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|L7nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|L7nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[18]~13_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~combout  = ( \soc_inst|m0_1|u_logic|Izpvx4~7_combout  & ( \soc_inst|m0_1|u_logic|Izpvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Izpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Izpvx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Izpvx4~1_combout  & !\soc_inst|m0_1|u_logic|Izpvx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|L7nvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L7nvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Izpvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Izpvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Izpvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Izpvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Izpvx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .lut_mask = 64'hCCC0CCC000000000;
-defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X23_Y9_N37
-dffeas \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Izpvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4 .lut_mask = 64'h0000000000008000;
+defparam \soc_inst|m0_1|u_logic|Izpvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L4bwx4~0 (
+// Location: MLABCELL_X34_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D47wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L4bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|D47wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L4bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D47wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .lut_mask = 64'h0002000000000000;
-defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D47wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D47wx4~0 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|D47wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4bwx4~0 (
+// Location: MLABCELL_X39_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S4bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Z4bwx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Zxpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|D47wx4~0_combout  & \soc_inst|m0_1|u_logic|P37wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|D47wx4~0_combout  & (\soc_inst|m0_1|u_logic|P37wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|D47wx4~0_combout  & \soc_inst|m0_1|u_logic|P37wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|D47wx4~0_combout  & \soc_inst|m0_1|u_logic|P37wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|D47wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S4bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .lut_mask = 64'hF000F00070007000;
-defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .lut_mask = 64'h00F000F000D000F0;
+defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3bwx4~0 (
+// Location: FF_X37_Y12_N2
+dffeas \soc_inst|m0_1|u_logic|Idk2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Idk2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Idk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Idk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S17wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q3bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|S4bwx4~0_combout  & ( \soc_inst|m0_1|u_logic|R40wx4~combout  & ( (!\soc_inst|m0_1|u_logic|L4bwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Uup2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( (!\soc_inst|m0_1|u_logic|L4bwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uup2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|S17wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & !\soc_inst|m0_1|u_logic|Zwcvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & \soc_inst|m0_1|u_logic|Zwcvx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L4bwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S4bwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .lut_mask = 64'h8A0000008A8A0000;
-defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S17wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S17wx4~0 .lut_mask = 64'h00AA00AA55005500;
+defparam \soc_inst|m0_1|u_logic|S17wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bmhvx4~0 (
+// Location: LABCELL_X37_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bmhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~17_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|G7x2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Rhnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wspvx4~combout  & (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Idk2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wspvx4~combout  & ((!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Idk2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~17_sumout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bmhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rhnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .lut_mask = 64'hCF8BCF8B00000000;
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .lut_mask = 64'h3330333003000300;
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bmhvx4~1 (
+// Location: LABCELL_X37_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bmhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Bmhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~33_sumout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|U0vvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Bmhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|U0vvx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Rhnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rhnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & (((!\soc_inst|m0_1|u_logic|K0qvx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Izpvx4~combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (((!\soc_inst|m0_1|u_logic|Izpvx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rhnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # (\soc_inst|m0_1|u_logic|K0qvx4~combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bmhvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rhnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .lut_mask = 64'h00000000CFCF8A8A;
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .lut_mask = 64'hFBFBD1FB00000000;
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y13_N25
-dffeas \soc_inst|m0_1|u_logic|G7x2z4 (
+// Location: FF_X37_Y12_N1
+dffeas \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G7x2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G7x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G7x2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekovx4 (
+// Location: LABCELL_X36_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ekovx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (((\soc_inst|m0_1|u_logic|Add3~29_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|Add5~33_sumout )) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Add3~29_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~33_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Add3~29_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (\soc_inst|m0_1|u_logic|Add3~29_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Khnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ohh3z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0pvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ohh3z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0pvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ohh3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0pvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ohh3z4~q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~29_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ekovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ekovx4 .lut_mask = 64'h11111F1F11FF1FFF;
-defparam \soc_inst|m0_1|u_logic|Ekovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .lut_mask = 64'hFFFF000F000F000F;
+defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y6_N45
-cyclonev_lcell_comb \soc_inst|ram_1|saved_word_address[1]~feeder (
+// Location: LABCELL_X36_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khnvx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|saved_word_address[1]~feeder_combout  = ( \soc_inst|m0_1|u_logic|Ekovx4~combout  )
+// \soc_inst|m0_1|u_logic|Khnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|V2qvx4~combout  & ( !\soc_inst|m0_1|u_logic|Khnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Jux2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|V2qvx4~combout  & ( !\soc_inst|m0_1|u_logic|Khnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Jux2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Khnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|saved_word_address[1]~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[1]~feeder .extended_lut = "off";
-defparam \soc_inst|ram_1|saved_word_address[1]~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|ram_1|saved_word_address[1]~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .lut_mask = 64'h8C8CAFAF00000000;
+defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X18_Y6_N46
-dffeas \soc_inst|ram_1|saved_word_address[1] (
+// Location: FF_X36_Y11_N56
+dffeas \soc_inst|m0_1|u_logic|Ohh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|saved_word_address[1]~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [1]),
+	.q(\soc_inst|m0_1|u_logic|Ohh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[1] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ohh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ohh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N54
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[1]~1 (
+// Location: MLABCELL_X25_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qh72z4~0 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[1]~1_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & (\soc_inst|m0_1|u_logic|Ekovx4~combout )) # (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|saved_word_address [1]))) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [1] ) )
+// \soc_inst|m0_1|u_logic|Qh72z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rek2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.datad(!\soc_inst|ram_1|saved_word_address [1]),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rek2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[1]~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qh72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .lut_mask = 64'h00FF00FF0A5F0A5F;
-defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .lut_mask = 64'h0000200000000000;
+defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N15
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[17]~10 (
+// Location: FF_X25_Y10_N49
+dffeas \soc_inst|m0_1|u_logic|Tiz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tiz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tiz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tiz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~2 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[17]~10_combout  = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( (!\soc_inst|ram_1|byte_select [2] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) # (\soc_inst|ram_1|byte_select [2] & 
-// ((!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Tf72z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Tiz2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nf03z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select [2]),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nf03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tiz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[17]~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tf72z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[17]~10 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[17]~10 .lut_mask = 64'h000000005F505F50;
-defparam \soc_inst|ram_1|data_to_memory[17]~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .lut_mask = 64'h000000008080C000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y5_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 (
-	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[17]~10_combout ,\soc_inst|ram_1|data_to_memory[9]~9_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_bit_number = 9;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_bit_number = 9;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000396D9EC5014763FC5AF14D427C1F07C9D0710710710710710710717F1555555555555553706000000000000000000000000";
+// Location: FF_X30_Y11_N8
+dffeas \soc_inst|m0_1|u_logic|I453z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I453z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I453z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I453z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N6
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[9]~9 (
+// Location: LABCELL_X30_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[9]~9_combout  = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( (!\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout )) # (\soc_inst|ram_1|byte_select [1] & 
-// ((!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Tf72z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|I453z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Zu33z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|I453z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Zu33z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [1]),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zu33z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I453z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[9]~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tf72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[9]~9 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[9]~9 .lut_mask = 64'h000000005F0A5F0A;
-defparam \soc_inst|ram_1|data_to_memory[9]~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .lut_mask = 64'h00000A0200000800;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y10_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jqhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jqhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[20]~7_combout  & ( (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|interconnect_1|Equal1~0_combout  & (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) # 
-// (\soc_inst|interconnect_1|Equal1~0_combout  & ((!\soc_inst|switches_1|switch_store[1][1]~q )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[20]~7_combout  )
-
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[1][1]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jqhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y11_N38
+dffeas \soc_inst|m0_1|u_logic|Aez2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aez2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .lut_mask = 64'hFFFFFFFFFBF8FBF8;
-defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aez2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aez2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y10_N13
-dffeas \soc_inst|m0_1|u_logic|Mfw2z4 (
+// Location: FF_X29_Y6_N11
+dffeas \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jqhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ql23z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mfw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mfw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mfw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pqrvx4~0 (
+// Location: LABCELL_X29_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pqrvx4~0_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( (\soc_inst|switches_1|switch_store[1][1]~q  & (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & \soc_inst|interconnect_1|HRDATA[20]~7_combout )) ) ) # ( 
-// !\soc_inst|interconnect_1|Equal1~0_combout  & ( (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & (\soc_inst|interconnect_1|HRDATA[20]~7_combout  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) ) )
+// \soc_inst|m0_1|u_logic|Tf72z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hc13z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|switches_1|switch_store[1][1]~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hc13z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pqrvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tf72z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .lut_mask = 64'h0003000301010101;
-defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .lut_mask = 64'h000088000000C000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S7nvx4~0 (
+// Location: LABCELL_X30_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S7nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rxl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[1]~21_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rxl2z4~q  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[1]~21_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Tf72z4~3_combout  = ( \soc_inst|m0_1|u_logic|Aez2z4~q  & ( !\soc_inst|m0_1|u_logic|Tf72z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qh72z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tf72z4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|Tf72z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aez2z4~q  & ( !\soc_inst|m0_1|u_logic|Tf72z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qh72z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tf72z4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Tf72z4~0_combout  & !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qh72z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tf72z4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tf72z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Aez2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tf72z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S7nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tf72z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .lut_mask = 64'h30203020F0A0F0A0;
-defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .lut_mask = 64'h8000808000000000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S7nvx4~1 (
+// Location: LABCELL_X30_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Esnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|S7nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # ((\soc_inst|m0_1|u_logic|Dwl2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & (\soc_inst|m0_1|u_logic|Mfw2z4~q  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Esnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ohh3z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (\soc_inst|m0_1|u_logic|Ohh3z4~q  & (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Hak2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|Tf72z4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Ohh3z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Tf72z4~3_combout ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mfw2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S7nvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tf72z4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .lut_mask = 64'h000000008CAF8CAF;
-defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .lut_mask = 64'h1013DCDF1010DCDC;
+defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y9_N28
-dffeas \soc_inst|m0_1|u_logic|Rxl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V2qvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V2qvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~13_sumout  & ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~13_sumout  & ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~13_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~13_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~13_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rxl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rxl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V2qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V2qvx4 .lut_mask = 64'hCCFF88AAC0F080A0;
+defparam \soc_inst|m0_1|u_logic|V2qvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~0 (
+// Location: LABCELL_X30_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rblwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qem2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|S6ovx4~2_combout  = ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (\soc_inst|m0_1|u_logic|V2qvx4~combout  & (!\soc_inst|m0_1|u_logic|haddr_o [29] & \soc_inst|m0_1|u_logic|haddr_o~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.datad(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rblwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .lut_mask = 64'h0000000022002200;
-defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .lut_mask = 64'h0050005000000000;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~1 (
+// Location: LABCELL_X30_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rblwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Enrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & \soc_inst|m0_1|u_logic|Rblwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Enrwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & ((!\soc_inst|m0_1|u_logic|Xly2z4~q ) # (\soc_inst|m0_1|u_logic|Rblwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|S6ovx4~3_combout  = ( \soc_inst|m0_1|u_logic|S6ovx4~1_combout  & ( (\soc_inst|m0_1|u_logic|U5qvx4~combout  & \soc_inst|m0_1|u_logic|S6ovx4~2_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rblwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rblwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .lut_mask = 64'hCC0CCC0C0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~2 (
+// Location: LABCELL_X29_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rblwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( \soc_inst|m0_1|u_logic|E4iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rblwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|E4iwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rxl2z4~q  & (!\soc_inst|m0_1|u_logic|Rblwx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|F4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F4nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & (((!\soc_inst|m0_1|u_logic|Mjl2z4~q  & \soc_inst|m0_1|u_logic|K3l2z4~q )))) # (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  
+// & (\soc_inst|m0_1|u_logic|hwrite_o~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|F4nvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|hwrite_o~0_combout  & \soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rblwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F4nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .lut_mask = 64'h00000B000000BB00;
-defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .lut_mask = 64'h1111111111D111D1;
+defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N2
-dffeas \soc_inst|m0_1|u_logic|Fgm2z4 (
+// Location: FF_X29_Y15_N52
+dffeas \soc_inst|m0_1|u_logic|K3l2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|F4nvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fgm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fgm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K3l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K3l2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X35_Y9_N16
-dffeas \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE (
+// Location: MLABCELL_X28_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ux4wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y20_N38
+dffeas \soc_inst|m0_1|u_logic|Bjd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Bjd3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ylbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gf73z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Gju2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gf73z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Ajn2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gf73z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Gju2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gf73z4~q  & ( (\soc_inst|m0_1|u_logic|Ajn2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Gju2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ajn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gf73z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .lut_mask = 64'h3300550F33FF550F;
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bjd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bjd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y7_N50
-dffeas \soc_inst|m0_1|u_logic|Psv2z4 (
+// Location: FF_X24_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|P2a3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|P2a3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|P2a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|P2a3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y9_N4
-dffeas \soc_inst|m0_1|u_logic|Vu93z4 (
+// Location: FF_X23_Y19_N22
+dffeas \soc_inst|m0_1|u_logic|Cps2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vu93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cps2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vu93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vu93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cps2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cps2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y9_N7
-dffeas \soc_inst|m0_1|u_logic|Mhn2z4 (
+// Location: LABCELL_X24_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S9ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mjl2z4~q  & ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & (\soc_inst|m0_1|u_logic|Cps2z4~q  & \soc_inst|m0_1|u_logic|Lz93z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Ffs2z4~q  & ((!\soc_inst|m0_1|u_logic|Lz93z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & ((\soc_inst|m0_1|u_logic|Lz93z4~q ) # 
+// (\soc_inst|m0_1|u_logic|P2a3z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|S9ywx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .lut_mask = 64'h0000000022AA550A;
+defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y18_N16
+dffeas \soc_inst|m0_1|u_logic|Azs2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mhn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Azs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mhn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Azs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Azs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4~0 (
+// Location: LABCELL_X24_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ylbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mhn2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yfn2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Vu93z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mhn2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Yfn2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Vu93z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Mhn2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Psv2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mhn2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Psv2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|S9ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qrp2z4~q  & ( (!\soc_inst|m0_1|u_logic|K3uvx4~0_combout  & (!\soc_inst|m0_1|u_logic|S9ywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E0uvx4~combout ) # (!\soc_inst|m0_1|u_logic|Azs2z4~q )))) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Qrp2z4~q  & ( (!\soc_inst|m0_1|u_logic|S9ywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E0uvx4~combout ) # (!\soc_inst|m0_1|u_logic|Azs2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Psv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vu93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yfn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mhn2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S9ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S9ywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .lut_mask = 64'h0055FF550F330F33;
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .lut_mask = 64'hF0A0F0A0C080C080;
+defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4 (
+// Location: LABCELL_X24_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ylbwx4~combout  = ( !\soc_inst|m0_1|u_logic|Ylbwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ylbwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ylbwx4~1_combout  
-// & ( !\soc_inst|m0_1|u_logic|Ylbwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ylbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  
-// ) ) )
+// \soc_inst|m0_1|u_logic|S9ywx4~2_combout  = ( \soc_inst|m0_1|u_logic|S9ywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wfuwx4~combout  & ((!\soc_inst|m0_1|u_logic|H8l2z4~q ) # ((!\soc_inst|m0_1|u_logic|K7pwx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Wfuwx4~combout  & (!\soc_inst|m0_1|u_logic|Ywi2z4~q  & ((!\soc_inst|m0_1|u_logic|H8l2z4~q ) # (!\soc_inst|m0_1|u_logic|K7pwx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S9ywx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|S9ywx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .lut_mask = 64'h00000000FAC8FAC8;
+defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Otxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Otxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S9ywx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (\soc_inst|m0_1|u_logic|Bjd3z4~q  & \soc_inst|m0_1|u_logic|N1uvx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S9ywx4~2_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S9ywx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Otxwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .lut_mask = 64'h3333333300030003;
+defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Palwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Palwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( ((\soc_inst|interconnect_1|HRDATA[31]~2_combout  & \soc_inst|m0_1|u_logic|B7owx4~combout )) # (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( (((\soc_inst|interconnect_1|HRDATA[31]~2_combout  & \soc_inst|m0_1|u_logic|B7owx4~combout )) # (\soc_inst|m0_1|u_logic|Lcowx4~0_combout )) # (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) )
+
+	.dataa(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Otxwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Palwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Palwx4~0 .lut_mask = 64'h3F7F3F7F33773377;
+defparam \soc_inst|m0_1|u_logic|Palwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttwwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ttwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C3w2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|C3w2z4~q  
+// & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Wxp2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .lut_mask = 64'hCF05CF050F050F05;
+defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8nwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B8nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U2ewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ) ) )
+
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|B8nwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylbwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylbwx4 .lut_mask = 64'h5555050550500000;
-defparam \soc_inst|m0_1|u_logic|Ylbwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .lut_mask = 64'hF000F000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y7_N20
-dffeas \soc_inst|m0_1|u_logic|Cmn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cmn2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8nwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kswwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Wxp2z4~q  & !\soc_inst|m0_1|u_logic|Palwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # (!\soc_inst|m0_1|u_logic|Palwx4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kswwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cmn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cmn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .lut_mask = 64'h0000FFFA00008C88;
+defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y9_N50
-dffeas \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE (
+// Location: LABCELL_X37_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G5qvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~29_sumout  & ( (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~29_sumout  & ( (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~29_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G5qvx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .lut_mask = 64'hA200A2000000A200;
+defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G5qvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|G5qvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nyawx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|G5qvx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Nyawx4~0_combout  & !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|G5qvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .lut_mask = 64'h0000000030003010;
+defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N2
+dffeas \soc_inst|m0_1|u_logic|Ek03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ek03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ek03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ek03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y9_N1
-dffeas \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE (
+// Location: FF_X28_Y10_N37
+dffeas \soc_inst|m0_1|u_logic|Knz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Knz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Knz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Knz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~2 (
+// Location: LABCELL_X27_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xhbwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cmn2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Oxnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Knz2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ek03z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cmn2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ek03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Knz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .lut_mask = 64'hAAAAF0F0FF00F0F0;
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .lut_mask = 64'h080800000C000000;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~1 (
+// Location: FF_X28_Y5_N56
+dffeas \soc_inst|m0_1|u_logic|Yg13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yg13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yg13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yg13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xhbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fn33z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  ) 
-// ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Q713z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Oxnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yg13z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hq23z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yg13z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Hq23z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fn33z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Q713z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hq23z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yg13z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .lut_mask = 64'h0000FF00FFFFF0F0;
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .lut_mask = 64'h3200020000000000;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y9_N26
-dffeas \soc_inst|m0_1|u_logic|Ow43z4 (
+// Location: FF_X27_Y13_N50
+dffeas \soc_inst|m0_1|u_logic|Z853z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z853z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z853z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z853z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~3 (
+// Location: LABCELL_X27_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xhbwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ow43z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|X563z4~q ))) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wd23z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Oxnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Z853z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Qz33z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ow43z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|X563z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wd23z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z853z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qz33z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .lut_mask = 64'h0F000F0055335533;
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .lut_mask = 64'h0030002200000000;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~0 (
+// Location: LABCELL_X27_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhbwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xhbwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (\soc_inst|m0_1|u_logic|Xhbwx4~2_combout )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oxnvx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cawwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Iwp2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Cawwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Iwp2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .lut_mask = 64'h1300DF0002000200;
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .lut_mask = 64'hFF00FF00FFFF7F7F;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qrnvx4~0 (
+// Location: LABCELL_X30_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N5qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U4z2z4~q  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|U4z2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~q )) 
-// ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|U4z2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ylbwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|U4z2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|N5qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Oxnvx4~3_combout )))) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout  & (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Oxnvx4~3_combout )) # (\soc_inst|m0_1|u_logic|Add5~29_sumout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~29_sumout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhbwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .lut_mask = 64'h0F330FAA0F330F00;
-defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .lut_mask = 64'h0505050505370537;
+defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asbvx4 (
+// Location: LABCELL_X29_Y16_N30
+cyclonev_lcell_comb \soc_inst|ram_1|byte1~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Asbvx4~combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  ) ) # ( 
-// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Donvx4~2_combout 
-// ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) ) )
+// \soc_inst|ram_1|byte1~0_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|T50wx4~0_combout  & \soc_inst|m0_1|u_logic|N5qvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|T50wx4~0_combout  & !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Asbvx4~combout ),
+	.combout(\soc_inst|ram_1|byte1~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Asbvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Asbvx4 .lut_mask = 64'h3333B333FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Asbvx4 .shared_arith = "off";
+defparam \soc_inst|ram_1|byte1~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte1~0 .lut_mask = 64'hCFCF8F8FCFCF0FAF;
+defparam \soc_inst|ram_1|byte1~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y13_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imhvx4~0 (
+// Location: FF_X29_Y16_N31
+dffeas \soc_inst|ram_1|byte_select[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|byte1~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|byte_select [1]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[1] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y16_N24
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[14]~30 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Imhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~25_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|J4x2z4~q )))) ) )
+// \soc_inst|ram_1|data_to_memory[14]~30_combout  = ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (!\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout )) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ) # (\soc_inst|ram_1|byte_select [1]))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~25_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|byte_select [1]),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Imhvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[14]~30_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .lut_mask = 64'hC8FBC8FB00000000;
-defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[14]~30 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[14]~30 .lut_mask = 64'h030F030F000C000C;
+defparam \soc_inst|ram_1|data_to_memory[14]~30 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y13_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imhvx4~1 (
+// Location: LABCELL_X29_Y18_N0
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[30]~34 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Imhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Imhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~101_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Imhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Add5~101_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) )
+// \soc_inst|interconnect_1|HRDATA[30]~34_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  & ( (!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Imhvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .lut_mask = 64'h0000A8A80000FCFC;
-defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[30]~34 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[30]~34 .lut_mask = 64'hF000F000FF0FFF0F;
+defparam \soc_inst|interconnect_1|HRDATA[30]~34 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y13_N34
-dffeas \soc_inst|m0_1|u_logic|J4x2z4 (
+// Location: LABCELL_X31_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wmhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wmhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[30]~34_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[30]~34_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wmhvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .lut_mask = 64'hFFFFFFFFFF00FF00;
+defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y17_N31
+dffeas \soc_inst|m0_1|u_logic|Qzw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wmhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qzw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J4x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J4x2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qzw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qzw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uzvvx4~0 (
+// Location: LABCELL_X30_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uzvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fcj2z4~q  & ( !\soc_inst|m0_1|u_logic|J4x2z4~q  $ (((!\soc_inst|m0_1|u_logic|Tyx2z4~q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|J4x2z4~q  $ (((\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Hxx2z4~q  $ (!\soc_inst|m0_1|u_logic|Tyx2z4~q ))))) ) )
+// \soc_inst|m0_1|u_logic|M4nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qzw2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Qzw2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qzw2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|M4nvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .lut_mask = 64'hCCCC0000FCFCF0F0;
+defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout  & (((\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout )))) # 
+// (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ((\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout )))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout ) ) )
+
+	.dataa(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fey2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uzvvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N8nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .lut_mask = 64'hF096F096F03CF03C;
-defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .lut_mask = 64'h0FFF0FFF0EEE0EEE;
+defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fvovx4 (
+// Location: FF_X28_Y17_N2
+dffeas \soc_inst|m0_1|u_logic|Fey2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|N8nvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fey2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fey2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fey2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fvovx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ) # (((\soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~101_sumout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~101_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (\soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|M4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fey2z4~q ) # ((\soc_inst|interconnect_1|HRDATA[11]~3_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & 
+// \soc_inst|m0_1|u_logic|Vapvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & 
+// \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uzvvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fey2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|M4nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fvovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fvovx4 .lut_mask = 64'h1111F1F111FFF1FF;
-defparam \soc_inst|m0_1|u_logic|Fvovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .lut_mask = 64'h01010101FF01FF01;
+defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N27
-cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~2 (
+// Location: LABCELL_X35_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~2 (
 // Equation(s):
-// \soc_inst|switches_1|half_word_address~2_combout  = (\soc_inst|m0_1|u_logic|Fvovx4~combout  & \soc_inst|switches_1|half_word_address~1_combout )
+// \soc_inst|m0_1|u_logic|M4nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|M4nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|M4nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[30]~34_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.datad(!\soc_inst|switches_1|half_word_address~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|M4nvx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M4nvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|half_word_address~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address~2 .extended_lut = "off";
-defparam \soc_inst|switches_1|half_word_address~2 .lut_mask = 64'h000F000F000F000F;
-defparam \soc_inst|switches_1|half_word_address~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .lut_mask = 64'hF0C0F0C000000000;
+defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X18_Y5_N29
-dffeas \soc_inst|switches_1|half_word_address[1] (
+// Location: FF_X35_Y13_N40
+dffeas \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|half_word_address~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -89964,1392 +90776,1250 @@ dffeas \soc_inst|switches_1|half_word_address[1] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|half_word_address [1]),
+	.q(\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address[1] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|half_word_address[1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N9
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~19 (
+// Location: LABCELL_X33_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md6wx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[1]~19_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~37_combout  & \soc_inst|switches_1|half_word_address [1]) ) ) # ( !\soc_inst|interconnect_1|Equal1~0_combout  & ( 
-// !\soc_inst|interconnect_1|HRDATA[1]~37_combout  ) )
+// \soc_inst|m0_1|u_logic|Md6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
-	.datad(!\soc_inst|switches_1|half_word_address [1]),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Md6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[1]~19 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[1]~19 .lut_mask = 64'hF0F0F0F000F000F0;
-defparam \soc_inst|interconnect_1|HRDATA[1]~19 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .lut_mask = 64'h0000000050005000;
+defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N54
-cyclonev_lcell_comb \soc_inst|switches_1|DataValid~0 (
+// Location: MLABCELL_X34_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dc6wx4~0 (
 // Equation(s):
-// \soc_inst|switches_1|DataValid~0_combout  = ( \soc_inst|switches_1|DataValid [1] & ( \soc_inst|switches_1|read_enable~q  & ( (!\soc_inst|switches_1|half_word_address [0]) # (((!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o )) # 
-// (\soc_inst|switches_1|half_word_address [1])) ) ) ) # ( !\soc_inst|switches_1|DataValid [1] & ( \soc_inst|switches_1|read_enable~q  & ( (!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o ) ) ) ) # ( \soc_inst|switches_1|DataValid [1] & ( 
-// !\soc_inst|switches_1|read_enable~q  ) ) # ( !\soc_inst|switches_1|DataValid [1] & ( !\soc_inst|switches_1|read_enable~q  & ( (!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o ) ) ) )
+// \soc_inst|m0_1|u_logic|Dc6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Md6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|G97wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|switches_1|half_word_address [0]),
-	.datab(!\soc_inst|switches_1|half_word_address [1]),
-	.datac(!\soc_inst|switches_1|last_buttons [1]),
-	.datad(!\KEY[1]~input_o ),
-	.datae(!\soc_inst|switches_1|DataValid [1]),
-	.dataf(!\soc_inst|switches_1|read_enable~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Md6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|DataValid~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dc6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|DataValid~0 .extended_lut = "off";
-defparam \soc_inst|switches_1|DataValid~0 .lut_mask = 64'hF000FFFFF000FBBB;
-defparam \soc_inst|switches_1|DataValid~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .lut_mask = 64'hAAA2AAA200000000;
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y11_N55
-dffeas \soc_inst|switches_1|DataValid[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|DataValid~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|DataValid [1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|DataValid[1] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|DataValid[1] .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X37_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ae6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ae6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
 
-// Location: FF_X24_Y5_N38
-dffeas \soc_inst|switches_1|switch_store[0][1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[1]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][1]~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][1] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .lut_mask = 64'h0000000000CC00CC;
+defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N45
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[1]~12 (
+// Location: LABCELL_X35_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dc6wx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[1]~12_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ) # (\soc_inst|ram_1|byte_select [0]))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( (!\soc_inst|ram_1|byte_select [0] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout )) ) )
+// \soc_inst|m0_1|u_logic|Dc6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dc6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  & \soc_inst|m0_1|u_logic|B1vvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dc6wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [0]),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Dc6wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.dataf(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[1]~12_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[1]~12 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[1]~12 .lut_mask = 64'h000A000A050F050F;
-defparam \soc_inst|ram_1|data_to_memory[1]~12 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .lut_mask = 64'h3030303000300030;
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X14_Y3_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[25]~11_combout ,\soc_inst|ram_1|data_to_memory[1]~12_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_bit_number = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_bit_number = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B6CF6C2BE25FCC0210494BF83E4F93E0F94F94F94F94F94F94F94817FFFFFFFFFFFFC338EC000000000000000000000000";
+// Location: LABCELL_X35_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .lut_mask = 64'h0000000050505050;
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y7_N48
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[25]~11 (
+// Location: LABCELL_X36_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iikwx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[25]~11_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( \soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( \soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|byte_select [3]) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( !\soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select [3]) ) ) )
+// \soc_inst|m0_1|u_logic|Iikwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) 
+// ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select [3]),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[25]~11_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[25]~11 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[25]~11 .lut_mask = 64'h0000505005055555;
-defparam \soc_inst|ram_1|data_to_memory[25]~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .lut_mask = 64'h0000000000004040;
+defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N36
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~21 (
+// Location: MLABCELL_X39_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpjwx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[1]~21_combout  = ( \soc_inst|switches_1|switch_store[0][1]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & 
-// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [1])))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][1]~q  & ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & (!\soc_inst|interconnect_1|HRDATA[1]~20_combout ))) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (((\soc_inst|switches_1|DataValid [1]) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout )))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][1]~q  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # ((\soc_inst|interconnect_1|HRDATA[1]~20_combout )))) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (((!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & \soc_inst|switches_1|DataValid [1])))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][1]~q  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [1]))))) ) ) )
+// \soc_inst|m0_1|u_logic|Gpjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Swy2z4~q )) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
-	.datad(!\soc_inst|switches_1|DataValid [1]),
-	.datae(!\soc_inst|switches_1|switch_store[0][1]~q ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[1]~21 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[1]~21 .lut_mask = 64'h80B08CBC83B38FBF;
-defparam \soc_inst|interconnect_1|HRDATA[1]~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .lut_mask = 64'h00C000C0C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hcnvx4~0 (
+// Location: LABCELL_X42_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ua6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hcnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dwl2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dwl2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[1]~21_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Dwl2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[1]~21_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dwl2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[1]~21_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ua6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Rexvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hcnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .lut_mask = 64'h0E000E0EEE00EEEE;
-defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y9_N49
-dffeas \soc_inst|m0_1|u_logic|Dwl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hcnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X42_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q86wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ua6wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dwl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dwl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .lut_mask = 64'hC0C0C0C0C000C000;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y14_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Acnvx4~0 (
+// Location: MLABCELL_X39_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Acnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q86wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Y6t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q86wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Y6t2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .lut_mask = 64'h0A025F13AA22FF33;
-defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .lut_mask = 64'h00000000EEEEE0E0;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y14_N37
-dffeas \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X39_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bkxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .lut_mask = 64'hF030F03050105010;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sta2z4~0 (
+// Location: LABCELL_X42_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xf6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sta2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Xf6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Kzxvx4~combout  & \soc_inst|m0_1|u_logic|L8t2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .lut_mask = 64'h00000000A000A000;
-defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .lut_mask = 64'h0003000322332233;
+defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y10_N1
-dffeas \soc_inst|m0_1|u_logic|Uyv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uyv2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X40_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uv6wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uv6wx4~combout  = ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|interconnect_1|HREADY~0_combout  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout 
+//  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uyv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uyv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uv6wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uv6wx4 .lut_mask = 64'h0F0F0F0F0A000A00;
+defparam \soc_inst|m0_1|u_logic|Uv6wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zx3wx4~0 (
+// Location: LABCELL_X35_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dj6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( \soc_inst|m0_1|u_logic|Cr0xx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( !\soc_inst|m0_1|u_logic|Cr0xx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Kofwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .lut_mask = 64'h00000F0F0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6mvx4~0 (
+// Location: LABCELL_X40_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qf6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H6mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uyv2z4~q  & ( \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Uyv2z4~q  & ( \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Uyv2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Zx3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # ((\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Uaj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qf6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qf6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .lut_mask = 64'h0000EFFFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y10_N2
-dffeas \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X39_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uijwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uijwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .lut_mask = 64'hC000C00000C000C0;
+defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4pwx4~0 (
+// Location: LABCELL_X40_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S4pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wbk2z4~q  & ( (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Uqi2z4~q  & ((!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q 
-// ) # (\soc_inst|m0_1|u_logic|X9n2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wbk2z4~q  & ( (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Uqi2z4~q )) # (\soc_inst|m0_1|u_logic|X9n2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wbk2z4~q  & ( \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wbk2z4~q  & ( \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uv6wx4~combout  & (((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Qf6wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qf6wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .lut_mask = 64'h5555555555150501;
-defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .lut_mask = 64'h0F0F0F0F0F0D0F0D;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~1 (
+// Location: LABCELL_X42_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X2rvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & \soc_inst|m0_1|u_logic|I6pwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Lu6wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|U2x2z4~q ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Q86wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Lu6wx4~0_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Q86wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X2rvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .lut_mask = 64'hFCFC0C0C00000000;
-defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .lut_mask = 64'h0000FFFF00007F7F;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~2 (
+// Location: MLABCELL_X39_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X2rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout  & \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout  & \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|X2rvx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Q86wx4~1_combout  & (\soc_inst|m0_1|u_logic|Bkxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X2rvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q86wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .lut_mask = 64'h000F0C0C0F0F0C0C;
-defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .lut_mask = 64'h0000000010001000;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tbnvx4~0 (
+// Location: LABCELL_X35_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( \soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( \soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( !\soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( (!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( !\soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # ((\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .lut_mask = 64'hF050FF55C040CC44;
-defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .lut_mask = 64'h00000000AFAAAFAA;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y9_N43
-dffeas \soc_inst|m0_1|u_logic|Lbn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X35_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q86wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Iikwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q86wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iikwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q86wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~5_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~6_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lbn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lbn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .lut_mask = 64'h0000000033FF30F0;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~0 (
+// Location: LABCELL_X40_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rxl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rxl2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Lbn2z4~q  & 
-// \soc_inst|m0_1|u_logic|Irqvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .lut_mask = 64'h33F333F300F000F0;
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .lut_mask = 64'h000000000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~1 (
+// Location: LABCELL_X29_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|G27wx4~2_combout  = (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pty2z4~q )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .lut_mask = 64'hCF00CF0045004500;
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~2 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|G27wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~2 (
+// Location: LABCELL_X42_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4xvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z4xvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~q  $ (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fzl2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ (((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Zoy2z4~q 
+// ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .lut_mask = 64'h000000000000F03C;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jm6wx4~3_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & ((!\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jm6wx4~1_combout 
+// )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z4xvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .lut_mask = 64'h000000009F3F9F3F;
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .lut_mask = 64'h000000000E0C0E0C;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6xvx4~0 (
+// Location: LABCELL_X37_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ad7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I6xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y7xvx4~combout  $ (!\soc_inst|m0_1|u_logic|Gqxvx4~combout  $ (!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ad7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I6xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .lut_mask = 64'h0000000096969696;
-defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .lut_mask = 64'h00000000F5F5F5F5;
+defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~3 (
+// Location: LABCELL_X29_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4xvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I6xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z4xvx4~0_combout  & \soc_inst|m0_1|u_logic|Z4xvx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I6xvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Z4xvx4~0_combout  & \soc_inst|m0_1|u_logic|Z4xvx4~2_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & ((!\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|Pty2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Pty2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4xvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I6xvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .lut_mask = 64'h003000F000000000;
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .lut_mask = 64'hC0C0CCCCC0C0C8C8;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y7_N31
-dffeas \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X42_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hyewx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hyewx4~combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yzi2z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hyewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hyewx4 .lut_mask = 64'h0000000000000505;
+defparam \soc_inst|m0_1|u_logic|Hyewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tzxwx4~0 (
+// Location: LABCELL_X29_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tzxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q1ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Q1ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyewx4~combout  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .lut_mask = 64'h2020202020AA20AA;
-defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .lut_mask = 64'h0000000000100010;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pkwwx4~0 (
+// Location: LABCELL_X29_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  $ (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Xly2z4~q  & ( \soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( \soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xly2z4~q  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .lut_mask = 64'hF00FF00FF0C3F0C3;
-defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .lut_mask = 64'h0A0A0A0A0A0A0E0A;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vr7wx4~0 (
+// Location: MLABCELL_X34_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P28wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vr7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & \soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|P28wx4~combout  = ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Wai2z4~q )) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & ((!\soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE_q ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( 
+// !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (!\soc_inst|m0_1|u_logic|Wai2z4~q )) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & ((!\soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE_q ))))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Qb3wx4~combout  & !\soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P28wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .lut_mask = 64'hAAAFAAAF00000000;
-defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P28wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P28wx4 .lut_mask = 64'hA5AA656A959A555A;
+defparam \soc_inst|m0_1|u_logic|P28wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R7iwx4~0 (
+// Location: LABCELL_X35_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Blwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R7iwx4~0_combout  = (\soc_inst|m0_1|u_logic|Vr7wx4~0_combout  & \soc_inst|m0_1|u_logic|E6nwx4~0_combout )
+// \soc_inst|m0_1|u_logic|Blwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .lut_mask = 64'h000F000F000F000F;
-defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4 (
+// Location: MLABCELL_X34_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3pvx4~combout  = ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~6_combout  = (!\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & \soc_inst|m0_1|u_logic|Qem2z4~q )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3pvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3pvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3pvx4 .lut_mask = 64'h00000000777F777F;
-defparam \soc_inst|m0_1|u_logic|O3pvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .lut_mask = 64'h00F000F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~0 (
+// Location: LABCELL_X37_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q07wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~29_sumout  & ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Q07wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Swy2z4~q  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q07wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .lut_mask = 64'hF0F0F0F0AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~1 (
+// Location: LABCELL_X36_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xt6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & ((\soc_inst|m0_1|u_logic|F9pvx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|F9pvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|F9pvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|F9pvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xt6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Zei2z4~q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Swy2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Zei2z4~q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Swy2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .lut_mask = 64'h5D005D005D005F00;
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .lut_mask = 64'h0303303002022020;
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~2 (
+// Location: MLABCELL_X34_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q07wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojnvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|Ojnvx4~1_combout  & ( ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|O3pvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|X4pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|Ojnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout  & 
-// (\soc_inst|m0_1|u_logic|J4pvx4~1_combout )) # (\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|O3pvx4~combout ))))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|J4pvx4~1_combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Z7i2z4~q  & ( !\soc_inst|m0_1|u_logic|Ojnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J4pvx4~1_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Q07wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (((\soc_inst|m0_1|u_logic|Wai2z4~q ) # (\soc_inst|m0_1|u_logic|Fc7wx4~1_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (\soc_inst|m0_1|u_logic|Gci2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (((\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & !\soc_inst|m0_1|u_logic|Wai2z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (\soc_inst|m0_1|u_logic|Gci2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J4pvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O3pvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q07wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .lut_mask = 64'h0000A2A2515DF3FF;
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y12_N55
-dffeas \soc_inst|m0_1|u_logic|Z7i2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z7i2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z7i2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z7i2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X36_Y5_N38
-dffeas \soc_inst|m0_1|u_logic|Iwp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Iwp2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iwp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Iwp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .lut_mask = 64'h1D111D111DDD1DDD;
+defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~1 (
+// Location: LABCELL_X37_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X07wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D4mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Iwp2z4~q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Iwp2z4~q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
+// \soc_inst|m0_1|u_logic|X07wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q 
+// ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Pty2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Iwp2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D4mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X07wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .lut_mask = 64'hAA00AA00FAF0FAF0;
-defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X07wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X07wx4~0 .lut_mask = 64'hEE88E0800000E080;
+defparam \soc_inst|m0_1|u_logic|X07wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~2 (
+// Location: MLABCELL_X34_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xt6wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D4mvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|D4mvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D4mvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Z7i2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( \soc_inst|m0_1|u_logic|X07wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q07wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X07wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q07wx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X07wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D4mvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D4mvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q07wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Q07wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X07wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .lut_mask = 64'hFBF0FBF000000000;
-defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y5_N37
-dffeas \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .lut_mask = 64'hFFA0CC8000003320;
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~1 (
+// Location: MLABCELL_X34_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oxnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yg13z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hq23z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yg13z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hq23z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yg13z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Jm6wx4~6_combout  & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  $ 
+// (((\soc_inst|m0_1|u_logic|Ad7wx4~0_combout  & \soc_inst|m0_1|u_logic|P28wx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jm6wx4~6_combout  & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Jm6wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & \soc_inst|m0_1|u_logic|Bsy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jm6wx4~6_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hq23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yg13z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|P28wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .lut_mask = 64'h5000400000004000;
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y9_N26
-dffeas \soc_inst|m0_1|u_logic|Ek03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ek03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ek03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ek03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .lut_mask = 64'hCCCC0C0CCCCCC084;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~2 (
+// Location: MLABCELL_X34_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eyhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oxnvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Ek03z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Knz2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Eyhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( ((\soc_inst|m0_1|u_logic|Q86wx4~6_combout  & !\soc_inst|m0_1|u_logic|Jm6wx4~3_combout )) # 
+// (\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Q86wx4~6_combout ) # (\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( ((\soc_inst|m0_1|u_logic|Q86wx4~6_combout  & (!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout  & \soc_inst|m0_1|u_logic|U2x2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Q86wx4~6_combout ) # (\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Knz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ek03z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q86wx4~6_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .lut_mask = 64'h0000A82000000000;
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .lut_mask = 64'h7777557577777575;
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y13_N52
-dffeas \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE (
+// Location: FF_X34_Y13_N49
+dffeas \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qz33z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Oxnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Z853z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Z853z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Z853z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z853z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .lut_mask = 64'h0202000202000000;
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~3 (
+// Location: LABCELL_X33_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( ((\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oxnvx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Cawwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Cawwx4~combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Donvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Donvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .lut_mask = 64'hAAAAFFFFAAAA3FFF;
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~0 .lut_mask = 64'hFA330000FAFF0000;
+defparam \soc_inst|m0_1|u_logic|Donvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N5qvx4~0 (
+// Location: LABCELL_X33_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N5qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~29_sumout  & ( ((\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) # 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~29_sumout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) ) )
+// \soc_inst|m0_1|u_logic|G97wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( ((\soc_inst|m0_1|u_logic|Emi2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G97wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .lut_mask = 64'h001100110F1F0F1F;
-defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~2 .lut_mask = 64'h0000000030FF30FF;
+defparam \soc_inst|m0_1|u_logic|G97wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~1 (
+// Location: LABCELL_X33_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S6ovx4~1_combout  = ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|It52z4~2_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & !\soc_inst|m0_1|u_logic|It52z4~2_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & (!\soc_inst|m0_1|u_logic|It52z4~2_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|S6ovx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Donvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sgj2z4~q )))) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S6ovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Donvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .lut_mask = 64'h3333001010100010;
-defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~1 .lut_mask = 64'h0000000035303030;
+defparam \soc_inst|m0_1|u_logic|Donvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Va62z4 (
+// Location: LABCELL_X33_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Va62z4~combout  = (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~9_sumout )
+// \soc_inst|m0_1|u_logic|G97wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add3~9_sumout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Va62z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|G97wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Va62z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Va62z4 .lut_mask = 64'h000F000F000F000F;
-defparam \soc_inst|m0_1|u_logic|Va62z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~1 .lut_mask = 64'h00FF00F500FF00FF;
+defparam \soc_inst|m0_1|u_logic|G97wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o[29]~2 (
+// Location: LABCELL_X33_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Donvx4~2_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( \soc_inst|m0_1|u_logic|G97wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Donvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Donvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( \soc_inst|m0_1|u_logic|G97wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Donvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Donvx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G97wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Donvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|G97wx4~2_combout  & !\soc_inst|m0_1|u_logic|Donvx4~1_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G97wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Donvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .lut_mask = 64'hF3F3F3F3F300F300;
-defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~2 .lut_mask = 64'h0000200022002200;
+defparam \soc_inst|m0_1|u_logic|Donvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H362z4~0 (
+// Location: LABCELL_X19_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H362z4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ojnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~29_sumout  & ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H362z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H362z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H362z4~0 .lut_mask = 64'hDDDDDDDDD0D0D0D0;
-defparam \soc_inst|m0_1|u_logic|H362z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X19_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|htrans_o[1]~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( \soc_inst|m0_1|u_logic|H362z4~0_combout  & ( (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & (\soc_inst|m0_1|u_logic|E7mwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Va62z4~combout ) # (\soc_inst|m0_1|u_logic|Add3~1_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( \soc_inst|m0_1|u_logic|H362z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Va62z4~combout  & 
-// (\soc_inst|m0_1|u_logic|Add3~1_sumout  & (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & \soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( !\soc_inst|m0_1|u_logic|H362z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|E7mwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( !\soc_inst|m0_1|u_logic|H362z4~0_combout  & ( (\soc_inst|m0_1|u_logic|E7mwx4~combout  & ((!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Va62z4~combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Va62z4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|H362z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .lut_mask = 64'h00F500FF0001000B;
-defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .lut_mask = 64'h00000000CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N21
-cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~1 (
+// Location: MLABCELL_X21_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~1 (
 // Equation(s):
-// \soc_inst|switches_1|half_word_address~1_combout  = ( \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & (((\soc_inst|m0_1|u_logic|S6ovx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|S6ovx4~2_combout )) # (\soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ojnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & \soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
-	.datae(!\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|half_word_address~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address~1 .extended_lut = "off";
-defparam \soc_inst|switches_1|half_word_address~1 .lut_mask = 64'h0000000000007500;
-defparam \soc_inst|switches_1|half_word_address~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .lut_mask = 64'h2222AA222222AA2A;
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N36
-cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~3 (
+// Location: MLABCELL_X21_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~2 (
 // Equation(s):
-// \soc_inst|switches_1|half_word_address~3_combout  = ( \soc_inst|switches_1|half_word_address~0_combout  & ( \soc_inst|switches_1|half_word_address~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Ojnvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|O3pvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|J4pvx4~1_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|X4pvx4~combout )))) # (\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|O3pvx4~combout  & ( (\soc_inst|m0_1|u_logic|Ojnvx4~1_combout  & 
+// (((!\soc_inst|m0_1|u_logic|X4pvx4~combout  & \soc_inst|interconnect_1|HREADY~0_combout )) # (\soc_inst|m0_1|u_logic|J4pvx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z7i2z4~q  & ( !\soc_inst|m0_1|u_logic|O3pvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & (!\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|J4pvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ojnvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & 
+// (((!\soc_inst|m0_1|u_logic|J4pvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ojnvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( !\soc_inst|m0_1|u_logic|O3pvx4~combout  & ( (\soc_inst|m0_1|u_logic|J4pvx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Ojnvx4~1_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|switches_1|half_word_address~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|switches_1|half_word_address~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J4pvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|half_word_address~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address~3 .extended_lut = "off";
-defparam \soc_inst|switches_1|half_word_address~3 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|switches_1|half_word_address~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .lut_mask = 64'h000DD0DD002FD0FF;
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X18_Y5_N38
-dffeas \soc_inst|switches_1|half_word_address[0] (
+// Location: FF_X21_Y13_N19
+dffeas \soc_inst|m0_1|u_logic|Z7i2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|half_word_address~3_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -91358,232 +92028,185 @@ dffeas \soc_inst|switches_1|half_word_address[0] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|half_word_address [0]),
+	.q(\soc_inst|m0_1|u_logic|Z7i2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address[0] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|half_word_address[0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z7i2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z7i2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N42
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~6 (
+// Location: LABCELL_X30_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbi3z4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[24]~6_combout  = ( \soc_inst|interconnect_1|HRDATA[8]~5_combout  & ( (!\soc_inst|interconnect_1|mux_sel [2] & ((!\soc_inst|interconnect_1|mux_sel [1]) # ((!\soc_inst|interconnect_1|mux_sel [0] & 
-// \soc_inst|switches_1|half_word_address [0])))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[8]~5_combout  & ( (!\soc_inst|interconnect_1|mux_sel [2] & !\soc_inst|interconnect_1|mux_sel [1]) ) )
+// \soc_inst|m0_1|u_logic|Rbi3z4~0_combout  = ( \soc_inst|m0_1|u_logic|E7mwx4~combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datad(!\soc_inst|switches_1|half_word_address [0]),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[8]~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rbi3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[24]~6 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[24]~6 .lut_mask = 64'h8888888888A888A8;
-defparam \soc_inst|interconnect_1|HRDATA[24]~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N39
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~17 (
+// Location: LABCELL_X31_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H362z4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[24]~17_combout  = ( \soc_inst|ram_1|byte_select [3] & ( (\soc_inst|interconnect_1|HRDATA[24]~6_combout  & (((\soc_inst|ram_1|read_cycle~q  & \soc_inst|interconnect_1|mux_sel [0])) # (\soc_inst|interconnect_1|mux_sel [1]))) 
-// ) ) # ( !\soc_inst|ram_1|byte_select [3] & ( (\soc_inst|interconnect_1|HRDATA[24]~6_combout  & \soc_inst|interconnect_1|mux_sel [1]) ) )
+// \soc_inst|m0_1|u_logic|H362z4~0_combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Add5~77_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|ram_1|read_cycle~q ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
-	.datac(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|byte_select [3]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[24]~17 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[24]~17 .lut_mask = 64'h0303030303130313;
-defparam \soc_inst|interconnect_1|HRDATA[24]~17 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y7_N35
-dffeas \soc_inst|switches_1|switch_store[1][9] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[9]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][9]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][9] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][9] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y7_N33
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[25]~18 (
-// Equation(s):
-// \soc_inst|interconnect_1|HRDATA[25]~18_combout  = ( \soc_inst|switches_1|switch_store[1][9]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
-// (\soc_inst|interconnect_1|HRDATA[24]~17_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][9]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (!\soc_inst|interconnect_1|HRDATA[24]~17_combout  & 
-// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[24]~17_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][9]~q  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (!\soc_inst|interconnect_1|HRDATA[24]~17_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[24]~17_combout  & 
-// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][9]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (!\soc_inst|interconnect_1|HRDATA[24]~17_combout  & 
-// !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) )
-
-	.dataa(!\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|switches_1|switch_store[1][9]~q ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ),
+	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H362z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[25]~18 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[25]~18 .lut_mask = 64'h88888D8DD8D8DDDD;
-defparam \soc_inst|interconnect_1|HRDATA[25]~18 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H362z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H362z4~0 .lut_mask = 64'hF3F3F3F3F300F300;
+defparam \soc_inst|m0_1|u_logic|H362z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~0 (
+// Location: LABCELL_X30_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o[29]~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (\soc_inst|interconnect_1|HRDATA[9]~16_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[9]~16_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O5nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .lut_mask = 64'hCCCFCCCF000F000F;
-defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .lut_mask = 64'hCCFFCCFFC0F0C0F0;
+defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fohvx4~0 (
+// Location: LABCELL_X18_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbi3z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fohvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~18_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Rbi3z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Va62z4~combout  & ( (!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & (\soc_inst|m0_1|u_logic|Rbi3z4~q )) # (\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & ((\soc_inst|m0_1|u_logic|H362z4~0_combout ))) # (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & (!\soc_inst|m0_1|u_logic|haddr_o~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Va62z4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & (\soc_inst|m0_1|u_logic|Rbi3z4~q )) # (\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & (((\soc_inst|m0_1|u_logic|H362z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add3~1_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout )))))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rbi3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|H362z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Va62z4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fohvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rbi3z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .lut_mask = 64'h2277227772722272;
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y8_N19
-dffeas \soc_inst|m0_1|u_logic|Urw2z4 (
+// Location: FF_X18_Y15_N17
+dffeas \soc_inst|m0_1|u_logic|Rbi3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fohvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rbi3z4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Urw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rbi3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Urw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Urw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~1 (
+// Location: LABCELL_X18_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ueovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Urw2z4~q ) # ((\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Y7y2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ueovx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|Rbi3z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Urw2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rbi3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O5nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .lut_mask = 64'h30303030BABABABA;
-defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~2 (
+// Location: LABCELL_X30_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vapvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O5nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|O5nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O5nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[25]~18_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Vapvx4~combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & (\soc_inst|m0_1|u_logic|Vaw2z4~q  & ((\soc_inst|m0_1|u_logic|Fcj2z4~q ) # (\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O5nvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5nvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vapvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vapvx4 .lut_mask = 64'h0000000001110111;
+defparam \soc_inst|m0_1|u_logic|Vapvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y8_N40
-dffeas \soc_inst|m0_1|u_logic|Pty2z4 (
+// Location: FF_X33_Y19_N56
+dffeas \soc_inst|m0_1|u_logic|Dvy2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|H5nvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -91592,755 +92215,798 @@ dffeas \soc_inst|m0_1|u_logic|Pty2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dvy2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pty2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pty2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dvy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dvy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dj6wx4~0 (
+// Location: LABCELL_X27_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Dcsvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) 
+// ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & !\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .lut_mask = 64'h00000000A0A0AFAF;
+defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vskwx4~0 (
+// Location: LABCELL_X33_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vskwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Ohwvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|H5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Dcsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[10]~12_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Dcsvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[10]~12_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H5nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .lut_mask = 64'h00F000F000000000;
-defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .lut_mask = 64'h3232FAFA00000000;
+defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H06wx4~0 (
+// Location: LABCELL_X31_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ynhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H06wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Vskwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ynhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & \soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  ) ) # ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( 
+// (\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ynhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H06wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H06wx4~0 .lut_mask = 64'h0000000000440044;
-defparam \soc_inst|m0_1|u_logic|H06wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .lut_mask = 64'hFFFF7777FFFF2222;
+defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V76wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|V76wx4~0_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|B73wx4~combout ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V76wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y18_N31
+dffeas \soc_inst|m0_1|u_logic|Itw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ynhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Itw2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V76wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V76wx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|V76wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Itw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Itw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V76wx4~1 (
+// Location: LABCELL_X33_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V76wx4~1_combout  = ( \soc_inst|m0_1|u_logic|M66wx4~combout  & ( !\soc_inst|m0_1|u_logic|V76wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M66wx4~combout  & ( !\soc_inst|m0_1|u_logic|V76wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|H5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M9y2z4~q  & (\soc_inst|m0_1|u_logic|H5nvx4~0_combout  & \soc_inst|m0_1|u_logic|Itw2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H5nvx4~0_combout  & \soc_inst|m0_1|u_logic|Itw2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M9y2z4~q  & \soc_inst|m0_1|u_logic|H5nvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|H5nvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|V76wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H5nvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Itw2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H5nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V76wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V76wx4~1 .lut_mask = 64'hFAFFC8CC00000000;
-defparam \soc_inst|m0_1|u_logic|V76wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .lut_mask = 64'h3333111103030101;
+defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D56wx4~0 (
+// Location: FF_X33_Y19_N55
+dffeas \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|H5nvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D56wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (((\soc_inst|m0_1|u_logic|Jppvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Rfpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Y6t2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D56wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D56wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D56wx4~0 .lut_mask = 64'h0C0C0C0C2E0C2E0C;
-defparam \soc_inst|m0_1|u_logic|D56wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .lut_mask = 64'h0010001040504050;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O76wx4 (
+// Location: MLABCELL_X34_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O76wx4~combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Rfpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O76wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O76wx4 .lut_mask = 64'h00000000C000C000;
-defparam \soc_inst|m0_1|u_logic|O76wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .lut_mask = 64'hAA22AA22A020A020;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yy5wx4~0 (
+// Location: LABCELL_X36_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yy5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & \soc_inst|m0_1|u_logic|O76wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Rfpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( (\soc_inst|m0_1|u_logic|Rfpvx4~3_combout  & (((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Qdj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( \soc_inst|m0_1|u_logic|Rfpvx4~3_combout  ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rfpvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .lut_mask = 64'h0F0F0F0F0F0D0F0D;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~1 (
+// Location: MLABCELL_X39_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0hwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Rfpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|L8t2z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .lut_mask = 64'h00000000F333F333;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~1 (
+// Location: LABCELL_X42_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9swx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|U9swx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( 
+// ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Pty2z4~q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( 
+// ((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Pty2z4~q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( 
+// ((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Pty2z4~q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9swx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .lut_mask = 64'hAAAAAAA0AAA0AAA0;
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9swx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9swx4~0 .lut_mask = 64'h77FF77FFFF77FFFF;
+defparam \soc_inst|m0_1|u_logic|U9swx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Px5wx4 (
+// Location: LABCELL_X40_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S8swx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Px5wx4~combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|S8swx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) 
+// # (\soc_inst|m0_1|u_logic|U9swx4~0_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U9swx4~0_combout ))))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|U9swx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datag(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|S8swx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Px5wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Px5wx4 .lut_mask = 64'hFFFFFFFFFFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|Px5wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S8swx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|S8swx4~0 .lut_mask = 64'hFAFAFEFEEAFAAABA;
+defparam \soc_inst|m0_1|u_logic|S8swx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~2 (
+// Location: MLABCELL_X39_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G27wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|G27wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G27wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G27wx4~2 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|G27wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~1 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|G27wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uw5wx4~0 (
+// Location: LABCELL_X37_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uw5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Px5wx4~combout  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ (((\soc_inst|m0_1|u_logic|Zoy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))))) ) )
+// \soc_inst|m0_1|u_logic|Bkxvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G27wx4~1_combout ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uw5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .lut_mask = 64'h0000000090C090C0;
-defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .lut_mask = 64'hF0F0F0F0D080D080;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ry5wx4~0 (
+// Location: LABCELL_X42_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ry5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Bkxvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|J7swx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|J7swx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|J7swx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bkxvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .lut_mask = 64'h0E0E0E0E0E0E0000;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mz5wx4~0 (
+// Location: MLABCELL_X39_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mz5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Socwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Bkxvx4~combout  = ( \soc_inst|m0_1|u_logic|Bkxvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~0_combout  & (\soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~q ) # (\soc_inst|m0_1|u_logic|S8swx4~0_combout 
+// )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|S8swx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bkxvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mz5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .lut_mask = 64'h0000000000AA00AA;
-defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4 .lut_mask = 64'h0000000000450045;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~0 (
+// Location: MLABCELL_X39_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jp3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Mz5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uw5wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Ry5wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jp3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Mz5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uw5wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Rfpvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Bkxvx4~combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (((!\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ) # (\soc_inst|m0_1|u_logic|Rfpvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Bkxvx4~combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Uw5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mz5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .lut_mask = 64'hC0C0808000000000;
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .lut_mask = 64'h3333333331333133;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~2 (
+// Location: FF_X33_Y15_N2
+dffeas \soc_inst|m0_1|u_logic|Zcn2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zcn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zcn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tzxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xu5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout  & (\soc_inst|m0_1|u_logic|Xu5wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|D56wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Tzxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q1ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((!\soc_inst|m0_1|u_logic|Zcn2z4~q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Q1ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (!\soc_inst|m0_1|u_logic|Zcn2z4~q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D56wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xu5wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .lut_mask = 64'h0000000000540054;
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .lut_mask = 64'h00A000A022A222A2;
+defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~3 (
+// Location: LABCELL_X24_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pkwwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Xu5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H06wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|M4fwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Tzxwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  $ (\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .lut_mask = 64'h00000000AAEEAAEE;
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .lut_mask = 64'hC3C3C3C3F0C3F0C3;
+defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A76wx4~0 (
+// Location: LABCELL_X22_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S1ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A76wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|S1ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & !\soc_inst|m0_1|u_logic|Manwx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A76wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A76wx4~0 .lut_mask = 64'h0C0C0C0C00000000;
-defparam \soc_inst|m0_1|u_logic|A76wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .lut_mask = 64'h5500550000000000;
+defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W46wx4~0 (
+// Location: LABCELL_X22_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W6iwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W46wx4~0_combout  = ( \soc_inst|m0_1|u_logic|A76wx4~0_combout  & ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|A76wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|O76wx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|W6iwx4~combout  = ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W46wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W6iwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W46wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W46wx4~0 .lut_mask = 64'h000400040F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|W46wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W6iwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W6iwx4 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|W6iwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4 (
+// Location: LABCELL_X23_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bspvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu5wx4~combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xu5wx4~3_combout  & (!\soc_inst|m0_1|u_logic|W46wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|G36wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xu5wx4~3_combout  & !\soc_inst|m0_1|u_logic|W46wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Bspvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & \soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & \soc_inst|m0_1|u_logic|F8iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G36wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xu5wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W46wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bspvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu5wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu5wx4 .lut_mask = 64'h3300330031003100;
-defparam \soc_inst|m0_1|u_logic|Xu5wx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y9_N52
-dffeas \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .lut_mask = 64'h0FAF00AA0FAF00AA;
+defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylwwx4~0 (
+// Location: LABCELL_X23_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bspvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ylwwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Uup2z4~q  & \soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Bspvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Bspvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Bspvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bspvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylwwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .lut_mask = 64'h0000000003030000;
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .lut_mask = 64'h0CCC0FFF00000000;
+defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylwwx4~1 (
+// Location: LABCELL_X27_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ylwwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ylwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mhhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~13_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|S5pvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Vvx2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~13_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Vvx2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ylwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~13_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .lut_mask = 64'h0000000000000404;
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .shared_arith = "off";
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .lut_mask = 64'h3030303030FC30FC;
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ok7wx4~1 (
+// Location: LABCELL_X37_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ok7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Eo5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ylwwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Eo5wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Mhhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .lut_mask = 64'hC4C4C4C4CCCCC4C4;
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .lut_mask = 64'hF000F000A000A000;
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Manwx4~0 (
+// Location: LABCELL_X37_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Manwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Mhhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mhhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & \soc_inst|m0_1|u_logic|Bspvx4~1_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Manwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Manwx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Manwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .lut_mask = 64'h00000000CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwdwx4~0 (
+// Location: FF_X37_Y12_N10
+dffeas \soc_inst|m0_1|u_logic|Vvx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vvx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vvx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Va62z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pwdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Va62z4~combout  = ( \soc_inst|m0_1|u_logic|Add3~9_sumout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add3~9_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Va62z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .lut_mask = 64'h0AAA0AAA0A000A00;
-defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Va62z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Va62z4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Va62z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~1 (
+// Location: LABCELL_X30_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|htrans_o[1]~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Glnwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pwdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Glnwx4~0_combout  & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pwdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Glnwx4~0_combout  & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pwdwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Glnwx4~0_combout  & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pwdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Glnwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( \soc_inst|m0_1|u_logic|H362z4~0_combout  & ( (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & (\soc_inst|m0_1|u_logic|E7mwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Va62z4~combout ) # (\soc_inst|m0_1|u_logic|Add3~1_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( \soc_inst|m0_1|u_logic|H362z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Va62z4~combout  & 
+// (\soc_inst|m0_1|u_logic|Add3~1_sumout  & (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & \soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( !\soc_inst|m0_1|u_logic|H362z4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|E7mwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( !\soc_inst|m0_1|u_logic|H362z4~0_combout  & ( (\soc_inst|m0_1|u_logic|E7mwx4~combout  & ((!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Va62z4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Va62z4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H362z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .lut_mask = 64'h7777444444444444;
-defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .lut_mask = 64'h00F500FF0001000B;
+defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skhvx4~1 (
+// Location: LABCELL_X29_Y17_N42
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Skhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~41_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jex2z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~49_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Jex2z4~q )))))) ) )
+// \soc_inst|switches_1|half_word_address~1_combout  = ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout  & ( (\soc_inst|m0_1|u_logic|E7mwx4~combout  & (\soc_inst|interconnect_1|HREADY~0_combout  & 
+// !\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  
+// & ((\soc_inst|m0_1|u_logic|S6ovx4~1_combout ) # (\soc_inst|m0_1|u_logic|E7mwx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~49_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+	.dataf(!\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Skhvx4~1_combout ),
+	.combout(\soc_inst|switches_1|half_word_address~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .lut_mask = 64'hA000A800F500FD00;
-defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .shared_arith = "off";
+defparam \soc_inst|switches_1|half_word_address~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~1 .lut_mask = 64'h0000000007000500;
+defparam \soc_inst|switches_1|half_word_address~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skhvx4~0 (
+// Location: LABCELL_X29_Y17_N21
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Skhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Skhvx4~1_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|K22wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Skhvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & \soc_inst|m0_1|u_logic|K22wx4~0_combout )) ) ) )
+// \soc_inst|switches_1|half_word_address~3_combout  = ( \soc_inst|switches_1|half_word_address~1_combout  & ( \soc_inst|switches_1|half_word_address~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Skhvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|switches_1|half_word_address~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|switches_1|half_word_address~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
+	.combout(\soc_inst|switches_1|half_word_address~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .lut_mask = 64'h0000CECE0000CECF;
-defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|half_word_address~3 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~3 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|switches_1|half_word_address~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y11_N8
-dffeas \soc_inst|m0_1|u_logic|Jex2z4 (
+// Location: FF_X29_Y17_N22
+dffeas \soc_inst|switches_1|half_word_address[0]~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
+	.d(\soc_inst|switches_1|half_word_address~3_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -92349,2154 +93015,2344 @@ dffeas \soc_inst|m0_1|u_logic|Jex2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jex2z4~q ),
+	.q(\soc_inst|switches_1|half_word_address[0]~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jex2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jex2z4 .power_up = "low";
+defparam \soc_inst|switches_1|half_word_address[0]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|half_word_address[0]~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohivx4~0 (
+// Location: MLABCELL_X25_Y15_N9
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ohivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Szr2z4~q  & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jex2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jex2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Szr2z4~q  & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jex2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jex2z4~q ))) ) ) )
+// \soc_inst|interconnect_1|HRDATA[7]~9_combout  = ( \soc_inst|interconnect_1|HRDATA[8]~5_combout  & ( !\soc_inst|interconnect_1|mux_sel [2] & ( (!\soc_inst|interconnect_1|mux_sel [1]) # ((!\soc_inst|switches_1|half_word_address[0]~DUPLICATE_q  & 
+// !\soc_inst|interconnect_1|mux_sel [0])) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[8]~5_combout  & ( !\soc_inst|interconnect_1|mux_sel [2] & ( !\soc_inst|interconnect_1|mux_sel [1] ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.dataa(!\soc_inst|switches_1|half_word_address[0]~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(gnd),
+	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datae(!\soc_inst|interconnect_1|HRDATA[8]~5_combout ),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[7]~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .lut_mask = 64'h0F05FFF50C04CCC4;
-defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y10_N31
-dffeas \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|interconnect_1|HRDATA[7]~9 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[7]~9 .lut_mask = 64'hCCCCEECC00000000;
+defparam \soc_inst|interconnect_1|HRDATA[7]~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwbwx4~0 (
+// Location: MLABCELL_X25_Y15_N45
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tse3z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|interconnect_1|HRDATA[7]~10_combout  = ( \soc_inst|interconnect_1|HRDATA[7]~9_combout  & ( ((\soc_inst|ram_1|read_cycle~q  & (\soc_inst|ram_1|byte_select [0] & \soc_inst|interconnect_1|mux_sel [0]))) # (\soc_inst|interconnect_1|mux_sel [1]) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tse3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|ram_1|read_cycle~q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(!\soc_inst|ram_1|byte_select [0]),
+	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[7]~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .lut_mask = 64'h0000000040000000;
-defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[7]~10 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[7]~10 .lut_mask = 64'h0000000033373337;
+defparam \soc_inst|interconnect_1|HRDATA[7]~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y8_N26
-dffeas \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: IOIBUF_X4_Y0_N35
+cyclonev_io_ibuf \SW[6]~input (
+	.i(SW[6]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[6]~input_o ));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE .power_up = "low";
+defparam \SW[6]~input .bus_hold = "false";
+defparam \SW[6]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: FF_X46_Y4_N44
-dffeas \soc_inst|m0_1|u_logic|To33z4~DUPLICATE (
+// Location: FF_X22_Y20_N17
+dffeas \soc_inst|switches_1|switch_store[0][6] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\SW[6]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ),
+	.q(\soc_inst|switches_1|switch_store[0][6]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|To33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|To33z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[0][6] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][6] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~1 (
+// Location: LABCELL_X29_Y17_N54
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[22]~31 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oubwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|ram_1|data_to_memory[22]~31_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22  & !\soc_inst|ram_1|byte_select[2]~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ),
+	.datad(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oubwx4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[22]~31_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .lut_mask = 64'h00AC000000000000;
-defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[22]~31 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[22]~31 .lut_mask = 64'h0500050005550555;
+defparam \soc_inst|ram_1|data_to_memory[22]~31 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y4_N7
-dffeas \soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+// Location: M10K_X38_Y13_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[22]~31_combout ,\soc_inst|ram_1|data_to_memory[6]~32_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE_q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_bit_number = 6;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_bit_number = 6;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003FFFFB63C12700003100C0E0000000000A00A00A00A00A00A00A00D03FFFFFFFFFFFFC32000551000000000000000001554";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~2 (
+// Location: LABCELL_X22_Y20_N15
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[6]~36 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oubwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rpe3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|interconnect_1|HRDATA[6]~36_combout  = ( \soc_inst|switches_1|switch_store[0][6]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
+// (\soc_inst|interconnect_1|HRDATA[7]~10_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][6]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][6]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout  & 
+// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][6]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[7]~10_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rpe3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+	.datae(!\soc_inst|switches_1|switch_store[0][6]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oubwx4~2_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .lut_mask = 64'h3000202000000000;
-defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[6]~36 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[6]~36 .lut_mask = 64'hCC00CC0FCCF0CCFF;
+defparam \soc_inst|interconnect_1|HRDATA[6]~36 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~0 (
+// Location: LABCELL_X33_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~34 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oubwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|L763z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Cy43z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add1~34_cout  = CARRY(( (!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ) ) + ( VCC ) + ( !VCC ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|L763z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cy43z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oubwx4~0_combout ),
+	.combout(),
 	.sumout(),
-	.cout(),
+	.cout(\soc_inst|m0_1|u_logic|Add1~34_cout ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .lut_mask = 64'h000000C000000088;
-defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~34 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~34 .lut_mask = 64'h000000000000FCFC;
+defparam \soc_inst|m0_1|u_logic|Add1~34 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~3 (
+// Location: LABCELL_X33_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oubwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Oubwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwbwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Oubwx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Oubwx4~2_combout  & \soc_inst|m0_1|u_logic|Hue3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oubwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwbwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Oubwx4~1_combout  & !\soc_inst|m0_1|u_logic|Oubwx4~2_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Add1~5_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~34_cout  ))
+// \soc_inst|m0_1|u_logic|Add1~6  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~34_cout  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oubwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oubwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hue3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Oubwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~34_cout ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~5_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~6 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~5 .lut_mask = 64'h0000000000003030;
+defparam \soc_inst|m0_1|u_logic|Add1~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ranvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ranvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I3y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~36_combout  & ((!\soc_inst|m0_1|u_logic|Add1~5_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~36_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add1~5_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I3y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~5_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~5_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
+
+	.dataa(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add1~5_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oubwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ranvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .lut_mask = 64'h8080000000800000;
-defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .lut_mask = 64'h00FCFCFC00A8A8A8;
+defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Konvx4~0 (
+// Location: FF_X31_Y19_N13
+dffeas \soc_inst|m0_1|u_logic|I3y2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ranvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I3y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I3y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Konvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pybwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|G1s2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|G1s2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add1~9_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|W4y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~6  ))
+// \soc_inst|m0_1|u_logic|Add1~10  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|W4y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~6  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oubwx4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~6 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~9_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~10 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~9 .lut_mask = 64'h0000000000003300;
+defparam \soc_inst|m0_1|u_logic|Add1~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kanvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kanvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~11_combout  & ((!\soc_inst|m0_1|u_logic|Add1~9_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|interconnect_1|HRDATA[7]~11_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add1~9_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W4y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~9_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~9_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Add1~9_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Konvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Konvx4~0 .lut_mask = 64'hBB88BBBBBB88B8B8;
-defparam \soc_inst|m0_1|u_logic|Konvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .lut_mask = 64'h3232FAFA3200FA00;
+defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ksbwx4~0 (
+// Location: FF_X31_Y19_N31
+dffeas \soc_inst|m0_1|u_logic|W4y2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|W4y2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W4y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W4y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Danvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ksbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kzbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kzbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Konvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Konvx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Konvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Konvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Konvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Danvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K6y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[8]~33_combout  & ((!\soc_inst|m0_1|u_logic|Add1~21_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K6y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[8]~33_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add1~21_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|K6y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~21_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K6y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~21_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add1~21_sumout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .lut_mask = 64'hBEB2B0B0EBE8E0E0;
-defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Danvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Danvx4~0 .lut_mask = 64'h00FAFAFA00C8C8C8;
+defparam \soc_inst|m0_1|u_logic|Danvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iu1wx4~0 (
+// Location: FF_X31_Y19_N25
+dffeas \soc_inst|m0_1|u_logic|K6y2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K6y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mohvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ksbwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout  & \soc_inst|m0_1|u_logic|Ox1wx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Mohvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[24]~31_combout )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mohvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .lut_mask = 64'h0000000000300030;
-defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .lut_mask = 64'hFFCCFFCCFFCCFFCC;
+defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y8_N7
-dffeas \soc_inst|m0_1|u_logic|Uku2z4 (
+// Location: FF_X30_Y20_N13
+dffeas \soc_inst|m0_1|u_logic|Gqw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mohvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uku2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gqw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uku2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uku2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gqw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gqw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y8_N49
-dffeas \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gqw2z4~q  & ( (!\soc_inst|m0_1|u_logic|K6y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gqw2z4~q  & ( ((!\soc_inst|m0_1|u_logic|K6y2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wfovx4~combout )) # (\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gqw2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|V5nvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .lut_mask = 64'h0FAF0FAF00AA00AA;
+defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~2 (
+// Location: LABCELL_X30_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pybwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Uku2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|V5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|interconnect_1|HRDATA[8]~33_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[8]~33_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uku2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pybwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V5nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .lut_mask = 64'h000000000000AC00;
-defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .lut_mask = 64'hF0F5F0F500550055;
+defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~1 (
+// Location: LABCELL_X30_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pybwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cxc3z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2s2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|V5nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|V5nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V5nvx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[24]~31_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cxc3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2s2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|V5nvx4~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|V5nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pybwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .lut_mask = 64'h0000000C0000000A;
-defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .lut_mask = 64'hCCC0CCC000000000;
+defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y8_N31
-dffeas \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE (
+// Location: FF_X30_Y20_N28
+dffeas \soc_inst|m0_1|u_logic|Bsy2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bsy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bsy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~3 (
+// Location: LABCELL_X36_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7xvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pybwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I4s2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Y7xvx4~combout  = ( \soc_inst|m0_1|u_logic|Vnqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ljpvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I4s2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pybwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .lut_mask = 64'h00000000000088C0;
-defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y7xvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7xvx4 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|m0_1|u_logic|Y7xvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~0 (
+// Location: LABCELL_X36_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gqxvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pybwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ug73z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ug73z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|W5s2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ug73z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|W5s2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Gqxvx4~combout  = ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jvxvx4~combout  & (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Jvxvx4~combout  & (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Jvxvx4~combout  & (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|W5s2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ug73z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pybwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .lut_mask = 64'h0080008000A00000;
-defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gqxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gqxvx4 .lut_mask = 64'h2448244800000000;
+defparam \soc_inst|m0_1|u_logic|Gqxvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4 (
+// Location: LABCELL_X36_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pybwx4~combout  = ( !\soc_inst|m0_1|u_logic|Pybwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pybwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Pybwx4~1_combout  & !\soc_inst|m0_1|u_logic|Pybwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Irxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yzi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Xly2z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Xly2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Viy2z4~q ) # (!\soc_inst|m0_1|u_logic|Xly2z4~q ))) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  
+// & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Xly2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pybwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pybwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pybwx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pybwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Irxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pybwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pybwx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Pybwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .lut_mask = 64'hEE88880088000000;
+defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tdg2z4 (
+// Location: LABCELL_X36_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tdg2z4~combout  = ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pybwx4~combout 
-// ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H2wwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pybwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|H2wwx4~combout  & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q 
-// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Pybwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H2wwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Pybwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|H2wwx4~combout  & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q 
-// )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zpxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Jvxvx4~combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Jvxvx4~combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  $ (!\soc_inst|m0_1|u_logic|Irxvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Irxvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tdg2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tdg2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tdg2z4 .lut_mask = 64'h50035F0350F35FF3;
-defparam \soc_inst|m0_1|u_logic|Tdg2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .lut_mask = 64'h33CC3FC03FC0FF00;
+defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aeg2z4 (
+// Location: LABCELL_X36_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aeg2z4~combout  = ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ey9wx4~combout 
-// )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nrvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Ey9wx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q ) # ((\soc_inst|m0_1|u_logic|Nrvwx4~combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q ) # ((\soc_inst|m0_1|u_logic|Ey9wx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Nrvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ey9wx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nrvwx4~combout ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Hnxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y7xvx4~combout  & (\soc_inst|m0_1|u_logic|Gqxvx4~combout  & !\soc_inst|m0_1|u_logic|Zpxvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Y7xvx4~combout  & ((!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gqxvx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aeg2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hnxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aeg2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aeg2z4 .lut_mask = 64'h02138A9B4657CEDF;
-defparam \soc_inst|m0_1|u_logic|Aeg2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .lut_mask = 64'h0000000077117711;
+defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vff2z4 (
+// Location: LABCELL_X33_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mmxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vff2z4~combout  = ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( \soc_inst|m0_1|u_logic|Duuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q ) # ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Ylbwx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Bdwwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( \soc_inst|m0_1|u_logic|Duuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Ylbwx4~combout 
-// ) # (!\soc_inst|m0_1|u_logic|Qzq2z4~q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Bdwwx4~combout  & ((\soc_inst|m0_1|u_logic|Qzq2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( !\soc_inst|m0_1|u_logic|Duuwx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Ylbwx4~combout  & \soc_inst|m0_1|u_logic|Qzq2z4~q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~q )) # (\soc_inst|m0_1|u_logic|Bdwwx4~combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( !\soc_inst|m0_1|u_logic|Duuwx4~combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Ylbwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Bdwwx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mmxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~q  & (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Vopvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Zcn2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vff2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mmxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vff2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vff2z4 .lut_mask = 64'h00D133D1CCD1FFD1;
-defparam \soc_inst|m0_1|u_logic|Vff2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .lut_mask = 64'h7F007F0080008000;
+defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jhe2z4 (
+// Location: MLABCELL_X34_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jhe2z4~combout  = ( \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Feqwx4~combout 
-// ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (!\soc_inst|m0_1|u_logic|F8wwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Feqwx4~combout  & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|F8wwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Feqwx4~combout ) # (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  
-// & (!\soc_inst|m0_1|u_logic|F8wwx4~combout  & ((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # 
-// ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Feqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (!\soc_inst|m0_1|u_logic|F8wwx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Sbxvx4~1_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Mmxvx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Mmxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mmxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jhe2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jhe2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jhe2z4 .lut_mask = 64'hFFE2CCE233E200E2;
-defparam \soc_inst|m0_1|u_logic|Jhe2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .lut_mask = 64'hAA22AA22A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qhe2z4 (
+// Location: LABCELL_X33_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qhe2z4~combout  = ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Eruwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|N3ywx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Eruwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|N3ywx4~combout ))))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) ) 
-// ) # ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Cawwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Eruwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  
-// & ((\soc_inst|m0_1|u_logic|N3ywx4~combout ))))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Cawwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Eruwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|N3ywx4~combout ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Sbxvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( \soc_inst|m0_1|u_logic|Sbxvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Viy2z4~q ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( \soc_inst|m0_1|u_logic|Sbxvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Viy2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sbxvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qhe2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qhe2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qhe2z4 .lut_mask = 64'h404C707C434F737F;
-defparam \soc_inst|m0_1|u_logic|Qhe2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .lut_mask = 64'h00000000F5F500F5;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hhd2z4 (
+// Location: LABCELL_X40_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gokwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hhd2z4~combout  = ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( \soc_inst|m0_1|u_logic|Dmvwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Xcuwx4~combout 
-// )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( \soc_inst|m0_1|u_logic|Dmvwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Xcuwx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Dmvwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Xcuwx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Dmvwx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Xcuwx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|H1qwx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Gokwx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hhd2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hhd2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hhd2z4 .lut_mask = 64'hBBF388F3BBC088C0;
-defparam \soc_inst|m0_1|u_logic|Hhd2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohd2z4 (
+// Location: LABCELL_X40_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ohd2z4~combout  = ( \soc_inst|m0_1|u_logic|Icxwx4~combout  & ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|D9uwx4~combout 
-// ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Icxwx4~combout  & ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|D9uwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Mnvwx4~combout  & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q 
-// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Icxwx4~combout  & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|D9uwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Icxwx4~combout  & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|D9uwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Mnvwx4~combout  & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q 
-// )))) ) ) )
+// \soc_inst|m0_1|u_logic|Sbxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|A1yvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( ((\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|A1yvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ohd2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohd2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ohd2z4 .lut_mask = 64'h50035F0350F35FF3;
-defparam \soc_inst|m0_1|u_logic|Ohd2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .lut_mask = 64'h3737FF370000FF00;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgd2z4~4 (
+// Location: LABCELL_X33_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mgd2z4~4_combout  = ( !\soc_inst|m0_1|u_logic|Uup2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((((!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & 
-// (((!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Hhd2z4~combout ))) # (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ohd2z4~combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Uup2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((((!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Jhe2z4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Qhe2z4~combout )))))) ) )
+// \soc_inst|m0_1|u_logic|Sbxvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Sbxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hnxvx4~0_combout  & \soc_inst|m0_1|u_logic|Sbxvx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Sbxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hnxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sbxvx4~2_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jhe2z4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qhe2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hhd2z4~combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ohd2z4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hnxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sbxvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .lut_mask = 64'hAA05BB05FF05BB05;
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .lut_mask = 64'h000C00CC00000000;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cgf2z4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cgf2z4~combout  = ( \soc_inst|m0_1|u_logic|Bywwx4~combout  & ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Svqwx4~combout 
-// ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Lr9wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout  & ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fzl2z4~q )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Svqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Lr9wx4~combout )))) ) ) ) 
-// # ( \soc_inst|m0_1|u_logic|Bywwx4~combout  & ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fzl2z4~q )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Svqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Lr9wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Svqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Lr9wx4~combout )))) ) 
-// ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cgf2z4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y16_N26
+dffeas \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cgf2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cgf2z4 .lut_mask = 64'h0145236789CDABEF;
-defparam \soc_inst|m0_1|u_logic|Cgf2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgd2z4~0 (
+// Location: MLABCELL_X28_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wxxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uup2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & (\soc_inst|m0_1|u_logic|Cgf2z4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & ((\soc_inst|m0_1|u_logic|Vff2z4~combout )))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((((\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Uup2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & ((\soc_inst|m0_1|u_logic|Aeg2z4~combout ))) # (\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & (\soc_inst|m0_1|u_logic|Tdg2z4~combout ))))) # 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((((\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Wxxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wai2z4~q  & !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tdg2z4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Aeg2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vff2z4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Cgf2z4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .lut_mask = 64'h0A0A0A0A55FF7777;
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .lut_mask = 64'h4040404040CC40CC;
+defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~2 (
+// Location: LABCELL_X24_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vy7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout  & \soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout  & \soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Svxwx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  $ (\soc_inst|m0_1|u_logic|Svxwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .lut_mask = 64'h050D050D55DD55DD;
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .lut_mask = 64'hCC33CC33EC13EC13;
+defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4qvx4~0 (
+// Location: MLABCELL_X21_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vr7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Vr7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .lut_mask = 64'hF0F0505030301010;
-defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .lut_mask = 64'hFFFF003300000000;
+defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4qvx4 (
+// Location: MLABCELL_X21_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R7iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4qvx4~combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|W4zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Z4qvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wsawx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|W4zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Z4qvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|Wsawx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|R7iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vr7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z4qvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4qvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4qvx4 .lut_mask = 64'h0000000000500051;
-defparam \soc_inst|m0_1|u_logic|Z4qvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y9_N35
-dffeas \soc_inst|m0_1|u_logic|Cll2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cll2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cll2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cll2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X42_Y10_N1
-dffeas \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X36_Y9_N32
-dffeas \soc_inst|m0_1|u_logic|Ch03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ch03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ch03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ch03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~2 (
+// Location: LABCELL_X30_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R7iwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ht5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|I793z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wd13z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fn23z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|I793z4~q  & ( (!\soc_inst|m0_1|u_logic|Ch03z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I793z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wd13z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fn23z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I793z4~q  & ( (!\soc_inst|m0_1|u_logic|Ch03z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|R7iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & !\soc_inst|m0_1|u_logic|B8nwx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & !\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fn23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ch03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wd13z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I793z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .lut_mask = 64'hFCFCFA0A0C0CFA0A;
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .lut_mask = 64'hA0A0A0A0A000A000;
+defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y10_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~1 (
+// Location: LABCELL_X18_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ht5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ow33z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Mcz2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Ow33z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Thhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Add2~9_sumout  & ( (\soc_inst|m0_1|u_logic|S5pvx4~combout  & !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Add2~9_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Add2~9_sumout  & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mcz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ow33z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~9_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Thhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .lut_mask = 64'hCCF0CCF000F000F0;
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .lut_mask = 64'h0F0F00003F3F3030;
+defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~3 (
+// Location: LABCELL_X35_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ht5wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (((\soc_inst|m0_1|u_logic|Ht5wx4~2_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))))) ) )
+// \soc_inst|m0_1|u_logic|Thhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Thhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Thhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Thhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Thhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .lut_mask = 64'h000A0080AA0AAA80;
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .lut_mask = 64'hF000F000A000A000;
+defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~0 (
+// Location: LABCELL_X35_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ht5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ht5wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|X553z4~q  & (!\soc_inst|m0_1|u_logic|Xowwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cll2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ht5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Xowwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cll2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Thhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Thhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Thhvx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cll2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|X553z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xowwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Thhvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .lut_mask = 64'hF500310000000000;
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .lut_mask = 64'h00AA00AA00EE00EE;
+defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y12_N50
+dffeas \soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X35_Y12_N8
+dffeas \soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[15]~1 (
+// Location: LABCELL_X35_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Msyvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  = ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Wq5wx4~combout  & !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Z62wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Msyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Omk2z4~q  & ( !\soc_inst|m0_1|u_logic|Vvx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J0l2z4~q  & (\soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rryvx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .lut_mask = 64'hFFF0FFF00F000F00;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Msyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Msyvx4 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|Msyvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N30
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[15]~2 (
+// Location: LABCELL_X30_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~2 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[15]~2_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select [1]) # (\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout 
-// ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|byte_select [1] & \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Jyb2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|P1c2z4~0_combout  & \soc_inst|m0_1|u_logic|Jyb2z4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|P1c2z4~0_combout  & (\soc_inst|m0_1|u_logic|Jyb2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datac(!\soc_inst|ram_1|byte_select [1]),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|P1c2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jyb2z4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[15]~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[15]~2 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[15]~2 .lut_mask = 64'h0003000330333033;
-defparam \soc_inst|ram_1|data_to_memory[15]~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .lut_mask = 64'h008C008C00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y9_N12
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[31]~2 (
+// Location: LABCELL_X33_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Una2z4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[31]~2_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( \soc_inst|interconnect_1|HRDATA[29]~0_combout  ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( 
-// !\soc_inst|interconnect_1|HRDATA[29]~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Una2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Ucqvx4~combout  & (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
-	.datae(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ),
+	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[31]~2 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[31]~2 .lut_mask = 64'hFF000000FFFF00FF;
-defparam \soc_inst|interconnect_1|HRDATA[31]~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Una2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Una2z4~0 .lut_mask = 64'h0005000500000000;
+defparam \soc_inst|m0_1|u_logic|Una2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~0 (
+// Location: MLABCELL_X34_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hjnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( \soc_inst|interconnect_1|HRDATA[15]~4_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
-// \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q ) # (\soc_inst|interconnect_1|HRDATA[15]~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|U2x2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Ppsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|Kzxvx4~combout )) # (\soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .lut_mask = 64'hCCCC0000DDDD5555;
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .lut_mask = 64'h0303030303FF03FF;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmhvx4~0 (
+// Location: MLABCELL_X34_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pmhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[31]~2_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[31]~2_combout  )
+// \soc_inst|m0_1|u_logic|Ppsvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ppsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M66wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Socwx4~0_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pmhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y6_N53
-dffeas \soc_inst|m0_1|u_logic|F1x2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pmhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F1x2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F1x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F1x2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .lut_mask = 64'hFFFAFFFA00000000;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G8nvx4~0 (
+// Location: MLABCELL_X34_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[15]~4_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M66wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M66wx4~combout  & ( !\soc_inst|m0_1|u_logic|Og4wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G8nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .lut_mask = 64'h00000000AAA0AAA0;
-defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y8_N34
-dffeas \soc_inst|m0_1|u_logic|Ufy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|G8nvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ufy2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ufy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ufy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .lut_mask = 64'hFF00FF00FA00FA00;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~1 (
+// Location: LABCELL_X35_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mn3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hjnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ufy2z4~q ) # ((!\soc_inst|m0_1|u_logic|F1x2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|F1x2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Mn3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F1x2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ufy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~2 (
+// Location: MLABCELL_X34_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hjnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hjnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hjnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[31]~2_combout ))) ) )
+// \soc_inst|m0_1|u_logic|C5c2z4~0_combout  = (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Socwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hjnvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hjnvx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C5c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y6_N53
-dffeas \soc_inst|m0_1|u_logic|U2x2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U2x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U2x2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .lut_mask = 64'h00FC00FC00FC00FC;
+defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Srgwx4~0 (
+// Location: MLABCELL_X34_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Srgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) 
-// ) ) )
+// \soc_inst|m0_1|u_logic|C5c2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C5c2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .lut_mask = 64'h0000000000002020;
-defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .lut_mask = 64'hF500F500FF00FF00;
+defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzyvx4~0 (
+// Location: MLABCELL_X34_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z6c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Z6c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y6t2z4~q  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mk6wx4~0 (
+// Location: MLABCELL_X34_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mk6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|C5c2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Z6c2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|C5c2z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Z6c2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C5c2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ) # ((\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|H0zvx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|C5c2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C5c2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .lut_mask = 64'hA0A2A0A2AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X3xvx4~0 (
+// Location: MLABCELL_X34_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X3xvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( ((\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|G27wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|C5c2z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ppsvx4~1_combout  & (\soc_inst|m0_1|u_logic|Amjwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ppsvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C5c2z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X3xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .lut_mask = 64'h01FF01FF00000000;
-defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .lut_mask = 64'h0200020000000000;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X3xvx4~1 (
+// Location: LABCELL_X30_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X3xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|X3xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|X3xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (((!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & (((!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Scpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jyb2z4~2_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I1c2z4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jyb2z4~2_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|L8t2z4~q  & ((!\soc_inst|m0_1|u_logic|I1c2z4~combout ) # (!\soc_inst|m0_1|u_logic|Rexvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|X3xvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I1c2z4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .lut_mask = 64'hF5B1F5F500000000;
-defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .lut_mask = 64'h00000000E000E0A0;
+defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pa7wx4~0 (
+// Location: LABCELL_X24_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8b2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pa7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|N8b2z4~combout  = (!\soc_inst|m0_1|u_logic|Dks2z4~q ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N8b2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N8b2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N8b2z4 .lut_mask = 64'hFFF0FFF0FFF0FFF0;
+defparam \soc_inst|m0_1|u_logic|N8b2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3xvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q3xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q3xvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y19_N26
+dffeas \soc_inst|m0_1|u_logic|G8n2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G8n2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .lut_mask = 64'h000000000F8F0F8F;
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G8n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G8n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3xvx4~1 (
+// Location: LABCELL_X24_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q3xvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Q3xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rexvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~4_combout  = ( \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pab3z4~q  & (!\soc_inst|m0_1|u_logic|G8n2z4~q  & ((!\soc_inst|m0_1|u_logic|Xdb3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G8n2z4~q  & ((!\soc_inst|m0_1|u_logic|Xdb3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pab3z4~q  & ((!\soc_inst|m0_1|u_logic|Xdb3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdb3z4~q ) # (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q3xvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .lut_mask = 64'hCFFFCFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~4 .lut_mask = 64'hFCFCA8A8FC00A800;
+defparam \soc_inst|m0_1|u_logic|Luywx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Na6wx4~0 (
+// Location: FF_X27_Y18_N16
+dffeas \soc_inst|m0_1|u_logic|Kss2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kss2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kss2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kss2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Na6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1xvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Luywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kss2z4~q  & (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jxs2z4~q ) 
+// # (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kss2z4~q  & ((!\soc_inst|m0_1|u_logic|Jxs2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jxs2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jxs2z4~q ) # (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kss2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~3 .lut_mask = 64'hFFAAF0A0CC88C080;
+defparam \soc_inst|m0_1|u_logic|Luywx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~0 (
+// Location: FF_X24_Y19_N17
+dffeas \soc_inst|m0_1|u_logic|Axm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Axm2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Axm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Axm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J9d3z4~q  & (!\soc_inst|m0_1|u_logic|Lns2z4~q  & ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Axm2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J9d3z4~q  & ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Axm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lns2z4~q  & ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Axm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Axm2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J9d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .lut_mask = 64'h00000000FF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~0 .lut_mask = 64'hEEEEEE00E0E0E000;
+defparam \soc_inst|m0_1|u_logic|Luywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~3 (
+// Location: MLABCELL_X25_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Qem2z4~q )))) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~2_combout  = ( \soc_inst|m0_1|u_logic|Bus2z4~q  & ( \soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Fed3z4~q  & ((!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bus2z4~q  & ( \soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fed3z4~q  & ((!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bus2z4~q  & ( !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bus2z4~q  & ( !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .lut_mask = 64'h00DD00DC00030003;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~2 .lut_mask = 64'hFFCCAA88F0C0A080;
+defparam \soc_inst|m0_1|u_logic|Luywx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y10_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~4 (
+// Location: FF_X24_Y20_N32
+dffeas \soc_inst|m0_1|u_logic|B1a3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B1a3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B1a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B1a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~4_combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~5_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|X9n2z4~q  & \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|B1a3z4~q )) # (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Aqp2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .lut_mask = 64'h4F004F0044004400;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~5 .lut_mask = 64'h000000000C3F1111;
+defparam \soc_inst|m0_1|u_logic|Luywx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~1 (
+// Location: LABCELL_X24_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Lhd3z4~q  & ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q6l2z4~q  & ((!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pcd3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Q6l2z4~q  & (!\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pcd3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhd3z4~q  & ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  
+// & ( (!\soc_inst|m0_1|u_logic|Q6l2z4~q  & ((!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pcd3z4~q )))) # (\soc_inst|m0_1|u_logic|Q6l2z4~q  & (!\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ) 
+// # (!\soc_inst|m0_1|u_logic|Pcd3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhd3z4~q  & ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q6l2z4~q  & ((!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pcd3z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|Q6l2z4~q  & (!\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pcd3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .lut_mask = 64'h0030003000000000;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~1 .lut_mask = 64'hFCA8FCA8FCA80000;
+defparam \soc_inst|m0_1|u_logic|Luywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~2 (
+// Location: LABCELL_X24_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Dvy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (((!\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Luywx4~5_combout  & ( \soc_inst|m0_1|u_logic|Luywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Luywx4~4_combout  & (\soc_inst|m0_1|u_logic|Luywx4~3_combout  & 
+// (\soc_inst|m0_1|u_logic|Luywx4~0_combout  & \soc_inst|m0_1|u_logic|Luywx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Luywx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Luywx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Luywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Luywx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Luywx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Luywx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .lut_mask = 64'h22E222E222222222;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~6 .lut_mask = 64'h0000000000010000;
+defparam \soc_inst|m0_1|u_logic|Luywx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~5 (
+// Location: FF_X21_Y18_N19
+dffeas \soc_inst|m0_1|u_logic|Zad3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zad3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zad3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zad3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|U6wvx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~3_combout  & (!\soc_inst|m0_1|u_logic|U6wvx4~4_combout  & 
-// !\soc_inst|m0_1|u_logic|J7swx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6wvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|U6wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~3_combout  & !\soc_inst|m0_1|u_logic|U6wvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Kkb3z4~q  & ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zad3z4~q  & (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Svs2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkb3z4~q  & ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zad3z4~q  & ((!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Svs2z4~q ))) ) 
+// ) ) # ( \soc_inst|m0_1|u_logic|Kkb3z4~q  & ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Svs2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kkb3z4~q  & ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Svs2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~4_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U6wvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .lut_mask = 64'h8888000088000000;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .lut_mask = 64'hFFAAF0A0CC88C080;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~6 (
+// Location: MLABCELL_X25_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|U6wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U6wvx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Q3xvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|J3xvx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqs2z4~q  & (!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Azs2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqs2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Azs2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Azs2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Azs2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J3xvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U6wvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .lut_mask = 64'h0000000004040000;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .lut_mask = 64'hFCFCFC00A8A8A800;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~7 (
+// Location: FF_X24_Y18_N35
+dffeas \soc_inst|m0_1|u_logic|Usl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Usl2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Usl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Usl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y20_N2
+dffeas \soc_inst|m0_1|u_logic|T7d3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T7d3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T7d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T7d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~7_combout  = ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Lu6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & 
-// \soc_inst|interconnect_1|HREADY~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~5_combout  = ( \soc_inst|m0_1|u_logic|T7d3z4~q  & ( \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~q  & (!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|H8l2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T7d3z4~q  & ( \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~q  & ((!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|H8l2z4~q ))) ) 
+// ) ) # ( \soc_inst|m0_1|u_logic|T7d3z4~q  & ( !\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|H8l2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T7d3z4~q  & ( !\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|H8l2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T7d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .lut_mask = 64'h00FF00FF00FF0030;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .lut_mask = 64'hFFF0CCC0AAA08880;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3mvx4~0 (
+// Location: LABCELL_X27_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nqy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Yzi2z4~q ) # ((\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~4_combout  = ( \soc_inst|m0_1|u_logic|Uqi2z4~q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~q  & ((!\soc_inst|m0_1|u_logic|Uaj2z4~q  & (\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Uaj2z4~q  & ((\soc_inst|m0_1|u_logic|Qrp2z4~q ))))) # (\soc_inst|m0_1|u_logic|R1w2z4~q  & (((\soc_inst|m0_1|u_logic|Uaj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uqi2z4~q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|R1w2z4~q  & ((!\soc_inst|m0_1|u_logic|Uaj2z4~q  & (\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Uaj2z4~q  & ((\soc_inst|m0_1|u_logic|Qrp2z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W3mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .lut_mask = 64'hF3F0F3F033003300;
-defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .lut_mask = 64'h00000000440C443F;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3mvx4~1 (
+// Location: LABCELL_X24_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~q  & ( !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ) # ((!\soc_inst|m0_1|u_logic|W3mvx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~q  & ( !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & 
-// (!\soc_inst|m0_1|u_logic|W3mvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vfd3z4~q  & ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bjd3z4~q  & (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Uls2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vfd3z4~q  & ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bjd3z4~q  & ((!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Uls2z4~q ))) ) 
+// ) ) # ( \soc_inst|m0_1|u_logic|Vfd3z4~q  & ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Uls2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vfd3z4~q  & ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Uls2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W3mvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vfd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .lut_mask = 64'h0444AEEE00000000;
-defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .lut_mask = 64'hFCFCFC00A8A8A800;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y6_N31
-dffeas \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE (
+// Location: FF_X24_Y19_N50
+dffeas \soc_inst|m0_1|u_logic|Bmb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Bmb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bmb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bmb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4xvx4~1 (
+// Location: LABCELL_X24_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E4xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|K1z2z4~q  & ( (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|K1z2z4~q  & ( !\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~2_combout  = ( \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z4l2z4~q  & (!\soc_inst|m0_1|u_logic|Tib3z4~q  & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Bmb3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z4l2z4~q  & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Bmb3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tib3z4~q  & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Bmb3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bmb3z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E4xvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .lut_mask = 64'hCCCCCCCCCCC0CCC0;
-defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .lut_mask = 64'hFFCCF0C0AA88A080;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B3mvx4~0 (
+// Location: LABCELL_X24_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B3mvx4~0_combout  = (\soc_inst|m0_1|u_logic|E4xvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ))))
+// \soc_inst|m0_1|u_logic|Vsywx4~6_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vsywx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Vsywx4~3_combout  & (\soc_inst|m0_1|u_logic|Vsywx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Vsywx4~5_combout  & !\soc_inst|m0_1|u_logic|Vsywx4~4_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|E4xvx4~1_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Vsywx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vsywx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vsywx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vsywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vsywx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B3mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .lut_mask = 64'h00F400F400F400F4;
-defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .lut_mask = 64'h0000000000000100;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlwvx4~0 (
+// Location: LABCELL_X24_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypa2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wlwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|G27wx4~0_combout  & \soc_inst|m0_1|u_logic|Ohwvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ypa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( \soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|N8b2z4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|P2a3z4~q ) # (\soc_inst|m0_1|u_logic|Inb2z4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( \soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|P2a3z4~q ) # (\soc_inst|m0_1|u_logic|Inb2z4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|N8b2z4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( !\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|N8b2z4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wlwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .lut_mask = 64'h55D555D500000000;
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .lut_mask = 64'hCCCCC0C088CC80C0;
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlwvx4~1 (
+// Location: MLABCELL_X25_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wlwvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wlwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Vhwvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~q )))) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Xtywx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Cam2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|G0w2z4~q  & ((!\soc_inst|m0_1|u_logic|R1w2z4~q ) # (\soc_inst|m0_1|u_logic|Uaj2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wlwvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wlwvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .lut_mask = 64'h5F135F1300000000;
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .lut_mask = 64'h40440000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B3mvx4~1 (
+// Location: LABCELL_X24_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypa2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|B3mvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & \soc_inst|m0_1|u_logic|Wlwvx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|B3mvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & \soc_inst|m0_1|u_logic|C3z2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Inb2z4~combout  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & \soc_inst|m0_1|u_logic|P2a3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Inb2z4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & ((\soc_inst|m0_1|u_logic|P2a3z4~q ) # (\soc_inst|m0_1|u_logic|Vsywx4~6_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B3mvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wlwvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .lut_mask = 64'h0088008808080808;
-defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y6_N41
-dffeas \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .lut_mask = 64'h0333033300330033;
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4xvx4~0 (
+// Location: LABCELL_X30_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E4xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K1z2z4~q  & ( (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|I2t2z4~q  & \soc_inst|m0_1|u_logic|Auk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C34wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ypa2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C34wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kofwx4~0_combout  & !\soc_inst|m0_1|u_logic|Una2z4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|C34wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Una2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|C34wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Kofwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Una2z4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .lut_mask = 64'h0000000000030003;
-defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .lut_mask = 64'h4400550044004500;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~1 (
+// Location: LABCELL_X29_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hklwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|It52z4~2_combout  = ( \soc_inst|m0_1|u_logic|It52z4~1_combout  & ( \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z5pvx4~3_combout  & \soc_inst|m0_1|u_logic|Scpvx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|It52z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z5pvx4~3_combout  & (!\soc_inst|m0_1|u_logic|S4w2z4~q  & \soc_inst|m0_1|u_logic|Scpvx4~0_combout )) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|It52z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|It52z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .lut_mask = 64'hCF03CF0303030303;
-defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~2 .lut_mask = 64'h0000003000000033;
+defparam \soc_inst|m0_1|u_logic|It52z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~2 (
+// Location: LABCELL_X29_Y16_N42
+cyclonev_lcell_comb \soc_inst|ram_1|byte0~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hklwx4~2_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  $ 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|ram_1|byte0~0_combout  = ( \soc_inst|m0_1|u_logic|It52z4~2_combout  & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|It52z4~2_combout  & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & !\soc_inst|m0_1|u_logic|T50wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|It52z4~2_combout  & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  ) ) # ( 
+// !\soc_inst|m0_1|u_logic|It52z4~2_combout  & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (!\soc_inst|m0_1|u_logic|T50wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hklwx4~2_combout ),
+	.combout(\soc_inst|ram_1|byte0~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .lut_mask = 64'h0000008400000000;
-defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .shared_arith = "off";
+defparam \soc_inst|ram_1|byte0~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte0~0 .lut_mask = 64'hFCFCFFFFECECFFFF;
+defparam \soc_inst|ram_1|byte0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~3 (
+// Location: FF_X29_Y16_N44
+dffeas \soc_inst|ram_1|byte_select[0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|byte0~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|byte_select [0]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[0] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y20_N54
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[6]~32 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hklwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Hklwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hklwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Nbm2z4~q ) # ((!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Owq2z4~q 
-// )))) ) )
+// \soc_inst|ram_1|data_to_memory[6]~32_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select [0]) ) ) ) # ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & 
+// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|byte_select [0]) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hklwx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|byte_select [0]),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hklwx4~3_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[6]~32_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .lut_mask = 64'hEF00EF0000000000;
-defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[6]~32 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[6]~32 .lut_mask = 64'h0000030330303333;
+defparam \soc_inst|ram_1|data_to_memory[6]~32 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jeewx4 (
+// Location: FF_X23_Y20_N8
+dffeas \soc_inst|switches_1|switch_store[1][6] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[6]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[1][6]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][6] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y20_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[22]~35 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jeewx4~combout  = ( !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (!\soc_inst|m0_1|u_logic|Uup2z4~q  & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) ) )
+// \soc_inst|interconnect_1|HRDATA[22]~35_combout  = ( \soc_inst|interconnect_1|HRDATA[20]~7_combout  & ( \soc_inst|switches_1|switch_store[1][6]~q  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ) # (\soc_inst|interconnect_1|Equal1~0_combout 
+// ) ) ) ) # ( \soc_inst|interconnect_1|HRDATA[20]~7_combout  & ( !\soc_inst|switches_1|switch_store[1][6]~q  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+	.dataf(!\soc_inst|switches_1|switch_store[1][6]~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jeewx4~combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jeewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jeewx4 .lut_mask = 64'h8080808000000000;
-defparam \soc_inst|m0_1|u_logic|Jeewx4 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[22]~35 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[22]~35 .lut_mask = 64'h00000C0C00003F3F;
+defparam \soc_inst|interconnect_1|HRDATA[22]~35 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y11_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zmlwx4~0 (
+// Location: LABCELL_X23_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aphvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zmlwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Jeewx4~combout  $ (((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))))) ) )
+// \soc_inst|m0_1|u_logic|Aphvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[22]~35_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[22]~35_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jeewx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aphvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .lut_mask = 64'h3090309000000000;
-defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~0 (
+// Location: FF_X23_Y20_N34
+dffeas \soc_inst|m0_1|u_logic|Enw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Aphvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Enw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Enw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Enw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hklwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|J6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Enw2z4~q ) # ((!\soc_inst|m0_1|u_logic|I3y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
+//  & ( (!\soc_inst|m0_1|u_logic|I3y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Enw2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hklwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J6nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .lut_mask = 64'hF000F000FAAAFAAA;
-defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~4 (
+// Location: LABCELL_X36_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hklwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hklwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hklwx4~3_combout  & !\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hklwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hklwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Ohwvx4~combout  & (!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Fyrwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|J6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout )) # (\soc_inst|interconnect_1|HRDATA[6]~36_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hklwx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hklwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hklwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J6nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .lut_mask = 64'h0040505000000000;
-defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .lut_mask = 64'hC0C0C0C0C0FFC0FF;
+defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bthvx4~0 (
+// Location: LABCELL_X35_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bthvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~q  & ( \soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ( \soc_inst|m0_1|u_logic|Hklwx4~4_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~q  & ( \soc_inst|m0_1|u_logic|Qllwx4~4_combout 
-//  & ( (\soc_inst|m0_1|u_logic|Hklwx4~4_combout  & ((\soc_inst|m0_1|u_logic|Cllwx4~0_combout ) # (\soc_inst|m0_1|u_logic|E4xvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cyq2z4~q  & ( !\soc_inst|m0_1|u_logic|Qllwx4~4_combout  ) )
+// \soc_inst|m0_1|u_logic|J6nvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[22]~35_combout  & (!\soc_inst|m0_1|u_logic|J6nvx4~1_combout  & !\soc_inst|m0_1|u_logic|J6nvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J6nvx4~1_combout  & !\soc_inst|m0_1|u_logic|J6nvx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hklwx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|J6nvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J6nvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .lut_mask = 64'h0000FFFF030F0F0F;
-defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .lut_mask = 64'hF000F000A000A000;
+defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y8_N38
-dffeas \soc_inst|m0_1|u_logic|Cyq2z4 (
+// Location: FF_X35_Y16_N41
+dffeas \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -94505,722 +95361,636 @@ dffeas \soc_inst|m0_1|u_logic|Cyq2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cyq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cyq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tykwx4~0 (
+// Location: LABCELL_X35_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tykwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Cyq2z4~q ) # ((\soc_inst|m0_1|u_logic|I6z2z4~q  & \soc_inst|m0_1|u_logic|K9z2z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Cyq2z4~q ) # (\soc_inst|m0_1|u_logic|I6z2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|M4fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tykwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .lut_mask = 64'h0B0B0B0B0A0B0A0B;
-defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tykwx4~1 (
+// Location: LABCELL_X40_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vskwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tykwx4~1_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Auk2z4~q ) # ((\soc_inst|m0_1|u_logic|K1z2z4~q  & !\soc_inst|m0_1|u_logic|Tykwx4~0_combout )) ) 
-// ) )
+// \soc_inst|m0_1|u_logic|Vskwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|Ohwvx4~combout  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tykwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tykwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .lut_mask = 64'h000000000000FF50;
-defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .lut_mask = 64'h5050505000000000;
+defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~0 (
+// Location: LABCELL_X35_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H06wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kxkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~q  & (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & !\soc_inst|m0_1|u_logic|Yzi2z4~q ))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Yzi2z4~q 
-// ))))) ) )
+// \soc_inst|m0_1|u_logic|H06wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bsy2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .lut_mask = 64'h0B080B08ABAAABAA;
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H06wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H06wx4~0 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|H06wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~1 (
+// Location: LABCELL_X36_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V76wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kxkwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # ((!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|V76wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & \soc_inst|m0_1|u_logic|B73wx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V76wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V76wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V76wx4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|V76wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~2 (
+// Location: MLABCELL_X34_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V76wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kxkwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Kxkwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout  & (!\soc_inst|m0_1|u_logic|Tykwx4~1_combout  & !\soc_inst|m0_1|u_logic|Kxkwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|V76wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( !\soc_inst|m0_1|u_logic|V76wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M66wx4~combout  & (((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) # (\soc_inst|m0_1|u_logic|M66wx4~combout  & (!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( !\soc_inst|m0_1|u_logic|V76wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tykwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kxkwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kxkwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V76wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .lut_mask = 64'h5000500000000000;
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y9_N26
-dffeas \soc_inst|m0_1|u_logic|Svk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Svk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V76wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V76wx4~1 .lut_mask = 64'hEEEEEE0E00000000;
+defparam \soc_inst|m0_1|u_logic|V76wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C51xx4~0 (
+// Location: LABCELL_X36_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D56wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C51xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|D56wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Jppvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D56wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C51xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C51xx4~0 .lut_mask = 64'h0000000020002000;
-defparam \soc_inst|m0_1|u_logic|C51xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y9_N25
-dffeas \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X45_Y13_N37
-dffeas \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y11_N50
-dffeas \soc_inst|m0_1|u_logic|Po53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po53z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D56wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D56wx4~0 .lut_mask = 64'h0C0C0C0C2E0C2E0C;
+defparam \soc_inst|m0_1|u_logic|D56wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y11_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~2 (
+// Location: MLABCELL_X34_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mz5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R40wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Bv03z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Bv03z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// ( \soc_inst|m0_1|u_logic|Yaz2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Bv03z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|X533z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bv03z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|X533z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mz5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X533z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bv03z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R40wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mz5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R40wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R40wx4~2 .lut_mask = 64'h000500F50F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|R40wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y9_N37
-dffeas \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X39_Y4_N26
-dffeas \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .lut_mask = 64'h0000000055550000;
+defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y11_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~1 (
+// Location: LABCELL_X37_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R40wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hyz2z4~q  & ( \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Ow13z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyz2z4~q  & ( \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|Ow13z4~q )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  $ 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hyz2z4~q  & ( !\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ow13z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyz2z4~q  & ( !\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & 
-// ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ow13z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  $ 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|P0hwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~q  & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ow13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R40wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R40wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R40wx4~1 .lut_mask = 64'h50255525F025F525;
-defparam \soc_inst|m0_1|u_logic|R40wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .lut_mask = 64'h0000333300000000;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y11_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~0 (
+// Location: MLABCELL_X39_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Px5wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R40wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Po53z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|R40wx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Po53z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|R40wx4~2_combout  
-// & \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|R40wx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|R40wx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Px5wx4~combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Po53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R40wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R40wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Px5wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R40wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R40wx4~0 .lut_mask = 64'hCCC0C0C000080008;
-defparam \soc_inst|m0_1|u_logic|R40wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Px5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Px5wx4 .lut_mask = 64'hFFFFFFFFFFF0FFF0;
+defparam \soc_inst|m0_1|u_logic|Px5wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4 (
+// Location: MLABCELL_X39_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uw5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R40wx4~combout  = ( !\soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Uw5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Px5wx4~combout  & ( (\soc_inst|m0_1|u_logic|G27wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ (((\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Bsy2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uw5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R40wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R40wx4 .lut_mask = 64'hAF23000000000000;
-defparam \soc_inst|m0_1|u_logic|R40wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .lut_mask = 64'h090C090C00000000;
+defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[11]~8 (
+// Location: MLABCELL_X34_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|R40wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Wq5wx4~combout  & \soc_inst|m0_1|u_logic|R40wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Xu5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uw5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mz5wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Jp3wx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uw5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mz5wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
-	.dataf(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Mz5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uw5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .lut_mask = 64'h0505AFAF0505AFAF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .lut_mask = 64'hC0C0C00000000000;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N9
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[11]~17 (
+// Location: LABCELL_X40_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[11]~17_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (!\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout )) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ) # (\soc_inst|ram_1|byte_select [1]))) ) )
+// \soc_inst|m0_1|u_logic|Xu5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [1]),
-	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[11]~17_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[11]~17 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[11]~17 .lut_mask = 64'h1133113300220022;
-defparam \soc_inst|ram_1|data_to_memory[11]~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .lut_mask = 64'hAAAAAAAAAAA0AA00;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N45
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[11]~24 (
+// Location: MLABCELL_X34_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~2 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[11]~24_combout  = ( \soc_inst|interconnect_1|HRDATA[11]~3_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[11]~3_combout  & ( 
-// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Xu5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xu5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu5wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|D56wx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|D56wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xu5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[11]~24 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[11]~24 .lut_mask = 64'hF0F0F0F000FF00FF;
-defparam \soc_inst|interconnect_1|HRDATA[11]~24 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .lut_mask = 64'h0000000000003322;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~13 (
+// Location: LABCELL_X33_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~13_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Bby2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~30  ))
-// \soc_inst|m0_1|u_logic|Add1~14  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Bby2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~30  ))
+// \soc_inst|m0_1|u_logic|Xu5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H06wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M4fwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H06wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu5wx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~2_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~30 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~13_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~14 ),
+	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~13 .lut_mask = 64'h0000000000005050;
-defparam \soc_inst|m0_1|u_logic|Add1~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .lut_mask = 64'h00000000FFFF0A0A;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I9nvx4~0 (
+// Location: LABCELL_X27_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bby2z4~q  & ( \soc_inst|m0_1|u_logic|Edovx4~combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~24_combout  & (((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) # (\soc_inst|interconnect_1|HRDATA[11]~24_combout  & (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bby2z4~q  & ( \soc_inst|m0_1|u_logic|Edovx4~combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~24_combout  & (((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) # 
-// (\soc_inst|interconnect_1|HRDATA[11]~24_combout  & (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bby2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Edovx4~combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~24_combout  & (((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) # (\soc_inst|interconnect_1|HRDATA[11]~24_combout  & 
-// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) )
-
-	.dataa(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add1~13_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+// \soc_inst|m0_1|u_logic|Xu5wx4~combout  = ( \soc_inst|m0_1|u_logic|G36wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu5wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|W46wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|G36wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Xu5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|W46wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W46wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|G36wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I9nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .lut_mask = 64'h0000EEE0EEE0EEE0;
-defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4 .lut_mask = 64'h00000000C8C8CCCC;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y8_N8
-dffeas \soc_inst|m0_1|u_logic|Bby2z4 (
+// Location: FF_X27_Y16_N2
+dffeas \soc_inst|m0_1|u_logic|Wai2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|I9nvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bby2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wai2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bby2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bby2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wai2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wai2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B9nvx4~0 (
+// Location: LABCELL_X23_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qcy2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~1_sumout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~1_sumout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[12]~22_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qcy2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Djywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~q  & ((\soc_inst|m0_1|u_logic|Fuhwx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add1~1_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B9nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .lut_mask = 64'h0F0CFFCC0A08AA88;
-defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djywx4~0 .lut_mask = 64'h0022002250725072;
+defparam \soc_inst|m0_1|u_logic|Djywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y8_N58
-dffeas \soc_inst|m0_1|u_logic|Qcy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B9nvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qcy2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lstwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lstwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Djywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Djywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
+// ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Djywx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qcy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qcy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .lut_mask = 64'hC8C0C8C0CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Knhvx4~0 (
+// Location: LABCELL_X23_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B7owx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Knhvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout  & 
-// ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ))))
+// \soc_inst|m0_1|u_logic|B7owx4~combout  = ( \soc_inst|m0_1|u_logic|F4nvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & !\soc_inst|m0_1|u_logic|Mjl2z4~q ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
-	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Knhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .lut_mask = 64'hFF72FF72FF72FF72;
-defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B7owx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B7owx4 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|B7owx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y9_N59
-dffeas \soc_inst|m0_1|u_logic|Mww2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Knhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mww2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( (\soc_inst|m0_1|u_logic|Xeo2z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Gdo2z4~q ))) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Gdo2z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gdo2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mww2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mww2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .lut_mask = 64'hAFAF000023230000;
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zgsvx4~0 (
+// Location: MLABCELL_X21_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zgsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout  & 
-// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 )) ) )
+// \soc_inst|m0_1|u_logic|Pjyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pjyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|U18wx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|interconnect_1|HRDATA[16]~30_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|U18wx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pjyvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zgsvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .lut_mask = 64'h00000000F303F303;
-defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .lut_mask = 64'h00000000CF8ACF8A;
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y9_N2
-dffeas \soc_inst|m0_1|u_logic|Hyy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F9pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ((\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Amyvx4~2_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Amyvx4~2_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ((\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Amyvx4~2_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|F9pvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hyy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hyy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .lut_mask = 64'h0700070777007777;
+defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4nvx4~0 (
+// Location: MLABCELL_X21_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9pvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T4nvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( (!\soc_inst|m0_1|u_logic|Vapvx4~combout  & (!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Hyy2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Scpvx4~2_combout )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( (!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Hyy2z4~q ) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ))) ) )
+// \soc_inst|m0_1|u_logic|F9pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F9pvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F9pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T4nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .lut_mask = 64'h30F030F020A020A0;
-defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .lut_mask = 64'h000000005F4F5F4F;
+defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4nvx4~1 (
+// Location: MLABCELL_X25_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|T4nvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qcy2z4~q  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mww2z4~q ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|T4nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mww2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Kkyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mww2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|T4nvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .lut_mask = 64'h00000000F0FF5055;
-defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .lut_mask = 64'h0F0F0F0F0F000F00;
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y9_N1
-dffeas \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE (
+// Location: MLABCELL_X25_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ocnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ocnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|m0_1|u_logic|F9pvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Kkyvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kyi2z4~q ))))) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Kyi2z4~q ))))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Kyi2z4~q ))))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kkyvx4~1_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .lut_mask = 64'h4C5F0C0F0C0F0C0F;
+defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y20_N25
+dffeas \soc_inst|m0_1|u_logic|R1w2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -95229,616 +95999,569 @@ dffeas \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|R1w2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R1w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R1w2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ocfwx4~0 (
+// Location: MLABCELL_X28_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ocfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) 
-// ) )
+// \soc_inst|m0_1|u_logic|F5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|J4x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mtqvx4~combout ) # ((!\soc_inst|m0_1|u_logic|R1w2z4~q  & \soc_inst|m0_1|u_logic|Ye4wx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|J4x2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|R1w2z4~q  & (\soc_inst|m0_1|u_logic|Ye4wx4~combout  & \soc_inst|m0_1|u_logic|Mtqvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F5mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .lut_mask = 64'h0101000000000000;
-defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .lut_mask = 64'h000A000AFF0AFF0A;
+defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y7_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rafwx4~0 (
+// Location: MLABCELL_X28_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rafwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|R1d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~q )))) # (\soc_inst|m0_1|u_logic|Nqy2z4~q 
-// ) ) )
+// \soc_inst|m0_1|u_logic|F5mvx4~2_combout  = ( \soc_inst|m0_1|u_logic|U5x2z4~q  & ( \soc_inst|m0_1|u_logic|F5mvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (!\soc_inst|interconnect_1|HREADY~0_combout )) # (\soc_inst|m0_1|u_logic|F5mvx4~0_combout 
+// ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U5x2z4~q  & ( \soc_inst|m0_1|u_logic|F5mvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|F5mvx4~0_combout  & \soc_inst|interconnect_1|HREADY~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|U5x2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|F5mvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (!\soc_inst|interconnect_1|HREADY~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U5x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|F5mvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F5mvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .lut_mask = 64'h000000008CFF8CFF;
-defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .lut_mask = 64'h0000FFF00055FFF5;
+defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y7_N4
-dffeas \soc_inst|m0_1|u_logic|Rni2z4 (
+// Location: FF_X28_Y20_N40
+dffeas \soc_inst|m0_1|u_logic|U5x2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|F5mvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U5x2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rni2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rni2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U5x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5x2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X36_Y9_N40
-dffeas \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X28_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X7mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J5vvx4~combout  & (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|S4w2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J5vvx4~combout  & (\soc_inst|m0_1|u_logic|S4w2z4~q  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
+// \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J5vvx4~combout  & (\soc_inst|m0_1|u_logic|S4w2z4~q  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
+// \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J5vvx4~combout  & (\soc_inst|m0_1|u_logic|S4w2z4~q  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
+// \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) )
 
-// Location: FF_X37_Y9_N53
-dffeas \soc_inst|m0_1|u_logic|L753z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L753z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|X7mvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L753z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L753z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .lut_mask = 64'h0001000100010051;
+defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~0 (
+// Location: MLABCELL_X28_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Punvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|L753z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|L753z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|L753z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|X7mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I6w2z4~q  & ( \soc_inst|m0_1|u_logic|X7mvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I6w2z4~q  & ( \soc_inst|m0_1|u_logic|X7mvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|I6w2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|X7mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (!\soc_inst|interconnect_1|HREADY~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L753z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|I6w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X7mvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Punvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X7mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Punvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Punvx4~0 .lut_mask = 64'h0022000200200000;
-defparam \soc_inst|m0_1|u_logic|Punvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .lut_mask = 64'h0000FCFCFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y12_N47
-dffeas \soc_inst|m0_1|u_logic|Qi03z4 (
+// Location: FF_X28_Y20_N7
+dffeas \soc_inst|m0_1|u_logic|I6w2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|X7mvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qi03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I6w2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qi03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qi03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I6w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I6w2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y11_N19
-dffeas \soc_inst|m0_1|u_logic|Wlz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wlz2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lefwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lefwx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|I6w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ) # (\soc_inst|m0_1|u_logic|Ye4wx4~combout ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|I6w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ye4wx4~combout  & \soc_inst|m0_1|u_logic|U5x2z4~q )) # (\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ))) ) 
+// ) ) # ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|I6w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & \soc_inst|m0_1|u_logic|Z5pvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|I6w2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ye4wx4~combout  & \soc_inst|m0_1|u_logic|U5x2z4~q )) # (\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U5x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I6w2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wlz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wlz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .lut_mask = 64'h0A2A0A0A0A2A2A2A;
+defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~2 (
+// Location: MLABCELL_X21_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Punvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wlz2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qi03z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Cxhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fcj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fcj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qi03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wlz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Punvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cxhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Punvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Punvx4~2 .lut_mask = 64'h00A0000000C00000;
-defparam \soc_inst|m0_1|u_logic|Punvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .lut_mask = 64'hCC00CC00C0CCC0CC;
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y12_N17
-dffeas \soc_inst|m0_1|u_logic|Kf13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kf13z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cxhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~93_sumout  & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & \soc_inst|m0_1|u_logic|Cxhvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Add5~93_sumout  & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Cxhvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~93_sumout  & ( !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & \soc_inst|m0_1|u_logic|Cxhvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~93_sumout  & ( !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Cxhvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Cxhvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kf13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kf13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .lut_mask = 64'h00AA008800FF00CC;
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y12_N16
-dffeas \soc_inst|m0_1|u_logic|To23z4 (
+// Location: FF_X22_Y14_N49
+dffeas \soc_inst|m0_1|u_logic|Fcj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|To23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fcj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|To23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|To23z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Punvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|To23z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) 
-// # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Kf13z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kf13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|To23z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Punvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Punvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Punvx4~1 .lut_mask = 64'h000088000000A000;
-defparam \soc_inst|m0_1|u_logic|Punvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fcj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fcj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~3 (
+// Location: LABCELL_X30_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ipsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Punvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Punvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Duuwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duuwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Duuwx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Duuwx4~3_combout  & !\soc_inst|m0_1|u_logic|Punvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ipsvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Punvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Punvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Punvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Punvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Punvx4~3 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Punvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~4 (
+// Location: LABCELL_X30_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Punvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Punvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Punvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Punvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Punvx4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Punvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|It52z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Fcj2z4~q  & ((!\soc_inst|m0_1|u_logic|Tyx2z4~q ))) # (\soc_inst|m0_1|u_logic|Fcj2z4~q  & (!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q )) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fcj2z4~q  & ((!\soc_inst|m0_1|u_logic|Tyx2z4~q ))) # (\soc_inst|m0_1|u_logic|Fcj2z4~q  & (!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q 
+// )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Punvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Punvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|It52z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Punvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Punvx4~4 .lut_mask = 64'hF0CCF0FFF0CCF055;
-defparam \soc_inst|m0_1|u_logic|Punvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~0 .lut_mask = 64'h00CA00CACACACACA;
+defparam \soc_inst|m0_1|u_logic|It52z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T50wx4~0 (
+// Location: LABCELL_X30_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T50wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~93_sumout  & ( (((\soc_inst|m0_1|u_logic|Punvx4~4_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|O092z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~93_sumout  & ( ((\soc_inst|m0_1|u_logic|Punvx4~4_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|O092z4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|It52z4~1_combout  = ( !\soc_inst|m0_1|u_logic|It52z4~0_combout  & ( \soc_inst|m0_1|u_logic|Vaw2z4~q  & ( !\soc_inst|m0_1|u_logic|Ipsvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|It52z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Vaw2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|It52z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vaw2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Fcj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O092z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|It52z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|It52z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T50wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T50wx4~0 .lut_mask = 64'h557755775F7F5F7F;
-defparam \soc_inst|m0_1|u_logic|T50wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~1 .lut_mask = 64'hF4F44444F0F00000;
+defparam \soc_inst|m0_1|u_logic|It52z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N48
-cyclonev_lcell_comb \soc_inst|ram_1|byte1~0 (
+// Location: LABCELL_X30_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7mwx4 (
 // Equation(s):
-// \soc_inst|ram_1|byte1~0_combout  = ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|E7mwx4~combout  = ( \soc_inst|m0_1|u_logic|hprot_o~5_combout  & ( \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|It52z4~1_combout  & (\soc_inst|m0_1|u_logic|Z5pvx4~3_combout  & 
+// \soc_inst|m0_1|u_logic|Scpvx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|hprot_o~5_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|It52z4~1_combout  & (\soc_inst|m0_1|u_logic|Z5pvx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|S4w2z4~q  & \soc_inst|m0_1|u_logic|Scpvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|It52z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|byte1~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E7mwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte1~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|byte1~0 .lut_mask = 64'hF5D5F555F5F7F555;
-defparam \soc_inst|ram_1|byte1~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E7mwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7mwx4 .lut_mask = 64'h0000001000000011;
+defparam \soc_inst|m0_1|u_logic|E7mwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y7_N49
-dffeas \soc_inst|ram_1|byte_select[1] (
+// Location: FF_X30_Y17_N14
+dffeas \soc_inst|m0_1|u_logic|Vaw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte1~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|E7mwx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select [1]),
+	.q(\soc_inst|m0_1|u_logic|Vaw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[1] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vaw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vaw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y9_N48
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[14]~30 (
+// Location: LABCELL_X30_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpsvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[14]~30_combout  = ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (!\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ) # (\soc_inst|ram_1|byte_select [1]))) ) )
+// \soc_inst|m0_1|u_logic|Bpsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vaw2z4~q  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [1]),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
-	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[14]~30_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[14]~30 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[14]~30 .lut_mask = 64'h0707070702020202;
-defparam \soc_inst|ram_1|data_to_memory[14]~30 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y10_N30
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[30]~34 (
+// Location: LABCELL_X30_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~1 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[30]~34_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  & ( \soc_inst|interconnect_1|HRDATA[29]~0_combout  ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  & ( 
-// !\soc_inst|interconnect_1|HRDATA[29]~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Scpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bpsvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tyx2z4~q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Scpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[30]~34 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[30]~34 .lut_mask = 64'hF0F00000FFFF0F0F;
-defparam \soc_inst|interconnect_1|HRDATA[30]~34 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wmhvx4~0 (
+// Location: LABCELL_X30_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wmhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[30]~34_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[30]~34_combout  )
+// \soc_inst|m0_1|u_logic|Scpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
+// \soc_inst|interconnect_1|HREADY~0_combout )) # (\soc_inst|m0_1|u_logic|Scpvx4~1_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wmhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y6_N5
-dffeas \soc_inst|m0_1|u_logic|Qzw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wmhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qzw2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qzw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qzw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .lut_mask = 64'h0000000050700000;
+defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~0 (
+// Location: MLABCELL_X34_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M4nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qzw2z4~q ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|L7nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( \soc_inst|interconnect_1|HRDATA[2]~14_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # (\soc_inst|interconnect_1|HRDATA[2]~14_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzw2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M4nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L7nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .lut_mask = 64'hC0C0C0C0FFC0FFC0;
-defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .lut_mask = 64'hCCCCCCFF000000FF;
+defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8nvx4~0 (
+// Location: MLABCELL_X34_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cqhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & (((\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout )))) # 
-// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & (!\soc_inst|interconnect_1|HRDATA[11]~3_combout  & ((\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Cqhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[18]~13_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[18]~13_combout  )
 
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fey2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N8nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cqhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .lut_mask = 64'h0FFF0FFF0EEE0EEE;
-defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .lut_mask = 64'hFFFFAAAAFFFFAAAA;
+defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y8_N19
-dffeas \soc_inst|m0_1|u_logic|Fey2z4 (
+// Location: FF_X34_Y19_N41
+dffeas \soc_inst|m0_1|u_logic|Ahw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|N8nvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cqhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fey2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ahw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fey2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fey2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ahw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ahw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~1 (
+// Location: MLABCELL_X34_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fey2z4~q  & ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Fey2z4~q  & ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( ((\soc_inst|interconnect_1|HRDATA[11]~3_combout  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout )) # (\soc_inst|m0_1|u_logic|Wfovx4~combout ) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Fey2z4~q  & ( !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( \soc_inst|m0_1|u_logic|Wfovx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|L7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ahw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Ahw2z4~q  & 
+// \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fey2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ahw2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M4nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L7nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .lut_mask = 64'h0F0F00000F3F0033;
-defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .lut_mask = 64'h0CFF0CFF0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~2 (
+// Location: MLABCELL_X34_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M4nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|M4nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|M4nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[30]~34_combout ))) ) )
+// \soc_inst|m0_1|u_logic|L7nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|L7nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|L7nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[18]~13_combout ))) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M4nvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L7nvx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M4nvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|L7nvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .lut_mask = 64'hF0A0F0A000000000;
+defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y6_N49
-dffeas \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE (
+// Location: FF_X34_Y19_N22
+dffeas \soc_inst|m0_1|u_logic|Viy2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -95847,1349 +96570,1375 @@ dffeas \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Viy2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Viy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Viy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhgwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y16_N55
+dffeas \soc_inst|m0_1|u_logic|Fzl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fzl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fzl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iikwx4~0 (
+// Location: LABCELL_X33_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iikwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & (\soc_inst|m0_1|u_logic|W7hwx4~0_combout  & \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))) ) 
-// )
+// \soc_inst|m0_1|u_logic|Z4xvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ((!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .lut_mask = 64'h0002000200000000;
-defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .lut_mask = 64'hCF45CF4500000000;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md6wx4~0 (
+// Location: LABCELL_X33_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Md6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Z4xvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z4xvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~q  $ (((\soc_inst|m0_1|u_logic|Fzl2z4~q ) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z4xvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Md6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .lut_mask = 64'h000C000C00000000;
-defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .lut_mask = 64'h0000000095FF95FF;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dc6wx4~0 (
+// Location: LABCELL_X36_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dc6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Md6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|G97wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|I6xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y7xvx4~combout  $ (!\soc_inst|m0_1|u_logic|Gqxvx4~combout  $ (!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Md6wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dc6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I6xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .lut_mask = 64'hFB00FB0000000000;
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .lut_mask = 64'h0000000096969696;
+defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dc6wx4~1 (
+// Location: LABCELL_X33_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dc6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  & \soc_inst|m0_1|u_logic|Dc6wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  & (\soc_inst|m0_1|u_logic|Dc6wx4~0_combout  & !\soc_inst|m0_1|u_logic|Qp3wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Z4xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( 
+// ((!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zpqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dc6wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .lut_mask = 64'h0A000A000A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .lut_mask = 64'h0AFF0AFF0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8d2z4~0 (
+// Location: LABCELL_X33_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R8d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Z4xvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Z4xvx4~2_combout  & (!\soc_inst|m0_1|u_logic|I6xvx4~0_combout  & !\soc_inst|m0_1|u_logic|Z4xvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Viy2z4~q  & (\soc_inst|m0_1|u_logic|Z4xvx4~2_combout  & (!\soc_inst|m0_1|u_logic|I6xvx4~0_combout  & !\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z4xvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I6xvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .lut_mask = 64'h1000100030003000;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uijwx4~0 (
+// Location: FF_X33_Y15_N1
+dffeas \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z9dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uijwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Z9dwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .lut_mask = 64'hA050A05000000000;
-defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qf6wx4~0 (
+// Location: MLABCELL_X39_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jk0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qf6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Jk0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|B73wx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qf6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .lut_mask = 64'h0000000000C000C0;
-defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uv6wx4 (
+// Location: LABCELL_X37_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj0xx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uv6wx4~combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Aj0xx4~combout  = ( \soc_inst|m0_1|u_logic|Yg2wx4~combout  & ( \soc_inst|m0_1|u_logic|Jk0xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Kryvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yg2wx4~combout  & ( \soc_inst|m0_1|u_logic|Jk0xx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Yg2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Jk0xx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Kryvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yg2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Jk0xx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Kryvx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uv6wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uv6wx4 .lut_mask = 64'h00000000FFC0FFC0;
-defparam \soc_inst|m0_1|u_logic|Uv6wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aj0xx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj0xx4 .lut_mask = 64'h00440044FFFF0044;
+defparam \soc_inst|m0_1|u_logic|Aj0xx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~2 (
+// Location: LABCELL_X29_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gjqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (((!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qf6wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aj0xx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qf6wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .lut_mask = 64'h00000000FFFBFFFB;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~3 (
+// Location: LABCELL_X37_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ujqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~2_combout  & ( (((!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( \soc_inst|m0_1|u_logic|Aj0xx4~combout  & ( (!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zhyvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Kryvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q ) # ((!\soc_inst|m0_1|u_logic|Zhyvx4~combout  & \soc_inst|m0_1|u_logic|Kryvx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( \soc_inst|m0_1|u_logic|Aj0xx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zhyvx4~combout  & \soc_inst|m0_1|u_logic|Kryvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .lut_mask = 64'h00000000F7FFF7FF;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .lut_mask = 64'h000000000C0C5D0C;
+defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~7 (
+// Location: LABCELL_X29_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xdnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~7_combout  = (!\soc_inst|m0_1|u_logic|Inb2z4~combout  & \soc_inst|m0_1|u_logic|Vsywx4~6_combout )
+// \soc_inst|m0_1|u_logic|Xdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Thm2z4~q ) # (\soc_inst|m0_1|u_logic|Gjqvx4~0_combout )) # (\soc_inst|interconnect_1|HREADY~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( ((!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Thm2z4~q )) # (\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .lut_mask = 64'h00F000F000F000F0;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .lut_mask = 64'h0FCF0FCF3FFF3FFF;
+defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~1 (
+// Location: FF_X29_Y19_N20
+dffeas \soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C34wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6mwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & (((\soc_inst|m0_1|u_logic|Vsywx4~7_combout ) # 
-// (\soc_inst|m0_1|u_logic|Wwywx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hzywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Hzywx4~0_combout  & !\soc_inst|m0_1|u_logic|Wwywx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vsywx4~7_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & (((\soc_inst|m0_1|u_logic|Vsywx4~7_combout ) # (\soc_inst|m0_1|u_logic|Wwywx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hzywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & \soc_inst|m0_1|u_logic|Vsywx4~7_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|C34wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ye4wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .lut_mask = 64'h0033133310331333;
-defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C34wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C34wx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|C34wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y10_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rqywx4~0 (
+// Location: LABCELL_X29_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C34wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rqywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ye4wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|U7w2z4~q ) # (\soc_inst|m0_1|u_logic|Ye4wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|C34wx4~combout  = ( \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|C34wx4~0_combout  & \soc_inst|m0_1|u_logic|Ypa2z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|C34wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .lut_mask = 64'hFF0FFF0F05050505;
-defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C34wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C34wx4 .lut_mask = 64'h3333333303030303;
+defparam \soc_inst|m0_1|u_logic|C34wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y10_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~2 (
+// Location: MLABCELL_X28_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zx3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6mwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & !\soc_inst|m0_1|u_logic|Ye4wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ye4wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  = (\soc_inst|m0_1|u_logic|C34wx4~combout  & ((\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cr0xx4~1_combout )))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .lut_mask = 64'hF0F0F0F0A0A0A0A0;
-defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .lut_mask = 64'h0555055505550555;
+defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y10_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5mwx4~0 (
+// Location: LABCELL_X27_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V5mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) # (\soc_inst|m0_1|u_logic|C6mwx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & !\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|H6mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uyv2z4~q  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # (\soc_inst|m0_1|u_logic|R1w2z4~q )) # (\soc_inst|m0_1|u_logic|Uaj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uyv2z4~q  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Uyv2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Uyv2z4~q  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .lut_mask = 64'h0F000F000F030F03;
-defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .lut_mask = 64'h5555FFFF5555F7FF;
+defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y10_N31
-dffeas \soc_inst|m0_1|u_logic|G9w2z4 (
+// Location: FF_X27_Y20_N55
+dffeas \soc_inst|m0_1|u_logic|Uyv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uyv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G9w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G9w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uyv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uyv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xf6wx4~0 (
+// Location: LABCELL_X29_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xf6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9w2z4~q  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kzxvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|G9w2z4~q  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kzxvx4~combout  & \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Orewx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Wwywx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uyv2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .lut_mask = 64'h0155015501050105;
-defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ua6wx4~0 (
+// Location: LABCELL_X29_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ua6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|C6mwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & !\soc_inst|m0_1|u_logic|Ye4wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ye4wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.dataf(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .lut_mask = 64'h0101000001010000;
-defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .lut_mask = 64'hF0F0F0F0C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~0 (
+// Location: MLABCELL_X28_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rqywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ua6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ua6wx4~0_combout  & !\soc_inst|m0_1|u_logic|Og4wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Rqywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q ) # (\soc_inst|m0_1|u_logic|R1w2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|U7w2z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .lut_mask = 64'hC0C0C0C0C000C000;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .lut_mask = 64'hC0C0C0C0CCFFCCFF;
+defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpjwx4~0 (
+// Location: LABCELL_X29_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gpjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|C6mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tyywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vsywx4~7_combout  & ( 
+// \soc_inst|m0_1|u_logic|Tyywx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .lut_mask = 64'h40404040C0C0C0C0;
-defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .lut_mask = 64'h0F0F0F0F0FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~1 (
+// Location: LABCELL_X29_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y6t2z4~q  & (\soc_inst|m0_1|u_logic|Q86wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Na6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q86wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|C6mwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Vsywx4~7_combout  & (\soc_inst|m0_1|u_logic|N8b2z4~combout  & ((\soc_inst|m0_1|u_logic|Luywx4~6_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Vsywx4~7_combout  & (((\soc_inst|m0_1|u_logic|N8b2z4~combout  & \soc_inst|m0_1|u_logic|Luywx4~6_combout )) # (\soc_inst|m0_1|u_logic|Ozywx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Gvywx4~0_combout ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|N8b2z4~combout  & ((\soc_inst|m0_1|u_logic|Luywx4~6_combout )))) # (\soc_inst|m0_1|u_logic|C6mwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q86wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N8b2z4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C6mwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .lut_mask = 64'h0F0C0F0C0A080A08;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .lut_mask = 64'h05FF0F0F37FF3F3F;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~4 (
+// Location: LABCELL_X29_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Abovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Bkxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Q86wx4~3_combout  & 
-// !\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Abovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Gjqvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Gjqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) # ((\soc_inst|m0_1|u_logic|C6mwx4~3_combout  & 
+// \soc_inst|m0_1|u_logic|C6mwx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q86wx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .lut_mask = 64'h0000000002000200;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Abovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Abovx4~0 .lut_mask = 64'h2223333333333333;
+defparam \soc_inst|m0_1|u_logic|Abovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~5 (
+// Location: LABCELL_X29_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout  & \soc_inst|m0_1|u_logic|Q86wx4~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Q86wx4~4_combout 
-//  & ((!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Jvqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q86wx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jvqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .lut_mask = 64'h00CF00CF00CC00CC;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .lut_mask = 64'h0000000050005000;
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~6 (
+// Location: LABCELL_X30_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jnrvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Dc6wx4~1_combout )) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Iikwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Jnrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (\soc_inst|m0_1|u_logic|Jvqvx4~0_combout  & \soc_inst|m0_1|u_logic|Xnrvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Jvqvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jhy2z4~q ) # (\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jnrvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .lut_mask = 64'h0000000032FA32FA;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .lut_mask = 64'h0555055505050505;
+defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~1 (
+// Location: FF_X30_Y19_N47
+dffeas \soc_inst|m0_1|u_logic|Jhy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Jnrvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jhy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jhy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pfovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ 
-// (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Pfovx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vaw2z4~q  & (((!\soc_inst|m0_1|u_logic|Jhy2z4~q  & !\soc_inst|m0_1|u_logic|Fcj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Vaw2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .lut_mask = 64'h0000000050500550;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .lut_mask = 64'h00000000F0F0D050;
+defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~2 (
+// Location: LABCELL_X33_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & 
-// ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Add1~29_sumout  = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|M9y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~26  ))
+// \soc_inst|m0_1|u_logic|Add1~30  = CARRY(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|M9y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~26  ))
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~29_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .lut_mask = 64'h00000F0F0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~29 .lut_mask = 64'h0000CCFF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Add1~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~3 (
+// Location: LABCELL_X33_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Jm6wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Jm6wx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~2_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Add1~13_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bby2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~30  ))
+// \soc_inst|m0_1|u_logic|Add1~14  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bby2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~30  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~30 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~13_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~14 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~13 .lut_mask = 64'h0000000000003030;
+defparam \soc_inst|m0_1|u_logic|Add1~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I9nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bby2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~24_combout  & ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bby2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|interconnect_1|HRDATA[11]~24_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bby2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bby2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Add1~13_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I9nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .lut_mask = 64'h0000333300003000;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .lut_mask = 64'h3232FAFA3200FA00;
+defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eyhvx4~0 (
+// Location: FF_X31_Y19_N49
+dffeas \soc_inst|m0_1|u_logic|Bby2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|I9nvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bby2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bby2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bby2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oesvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eyhvx4~0_combout  = ( !\soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Oesvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout  & 
+// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oesvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .lut_mask = 64'h00000000D1D1D1D1;
+defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ad7wx4~0 (
+// Location: LABCELL_X31_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ad7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|A5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Oesvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[11]~24_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Oesvx4~0_combout  & (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[11]~24_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oesvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A5nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .lut_mask = 64'h5050505055555555;
-defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .lut_mask = 64'h00E000E0E0E0E0E0;
+defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P28wx4 (
+// Location: LABCELL_X31_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rnhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P28wx4~combout  = ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & ((!\soc_inst|m0_1|u_logic|Igi2z4~q ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( 
-// !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & ((!\soc_inst|m0_1|u_logic|Igi2z4~q ))))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Qb3wx4~combout  & !\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rnhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ) # ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout 
+// )) ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & \soc_inst|interconnect_1|HRDATA[29]~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P28wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rnhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P28wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P28wx4 .lut_mask = 64'hC3F04B7887B40F3C;
-defparam \soc_inst|m0_1|u_logic|P28wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .lut_mask = 64'hF2F2F2F2FEFEFEFE;
+defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~4 (
+// Location: FF_X31_Y17_N5
+dffeas \soc_inst|m0_1|u_logic|Xuw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rnhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xuw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xuw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xuw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) )
+// \soc_inst|m0_1|u_logic|A5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|A5nvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xuw2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Bby2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|A5nvx4~0_combout 
+//  & ( !\soc_inst|m0_1|u_logic|Xuw2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Bby2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|A5nvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuw2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .lut_mask = 64'hAAAAAAAA22202220;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .lut_mask = 64'h0000AA220000FF33;
+defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hyewx4 (
+// Location: FF_X31_Y17_N26
+dffeas \soc_inst|m0_1|u_logic|Swy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Swy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Swy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nkpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hyewx4~combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rxl2z4~q  & \soc_inst|m0_1|u_logic|Yzi2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hyewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hyewx4 .lut_mask = 64'h0000000000000505;
-defparam \soc_inst|m0_1|u_logic|Hyewx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~0 (
+// Location: LABCELL_X33_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (\soc_inst|m0_1|u_logic|Hyewx4~combout  & \soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) 
-// )
+// \soc_inst|m0_1|u_logic|Df3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .lut_mask = 64'h0001000100000000;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .lut_mask = 64'h00000000C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~5 (
+// Location: LABCELL_X29_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ho3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Xly2z4~q  & ( \soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Dvy2z4~q  
-// & !\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( \soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Xly2z4~q  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ho3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .lut_mask = 64'h5500550055005540;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .lut_mask = 64'h0000A0A000000000;
+defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~6 (
+// Location: LABCELL_X33_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~6_combout  = (\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|Blwvx4~0_combout )
+// \soc_inst|m0_1|u_logic|Df3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & ((\soc_inst|m0_1|u_logic|W28wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .lut_mask = 64'h0F000F000F000F00;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .lut_mask = 64'h00000000003F003F;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xt6wx4~0 (
+// Location: LABCELL_X33_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xt6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jp3wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .lut_mask = 64'h050405040A080A08;
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .lut_mask = 64'hFA00000000000000;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q07wx4~1 (
+// Location: LABCELL_X33_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q07wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Egkwx4~0_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q07wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .lut_mask = 64'hFFF0FFF000F000F0;
-defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y11_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X07wx4~0 (
+// Location: LABCELL_X33_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X07wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q  & (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q 
-// ) # (!\soc_inst|m0_1|u_logic|Dvy2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Idk2z4~q 
-// ) # (!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Dvy2z4~q )))) # (\soc_inst|m0_1|u_logic|Idk2z4~q  & (!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Dvy2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Df3wx4~3_combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Df3wx4~3_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X07wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X07wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X07wx4~0 .lut_mask = 64'hFAC8C8000A080800;
-defparam \soc_inst|m0_1|u_logic|X07wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .lut_mask = 64'h00F000F050F050F0;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q07wx4~0 (
+// Location: LABCELL_X33_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q07wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (((\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fc7wx4~1_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (\soc_inst|m0_1|u_logic|Gci2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (((\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (\soc_inst|m0_1|u_logic|Gci2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & !\soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q07wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .lut_mask = 64'h3505350535F535F5;
-defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .lut_mask = 64'h000000005F0F5F0F;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y11_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xt6wx4~1 (
+// Location: MLABCELL_X39_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X07wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q07wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X07wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q07wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X07wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & (\soc_inst|m0_1|u_logic|Ukpvx4~combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & (\soc_inst|m0_1|u_logic|Ukpvx4~combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q07wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|X07wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q07wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .lut_mask = 64'hEAEA0000EA0000EA;
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .lut_mask = 64'h1010101010FF10FF;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~7 (
+// Location: LABCELL_X33_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Jm6wx4~6_combout  & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  $ 
-// (((\soc_inst|m0_1|u_logic|Ad7wx4~0_combout  & \soc_inst|m0_1|u_logic|P28wx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jm6wx4~6_combout  & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Jm6wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jm6wx4~6_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~6_combout  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q )) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|P28wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .lut_mask = 64'hFF003300FF00C900;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .lut_mask = 64'hFF3FFF3300000000;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eyhvx4~1 (
+// Location: LABCELL_X33_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eyhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Eyhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Eyhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Q86wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eyhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~7_combout  ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Eyhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Q86wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout  & 
-// \soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (((!\soc_inst|m0_1|u_logic|Df3wx4~5_combout )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q86wx4~6_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~5_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .lut_mask = 64'h4454FFFF5454FFFF;
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y7_N56
-dffeas \soc_inst|m0_1|u_logic|Pdi2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pdi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .lut_mask = 64'h00000000FB51FB51;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxhvx4~0 (
+// Location: LABCELL_X33_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cxhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fcj2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~4_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~4_combout  & ( 
+// \soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (!\soc_inst|m0_1|u_logic|Df3wx4~2_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Df3wx4~4_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Df3wx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cxhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .lut_mask = 64'hFAFA0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .lut_mask = 64'h5555555550005555;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxhvx4~1 (
+// Location: LABCELL_X29_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W0pvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cxhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H4nwx4~combout  & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Cxhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~93_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Cxhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~93_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  & ( !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Cxhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~93_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|W0pvx4~combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cxhvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W0pvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .lut_mask = 64'h00FA000000FA00FA;
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W0pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W0pvx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|W0pvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y9_N59
-dffeas \soc_inst|m0_1|u_logic|Fcj2z4 (
+// Location: FF_X35_Y11_N16
+dffeas \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fcj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fcj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vllvx4~0 (
+// Location: LABCELL_X36_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yhnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vllvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Yhnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Zei2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zei2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vllvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .lut_mask = 64'hCCCCCCCC0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y3_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnyvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qnyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  
-// & ( (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .lut_mask = 64'h0E0A0E0A0E0E0E0E;
-defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .lut_mask = 64'hCCCCCFCF00000F0F;
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vllvx4~1 (
+// Location: LABCELL_X36_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yhnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vllvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qnyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vllvx4~0_combout  & (!\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|G0w2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qnyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vllvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|G0w2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Yhnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Vvx2z4~q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Vvx2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Vvx2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vllvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o [29]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .lut_mask = 64'hAA0AAA0A88088808;
-defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .lut_mask = 64'h88CC000088CC88CC;
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y11_N22
-dffeas \soc_inst|m0_1|u_logic|U4z2z4 (
+// Location: FF_X35_Y11_N17
+dffeas \soc_inst|m0_1|u_logic|Cqo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U4z2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cqo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U4z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U4z2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X42_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Htyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qi03z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|U4z2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qi03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htyvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .lut_mask = 64'hA0000000C0000000;
-defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cqo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cqo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X36_Y9_N41
-dffeas \soc_inst|m0_1|u_logic|Cy33z4 (
+// Location: FF_X27_Y11_N23
+dffeas \soc_inst|m0_1|u_logic|Noo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cy33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Noo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cy33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cy33z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y9_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Htyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cy33z4~q  & ( (!\soc_inst|m0_1|u_logic|Wlz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cy33z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cy33z4~q  & ( (!\soc_inst|m0_1|u_logic|Wlz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Wlz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cy33z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htyvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .lut_mask = 64'h02000C0002000000;
-defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Noo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Noo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y9_N52
-dffeas \soc_inst|m0_1|u_logic|L753z4~DUPLICATE (
+// Location: FF_X28_Y8_N26
+dffeas \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -97197,335 +97946,332 @@ dffeas \soc_inst|m0_1|u_logic|L753z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L753z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L753z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Htyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|To23z4~q  & (\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kf13z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|To23z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kf13z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kf13z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kf13z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Kf13z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|To23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htyvx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .lut_mask = 64'hFF550F0533110301;
-defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Htyvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Htyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Htyvx4~1_combout  & !\soc_inst|m0_1|u_logic|V7ywx4~combout )) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Htyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Htyvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V7ywx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y8_N41
+dffeas \soc_inst|m0_1|u_logic|T243z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T243z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .lut_mask = 64'h00000000C000C000;
-defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T243z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T243z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[1] (
+// Location: MLABCELL_X28_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o [1] = (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Htyvx4~3_combout )
+// \soc_inst|m0_1|u_logic|N662z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|T243z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T243z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.combout(\soc_inst|m0_1|u_logic|N662z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .lut_mask = 64'h0F000F000F000F00;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~0 .lut_mask = 64'h0000000030220000;
+defparam \soc_inst|m0_1|u_logic|N662z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y9_N52
-dffeas \soc_inst|m0_1|u_logic|R0t2z4 (
+// Location: FF_X27_Y7_N38
+dffeas \soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R0t2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R0t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R0t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N662z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE_q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Bk13z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bk13z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|N662z4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N662z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~1 .lut_mask = 64'h0000000080808800;
+defparam \soc_inst|m0_1|u_logic|N662z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rexvx4~0 (
+// Location: MLABCELL_X25_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K862z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rexvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G7x2z4~q  & ( (\soc_inst|m0_1|u_logic|R0t2z4~q  & \soc_inst|m0_1|u_logic|G9w2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|K862z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ymo2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R0t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ymo2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K862z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K862z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K862z4~0 .lut_mask = 64'h0200000000000000;
+defparam \soc_inst|m0_1|u_logic|K862z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~0 (
+// Location: MLABCELL_X25_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Scpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & (!\soc_inst|m0_1|u_logic|I1c2z4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Jyb2z4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|I1c2z4~combout  & \soc_inst|m0_1|u_logic|Jyb2z4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|N662z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Yoz2z4~q  & ( \soc_inst|m0_1|u_logic|Sl03z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yoz2z4~q  & ( !\soc_inst|m0_1|u_logic|Sl03z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yoz2z4~q  & ( !\soc_inst|m0_1|u_logic|Sl03z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|I1c2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yoz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sl03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N662z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .lut_mask = 64'h0000000088A880A0;
-defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~2 .lut_mask = 64'h3000200010000000;
+defparam \soc_inst|m0_1|u_logic|N662z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~0 (
+// Location: LABCELL_X27_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ypa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|C34wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ypa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|C34wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ypa2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|N662z4~3_combout  = ( !\soc_inst|m0_1|u_logic|K862z4~0_combout  & ( !\soc_inst|m0_1|u_logic|N662z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|N662z4~0_combout  & (!\soc_inst|m0_1|u_logic|N662z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Noo2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Noo2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N662z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N662z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K862z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N662z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N662z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .lut_mask = 64'h00000000DC00DD00;
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~3 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|N662z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~0 (
+// Location: MLABCELL_X34_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|It52z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fcj2z4~q  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Fcj2z4~q  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Hxx2z4~q  & \soc_inst|m0_1|u_logic|M9pvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fcj2z4~q  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M9pvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eruwx4~combout  & ( \soc_inst|m0_1|u_logic|N662z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Ohh3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) # (\soc_inst|m0_1|u_logic|Cqo2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout  & ( \soc_inst|m0_1|u_logic|N662z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Ohh3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Cqo2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Eruwx4~combout  & ( !\soc_inst|m0_1|u_logic|N662z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Ohh3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Cqo2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout  & ( !\soc_inst|m0_1|u_logic|N662z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Ohh3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Cqo2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N662z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|It52z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It52z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|It52z4~0 .lut_mask = 64'h00CC00F0CCCCF0F0;
-defparam \soc_inst|m0_1|u_logic|It52z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .lut_mask = 64'h335033503350335F;
+defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~1 (
+// Location: LABCELL_X30_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o[29] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|It52z4~1_combout  = ( \soc_inst|m0_1|u_logic|It52z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fcj2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vaw2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|It52z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fcj2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vaw2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|haddr_o [29] = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Add3~9_sumout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~9_sumout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|It52z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add3~9_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|It52z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o [29]),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It52z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|It52z4~1 .lut_mask = 64'hCECCCECC0A000A00;
-defparam \soc_inst|m0_1|u_logic|It52z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o[29] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o[29] .lut_mask = 64'hCFCFCF008A8A8A00;
+defparam \soc_inst|m0_1|u_logic|haddr_o[29] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~2 (
+// Location: LABCELL_X30_Y16_N24
+cyclonev_lcell_comb \soc_inst|interconnect_1|LessThan1~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|It52z4~2_combout  = ( \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|It52z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Scpvx4~0_combout  & \soc_inst|m0_1|u_logic|Z5pvx4~3_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|It52z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Scpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|S4w2z4~q  & \soc_inst|m0_1|u_logic|Z5pvx4~3_combout )) ) ) )
+// \soc_inst|interconnect_1|LessThan1~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (!\soc_inst|m0_1|u_logic|haddr_o [29]) # (!\soc_inst|m0_1|u_logic|V2qvx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|It52z4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.datad(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.combout(\soc_inst|interconnect_1|LessThan1~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It52z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|It52z4~2 .lut_mask = 64'h0000000000300033;
-defparam \soc_inst|m0_1|u_logic|It52z4~2 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|LessThan1~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|LessThan1~0 .lut_mask = 64'hFFFFFFFF0000FFF0;
+defparam \soc_inst|interconnect_1|LessThan1~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N36
-cyclonev_lcell_comb \soc_inst|ram_1|byte0~0 (
+// Location: LABCELL_X29_Y17_N9
+cyclonev_lcell_comb \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 (
 // Equation(s):
-// \soc_inst|ram_1|byte0~0_combout  = ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & !\soc_inst|m0_1|u_logic|T50wx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|T50wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) )
+// \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout  = ( \soc_inst|interconnect_1|LessThan1~0_combout  & ( \soc_inst|interconnect_1|LessThan0~0_combout  ) ) # ( !\soc_inst|interconnect_1|LessThan1~0_combout  & ( 
+// !\soc_inst|interconnect_1|LessThan0~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|LessThan1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|byte0~0_combout ),
+	.combout(\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte0~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|byte0~0 .lut_mask = 64'hFFF5FFF5FFD5FFD5;
-defparam \soc_inst|ram_1|byte0~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .lut_mask = 64'hF0F0F0F00F0F0F0F;
+defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y7_N37
-dffeas \soc_inst|ram_1|byte_select[0] (
+// Location: FF_X29_Y17_N14
+dffeas \soc_inst|interconnect_1|mux_sel[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte0~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select [0]),
+	.q(\soc_inst|interconnect_1|mux_sel [1]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[0] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[0] .power_up = "low";
+defparam \soc_inst|interconnect_1|mux_sel[1] .is_wysiwyg = "true";
+defparam \soc_inst|interconnect_1|mux_sel[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X15_Y5_N0
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[5]~23 (
+// Location: MLABCELL_X25_Y15_N15
+cyclonev_lcell_comb \soc_inst|interconnect_1|Equal1~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[5]~23_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) )
+// \soc_inst|interconnect_1|Equal1~0_combout  = ( !\soc_inst|interconnect_1|mux_sel [2] & ( (!\soc_inst|interconnect_1|mux_sel [0] & \soc_inst|interconnect_1|mux_sel [1]) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [0]),
-	.datab(!\soc_inst|ram_1|write_cycle~q ),
-	.datac(gnd),
+	.dataa(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|mux_sel [1]),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[5]~23_combout ),
+	.combout(\soc_inst|interconnect_1|Equal1~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[5]~23 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[5]~23 .lut_mask = 64'h1111000033332222;
-defparam \soc_inst|ram_1|data_to_memory[5]~23 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|Equal1~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|Equal1~0 .lut_mask = 64'h0A0A0A0A00000000;
+defparam \soc_inst|interconnect_1|Equal1~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y5_N56
-dffeas \soc_inst|switches_1|switch_store[0][5] (
+// Location: FF_X22_Y20_N38
+dffeas \soc_inst|switches_1|switch_store[0][4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[5]~input_o ),
+	.asdata(\SW[4]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -97533,70 +98279,95 @@ dffeas \soc_inst|switches_1|switch_store[0][5] (
 	.ena(\soc_inst|switches_1|always0~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][5]~q ),
+	.q(\soc_inst|switches_1|switch_store[0][4]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][5] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][5] .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[0][4] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][4] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N54
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[5]~28 (
+// Location: LABCELL_X22_Y20_N36
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[4]~23 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[5]~28_combout  = ( \soc_inst|switches_1|switch_store[0][5]~q  & ( \soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ) # 
-// (\soc_inst|interconnect_1|Equal1~0_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][5]~q  & ( \soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ) ) ) ) # ( \soc_inst|switches_1|switch_store[0][5]~q  & ( !\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) ) # ( 
-// !\soc_inst|switches_1|switch_store[0][5]~q  & ( !\soc_inst|interconnect_1|HRDATA[7]~10_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) )
+// \soc_inst|interconnect_1|HRDATA[4]~23_combout  = ( \soc_inst|switches_1|switch_store[0][4]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( \soc_inst|interconnect_1|HRDATA[7]~10_combout  ) ) ) # ( 
+// !\soc_inst|switches_1|switch_store[0][4]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|interconnect_1|HRDATA[7]~10_combout ) ) ) ) # ( 
+// \soc_inst|switches_1|switch_store[0][4]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|interconnect_1|HRDATA[7]~10_combout ) ) ) )
 
 	.dataa(gnd),
 	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
-	.datae(!\soc_inst|switches_1|switch_store[0][5]~q ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|switches_1|switch_store[0][4]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[5]~28 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[5]~28 .lut_mask = 64'hF0F0F0F000CC33FF;
-defparam \soc_inst|interconnect_1|HRDATA[5]~28 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[4]~23 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[4]~23 .lut_mask = 64'h000003030C0C0F0F;
+defparam \soc_inst|interconnect_1|HRDATA[4]~23 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yanvx4~0 (
+// Location: LABCELL_X23_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W5rvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yanvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F0y2z4~q  & ( \soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|F0y2z4~q  & ( !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F0y2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|W5rvx4~combout  = ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & \soc_inst|m0_1|u_logic|X2rvx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yanvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W5rvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .lut_mask = 64'hFCFCFCFC0000FCFC;
-defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W5rvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W5rvx4 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|W5rvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y9_N7
-dffeas \soc_inst|m0_1|u_logic|F0y2z4 (
+// Location: LABCELL_X23_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Owq2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[4]~23_combout  & ((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Owq2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[4]~23_combout  & (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Owq2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Owq2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W5rvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .lut_mask = 64'hF030FF33A020AA22;
+defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y17_N19
+dffeas \soc_inst|m0_1|u_logic|Owq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yanvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -97605,45 +98376,45 @@ dffeas \soc_inst|m0_1|u_logic|F0y2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Owq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F0y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F0y2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Owq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Owq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wamvx4~0 (
+// Location: MLABCELL_X25_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pamvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wamvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|F0y2z4~q )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|F0y2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Tdp2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (((\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|F0y2z4~q )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|F0y2z4~q ) # ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Pamvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~q  & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Trq2z4~q  & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Trq2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Trq2z4~q  & ( !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout 
+// )))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .lut_mask = 64'hF444F4FF444444FF;
-defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .lut_mask = 64'h88F8DDFD00F055F5;
+defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y14_N38
-dffeas \soc_inst|m0_1|u_logic|Tdp2z4 (
+// Location: FF_X25_Y20_N31
+dffeas \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -97652,25 +98423,24 @@ dffeas \soc_inst|m0_1|u_logic|Tdp2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tdp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tdp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N48
+// Location: LABCELL_X29_Y19_N15
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ye4wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ye4wx4~combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~q  & (!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Ye4wx4~combout  = ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( (!\soc_inst|m0_1|u_logic|G0w2z4~q  & (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tdp2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -97684,8 +98454,8 @@ defparam \soc_inst|m0_1|u_logic|Ye4wx4 .lut_mask = 64'h8000800000000000;
 defparam \soc_inst|m0_1|u_logic|Ye4wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y6_N17
-dffeas \soc_inst|m0_1|u_logic|S4w2z4 (
+// Location: FF_X36_Y14_N26
+dffeas \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
 	.asdata(\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
@@ -97696,25 +98466,25 @@ dffeas \soc_inst|m0_1|u_logic|S4w2z4 (
 	.ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S4w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S4w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N27
+// Location: LABCELL_X35_Y14_N48
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zdc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~q  & (((\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|X77wx4~combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~q  & \soc_inst|m0_1|u_logic|Wpsvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Zdc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & ( \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X77wx4~combout  & 
+// (\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
 	.datac(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -97724,71 +98494,22 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdc2z4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .lut_mask = 64'h0033003310331033;
+defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .lut_mask = 64'h0010001033333333;
 defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skc2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Skc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Skc2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekc2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ekc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) 
-// ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|U2x2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Qdj2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ekc2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .lut_mask = 64'h0000048C0000CC44;
-defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y6_N54
+// Location: LABCELL_X35_Y14_N27
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Mhc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~q 
+// ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -97798,252 +98519,120 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .lut_mask = 64'h0000000000020002;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .lut_mask = 64'h0000000000100010;
 defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mhc2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|S4w2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|S4w2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~q  & (!\soc_inst|m0_1|u_logic|W7hwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Skc2z4~0_combout 
-// ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Skc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ekc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .lut_mask = 64'h0040505055555555;
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  
-// & \soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X35_Y13_N5
+dffeas \soc_inst|m0_1|u_logic|Hyy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .lut_mask = 64'h0000000100000000;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hyy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hyy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~0 (
+// Location: LABCELL_X35_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Ekc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q  $ (!\soc_inst|m0_1|u_logic|H9i2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qdj2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H9i2z4~q  $ (((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
 	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .lut_mask = 64'h0000000020002000;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Dcrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Dcrwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dcrwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Xx2wx4~combout  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .lut_mask = 64'h0022AAAAAAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~4_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ekc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .lut_mask = 64'h0000880000008880;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .lut_mask = 64'h00000000408C4C8C;
+defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~3 (
+// Location: LABCELL_X35_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~3_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Skc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mac2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mac2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & 
-// \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mac2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .lut_mask = 64'h0000002000000000;
-defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kgc2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kgc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Skc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .lut_mask = 64'hF030000055110000;
-defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~5 (
+// Location: LABCELL_X36_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kgc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mac2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout  & !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kgc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mac2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # ((!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout  & !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kgc2z4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Mac2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # ((!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout  & !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mhc2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Skc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Skc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ark2z4~q  & 
+// !\soc_inst|m0_1|u_logic|W7hwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Skc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Skc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Mhc2z4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dcrwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mac2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ekc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Skc2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .lut_mask = 64'hF0800000F080F080;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .shared_arith = "off";
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .lut_mask = 64'h0055445540554455;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y6_N18
+// Location: LABCELL_X36_Y14_N6
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Dcrwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Zdc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # 
-// ((\soc_inst|m0_1|u_logic|Mhc2z4~4_combout  & !\soc_inst|m0_1|u_logic|Mhc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Zdc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Dcrwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Dcrwx4~5_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zdc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Dcrwx4~2_combout  & (\soc_inst|m0_1|u_logic|Dcrwx4~5_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Mhc2z4~4_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mhc2z4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zdc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mhc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dcrwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dcrwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mhc2z4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dcrwx4~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zdc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -98053,11 +98642,11 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~6 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .lut_mask = 64'h00000000D0C00000;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .lut_mask = 64'h008A000000880000;
 defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N36
+// Location: MLABCELL_X21_Y14_N54
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qaiwx4~0 (
 // Equation(s):
 // \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) )
@@ -98081,110 +98670,85 @@ defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .lut_mask = 64'hF0F0F0F0FFFFFFFF;
 defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H4nwx4 (
+// Location: LABCELL_X19_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xdfwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H4nwx4~combout  = ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Xdfwx4~combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H4nwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H4nwx4 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|H4nwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J0l2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~2  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~2 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~5_sumout ),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~5 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xdfwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xdfwx4 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Xdfwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wthvx4~0 (
+// Location: LABCELL_X19_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wthvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~5_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|J0l2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Imhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J4x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~25_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J4x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add2~25_sumout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~5_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add2~25_sumout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wthvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Imhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .lut_mask = 64'hCF8BCF8B00000000;
-defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .lut_mask = 64'h88808880AAA2AAA2;
+defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wthvx4~1 (
+// Location: MLABCELL_X21_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wthvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( \soc_inst|m0_1|u_logic|R5zvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & \soc_inst|m0_1|u_logic|Wthvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( \soc_inst|m0_1|u_logic|R5zvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Wthvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( !\soc_inst|m0_1|u_logic|R5zvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Wthvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( !\soc_inst|m0_1|u_logic|R5zvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Wthvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Imhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Imhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~101_sumout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (\soc_inst|m0_1|u_logic|Imhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~101_sumout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wthvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Imhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wthvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .lut_mask = 64'h00F000C000FF00CC;
-defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .lut_mask = 64'h0C080C080F0A0F0A;
+defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y14_N52
-dffeas \soc_inst|m0_1|u_logic|J0l2z4 (
+// Location: FF_X21_Y14_N1
+dffeas \soc_inst|m0_1|u_logic|J4x2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wthvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -98193,93 +98757,94 @@ dffeas \soc_inst|m0_1|u_logic|J0l2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J4x2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J0l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J0l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J4x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J4x2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~5 (
+// Location: LABCELL_X29_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uzvvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~10  ))
-// \soc_inst|m0_1|u_logic|Add3~6  = CARRY(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~10  ))
+// \soc_inst|m0_1|u_logic|Uzvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|J4x2z4~q  $ (((!\soc_inst|m0_1|u_logic|Tyx2z4~q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|J4x2z4~q  $ (((\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tyx2z4~q  $ (!\soc_inst|m0_1|u_logic|Fcj2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~10 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~5_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~6 ),
+	.combout(\soc_inst|m0_1|u_logic|Uzvvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~5 .lut_mask = 64'h0000FFFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add3~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .lut_mask = 64'hAA96AA96AA66AA66;
+defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~1 (
+// Location: LABCELL_X29_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fvovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J0l2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~6  ))
+// \soc_inst|m0_1|u_logic|Fvovx4~combout  = ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Uzvvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Uzvvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Uzvvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Uzvvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uzvvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~6 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+	.combout(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~1 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fvovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fvovx4 .lut_mask = 64'h3737050537FF05FF;
+defparam \soc_inst|m0_1|u_logic|Fvovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X21_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbi3z4~1 (
+// Location: LABCELL_X29_Y17_N51
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rbi3z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Va62z4~combout  & ( (!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & (\soc_inst|m0_1|u_logic|Rbi3z4~q )) # (\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & ((\soc_inst|m0_1|u_logic|H362z4~0_combout ))) # (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & (!\soc_inst|m0_1|u_logic|haddr_o~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Va62z4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & (\soc_inst|m0_1|u_logic|Rbi3z4~q )) # (\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & (((\soc_inst|m0_1|u_logic|H362z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add3~1_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout )))))) ) )
+// \soc_inst|switches_1|half_word_address~2_combout  = ( \soc_inst|switches_1|half_word_address~1_combout  & ( \soc_inst|m0_1|u_logic|Fvovx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rbi3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|H362z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Va62z4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|switches_1|half_word_address~1_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rbi3z4~1_combout ),
+	.combout(\soc_inst|switches_1|half_word_address~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .lut_mask = 64'h4477447774744474;
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .shared_arith = "off";
+defparam \soc_inst|switches_1|half_word_address~2 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~2 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|switches_1|half_word_address~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X21_Y5_N56
-dffeas \soc_inst|m0_1|u_logic|Rbi3z4 (
+// Location: FF_X29_Y17_N52
+dffeas \soc_inst|switches_1|half_word_address[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rbi3z4~1_combout ),
+	.d(\soc_inst|switches_1|half_word_address~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -98288,182 +98853,165 @@ dffeas \soc_inst|m0_1|u_logic|Rbi3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rbi3z4~q ),
+	.q(\soc_inst|switches_1|half_word_address [1]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbi3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rbi3z4 .power_up = "low";
+defparam \soc_inst|switches_1|half_word_address[1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|half_word_address[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X21_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ueovx4~0 (
+// Location: LABCELL_X29_Y18_N21
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~19 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ueovx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|Rbi3z4~q  ) )
+// \soc_inst|interconnect_1|HRDATA[1]~19_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( (\soc_inst|switches_1|half_word_address [1] & !\soc_inst|interconnect_1|HRDATA[1]~37_combout ) ) ) # ( !\soc_inst|interconnect_1|Equal1~0_combout  & ( 
+// !\soc_inst|interconnect_1|HRDATA[1]~37_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rbi3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y9_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qbpvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & !\soc_inst|m0_1|u_logic|Fcj2z4~q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.datac(!\soc_inst|switches_1|half_word_address [1]),
+	.datad(!\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .lut_mask = 64'h000000000A000A00;
-defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~19 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~19 .lut_mask = 64'hFF00FF000F000F00;
+defparam \soc_inst|interconnect_1|HRDATA[1]~19 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tohvx4~0 (
+// Location: LABCELL_X30_Y19_N0
+cyclonev_lcell_comb \soc_inst|switches_1|DataValid~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tohvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[23]~8_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[23]~8_combout  )
+// \soc_inst|switches_1|DataValid~0_combout  = ( \soc_inst|switches_1|DataValid [1] & ( \KEY[1]~input_o  & ( (!\soc_inst|switches_1|half_word_address[0]~DUPLICATE_q ) # ((!\soc_inst|switches_1|read_enable~q ) # (\soc_inst|switches_1|half_word_address [1])) ) 
+// ) ) # ( \soc_inst|switches_1|DataValid [1] & ( !\KEY[1]~input_o  & ( (!\soc_inst|switches_1|half_word_address[0]~DUPLICATE_q ) # (((!\soc_inst|switches_1|last_buttons [1]) # (!\soc_inst|switches_1|read_enable~q )) # (\soc_inst|switches_1|half_word_address 
+// [1])) ) ) ) # ( !\soc_inst|switches_1|DataValid [1] & ( !\KEY[1]~input_o  & ( !\soc_inst|switches_1|last_buttons [1] ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+	.dataa(!\soc_inst|switches_1|half_word_address[0]~DUPLICATE_q ),
+	.datab(!\soc_inst|switches_1|half_word_address [1]),
+	.datac(!\soc_inst|switches_1|last_buttons [1]),
+	.datad(!\soc_inst|switches_1|read_enable~q ),
+	.datae(!\soc_inst|switches_1|DataValid [1]),
+	.dataf(!\KEY[1]~input_o ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tohvx4~0_combout ),
+	.combout(\soc_inst|switches_1|DataValid~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .lut_mask = 64'hFFFFFFFFFF00FF00;
-defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|DataValid~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|DataValid~0 .lut_mask = 64'hF0F0FFFB0000FFBB;
+defparam \soc_inst|switches_1|DataValid~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y9_N56
-dffeas \soc_inst|m0_1|u_logic|Sow2z4 (
+// Location: FF_X30_Y19_N1
+dffeas \soc_inst|switches_1|DataValid[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tohvx4~0_combout ),
+	.d(\soc_inst|switches_1|DataValid~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sow2z4~q ),
+	.q(\soc_inst|switches_1|DataValid [1]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sow2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sow2z4 .power_up = "low";
+defparam \soc_inst|switches_1|DataValid[1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|DataValid[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|C6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sow2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Sow2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sow2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6nvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X29_Y18_N50
+dffeas \soc_inst|switches_1|switch_store[0][1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[1]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][1]~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .lut_mask = 64'h22222222FF22FF22;
-defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .shared_arith = "off";
+defparam \soc_inst|switches_1|switch_store[0][1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][1] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~0 (
+// Location: LABCELL_X29_Y18_N48
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) # (\soc_inst|interconnect_1|HRDATA[7]~11_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & !\soc_inst|m0_1|u_logic|Nqy2z4~q ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+// \soc_inst|interconnect_1|HRDATA[1]~21_combout  = ( \soc_inst|switches_1|switch_store[0][1]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & 
+// ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (\soc_inst|switches_1|DataValid [1]))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][1]~q  & ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (((!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (((\soc_inst|interconnect_1|HRDATA[1]~20_combout )) # (\soc_inst|switches_1|DataValid [1]))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][1]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout )))) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (\soc_inst|switches_1|DataValid [1] & (!\soc_inst|interconnect_1|HRDATA[1]~20_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][1]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (\soc_inst|switches_1|DataValid [1])))) ) ) )
+
+	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
+	.datab(!\soc_inst|switches_1|DataValid [1]),
+	.datac(!\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datae(!\soc_inst|switches_1|switch_store[0][1]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6nvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .lut_mask = 64'hA0A0A0A0A0FFA0FF;
-defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~21 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~21 .lut_mask = 64'hB010BA1AB515BF1F;
+defparam \soc_inst|interconnect_1|HRDATA[1]~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~2 (
+// Location: LABCELL_X29_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hcnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|C6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C6nvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[23]~8_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Hcnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dwl2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dwl2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Dwl2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dwl2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C6nvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C6nvx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hcnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .lut_mask = 64'h30203322F0A0FFAA;
+defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y6_N4
-dffeas \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE (
+// Location: FF_X29_Y19_N43
+dffeas \soc_inst|m0_1|u_logic|Dwl2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hcnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -98472,119 +99020,89 @@ dffeas \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Dwl2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5wvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z5wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wpkwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hklwx4~1_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .lut_mask = 64'h000000000AFF0AFF;
-defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dwl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dwl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3mvx4~0 (
+// Location: MLABCELL_X25_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Acnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Ilpvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ilpvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Acnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Dwl2z4~q  & (!\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Dwl2z4~q  
+// & (((\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .lut_mask = 64'hAEAEAEAEAE00AE00;
-defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .lut_mask = 64'h30103F15F050FF55;
+defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndwvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ndwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Dvy2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Dvy2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Dvy2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndwvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y20_N14
+dffeas \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .lut_mask = 64'h030F010533FF1155;
-defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3mvx4~1 (
+// Location: LABCELL_X37_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ndwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & (((\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & !\soc_inst|m0_1|u_logic|I3mvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|K1z2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ndwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & (!\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & \soc_inst|m0_1|u_logic|K1z2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Qnyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I3mvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ndwvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .lut_mask = 64'h0088008820AA20AA;
-defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .lut_mask = 64'h00EA00EA00FA00FA;
+defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y5_N46
-dffeas \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE (
+// Location: FF_X37_Y14_N29
+dffeas \soc_inst|m0_1|u_logic|U4z2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -98593,4093 +99111,4258 @@ dffeas \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|U4z2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y3_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ggswx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ggswx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U4z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U4z2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~0 (
+// Location: LABCELL_X37_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vllvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ggswx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Vllvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U4z2z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U4z2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U4z2z4~q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ggswx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vllvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .lut_mask = 64'h44445500CCCCDDCC;
-defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .lut_mask = 64'hFFFF000030303030;
+defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~2 (
+// Location: LABCELL_X37_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vllvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ggswx4~2_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout  & (!\soc_inst|m0_1|u_logic|Ggswx4~1_combout  & (!\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Ggswx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout  & (!\soc_inst|m0_1|u_logic|Ggswx4~1_combout  & !\soc_inst|m0_1|u_logic|Ggswx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Vllvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vllvx4~0_combout  & ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T50wx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vllvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T50wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ggswx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ggswx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Vllvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .lut_mask = 64'h4400440040004000;
-defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .lut_mask = 64'hFCFC000054540000;
+defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y9_N28
-dffeas \soc_inst|m0_1|u_logic|Yaz2z4 (
+// Location: FF_X37_Y14_N28
+dffeas \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yaz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yaz2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X51_Y9_N28
-dffeas \soc_inst|m0_1|u_logic|Q2q2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q2q2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q2q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q2q2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X51_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Q2q2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ycu2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ycu2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Q2q2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~4 .lut_mask = 64'h00000000A8080000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y10_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~3 (
+// Location: MLABCELL_X25_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|No93z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Mzp2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Htyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qi03z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|No93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mzp2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qi03z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~3 .lut_mask = 64'h0000110000001010;
-defparam \soc_inst|m0_1|u_logic|S71wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .lut_mask = 64'h8800C00000000000;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y10_N43
-dffeas \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE (
+// Location: FF_X25_Y14_N50
+dffeas \soc_inst|m0_1|u_logic|Cy33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cy33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cy33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R21xx4~0 (
+// Location: MLABCELL_X25_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R21xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Htyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wlz2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Cy33z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cy33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wlz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R21xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R21xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R21xx4~0 .lut_mask = 64'h0080000000000000;
-defparam \soc_inst|m0_1|u_logic|R21xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .lut_mask = 64'h000A00C000000000;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y9_N32
-dffeas \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE (
+// Location: FF_X27_Y10_N13
+dffeas \soc_inst|m0_1|u_logic|Kf13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Kf13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kf13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kf13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y9_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~1 (
+// Location: MLABCELL_X28_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|B1q2z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Htyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kf13z4~q  & (\soc_inst|m0_1|u_logic|To23z4~q  & ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|L753z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kf13z4~q  & ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|L753z4~q 
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|To23z4~q  & ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|L753z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|L753z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B1q2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L753z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kf13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|To23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~1 .lut_mask = 64'h0044000000500000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .lut_mask = 64'hFF550F0533110301;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y10_N16
-dffeas \soc_inst|m0_1|u_logic|D603z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Htyvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Htyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Htyvx4~1_combout  & !\soc_inst|m0_1|u_logic|V7ywx4~combout )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Htyvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Htyvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V7ywx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D603z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D603z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .lut_mask = 64'h00000000A000A000;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~2 (
+// Location: MLABCELL_X28_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[1] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|X213z4~q  & ( \soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|X213z4~q  & ( !\soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X213z4~q  & ( !\soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|hwdata_o [1] = ( \soc_inst|m0_1|u_logic|Y9t2z4~q  & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|X213z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o [1]),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~2 .lut_mask = 64'h2200020020000000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y9_N17
-dffeas \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE (
+// Location: FF_X30_Y17_N41
+dffeas \soc_inst|m0_1|u_logic|R0t2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [1]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|R0t2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R0t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R0t2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~0 (
+// Location: LABCELL_X30_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rexvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xg33z4~q  & ( \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xg33z4~q  & ( !\soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xg33z4~q  & ( !\soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Rexvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G7x2z4~q  & ( (\soc_inst|m0_1|u_logic|G9w2z4~q  & \soc_inst|m0_1|u_logic|R0t2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xg33z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|R0t2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~0 .lut_mask = 64'h1100010010000000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .lut_mask = 64'h0505050500000000;
+defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~5 (
+// Location: LABCELL_X29_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|S71wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S71wx4~4_combout  & (!\soc_inst|m0_1|u_logic|S71wx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|R21xx4~0_combout  & !\soc_inst|m0_1|u_logic|S71wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ppsvx4~combout  = ( \soc_inst|m0_1|u_logic|Jyb2z4~2_combout  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & !\soc_inst|m0_1|u_logic|I1c2z4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Jyb2z4~2_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|I1c2z4~combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jyb2z4~2_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|I1c2z4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S71wx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S71wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R21xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S71wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S71wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|I1c2z4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4 .lut_mask = 64'h3322332200003300;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4 (
+// Location: LABCELL_X29_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~combout  = ( \soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( \soc_inst|m0_1|u_logic|S71wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|S6ovx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|S6ovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|S71wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .lut_mask = 64'h00000000FAFA0000;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bq5wx4~0 (
+// Location: LABCELL_X29_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (\soc_inst|m0_1|u_logic|S71wx4~combout ) # (\soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wq5wx4~combout  & \soc_inst|m0_1|u_logic|S71wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|S6ovx4~1_combout  = ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & !\soc_inst|m0_1|u_logic|It52z4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & !\soc_inst|m0_1|u_logic|It52z4~2_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & !\soc_inst|m0_1|u_logic|It52z4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|S6ovx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S6ovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .lut_mask = 64'h3333010011000100;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y14_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Axm2z4~0 (
+// Location: LABCELL_X30_Y13_N18
+cyclonev_lcell_comb \soc_inst|ram_1|always1~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Axm2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
+// \soc_inst|ram_1|always1~0_combout  = ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( \soc_inst|interconnect_1|LessThan0~0_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (\soc_inst|m0_1|u_logic|E7mwx4~combout  & 
+// !\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( \soc_inst|interconnect_1|LessThan0~0_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|E7mwx4~combout ) # (\soc_inst|m0_1|u_logic|S6ovx4~1_combout )))) ) ) )
+
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+	.dataf(!\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|ram_1|always1~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|always1~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|always1~0 .lut_mask = 64'h0000000015000500;
+defparam \soc_inst|ram_1|always1~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N18
+cyclonev_lcell_comb \soc_inst|ram_1|read_cycle~0 (
+// Equation(s):
+// \soc_inst|ram_1|read_cycle~0_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( !\soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
+	.combout(\soc_inst|ram_1|read_cycle~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|read_cycle~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|read_cycle~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|ram_1|read_cycle~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y14_N35
-dffeas \soc_inst|m0_1|u_logic|Axm2z4 (
+// Location: FF_X29_Y15_N19
+dffeas \soc_inst|ram_1|read_cycle (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
+	.d(\soc_inst|ram_1|read_cycle~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Axm2z4~q ),
+	.q(\soc_inst|ram_1|read_cycle~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Axm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Axm2z4 .power_up = "low";
+defparam \soc_inst|ram_1|read_cycle .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|read_cycle .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y14_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~0 (
+// Location: LABCELL_X29_Y17_N6
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[11]~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~0_combout  = ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Axm2z4~q  & (!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lns2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Axm2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lns2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lns2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Lns2z4~q ) ) ) )
+// \soc_inst|interconnect_1|HRDATA[11]~3_combout  = ( \soc_inst|ram_1|byte_select [1] & ( (\soc_inst|ram_1|read_cycle~q  & (!\soc_inst|interconnect_1|mux_sel [1] & (!\soc_inst|interconnect_1|mux_sel [2] & \soc_inst|interconnect_1|mux_sel [0]))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+	.dataa(!\soc_inst|ram_1|read_cycle~q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(!\soc_inst|interconnect_1|mux_sel [2]),
+	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|byte_select [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~0 .lut_mask = 64'hFFCCF0C0AA88A080;
-defparam \soc_inst|m0_1|u_logic|Luywx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[11]~3 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[11]~3 .lut_mask = 64'h0000000000400040;
+defparam \soc_inst|interconnect_1|HRDATA[11]~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y14_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~4 (
+// Location: MLABCELL_X25_Y17_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[10]~12 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~4_combout  = ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|G8n2z4~q ) # (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|G8n2z4~q ) # (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|G8n2z4~q ) # (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|G8n2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) ) ) )
+// \soc_inst|interconnect_1|HRDATA[10]~12_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( \soc_inst|interconnect_1|HRDATA[11]~3_combout  ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout 
+//  & ( !\soc_inst|interconnect_1|HRDATA[11]~3_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~4_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~4 .lut_mask = 64'hFAFAFA00C8C8C800;
-defparam \soc_inst|m0_1|u_logic|Luywx4~4 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[10]~12 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[10]~12 .lut_mask = 64'hF0F00000FFFF0F0F;
+defparam \soc_inst|interconnect_1|HRDATA[10]~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y14_N50
-dffeas \soc_inst|m0_1|u_logic|Lhd3z4 (
+// Location: LABCELL_X31_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P9nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M9y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[10]~12_combout  & ((!\soc_inst|m0_1|u_logic|Add1~29_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[10]~12_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add1~29_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|M9y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~29_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~29_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
+
+	.dataa(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add1~29_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .lut_mask = 64'h00FCFCFC00A8A8A8;
+defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y19_N37
+dffeas \soc_inst|m0_1|u_logic|M9y2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M9y2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lhd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M9y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M9y2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y14_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~1 (
+// Location: LABCELL_X33_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q6l2z4~q  & (!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lhd3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q6l2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lhd3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lhd3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Lhd3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Add1~1_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qcy2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~14  ))
+// \soc_inst|m0_1|u_logic|Add1~2  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qcy2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~14  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~1_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~2 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~1 .lut_mask = 64'hFFAAF0A0CC88C080;
-defparam \soc_inst|m0_1|u_logic|Luywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~1 .lut_mask = 64'h0000000000003300;
+defparam \soc_inst|m0_1|u_logic|Add1~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~3 (
+// Location: LABCELL_X33_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kss2z4~q  & (!\soc_inst|m0_1|u_logic|Jxs2z4~q  & ((!\soc_inst|m0_1|u_logic|Mis2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jxs2z4~q  & ((!\soc_inst|m0_1|u_logic|Mis2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kss2z4~q  & ((!\soc_inst|m0_1|u_logic|Mis2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mis2z4~q ) # (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add1~17_sumout  = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bdm2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~2  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kss2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~2 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~3_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~17_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~3 .lut_mask = 64'hFFF0AAA0CCC08880;
-defparam \soc_inst|m0_1|u_logic|Luywx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~17 .lut_mask = 64'h0000CCFF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Add1~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~5 (
+// Location: LABCELL_X31_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U8nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~5_combout  = ( \soc_inst|m0_1|u_logic|Aqp2z4~q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Uaj2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|X9n2z4~q  & \soc_inst|m0_1|u_logic|Uaj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aqp2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Uaj2z4~q )))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & 
-// (((\soc_inst|m0_1|u_logic|X9n2z4~q  & \soc_inst|m0_1|u_logic|Uaj2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|U8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bdm2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[13]~27_combout  & ((!\soc_inst|m0_1|u_logic|Add1~17_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdm2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[13]~27_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add1~17_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bdm2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~17_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdm2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~17_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add1~17_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~5 .lut_mask = 64'h00000000440344CF;
-defparam \soc_inst|m0_1|u_logic|Luywx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .lut_mask = 64'h00FCFCFC00A8A8A8;
+defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y13_N16
-dffeas \soc_inst|m0_1|u_logic|Fed3z4 (
+// Location: FF_X31_Y19_N7
+dffeas \soc_inst|m0_1|u_logic|Bdm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.d(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fed3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bdm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fed3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fed3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bdm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bdm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~2 (
+// Location: LABCELL_X33_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oylwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bus2z4~q  & (!\soc_inst|m0_1|u_logic|Fed3z4~q  & ((!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Gcb3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fed3z4~q  & ((!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Gcb3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bus2z4~q  & ((!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Gcb3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gcb3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Oylwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bdm2z4~q  & ( (\soc_inst|m0_1|u_logic|I3y2z4~q  & (\soc_inst|m0_1|u_logic|K6y2z4~q  & \soc_inst|m0_1|u_logic|W4y2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oylwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~2 .lut_mask = 64'hFCFCA8A8FC00A800;
-defparam \soc_inst|m0_1|u_logic|Luywx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~6 (
+// Location: LABCELL_X33_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oylwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Luywx4~5_combout  & ( \soc_inst|m0_1|u_logic|Luywx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Luywx4~0_combout  & (\soc_inst|m0_1|u_logic|Luywx4~4_combout  & 
-// (\soc_inst|m0_1|u_logic|Luywx4~1_combout  & \soc_inst|m0_1|u_logic|Luywx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Oylwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Oylwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M9y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Y7y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Bby2z4~q ) # (!\soc_inst|m0_1|u_logic|Qcy2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Oylwx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Luywx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Luywx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Luywx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Luywx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Luywx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Luywx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Oylwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~6 .lut_mask = 64'h0000000000010000;
-defparam \soc_inst|m0_1|u_logic|Luywx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .lut_mask = 64'hFFFFFFFFFFFEFFFE;
+defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~0 (
+// Location: LABCELL_X33_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|By4wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tyywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vsywx4~7_combout  & ( 
-// \soc_inst|m0_1|u_logic|Tyywx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|By4wx4~combout  = ( \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Oylwx4~1_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|By4wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .lut_mask = 64'h0F0F0F0F0FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|By4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|By4wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|By4wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|C6mwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Luywx4~6_combout  & (((\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & \soc_inst|m0_1|u_logic|Vsywx4~7_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Luywx4~6_combout  & (((\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & \soc_inst|m0_1|u_logic|Vsywx4~7_combout )) # (\soc_inst|m0_1|u_logic|N8b2z4~combout )))) # (\soc_inst|m0_1|u_logic|Gvywx4~0_combout ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Luywx4~6_combout  & (\soc_inst|m0_1|u_logic|N8b2z4~combout ))) # (\soc_inst|m0_1|u_logic|C6mwx4~0_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N8b2z4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C6mwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y19_N1
+dffeas \soc_inst|m0_1|u_logic|Y6t2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|By4wx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .lut_mask = 64'h111F1F1FFFFF1F1F;
-defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y6t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6t2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y10_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Abovx4~0 (
+// Location: LABCELL_X31_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aekwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Abovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C6mwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|C6mwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & (((\soc_inst|m0_1|u_logic|C6mwx4~3_combout  & \soc_inst|m0_1|u_logic|C6mwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C6mwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C6mwx4~2_combout  & ( 
-// \soc_inst|m0_1|u_logic|Rqywx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Aekwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Y6t2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Abovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Abovx4~0 .lut_mask = 64'h00FF00FF003700FF;
-defparam \soc_inst|m0_1|u_logic|Abovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .lut_mask = 64'h00000000A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zlnvx4~0 (
+// Location: LABCELL_X31_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C4d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zlnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nbm2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Nbm2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nbm2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|C4d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|X77wx4~combout  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C4d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .lut_mask = 64'hFFFFFFFF0000FCFC;
-defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y9_N22
-dffeas \soc_inst|m0_1|u_logic|Nbm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nbm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nbm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|By4wx4 (
+// Location: MLABCELL_X34_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|By4wx4~combout  = ( \soc_inst|m0_1|u_logic|Oylwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nbm2z4~q  ) )
+// \soc_inst|m0_1|u_logic|O3d2z4~0_combout  = (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffj2z4~q )))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|By4wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|By4wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|By4wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|By4wx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y8_N44
-dffeas \soc_inst|m0_1|u_logic|Y6t2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|By4wx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y6t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y6t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .lut_mask = 64'h0800080008000800;
+defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0mwx4~0 (
+// Location: LABCELL_X31_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z0mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|B73wx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Mrsvx4~1_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O76wx4~combout  & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O76wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O76wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O76wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|O3d2z4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O3d2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .lut_mask = 64'h000A000A333B000A;
-defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .lut_mask = 64'hAAAAAA220AAA0A22;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~2 (
+// Location: LABCELL_X31_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~2_combout  = ( !\soc_inst|m0_1|u_logic|Z0mwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A76wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|G6d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G6d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~2 .lut_mask = 64'hFD00FD0000000000;
-defparam \soc_inst|m0_1|u_logic|hprot_o~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .lut_mask = 64'h0000000000AA00AA;
+defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~3 (
+// Location: LABCELL_X31_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~3_combout  = ( \soc_inst|m0_1|u_logic|hprot_o~2_combout  & ( (!\soc_inst|m0_1|u_logic|Sy52z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Mrsvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|G6d2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~2_combout  & (!\soc_inst|m0_1|u_logic|C4d2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Emi2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sy52z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C4d2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G6d2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~3 .lut_mask = 64'h00000000A8AAA8AA;
-defparam \soc_inst|m0_1|u_logic|hprot_o~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .lut_mask = 64'h0000504000000000;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~1 (
+// Location: LABCELL_X35_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~1_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~0_combout  & !\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Mrsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jbhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jbhwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~1 .lut_mask = 64'h0F000F000F0C0F0C;
-defparam \soc_inst|m0_1|u_logic|hprot_o~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .lut_mask = 64'hFF00FF00F000F000;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jbhwx4~0 (
+// Location: LABCELL_X31_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jbhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|C9yvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~3_combout  & (\soc_inst|m0_1|u_logic|hprot_o~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~3_combout  & \soc_inst|m0_1|u_logic|hprot_o~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .lut_mask = 64'h00F000F000000000;
-defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .lut_mask = 64'h0000000000220032;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qx52z4~0 (
+// Location: LABCELL_X36_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qx52z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & !\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Gzvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qx52z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .lut_mask = 64'h0000550000000000;
-defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .lut_mask = 64'h405540E062406240;
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~4 (
+// Location: LABCELL_X29_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~4_combout  = ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qx52z4~0_combout  & (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & \soc_inst|m0_1|u_logic|Y6t2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Na6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qx52z4~0_combout  & !\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Gzvvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Jp3wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jp3wx4~combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qx52z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~4 .lut_mask = 64'hC0C0C0C000C000C0;
-defparam \soc_inst|m0_1|u_logic|hprot_o~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .lut_mask = 64'h000000FFCCCCCCFF;
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~5 (
+// Location: LABCELL_X30_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~5_combout  = ( \soc_inst|m0_1|u_logic|hprot_o~4_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~3_combout  & (\soc_inst|m0_1|u_logic|hprot_o~1_combout  & ((!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|O9qvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// (((\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hprot_o~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|hprot_o~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~5 .lut_mask = 64'h0000000011101110;
-defparam \soc_inst|m0_1|u_logic|hprot_o~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .lut_mask = 64'h40F040F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7mwx4 (
+// Location: LABCELL_X29_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O092z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E7mwx4~combout  = ( \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~5_combout  & (\soc_inst|m0_1|u_logic|It52z4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Z5pvx4~3_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~5_combout  & (\soc_inst|m0_1|u_logic|It52z4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|S4w2z4~q  & \soc_inst|m0_1|u_logic|Z5pvx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|O092z4~0_combout  = ( \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fcj2z4~q  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Fcj2z4~q  $ (\soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|It52z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|O092z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E7mwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E7mwx4 .lut_mask = 64'h0000000000100011;
-defparam \soc_inst|m0_1|u_logic|E7mwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O092z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O092z4~0 .lut_mask = 64'h00C300C300CC00CC;
+defparam \soc_inst|m0_1|u_logic|O092z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N18
-cyclonev_lcell_comb \soc_inst|ram_1|always1~0 (
+// Location: LABCELL_X30_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T50wx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|always1~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|interconnect_1|LessThan0~0_combout  & ( (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & (((\soc_inst|m0_1|u_logic|S6ovx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|S6ovx4~2_combout )) # (\soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|T50wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~93_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Punvx4~4_combout )) # (\soc_inst|m0_1|u_logic|O092z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~93_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Punvx4~4_combout )) # (\soc_inst|m0_1|u_logic|O092z4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
-	.datae(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.dataf(!\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O092z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|always1~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|always1~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|always1~0 .lut_mask = 64'h0000000000007050;
-defparam \soc_inst|ram_1|always1~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T50wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T50wx4~0 .lut_mask = 64'h03FF03FF57FF57FF;
+defparam \soc_inst|m0_1|u_logic|T50wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y5_N15
-cyclonev_lcell_comb \soc_inst|ram_1|write_cycle~0 (
+// Location: LABCELL_X29_Y16_N48
+cyclonev_lcell_comb \soc_inst|ram_1|byte3~0 (
 // Equation(s):
-// \soc_inst|ram_1|write_cycle~0_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) )
+// \soc_inst|ram_1|byte3~0_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( ((\soc_inst|m0_1|u_logic|T50wx4~0_combout  & \soc_inst|m0_1|u_logic|N5qvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( ((\soc_inst|m0_1|u_logic|T50wx4~0_combout  & !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|write_cycle~0_combout ),
+	.combout(\soc_inst|ram_1|byte3~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|write_cycle~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|write_cycle~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|ram_1|write_cycle~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|byte3~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte3~0 .lut_mask = 64'hCFCF4F4FCFCF0F5F;
+defparam \soc_inst|ram_1|byte3~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N16
-dffeas \soc_inst|ram_1|write_cycle~DUPLICATE (
+// Location: FF_X29_Y16_N49
+dffeas \soc_inst|ram_1|byte_select[3]~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|write_cycle~0_combout ),
+	.d(\soc_inst|ram_1|byte3~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.q(\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|write_cycle~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|write_cycle~DUPLICATE .power_up = "low";
+defparam \soc_inst|ram_1|byte_select[3]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[3]~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rnhvx4~0 (
+// Location: LABCELL_X29_Y17_N36
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[29]~0 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[29]~0_combout  = ( !\soc_inst|interconnect_1|mux_sel [2] & ( (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & (!\soc_inst|interconnect_1|mux_sel [1] & (\soc_inst|ram_1|read_cycle~q  & \soc_inst|interconnect_1|mux_sel [0]))) ) 
+// )
+
+	.dataa(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(!\soc_inst|ram_1|read_cycle~q ),
+	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[29]~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[29]~0 .lut_mask = 64'h0004000400000000;
+defparam \soc_inst|interconnect_1|HRDATA[29]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y17_N3
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[31]~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rnhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|interconnect_1|HRDATA[29]~0_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & 
-// ( \soc_inst|interconnect_1|HRDATA[29]~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[29]~0_combout  & ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & 
-// ( !\soc_inst|interconnect_1|HRDATA[29]~0_combout  ) )
+// \soc_inst|interconnect_1|HRDATA[31]~2_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( (!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
-	.datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rnhvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .lut_mask = 64'hFFFF3333FFFFFF00;
-defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[31]~2 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[31]~2 .lut_mask = 64'hF000F000FF0FFF0F;
+defparam \soc_inst|interconnect_1|HRDATA[31]~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y7_N19
-dffeas \soc_inst|m0_1|u_logic|Xuw2z4 (
+// Location: FF_X30_Y20_N5
+dffeas \soc_inst|m0_1|u_logic|Nbm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rnhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xuw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nbm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xuw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xuw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nbm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nbm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oesvx4~0 (
+// Location: LABCELL_X30_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G8nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oesvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout ))) 
-// ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & !\soc_inst|interconnect_1|HRDATA[29]~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|G8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((!\soc_inst|interconnect_1|HRDATA[15]~4_combout ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oesvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G8nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .lut_mask = 64'h3000300030333033;
-defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .lut_mask = 64'h00000000AAA0AAA0;
+defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5nvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|A5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Oesvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[11]~24_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Oesvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[11]~24_combout )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oesvx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A5nvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y20_N41
+dffeas \soc_inst|m0_1|u_logic|Ufy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|G8nvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ufy2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .lut_mask = 64'h30203020F0A0F0A0;
-defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ufy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ufy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5nvx4~1 (
+// Location: LABCELL_X30_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|A5nvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xuw2z4~q  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Bby2z4~q ))) ) 
-// ) ) # ( \soc_inst|m0_1|u_logic|A5nvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Bby2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Pmhvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[31]~2_combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xuw2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|A5nvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pmhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .lut_mask = 64'h0000F0FF00005055;
-defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .lut_mask = 64'hFCFCFCFCFCFCFCFC;
+defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y9_N22
-dffeas \soc_inst|m0_1|u_logic|Swy2z4 (
+// Location: FF_X30_Y20_N56
+dffeas \soc_inst|m0_1|u_logic|F1x2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pmhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F1x2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Swy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Swy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F1x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F1x2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahhwx4~0 (
+// Location: LABCELL_X30_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ahhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Hjnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|F1x2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ufy2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
+//  & ( (!\soc_inst|m0_1|u_logic|Ufy2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ufy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|F1x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0hwx4~0 (
+// Location: LABCELL_X30_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I0hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Hjnvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[15]~4_combout  & ( ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[15]~4_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .lut_mask = 64'hAA00AA00AF0FAF0F;
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~2 (
+// Location: LABCELL_X35_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Hjnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hjnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hjnvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[31]~2_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hjnvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hjnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .lut_mask = 64'h000000FF050505FF;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .lut_mask = 64'hFC00FC0000000000;
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y3_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~3 (
+// Location: FF_X35_Y13_N38
+dffeas \soc_inst|m0_1|u_logic|U2x2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U2x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U2x2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Bfgwx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~2_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~2_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Howvx4~0_combout )) 
+// # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & (((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Howvx4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .lut_mask = 64'hFF00FF00FF00EE00;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .lut_mask = 64'h00000C3C55055D3D;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ugewx4~0 (
+// Location: LABCELL_X35_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ugewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q  & !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  & (((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .lut_mask = 64'hA0A0000000000000;
-defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .lut_mask = 64'hFB00FB003B003B00;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~18 (
+// Location: MLABCELL_X39_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~18_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~q  
-// & (((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # 
-// ((((\soc_inst|m0_1|u_logic|Px5wx4~combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zoy2z4~q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~18_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .lut_mask = 64'hBBFCBFFFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .lut_mask = 64'h00300030003A003A;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~3 (
+// Location: LABCELL_X33_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q2jwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0hwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|C2yvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Q2jwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( ((((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( ((((\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0hwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q2jwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .lut_mask = 64'h0030003000000000;
-defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .lut_mask = 64'hFF5F7F7FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~10 (
+// Location: MLABCELL_X39_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iyiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~10_combout  = ( \soc_inst|m0_1|u_logic|P0hwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|My6wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Iyiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P0hwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iyiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .lut_mask = 64'h0000000040EA40EA;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .lut_mask = 64'h0A000A000A0F0A0F;
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~5 (
+// Location: LABCELL_X40_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iyiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~5_combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Emi2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Iyiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Iyiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Iyiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout )) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iyiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .lut_mask = 64'h5F0A550000000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .lut_mask = 64'hD050D050C000C000;
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~6 (
+// Location: LABCELL_X42_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|Fij2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Emi2z4~q )))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (((!\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  $ 
-// (\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Iyiwx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Emewx4~0_combout  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Iyiwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Iyiwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Emewx4~0_combout  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .lut_mask = 64'h508F5F8800000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .lut_mask = 64'h0000030355555757;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~7 (
+// Location: LABCELL_X37_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eajwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~6_combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Pmgwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bfgwx4~6_combout  & ( !\soc_inst|m0_1|u_logic|B73wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Eajwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eajwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .lut_mask = 64'hFFFF0000D5D50000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .lut_mask = 64'h000003030000CFCF;
+defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~8 (
+// Location: LABCELL_X35_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9jwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~8_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~5_combout  & (((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Q9jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eajwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Eajwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bxcwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~5_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eajwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q9jwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .lut_mask = 64'h00000000AAA2AAA2;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .lut_mask = 64'h0050005055555555;
+defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~9 (
+// Location: LABCELL_X35_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~9_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Lwiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q9jwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lwiwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Lwiwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Q2jwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lwiwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Q2jwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lwiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q9jwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .lut_mask = 64'h00000000FFEFFFEF;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .lut_mask = 64'h0044000000000000;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~11 (
+// Location: LABCELL_X40_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6jwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~11_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~10_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|R6jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bfgwx4~10_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~11_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6jwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .lut_mask = 64'h00000000F0E0F0E0;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .lut_mask = 64'h0704070403000300;
+defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thgwx4~0 (
+// Location: MLABCELL_X39_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Thgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & (\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Q6fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Thgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .lut_mask = 64'h0000000000010001;
-defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .lut_mask = 64'hFDFDFDFD00000000;
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hahwx4~0 (
+// Location: MLABCELL_X39_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6fwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hahwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (((\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Emi2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|B73wx4~combout  & (\soc_inst|m0_1|u_logic|Emi2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q6fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|O9qvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Q6fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hahwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .lut_mask = 64'h0500050037003700;
-defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .lut_mask = 64'h0000333200000000;
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhgwx4~1 (
+// Location: MLABCELL_X34_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhgwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Ukpvx4~combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~5_combout  = ( \soc_inst|m0_1|u_logic|R6jwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|T7jwx4~combout  & \soc_inst|m0_1|u_logic|Lwiwx4~4_combout 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|R6jwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T7jwx4~combout  & \soc_inst|m0_1|u_logic|Lwiwx4~4_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T7jwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lwiwx4~4_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|R6jwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .lut_mask = 64'h000000000C000C00;
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .lut_mask = 64'h000000000C0C0404;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~1 (
+// Location: LABCELL_X40_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ubjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mhgwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Thgwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Hahwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|S4w2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ubjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Thgwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hahwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .lut_mask = 64'hA8AAA8AA00000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .lut_mask = 64'h000030000000BA00;
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~2 (
+// Location: LABCELL_X40_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ubjwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0hwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Zoy2z4~q  & (!\soc_inst|m0_1|u_logic|Xly2z4~q  & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Ubjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ubjwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ubjwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ubjwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0hwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ubjwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .lut_mask = 64'h0040004000000000;
-defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .lut_mask = 64'h0000FF005500FF00;
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bhewx4~0 (
+// Location: LABCELL_X36_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3jwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bhewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hyewx4~combout  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Blwvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|S3jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q 
+// )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S3jwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .lut_mask = 64'h0000000000500050;
-defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .lut_mask = 64'h0000040C0000040C;
+defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~4 (
+// Location: MLABCELL_X34_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2jwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|P0hwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|X2jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Msyvx4~combout  & \soc_inst|m0_1|u_logic|Ptgwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|S3jwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Msyvx4~combout  & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & \soc_inst|m0_1|u_logic|Ptgwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P0hwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S3jwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X2jwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .lut_mask = 64'h000C000C555D555D;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .lut_mask = 64'h0202020202330233;
+defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~12 (
+// Location: LABCELL_X40_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hvhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~12_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~3_combout  & (\soc_inst|m0_1|u_logic|Bfgwx4~18_combout  & 
-// \soc_inst|m0_1|u_logic|Bfgwx4~11_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bfgwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bfgwx4~18_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~11_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bfgwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~4_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~12_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .lut_mask = 64'h0000000300000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kugwx4~0 (
+// Location: LABCELL_X40_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kugwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A76wx4~0_combout  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A76wx4~0_combout  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ((\soc_inst|m0_1|u_logic|C9yvx4~combout ) # (\soc_inst|m0_1|u_logic|A76wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A76wx4~0_combout  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Lhjwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kugwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .lut_mask = 64'h0033003F00330033;
-defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .lut_mask = 64'h0050005000000000;
+defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~13 (
+// Location: MLABCELL_X39_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~13_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & !\soc_inst|m0_1|u_logic|Rngwx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & !\soc_inst|m0_1|u_logic|Rngwx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & !\soc_inst|m0_1|u_logic|Rngwx4~combout )) # (\soc_inst|m0_1|u_logic|P0hwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ehjwx4~0_combout  = (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bsy2z4~q )))) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bsy2z4~q ))))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~13_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ehjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .lut_mask = 64'h111100001F110F00;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .lut_mask = 64'h41E041E041E041E0;
+defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekgwx4~0 (
+// Location: LABCELL_X40_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ofjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ekgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) 
-// ) )
+// \soc_inst|m0_1|u_logic|Ofjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .lut_mask = 64'h0000000004000400;
-defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .lut_mask = 64'h00550055000D000D;
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Poa2z4~1 (
+// Location: LABCELL_X40_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ofjwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Poa2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & \soc_inst|m0_1|u_logic|Poa2z4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ofjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ofjwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Ofjwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (((\soc_inst|m0_1|u_logic|Nkpvx4~0_combout 
+//  & !\soc_inst|m0_1|u_logic|Ehjwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ehjwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Poa2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .lut_mask = 64'h00000000000A000A;
-defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .lut_mask = 64'h1311131133333333;
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~14 (
+// Location: LABCELL_X35_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~14_combout  = ( \soc_inst|m0_1|u_logic|Poa2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ekgwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|W7hwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Poa2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ekgwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ofjwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout  & (!\soc_inst|m0_1|u_logic|X2jwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|A0zvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ofjwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout  & !\soc_inst|m0_1|u_logic|X2jwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Poa2z4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X2jwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~14_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .lut_mask = 64'hFF00FF00FD00FD00;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .lut_mask = 64'hC0C0C00000000000;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y3_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~15 (
+// Location: LABCELL_X43_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pyiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~15_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~14_combout  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~13_combout  & ((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Emi2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Pyiwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Xly2z4~q  & ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~13_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~14_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~15_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .lut_mask = 64'h00000000AAA8AAA8;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .lut_mask = 64'h0C000C000C000000;
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~1 (
+// Location: LABCELL_X37_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pyiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Togwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Pyiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pyiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pyiwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pyiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Wvewx4~0_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Togwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Togwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Togwx4~1 .lut_mask = 64'hCCFCCCFC00F000F0;
-defparam \soc_inst|m0_1|u_logic|Togwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .lut_mask = 64'h0303000033333333;
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~2 (
+// Location: MLABCELL_X34_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fvhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Togwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Togwx4~1_combout  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|Togwx4~1_combout  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Fvhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pyiwx4~1_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pyiwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ) # (!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ) # ((!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Togwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Togwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Togwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Togwx4~2 .lut_mask = 64'h05FF05FF05050505;
-defparam \soc_inst|m0_1|u_logic|Togwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .lut_mask = 64'h5F4C5F4C5F5F5F5F;
+defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~0 (
+// Location: FF_X34_Y14_N56
+dffeas \soc_inst|m0_1|u_logic|Npk2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Npk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Npk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vbovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Togwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Vbovx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Togwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Togwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Togwx4~0 .lut_mask = 64'hFF30FF3000300030;
-defparam \soc_inst|m0_1|u_logic|Togwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .lut_mask = 64'h0000000000220000;
+defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~3 (
+// Location: LABCELL_X30_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zlnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Togwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Togwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Togwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Togwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Togwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Zlnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nbm2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|interconnect_1|HREADY~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Nbm2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nbm2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Togwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Togwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Togwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Togwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Togwx4~3 .lut_mask = 64'hF5F50000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Togwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .lut_mask = 64'hFFFFFFFF0000FCFC;
+defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~16 (
+// Location: FF_X30_Y20_N4
+dffeas \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B9nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~16_combout  = ( \soc_inst|m0_1|u_logic|Togwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~15_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Togwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~15_combout  & 
-// ((\soc_inst|m0_1|u_logic|S4w2z4~q ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|B9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qcy2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[12]~22_combout  & ((!\soc_inst|m0_1|u_logic|Add1~1_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[12]~22_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add1~1_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qcy2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~1_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~1_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bfgwx4~15_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Togwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add1~1_sumout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~16_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B9nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .lut_mask = 64'h050F050F0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .lut_mask = 64'h00FAFAFA00C8C8C8;
+defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~17 (
+// Location: FF_X31_Y19_N19
+dffeas \soc_inst|m0_1|u_logic|Qcy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|B9nvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qcy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qcy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Knhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~17_combout  = ( !\soc_inst|m0_1|u_logic|Kugwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~16_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~12_combout  & ((!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Itgwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Knhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ) # ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout 
+// )) ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28  & \soc_inst|interconnect_1|HRDATA[29]~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~12_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kugwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~16_combout ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Knhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .lut_mask = 64'h0000000000AF0000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .lut_mask = 64'hFF22FF22FFEEFFEE;
+defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0hwx4~1 (
+// Location: FF_X31_Y17_N43
+dffeas \soc_inst|m0_1|u_logic|Mww2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Knhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mww2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mww2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mww2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zgsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I0hwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & 
-// \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Zgsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout  & 
+// ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I0hwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zgsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .lut_mask = 64'h005500FF00550055;
-defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .lut_mask = 64'h00000000C0F3C0F3;
+defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zygwx4~0 (
+// Location: LABCELL_X31_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zygwx4~0_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|T4nvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( !\soc_inst|m0_1|u_logic|Zgsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vapvx4~combout  & ((\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( !\soc_inst|m0_1|u_logic|Zgsvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zygwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T4nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .lut_mask = 64'h0000A0A000000000;
-defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .lut_mask = 64'h3F3F3F0000000000;
+defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvgwx4~0 (
+// Location: LABCELL_X35_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zygwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yyyvx4~combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|T4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|T4nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qcy2z4~q  & (!\soc_inst|m0_1|u_logic|Wfovx4~combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mww2z4~q )))) 
+// # (\soc_inst|m0_1|u_logic|Qcy2z4~q  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Mww2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mww2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zygwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T4nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .lut_mask = 64'hBF00BF0000000000;
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .lut_mask = 64'h00000000CF45CF45;
+defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvgwx4~1 (
+// Location: FF_X35_Y13_N4
+dffeas \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvgwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tvgwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Srgwx4~0_combout ))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Tvgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|R8wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Qdj2z4~q  & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvgwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R8wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .lut_mask = 64'hCCCCCCCC00400040;
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .lut_mask = 64'h000000220A000A00;
+defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~0 (
+// Location: LABCELL_X42_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8wvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H06wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H06wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|R8wvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Blwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R8wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ohwvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R8wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ohwvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R8wvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0hwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .lut_mask = 64'h4040404055555555;
-defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .lut_mask = 64'hC8C8C0C000000000;
+defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~0 (
+// Location: LABCELL_X43_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout  & (!\soc_inst|m0_1|u_logic|P0hwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout  & !\soc_inst|m0_1|u_logic|P0hwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|W3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~q ) # (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Yzi2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P0hwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W3mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .lut_mask = 64'hF000F000E000E000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .lut_mask = 64'hCCCCFCFC0000F0F0;
+defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4 (
+// Location: LABCELL_X37_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ) # (!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ) # ((!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|I0hwx4~1_combout  & \soc_inst|m0_1|u_logic|I0hwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|W3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~q  & ( !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ) # ((!\soc_inst|m0_1|u_logic|W3mvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Bsy2z4~q ) 
+// # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~q  & ( !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & (!\soc_inst|m0_1|u_logic|W3mvx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I0hwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W3mvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4 .lut_mask = 64'hFFAEFFAEFFAAFFAA;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .lut_mask = 64'h1030DCFC00000000;
+defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y7_N2
-dffeas \soc_inst|m0_1|u_logic|Sgj2z4 (
+// Location: FF_X37_Y9_N44
+dffeas \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sgj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sgj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y3_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qr42z4~0 (
+// Location: LABCELL_X37_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qr42z4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Fjewx4~0_combout  = ( \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C3z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Auk2z4~q 
+// )) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Auk2z4~q ) # (\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C3z2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Auk2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|C3z2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Auk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qr42z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .lut_mask = 64'hFFFF002200000055;
-defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .lut_mask = 64'h000000030003033F;
+defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y3_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qr42z4~1 (
+// Location: LABCELL_X37_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|Qr42z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|Qr42z4~0_combout  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Fjewx4~1_combout  = ( \soc_inst|m0_1|u_logic|K9z2z4~q  & ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|W7z2z4~q  & !\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9z2z4~q  & ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|W7z2z4~q ) # (!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|K9z2z4~q  & ( !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|W7z2z4~q ) # (!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|K9z2z4~q  & ( !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qr42z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .lut_mask = 64'h0F0FFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .lut_mask = 64'hFFFFFFFCFFFCFCCC;
+defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6qvx4~0 (
+// Location: LABCELL_X35_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ivewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I6qvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|T50wx4~0_combout  & (\soc_inst|m0_1|u_logic|U5qvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|U5qvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Ivewx4~combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U5qvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I6qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ivewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .lut_mask = 64'h000800A8000A00AA;
-defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ivewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ivewx4 .lut_mask = 64'h0000000040444044;
+defparam \soc_inst|m0_1|u_logic|Ivewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nfnvx4~0 (
+// Location: MLABCELL_X34_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nfnvx4~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|m0_1|u_logic|I6qvx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HREADY~0_combout  & ( (\soc_inst|m0_1|u_logic|A4t2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|I6qvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|E7fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~q  & (!\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|I6qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E7fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .lut_mask = 64'h0FFF0FFF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y7_N34
-dffeas \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X37_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  $ 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ark2z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Woewx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~5 .lut_mask = 64'hAA08A00AA008A000;
+defparam \soc_inst|m0_1|u_logic|Woewx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G1mwx4~0 (
+// Location: LABCELL_X40_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G1mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|B73wx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G1mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .lut_mask = 64'h00000000A0E0A0E0;
-defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~1 .lut_mask = 64'h0000000033033303;
+defparam \soc_inst|m0_1|u_logic|Woewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P2mwx4~0 (
+// Location: LABCELL_X37_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P2mwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|G97wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P2mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .lut_mask = 64'h2323000022220000;
-defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~3 .lut_mask = 64'hF0AA000000AA0808;
+defparam \soc_inst|m0_1|u_logic|Woewx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwrite_o~0 (
+// Location: MLABCELL_X39_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwrite_o~0_combout  = ( \soc_inst|m0_1|u_logic|Z0mwx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Z0mwx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|G1mwx4~0_combout  & \soc_inst|m0_1|u_logic|Pa7wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|I2mwx4~0_combout )) # (\soc_inst|m0_1|u_logic|P2mwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  
+// $ (!\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q ))) 
+// ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G1mwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|P2mwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .lut_mask = 64'h3F7F3F7FFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~4 .lut_mask = 64'h38BA303038BA3A30;
+defparam \soc_inst|m0_1|u_logic|Woewx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N33
-cyclonev_lcell_comb \soc_inst|ram_1|read_cycle~0 (
+// Location: LABCELL_X37_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~2 (
 // Equation(s):
-// \soc_inst|ram_1|read_cycle~0_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( !\soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Woewx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Wxcwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|read_cycle~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|read_cycle~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|read_cycle~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|ram_1|read_cycle~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y9_N35
-dffeas \soc_inst|ram_1|read_cycle (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|read_cycle~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|read_cycle~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|read_cycle .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|read_cycle .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Woewx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~2 .lut_mask = 64'h0050005000700070;
+defparam \soc_inst|m0_1|u_logic|Woewx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N3
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[29]~0 (
+// Location: LABCELL_X40_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~6 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[29]~0_combout  = ( \soc_inst|interconnect_1|mux_sel [0] & ( \soc_inst|ram_1|byte_select [3] & ( (\soc_inst|ram_1|read_cycle~q  & (!\soc_inst|interconnect_1|mux_sel [1] & !\soc_inst|interconnect_1|mux_sel [2])) ) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Woewx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Woewx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Woewx4~5_combout  & (!\soc_inst|m0_1|u_logic|Woewx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Woewx4~3_combout )) ) ) )
 
-	.dataa(!\soc_inst|ram_1|read_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datae(!\soc_inst|interconnect_1|mux_sel [0]),
-	.dataf(!\soc_inst|ram_1|byte_select [3]),
+	.dataa(!\soc_inst|m0_1|u_logic|Woewx4~5_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Woewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Woewx4~3_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Woewx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[29]~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[29]~0 .lut_mask = 64'h0000000000005000;
-defparam \soc_inst|interconnect_1|HRDATA[29]~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~6 .lut_mask = 64'h8080000000000000;
+defparam \soc_inst|m0_1|u_logic|Woewx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~0 (
+// Location: MLABCELL_X39_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Vapvx4~combout  & \soc_inst|interconnect_1|HRDATA[13]~27_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|m0_1|u_logic|Vapvx4~combout  & \soc_inst|interconnect_1|HRDATA[13]~27_combout )) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~7_combout  = ( \soc_inst|m0_1|u_logic|Woewx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout  & (((!\soc_inst|m0_1|u_logic|H5fwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Csewx4~0_combout  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .lut_mask = 64'hABABABAB03030303;
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~7 .lut_mask = 64'h00000000A2F3A2F3;
+defparam \soc_inst|m0_1|u_logic|Woewx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y9_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dnhvx4~0 (
+// Location: MLABCELL_X34_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dnhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ) # (!\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Woewx4~8_combout  = ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Woewx4~7_combout  & (((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Msyvx4~combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Woewx4~7_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dnhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .lut_mask = 64'hFFFFFFFFFFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~8 .lut_mask = 64'h0000000000DF00DF;
+defparam \soc_inst|m0_1|u_logic|Woewx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y9_N46
-dffeas \soc_inst|m0_1|u_logic|Byw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dnhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Byw2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X42_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ugewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ugewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & !\soc_inst|m0_1|u_logic|Viy2z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Byw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Byw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .lut_mask = 64'h8888000000000000;
+defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~1 (
+// Location: MLABCELL_X39_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bdm2z4~q ) # (!\soc_inst|m0_1|u_logic|Byw2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout 
-//  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Byw2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bdm2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|R3fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  & \soc_inst|m0_1|u_logic|Bsy2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Bsy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pty2z4~q ))) # (\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Byw2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .lut_mask = 64'h0000CCCCF0F0FCFC;
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .lut_mask = 64'hFF8FFF8F00880088;
+defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~2 (
+// Location: LABCELL_X43_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ajnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ajnvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # 
-// (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 )))) ) )
+// \soc_inst|m0_1|u_logic|E0fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & !\soc_inst|m0_1|u_logic|Pty2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Pty2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & !\soc_inst|m0_1|u_logic|Pty2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Zoy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Pty2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Pty2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
-	.datad(!\soc_inst|m0_1|u_logic|Ajnvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ajnvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E0fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .lut_mask = 64'hFE00FE0000000000;
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .lut_mask = 64'h0202020280808181;
+defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y8_N43
-dffeas \soc_inst|m0_1|u_logic|Qem2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ajnvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X42_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E0fwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  
+// & \soc_inst|m0_1|u_logic|Tki2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q 
+//  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|E0fwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qem2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qem2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .lut_mask = 64'h0077002200550010;
+defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~1 (
+// Location: LABCELL_X42_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qllwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & \soc_inst|m0_1|u_logic|Y6t2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & \soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|E0fwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|E0fwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R3fwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|E0fwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E0fwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E0fwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qllwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E0fwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .lut_mask = 64'h0A0B0A0B00030003;
-defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .lut_mask = 64'hDCCCDCCC00000000;
+defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~2 (
+// Location: LABCELL_X29_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dwewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qllwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Q3xvx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Q3xvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout 
-// ) # (!\soc_inst|m0_1|u_logic|Ju5wx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Dwewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Xly2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hyewx4~combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qllwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dwewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .lut_mask = 64'h00FA00FA00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .lut_mask = 64'hF0F0F0F0F0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~3 (
+// Location: LABCELL_X29_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dwewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qllwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Bkxvx4~combout  & ( \soc_inst|m0_1|u_logic|Qllwx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Dwewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qllwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qllwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dwewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .lut_mask = 64'h000000000000FDFD;
-defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .lut_mask = 64'h0400040000000000;
+defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~4 (
+// Location: LABCELL_X29_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bvewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qllwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|Qllwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Qllwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( 
-// \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Bvewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dwewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (((\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bsy2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Dwewx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Dwewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qllwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qllwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dwewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dwewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bvewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .lut_mask = 64'h3333030333331313;
-defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .shared_arith = "off";
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .lut_mask = 64'h3333333301330133;
+defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~1 (
+// Location: MLABCELL_X34_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wfhvx4~1_combout  = (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & ((!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Nqy2z4~q  & !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Zoy2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ))))
+// \soc_inst|m0_1|u_logic|Woewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bvewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (((!\soc_inst|m0_1|u_logic|Y6t2z4~q ) # (!\soc_inst|m0_1|u_logic|Kzxvx4~combout )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bvewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .lut_mask = 64'hECA0ECA0ECA0ECA0;
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~0 .lut_mask = 64'hFFFBFFFB00000000;
+defparam \soc_inst|m0_1|u_logic|Woewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~0 (
+// Location: MLABCELL_X34_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wfhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I6z2z4~q  & \soc_inst|m0_1|u_logic|W7z2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~9_combout  = ( \soc_inst|m0_1|u_logic|E0fwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Woewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E7fwx4~0_combout  & \soc_inst|m0_1|u_logic|Woewx4~8_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|E0fwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Woewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|E7fwx4~0_combout  & \soc_inst|m0_1|u_logic|Woewx4~8_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|E7fwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Woewx4~8_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|E0fwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .lut_mask = 64'h0000000003030303;
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~9 .lut_mask = 64'h0000000004040C0C;
+defparam \soc_inst|m0_1|u_logic|Woewx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y8_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~2 (
+// Location: MLABCELL_X34_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wfhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wfhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ((\soc_inst|m0_1|u_logic|K9z2z4~q ))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & (((\soc_inst|m0_1|u_logic|K9z2z4~q )))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout  & ((\soc_inst|m0_1|u_logic|K9z2z4~q ) # (\soc_inst|m0_1|u_logic|Cllwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Qxhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Woewx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Ivewx4~combout  & ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (\soc_inst|interconnect_1|HREADY~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Woewx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (\soc_inst|interconnect_1|HREADY~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ivewx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfhvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .lut_mask = 64'h10FA10FA50FA50FA;
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .lut_mask = 64'h5F5F5F5F005F005F;
+defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y8_N22
-dffeas \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE (
+// Location: FF_X33_Y14_N59
+dffeas \soc_inst|m0_1|u_logic|Emi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjewx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Fjewx4~0_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~q  & ( (!\soc_inst|m0_1|u_logic|K1z2z4~q  & (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Auk2z4~q  & \soc_inst|m0_1|u_logic|Cyq2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|K1z2z4~q  & ((!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Auk2z4~q  & \soc_inst|m0_1|u_logic|Cyq2z4~q )) # (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Cyq2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Auk2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~q  & ( (\soc_inst|m0_1|u_logic|K1z2z4~q  & (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Auk2z4~q  & \soc_inst|m0_1|u_logic|Cyq2z4~q ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjewx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .lut_mask = 64'h0001000101170117;
-defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Emi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Emi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjewx4~1 (
+// Location: MLABCELL_X34_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ptgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fjewx4~1_combout  = ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ptgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .lut_mask = 64'hFFFEFFFEFEF8FEF8;
-defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~0 (
+// Location: MLABCELL_X34_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Etlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Msyvx4~combout 
-// ) # ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Etlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Ptgwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Etlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .lut_mask = 64'hFE32FE3200000000;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .lut_mask = 64'hEF00EF00AF00AF00;
+defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~1 (
+// Location: LABCELL_X37_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Xslwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Emi2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q 
+// )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xslwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .lut_mask = 64'h080808080C0C4C4C;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .lut_mask = 64'h00000000C0C0C0EA;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zlfwx4~0 (
+// Location: LABCELL_X36_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zlfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & \soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ukpvx4~combout  & 
-// (\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ffj2z4~q )))) # (\soc_inst|m0_1|u_logic|Ukpvx4~combout  & (((\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & \soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Howvx4~0_combout ))) 
-// ) )
+// \soc_inst|m0_1|u_logic|Xslwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zlfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xslwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .lut_mask = 64'h0537053700330033;
-defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~2 (
+// Location: LABCELL_X36_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ajfwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zlfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Howvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ajfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zlfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xslwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~q  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Xslwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Qdj2z4~q  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zlfwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xslwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xslwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .lut_mask = 64'hCC880000C0800000;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .lut_mask = 64'h50005000F000F000;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsfwx4~0 (
+// Location: LABCELL_X36_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lsfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Xslwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & ((\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # ((\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
+// (((\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xslwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .lut_mask = 64'h1100110015051505;
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .lut_mask = 64'h8D8F8D8F050F050F;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Infwx4~0 (
+// Location: LABCELL_X36_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Infwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xslwx4~4_combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xslwx4~2_combout  & !\soc_inst|m0_1|u_logic|Xslwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Xslwx4~2_combout  & (!\soc_inst|m0_1|u_logic|M66wx4~combout  & !\soc_inst|m0_1|u_logic|Xslwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xslwx4~2_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xslwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Infwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xslwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Infwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Infwx4~0 .lut_mask = 64'h0000100080809080;
-defparam \soc_inst|m0_1|u_logic|Infwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .lut_mask = 64'hA000A000AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsfwx4~1 (
+// Location: LABCELL_X31_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ushvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lsfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ushvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Etlwx4~0_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Xslwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Xslwx4~4_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Etlwx4~0_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Xslwx4~4_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Etlwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xslwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xslwx4~4_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .lut_mask = 64'h3333333312131213;
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .lut_mask = 64'h88CC88CC88C888C8;
+defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Infwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lsfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B73wx4~combout  & !\soc_inst|m0_1|u_logic|C2yvx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Infwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lsfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|C2yvx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Infwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lsfwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|B73wx4~combout  & ((!\soc_inst|m0_1|u_logic|C2yvx4~combout ) # (!\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Infwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lsfwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|C2yvx4~combout ) # (!\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Infwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y14_N22
+dffeas \soc_inst|m0_1|u_logic|O5t2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .lut_mask = 64'hFCFCA8A8CCCC8888;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O5t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O5t2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~4 (
+// Location: LABCELL_X37_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Idiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ajfwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Ajfwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ucqvx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Idiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ajfwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ajfwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Idiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .lut_mask = 64'h0000000000FC00FC;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .lut_mask = 64'h000000300000FFFF;
+defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~5 (
+// Location: LABCELL_X29_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ws3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ajfwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ajfwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ws3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ajfwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ajfwx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .lut_mask = 64'h000000000000FFFC;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .lut_mask = 64'h0C000C00AEAAAEAA;
+defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vqfwx4~0 (
+// Location: LABCELL_X29_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vqfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M66wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Ju5wx4~combout  & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|M66wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ws3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|X77wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ws3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vqfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .lut_mask = 64'h0300030057555755;
-defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .lut_mask = 64'h000A000A00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~0 (
+// Location: LABCELL_X36_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rvfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9w2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|G9w2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Ttiwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kzxvx4~combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ttiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .lut_mask = 64'hEEEEEEEEEEE0EEE0;
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .lut_mask = 64'h0000000000440000;
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L6gwx4~0 (
+// Location: LABCELL_X37_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L6gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Akewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~q  & 
-// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Akewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ttiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (((\soc_inst|m0_1|u_logic|Ttiwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Fhc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|O76wx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|Ttiwx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ttiwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L6gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .lut_mask = 64'h33F333F333333333;
-defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .lut_mask = 64'h0A0A0A0A0A1B0A1B;
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~1 (
+// Location: LABCELL_X36_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rvfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # 
-// ((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Ttiwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Keiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ttiwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sbiwx4~3_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .lut_mask = 64'hFFAFFFAF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .lut_mask = 64'hF0F00000A0A00000;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~4 (
+// Location: LABCELL_X36_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Agiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rvfwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Rvfwx4~0_combout  & (\soc_inst|m0_1|u_logic|Rvfwx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ark2z4~q )) 
-// # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )))) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Rvfwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Rvfwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|L6gwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )))))) ) )
+// \soc_inst|m0_1|u_logic|Agiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rvfwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|L6gwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~1_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Agiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .lut_mask = 64'h0000000055515151;
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .lut_mask = 64'h0000000000000101;
+defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~2 (
+// Location: LABCELL_X42_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yeiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rvfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rvfwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rvfwx4~4_combout  ) )
+// \soc_inst|m0_1|u_logic|Yeiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Agiwx4~0_combout  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Agiwx4~0_combout  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Agiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Agiwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Agiwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .lut_mask = 64'h00000000FFFFFFFA;
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .lut_mask = 64'hCCCC88CC00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cyfwx4~0 (
+// Location: LABCELL_X37_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cyfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|Ucqvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & 
-// ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yeiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sbiwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yeiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sbiwx4~4_combout  & (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sbiwx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cyfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .lut_mask = 64'h5555555501010101;
-defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .lut_mask = 64'h000D000D0D0D0D0D;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~1 (
+// Location: LABCELL_X37_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B1gwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Qsewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & \soc_inst|m0_1|u_logic|Qem2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// \soc_inst|m0_1|u_logic|Bsy2z4~q ))) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Bsy2z4~q )) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B1gwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .lut_mask = 64'h0005000511111111;
-defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .lut_mask = 64'h1115151533373737;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K2gwx4~0 (
+// Location: LABCELL_X42_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K2gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & \soc_inst|m0_1|u_logic|Ugewx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~q  $ (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Bsy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K2gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .lut_mask = 64'h414100AA0000050F;
-defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .lut_mask = 64'h50FA500AF050F0F0;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~0 (
+// Location: LABCELL_X42_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B1gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & !\soc_inst|m0_1|u_logic|W28wx4~0_combout )) # (\soc_inst|m0_1|u_logic|X5gwx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & !\soc_inst|m0_1|u_logic|W28wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ))))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B1gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .lut_mask = 64'h0F000F003F333F33;
-defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .lut_mask = 64'h0101111101011011;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~2 (
+// Location: LABCELL_X40_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B1gwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|K2gwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B1gwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|B1gwx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|B1gwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B1gwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q ) # ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Pty2z4~q  & \soc_inst|m0_1|u_logic|Qdj2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (((!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~q  
+// & (((!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qdj2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|B1gwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K2gwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B1gwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B1gwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .lut_mask = 64'h1155115551555155;
-defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .lut_mask = 64'h11F1FFF100F000F0;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ccgwx4~0 (
+// Location: LABCELL_X37_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ccgwx4~0_combout  = (\soc_inst|m0_1|u_logic|Hyewx4~combout  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # (!\soc_inst|m0_1|u_logic|Xly2z4~q ))))
+// \soc_inst|m0_1|u_logic|Wkiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wkiwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
+// ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wkiwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ccgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .lut_mask = 64'h5554555455545554;
-defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .lut_mask = 64'h0F3F0F3F00330033;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9gwx4~0 (
+// Location: LABCELL_X37_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  $ (((\soc_inst|m0_1|u_logic|Dvy2z4~q ))))) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Wkiwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wkiwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ) # 
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wkiwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wkiwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wkiwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wkiwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y9gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .lut_mask = 64'h9945994599009900;
-defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .lut_mask = 64'hF050F05030103010;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9gwx4~0 (
+// Location: LABCELL_X40_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Pty2z4~q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  
-// & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y9gwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K9gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .lut_mask = 64'h30303231F0F0FAF5;
-defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .lut_mask = 64'h1101110110001000;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9gwx4~0 (
+// Location: LABCELL_X37_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|K9gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ccgwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|K9gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ccgwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K9gwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .lut_mask = 64'h5555555540004000;
-defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .lut_mask = 64'h000000000F0A0F0A;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6gwx4~0 (
+// Location: LABCELL_X40_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hohwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E6gwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Hohwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E6gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .lut_mask = 64'hF3FFF3FF00000000;
-defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .lut_mask = 64'h0000000022222222;
+defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6gwx4~1 (
+// Location: LABCELL_X40_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E6gwx4~1_combout  = ( \soc_inst|m0_1|u_logic|S4w2z4~q  & ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( (!\soc_inst|m0_1|u_logic|E6gwx4~0_combout  & \soc_inst|m0_1|u_logic|Howvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4w2z4~q  
-// & ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( (!\soc_inst|m0_1|u_logic|E6gwx4~0_combout  & \soc_inst|m0_1|u_logic|Howvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|S4w2z4~q  & ( !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E6gwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4w2z4~q  & ( !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|E6gwx4~0_combout  & \soc_inst|m0_1|u_logic|Howvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hohwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Sbiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E6gwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sbiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E6gwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .lut_mask = 64'h2222323222222222;
-defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~3 (
+// Location: LABCELL_X37_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rvfwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|D9gwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E6gwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rvfwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Cyfwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|B1gwx4~2_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Sbiwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Sbiwx4~5_combout  & (((\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|L8t2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sbiwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Sbiwx4~5_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rvfwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cyfwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B1gwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|D9gwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|E6gwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sbiwx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .lut_mask = 64'h4040000000000000;
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .lut_mask = 64'h1111111113331333;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4 (
+// Location: LABCELL_X35_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mvhvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~combout  = ( \soc_inst|m0_1|u_logic|Rvfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Vqfwx4~0_combout  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rvfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Vqfwx4~0_combout  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Mvhvx4~combout  = ( \soc_inst|m0_1|u_logic|Sbiwx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sbiwx4~6_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vqfwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4 .lut_mask = 64'hEEEFEEEFCCCFCCCF;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mvhvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mvhvx4 .lut_mask = 64'h5F5F5F5F54505450;
+defparam \soc_inst|m0_1|u_logic|Mvhvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y7_N25
-dffeas \soc_inst|m0_1|u_logic|Ffj2z4 (
+// Location: FF_X34_Y14_N52
+dffeas \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ffj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wdxvx4~0 (
+// Location: MLABCELL_X25_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtwwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|C3w2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # (((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Walwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|C3w2z4~q  & ( (((!\soc_inst|m0_1|u_logic|Wxp2z4~q  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|Palwx4~0_combout 
+// ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .lut_mask = 64'hDFFFFDFFDFFF75FF;
+defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y11_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~0 (
+// Location: LABCELL_X22_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Z4qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~81_sumout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Add5~81_sumout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .lut_mask = 64'hFFFCFFFC00000000;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .lut_mask = 64'hF000FF0050005500;
+defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D5kwx4~0 (
+// Location: LABCELL_X22_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4qvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D5kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Z4qvx4~combout  = ( \soc_inst|m0_1|u_logic|W4zvx4~1_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wsawx4~0_combout  & (\soc_inst|m0_1|u_logic|Z4qvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W4zvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wsawx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Z4qvx4~0_combout  & !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z4qvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D5kwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .lut_mask = 64'h11001100A000A100;
-defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4qvx4 .lut_mask = 64'h0000030000000301;
+defparam \soc_inst|m0_1|u_logic|Z4qvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~2 (
+// Location: FF_X23_Y11_N31
+dffeas \soc_inst|m0_1|u_logic|Cll2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cll2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cll2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cll2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y11_N1
+dffeas \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y15_N59
+dffeas \soc_inst|m0_1|u_logic|Ch03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ch03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ch03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ch03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ht5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Fn23z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Wd13z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Ch03z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|I793z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fn23z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|I793z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ch03z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wd13z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .lut_mask = 64'h0F0F00000F0F2222;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .lut_mask = 64'hCCCCF0F0FF00AAAA;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~3 (
+// Location: FF_X27_Y11_N49
+dffeas \soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5kwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Amjwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5kwx4~0_combout  & !\soc_inst|m0_1|u_logic|Amjwx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ht5wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ow33z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  ) ) # ( \soc_inst|m0_1|u_logic|Ow33z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ow33z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|D5kwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Amjwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ow33z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .lut_mask = 64'hC0C0C0C080C080C0;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .lut_mask = 64'hF000F000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~1 (
+// Location: MLABCELL_X28_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ((\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ht5wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ))) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (((\soc_inst|m0_1|u_logic|Ht5wx4~2_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .lut_mask = 64'h05050505050F050F;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .lut_mask = 64'h05004000AF00EA00;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~4 (
+// Location: MLABCELL_X28_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Amjwx4~3_combout  & 
-// !\soc_inst|m0_1|u_logic|Amjwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (\soc_inst|m0_1|u_logic|Amjwx4~3_combout  & !\soc_inst|m0_1|u_logic|Amjwx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (\soc_inst|m0_1|u_logic|Amjwx4~3_combout  & !\soc_inst|m0_1|u_logic|Amjwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (\soc_inst|m0_1|u_logic|Amjwx4~3_combout  & !\soc_inst|m0_1|u_logic|Amjwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ht5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xowwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ht5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Cll2z4~q  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X553z4~q )))) # (\soc_inst|m0_1|u_logic|Cll2z4~q  & (((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X553z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Amjwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Amjwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cll2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X553z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xowwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .lut_mask = 64'h0F000F000F000A00;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .lut_mask = 64'hDD0D000000000000;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~5 (
+// Location: LABCELL_X27_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[15]~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Gpjwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Amjwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Amjwx4~0_combout  & (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Mkrwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gpjwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Amjwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Amjwx4~0_combout  & !\soc_inst|m0_1|u_logic|Mkrwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  = ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & \soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Z62wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Amjwx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .lut_mask = 64'h0000000055004400;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .lut_mask = 64'hFFCCFFCC00CC00CC;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tsjwx4~0 (
+// Location: FF_X23_Y19_N29
+dffeas \soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Inb2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tsjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Inb2z4~combout  = ( \soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Inb2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .lut_mask = 64'h00000000000C000C;
-defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Inb2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Inb2z4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Inb2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3fwx4~0 (
+// Location: LABCELL_X24_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R3fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ugewx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Dvy2z4~q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) # 
-// ((\soc_inst|m0_1|u_logic|Ugewx4~0_combout  & !\soc_inst|m0_1|u_logic|Dvy2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~7_combout  = (!\soc_inst|m0_1|u_logic|Inb2z4~combout  & \soc_inst|m0_1|u_logic|Vsywx4~6_combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .lut_mask = 64'hF0BAF0BAF030F030;
-defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .lut_mask = 64'h0A0A0A0A0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zvjwx4~0 (
+// Location: LABCELL_X29_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zvjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Swy2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|G27wx4~2_combout  & \soc_inst|m0_1|u_logic|M4fwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R3fwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|C6mwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hzywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ozywx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vsywx4~7_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hzywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & \soc_inst|m0_1|u_logic|Ozywx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vsywx4~7_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hzywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ozywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vsywx4~7_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hzywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & (((\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & \soc_inst|m0_1|u_logic|Ozywx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vsywx4~7_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .lut_mask = 64'h0515051555555555;
-defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .lut_mask = 64'h0507050F05070D0F;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y4_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|My6wx4~1 (
+// Location: LABCELL_X29_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|My6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|V5mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) # (\soc_inst|m0_1|u_logic|C6mwx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & !\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|My6wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|My6wx4~1 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|My6wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .lut_mask = 64'h0F000F000F030F03;
+defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xujwx4~0 (
+// Location: FF_X29_Y19_N40
+dffeas \soc_inst|m0_1|u_logic|G9w2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G9w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G9w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Krjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xujwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zvjwx4~0_combout  & ( \soc_inst|m0_1|u_logic|My6wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zvjwx4~0_combout  & ( \soc_inst|m0_1|u_logic|My6wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & \soc_inst|m0_1|u_logic|Zoy2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Zvjwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|My6wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Krjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G9w2z4~q ) # ((\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xujwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Krjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .lut_mask = 64'h0000111101011111;
-defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .lut_mask = 64'h0F000F00AFAAAFAA;
+defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y4_N42
+// Location: LABCELL_X40_Y18_N18
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E2kwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E2kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Swy2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Swy2z4~q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  $ (\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Swy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|E2kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -102689,25 +103372,24 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E2kwx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .lut_mask = 64'h0101100103020202;
+defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .lut_mask = 64'h00030003004A000C;
 defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N30
+// Location: LABCELL_X37_Y18_N24
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Htjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & 
-// \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Htjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -102717,22 +103399,23 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .lut_mask = 64'h0001001100010001;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .lut_mask = 64'h0000001000110011;
 defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y4_N12
+// Location: LABCELL_X37_Y18_N30
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Htjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Htjwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Htjwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Htjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Htjwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & !\soc_inst|m0_1|u_logic|Htjwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Htjwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Htjwx4~0_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Htjwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Htjwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -102742,11 +103425,11 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~1 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .lut_mask = 64'hFF0FFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .lut_mask = 64'hF0F0F0F03030F0F0;
 defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y4_N30
+// Location: LABCELL_X36_Y18_N0
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~2 (
 // Equation(s):
 // \soc_inst|m0_1|u_logic|Htjwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Htjwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|E2kwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
@@ -102754,8 +103437,8 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~2 (
 
 	.dataa(gnd),
 	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E2kwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E2kwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
 	.datae(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
 	.dataf(!\soc_inst|m0_1|u_logic|Htjwx4~1_combout ),
 	.datag(gnd),
@@ -102767,3654 +103450,3492 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~2 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .lut_mask = 64'h00000000FCFCFC00;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .lut_mask = 64'h00000000FFCCF0C0;
 defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Htjwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xujwx4~0_combout  & (\soc_inst|m0_1|u_logic|Htjwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|A0zvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xujwx4~0_combout  & \soc_inst|m0_1|u_logic|Htjwx4~2_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xujwx4~0_combout  & \soc_inst|m0_1|u_logic|Htjwx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xujwx4~0_combout  & \soc_inst|m0_1|u_logic|Htjwx4~2_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Xujwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Htjwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htjwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .lut_mask = 64'h2222222222222020;
-defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qujwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qujwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|U2x2z4~q )) # (\soc_inst|m0_1|u_logic|G27wx4~0_combout ))) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # 
-// ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qujwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .lut_mask = 64'hFFEFFFFFFFFFFFFA;
-defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y5_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Drjwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Drjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qujwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Htjwx4~3_combout  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qujwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Htjwx4~3_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Htjwx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qujwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Drjwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .lut_mask = 64'hC888C88888888888;
-defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Krjwx4~0 (
+// Location: LABCELL_X40_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|My6wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Krjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9w2z4~q  & ( (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|G9w2z4~q  & ( ((\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|My6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Krjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .lut_mask = 64'h5F0F5F0F55005500;
-defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|My6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|My6wx4~1 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|My6wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4 (
+// Location: LABCELL_X37_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zvjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~combout  = ( \soc_inst|m0_1|u_logic|Krjwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Drjwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Krjwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ) # (((!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Tsjwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Drjwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Zvjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|R3fwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|R3fwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|R3fwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Drjwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Krjwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4 .lut_mask = 64'hAEFFAEFFEEFFEEFF;
-defparam \soc_inst|m0_1|u_logic|Amjwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y7_N35
-dffeas \soc_inst|m0_1|u_logic|Ark2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ark2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ark2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .lut_mask = 64'h1313131313133333;
+defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A0zvx4~0 (
+// Location: LABCELL_X36_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xujwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A0zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Xujwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zvjwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Zvjwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (\soc_inst|m0_1|u_logic|My6wx4~1_combout  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xujwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .lut_mask = 64'h0000555500000000;
-defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .lut_mask = 64'h0001000100330033;
+defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hohwx4~0 (
+// Location: LABCELL_X36_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hohwx4~0_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Hvhwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Htjwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Htjwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Xujwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout )) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Htjwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xujwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htjwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .lut_mask = 64'h0000FFFA00000000;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xphwx4~0 (
+// Location: LABCELL_X31_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qujwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xphwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|Qp3wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qujwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (((!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q )) # (\soc_inst|m0_1|u_logic|G27wx4~0_combout ))) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # 
+// ((!\soc_inst|m0_1|u_logic|Qdj2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xphwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qujwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .lut_mask = 64'h0000030300000000;
-defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .lut_mask = 64'hFFFFFFFEEFFFFFFE;
+defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~1 (
+// Location: LABCELL_X31_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Drjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Pmgwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Drjwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Htjwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Qujwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Htjwx4~3_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Qujwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Htjwx4~3_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Qujwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Htjwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qujwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Drjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .lut_mask = 64'h01010101CD01CD01;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .lut_mask = 64'hAAAAA000AAAA0000;
+defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y3_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~2 (
+// Location: LABCELL_X42_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tsjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|U2x2z4~q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|U2x2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Csewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Swy2z4~q  & (((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Tsjwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|L8t2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .lut_mask = 64'hFD08FD08CC08CC08;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .lut_mask = 64'h0000000003030000;
+defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~0 (
+// Location: LABCELL_X30_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout )) 
-// # (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ((\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .lut_mask = 64'h0C5D0C5D0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .lut_mask = 64'h03030303030F030F;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y3_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~3 (
+// Location: LABCELL_X33_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rmhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rmhwx4~1_combout  & (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Rmhwx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rmhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rmhwx4~1_combout  & \soc_inst|m0_1|u_logic|Rmhwx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (((\soc_inst|m0_1|u_logic|Egkwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Emi2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Kzxvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Egkwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rmhwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .lut_mask = 64'h0A0A080800000000;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .lut_mask = 64'h0C0C0C0C0C2E0C2E;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~4 (
+// Location: LABCELL_X37_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D5kwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Rmhwx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|G27wx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Swy2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|D5kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Ark2z4~q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D5kwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .lut_mask = 64'h00000000FDFDFDFD;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .lut_mask = 64'h2060206000400050;
+defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~5 (
+// Location: LABCELL_X33_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Xphwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (!\soc_inst|m0_1|u_logic|Pcyvx4~combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Amjwx4~2_combout  & !\soc_inst|m0_1|u_logic|D5kwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Amjwx4~2_combout  & (!\soc_inst|m0_1|u_logic|D5kwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xphwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Amjwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D5kwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .lut_mask = 64'h00000000FD00FD00;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .lut_mask = 64'h8880888088888888;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~4 (
+// Location: MLABCELL_X34_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Amjwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Amjwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Amjwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Amjwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .lut_mask = 64'h000A000A00000000;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .lut_mask = 64'h00000000F0E0F0E0;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0iwx4~0 (
+// Location: MLABCELL_X39_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K0iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Qem2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~5_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Amjwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Amjwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Gpjwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Amjwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Amjwx4~0_combout  & !\soc_inst|m0_1|u_logic|Mkrwx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Amjwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K0iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .lut_mask = 64'h0C080808FCF8F8F8;
-defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .lut_mask = 64'h0000000044444040;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0iwx4~1 (
+// Location: LABCELL_X33_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K0iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|K0iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|G27wx4~1_combout  & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|K0iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ) # (\soc_inst|m0_1|u_logic|Drjwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
+// (((!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ) # (\soc_inst|m0_1|u_logic|Tsjwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Drjwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Krjwx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Krjwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Drjwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K0iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K0iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .lut_mask = 64'h00FF00FF000C000C;
-defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4 .lut_mask = 64'hFF7FFF7FFF33FF33;
+defparam \soc_inst|m0_1|u_logic|Amjwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~1 (
+// Location: FF_X33_Y14_N41
+dffeas \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zzb2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zoy2z4~q  & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Pty2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .lut_mask = 64'hCCCC048400000000;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .lut_mask = 64'hFFFFFFFF00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~2 (
+// Location: LABCELL_X29_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0hwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Uijwx4~0_combout  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & (((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|I0hwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I0hwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .lut_mask = 64'hFB88F300000000FF;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .lut_mask = 64'h00003F3F00000F0F;
+defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y4_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~3 (
+// Location: LABCELL_X37_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0hwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fuhwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuhwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|K0iwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|I0hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K0iwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuhwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .lut_mask = 64'h1010000000000000;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~5 (
+// Location: LABCELL_X35_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout  & (((\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ))) ) )
+// \soc_inst|m0_1|u_logic|P0hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H06wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P0hwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .lut_mask = 64'h707070F0707070F0;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .lut_mask = 64'h00000000AF0FAF0F;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y7_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sjhwx4~0 (
+// Location: MLABCELL_X39_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zygwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sjhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  
-// & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Zygwx4~0_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zygwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .lut_mask = 64'hBABAFFFFBABAFFBF;
-defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .lut_mask = 64'h0000000080808080;
+defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tghwx4~0 (
+// Location: LABCELL_X40_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tghwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Y6t2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Tvgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zygwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yyyvx4~combout  & (((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
 	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zygwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tghwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .lut_mask = 64'h1300130033333333;
-defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .lut_mask = 64'hC4CCC4CC00000000;
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fghwx4 (
+// Location: LABCELL_X36_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvgwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fghwx4~combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Emewx4~0_combout  & \soc_inst|m0_1|u_logic|B73wx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Tvgwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Npk2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fghwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tvgwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fghwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fghwx4 .lut_mask = 64'h0000000000300030;
-defparam \soc_inst|m0_1|u_logic|Fghwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .lut_mask = 64'hF000F000F400F400;
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejhwx4 (
+// Location: LABCELL_X37_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ejhwx4~combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tvgwx4~1_combout  & ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P0hwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tvgwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P0hwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|P0hwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ejhwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ejhwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ejhwx4 .lut_mask = 64'h0000000055000000;
-defparam \soc_inst|m0_1|u_logic|Ejhwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .lut_mask = 64'hAAAA0000AA880000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~0 (
+// Location: LABCELL_X35_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Itgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Itgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .lut_mask = 64'h2020202020222022;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .lut_mask = 64'hF000F000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~1 (
+// Location: LABCELL_X36_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Poa2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Poa2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Poa2z4~0_combout  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Poa2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .lut_mask = 64'hF700FF0077007700;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~2 (
+// Location: MLABCELL_X39_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ejhwx4~combout  & ( \soc_inst|m0_1|u_logic|Ndhwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|O9qvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ekgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pty2z4~q )) 
+// ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ejhwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .lut_mask = 64'h00000000FEFE0000;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .lut_mask = 64'h0000000000004040;
+defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~3 (
+// Location: LABCELL_X36_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~14 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( \soc_inst|m0_1|u_logic|Ndhwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tghwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fghwx4~combout  & 
-// !\soc_inst|m0_1|u_logic|Ahhwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( \soc_inst|m0_1|u_logic|Ndhwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tghwx4~0_combout  & !\soc_inst|m0_1|u_logic|Fghwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~14_combout  = ( \soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ekgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Poa2z4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ekgwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tghwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fghwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Poa2z4~1_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~14_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .lut_mask = 64'h0000000088888080;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .lut_mask = 64'hFFFFFBFB00000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~4 (
+// Location: LABCELL_X36_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ndhwx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ndhwx4~3_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Sjhwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~13_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & (((\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Rngwx4~combout  & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Ahwvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~13_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .lut_mask = 64'h000000003131FFFF;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .lut_mask = 64'h003300000A3B0A0A;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4 (
+// Location: LABCELL_X36_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~15 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~combout  = ( \soc_inst|m0_1|u_logic|Ndhwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ) # (\soc_inst|m0_1|u_logic|Fuhwx4~5_combout )) # 
-// (\soc_inst|m0_1|u_logic|Hohwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ndhwx4~4_combout  )
+// \soc_inst|m0_1|u_logic|Bfgwx4~15_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~13_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~14_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bfgwx4~14_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~13_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~15_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4 .lut_mask = 64'hFFFFFFFFC4CCC4CC;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y7_N5
-dffeas \soc_inst|m0_1|u_logic|Fij2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fij2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fij2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .lut_mask = 64'h0F0E0F0E00000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1vvx4~0 (
+// Location: LABCELL_X36_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B1vvx4~0_combout  = (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )
+// \soc_inst|m0_1|u_logic|Togwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Qdj2z4~q  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Togwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .lut_mask = 64'h0FFF0FFF0FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~0 .lut_mask = 64'hF0F0F0F000CC00CC;
+defparam \soc_inst|m0_1|u_logic|Togwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~0 (
+// Location: LABCELL_X36_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Togwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) 
+// # ((\soc_inst|m0_1|u_logic|Emi2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Togwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~0 .lut_mask = 64'hF050F05030103010;
-defparam \soc_inst|m0_1|u_logic|hprot_o~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~1 .lut_mask = 64'hF5F0F5F055005500;
+defparam \soc_inst|m0_1|u_logic|Togwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~0 (
+// Location: LABCELL_X36_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrsvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Emi2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Togwx4~2_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout )) # (\soc_inst|m0_1|u_logic|Togwx4~1_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Togwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Togwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .lut_mask = 64'hFFF0FFF000000000;
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~2 .lut_mask = 64'h0A0A0A0A0AFF0AFF;
+defparam \soc_inst|m0_1|u_logic|Togwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C4d2z4~0 (
+// Location: LABCELL_X36_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C4d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Togwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Togwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Togwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Togwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Togwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C4d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Togwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .lut_mask = 64'h0000000000000303;
-defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~3 .lut_mask = 64'hCFFFCFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Togwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3d2z4~0 (
+// Location: LABCELL_X36_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~16 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3d2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~16_combout  = ( \soc_inst|m0_1|u_logic|Togwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~15_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Togwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~15_combout  & 
+// ((\soc_inst|m0_1|u_logic|Rngwx4~combout ) # (\soc_inst|m0_1|u_logic|S4w2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~15_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Togwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~16_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .lut_mask = 64'h0A000A0000000000;
-defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .lut_mask = 64'h0555055555555555;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~1 (
+// Location: LABCELL_X37_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kugwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrsvx4~1_combout  = ( \soc_inst|m0_1|u_logic|O76wx4~combout  & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q  & ((\soc_inst|m0_1|u_logic|Nsk2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O76wx4~combout  & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O76wx4~combout  & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O76wx4~combout  & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O3d2z4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Kugwx4~0_combout  = ( \soc_inst|m0_1|u_logic|A76wx4~0_combout  & ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|A76wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|C9yvx4~combout  & (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O3d2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kugwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .lut_mask = 64'hCCCC44CC8C8C048C;
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .lut_mask = 64'h0100010055555555;
+defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y6_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d2z4~0 (
+// Location: LABCELL_X36_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G6d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ahhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G6d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .lut_mask = 64'h000000000C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5d2z4~0 (
+// Location: LABCELL_X36_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z5d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~2_combout  = ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & \soc_inst|m0_1|u_logic|Wdqvx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & \soc_inst|m0_1|u_logic|Wdqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & \soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .lut_mask = 64'h0000000020202020;
-defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .lut_mask = 64'h000F000F111F111F;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L5d2z4~0 (
+// Location: LABCELL_X37_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L5d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Tki2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L5d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .lut_mask = 64'h000000000C000C00;
-defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .lut_mask = 64'hFFFEFFFE00000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P7d2z4~0 (
+// Location: LABCELL_X35_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhgwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P7d2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Mhgwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Ukpvx4~combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P7d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7fwx4~0 (
+// Location: MLABCELL_X39_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L7fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Thgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L7fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Thgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .lut_mask = 64'h4444444400000000;
-defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .lut_mask = 64'h0000000000000101;
+defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~2 (
+// Location: MLABCELL_X39_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hahwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrsvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( \soc_inst|m0_1|u_logic|L7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout  & (!\soc_inst|m0_1|u_logic|L5d2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ju5wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( \soc_inst|m0_1|u_logic|L7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|L5d2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L5d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ju5wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L7fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L5d2z4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Hahwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( ((\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|L5d2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L7fwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hahwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .lut_mask = 64'hCCCCCCC088888880;
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .lut_mask = 64'h0303000003FF0000;
+defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aekwx4~0 (
+// Location: LABCELL_X35_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aekwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Y6t2z4~q  & \soc_inst|m0_1|u_logic|Ju5wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hahwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mhgwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Thgwx4~0_combout  & \soc_inst|m0_1|u_logic|S4w2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hahwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mhgwx4~1_combout  & !\soc_inst|m0_1|u_logic|Thgwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Hahwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mhgwx4~1_combout  & !\soc_inst|m0_1|u_logic|Thgwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hahwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Mhgwx4~1_combout  & !\soc_inst|m0_1|u_logic|Thgwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Thgwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hahwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .lut_mask = 64'h00F000F000000000;
-defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .lut_mask = 64'h8888888888880808;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~3 (
+// Location: LABCELL_X36_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrsvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Aekwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (!\soc_inst|m0_1|u_logic|C4d2z4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~1_combout  & !\soc_inst|m0_1|u_logic|G6d2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Aekwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C4d2z4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~1_combout  & !\soc_inst|m0_1|u_logic|G6d2z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|P0hwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Xly2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C4d2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G6d2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P0hwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .lut_mask = 64'h00000C0000000800;
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .lut_mask = 64'h0000000020002000;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~4 (
+// Location: LABCELL_X35_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bhewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|hprot_o~0_combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|R8d2z4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|hprot_o~0_combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Bhewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & \soc_inst|m0_1|u_logic|Hyewx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .lut_mask = 64'h0000101100001010;
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~0 (
+// Location: LABCELL_X37_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o~0_combout  = ( \soc_inst|m0_1|u_logic|Add3~1_sumout  & ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~1_sumout  & ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~1_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~1_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|A67wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|P0hwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o~0 .lut_mask = 64'hCFCF8A8ACF008A00;
-defparam \soc_inst|m0_1|u_logic|haddr_o~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .lut_mask = 64'h004400440F4F0F4F;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X18_Y5_N51
-cyclonev_lcell_comb \soc_inst|interconnect_1|LessThan0~0 (
+// Location: MLABCELL_X39_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~18 (
 // Equation(s):
-// \soc_inst|interconnect_1|LessThan0~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~18_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Pty2z4~q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~q  
+// & (((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q ))))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # 
+// ((((\soc_inst|m0_1|u_logic|Px5wx4~combout ) # (\soc_inst|m0_1|u_logic|Pty2z4~q )) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~18_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|LessThan0~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|LessThan0~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|interconnect_1|LessThan0~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X18_Y5_N34
-dffeas \soc_inst|interconnect_1|mux_sel[0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|interconnect_1|LessThan0~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|interconnect_1|mux_sel [0]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|interconnect_1|mux_sel[0] .is_wysiwyg = "true";
-defparam \soc_inst|interconnect_1|mux_sel[0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .lut_mask = 64'hBBFCBFFFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y9_N3
-cyclonev_lcell_comb \soc_inst|interconnect_1|Equal1~0 (
+// Location: LABCELL_X35_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~3 (
 // Equation(s):
-// \soc_inst|interconnect_1|Equal1~0_combout  = ( !\soc_inst|interconnect_1|mux_sel [2] & ( \soc_inst|interconnect_1|mux_sel [1] & ( !\soc_inst|interconnect_1|mux_sel [0] ) ) )
+// \soc_inst|m0_1|u_logic|P0hwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datab(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|mux_sel [2]),
-	.dataf(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datae(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|Equal1~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P0hwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|Equal1~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|Equal1~0 .lut_mask = 64'h00000000F0F00000;
-defparam \soc_inst|interconnect_1|Equal1~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y7_N14
-dffeas \soc_inst|switches_1|switch_store[1][8] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[8]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][8]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][8] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][8] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .lut_mask = 64'h0000000030300000;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N12
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~31 (
+// Location: LABCELL_X35_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~10 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[24]~31_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~17_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 )) # 
-// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][8]~q ))) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~10_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|My6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|P0hwx4~3_combout  & !\soc_inst|m0_1|u_logic|Pty2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|My6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|P0hwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|My6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|P0hwx4~3_combout  & \soc_inst|m0_1|u_logic|Pty2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ),
-	.datad(!\soc_inst|switches_1|switch_store[1][8]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[24]~31 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[24]~31 .lut_mask = 64'h000000000C3F0C3F;
-defparam \soc_inst|interconnect_1|HRDATA[24]~31 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .lut_mask = 64'h000A00000F0A0F00;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mohvx4~0 (
+// Location: LABCELL_X33_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mohvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~31_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[24]~31_combout  )
+// \soc_inst|m0_1|u_logic|Bfgwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (((\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Emi2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mohvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .lut_mask = 64'hFFFFFFFFFF00FF00;
-defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y6_N14
-dffeas \soc_inst|m0_1|u_logic|Gqw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mohvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gqw2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gqw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gqw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .lut_mask = 64'h4E444E4400000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~1 (
+// Location: LABCELL_X33_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|K6y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Gqw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Gqw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sgj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Emi2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Sgj2z4~q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Emi2z4~q  
+// & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Gqw2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V5nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
-defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .lut_mask = 64'h5199000072AA0000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~0 (
+// Location: LABCELL_X33_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|m0_1|u_logic|Vapvx4~combout  & \soc_inst|interconnect_1|HRDATA[8]~33_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|m0_1|u_logic|Vapvx4~combout  & \soc_inst|interconnect_1|HRDATA[8]~33_combout )) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~6_combout  & ( ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V5nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
-defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .lut_mask = 64'hFBF3FBF300000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~2 (
+// Location: MLABCELL_X34_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V5nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|V5nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V5nvx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[24]~31_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~8_combout  = ( \soc_inst|m0_1|u_logic|Ax0xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~5_combout  & \soc_inst|m0_1|u_logic|Bfgwx4~7_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ax0xx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Bfgwx4~5_combout  & (\soc_inst|m0_1|u_logic|Bfgwx4~7_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|V5nvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bfgwx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~7_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V5nvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .lut_mask = 64'hF0C0F0C000000000;
-defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y7_N25
-dffeas \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .lut_mask = 64'h00C800C800CC00CC;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkkwx4~0 (
+// Location: LABCELL_X36_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fkkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~9_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bfgwx4~8_combout  ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bfgwx4~8_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .lut_mask = 64'hFFF0FFF044404440;
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .lut_mask = 64'h00000000FEFEFFFF;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkkwx4~1 (
+// Location: LABCELL_X37_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fkkwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gokwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Gokwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fkkwx4~0_combout  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~11_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~10_combout  & ((!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Emi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~10_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~10_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .lut_mask = 64'hAA00AA00AB00AB00;
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .lut_mask = 64'h00000000FF00FC00;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pikwx4~0 (
+// Location: LABCELL_X37_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~12 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pikwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|O76wx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|O76wx4~combout )) # (\soc_inst|m0_1|u_logic|M66wx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~12_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~18_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~11_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~3_combout  & (\soc_inst|m0_1|u_logic|Bfgwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Bfgwx4~4_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~3_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bfgwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bfgwx4~18_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~11_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pikwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~12_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .lut_mask = 64'h0000000003570357;
-defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .lut_mask = 64'h0000000000000500;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Askwx4~1 (
+// Location: LABCELL_X37_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Askwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~q  
-// & (((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~17_combout  = ( !\soc_inst|m0_1|u_logic|Kugwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~12_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~16_combout  & ((!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Itgwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~16_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kugwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~12_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Askwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Askwx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Askwx4~1 .lut_mask = 64'hBBFC444CFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Askwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .lut_mask = 64'h0000000000BB0000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y4_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~2 (
+// Location: MLABCELL_X34_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mkkwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~17_combout  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|I0hwx4~1_combout  & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|I0hwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Bfgwx4~17_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I0hwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .lut_mask = 64'h00A000A000000000;
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4 .lut_mask = 64'hFFFFFFFFFF08FF08;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~1 (
+// Location: FF_X34_Y14_N26
+dffeas \soc_inst|m0_1|u_logic|Sgj2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sgj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sgj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Huqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mkkwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Jp3wx4~combout  & (\soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Huqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.dataf(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .lut_mask = 64'h0500000005000000;
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lgkwx4~0 (
+// Location: LABCELL_X35_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Og4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lgkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Og4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .lut_mask = 64'h0000000005050505;
+defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unewx4~0 (
+// Location: LABCELL_X42_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Unewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vskwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Vskwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Mtqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|M66wx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|M66wx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Unewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Unewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Unewx4~0 .lut_mask = 64'h03030303030B030B;
-defparam \soc_inst|m0_1|u_logic|Unewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .lut_mask = 64'h00000F0F55555F5F;
+defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unewx4 (
+// Location: LABCELL_X42_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ag4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Unewx4~combout  = ( !\soc_inst|m0_1|u_logic|Unewx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ag4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Unewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Unewx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Unewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Unewx4 .lut_mask = 64'hFF3FFF3F00000000;
-defparam \soc_inst|m0_1|u_logic|Unewx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .lut_mask = 64'h0000000000100010;
+defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y4_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~7 (
+// Location: LABCELL_X42_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtqvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Mkkwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Unewx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mkkwx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Mtqvx4~combout  = ( \soc_inst|m0_1|u_logic|P03wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ag4wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & !\soc_inst|m0_1|u_logic|Mtqvx4~0_combout 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|P03wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ag4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & !\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Mkkwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Unewx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .lut_mask = 64'h00000000FDFD0000;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mtqvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mtqvx4 .lut_mask = 64'hC0C0404000000000;
+defparam \soc_inst|m0_1|u_logic|Mtqvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Askwx4~0 (
+// Location: LABCELL_X35_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cdnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Askwx4~0_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Xhxvx4~combout  & \soc_inst|m0_1|u_logic|G27wx4~2_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Cdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & (((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Rsqvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mtqvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & (((\soc_inst|m0_1|u_logic|L8t2z4~q )))) # (\soc_inst|interconnect_1|HREADY~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Rsqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mtqvx4~combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Askwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Askwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Askwx4~0 .lut_mask = 64'h00000000000CCCCC;
-defparam \soc_inst|m0_1|u_logic|Askwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .lut_mask = 64'h07F707F700F700F7;
+defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~8 (
+// Location: FF_X35_Y13_N19
+dffeas \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~8_combout  = ( \soc_inst|m0_1|u_logic|Askwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pikwx4~0_combout  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Askwx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|T6kwx4~7_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Askwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pikwx4~0_combout  & (\soc_inst|m0_1|u_logic|T6kwx4~7_combout  & ((\soc_inst|m0_1|u_logic|Askwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Fuhwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pikwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Askwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T6kwx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Askwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .lut_mask = 64'h002A002A00080008;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .lut_mask = 64'h1010101000000000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8kwx4~0 (
+// Location: MLABCELL_X39_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Xly2z4~q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Fuhwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8kwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .lut_mask = 64'h0000000007070707;
-defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .lut_mask = 64'hC0C00040C0C08040;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~4 (
+// Location: LABCELL_X40_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8kwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Lgkwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lgkwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|K0iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qem2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qem2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q8kwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K0iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .lut_mask = 64'hECECECECEC00EC00;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .lut_mask = 64'h0FFF0F000F880F00;
+defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~0 (
+// Location: LABCELL_X40_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0iwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mkkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O76wx4~combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & \soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|m0_1|u_logic|O76wx4~combout  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|K0iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|K0iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|G27wx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|K0iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K0iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K0iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .lut_mask = 64'h000A0C0E000A0C0E;
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .lut_mask = 64'h3333333302020202;
+defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hekwx4~0 (
+// Location: MLABCELL_X39_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hekwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & 
-// \soc_inst|m0_1|u_logic|My6wx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Fuhwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Pty2z4~q  & !\soc_inst|m0_1|u_logic|Qem2z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Qem2z4~q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Qem2z4~q ))) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qem2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q ) # (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hekwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .lut_mask = 64'h00500050F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .lut_mask = 64'hF805F005B8053005;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~2 (
+// Location: LABCELL_X40_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Keiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Keiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Fuhwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fuhwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (!\soc_inst|m0_1|u_logic|Fuhwx4~1_combout  & (!\soc_inst|m0_1|u_logic|K0iwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuhwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K0iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuhwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .lut_mask = 64'h00000000FFFFFCFF;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .lut_mask = 64'h0040004000000000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~3 (
+// Location: LABCELL_X40_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~3_combout  = ( \soc_inst|m0_1|u_logic|T6kwx4~2_combout  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) # ( \soc_inst|m0_1|u_logic|T6kwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Hekwx4~0_combout ) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Fuhwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Fuhwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fuhwx4~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|Xx2wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hekwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|T6kwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .lut_mask = 64'h0000FF3F0000FFFF;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .lut_mask = 64'h0FFF00003FFF0000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bbkwx4~0 (
+// Location: MLABCELL_X39_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xphwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bbkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|My6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qem2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|My6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Xphwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bbkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xphwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .lut_mask = 64'hF4F0F4F044004400;
-defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .lut_mask = 64'h0000000004040404;
+defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~1 (
+// Location: LABCELL_X40_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~1_combout  = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Iikwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & \soc_inst|m0_1|u_logic|Bbkwx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Iikwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & \soc_inst|m0_1|u_logic|Bbkwx4~0_combout )) # (\soc_inst|m0_1|u_logic|C2yvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Iikwx4~0_combout  & \soc_inst|m0_1|u_logic|C2yvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Icyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|U2x2z4~q 
+//  & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Icyvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bbkwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .lut_mask = 64'h1111111111F111F1;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .lut_mask = 64'hAAE2A0E0AAE2A0E0;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~5 (
+// Location: MLABCELL_X39_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|T6kwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T6kwx4~4_combout  & (\soc_inst|m0_1|u_logic|T6kwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qllwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U2x2z4~q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Qllwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|T6kwx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T6kwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .lut_mask = 64'h0031003100000000;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .lut_mask = 64'h444F444F44444444;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y4_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~0 (
+// Location: LABCELL_X33_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|X8kwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|X8kwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Pcyvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .lut_mask = 64'hAAAAAAAAAAA0AAA0;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .lut_mask = 64'h5050535300000303;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y5_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~6 (
+// Location: MLABCELL_X39_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Aekwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & (\soc_inst|m0_1|u_logic|T6kwx4~5_combout  & 
-// \soc_inst|m0_1|u_logic|T6kwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Aekwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout  & (\soc_inst|m0_1|u_logic|T6kwx4~5_combout  & \soc_inst|m0_1|u_logic|T6kwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rmhwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Rmhwx4~0_combout  & (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rmhwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Rmhwx4~0_combout  & !\soc_inst|m0_1|u_logic|Rmhwx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T6kwx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T6kwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rmhwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rmhwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .lut_mask = 64'h0005000500040004;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .lut_mask = 64'h4400440040004000;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ruhvx4~0 (
+// Location: LABCELL_X40_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ruhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|T6kwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fkkwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ) # (\soc_inst|m0_1|u_logic|Fkkwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|T6kwx4~6_combout  & ( 
-// (\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Rmhwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|G27wx4~2_combout ) # (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .lut_mask = 64'h7777777777077707;
-defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y7_N20
-dffeas \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .lut_mask = 64'h00000000FFAFFFAF;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9pvx4~0 (
+// Location: LABCELL_X43_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M9pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  )
+// \soc_inst|m0_1|u_logic|Rmhwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Xphwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Xphwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xphwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .lut_mask = 64'hFFFFFFFF0FAF0FAF;
-defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .lut_mask = 64'h00000000F0F0D0D0;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xdfwx4 (
+// Location: LABCELL_X42_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sjhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xdfwx4~combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Sjhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q 
+//  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|L8t2z4~q ) # (((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xdfwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xdfwx4 .lut_mask = 64'hFFFF000000000000;
-defparam \soc_inst|m0_1|u_logic|Xdfwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .lut_mask = 64'hAAFAFFFFAAFAEFFF;
+defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y12_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~0 (
+// Location: LABCELL_X42_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tghwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Thhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jux2z4~q  & ( \soc_inst|m0_1|u_logic|Add2~9_sumout  & ( (\soc_inst|m0_1|u_logic|S5pvx4~combout  & !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jux2z4~q  & 
-// ( \soc_inst|m0_1|u_logic|Add2~9_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jux2z4~q  & ( !\soc_inst|m0_1|u_logic|Add2~9_sumout  & ( 
-// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Tghwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & 
+// (((\soc_inst|m0_1|u_logic|Y6t2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add2~9_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Thhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tghwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .lut_mask = 64'h0F0F00005F5F5050;
-defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .lut_mask = 64'h1333133303030303;
+defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y9_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~1 (
+// Location: LABCELL_X40_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejhwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Thhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Thhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Thhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ejhwx4~combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Thhvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Thhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ejhwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .lut_mask = 64'hF0F00000A0A00000;
-defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ejhwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejhwx4 .lut_mask = 64'h0000000000C000C0;
+defparam \soc_inst|m0_1|u_logic|Ejhwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y9_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~2 (
+// Location: LABCELL_X40_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Thhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Thhvx4~1_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Thhvx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Thhvx4~1_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Thhvx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Y6t2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fij2z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Thhvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .lut_mask = 64'h3030303033333030;
-defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y9_N37
-dffeas \soc_inst|m0_1|u_logic|Jux2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jux2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jux2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jux2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .lut_mask = 64'h2222222200020002;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y11_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Msyvx4 (
+// Location: LABCELL_X40_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Msyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Rryvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|J0l2z4~q  & ( (!\soc_inst|m0_1|u_logic|Jux2z4~q  & (!\soc_inst|m0_1|u_logic|Omk2z4~q  & (\soc_inst|m0_1|u_logic|Pet2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Vvx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pet2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Msyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Msyvx4 .lut_mask = 64'h0800000000000000;
-defparam \soc_inst|m0_1|u_logic|Msyvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .lut_mask = 64'hDFDF5FDF00000000;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hvhwx4~0 (
+// Location: LABCELL_X40_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ejhwx4~combout  & ( \soc_inst|m0_1|u_logic|Ndhwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|I0hwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ejhwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .lut_mask = 64'hAAAAAAAA00000000;
-defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .lut_mask = 64'h00000000FEFE0000;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ubjwx4~0 (
+// Location: LABCELL_X42_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fghwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ubjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & !\soc_inst|m0_1|u_logic|Swy2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (((\soc_inst|m0_1|u_logic|Dvy2z4~q  & !\soc_inst|m0_1|u_logic|Swy2z4~q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+// \soc_inst|m0_1|u_logic|Fghwx4~combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & \soc_inst|m0_1|u_logic|B73wx4~combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fghwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .lut_mask = 64'h1311030000000000;
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fghwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fghwx4 .lut_mask = 64'h0000050500000000;
+defparam \soc_inst|m0_1|u_logic|Fghwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y3_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ubjwx4~1 (
+// Location: LABCELL_X40_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ubjwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ubjwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ndhwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Fghwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tghwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Xx2wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tghwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ndhwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fghwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ubjwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .lut_mask = 64'h555500005F5F0000;
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .lut_mask = 64'h0000CCC000000000;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3jwx4~0 (
+// Location: LABCELL_X40_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S3jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~q  & ((\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ndhwx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ndhwx4~3_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Sjhwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S3jwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .lut_mask = 64'h00000000004C004C;
-defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .lut_mask = 64'h000000004545FFFF;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2jwx4~0 (
+// Location: MLABCELL_X34_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X2jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S3jwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & !\soc_inst|m0_1|u_logic|Msyvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|S3jwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & (\soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & !\soc_inst|m0_1|u_logic|Msyvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~combout  = ( \soc_inst|m0_1|u_logic|Ndhwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ) # (\soc_inst|m0_1|u_logic|Hohwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ndhwx4~4_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S3jwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X2jwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .lut_mask = 64'h0500050015111511;
-defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4 .lut_mask = 64'hFFFFFFFFAA2AAA2A;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehjwx4~0 (
+// Location: FF_X34_Y14_N7
+dffeas \soc_inst|m0_1|u_logic|Fij2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fij2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fij2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vqfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ehjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Vqfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// (((\soc_inst|m0_1|u_logic|Ju5wx4~combout  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|M66wx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// \soc_inst|m0_1|u_logic|M66wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ehjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vqfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .lut_mask = 64'h0AFA0AFA05000500;
-defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .lut_mask = 64'h0055005530753075;
+defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ofjwx4~0 (
+// Location: LABCELL_X36_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ofjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q  & ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .lut_mask = 64'h0305030503010301;
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .lut_mask = 64'hA0A0AAAAA0A08888;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhjwx4~0 (
+// Location: LABCELL_X36_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lhjwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wdqvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .lut_mask = 64'h0050005000000000;
-defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .lut_mask = 64'h080808080A2A0A2A;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ofjwx4~1 (
+// Location: LABCELL_X36_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zlfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ofjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhjwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Lhjwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (((\soc_inst|m0_1|u_logic|Nkpvx4~0_combout 
-//  & !\soc_inst|m0_1|u_logic|Ehjwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Zlfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (((\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Ukpvx4~combout ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ehjwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zlfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .lut_mask = 64'h1033103333333333;
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .lut_mask = 64'h0303030303AB03AB;
+defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~6 (
+// Location: LABCELL_X36_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Ofjwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout  & (!\soc_inst|m0_1|u_logic|X2jwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zlfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Qdj2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Howvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zlfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X2jwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zlfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .lut_mask = 64'hC800C80000000000;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .lut_mask = 64'hAAA0000088800000;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q2jwx4~0 (
+// Location: LABCELL_X37_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q2jwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((((\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ))) ) ) 
-// # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( ((((\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Lsfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q2jwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .lut_mask = 64'hAFFF3FFFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .lut_mask = 64'h000000000505CDCD;
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iyiwx4~0 (
+// Location: LABCELL_X37_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Infwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iyiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Infwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iyiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Infwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .lut_mask = 64'h0A000A000F050F05;
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Infwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Infwx4~0 .lut_mask = 64'h2020000020200A00;
+defparam \soc_inst|m0_1|u_logic|Infwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iyiwx4~1 (
+// Location: LABCELL_X37_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iyiwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Iyiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Iyiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Iyiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U2x2z4~q ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Lsfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (((!\soc_inst|m0_1|u_logic|Qdj2z4~q ) # (\soc_inst|m0_1|u_logic|Qem2z4~q )) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~q ) # (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Iyiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .lut_mask = 64'hD0D05050C0C00000;
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .lut_mask = 64'h5514551455155515;
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~0 (
+// Location: LABCELL_X37_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Iyiwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Emewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Lsfwx4~1_combout  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lsfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Infwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lsfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Infwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lsfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Infwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Infwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .lut_mask = 64'h0000000F5555555F;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .lut_mask = 64'hFAFAFAFAC8C80000;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~1 (
+// Location: LABCELL_X36_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Zzfwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ajfwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Ajfwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ucqvx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ajfwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ajfwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .lut_mask = 64'h0030003002320232;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .lut_mask = 64'h000000000F0C0F0C;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eajwx4~0 (
+// Location: LABCELL_X36_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eajwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ajfwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Ajfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ajfwx4~4_combout  & ( \soc_inst|m0_1|u_logic|Ajfwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ajfwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ajfwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eajwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .lut_mask = 64'h1111111105050505;
-defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .lut_mask = 64'h0000000000FF00FC;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y7_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9jwx4~0 (
+// Location: LABCELL_X40_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q9jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eajwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Eajwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Eajwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Pcyvx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|B1gwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Eajwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q9jwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B1gwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .lut_mask = 64'h0000555550505555;
-defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .lut_mask = 64'h0000050503030303;
+defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~2 (
+// Location: MLABCELL_X39_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K2gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~2_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((\soc_inst|m0_1|u_logic|O5t2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # ((\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & 
-// ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|K2gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  
+// $ (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Pty2z4~q ) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K2gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .lut_mask = 64'h0000262600F326F7;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .lut_mask = 64'h0000331184118411;
+defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~3 (
+// Location: LABCELL_X40_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|B1gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W28wx4~0_combout  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W28wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Icyvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W28wx4~0_combout  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B1gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .lut_mask = 64'hF300F300FF003300;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .lut_mask = 64'h0A0A0A0A0A0AFFFF;
+defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~4 (
+// Location: LABCELL_X40_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Q9jwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lwiwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Q2jwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lwiwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Lwiwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|B1gwx4~2_combout  = ( \soc_inst|m0_1|u_logic|K2gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B1gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qdj2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|K2gwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|B1gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qdj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|K2gwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B1gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B1gwx4~1_combout  & \soc_inst|m0_1|u_logic|Qdj2z4~q 
+// ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K2gwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B1gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & ((\soc_inst|m0_1|u_logic|B1gwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Q2jwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lwiwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Q9jwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lwiwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B1gwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|K2gwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B1gwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B1gwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .lut_mask = 64'h0000000030000000;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .lut_mask = 64'h070703030F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7jwx4 (
+// Location: LABCELL_X37_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L6gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T7jwx4~combout  = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|L6gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Akewx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Akewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T7jwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|L6gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T7jwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T7jwx4 .lut_mask = 64'h0000000000005055;
-defparam \soc_inst|m0_1|u_logic|T7jwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .lut_mask = 64'h0A00FFFF0A00FFFF;
+defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6jwx4~0 (
+// Location: LABCELL_X36_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Rvfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6jwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .lut_mask = 64'h030300000B0B0808;
-defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .lut_mask = 64'hF0FFF0FFA0FFA0FF;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6fwx4~0 (
+// Location: LABCELL_X42_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Rvfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|G9w2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (!\soc_inst|m0_1|u_logic|G9w2z4~q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .lut_mask = 64'hFAFAFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .lut_mask = 64'hFFFFAAAAFCFCA8A8;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6fwx4~1 (
+// Location: LABCELL_X37_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ( \soc_inst|m0_1|u_logic|Q6fwx4~0_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Rvfwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Rvfwx4~1_combout  & (\soc_inst|m0_1|u_logic|Rvfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~q ))))) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( ((\soc_inst|m0_1|u_logic|Rvfwx4~1_combout  & (\soc_inst|m0_1|u_logic|Rvfwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|L6gwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q6fwx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L6gwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rvfwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .lut_mask = 64'h0000000055540000;
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .lut_mask = 64'h0000000000FB00F3;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y6_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~5 (
+// Location: LABCELL_X37_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~5_combout  = ( \soc_inst|m0_1|u_logic|R6jwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lwiwx4~4_combout  & (!\soc_inst|m0_1|u_logic|T7jwx4~combout  & 
-// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|R6jwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lwiwx4~4_combout  & !\soc_inst|m0_1|u_logic|T7jwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Rvfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rvfwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rvfwx4~4_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lwiwx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|T7jwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|R6jwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .lut_mask = 64'h0000000044440404;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .lut_mask = 64'h00000000FFFFFEFE;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pyiwx4~0 (
+// Location: LABCELL_X42_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cyfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pyiwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # (!\soc_inst|m0_1|u_logic|Xly2z4~q )))) ) 
-// )
+// \soc_inst|m0_1|u_logic|Cyfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cyfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .lut_mask = 64'h0C080C0800000000;
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .lut_mask = 64'h0A0A0A0A0A0F0A0F;
+defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pyiwx4~1 (
+// Location: MLABCELL_X39_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pyiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Pyiwx4~0_combout  & \soc_inst|m0_1|u_logic|Wvewx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|E6gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E6gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .lut_mask = 64'h0030003033333333;
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .lut_mask = 64'hC0CCC0CCCCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fvhvx4~0 (
+// Location: MLABCELL_X39_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6gwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fvhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pyiwx4~1_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pyiwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ) # (!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ) # ((!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout )))) ) )
+// \soc_inst|m0_1|u_logic|E6gwx4~1_combout  = ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( (!\soc_inst|m0_1|u_logic|E6gwx4~0_combout  & \soc_inst|m0_1|u_logic|Howvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E6gwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|S4w2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|E6gwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .lut_mask = 64'h5F4C5F4C5F5F5F5F;
-defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y7_N47
-dffeas \soc_inst|m0_1|u_logic|Npk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Npk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Npk2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y3_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y8pvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E6gwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .lut_mask = 64'hFFFFF3F300000000;
-defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .lut_mask = 64'h00F400F400F000F0;
+defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ipsvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ipsvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+// Location: LABCELL_X29_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9gwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  
+// & ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  $ (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y9gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .lut_mask = 64'hA5A5A0A051515050;
+defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~1 (
+// Location: LABCELL_X29_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Scpvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( (\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & \soc_inst|m0_1|u_logic|Bpsvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|K9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # 
+// ((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Y9gwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Scpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K9gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .lut_mask = 64'h0003000300000000;
-defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .lut_mask = 64'h0000FF21FF21FF21;
+defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~2 (
+// Location: LABCELL_X29_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ccgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Scpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout  & (((\soc_inst|interconnect_1|HREADY~0_combout  & 
-// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Scpvx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ccgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Xly2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~1_combout ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ccgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .lut_mask = 64'h0000222A00000000;
-defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .lut_mask = 64'h00000000FFFCFFFC;
+defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfovx4 (
+// Location: LABCELL_X29_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wfovx4~combout  = ( \soc_inst|m0_1|u_logic|Jhy2z4~q  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|D9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ccgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K9gwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ccgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K9gwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Qem2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|K9gwx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ccgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wfovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wfovx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Wfovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .lut_mask = 64'h0000F8F80000F0F0;
+defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvqvx4~0 (
+// Location: LABCELL_X40_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jvqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hxx2z4~q  & (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Rvfwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|D9gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1gwx4~2_combout  & (\soc_inst|m0_1|u_logic|Rvfwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Cyfwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|E6gwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B1gwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rvfwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cyfwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E6gwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D9gwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jvqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .lut_mask = 64'h0000000000A000A0;
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .lut_mask = 64'h2000200000000000;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y4_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jnrvx4~0 (
+// Location: LABCELL_X33_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jnrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvqvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Wfovx4~combout  & \soc_inst|m0_1|u_logic|Jhy2z4~q )) # (\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~combout  = ( \soc_inst|m0_1|u_logic|Rvfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Vqfwx4~0_combout  & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rvfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Vqfwx4~0_combout  & \soc_inst|m0_1|u_logic|Emi2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vqfwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jnrvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .lut_mask = 64'h000000000FCF0FCF;
-defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4 .lut_mask = 64'hFFF1FFF1FF11FF11;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y4_N28
-dffeas \soc_inst|m0_1|u_logic|Jhy2z4 (
+// Location: FF_X33_Y14_N53
+dffeas \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jnrvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jhy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jhy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pfovx4~0 (
+// Location: LABCELL_X19_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qr42z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pfovx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vaw2z4~q  & (((!\soc_inst|m0_1|u_logic|Jhy2z4~q  & !\soc_inst|m0_1|u_logic|Fcj2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Hxx2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Vaw2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Qr42z4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & 
+// ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
+// ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qr42z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .lut_mask = 64'h00000000FF008F00;
-defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .lut_mask = 64'hFF030000FF000033;
+defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y7_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ynhvx4~0 (
+// Location: LABCELL_X19_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qr42z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ynhvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( \soc_inst|interconnect_1|HRDATA[29]~0_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( \soc_inst|interconnect_1|HRDATA[29]~0_combout  ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( !\soc_inst|interconnect_1|HRDATA[29]~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( !\soc_inst|interconnect_1|HRDATA[29]~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qr42z4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qr42z4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qr42z4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ynhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .lut_mask = 64'hAFAFAFAFFFFFAAAA;
-defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .lut_mask = 64'h0000FF00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y7_N52
-dffeas \soc_inst|m0_1|u_logic|Itw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ynhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Itw2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X37_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6qvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I6qvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|T50wx4~0_combout  & (\soc_inst|m0_1|u_logic|U5qvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|U5qvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ))))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|I6qvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Itw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Itw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .lut_mask = 64'h000800C8000C00CC;
+defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcsvx4~0 (
+// Location: LABCELL_X35_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nfnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[29]~0_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout  & 
-// ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ))) ) )
+// \soc_inst|m0_1|u_logic|Nfnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6qvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|I6qvx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|A4t2z4~q ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I6qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcsvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .lut_mask = 64'h000000008D8D8D8D;
-defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .lut_mask = 64'h00F000F0FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5nvx4~0 (
+// Location: FF_X35_Y13_N2
+dffeas \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Akewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[10]~12_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[10]~12_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Akewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (((!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Emewx4~0_combout ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H5nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Akewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .lut_mask = 64'h30203020F0A0F0A0;
-defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Akewx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Akewx4~1 .lut_mask = 64'hFFFFFFFFEFFF4555;
+defparam \soc_inst|m0_1|u_logic|Akewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5nvx4~1 (
+// Location: LABCELL_X35_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yiewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H5nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # ((\soc_inst|m0_1|u_logic|M9y2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & (\soc_inst|m0_1|u_logic|Itw2z4~q  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|M9y2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Yiewx4~0_combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Akewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Akewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O76wx4~combout  & ((!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Itw2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H5nvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Akewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H5nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yiewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .lut_mask = 64'h000000008CAF8CAF;
-defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y9_N25
-dffeas \soc_inst|m0_1|u_logic|Dvy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H5nvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dvy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dvy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .lut_mask = 64'h00000000A2A2F3F3;
+defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y6_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~0 (
+// Location: LABCELL_X35_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lgkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G27wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Lgkwx4~0_combout  = (\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Pcyvx4~combout )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G27wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G27wx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|G27wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Blwvx4~0 (
+// Location: LABCELL_X35_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Blwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Unewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & \soc_inst|m0_1|u_logic|Dj6wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Unewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .lut_mask = 64'hAAAAAAAA00000000;
-defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Unewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Unewx4~0 .lut_mask = 64'h0000000055555D5D;
+defparam \soc_inst|m0_1|u_logic|Unewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y3_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~0 (
+// Location: LABCELL_X35_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rngwx4~combout  & ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rngwx4~combout  & ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Unewx4~combout  = ( !\soc_inst|m0_1|u_logic|Unewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Unewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Unewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .lut_mask = 64'h0005000522270005;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Unewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Unewx4 .lut_mask = 64'hAFFFAFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Unewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y5_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~1 (
+// Location: MLABCELL_X39_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sfewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pw6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Pw6wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|A76wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Sfewx4~0_combout  = (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pw6wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sfewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .lut_mask = 64'h88CC0000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .lut_mask = 64'h00DD00DD00DD00DD;
+defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~2 (
+// Location: MLABCELL_X39_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sfewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3ivx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Sfewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Px5wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Pty2z4~q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Sfewx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sfewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H3ivx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sfewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .lut_mask = 64'hFFFCFFFC00000000;
-defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .lut_mask = 64'h7F4F7F4F00000000;
+defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~3 (
+// Location: LABCELL_X33_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jeewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3ivx4~3_combout  = ( \soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( \soc_inst|m0_1|u_logic|H3ivx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( \soc_inst|m0_1|u_logic|H3ivx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Jeewx4~combout  = ( !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zcn2z4~q  & !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3ivx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H3ivx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jeewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .lut_mask = 64'h00000000FFFFF3F3;
-defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jeewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jeewx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Jeewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y4_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ws3wx4~0 (
+// Location: LABCELL_X36_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fcewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ws3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Fcewx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9w2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (((\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G9w2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|G9w2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G9w2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fcewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .lut_mask = 64'h0C0CAEAE0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .lut_mask = 64'hFF222222FF2A222A;
+defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y8_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~0 (
+// Location: LABCELL_X36_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fcewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Q77wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Fcewx4~1_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Fcewx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Jeewx4~combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Fcewx4~0_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jeewx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fcewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H3ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fcewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .lut_mask = 64'h0000000003000300;
-defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .lut_mask = 64'hFFFFF7F700000000;
+defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~0 (
+// Location: LABCELL_X35_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Owgvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q ) # ((\soc_inst|m0_1|u_logic|Imvvx4~0_combout  & !\soc_inst|m0_1|u_logic|Wbk2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Owgvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imvvx4~0_combout  & !\soc_inst|m0_1|u_logic|Wbk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|H3ivx4~2_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & !\soc_inst|m0_1|u_logic|Ucqvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H3ivx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .lut_mask = 64'h0F000F00CFCCCFCC;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .lut_mask = 64'hAAAAAAAAAAAAA0A0;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~2 (
+// Location: LABCELL_X31_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Gzhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wuq2z4~q ) # ((\soc_inst|m0_1|u_logic|Ynvvx4~combout  & !\soc_inst|m0_1|u_logic|Hzj2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Gzhvx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|Ynvvx4~combout  & !\soc_inst|m0_1|u_logic|Hzj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|H3ivx4~3_combout  = ( \soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ps3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|H3ivx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ps3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|H3ivx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H3ivx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|H3ivx4~2_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wuq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H3ivx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H3ivx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .lut_mask = 64'h0F000F00CFCCCFCC;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .lut_mask = 64'h3333303033333333;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~3 (
+// Location: LABCELL_X31_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Uzhvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ble3z4~q  & (!\soc_inst|m0_1|u_logic|Av3wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ipn2z4~q )))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Uzhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ipn2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|H3ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout  & \soc_inst|m0_1|u_logic|Q77wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Av3wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H3ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .lut_mask = 64'hF030F03050105010;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .lut_mask = 64'h00000000000000CC;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~4 (
+// Location: LABCELL_X27_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~3_combout  & ( \soc_inst|m0_1|u_logic|P0ivx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|I0ivx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Y9l2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Av3wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|P0ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y9l2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Owgvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wbk2z4~q ) # (!\soc_inst|m0_1|u_logic|Ywi2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Owgvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ywi2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Owgvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wbk2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Av3wx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .lut_mask = 64'h0000F3F300005151;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .lut_mask = 64'h0000AAAACCCCEEEE;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y10_N9
+// Location: LABCELL_X24_Y21_N54
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|R1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ipb3z4~q ) # ((\soc_inst|m0_1|u_logic|W0ivx4~0_combout  & !\soc_inst|m0_1|u_logic|X0c3z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R1ivx4~0_combout  & ( (\soc_inst|m0_1|u_logic|W0ivx4~0_combout  & !\soc_inst|m0_1|u_logic|X0c3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|W0ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X0c3z4~q ) # ((!\soc_inst|m0_1|u_logic|Ipb3z4~q  & \soc_inst|m0_1|u_logic|R1ivx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|W0ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ipb3z4~q  & \soc_inst|m0_1|u_logic|R1ivx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -106424,15 +106945,15 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~1 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .lut_mask = 64'h0F000F00AFAAAFAA;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .lut_mask = 64'h00F000F0CCFCCCFC;
 defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y13_N19
-dffeas \soc_inst|m0_1|u_logic|Vac3z4 (
+// Location: FF_X25_Y19_N31
+dffeas \soc_inst|m0_1|u_logic|Gxk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -106440,23 +106961,48 @@ dffeas \soc_inst|m0_1|u_logic|Vac3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gxk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vac3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vac3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gxk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gxk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N54
+// Location: MLABCELL_X25_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|T2ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gxk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Pxb3z4~q  & \soc_inst|m0_1|u_logic|F2ivx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T2ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pxb3z4~q  & \soc_inst|m0_1|u_logic|F2ivx4~0_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y18_N27
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Y1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hub3z4~q ) # ((!\soc_inst|m0_1|u_logic|Vac3z4~q  & \soc_inst|m0_1|u_logic|M2ivx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vac3z4~q  & \soc_inst|m0_1|u_logic|M2ivx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Y1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hub3z4~q ) # ((\soc_inst|m0_1|u_logic|M2ivx4~0_combout  & !\soc_inst|m0_1|u_logic|Vac3z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y1ivx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M2ivx4~0_combout  & !\soc_inst|m0_1|u_logic|Vac3z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
 	.datag(gnd),
@@ -106468,20 +107014,20 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~6 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .lut_mask = 64'h00F000F0CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .lut_mask = 64'h55005500F5F0F5F0;
 defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N45
+// Location: MLABCELL_X25_Y18_N30
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~7_combout  = ( \soc_inst|m0_1|u_logic|K1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|F4c3z4~q  & \soc_inst|m0_1|u_logic|D1ivx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|K1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|F4c3z4~q  & \soc_inst|m0_1|u_logic|D1ivx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~7_combout  = ( \soc_inst|m0_1|u_logic|K1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N7c3z4~q ) # ((\soc_inst|m0_1|u_logic|D1ivx4~0_combout  & !\soc_inst|m0_1|u_logic|F4c3z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|K1ivx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D1ivx4~0_combout  & !\soc_inst|m0_1|u_logic|F4c3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
 	.datag(gnd),
@@ -106493,20 +107039,20 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~7 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .lut_mask = 64'h0F000F00CFCCCFCC;
 defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N57
+// Location: MLABCELL_X25_Y18_N33
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Syhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~6_combout  & (\soc_inst|m0_1|u_logic|Lul2z4~q  & !\soc_inst|m0_1|u_logic|Av3wx4~7_combout )) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Av3wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Syhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~6_combout  & (!\soc_inst|m0_1|u_logic|Av3wx4~7_combout  & \soc_inst|m0_1|u_logic|Lul2z4~q )) ) ) # ( 
 // !\soc_inst|m0_1|u_logic|Syhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~6_combout  & !\soc_inst|m0_1|u_logic|Av3wx4~7_combout ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Av3wx4~6_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Av3wx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Av3wx4~7_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
 	.datag(gnd),
@@ -106518,46 +107064,21 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~8 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .lut_mask = 64'hAA00AA000A000A00;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|T2ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gxk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Pxb3z4~q  & \soc_inst|m0_1|u_logic|F2ivx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|T2ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pxb3z4~q  & \soc_inst|m0_1|u_logic|F2ivx4~0_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .lut_mask = 64'hA0A0A0A000A000A0;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y12_N6
+// Location: MLABCELL_X25_Y18_N24
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~9_combout  = ( !\soc_inst|m0_1|u_logic|Av3wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Av3wx4~8_combout  & ((!\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oar2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~5_combout  & ((!\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Av3wx4~8_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Av3wx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -106567,72 +107088,72 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~9 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .lut_mask = 64'h00F300F300000000;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .lut_mask = 64'h00000000CC0CCC0C;
 defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~3 (
+// Location: MLABCELL_X28_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & (!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & (!\soc_inst|m0_1|u_logic|hwdata_o~18_combout  & 
-// !\soc_inst|m0_1|u_logic|hwdata_o~10_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  & (\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  & (\soc_inst|m0_1|u_logic|O24wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .lut_mask = 64'h4000400000000000;
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y10_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~2 (
+// Location: MLABCELL_X28_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  & (\soc_inst|m0_1|u_logic|O24wx4~0_combout  & (\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  & 
-// \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & (!\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & (\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & 
+// !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .lut_mask = 64'h0000000000010001;
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .lut_mask = 64'h0800080000000000;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N18
+// Location: MLABCELL_X28_Y18_N18
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ny3wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ny3wx4~3_combout  & (!\soc_inst|m0_1|u_logic|hwdata_o~2_combout  & 
-// !\soc_inst|m0_1|u_logic|V4ovx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o~2_combout  & ( (!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & (!\soc_inst|m0_1|u_logic|V4ovx4~0_combout  & (\soc_inst|m0_1|u_logic|Ny3wx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Ny3wx4~3_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ny3wx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ny3wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ny3wx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -106642,21 +107163,21 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~4 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .lut_mask = 64'h0000000050000000;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .lut_mask = 64'h0008000800000000;
 defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N24
+// Location: MLABCELL_X28_Y18_N6
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ( \soc_inst|m0_1|u_logic|Ny3wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Ny3wx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ny3wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Ny3wx4~1_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
+	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -106667,21 +107188,21 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~5 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .lut_mask = 64'h00000000FFC00000;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .lut_mask = 64'h00000000E0A0E0A0;
 defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N6
+// Location: MLABCELL_X28_Y18_N0
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~10_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Ny3wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rym2z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Av3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Ny3wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rym2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~10_combout  = ( \soc_inst|m0_1|u_logic|Ny3wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Av3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rym2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ny3wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Av3wx4~9_combout  & (!\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rym2z4~q )))) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Av3wx4~9_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Av3wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
+	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -106692,22 +107213,117 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~10 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .lut_mask = 64'h0000C4C40000F5F5;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .lut_mask = 64'h3010301033113311;
 defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~11 (
+// Location: FF_X27_Y17_N56
+dffeas \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~11_combout  = ( !\soc_inst|m0_1|u_logic|Av3wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Av3wx4~10_combout  & ( (\soc_inst|m0_1|u_logic|Av3wx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Uyv2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ynvvx4~combout  & ( \soc_inst|m0_1|u_logic|Gzhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ynvvx4~combout  & ( \soc_inst|m0_1|u_logic|Gzhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ynvvx4~combout  & ( !\soc_inst|m0_1|u_logic|Gzhvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Av3wx4~4_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Av3wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~10_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .lut_mask = 64'h0000CCCCF0F0FCFC;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Av3wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B0ivx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ble3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|B0ivx4~0_combout  & (\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ble3z4~q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .lut_mask = 64'hB0BBB0BB00000000;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|I0ivx4~0_combout  & (((!\soc_inst|m0_1|u_logic|P0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|T8f3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|I0ivx4~0_combout  & (\soc_inst|m0_1|u_logic|Y9l2z4~q  & ((!\soc_inst|m0_1|u_logic|P0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|T8f3z4~q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .lut_mask = 64'h00000000BB0BBB0B;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~11 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~11_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~1_combout  & (\soc_inst|m0_1|u_logic|Av3wx4~10_combout  & ((!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Uyv2z4~q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Av3wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Av3wx4~10_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -106717,22 +107333,21 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~11 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .lut_mask = 64'h000000000B0B0000;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .lut_mask = 64'h0000000000C400C4;
 defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N30
+// Location: MLABCELL_X28_Y18_N48
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3ivx4~1_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Av3wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( (!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout  & (!\soc_inst|m0_1|u_logic|U7w2z4~q  & \soc_inst|m0_1|u_logic|Adt2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Av3wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Av3wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|H3ivx4~1_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( (\soc_inst|m0_1|u_logic|Adt2z4~q  & (((!\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Q5vvx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Av3wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Adt2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Av3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Adt2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Av3wx4~0_combout ),
+	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~11_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -106743,11 +107358,11 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~1 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .lut_mask = 64'h00FF00FF00C000FF;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .lut_mask = 64'h3333333320332033;
 defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y10_N42
+// Location: LABCELL_X29_Y18_N18
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~4 (
 // Equation(s):
 // \soc_inst|m0_1|u_logic|H3ivx4~4_combout  = ( \soc_inst|m0_1|u_logic|H3ivx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|H3ivx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gji2z4~q )) # (\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ) ) ) # ( 
@@ -106773,7 +107388,7 @@ defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .lut_mask = 64'hAAF3AAF3FFF3FFF3;
 defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y10_N44
+// Location: FF_X29_Y18_N19
 dffeas \soc_inst|m0_1|u_logic|Gji2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|H3ivx4~4_combout ),
@@ -106792,195 +107407,145 @@ defparam \soc_inst|m0_1|u_logic|Gji2z4 .is_wysiwyg = "true";
 defparam \soc_inst|m0_1|u_logic|Gji2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lfewx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Lfewx4~combout  = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lfewx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lfewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lfewx4 .lut_mask = 64'h00000000FFF5FFF5;
-defparam \soc_inst|m0_1|u_logic|Lfewx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y4_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~2_combout  = ( \soc_inst|m0_1|u_logic|My6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lfewx4~combout  & ( !\soc_inst|m0_1|u_logic|Vskwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|My6wx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Lfewx4~combout  & ( (!\soc_inst|m0_1|u_logic|My6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lfewx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .lut_mask = 64'hFFEFCCCC00000000;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y4_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~3 (
+// Location: LABCELL_X37_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pw6wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Pw6wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Gji2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pw6wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Pw6wx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Rngwx4~combout  & (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pw6wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gji2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .lut_mask = 64'h0000000033333131;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .lut_mask = 64'h02000200020002FF;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fcewx4~0 (
+// Location: LABCELL_X30_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fcewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ark2z4~q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|G9w2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|G9w2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (((!\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|G9w2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|G9w2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|G9w2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|G9w2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pw6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A76wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pw6wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & !\soc_inst|m0_1|u_logic|A76wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fcewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .lut_mask = 64'hC0EAC0EAC0EAE2EA;
-defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .lut_mask = 64'hF333FF3300000000;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y8_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fcewx4~1 (
+// Location: LABCELL_X35_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lfewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fcewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Fcewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fcewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Jeewx4~combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Lfewx4~combout  = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jeewx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fcewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fcewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lfewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .lut_mask = 64'hEF00FF00EF00FF00;
-defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lfewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lfewx4 .lut_mask = 64'h00000000FFF5FFF5;
+defparam \soc_inst|m0_1|u_logic|Lfewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sfewx4~0 (
+// Location: LABCELL_X35_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sfewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~2_combout  = ( \soc_inst|m0_1|u_logic|My6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lfewx4~combout  & ( !\soc_inst|m0_1|u_logic|Vskwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|My6wx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Lfewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|My6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lfewx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sfewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .lut_mask = 64'h00000000DDDDDDDD;
-defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .lut_mask = 64'hFFEFAAAA00000000;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sfewx4~1 (
+// Location: LABCELL_X30_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sfewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Px5wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Sfewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Pw6wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Pw6wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gji2z4~q ) # (\soc_inst|m0_1|u_logic|Emi2z4~q 
+// )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sfewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gji2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pw6wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sfewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .lut_mask = 64'h5CFF5CFF00000000;
-defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .lut_mask = 64'h000000000E0F0E0F;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y4_N48
+// Location: LABCELL_X35_Y19_N6
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Sfewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Unewx4~combout  & (\soc_inst|m0_1|u_logic|Pw6wx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # 
+// \soc_inst|m0_1|u_logic|Pw6wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Pw6wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Unewx4~combout  & (!\soc_inst|m0_1|u_logic|Sfewx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # 
 // (\soc_inst|m0_1|u_logic|Fcewx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Unewx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pw6wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fcewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Unewx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sfewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fcewx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sfewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -106990,73 +107555,22 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~4 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .lut_mask = 64'h1101110100000000;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .lut_mask = 64'h0000000020302030;
 defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y4_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Akewx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Akewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (((!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # 
-// ((\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Emewx4~0_combout ))))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Akewx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Akewx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Akewx4~1 .lut_mask = 64'hFFFFFFFFEFFF2333;
-defparam \soc_inst|m0_1|u_logic|Akewx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yiewx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yiewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Akewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O76wx4~combout ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Akewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O76wx4~combout ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Akewx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yiewx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .lut_mask = 64'h00000000CC44FF55;
-defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y4_N36
+// Location: LABCELL_X35_Y19_N42
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yiewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pw6wx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Itgwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yiewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pw6wx4~4_combout  & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Itgwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Pw6wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Yiewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & (\soc_inst|m0_1|u_logic|Itgwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Yiewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pw6wx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datac(!\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yiewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yiewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -107066,22 +107580,21 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~5 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .lut_mask = 64'h0045004545454545;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .lut_mask = 64'h0000000023AF23AF;
 defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y7_N30
+// Location: LABCELL_X35_Y13_N42
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vz6wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vz6wx4~combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|P28wx4~combout  & \soc_inst|m0_1|u_logic|Ad7wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P28wx4~combout ) # (!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Vz6wx4~combout  = ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  $ (((\soc_inst|m0_1|u_logic|Ad7wx4~0_combout  & \soc_inst|m0_1|u_logic|P28wx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bsy2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P28wx4~combout ),
-	.datab(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datac(!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|P28wx4~combout ),
+	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -107092,21 +107605,22 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vz6wx4 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Vz6wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vz6wx4 .lut_mask = 64'h0000FFFFFAFA0505;
+defparam \soc_inst|m0_1|u_logic|Vz6wx4 .lut_mask = 64'h33333333CCC3CCC3;
 defparam \soc_inst|m0_1|u_logic|Vz6wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N0
+// Location: LABCELL_X35_Y13_N15
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~combout  = ( \soc_inst|m0_1|u_logic|Vz6wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ) # ((!\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & !\soc_inst|m0_1|u_logic|A4t2z4~q 
-// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Vz6wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pw6wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~combout  = ( \soc_inst|m0_1|u_logic|Blwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vz6wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pw6wx4~5_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Vz6wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ) # ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wpkwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Blwvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Vz6wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pw6wx4~5_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vz6wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pw6wx4~5_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ),
-	.datae(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
 	.dataf(!\soc_inst|m0_1|u_logic|Vz6wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -107117,12 +107631,12 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Pw6wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4 .lut_mask = 64'hFF00FF00FF20FF20;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4 .lut_mask = 64'hF0F0F0F0F0FAF0F0;
 defparam \soc_inst|m0_1|u_logic|Pw6wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y7_N2
-dffeas \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE (
+// Location: FF_X35_Y13_N16
+dffeas \soc_inst|m0_1|u_logic|Tki2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
 	.asdata(vcc),
@@ -107133,1562 +107647,1524 @@ dffeas \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE (
 	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tki2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tki2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pcyvx4 (
+// Location: LABCELL_X30_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qbpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pcyvx4~combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pcyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pcyvx4 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Pcyvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X35_Y7_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duc2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .lut_mask = 64'hFFFBFFFB00000000;
-defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y7_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Y1d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .lut_mask = 64'h0044004420642064;
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Y1d2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Npk2z4~q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .lut_mask = 64'h32333233FAC0FAC0;
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y7_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Y1d2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Y1d2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y1d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (!\soc_inst|m0_1|u_logic|Nsk2z4~q 
-// )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y1d2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y1d2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .lut_mask = 64'h00000000C080C080;
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .lut_mask = 64'h0000000000AA0000;
+defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K1wvx4 (
+// Location: LABCELL_X31_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dnhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K1wvx4~combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Dnhvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( (!\soc_inst|interconnect_1|HRDATA[29]~0_combout ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K1wvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K1wvx4 .lut_mask = 64'hFE00FE00FC00FC00;
-defparam \soc_inst|m0_1|u_logic|K1wvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X19_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o~1_combout  = ( \soc_inst|m0_1|u_logic|Add3~5_sumout  & ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~5_sumout  & ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~5_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~5_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~5_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dnhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o~1 .lut_mask = 64'h00F033F355F577F7;
-defparam \soc_inst|m0_1|u_logic|haddr_o~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .lut_mask = 64'hFFFFFFFFFFCCFFCC;
+defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y5_N42
-cyclonev_lcell_comb \soc_inst|interconnect_1|LessThan1~0 (
-// Equation(s):
-// \soc_inst|interconnect_1|LessThan1~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (\soc_inst|m0_1|u_logic|haddr_o~1_combout  & !\soc_inst|m0_1|u_logic|V2qvx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|haddr_o [29] & ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  ) ) # ( 
-// !\soc_inst|m0_1|u_logic|haddr_o [29] & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|haddr_o [29]),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|LessThan1~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y17_N19
+dffeas \soc_inst|m0_1|u_logic|Byw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dnhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Byw2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|LessThan1~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|LessThan1~0 .lut_mask = 64'hFFFFFFFF0F0F0F00;
-defparam \soc_inst|interconnect_1|LessThan1~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Byw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Byw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y5_N51
-cyclonev_lcell_comb \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 (
+// Location: LABCELL_X31_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~1 (
 // Equation(s):
-// \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout  = ( \soc_inst|interconnect_1|LessThan0~0_combout  & ( \soc_inst|interconnect_1|LessThan1~0_combout  ) ) # ( !\soc_inst|interconnect_1|LessThan0~0_combout  & ( 
-// !\soc_inst|interconnect_1|LessThan1~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ajnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Byw2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bdm2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Byw2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Bdm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wfovx4~combout )) # (\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|LessThan1~0_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Byw2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .lut_mask = 64'hF0F0F0F00F0F0F0F;
-defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X19_Y5_N29
-dffeas \soc_inst|interconnect_1|mux_sel[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|interconnect_1|mux_sel [1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|interconnect_1|mux_sel[1] .is_wysiwyg = "true";
-defparam \soc_inst|interconnect_1|mux_sel[1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .lut_mask = 64'h55F555F500F000F0;
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N48
-cyclonev_lcell_comb \soc_inst|interconnect_1|HREADY~0 (
+// Location: LABCELL_X31_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HREADY~0_combout  = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( ((!\soc_inst|interconnect_1|mux_sel [0]) # (\soc_inst|interconnect_1|mux_sel [2])) # (\soc_inst|interconnect_1|mux_sel [1]) ) ) # ( 
-// !\soc_inst|ram_1|write_cycle~DUPLICATE_q  )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
+// \soc_inst|m0_1|u_logic|Ajnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout )) # (\soc_inst|interconnect_1|HRDATA[13]~27_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HREADY~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HREADY~0 .lut_mask = 64'hFFFFFFFFFF3FFF3F;
-defparam \soc_inst|interconnect_1|HREADY~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .lut_mask = 64'hA0A0A0A0A0FFA0FF;
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y4_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cdnvx4~0 (
+// Location: LABCELL_X31_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|Mtqvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Rsqvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) # (\soc_inst|interconnect_1|HREADY~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Mtqvx4~combout ) # (\soc_inst|m0_1|u_logic|Rsqvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ajnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ajnvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ajnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout ) # 
+// (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 )) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ajnvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ajnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .lut_mask = 64'h2777277723332333;
-defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .lut_mask = 64'hFEFE000000000000;
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y6_N35
-dffeas \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE (
+// Location: FF_X31_Y17_N7
+dffeas \soc_inst|m0_1|u_logic|Qem2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ajnvx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qem2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qem2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y8_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ivewx4 (
+// Location: MLABCELL_X39_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ivewx4~combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) 
-// ) )
+// \soc_inst|m0_1|u_logic|Qllwx4~1_combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y6t2z4~q  & (\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & \soc_inst|m0_1|u_logic|Pkxvx4~0_combout 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y6t2z4~q  & (\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & \soc_inst|m0_1|u_logic|Pkxvx4~0_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y6t2z4~q  & (\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & \soc_inst|m0_1|u_logic|Pkxvx4~0_combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ivewx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qllwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ivewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ivewx4 .lut_mask = 64'h0000000031003100;
-defparam \soc_inst|m0_1|u_logic|Ivewx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .lut_mask = 64'h0F0F010101010101;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7fwx4~0 (
+// Location: LABCELL_X42_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E7fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~q  & (!\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Qllwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Q3xvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ju5wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E7fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qllwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .lut_mask = 64'h0000000000500050;
-defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .lut_mask = 64'h00000000FCFFFCFF;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dwewx4~0 (
+// Location: MLABCELL_X39_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dwewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Hyewx4~combout ) # (!\soc_inst|m0_1|u_logic|Xly2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Qllwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Bkxvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qllwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|L8t2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qllwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dwewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qllwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .lut_mask = 64'hFFFCFFFC00000000;
-defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .lut_mask = 64'h000000000E0F0E0F;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dwewx4~1 (
+// Location: MLABCELL_X39_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dwewx4~1_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|G27wx4~0_combout 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Qllwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|Qllwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Qllwx4~1_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( 
+// \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datae(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qllwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qllwx4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .lut_mask = 64'h3333333300330333;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hklwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dwewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hklwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .lut_mask = 64'h0000000020002000;
-defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .lut_mask = 64'h0200000001000000;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y5_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bvewx4~0 (
+// Location: LABCELL_X37_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bvewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dwewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zoy2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Dwewx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Dwewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Hklwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Hklwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hklwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Owq2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dwewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dwewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hklwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bvewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hklwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .lut_mask = 64'h00FF00FF001F001F;
-defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .lut_mask = 64'hEF00EF0000000000;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~0 (
+// Location: LABCELL_X36_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zmlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bvewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # (!\soc_inst|m0_1|u_logic|Y6t2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Zmlwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Jeewx4~combout  $ (((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jeewx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bvewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~0 .lut_mask = 64'hFFFBFFFB00000000;
-defparam \soc_inst|m0_1|u_logic|Woewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .lut_mask = 64'h4B004B0000000000;
+defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~2 (
+// Location: LABCELL_X37_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~2_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wxcwx4~0_combout 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Hklwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q ) # ((!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qslwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qslwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hklwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~2 .lut_mask = 64'h00000000222A222A;
-defparam \soc_inst|m0_1|u_logic|Woewx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .lut_mask = 64'hA0A0A0A0ECECECEC;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~5 (
+// Location: LABCELL_X37_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Ark2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Ark2z4~q )))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ark2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hklwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (\soc_inst|m0_1|u_logic|Hklwx4~3_combout  & (\soc_inst|m0_1|u_logic|Xly2z4~q  & (!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout  
+// & !\soc_inst|m0_1|u_logic|Hklwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (\soc_inst|m0_1|u_logic|Hklwx4~3_combout  & (\soc_inst|m0_1|u_logic|Xly2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Hklwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (\soc_inst|m0_1|u_logic|Hklwx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Hklwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (\soc_inst|m0_1|u_logic|Hklwx4~3_combout  & 
+// (\soc_inst|m0_1|u_logic|Xly2z4~q  & (!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Hklwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hklwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hklwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hklwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~5 .lut_mask = 64'hF0ACF00A00000000;
-defparam \soc_inst|m0_1|u_logic|Woewx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .lut_mask = 64'h1000500010001000;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~3 (
+// Location: LABCELL_X37_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bthvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  
-// & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~q )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Emi2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bthvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~q  & ( \soc_inst|m0_1|u_logic|E4xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) # (\soc_inst|m0_1|u_logic|Hklwx4~4_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Cyq2z4~q  & ( \soc_inst|m0_1|u_logic|E4xvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & \soc_inst|m0_1|u_logic|Hklwx4~4_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Cyq2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) # (\soc_inst|m0_1|u_logic|Hklwx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~q  & ( !\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & (\soc_inst|m0_1|u_logic|Cllwx4~0_combout  & \soc_inst|m0_1|u_logic|Hklwx4~4_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hklwx4~4_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~3 .lut_mask = 64'hC002C000A0A2A0A0;
-defparam \soc_inst|m0_1|u_logic|Woewx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .lut_mask = 64'h0101AFAF0505AFAF;
+defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~1 (
+// Location: FF_X37_Y10_N38
+dffeas \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tdg2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qsewx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qsewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Tdg2z4~combout  = ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( \soc_inst|m0_1|u_logic|H2wwx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((\soc_inst|m0_1|u_logic|Pybwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Pjqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( \soc_inst|m0_1|u_logic|H2wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// \soc_inst|m0_1|u_logic|Pybwx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~q )) # (\soc_inst|m0_1|u_logic|Pjqwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( !\soc_inst|m0_1|u_logic|H2wwx4~combout 
+//  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((\soc_inst|m0_1|u_logic|Pybwx4~combout ) # (\soc_inst|m0_1|u_logic|Fzl2z4~q )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (\soc_inst|m0_1|u_logic|Pjqwx4~combout  & (!\soc_inst|m0_1|u_logic|Fzl2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( !\soc_inst|m0_1|u_logic|H2wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((\soc_inst|m0_1|u_logic|Pybwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Pjqwx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tdg2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~1 .lut_mask = 64'h0055005500050005;
-defparam \soc_inst|m0_1|u_logic|Woewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tdg2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tdg2z4 .lut_mask = 64'h10B01ABA15B51FBF;
+defparam \soc_inst|m0_1|u_logic|Tdg2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y3_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~4 (
+// Location: LABCELL_X30_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aeg2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~4_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
-// ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((\soc_inst|m0_1|u_logic|Npk2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Aeg2z4~combout  = ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~q )) # (\soc_inst|m0_1|u_logic|Hmqwx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Ey9wx4~combout ) # (\soc_inst|m0_1|u_logic|Qzq2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Qzq2z4~q )) # (\soc_inst|m0_1|u_logic|Hmqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & \soc_inst|m0_1|u_logic|Ey9wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  & 
+// ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Hmqwx4~combout  & (\soc_inst|m0_1|u_logic|Qzq2z4~q ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Ey9wx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Qzq2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Hmqwx4~combout  & (\soc_inst|m0_1|u_logic|Qzq2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & \soc_inst|m0_1|u_logic|Ey9wx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aeg2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~4 .lut_mask = 64'h3C1DFF0C0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Woewx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aeg2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aeg2z4 .lut_mask = 64'h02520757A2F2A7F7;
+defparam \soc_inst|m0_1|u_logic|Aeg2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~6 (
+// Location: LABCELL_X30_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vff2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Woewx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Woewx4~2_combout  & (!\soc_inst|m0_1|u_logic|Woewx4~5_combout  & (!\soc_inst|m0_1|u_logic|Woewx4~3_combout  & 
-// !\soc_inst|m0_1|u_logic|Woewx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Vff2z4~combout  = ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( \soc_inst|m0_1|u_logic|Bdwwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Duuwx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Ebbwx4~combout ))))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( \soc_inst|m0_1|u_logic|Bdwwx4~combout  & 
+// ( ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Duuwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Ebbwx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bdwwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Duuwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Ebbwx4~combout ))))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( !\soc_inst|m0_1|u_logic|Bdwwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Duuwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Ebbwx4~combout ))))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Woewx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Woewx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Woewx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Woewx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vff2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~6 .lut_mask = 64'h8000800000000000;
-defparam \soc_inst|m0_1|u_logic|Woewx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vff2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vff2z4 .lut_mask = 64'h707A202A757F252F;
+defparam \soc_inst|m0_1|u_logic|Vff2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~7 (
+// Location: LABCELL_X30_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hhd2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~7_combout  = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Woewx4~6_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Woewx4~6_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Csewx4~0_combout  & (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Woewx4~6_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Csewx4~0_combout  & \soc_inst|m0_1|u_logic|Woewx4~6_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hhd2z4~combout  = ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dmvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|H1qwx4~combout  & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dmvwx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|H1qwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dmvwx4~combout  & ((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Dmvwx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Woewx4~6_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hhd2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~7 .lut_mask = 64'h00AA000A00FF000F;
-defparam \soc_inst|m0_1|u_logic|Woewx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hhd2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hhd2z4 .lut_mask = 64'hFFCAF0CA0FCA00CA;
+defparam \soc_inst|m0_1|u_logic|Hhd2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~8 (
+// Location: LABCELL_X29_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qhe2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~8_combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Woewx4~7_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Woewx4~7_combout  & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qhe2z4~combout  = ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Qzq2z4~q ) # (\soc_inst|m0_1|u_logic|Eruwx4~combout 
+// )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~q )) # (\soc_inst|m0_1|u_logic|Cawwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Qzq2z4~q ) # (\soc_inst|m0_1|u_logic|Eruwx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cawwx4~combout  & ((\soc_inst|m0_1|u_logic|Qzq2z4~q 
+// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Eruwx4~combout  & !\soc_inst|m0_1|u_logic|Qzq2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~q )) # (\soc_inst|m0_1|u_logic|Cawwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Eruwx4~combout  & !\soc_inst|m0_1|u_logic|Qzq2z4~q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cawwx4~combout  & ((\soc_inst|m0_1|u_logic|Qzq2z4~q 
+// )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Woewx4~7_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qhe2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~8 .lut_mask = 64'h000000000F030F0F;
-defparam \soc_inst|m0_1|u_logic|Woewx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qhe2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qhe2z4 .lut_mask = 64'h0A115F110ABB5FBB;
+defparam \soc_inst|m0_1|u_logic|Qhe2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y3_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~0 (
+// Location: LABCELL_X30_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jhe2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E0fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q 
-// ))) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zoy2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Zoy2z4~q  & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Jhe2z4~combout  = ( \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U7uwx4~combout 
+// ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fexwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U7uwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fexwx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|U7uwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fexwx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U7uwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fexwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E0fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jhe2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .lut_mask = 64'h0480048004810481;
-defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jhe2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jhe2z4 .lut_mask = 64'hF3BBC0BBF388C088;
+defparam \soc_inst|m0_1|u_logic|Jhe2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y4_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~1 (
+// Location: LABCELL_X29_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohd2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E0fwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # ((\soc_inst|m0_1|u_logic|Pty2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Pty2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ohd2z4~combout  = ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Icxwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Mnvwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Icxwx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Icxwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Icxwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E0fwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ohd2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .lut_mask = 64'h0000550044445510;
-defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ohd2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ohd2z4 .lut_mask = 64'h014589CD2367ABEF;
+defparam \soc_inst|m0_1|u_logic|Ohd2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y3_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~2 (
+// Location: LABCELL_X30_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgd2z4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E0fwx4~2_combout  = ( \soc_inst|m0_1|u_logic|R3fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout  & !\soc_inst|m0_1|u_logic|E0fwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|R3fwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|E0fwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|E0fwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Mgd2z4~4_combout  = ( !\soc_inst|m0_1|u_logic|Uup2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((((!\soc_inst|m0_1|u_logic|Zcn2z4~q ))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zcn2z4~q 
+//  & (\soc_inst|m0_1|u_logic|Hhd2z4~combout )) # (\soc_inst|m0_1|u_logic|Zcn2z4~q  & (((\soc_inst|m0_1|u_logic|Ohd2z4~combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|Uup2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & 
+// (((!\soc_inst|m0_1|u_logic|Zcn2z4~q )))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zcn2z4~q  & ((\soc_inst|m0_1|u_logic|Jhe2z4~combout ))) # (\soc_inst|m0_1|u_logic|Zcn2z4~q  & (\soc_inst|m0_1|u_logic|Qhe2z4~combout ))))) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E0fwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E0fwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Hhd2z4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qhe2z4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jhe2z4~combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ohd2z4~combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E0fwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .lut_mask = 64'hDC00DC00CC00CC00;
-defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .lut_mask = 64'hDD03CC03DD03FF03;
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~9 (
+// Location: LABCELL_X29_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cgf2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~9_combout  = ( \soc_inst|m0_1|u_logic|Woewx4~8_combout  & ( \soc_inst|m0_1|u_logic|E0fwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|E7fwx4~0_combout  & \soc_inst|m0_1|u_logic|Woewx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Woewx4~8_combout  & ( !\soc_inst|m0_1|u_logic|E0fwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|E7fwx4~0_combout  & (\soc_inst|m0_1|u_logic|Woewx4~0_combout  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Cgf2z4~combout  = ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qxuwx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bywwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Qxuwx4~combout ) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bywwx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( !\soc_inst|m0_1|u_logic|Svqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Qxuwx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Bywwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Svqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qxuwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Bywwx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E7fwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Woewx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Woewx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|E0fwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cgf2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~9 .lut_mask = 64'h0000002200002222;
-defparam \soc_inst|m0_1|u_logic|Woewx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cgf2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cgf2z4 .lut_mask = 64'h10D013D31CDC1FDF;
+defparam \soc_inst|m0_1|u_logic|Cgf2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxhvx4~0 (
+// Location: LABCELL_X30_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgd2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qxhvx4~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Woewx4~9_combout ) # (\soc_inst|m0_1|u_logic|Ivewx4~combout ) ) ) # ( !\soc_inst|interconnect_1|HREADY~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Emi2z4~q  & ((!\soc_inst|m0_1|u_logic|Woewx4~9_combout ) # (\soc_inst|m0_1|u_logic|Ivewx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & (\soc_inst|m0_1|u_logic|Cgf2z4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & ((\soc_inst|m0_1|u_logic|Vff2z4~combout )))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((((\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & ((\soc_inst|m0_1|u_logic|Aeg2z4~combout ))) # (\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & (\soc_inst|m0_1|u_logic|Tdg2z4~combout ))))) # 
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((((\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ivewx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Woewx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tdg2z4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aeg2z4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vff2z4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Cgf2z4~combout ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .lut_mask = 64'h0A0A0A0A55FF7777;
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y1d2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .lut_mask = 64'h55055505FF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .lut_mask = 64'h55FA55FA45C045C0;
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y7_N29
-dffeas \soc_inst|m0_1|u_logic|Emi2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y1d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q 
+//  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Emi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Emi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .lut_mask = 64'h0400040026222622;
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y9_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~0 (
+// Location: LABCELL_X33_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xslwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Emi2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Y1d2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Y1d2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Y1d2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y1d2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Y1d2z4~1_combout  & !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y1d2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Y1d2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xslwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .lut_mask = 64'h2020202020332020;
-defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .lut_mask = 64'h5050000040400000;
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y5_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~1 (
+// Location: LABCELL_X30_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K1wvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xslwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|K1wvx4~combout  = ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xslwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K1wvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .lut_mask = 64'h0000000010101010;
-defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K1wvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K1wvx4 .lut_mask = 64'hFFF8FFF800000000;
+defparam \soc_inst|m0_1|u_logic|K1wvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~2 (
+// Location: LABCELL_X30_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xslwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xslwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Xslwx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|haddr_o~1_combout  = ( \soc_inst|m0_1|u_logic|Add3~5_sumout  & ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~5_sumout  & ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~5_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~5_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xslwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~5_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xslwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .lut_mask = 64'h50005000F000F000;
-defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~1 .lut_mask = 64'h00CC0FCF55DD5FDF;
+defparam \soc_inst|m0_1|u_logic|haddr_o~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~3 (
+// Location: LABCELL_X30_Y13_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|LessThan0~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xslwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Z9dwx4~0_combout )) # (\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Z9dwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Z9dwx4~0_combout )) ) ) )
+// \soc_inst|interconnect_1|LessThan0~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xslwx4~3_combout ),
+	.combout(\soc_inst|interconnect_1|LessThan0~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .lut_mask = 64'h80808080D5D5FFFF;
-defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|LessThan0~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|LessThan0~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|interconnect_1|LessThan0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y5_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~4 (
+// Location: FF_X30_Y13_N22
+dffeas \soc_inst|interconnect_1|mux_sel[0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|interconnect_1|mux_sel [0]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|mux_sel[0] .is_wysiwyg = "true";
+defparam \soc_inst|interconnect_1|mux_sel[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y17_N18
+cyclonev_lcell_comb \soc_inst|interconnect_1|HREADY~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xslwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Xslwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Xslwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) ) ) )
+// \soc_inst|interconnect_1|HREADY~0_combout  = ( \soc_inst|interconnect_1|mux_sel [1] ) # ( !\soc_inst|interconnect_1|mux_sel [1] & ( (!\soc_inst|interconnect_1|mux_sel [0]) # ((!\soc_inst|ram_1|write_cycle~DUPLICATE_q ) # (\soc_inst|interconnect_1|mux_sel 
+// [2])) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xslwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xslwx4~3_combout ),
+	.dataa(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|mux_sel [2]),
+	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xslwx4~4_combout ),
+	.combout(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .lut_mask = 64'hCFCF000000000000;
-defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HREADY~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HREADY~0 .lut_mask = 64'hFFAFFFAFFFFFFFFF;
+defparam \soc_inst|interconnect_1|HREADY~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Etlwx4~0 (
+// Location: LABCELL_X37_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Etlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|X8kwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Etlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .lut_mask = 64'hAAA2AAA2A2A2A2A2;
-defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .lut_mask = 64'hFFFAFFFA00000000;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y9_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ushvx4~0 (
+// Location: LABCELL_X36_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8kwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ushvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Etlwx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|Xslwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Xslwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Msyvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Q8kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Xly2z4~q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xslwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xslwx4~4_combout ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Etlwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8kwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .lut_mask = 64'hF3F2F3F200000000;
-defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y7_N8
-dffeas \soc_inst|m0_1|u_logic|O5t2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O5t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .lut_mask = 64'h00000000030F030F;
+defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~0 (
+// Location: LABCELL_X35_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8kwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Egkwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout  & !\soc_inst|m0_1|u_logic|Egkwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8kwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .lut_mask = 64'h000000000C0A0C0A;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .lut_mask = 64'hFAAAFAAAC888C888;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~1 (
+// Location: LABCELL_X35_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Howvx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Howvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Mkkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|O76wx4~combout  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|G97wx4~0_combout  & !\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|G97wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|O76wx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .lut_mask = 64'h000F000F000A000A;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .lut_mask = 64'h005000DC005000DC;
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y7_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~2 (
+// Location: LABCELL_X35_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bbkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hohwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Sbiwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Bbkwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & \soc_inst|m0_1|u_logic|My6wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & \soc_inst|m0_1|u_logic|My6wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sbiwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bbkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .lut_mask = 64'h8000800000000000;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .lut_mask = 64'hCCFCCCCC00F00000;
+defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~0 (
+// Location: LABCELL_X35_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Dvy2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( 
-// (((\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( \soc_inst|m0_1|u_logic|Iikwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Bbkwx4~0_combout  & \soc_inst|m0_1|u_logic|H5fwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Iikwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Bbkwx4~0_combout  & \soc_inst|m0_1|u_logic|H5fwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bbkwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .lut_mask = 64'h37FF333305CD0000;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .lut_mask = 64'h005500000F5F0F0F;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~1 (
+// Location: LABCELL_X40_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mk6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Wkiwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mk6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Wkiwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uv6wx4~combout  & ((!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .lut_mask = 64'h05050505FF05FF05;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .lut_mask = 64'h0F0F0F0F0F0B0F0B;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~2 (
+// Location: LABCELL_X40_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hekwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Hekwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
+// \soc_inst|m0_1|u_logic|My6wx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hekwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .lut_mask = 64'h00AAAAAAF5A00AAA;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .lut_mask = 64'h000C000CCCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~5 (
+// Location: LABCELL_X40_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ))))) ) 
-// )
+// \soc_inst|m0_1|u_logic|T6kwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hekwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T6kwx4~2_combout  & (((\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )) # (\soc_inst|m0_1|u_logic|L8t2z4~q 
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Hekwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T6kwx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T6kwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hekwx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .lut_mask = 64'h0003003200030033;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .lut_mask = 64'h0F0F0F0F070F070F;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y3_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~3 (
+// Location: LABCELL_X35_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Qem2z4~q  & ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Qem2z4~q  & ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q )))) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|T6kwx4~1_combout  & ( \soc_inst|m0_1|u_logic|T6kwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|T6kwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T6kwx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|T6kwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .lut_mask = 64'h0000557F5555557F;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .lut_mask = 64'h0000000051510000;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y3_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~4 (
+// Location: MLABCELL_X34_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Wkiwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (!\soc_inst|m0_1|u_logic|Wkiwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ) # 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Swy2z4~q  & (((!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout )) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~6_combout  = ( \soc_inst|m0_1|u_logic|T6kwx4~5_combout  & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout  & (\soc_inst|m0_1|u_logic|T6kwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Aekwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wkiwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T6kwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkiwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .lut_mask = 64'hF531F53100000000;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .lut_mask = 64'h0000000005040504;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Idiwx4~0 (
+// Location: MLABCELL_X39_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Idiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Fkkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Idiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .lut_mask = 64'h000000001010FFFF;
-defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .lut_mask = 64'hF5F5C4C4F0F0C0C0;
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~3 (
+// Location: LABCELL_X40_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkkwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ws3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|X77wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ws3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// (\soc_inst|m0_1|u_logic|X77wx4~combout  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Fkkwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gokwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Qdj2z4~q  & 
+// \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gokwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fkkwx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .lut_mask = 64'h000C000C0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .lut_mask = 64'hAAAA0000ABAB0000;
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttiwx4~0 (
+// Location: LABCELL_X33_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ttiwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~q  & (\soc_inst|m0_1|u_logic|Kzxvx4~combout  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Mkkwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Jp3wx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ttiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .lut_mask = 64'h0010001000000000;
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y8_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttiwx4~1 (
+// Location: LABCELL_X35_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ttiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fhc2z4~0_combout  & \soc_inst|m0_1|u_logic|O76wx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ttiwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Mkkwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emewx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ttiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .lut_mask = 64'h3333333300050005;
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .lut_mask = 64'h00000000C000C000;
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~4 (
+// Location: LABCELL_X35_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Ttiwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Sbiwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~7_combout  = ( \soc_inst|m0_1|u_logic|Unewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mkkwx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mkkwx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mkkwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Unewx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .lut_mask = 64'hAAA0AAA000000000;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .lut_mask = 64'h00000000F0D0F0D0;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y6_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Agiwx4~0 (
+// Location: MLABCELL_X34_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pikwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Agiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Pikwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O76wx4~combout  & ( (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|M66wx4~combout )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|O76wx4~combout  & ( (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|M66wx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Agiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pikwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .lut_mask = 64'h0000000000010001;
-defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .lut_mask = 64'h0101010101550155;
+defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y6_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yeiwx4~0 (
+// Location: MLABCELL_X39_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Askwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yeiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Agiwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ohwvx4~combout )) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Agiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Askwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Pty2z4~q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~q  
+// & (((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q ))))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & 
+// (((\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Agiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Askwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .lut_mask = 64'h8A8A8A8A8A0A8A0A;
-defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Askwx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Askwx4~1 .lut_mask = 64'hBBFC5700FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Askwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y6_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~5 (
+// Location: LABCELL_X37_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Askwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yeiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sbiwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yeiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sbiwx4~4_combout  & (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Askwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ((\soc_inst|m0_1|u_logic|G27wx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|V1yvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sbiwx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Askwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .lut_mask = 64'h0203020322332233;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Askwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Askwx4~0 .lut_mask = 64'h0505000005550000;
+defparam \soc_inst|m0_1|u_logic|Askwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y7_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~6 (
+// Location: LABCELL_X37_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Wkiwx4~4_combout  & ( \soc_inst|m0_1|u_logic|Sbiwx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wkiwx4~4_combout  & ( \soc_inst|m0_1|u_logic|Sbiwx4~5_combout  & ( ((\soc_inst|m0_1|u_logic|Sbiwx4~2_combout  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~8_combout  = ( \soc_inst|m0_1|u_logic|Askwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Askwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T6kwx4~7_combout  & 
+// !\soc_inst|m0_1|u_logic|Pikwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Askwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Askwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T6kwx4~7_combout  & !\soc_inst|m0_1|u_logic|Pikwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Askwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Askwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T6kwx4~7_combout  & !\soc_inst|m0_1|u_logic|Pikwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T6kwx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pikwx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Askwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Askwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .lut_mask = 64'h0000000057577777;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .lut_mask = 64'h1010303000002020;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y7_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mvhvx4 (
+// Location: MLABCELL_X34_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ruhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mvhvx4~combout  = ( \soc_inst|m0_1|u_logic|Sbiwx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sbiwx4~6_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ruhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|T6kwx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|T6kwx4~6_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fkkwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|T6kwx4~6_combout ) # (\soc_inst|m0_1|u_logic|Fkkwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|T6kwx4~8_combout  & ( 
+// (\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T6kwx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mvhvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mvhvx4 .lut_mask = 64'h0FFF0FFF0F080F08;
-defparam \soc_inst|m0_1|u_logic|Mvhvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .lut_mask = 64'h7777777770777077;
+defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y7_N56
-dffeas \soc_inst|m0_1|u_logic|Aok2z4 (
+// Location: FF_X34_Y14_N37
+dffeas \soc_inst|m0_1|u_logic|Nsk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aok2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aok2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nsk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nsk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y5_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~0 (
+// Location: LABCELL_X35_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G97wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Q5c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q5c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G97wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G97wx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|G97wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N57
+// Location: LABCELL_X35_Y18_N6
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z5pvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|G97wx4~0_combout  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Z5pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -108698,45 +109174,21 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~1 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .lut_mask = 64'h0000000030303030;
 defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5c2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q5c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q5c2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .lut_mask = 64'h0000000000000C0C;
-defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y5_N33
+// Location: LABCELL_X35_Y18_N36
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z5pvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C2yvx4~combout  & (\soc_inst|m0_1|u_logic|S4w2z4~q  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Z5pvx4~2_combout  = ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (\soc_inst|m0_1|u_logic|S4w2z4~q  & \soc_inst|m0_1|u_logic|Bxcwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datab(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -108746,22 +109198,24 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~2 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .lut_mask = 64'h0000000000030003;
 defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y5_N15
+// Location: LABCELL_X35_Y18_N45
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z5pvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Z5pvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Z5pvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -108771,20 +109225,20 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~3 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .lut_mask = 64'hFB00FB00F300F300;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .lut_mask = 64'hAAAAAAAAA2A22222;
 defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y7_N39
+// Location: LABCELL_X30_Y17_N54
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~4 (
 // Equation(s):
 // \soc_inst|m0_1|u_logic|Z5pvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ) # 
 // (\soc_inst|m0_1|u_logic|S4w2z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
 	.datag(gnd),
@@ -108796,11 +109250,11 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~4 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .lut_mask = 64'hF0FFF0FFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .lut_mask = 64'hCFCFCFCFCCCCCCCC;
 defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X88_Y18_N24
+// Location: MLABCELL_X87_Y25_N36
 cyclonev_lcell_comb \running~feeder (
 // Equation(s):
 // \running~feeder_combout  = VCC
@@ -108824,7 +109278,7 @@ defparam \running~feeder .lut_mask = 64'hFFFFFFFFFFFFFFFF;
 defparam \running~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X88_Y18_N25
+// Location: FF_X87_Y25_N37
 dffeas running(
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\running~feeder_combout ),
@@ -108843,7 +109297,7 @@ defparam running.is_wysiwyg = "true";
 defparam running.power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N0
+// Location: LABCELL_X45_Y12_N0
 cyclonev_lcell_comb \raz_inst|Add1~37 (
 // Equation(s):
 // \raz_inst|Add1~37_sumout  = SUM(( \raz_inst|V_count [0] ) + ( VCC ) + ( !VCC ))
@@ -108868,7 +109322,26 @@ defparam \raz_inst|Add1~37 .lut_mask = 64'h00000000000000FF;
 defparam \raz_inst|Add1~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N0
+// Location: FF_X43_Y12_N59
+dffeas \raz_inst|H_count[2]~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\raz_inst|Add0~21_sumout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|LessThan0~3_combout ),
+	.sload(vcc),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|H_count[2]~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[2]~DUPLICATE .is_wysiwyg = "true";
+defparam \raz_inst|H_count[2]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N0
 cyclonev_lcell_comb \raz_inst|Add0~25 (
 // Equation(s):
 // \raz_inst|Add0~25_sumout  = SUM(( \raz_inst|H_count[0]~DUPLICATE_q  ) + ( VCC ) + ( !VCC ))
@@ -108893,7 +109366,7 @@ defparam \raz_inst|Add0~25 .lut_mask = 64'h0000000000000F0F;
 defparam \raz_inst|Add0~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N35
+// Location: FF_X43_Y12_N35
 dffeas \raz_inst|H_count[0]~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -108912,16 +109385,16 @@ defparam \raz_inst|H_count[0]~DUPLICATE .is_wysiwyg = "true";
 defparam \raz_inst|H_count[0]~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N3
+// Location: LABCELL_X43_Y12_N3
 cyclonev_lcell_comb \raz_inst|Add0~29 (
 // Equation(s):
-// \raz_inst|Add0~29_sumout  = SUM(( \raz_inst|H_count [1] ) + ( GND ) + ( \raz_inst|Add0~26  ))
-// \raz_inst|Add0~30  = CARRY(( \raz_inst|H_count [1] ) + ( GND ) + ( \raz_inst|Add0~26  ))
+// \raz_inst|Add0~29_sumout  = SUM(( \raz_inst|H_count[1]~DUPLICATE_q  ) + ( GND ) + ( \raz_inst|Add0~26  ))
+// \raz_inst|Add0~30  = CARRY(( \raz_inst|H_count[1]~DUPLICATE_q  ) + ( GND ) + ( \raz_inst|Add0~26  ))
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\raz_inst|H_count [1]),
+	.datad(!\raz_inst|H_count[1]~DUPLICATE_q ),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
@@ -108937,8 +109410,8 @@ defparam \raz_inst|Add0~29 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add0~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N59
-dffeas \raz_inst|H_count[1] (
+// Location: FF_X43_Y12_N47
+dffeas \raz_inst|H_count[1]~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
 	.asdata(\raz_inst|Add0~29_sumout ),
@@ -108949,23 +109422,23 @@ dffeas \raz_inst|H_count[1] (
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\raz_inst|H_count [1]),
+	.q(\raz_inst|H_count[1]~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \raz_inst|H_count[1] .is_wysiwyg = "true";
-defparam \raz_inst|H_count[1] .power_up = "low";
+defparam \raz_inst|H_count[1]~DUPLICATE .is_wysiwyg = "true";
+defparam \raz_inst|H_count[1]~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N6
+// Location: LABCELL_X43_Y12_N6
 cyclonev_lcell_comb \raz_inst|Add0~21 (
 // Equation(s):
-// \raz_inst|Add0~21_sumout  = SUM(( \raz_inst|H_count [2] ) + ( GND ) + ( \raz_inst|Add0~30  ))
-// \raz_inst|Add0~22  = CARRY(( \raz_inst|H_count [2] ) + ( GND ) + ( \raz_inst|Add0~30  ))
+// \raz_inst|Add0~21_sumout  = SUM(( \raz_inst|H_count[2]~DUPLICATE_q  ) + ( GND ) + ( \raz_inst|Add0~30  ))
+// \raz_inst|Add0~22  = CARRY(( \raz_inst|H_count[2]~DUPLICATE_q  ) + ( GND ) + ( \raz_inst|Add0~30  ))
 
 	.dataa(gnd),
-	.datab(!\raz_inst|H_count [2]),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\raz_inst|H_count[2]~DUPLICATE_q ),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
@@ -108977,11 +109450,11 @@ cyclonev_lcell_comb \raz_inst|Add0~21 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Add0~21 .extended_lut = "off";
-defparam \raz_inst|Add0~21 .lut_mask = 64'h0000FFFF00003333;
+defparam \raz_inst|Add0~21 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add0~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N41
+// Location: FF_X43_Y12_N58
 dffeas \raz_inst|H_count[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -109000,7 +109473,7 @@ defparam \raz_inst|H_count[2] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N9
+// Location: LABCELL_X43_Y12_N9
 cyclonev_lcell_comb \raz_inst|Add0~37 (
 // Equation(s):
 // \raz_inst|Add0~37_sumout  = SUM(( \raz_inst|H_count [3] ) + ( GND ) + ( \raz_inst|Add0~22  ))
@@ -109008,8 +109481,8 @@ cyclonev_lcell_comb \raz_inst|Add0~37 (
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|H_count [3]),
+	.datac(!\raz_inst|H_count [3]),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
@@ -109021,19 +109494,19 @@ cyclonev_lcell_comb \raz_inst|Add0~37 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Add0~37 .extended_lut = "off";
-defparam \raz_inst|Add0~37 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add0~37 .lut_mask = 64'h0000FFFF00000F0F;
 defparam \raz_inst|Add0~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N47
+// Location: FF_X43_Y12_N11
 dffeas \raz_inst|H_count[3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\raz_inst|Add0~37_sumout ),
+	.d(\raz_inst|Add0~37_sumout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(\raz_inst|LessThan0~3_combout ),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
@@ -109044,16 +109517,16 @@ defparam \raz_inst|H_count[3] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N12
+// Location: LABCELL_X43_Y12_N12
 cyclonev_lcell_comb \raz_inst|Add0~41 (
 // Equation(s):
 // \raz_inst|Add0~41_sumout  = SUM(( \raz_inst|H_count [4] ) + ( GND ) + ( \raz_inst|Add0~38  ))
 // \raz_inst|Add0~42  = CARRY(( \raz_inst|H_count [4] ) + ( GND ) + ( \raz_inst|Add0~38  ))
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\raz_inst|H_count [4]),
 	.datac(gnd),
-	.datad(!\raz_inst|H_count [4]),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
@@ -109065,19 +109538,19 @@ cyclonev_lcell_comb \raz_inst|Add0~41 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Add0~41 .extended_lut = "off";
-defparam \raz_inst|Add0~41 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add0~41 .lut_mask = 64'h0000FFFF00003333;
 defparam \raz_inst|Add0~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N43
+// Location: FF_X43_Y12_N14
 dffeas \raz_inst|H_count[4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\raz_inst|Add0~41_sumout ),
+	.d(\raz_inst|Add0~41_sumout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(\raz_inst|LessThan0~3_combout ),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
@@ -109088,7 +109561,26 @@ defparam \raz_inst|H_count[4] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[4] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N15
+// Location: FF_X43_Y12_N46
+dffeas \raz_inst|H_count[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\raz_inst|Add0~29_sumout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|LessThan0~3_combout ),
+	.sload(vcc),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|H_count [1]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[1] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N15
 cyclonev_lcell_comb \raz_inst|Add0~33 (
 // Equation(s):
 // \raz_inst|Add0~33_sumout  = SUM(( \raz_inst|H_count [5] ) + ( GND ) + ( \raz_inst|Add0~42  ))
@@ -109113,7 +109605,7 @@ defparam \raz_inst|Add0~33 .lut_mask = 64'h0000FFFF00000F0F;
 defparam \raz_inst|Add0~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N17
+// Location: FF_X43_Y12_N17
 dffeas \raz_inst|H_count[5] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add0~33_sumout ),
@@ -109132,7 +109624,32 @@ defparam \raz_inst|H_count[5] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[5] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N18
+// Location: LABCELL_X43_Y12_N42
+cyclonev_lcell_comb \raz_inst|LessThan0~0 (
+// Equation(s):
+// \raz_inst|LessThan0~0_combout  = ( \raz_inst|H_count [1] & ( !\raz_inst|H_count [5] & ( (!\raz_inst|H_count [2]) # ((!\raz_inst|H_count [3]) # ((!\raz_inst|H_count[0]~DUPLICATE_q ) # (!\raz_inst|H_count [4]))) ) ) ) # ( !\raz_inst|H_count [1] & ( 
+// !\raz_inst|H_count [5] ) )
+
+	.dataa(!\raz_inst|H_count [2]),
+	.datab(!\raz_inst|H_count [3]),
+	.datac(!\raz_inst|H_count[0]~DUPLICATE_q ),
+	.datad(!\raz_inst|H_count [4]),
+	.datae(!\raz_inst|H_count [1]),
+	.dataf(!\raz_inst|H_count [5]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\raz_inst|LessThan0~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan0~0 .extended_lut = "off";
+defparam \raz_inst|LessThan0~0 .lut_mask = 64'hFFFFFFFE00000000;
+defparam \raz_inst|LessThan0~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N18
 cyclonev_lcell_comb \raz_inst|Add0~17 (
 // Equation(s):
 // \raz_inst|Add0~17_sumout  = SUM(( \raz_inst|H_count [6] ) + ( GND ) + ( \raz_inst|Add0~34  ))
@@ -109157,7 +109674,7 @@ defparam \raz_inst|Add0~17 .lut_mask = 64'h0000FFFF00000F0F;
 defparam \raz_inst|Add0~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N20
+// Location: FF_X43_Y12_N20
 dffeas \raz_inst|H_count[6] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add0~17_sumout ),
@@ -109176,7 +109693,7 @@ defparam \raz_inst|H_count[6] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[6] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N21
+// Location: LABCELL_X43_Y12_N21
 cyclonev_lcell_comb \raz_inst|Add0~5 (
 // Equation(s):
 // \raz_inst|Add0~5_sumout  = SUM(( \raz_inst|H_count [7] ) + ( GND ) + ( \raz_inst|Add0~18  ))
@@ -109201,7 +109718,7 @@ defparam \raz_inst|Add0~5 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add0~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N23
+// Location: FF_X43_Y12_N23
 dffeas \raz_inst|H_count[7] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add0~5_sumout ),
@@ -109220,7 +109737,7 @@ defparam \raz_inst|H_count[7] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[7] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N24
+// Location: LABCELL_X43_Y12_N24
 cyclonev_lcell_comb \raz_inst|Add0~9 (
 // Equation(s):
 // \raz_inst|Add0~9_sumout  = SUM(( \raz_inst|H_count [8] ) + ( GND ) + ( \raz_inst|Add0~6  ))
@@ -109245,7 +109762,7 @@ defparam \raz_inst|Add0~9 .lut_mask = 64'h0000FFFF00000F0F;
 defparam \raz_inst|Add0~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N26
+// Location: FF_X43_Y12_N26
 dffeas \raz_inst|H_count[8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add0~9_sumout ),
@@ -109264,7 +109781,7 @@ defparam \raz_inst|H_count[8] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[8] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N27
+// Location: LABCELL_X43_Y12_N27
 cyclonev_lcell_comb \raz_inst|Add0~13 (
 // Equation(s):
 // \raz_inst|Add0~13_sumout  = SUM(( \raz_inst|H_count [9] ) + ( GND ) + ( \raz_inst|Add0~10  ))
@@ -109289,34 +109806,10 @@ defparam \raz_inst|Add0~13 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add0~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N30
-cyclonev_lcell_comb \raz_inst|Add0~1 (
-// Equation(s):
-// \raz_inst|Add0~1_sumout  = SUM(( \raz_inst|H_count [10] ) + ( GND ) + ( \raz_inst|Add0~14  ))
-
-	.dataa(gnd),
-	.datab(!\raz_inst|H_count [10]),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\raz_inst|Add0~14 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\raz_inst|Add0~1_sumout ),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Add0~1 .extended_lut = "off";
-defparam \raz_inst|Add0~1 .lut_mask = 64'h0000FFFF00003333;
-defparam \raz_inst|Add0~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y15_N32
-dffeas \raz_inst|H_count[10] (
+// Location: FF_X43_Y12_N29
+dffeas \raz_inst|H_count[9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add0~1_sumout ),
+	.d(\raz_inst|Add0~13_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -109325,58 +109818,14 @@ dffeas \raz_inst|H_count[10] (
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\raz_inst|H_count [10]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|H_count[10] .is_wysiwyg = "true";
-defparam \raz_inst|H_count[10] .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X34_Y15_N58
-dffeas \raz_inst|H_count[1]~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\raz_inst|Add0~29_sumout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|LessThan0~3_combout ),
-	.sload(vcc),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|H_count[1]~DUPLICATE_q ),
+	.q(\raz_inst|H_count [9]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \raz_inst|H_count[1]~DUPLICATE .is_wysiwyg = "true";
-defparam \raz_inst|H_count[1]~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y15_N54
-cyclonev_lcell_comb \raz_inst|LessThan0~0 (
-// Equation(s):
-// \raz_inst|LessThan0~0_combout  = ( \raz_inst|H_count [3] & ( !\raz_inst|H_count [5] & ( (!\raz_inst|H_count[0]~DUPLICATE_q ) # ((!\raz_inst|H_count [4]) # ((!\raz_inst|H_count[1]~DUPLICATE_q ) # (!\raz_inst|H_count [2]))) ) ) ) # ( !\raz_inst|H_count [3] 
-// & ( !\raz_inst|H_count [5] ) )
-
-	.dataa(!\raz_inst|H_count[0]~DUPLICATE_q ),
-	.datab(!\raz_inst|H_count [4]),
-	.datac(!\raz_inst|H_count[1]~DUPLICATE_q ),
-	.datad(!\raz_inst|H_count [2]),
-	.datae(!\raz_inst|H_count [3]),
-	.dataf(!\raz_inst|H_count [5]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|LessThan0~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|LessThan0~0 .extended_lut = "off";
-defparam \raz_inst|LessThan0~0 .lut_mask = 64'hFFFFFFFE00000000;
-defparam \raz_inst|LessThan0~0 .shared_arith = "off";
+defparam \raz_inst|H_count[9] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[9] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N51
+// Location: LABCELL_X43_Y12_N36
 cyclonev_lcell_comb \raz_inst|LessThan0~2 (
 // Equation(s):
 // \raz_inst|LessThan0~2_combout  = ( \raz_inst|H_count [8] & ( \raz_inst|H_count [9] ) )
@@ -109400,17 +109849,17 @@ defparam \raz_inst|LessThan0~2 .lut_mask = 64'h0000000000FF00FF;
 defparam \raz_inst|LessThan0~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N36
+// Location: LABCELL_X45_Y12_N51
 cyclonev_lcell_comb \raz_inst|LessThan0~1 (
 // Equation(s):
-// \raz_inst|LessThan0~1_combout  = (!\raz_inst|H_count [6] & !\raz_inst|H_count [7])
+// \raz_inst|LessThan0~1_combout  = ( !\raz_inst|H_count [6] & ( !\raz_inst|H_count [7] ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\raz_inst|H_count [6]),
+	.datac(gnd),
 	.datad(!\raz_inst|H_count [7]),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\raz_inst|H_count [6]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -109420,21 +109869,21 @@ cyclonev_lcell_comb \raz_inst|LessThan0~1 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|LessThan0~1 .extended_lut = "off";
-defparam \raz_inst|LessThan0~1 .lut_mask = 64'hF000F000F000F000;
+defparam \raz_inst|LessThan0~1 .lut_mask = 64'hFF00FF0000000000;
 defparam \raz_inst|LessThan0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N42
+// Location: LABCELL_X43_Y12_N39
 cyclonev_lcell_comb \raz_inst|LessThan0~3 (
 // Equation(s):
-// \raz_inst|LessThan0~3_combout  = ( \raz_inst|LessThan0~2_combout  & ( \raz_inst|LessThan0~1_combout  & ( (!\raz_inst|LessThan0~0_combout ) # (\raz_inst|H_count [10]) ) ) ) # ( !\raz_inst|LessThan0~2_combout  & ( \raz_inst|LessThan0~1_combout  & ( 
-// \raz_inst|H_count [10] ) ) ) # ( \raz_inst|LessThan0~2_combout  & ( !\raz_inst|LessThan0~1_combout  ) ) # ( !\raz_inst|LessThan0~2_combout  & ( !\raz_inst|LessThan0~1_combout  & ( \raz_inst|H_count [10] ) ) )
+// \raz_inst|LessThan0~3_combout  = ( \raz_inst|LessThan0~1_combout  & ( ((!\raz_inst|LessThan0~0_combout  & \raz_inst|LessThan0~2_combout )) # (\raz_inst|H_count [10]) ) ) # ( !\raz_inst|LessThan0~1_combout  & ( (\raz_inst|LessThan0~2_combout ) # 
+// (\raz_inst|H_count [10]) ) )
 
 	.dataa(gnd),
 	.datab(!\raz_inst|H_count [10]),
 	.datac(!\raz_inst|LessThan0~0_combout ),
-	.datad(gnd),
-	.datae(!\raz_inst|LessThan0~2_combout ),
+	.datad(!\raz_inst|LessThan0~2_combout ),
+	.datae(gnd),
 	.dataf(!\raz_inst|LessThan0~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -109445,14 +109894,14 @@ cyclonev_lcell_comb \raz_inst|LessThan0~3 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|LessThan0~3 .extended_lut = "off";
-defparam \raz_inst|LessThan0~3 .lut_mask = 64'h3333FFFF3333F3F3;
+defparam \raz_inst|LessThan0~3 .lut_mask = 64'h33FF33FF33F333F3;
 defparam \raz_inst|LessThan0~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N29
-dffeas \raz_inst|H_count[9] (
+// Location: FF_X43_Y12_N32
+dffeas \raz_inst|H_count[10] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add0~13_sumout ),
+	.d(\raz_inst|Add0~1_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -109461,97 +109910,97 @@ dffeas \raz_inst|H_count[9] (
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\raz_inst|H_count [9]),
+	.q(\raz_inst|H_count [10]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \raz_inst|H_count[9] .is_wysiwyg = "true";
-defparam \raz_inst|H_count[9] .power_up = "low";
+defparam \raz_inst|H_count[10] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[10] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N18
-cyclonev_lcell_comb \raz_inst|Add1~1 (
+// Location: LABCELL_X43_Y12_N30
+cyclonev_lcell_comb \raz_inst|Add0~1 (
 // Equation(s):
-// \raz_inst|Add1~1_sumout  = SUM(( \raz_inst|V_count [6] ) + ( GND ) + ( \raz_inst|Add1~6  ))
-// \raz_inst|Add1~2  = CARRY(( \raz_inst|V_count [6] ) + ( GND ) + ( \raz_inst|Add1~6  ))
+// \raz_inst|Add0~1_sumout  = SUM(( \raz_inst|H_count [10] ) + ( GND ) + ( \raz_inst|Add0~14  ))
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\raz_inst|H_count [10]),
 	.datac(gnd),
-	.datad(!\raz_inst|V_count [6]),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\raz_inst|Add1~6 ),
+	.cin(\raz_inst|Add0~14 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\raz_inst|Add1~1_sumout ),
-	.cout(\raz_inst|Add1~2 ),
+	.sumout(\raz_inst|Add0~1_sumout ),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|Add1~1 .extended_lut = "off";
-defparam \raz_inst|Add1~1 .lut_mask = 64'h0000FFFF000000FF;
-defparam \raz_inst|Add1~1 .shared_arith = "off";
+defparam \raz_inst|Add0~1 .extended_lut = "off";
+defparam \raz_inst|Add0~1 .lut_mask = 64'h0000FFFF00003333;
+defparam \raz_inst|Add0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N21
-cyclonev_lcell_comb \raz_inst|Add1~9 (
+// Location: LABCELL_X45_Y12_N12
+cyclonev_lcell_comb \raz_inst|Add1~33 (
 // Equation(s):
-// \raz_inst|Add1~9_sumout  = SUM(( \raz_inst|V_count [7] ) + ( GND ) + ( \raz_inst|Add1~2  ))
-// \raz_inst|Add1~10  = CARRY(( \raz_inst|V_count [7] ) + ( GND ) + ( \raz_inst|Add1~2  ))
+// \raz_inst|Add1~33_sumout  = SUM(( \raz_inst|V_count [4] ) + ( GND ) + ( \raz_inst|Add1~30  ))
+// \raz_inst|Add1~34  = CARRY(( \raz_inst|V_count [4] ) + ( GND ) + ( \raz_inst|Add1~30  ))
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\raz_inst|V_count [7]),
+	.datad(!\raz_inst|V_count [4]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\raz_inst|Add1~2 ),
+	.cin(\raz_inst|Add1~30 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\raz_inst|Add1~9_sumout ),
-	.cout(\raz_inst|Add1~10 ),
+	.sumout(\raz_inst|Add1~33_sumout ),
+	.cout(\raz_inst|Add1~34 ),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|Add1~9 .extended_lut = "off";
-defparam \raz_inst|Add1~9 .lut_mask = 64'h0000FFFF000000FF;
-defparam \raz_inst|Add1~9 .shared_arith = "off";
+defparam \raz_inst|Add1~33 .extended_lut = "off";
+defparam \raz_inst|Add1~33 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N18
-cyclonev_lcell_comb \raz_inst|Equal0~3 (
+// Location: LABCELL_X45_Y12_N15
+cyclonev_lcell_comb \raz_inst|Add1~5 (
 // Equation(s):
-// \raz_inst|Equal0~3_combout  = ( \raz_inst|Add0~13_sumout  & ( (!\raz_inst|LessThan0~3_combout  & (!\raz_inst|Add0~1_sumout  & (!\raz_inst|Add0~9_sumout  & \raz_inst|Add0~5_sumout ))) ) )
+// \raz_inst|Add1~5_sumout  = SUM(( \raz_inst|V_count [5] ) + ( GND ) + ( \raz_inst|Add1~34  ))
+// \raz_inst|Add1~6  = CARRY(( \raz_inst|V_count [5] ) + ( GND ) + ( \raz_inst|Add1~34  ))
 
-	.dataa(!\raz_inst|LessThan0~3_combout ),
-	.datab(!\raz_inst|Add0~1_sumout ),
-	.datac(!\raz_inst|Add0~9_sumout ),
-	.datad(!\raz_inst|Add0~5_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\raz_inst|V_count [5]),
 	.datae(gnd),
-	.dataf(!\raz_inst|Add0~13_sumout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\raz_inst|Add1~34 ),
 	.sharein(gnd),
-	.combout(\raz_inst|Equal0~3_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\raz_inst|Add1~5_sumout ),
+	.cout(\raz_inst|Add1~6 ),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|Equal0~3 .extended_lut = "off";
-defparam \raz_inst|Equal0~3 .lut_mask = 64'h0000000000800080;
-defparam \raz_inst|Equal0~3 .shared_arith = "off";
+defparam \raz_inst|Add1~5 .extended_lut = "off";
+defparam \raz_inst|Add1~5 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N12
+// Location: MLABCELL_X47_Y12_N45
 cyclonev_lcell_comb \raz_inst|Equal0~1 (
 // Equation(s):
-// \raz_inst|Equal0~1_combout  = ( \raz_inst|Add0~29_sumout  & ( \raz_inst|Add0~25_sumout  ) )
+// \raz_inst|Equal0~1_combout  = ( \raz_inst|Add0~25_sumout  & ( \raz_inst|Add0~29_sumout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\raz_inst|Add0~25_sumout ),
-	.datae(gnd),
+	.datad(gnd),
+	.datae(!\raz_inst|Add0~25_sumout ),
 	.dataf(!\raz_inst|Add0~29_sumout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -109562,21 +110011,21 @@ cyclonev_lcell_comb \raz_inst|Equal0~1 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Equal0~1 .extended_lut = "off";
-defparam \raz_inst|Equal0~1 .lut_mask = 64'h0000000000FF00FF;
+defparam \raz_inst|Equal0~1 .lut_mask = 64'h000000000000FFFF;
 defparam \raz_inst|Equal0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N33
+// Location: MLABCELL_X47_Y12_N36
 cyclonev_lcell_comb \raz_inst|Equal0~0 (
 // Equation(s):
-// \raz_inst|Equal0~0_combout  = ( \raz_inst|Add0~41_sumout  & ( !\raz_inst|Add0~17_sumout  & ( (!\raz_inst|LessThan0~3_combout  & (\raz_inst|Add0~37_sumout  & (\raz_inst|Add0~33_sumout  & !\raz_inst|Add0~21_sumout ))) ) ) )
+// \raz_inst|Equal0~0_combout  = ( \raz_inst|Add0~33_sumout  & ( !\raz_inst|LessThan0~3_combout  & ( (!\raz_inst|Add0~21_sumout  & (\raz_inst|Add0~41_sumout  & (!\raz_inst|Add0~17_sumout  & \raz_inst|Add0~37_sumout ))) ) ) )
 
-	.dataa(!\raz_inst|LessThan0~3_combout ),
-	.datab(!\raz_inst|Add0~37_sumout ),
-	.datac(!\raz_inst|Add0~33_sumout ),
-	.datad(!\raz_inst|Add0~21_sumout ),
-	.datae(!\raz_inst|Add0~41_sumout ),
-	.dataf(!\raz_inst|Add0~17_sumout ),
+	.dataa(!\raz_inst|Add0~21_sumout ),
+	.datab(!\raz_inst|Add0~41_sumout ),
+	.datac(!\raz_inst|Add0~17_sumout ),
+	.datad(!\raz_inst|Add0~37_sumout ),
+	.datae(!\raz_inst|Add0~33_sumout ),
+	.dataf(!\raz_inst|LessThan0~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -109586,21 +110035,46 @@ cyclonev_lcell_comb \raz_inst|Equal0~0 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Equal0~0 .extended_lut = "off";
-defparam \raz_inst|Equal0~0 .lut_mask = 64'h0000020000000000;
+defparam \raz_inst|Equal0~0 .lut_mask = 64'h0000002000000000;
 defparam \raz_inst|Equal0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N45
+// Location: MLABCELL_X47_Y12_N51
+cyclonev_lcell_comb \raz_inst|Equal0~3 (
+// Equation(s):
+// \raz_inst|Equal0~3_combout  = ( !\raz_inst|LessThan0~3_combout  & ( !\raz_inst|Add0~1_sumout  & ( (\raz_inst|Add0~5_sumout  & (!\raz_inst|Add0~9_sumout  & \raz_inst|Add0~13_sumout )) ) ) )
+
+	.dataa(!\raz_inst|Add0~5_sumout ),
+	.datab(gnd),
+	.datac(!\raz_inst|Add0~9_sumout ),
+	.datad(!\raz_inst|Add0~13_sumout ),
+	.datae(!\raz_inst|LessThan0~3_combout ),
+	.dataf(!\raz_inst|Add0~1_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\raz_inst|Equal0~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \raz_inst|Equal0~3 .extended_lut = "off";
+defparam \raz_inst|Equal0~3 .lut_mask = 64'h0050000000000000;
+defparam \raz_inst|Equal0~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y12_N57
 cyclonev_lcell_comb \raz_inst|Equal0~4 (
 // Equation(s):
-// \raz_inst|Equal0~4_combout  = ( \raz_inst|Equal0~0_combout  & ( (!\raz_inst|Equal0~3_combout ) # (!\raz_inst|Equal0~1_combout ) ) ) # ( !\raz_inst|Equal0~0_combout  )
+// \raz_inst|Equal0~4_combout  = ( \raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~3_combout  & ( !\raz_inst|Equal0~1_combout  ) ) ) # ( !\raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~3_combout  ) ) # ( \raz_inst|Equal0~0_combout  & ( 
+// !\raz_inst|Equal0~3_combout  ) ) # ( !\raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~3_combout  ) )
 
-	.dataa(!\raz_inst|Equal0~3_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|Equal0~1_combout ),
-	.datae(gnd),
-	.dataf(!\raz_inst|Equal0~0_combout ),
+	.datac(!\raz_inst|Equal0~1_combout ),
+	.datad(gnd),
+	.datae(!\raz_inst|Equal0~0_combout ),
+	.dataf(!\raz_inst|Equal0~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -109610,11 +110084,99 @@ cyclonev_lcell_comb \raz_inst|Equal0~4 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Equal0~4 .extended_lut = "off";
-defparam \raz_inst|Equal0~4 .lut_mask = 64'hFFFFFFFFFFAAFFAA;
+defparam \raz_inst|Equal0~4 .lut_mask = 64'hFFFFFFFFFFFFF0F0;
 defparam \raz_inst|Equal0~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y15_N23
+// Location: FF_X45_Y12_N17
+dffeas \raz_inst|V_count[5] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|Add1~5_sumout ),
+	.asdata(\raz_inst|V_count [5]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|always0~14_combout ),
+	.sload(\raz_inst|Equal0~4_combout ),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|V_count [5]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[5] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N18
+cyclonev_lcell_comb \raz_inst|Add1~1 (
+// Equation(s):
+// \raz_inst|Add1~1_sumout  = SUM(( \raz_inst|V_count [6] ) + ( GND ) + ( \raz_inst|Add1~6  ))
+// \raz_inst|Add1~2  = CARRY(( \raz_inst|V_count [6] ) + ( GND ) + ( \raz_inst|Add1~6  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\raz_inst|V_count [6]),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\raz_inst|Add1~6 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\raz_inst|Add1~1_sumout ),
+	.cout(\raz_inst|Add1~2 ),
+	.shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~1 .extended_lut = "off";
+defparam \raz_inst|Add1~1 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N20
+dffeas \raz_inst|V_count[6] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|Add1~1_sumout ),
+	.asdata(\raz_inst|V_count [6]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|always0~14_combout ),
+	.sload(\raz_inst|Equal0~4_combout ),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|V_count [6]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[6] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N21
+cyclonev_lcell_comb \raz_inst|Add1~9 (
+// Equation(s):
+// \raz_inst|Add1~9_sumout  = SUM(( \raz_inst|V_count [7] ) + ( GND ) + ( \raz_inst|Add1~2  ))
+// \raz_inst|Add1~10  = CARRY(( \raz_inst|V_count [7] ) + ( GND ) + ( \raz_inst|Add1~2  ))
+
+	.dataa(!\raz_inst|V_count [7]),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\raz_inst|Add1~2 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\raz_inst|Add1~9_sumout ),
+	.cout(\raz_inst|Add1~10 ),
+	.shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~9 .extended_lut = "off";
+defparam \raz_inst|Add1~9 .lut_mask = 64'h0000FFFF00005555;
+defparam \raz_inst|Add1~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N23
 dffeas \raz_inst|V_count[7] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~9_sumout ),
@@ -109633,7 +110195,7 @@ defparam \raz_inst|V_count[7] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[7] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N24
+// Location: LABCELL_X45_Y12_N24
 cyclonev_lcell_comb \raz_inst|Add1~13 (
 // Equation(s):
 // \raz_inst|Add1~13_sumout  = SUM(( \raz_inst|V_count [8] ) + ( GND ) + ( \raz_inst|Add1~10  ))
@@ -109658,7 +110220,7 @@ defparam \raz_inst|Add1~13 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add1~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y15_N26
+// Location: FF_X45_Y12_N26
 dffeas \raz_inst|V_count[8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~13_sumout ),
@@ -109677,7 +110239,7 @@ defparam \raz_inst|V_count[8] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[8] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N27
+// Location: LABCELL_X45_Y12_N27
 cyclonev_lcell_comb \raz_inst|Add1~17 (
 // Equation(s):
 // \raz_inst|Add1~17_sumout  = SUM(( \raz_inst|V_count [9] ) + ( GND ) + ( \raz_inst|Add1~14  ))
@@ -109702,7 +110264,7 @@ defparam \raz_inst|Add1~17 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add1~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y15_N29
+// Location: FF_X45_Y12_N29
 dffeas \raz_inst|V_count[9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~17_sumout ),
@@ -109721,15 +110283,15 @@ defparam \raz_inst|V_count[9] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[9] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N30
+// Location: LABCELL_X45_Y12_N30
 cyclonev_lcell_comb \raz_inst|Add1~21 (
 // Equation(s):
 // \raz_inst|Add1~21_sumout  = SUM(( \raz_inst|V_count [10] ) + ( GND ) + ( \raz_inst|Add1~18  ))
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\raz_inst|V_count [10]),
 	.datac(gnd),
-	.datad(!\raz_inst|V_count [10]),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
@@ -109741,11 +110303,11 @@ cyclonev_lcell_comb \raz_inst|Add1~21 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Add1~21 .extended_lut = "off";
-defparam \raz_inst|Add1~21 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~21 .lut_mask = 64'h0000FFFF00003333;
 defparam \raz_inst|Add1~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y15_N32
+// Location: FF_X45_Y12_N32
 dffeas \raz_inst|V_count[10] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~21_sumout ),
@@ -109764,17 +110326,17 @@ defparam \raz_inst|V_count[10] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[10] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N54
+// Location: LABCELL_X45_Y12_N48
 cyclonev_lcell_comb \raz_inst|always0~2 (
 // Equation(s):
-// \raz_inst|always0~2_combout  = ( !\raz_inst|V_count [6] & ( (!\raz_inst|V_count [8] & (!\raz_inst|V_count [7] & !\raz_inst|V_count [5])) ) )
+// \raz_inst|always0~2_combout  = ( !\raz_inst|V_count [7] & ( (!\raz_inst|V_count [6] & (!\raz_inst|V_count [8] & !\raz_inst|V_count [5])) ) )
 
 	.dataa(gnd),
-	.datab(!\raz_inst|V_count [8]),
-	.datac(!\raz_inst|V_count [7]),
+	.datab(!\raz_inst|V_count [6]),
+	.datac(!\raz_inst|V_count [8]),
 	.datad(!\raz_inst|V_count [5]),
 	.datae(gnd),
-	.dataf(!\raz_inst|V_count [6]),
+	.dataf(!\raz_inst|V_count [7]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -109788,17 +110350,17 @@ defparam \raz_inst|always0~2 .lut_mask = 64'hC000C00000000000;
 defparam \raz_inst|always0~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N54
+// Location: LABCELL_X46_Y12_N18
 cyclonev_lcell_comb \raz_inst|always0~3 (
 // Equation(s):
-// \raz_inst|always0~3_combout  = ( \raz_inst|always0~2_combout  & ( (!\raz_inst|V_count [4] & ((!\raz_inst|V_count [2]) # (!\raz_inst|V_count [3]))) ) )
+// \raz_inst|always0~3_combout  = ( \raz_inst|V_count [3] & ( (\raz_inst|always0~2_combout  & (!\raz_inst|V_count [4] & !\raz_inst|V_count [2])) ) ) # ( !\raz_inst|V_count [3] & ( (\raz_inst|always0~2_combout  & !\raz_inst|V_count [4]) ) )
 
 	.dataa(gnd),
-	.datab(!\raz_inst|V_count [2]),
+	.datab(!\raz_inst|always0~2_combout ),
 	.datac(!\raz_inst|V_count [4]),
-	.datad(!\raz_inst|V_count [3]),
+	.datad(!\raz_inst|V_count [2]),
 	.datae(gnd),
-	.dataf(!\raz_inst|always0~2_combout ),
+	.dataf(!\raz_inst|V_count [3]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -109808,20 +110370,20 @@ cyclonev_lcell_comb \raz_inst|always0~3 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~3 .extended_lut = "off";
-defparam \raz_inst|always0~3 .lut_mask = 64'h00000000F0C0F0C0;
+defparam \raz_inst|always0~3 .lut_mask = 64'h3030303030003000;
 defparam \raz_inst|always0~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N12
+// Location: LABCELL_X46_Y12_N21
 cyclonev_lcell_comb \raz_inst|always0~4 (
 // Equation(s):
 // \raz_inst|always0~4_combout  = ( \raz_inst|always0~3_combout  & ( (\raz_inst|V_count [10] & !\raz_inst|LessThan0~3_combout ) ) ) # ( !\raz_inst|always0~3_combout  & ( (!\raz_inst|LessThan0~3_combout  & ((\raz_inst|V_count [9]) # (\raz_inst|V_count [10]))) 
 // ) )
 
-	.dataa(gnd),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(!\raz_inst|LessThan0~3_combout ),
-	.datad(!\raz_inst|V_count [9]),
+	.dataa(!\raz_inst|V_count [10]),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [9]),
+	.datad(!\raz_inst|LessThan0~3_combout ),
 	.datae(gnd),
 	.dataf(!\raz_inst|always0~3_combout ),
 	.datag(gnd),
@@ -109833,21 +110395,22 @@ cyclonev_lcell_comb \raz_inst|always0~4 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~4 .extended_lut = "off";
-defparam \raz_inst|always0~4 .lut_mask = 64'h30F030F030303030;
+defparam \raz_inst|always0~4 .lut_mask = 64'h5F005F0055005500;
 defparam \raz_inst|always0~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N36
+// Location: LABCELL_X43_Y12_N54
 cyclonev_lcell_comb \raz_inst|LessThan4~1 (
 // Equation(s):
-// \raz_inst|LessThan4~1_combout  = ( !\raz_inst|H_count [10] & ( \raz_inst|Add0~29_sumout  & ( (\raz_inst|Add0~25_sumout  & ((!\raz_inst|LessThan0~2_combout ) # ((\raz_inst|LessThan0~0_combout  & \raz_inst|LessThan0~1_combout )))) ) ) )
+// \raz_inst|LessThan4~1_combout  = ( \raz_inst|Add0~29_sumout  & ( \raz_inst|LessThan0~1_combout  & ( (!\raz_inst|H_count [10] & (\raz_inst|Add0~25_sumout  & ((!\raz_inst|LessThan0~2_combout ) # (\raz_inst|LessThan0~0_combout )))) ) ) ) # ( 
+// \raz_inst|Add0~29_sumout  & ( !\raz_inst|LessThan0~1_combout  & ( (!\raz_inst|LessThan0~2_combout  & (!\raz_inst|H_count [10] & \raz_inst|Add0~25_sumout )) ) ) )
 
 	.dataa(!\raz_inst|LessThan0~2_combout ),
-	.datab(!\raz_inst|LessThan0~0_combout ),
-	.datac(!\raz_inst|LessThan0~1_combout ),
-	.datad(!\raz_inst|Add0~25_sumout ),
-	.datae(!\raz_inst|H_count [10]),
-	.dataf(!\raz_inst|Add0~29_sumout ),
+	.datab(!\raz_inst|H_count [10]),
+	.datac(!\raz_inst|Add0~25_sumout ),
+	.datad(!\raz_inst|LessThan0~0_combout ),
+	.datae(!\raz_inst|Add0~29_sumout ),
+	.dataf(!\raz_inst|LessThan0~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -109857,19 +110420,19 @@ cyclonev_lcell_comb \raz_inst|LessThan4~1 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|LessThan4~1 .extended_lut = "off";
-defparam \raz_inst|LessThan4~1 .lut_mask = 64'h0000000000AB0000;
+defparam \raz_inst|LessThan4~1 .lut_mask = 64'h000008080000080C;
 defparam \raz_inst|LessThan4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N51
+// Location: LABCELL_X43_Y12_N48
 cyclonev_lcell_comb \raz_inst|H_count~1 (
 // Equation(s):
-// \raz_inst|H_count~1_combout  = ( \raz_inst|Add0~37_sumout  & ( (!\raz_inst|H_count [10] & ((!\raz_inst|LessThan0~2_combout ) # ((\raz_inst|LessThan0~1_combout  & \raz_inst|LessThan0~0_combout )))) ) )
+// \raz_inst|H_count~1_combout  = ( \raz_inst|Add0~37_sumout  & ( (!\raz_inst|H_count [10] & ((!\raz_inst|LessThan0~2_combout ) # ((\raz_inst|LessThan0~0_combout  & \raz_inst|LessThan0~1_combout )))) ) )
 
-	.dataa(!\raz_inst|LessThan0~1_combout ),
-	.datab(!\raz_inst|LessThan0~2_combout ),
+	.dataa(!\raz_inst|LessThan0~2_combout ),
+	.datab(!\raz_inst|H_count [10]),
 	.datac(!\raz_inst|LessThan0~0_combout ),
-	.datad(!\raz_inst|H_count [10]),
+	.datad(!\raz_inst|LessThan0~1_combout ),
 	.datae(gnd),
 	.dataf(!\raz_inst|Add0~37_sumout ),
 	.datag(gnd),
@@ -109881,21 +110444,22 @@ cyclonev_lcell_comb \raz_inst|H_count~1 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|H_count~1 .extended_lut = "off";
-defparam \raz_inst|H_count~1 .lut_mask = 64'h00000000CD00CD00;
+defparam \raz_inst|H_count~1 .lut_mask = 64'h00000000888C888C;
 defparam \raz_inst|H_count~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N48
+// Location: LABCELL_X43_Y12_N51
 cyclonev_lcell_comb \raz_inst|H_count~0 (
 // Equation(s):
-// \raz_inst|H_count~0_combout  = ( \raz_inst|Add0~21_sumout  & ( (!\raz_inst|H_count [10] & ((!\raz_inst|LessThan0~2_combout ) # ((\raz_inst|LessThan0~1_combout  & \raz_inst|LessThan0~0_combout )))) ) )
+// \raz_inst|H_count~0_combout  = ( \raz_inst|LessThan0~1_combout  & ( (!\raz_inst|H_count [10] & (\raz_inst|Add0~21_sumout  & ((!\raz_inst|LessThan0~2_combout ) # (\raz_inst|LessThan0~0_combout )))) ) ) # ( !\raz_inst|LessThan0~1_combout  & ( 
+// (!\raz_inst|LessThan0~2_combout  & (!\raz_inst|H_count [10] & \raz_inst|Add0~21_sumout )) ) )
 
-	.dataa(!\raz_inst|LessThan0~1_combout ),
-	.datab(!\raz_inst|LessThan0~2_combout ),
+	.dataa(!\raz_inst|LessThan0~2_combout ),
+	.datab(!\raz_inst|H_count [10]),
 	.datac(!\raz_inst|LessThan0~0_combout ),
-	.datad(!\raz_inst|H_count [10]),
+	.datad(!\raz_inst|Add0~21_sumout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|Add0~21_sumout ),
+	.dataf(!\raz_inst|LessThan0~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -109905,22 +110469,22 @@ cyclonev_lcell_comb \raz_inst|H_count~0 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|H_count~0 .extended_lut = "off";
-defparam \raz_inst|H_count~0 .lut_mask = 64'h00000000CD00CD00;
+defparam \raz_inst|H_count~0 .lut_mask = 64'h00880088008C008C;
 defparam \raz_inst|H_count~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N0
+// Location: MLABCELL_X47_Y12_N30
 cyclonev_lcell_comb \raz_inst|always0~13 (
 // Equation(s):
-// \raz_inst|always0~13_combout  = ( \raz_inst|Add0~41_sumout  & ( \raz_inst|H_count~0_combout  & ( (!\raz_inst|Add0~17_sumout  & ((!\raz_inst|Add0~33_sumout ) # (!\raz_inst|H_count~1_combout ))) ) ) ) # ( !\raz_inst|Add0~41_sumout  & ( 
-// \raz_inst|H_count~0_combout  & ( !\raz_inst|Add0~17_sumout  ) ) ) # ( \raz_inst|Add0~41_sumout  & ( !\raz_inst|H_count~0_combout  & ( (!\raz_inst|Add0~17_sumout  & ((!\raz_inst|LessThan4~1_combout ) # ((!\raz_inst|Add0~33_sumout ) # 
-// (!\raz_inst|H_count~1_combout )))) ) ) ) # ( !\raz_inst|Add0~41_sumout  & ( !\raz_inst|H_count~0_combout  & ( !\raz_inst|Add0~17_sumout  ) ) )
+// \raz_inst|always0~13_combout  = ( \raz_inst|H_count~1_combout  & ( \raz_inst|H_count~0_combout  & ( (!\raz_inst|Add0~17_sumout  & ((!\raz_inst|Add0~33_sumout ) # (!\raz_inst|Add0~41_sumout ))) ) ) ) # ( !\raz_inst|H_count~1_combout  & ( 
+// \raz_inst|H_count~0_combout  & ( !\raz_inst|Add0~17_sumout  ) ) ) # ( \raz_inst|H_count~1_combout  & ( !\raz_inst|H_count~0_combout  & ( (!\raz_inst|Add0~17_sumout  & ((!\raz_inst|LessThan4~1_combout ) # ((!\raz_inst|Add0~33_sumout ) # 
+// (!\raz_inst|Add0~41_sumout )))) ) ) ) # ( !\raz_inst|H_count~1_combout  & ( !\raz_inst|H_count~0_combout  & ( !\raz_inst|Add0~17_sumout  ) ) )
 
 	.dataa(!\raz_inst|LessThan4~1_combout ),
-	.datab(!\raz_inst|Add0~33_sumout ),
-	.datac(!\raz_inst|H_count~1_combout ),
-	.datad(!\raz_inst|Add0~17_sumout ),
-	.datae(!\raz_inst|Add0~41_sumout ),
+	.datab(!\raz_inst|Add0~17_sumout ),
+	.datac(!\raz_inst|Add0~33_sumout ),
+	.datad(!\raz_inst|Add0~41_sumout ),
+	.datae(!\raz_inst|H_count~1_combout ),
 	.dataf(!\raz_inst|H_count~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -109931,23 +110495,21 @@ cyclonev_lcell_comb \raz_inst|always0~13 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~13 .extended_lut = "off";
-defparam \raz_inst|always0~13 .lut_mask = 64'hFF00FE00FF00FC00;
+defparam \raz_inst|always0~13 .lut_mask = 64'hCCCCCCC8CCCCCCC0;
 defparam \raz_inst|always0~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N6
+// Location: LABCELL_X46_Y12_N45
 cyclonev_lcell_comb \raz_inst|always0~14 (
 // Equation(s):
-// \raz_inst|always0~14_combout  = ( \raz_inst|Add0~5_sumout  & ( \raz_inst|always0~13_combout  & ( (\raz_inst|always0~4_combout  & (((\raz_inst|Add0~13_sumout  & \raz_inst|Add0~9_sumout )) # (\raz_inst|Add0~1_sumout ))) ) ) ) # ( !\raz_inst|Add0~5_sumout  & 
-// ( \raz_inst|always0~13_combout  & ( (\raz_inst|always0~4_combout  & (((\raz_inst|Add0~13_sumout  & \raz_inst|Add0~9_sumout )) # (\raz_inst|Add0~1_sumout ))) ) ) ) # ( \raz_inst|Add0~5_sumout  & ( !\raz_inst|always0~13_combout  & ( 
-// (\raz_inst|always0~4_combout  & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|Add0~13_sumout ))) ) ) ) # ( !\raz_inst|Add0~5_sumout  & ( !\raz_inst|always0~13_combout  & ( (\raz_inst|always0~4_combout  & (((\raz_inst|Add0~13_sumout  & \raz_inst|Add0~9_sumout 
-// )) # (\raz_inst|Add0~1_sumout ))) ) ) )
+// \raz_inst|always0~14_combout  = ( \raz_inst|always0~4_combout  & ( \raz_inst|always0~13_combout  & ( ((\raz_inst|Add0~13_sumout  & \raz_inst|Add0~9_sumout )) # (\raz_inst|Add0~1_sumout ) ) ) ) # ( \raz_inst|always0~4_combout  & ( 
+// !\raz_inst|always0~13_combout  & ( ((\raz_inst|Add0~13_sumout  & ((\raz_inst|Add0~9_sumout ) # (\raz_inst|Add0~5_sumout )))) # (\raz_inst|Add0~1_sumout ) ) ) )
 
-	.dataa(!\raz_inst|Add0~13_sumout ),
-	.datab(!\raz_inst|Add0~1_sumout ),
-	.datac(!\raz_inst|Add0~9_sumout ),
-	.datad(!\raz_inst|always0~4_combout ),
-	.datae(!\raz_inst|Add0~5_sumout ),
+	.dataa(!\raz_inst|Add0~1_sumout ),
+	.datab(!\raz_inst|Add0~5_sumout ),
+	.datac(!\raz_inst|Add0~13_sumout ),
+	.datad(!\raz_inst|Add0~9_sumout ),
+	.datae(!\raz_inst|always0~4_combout ),
 	.dataf(!\raz_inst|always0~13_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -109958,11 +110520,11 @@ cyclonev_lcell_comb \raz_inst|always0~14 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~14 .extended_lut = "off";
-defparam \raz_inst|always0~14 .lut_mask = 64'h0037007700370037;
+defparam \raz_inst|always0~14 .lut_mask = 64'h0000575F0000555F;
 defparam \raz_inst|always0~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y15_N2
+// Location: FF_X45_Y12_N2
 dffeas \raz_inst|V_count[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~37_sumout ),
@@ -109981,7 +110543,7 @@ defparam \raz_inst|V_count[0] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N3
+// Location: LABCELL_X45_Y12_N3
 cyclonev_lcell_comb \raz_inst|Add1~41 (
 // Equation(s):
 // \raz_inst|Add1~41_sumout  = SUM(( \raz_inst|V_count [1] ) + ( GND ) + ( \raz_inst|Add1~38  ))
@@ -110006,7 +110568,7 @@ defparam \raz_inst|Add1~41 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add1~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y15_N5
+// Location: FF_X45_Y12_N5
 dffeas \raz_inst|V_count[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~41_sumout ),
@@ -110025,7 +110587,7 @@ defparam \raz_inst|V_count[1] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N6
+// Location: LABCELL_X45_Y12_N6
 cyclonev_lcell_comb \raz_inst|Add1~25 (
 // Equation(s):
 // \raz_inst|Add1~25_sumout  = SUM(( \raz_inst|V_count [2] ) + ( GND ) + ( \raz_inst|Add1~42  ))
@@ -110050,7 +110612,7 @@ defparam \raz_inst|Add1~25 .lut_mask = 64'h0000FFFF00003333;
 defparam \raz_inst|Add1~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y15_N8
+// Location: FF_X45_Y12_N8
 dffeas \raz_inst|V_count[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~25_sumout ),
@@ -110069,7 +110631,7 @@ defparam \raz_inst|V_count[2] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N9
+// Location: LABCELL_X45_Y12_N9
 cyclonev_lcell_comb \raz_inst|Add1~29 (
 // Equation(s):
 // \raz_inst|Add1~29_sumout  = SUM(( \raz_inst|V_count [3] ) + ( GND ) + ( \raz_inst|Add1~26  ))
@@ -110094,7 +110656,7 @@ defparam \raz_inst|Add1~29 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add1~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y15_N11
+// Location: FF_X45_Y12_N11
 dffeas \raz_inst|V_count[3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~29_sumout ),
@@ -110113,32 +110675,7 @@ defparam \raz_inst|V_count[3] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N12
-cyclonev_lcell_comb \raz_inst|Add1~33 (
-// Equation(s):
-// \raz_inst|Add1~33_sumout  = SUM(( \raz_inst|V_count [4] ) + ( GND ) + ( \raz_inst|Add1~30  ))
-// \raz_inst|Add1~34  = CARRY(( \raz_inst|V_count [4] ) + ( GND ) + ( \raz_inst|Add1~30  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|V_count [4]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\raz_inst|Add1~30 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\raz_inst|Add1~33_sumout ),
-	.cout(\raz_inst|Add1~34 ),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Add1~33 .extended_lut = "off";
-defparam \raz_inst|Add1~33 .lut_mask = 64'h0000FFFF000000FF;
-defparam \raz_inst|Add1~33 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y15_N14
+// Location: FF_X45_Y12_N14
 dffeas \raz_inst|V_count[4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~33_sumout ),
@@ -110157,70 +110694,7 @@ defparam \raz_inst|V_count[4] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[4] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N15
-cyclonev_lcell_comb \raz_inst|Add1~5 (
-// Equation(s):
-// \raz_inst|Add1~5_sumout  = SUM(( \raz_inst|V_count [5] ) + ( GND ) + ( \raz_inst|Add1~34  ))
-// \raz_inst|Add1~6  = CARRY(( \raz_inst|V_count [5] ) + ( GND ) + ( \raz_inst|Add1~34  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\raz_inst|V_count [5]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\raz_inst|Add1~34 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\raz_inst|Add1~5_sumout ),
-	.cout(\raz_inst|Add1~6 ),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Add1~5 .extended_lut = "off";
-defparam \raz_inst|Add1~5 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \raz_inst|Add1~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y15_N17
-dffeas \raz_inst|V_count[5] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add1~5_sumout ),
-	.asdata(\raz_inst|V_count [5]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|always0~14_combout ),
-	.sload(\raz_inst|Equal0~4_combout ),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|V_count [5]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|V_count[5] .is_wysiwyg = "true";
-defparam \raz_inst|V_count[5] .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X31_Y15_N20
-dffeas \raz_inst|V_count[6] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add1~1_sumout ),
-	.asdata(\raz_inst|V_count [6]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|always0~14_combout ),
-	.sload(\raz_inst|Equal0~4_combout ),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|V_count [6]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|V_count[6] .is_wysiwyg = "true";
-defparam \raz_inst|V_count[6] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y15_N0
+// Location: LABCELL_X42_Y12_N0
 cyclonev_lcell_comb \soc_inst|pix1|Add1~25 (
 // Equation(s):
 // \soc_inst|pix1|Add1~25_sumout  = SUM(( !\raz_inst|H_count [7] $ (!\raz_inst|V_count [0]) ) + ( !VCC ) + ( !VCC ))
@@ -110246,17 +110720,17 @@ defparam \soc_inst|pix1|Add1~25 .lut_mask = 64'h0000000F00000FF0;
 defparam \soc_inst|pix1|Add1~25 .shared_arith = "on";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N3
+// Location: LABCELL_X42_Y12_N3
 cyclonev_lcell_comb \soc_inst|pix1|Add1~29 (
 // Equation(s):
-// \soc_inst|pix1|Add1~29_sumout  = SUM(( !\raz_inst|V_count [1] $ (!\raz_inst|H_count [8]) ) + ( \soc_inst|pix1|Add1~27  ) + ( \soc_inst|pix1|Add1~26  ))
-// \soc_inst|pix1|Add1~30  = CARRY(( !\raz_inst|V_count [1] $ (!\raz_inst|H_count [8]) ) + ( \soc_inst|pix1|Add1~27  ) + ( \soc_inst|pix1|Add1~26  ))
-// \soc_inst|pix1|Add1~31  = SHARE((\raz_inst|V_count [1] & \raz_inst|H_count [8]))
+// \soc_inst|pix1|Add1~29_sumout  = SUM(( !\raz_inst|H_count [8] $ (!\raz_inst|V_count [1]) ) + ( \soc_inst|pix1|Add1~27  ) + ( \soc_inst|pix1|Add1~26  ))
+// \soc_inst|pix1|Add1~30  = CARRY(( !\raz_inst|H_count [8] $ (!\raz_inst|V_count [1]) ) + ( \soc_inst|pix1|Add1~27  ) + ( \soc_inst|pix1|Add1~26  ))
+// \soc_inst|pix1|Add1~31  = SHARE((\raz_inst|H_count [8] & \raz_inst|V_count [1]))
 
-	.dataa(!\raz_inst|V_count [1]),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|H_count [8]),
+	.datac(!\raz_inst|H_count [8]),
+	.datad(!\raz_inst|V_count [1]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
@@ -110268,21 +110742,21 @@ cyclonev_lcell_comb \soc_inst|pix1|Add1~29 (
 	.shareout(\soc_inst|pix1|Add1~31 ));
 // synopsys translate_off
 defparam \soc_inst|pix1|Add1~29 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~29 .lut_mask = 64'h00000055000055AA;
+defparam \soc_inst|pix1|Add1~29 .lut_mask = 64'h0000000F00000FF0;
 defparam \soc_inst|pix1|Add1~29 .shared_arith = "on";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N6
+// Location: LABCELL_X42_Y12_N6
 cyclonev_lcell_comb \soc_inst|pix1|Add1~33 (
 // Equation(s):
-// \soc_inst|pix1|Add1~33_sumout  = SUM(( !\raz_inst|V_count [0] $ (!\raz_inst|V_count [2] $ (\raz_inst|H_count [9])) ) + ( \soc_inst|pix1|Add1~31  ) + ( \soc_inst|pix1|Add1~30  ))
-// \soc_inst|pix1|Add1~34  = CARRY(( !\raz_inst|V_count [0] $ (!\raz_inst|V_count [2] $ (\raz_inst|H_count [9])) ) + ( \soc_inst|pix1|Add1~31  ) + ( \soc_inst|pix1|Add1~30  ))
-// \soc_inst|pix1|Add1~35  = SHARE((!\raz_inst|V_count [0] & (\raz_inst|V_count [2] & \raz_inst|H_count [9])) # (\raz_inst|V_count [0] & ((\raz_inst|H_count [9]) # (\raz_inst|V_count [2]))))
+// \soc_inst|pix1|Add1~33_sumout  = SUM(( !\raz_inst|H_count [9] $ (!\raz_inst|V_count [2] $ (\raz_inst|V_count [0])) ) + ( \soc_inst|pix1|Add1~31  ) + ( \soc_inst|pix1|Add1~30  ))
+// \soc_inst|pix1|Add1~34  = CARRY(( !\raz_inst|H_count [9] $ (!\raz_inst|V_count [2] $ (\raz_inst|V_count [0])) ) + ( \soc_inst|pix1|Add1~31  ) + ( \soc_inst|pix1|Add1~30  ))
+// \soc_inst|pix1|Add1~35  = SHARE((!\raz_inst|H_count [9] & (\raz_inst|V_count [2] & \raz_inst|V_count [0])) # (\raz_inst|H_count [9] & ((\raz_inst|V_count [0]) # (\raz_inst|V_count [2]))))
 
-	.dataa(!\raz_inst|V_count [0]),
+	.dataa(!\raz_inst|H_count [9]),
 	.datab(gnd),
 	.datac(!\raz_inst|V_count [2]),
-	.datad(!\raz_inst|H_count [9]),
+	.datad(!\raz_inst|V_count [0]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
@@ -110298,7 +110772,7 @@ defparam \soc_inst|pix1|Add1~33 .lut_mask = 64'h0000055F00005AA5;
 defparam \soc_inst|pix1|Add1~33 .shared_arith = "on";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N9
+// Location: LABCELL_X42_Y12_N9
 cyclonev_lcell_comb \soc_inst|pix1|Add1~37 (
 // Equation(s):
 // \soc_inst|pix1|Add1~37_sumout  = SUM(( !\raz_inst|V_count [3] $ (!\raz_inst|V_count [1]) ) + ( \soc_inst|pix1|Add1~35  ) + ( \soc_inst|pix1|Add1~34  ))
@@ -110324,7 +110798,7 @@ defparam \soc_inst|pix1|Add1~37 .lut_mask = 64'h0000000F00000FF0;
 defparam \soc_inst|pix1|Add1~37 .shared_arith = "on";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N12
+// Location: LABCELL_X42_Y12_N12
 cyclonev_lcell_comb \soc_inst|pix1|Add1~41 (
 // Equation(s):
 // \soc_inst|pix1|Add1~41_sumout  = SUM(( !\raz_inst|V_count [4] $ (!\raz_inst|V_count [2]) ) + ( \soc_inst|pix1|Add1~39  ) + ( \soc_inst|pix1|Add1~38  ))
@@ -110332,8 +110806,8 @@ cyclonev_lcell_comb \soc_inst|pix1|Add1~41 (
 // \soc_inst|pix1|Add1~43  = SHARE((\raz_inst|V_count [4] & \raz_inst|V_count [2]))
 
 	.dataa(gnd),
-	.datab(!\raz_inst|V_count [4]),
-	.datac(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [4]),
 	.datad(!\raz_inst|V_count [2]),
 	.datae(gnd),
 	.dataf(gnd),
@@ -110346,21 +110820,21 @@ cyclonev_lcell_comb \soc_inst|pix1|Add1~41 (
 	.shareout(\soc_inst|pix1|Add1~43 ));
 // synopsys translate_off
 defparam \soc_inst|pix1|Add1~41 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~41 .lut_mask = 64'h00000033000033CC;
+defparam \soc_inst|pix1|Add1~41 .lut_mask = 64'h0000000F00000FF0;
 defparam \soc_inst|pix1|Add1~41 .shared_arith = "on";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N15
+// Location: LABCELL_X42_Y12_N15
 cyclonev_lcell_comb \soc_inst|pix1|Add1~45 (
 // Equation(s):
-// \soc_inst|pix1|Add1~45_sumout  = SUM(( !\raz_inst|V_count [5] $ (!\raz_inst|V_count [3]) ) + ( \soc_inst|pix1|Add1~43  ) + ( \soc_inst|pix1|Add1~42  ))
-// \soc_inst|pix1|Add1~46  = CARRY(( !\raz_inst|V_count [5] $ (!\raz_inst|V_count [3]) ) + ( \soc_inst|pix1|Add1~43  ) + ( \soc_inst|pix1|Add1~42  ))
-// \soc_inst|pix1|Add1~47  = SHARE((\raz_inst|V_count [5] & \raz_inst|V_count [3]))
+// \soc_inst|pix1|Add1~45_sumout  = SUM(( !\raz_inst|V_count [3] $ (!\raz_inst|V_count [5]) ) + ( \soc_inst|pix1|Add1~43  ) + ( \soc_inst|pix1|Add1~42  ))
+// \soc_inst|pix1|Add1~46  = CARRY(( !\raz_inst|V_count [3] $ (!\raz_inst|V_count [5]) ) + ( \soc_inst|pix1|Add1~43  ) + ( \soc_inst|pix1|Add1~42  ))
+// \soc_inst|pix1|Add1~47  = SHARE((\raz_inst|V_count [3] & \raz_inst|V_count [5]))
 
-	.dataa(!\raz_inst|V_count [5]),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|V_count [3]),
+	.datac(!\raz_inst|V_count [3]),
+	.datad(!\raz_inst|V_count [5]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
@@ -110372,11 +110846,11 @@ cyclonev_lcell_comb \soc_inst|pix1|Add1~45 (
 	.shareout(\soc_inst|pix1|Add1~47 ));
 // synopsys translate_off
 defparam \soc_inst|pix1|Add1~45 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~45 .lut_mask = 64'h00000055000055AA;
+defparam \soc_inst|pix1|Add1~45 .lut_mask = 64'h0000000F00000FF0;
 defparam \soc_inst|pix1|Add1~45 .shared_arith = "on";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N18
+// Location: LABCELL_X42_Y12_N18
 cyclonev_lcell_comb \soc_inst|pix1|Add1~17 (
 // Equation(s):
 // \soc_inst|pix1|Add1~17_sumout  = SUM(( !\raz_inst|V_count [4] $ (!\raz_inst|V_count [6]) ) + ( \soc_inst|pix1|Add1~47  ) + ( \soc_inst|pix1|Add1~46  ))
@@ -110384,8 +110858,8 @@ cyclonev_lcell_comb \soc_inst|pix1|Add1~17 (
 // \soc_inst|pix1|Add1~19  = SHARE((\raz_inst|V_count [4] & \raz_inst|V_count [6]))
 
 	.dataa(gnd),
-	.datab(!\raz_inst|V_count [4]),
-	.datac(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [4]),
 	.datad(!\raz_inst|V_count [6]),
 	.datae(gnd),
 	.dataf(gnd),
@@ -110398,66 +110872,38 @@ cyclonev_lcell_comb \soc_inst|pix1|Add1~17 (
 	.shareout(\soc_inst|pix1|Add1~19 ));
 // synopsys translate_off
 defparam \soc_inst|pix1|Add1~17 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~17 .lut_mask = 64'h00000033000033CC;
+defparam \soc_inst|pix1|Add1~17 .lut_mask = 64'h0000000F00000FF0;
 defparam \soc_inst|pix1|Add1~17 .shared_arith = "on";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N21
-cyclonev_lcell_comb \soc_inst|pix1|Add1~21 (
+// Location: MLABCELL_X39_Y12_N12
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~feeder (
 // Equation(s):
-// \soc_inst|pix1|Add1~21_sumout  = SUM(( !\raz_inst|V_count [7] $ (!\raz_inst|V_count [5]) ) + ( \soc_inst|pix1|Add1~19  ) + ( \soc_inst|pix1|Add1~18  ))
-// \soc_inst|pix1|Add1~22  = CARRY(( !\raz_inst|V_count [7] $ (!\raz_inst|V_count [5]) ) + ( \soc_inst|pix1|Add1~19  ) + ( \soc_inst|pix1|Add1~18  ))
-// \soc_inst|pix1|Add1~23  = SHARE((\raz_inst|V_count [7] & \raz_inst|V_count [5]))
-
-	.dataa(!\raz_inst|V_count [7]),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|V_count [5]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|pix1|Add1~18 ),
-	.sharein(\soc_inst|pix1|Add1~19 ),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add1~21_sumout ),
-	.cout(\soc_inst|pix1|Add1~22 ),
-	.shareout(\soc_inst|pix1|Add1~23 ));
-// synopsys translate_off
-defparam \soc_inst|pix1|Add1~21 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~21 .lut_mask = 64'h00000055000055AA;
-defparam \soc_inst|pix1|Add1~21 .shared_arith = "on";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y15_N24
-cyclonev_lcell_comb \soc_inst|pix1|Add1~13 (
-// Equation(s):
-// \soc_inst|pix1|Add1~13_sumout  = SUM(( !\raz_inst|V_count [6] $ (!\raz_inst|V_count [8]) ) + ( \soc_inst|pix1|Add1~23  ) + ( \soc_inst|pix1|Add1~22  ))
-// \soc_inst|pix1|Add1~14  = CARRY(( !\raz_inst|V_count [6] $ (!\raz_inst|V_count [8]) ) + ( \soc_inst|pix1|Add1~23  ) + ( \soc_inst|pix1|Add1~22  ))
-// \soc_inst|pix1|Add1~15  = SHARE((\raz_inst|V_count [6] & \raz_inst|V_count [8]))
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~feeder_combout  = ( \soc_inst|pix1|Add1~17_sumout  )
 
 	.dataa(gnd),
-	.datab(!\raz_inst|V_count [6]),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\raz_inst|V_count [8]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|pix1|Add1~17_sumout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add1~22 ),
-	.sharein(\soc_inst|pix1|Add1~23 ),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add1~13_sumout ),
-	.cout(\soc_inst|pix1|Add1~14 ),
-	.shareout(\soc_inst|pix1|Add1~15 ));
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add1~13 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~13 .lut_mask = 64'h00000033000033CC;
-defparam \soc_inst|pix1|Add1~13 .shared_arith = "on";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~feeder .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y15_N26
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] (
+// Location: FF_X39_Y12_N13
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add1~13_sumout ),
+	.d(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~feeder_combout ),
 	.asdata(vcc),
 	.clrn(vcc),
 	.aload(gnd),
@@ -110466,27 +110912,26 @@ dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] .power_up = "low";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X19_Y5_N6
+// Location: LABCELL_X30_Y16_N48
 cyclonev_lcell_comb \soc_inst|pix1|always0~0 (
 // Equation(s):
-// \soc_inst|pix1|always0~0_combout  = ( \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|E7mwx4~combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|interconnect_1|LessThan1~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & ( !\soc_inst|m0_1|u_logic|S6ovx4~2_combout  ) ) # ( 
-// !\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & ( !\soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|interconnect_1|LessThan1~0_combout ) # ((!\soc_inst|m0_1|u_logic|S6ovx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) )
+// \soc_inst|pix1|always0~0_combout  = ( \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & ( \soc_inst|interconnect_1|LessThan1~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & ( \soc_inst|interconnect_1|LessThan1~0_combout  & ( 
+// (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|E7mwx4~combout  & ((!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ) # (\soc_inst|m0_1|u_logic|S6ovx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & ( 
+// !\soc_inst|interconnect_1|LessThan1~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & ( !\soc_inst|interconnect_1|LessThan1~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|interconnect_1|LessThan1~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
 	.datae(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+	.dataf(!\soc_inst|interconnect_1|LessThan1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -110496,11 +110941,30 @@ cyclonev_lcell_comb \soc_inst|pix1|always0~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|always0~0 .extended_lut = "off";
-defparam \soc_inst|pix1|always0~0 .lut_mask = 64'hFFF8FFFFFFFCFFFF;
+defparam \soc_inst|pix1|always0~0 .lut_mask = 64'hFFFFFFFFEEAEFFFF;
 defparam \soc_inst|pix1|always0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N38
+// Location: FF_X30_Y15_N26
+dffeas \soc_inst|pix1|word_address[13] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\soc_inst|pix1|always0~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|word_address [13]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[13] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[13] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X30_Y16_N20
 dffeas \soc_inst|pix1|word_address[15] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
@@ -110519,10 +110983,10 @@ defparam \soc_inst|pix1|word_address[15] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[15] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X18_Y6_N17
-dffeas \soc_inst|pix1|word_address[13] (
+// Location: FF_X30_Y14_N50
+dffeas \soc_inst|pix1|word_address[14] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vpovx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -110531,18 +110995,18 @@ dffeas \soc_inst|pix1|word_address[13] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|word_address [13]),
+	.q(\soc_inst|pix1|word_address [14]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|word_address[13] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|word_address[13] .power_up = "low";
+defparam \soc_inst|pix1|word_address[14] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[14] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N58
-dffeas \soc_inst|pix1|write_enable (
+// Location: FF_X31_Y14_N25
+dffeas \soc_inst|pix1|word_address[17] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(\soc_inst|pix1|always0~0_combout ),
@@ -110550,14 +111014,14 @@ dffeas \soc_inst|pix1|write_enable (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|write_enable~q ),
+	.q(\soc_inst|pix1|word_address [17]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|write_enable .is_wysiwyg = "true";
-defparam \soc_inst|pix1|write_enable .power_up = "low";
+defparam \soc_inst|pix1|word_address[17] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[17] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y6_N41
+// Location: FF_X30_Y14_N20
 dffeas \soc_inst|pix1|word_address[16] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
@@ -110576,26 +111040,26 @@ defparam \soc_inst|pix1|word_address[16] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[16] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y5_N17
-dffeas \soc_inst|pix1|word_address[17] (
+// Location: FF_X30_Y16_N10
+dffeas \soc_inst|pix1|write_enable (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(\soc_inst|pix1|always0~0_combout ),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|word_address [17]),
+	.q(\soc_inst|pix1|write_enable~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|word_address[17] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|word_address[17] .power_up = "low";
+defparam \soc_inst|pix1|write_enable .is_wysiwyg = "true";
+defparam \soc_inst|pix1|write_enable .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y5_N17
+// Location: FF_X30_Y16_N56
 dffeas \soc_inst|pix1|word_address[18] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
@@ -110614,15 +111078,15 @@ defparam \soc_inst|pix1|word_address[18] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[18] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N24
+// Location: LABCELL_X46_Y16_N51
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  = ( \soc_inst|pix1|word_address [18] & ( (\soc_inst|pix1|write_enable~q  & (!\soc_inst|pix1|word_address [16] & !\soc_inst|pix1|word_address [17])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  = ( \soc_inst|pix1|word_address [18] & ( (!\soc_inst|pix1|word_address [17] & (!\soc_inst|pix1|word_address [16] & \soc_inst|pix1|write_enable~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|pix1|write_enable~q ),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(!\soc_inst|pix1|word_address [17]),
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|write_enable~q ),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(!\soc_inst|pix1|word_address [18]),
 	.datag(gnd),
@@ -110634,41 +111098,22 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode30
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .lut_mask = 64'h0000000008080808;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X21_Y5_N41
-dffeas \soc_inst|pix1|word_address[14] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vpovx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\soc_inst|pix1|always0~0_combout ),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|pix1|word_address [14]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|pix1|word_address[14] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|word_address[14] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X22_Y11_N30
+// Location: LABCELL_X46_Y16_N57
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|word_address [13] & 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout )) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( (\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|word_address [15] & 
+// !\soc_inst|pix1|word_address [14])) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|pix1|word_address [13]),
 	.datab(!\soc_inst|pix1|word_address [15]),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+	.datac(!\soc_inst|pix1|word_address [14]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [14]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -110678,11 +111123,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode31
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .lut_mask = 64'h0003000300000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .lut_mask = 64'h0000000010101010;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N14
+// Location: FF_X30_Y16_N28
 dffeas \soc_inst|pix1|word_address[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110701,7 +111146,7 @@ defparam \soc_inst|pix1|word_address[0] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N8
+// Location: FF_X30_Y16_N26
 dffeas \soc_inst|pix1|word_address[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110720,7 +111165,7 @@ defparam \soc_inst|pix1|word_address[1] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N4
+// Location: FF_X31_Y16_N1
 dffeas \soc_inst|pix1|word_address[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110739,7 +111184,7 @@ defparam \soc_inst|pix1|word_address[2] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N53
+// Location: FF_X29_Y16_N14
 dffeas \soc_inst|pix1|word_address[3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110758,7 +111203,7 @@ defparam \soc_inst|pix1|word_address[3] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N19
+// Location: FF_X30_Y16_N22
 dffeas \soc_inst|pix1|word_address[4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110777,7 +111222,7 @@ defparam \soc_inst|pix1|word_address[4] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[4] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X18_Y5_N5
+// Location: FF_X30_Y16_N58
 dffeas \soc_inst|pix1|word_address[5] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110796,7 +111241,7 @@ defparam \soc_inst|pix1|word_address[5] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[5] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N40
+// Location: FF_X30_Y16_N43
 dffeas \soc_inst|pix1|word_address[6] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110815,8 +111260,8 @@ defparam \soc_inst|pix1|word_address[6] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[6] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N50
-dffeas \soc_inst|pix1|word_address[7] (
+// Location: FF_X31_Y14_N44
+dffeas \soc_inst|pix1|word_address[7]~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
 	.asdata(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
@@ -110827,14 +111272,14 @@ dffeas \soc_inst|pix1|word_address[7] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|word_address [7]),
+	.q(\soc_inst|pix1|word_address[7]~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|word_address[7] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|word_address[7] .power_up = "low";
+defparam \soc_inst|pix1|word_address[7]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[7]~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X18_Y5_N53
+// Location: FF_X30_Y16_N52
 dffeas \soc_inst|pix1|word_address[8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110853,7 +111298,7 @@ defparam \soc_inst|pix1|word_address[8] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[8] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N23
+// Location: FF_X30_Y16_N50
 dffeas \soc_inst|pix1|word_address[9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110872,7 +111317,7 @@ defparam \soc_inst|pix1|word_address[9] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[9] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N46
+// Location: FF_X30_Y16_N4
 dffeas \soc_inst|pix1|word_address[10] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110891,7 +111336,7 @@ defparam \soc_inst|pix1|word_address[10] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[10] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X19_Y5_N10
+// Location: FF_X30_Y16_N16
 dffeas \soc_inst|pix1|word_address[11] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110910,7 +111355,7 @@ defparam \soc_inst|pix1|word_address[11] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[11] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N34
+// Location: FF_X43_Y12_N34
 dffeas \raz_inst|H_count[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -110929,7 +111374,7 @@ defparam \raz_inst|H_count[0] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: M10K_X26_Y10_N0
+// Location: M10K_X58_Y19_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout ),
 	.portare(vcc),
@@ -110947,8 +111392,8 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({gnd,\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],
-\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(2'b00),
 	.portbaddr({\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],\raz_inst|H_count [2],
@@ -110994,10 +111439,86 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_read_e
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: FF_X30_Y15_N20
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] (
+// Location: LABCELL_X42_Y12_N21
+cyclonev_lcell_comb \soc_inst|pix1|Add1~21 (
+// Equation(s):
+// \soc_inst|pix1|Add1~21_sumout  = SUM(( !\raz_inst|V_count [7] $ (!\raz_inst|V_count [5]) ) + ( \soc_inst|pix1|Add1~19  ) + ( \soc_inst|pix1|Add1~18  ))
+// \soc_inst|pix1|Add1~22  = CARRY(( !\raz_inst|V_count [7] $ (!\raz_inst|V_count [5]) ) + ( \soc_inst|pix1|Add1~19  ) + ( \soc_inst|pix1|Add1~18  ))
+// \soc_inst|pix1|Add1~23  = SHARE((\raz_inst|V_count [7] & \raz_inst|V_count [5]))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [7]),
+	.datad(!\raz_inst|V_count [5]),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add1~18 ),
+	.sharein(\soc_inst|pix1|Add1~19 ),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~21_sumout ),
+	.cout(\soc_inst|pix1|Add1~22 ),
+	.shareout(\soc_inst|pix1|Add1~23 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~21 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~21 .lut_mask = 64'h0000000F00000FF0;
+defparam \soc_inst|pix1|Add1~21 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y12_N24
+cyclonev_lcell_comb \soc_inst|pix1|Add1~13 (
+// Equation(s):
+// \soc_inst|pix1|Add1~13_sumout  = SUM(( !\raz_inst|V_count [8] $ (!\raz_inst|V_count [6]) ) + ( \soc_inst|pix1|Add1~23  ) + ( \soc_inst|pix1|Add1~22  ))
+// \soc_inst|pix1|Add1~14  = CARRY(( !\raz_inst|V_count [8] $ (!\raz_inst|V_count [6]) ) + ( \soc_inst|pix1|Add1~23  ) + ( \soc_inst|pix1|Add1~22  ))
+// \soc_inst|pix1|Add1~15  = SHARE((\raz_inst|V_count [8] & \raz_inst|V_count [6]))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [8]),
+	.datad(!\raz_inst|V_count [6]),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add1~22 ),
+	.sharein(\soc_inst|pix1|Add1~23 ),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~13_sumout ),
+	.cout(\soc_inst|pix1|Add1~14 ),
+	.shareout(\soc_inst|pix1|Add1~15 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~13 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~13 .lut_mask = 64'h0000000F00000FF0;
+defparam \soc_inst|pix1|Add1~13 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~feeder (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~feeder_combout  = ( \soc_inst|pix1|Add1~13_sumout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|Add1~13_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~feeder .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y12_N43
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add1~17_sumout ),
+	.d(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~feeder_combout ),
 	.asdata(vcc),
 	.clrn(vcc),
 	.aload(gnd),
@@ -111006,39 +111527,82 @@ dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] .power_up = "low";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N27
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 (
+// Location: MLABCELL_X39_Y12_N57
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~feeder (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|word_address [15] & 
-// !\soc_inst|pix1|word_address [14])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~feeder_combout  = ( \soc_inst|pix1|Add1~21_sumout  )
 
-	.dataa(!\soc_inst|pix1|word_address [13]),
+	.dataa(gnd),
 	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|Add1~21_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~feeder .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y12_N58
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~feeder_combout ),
+	.asdata(vcc),
+	.clrn(vcc),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y16_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [13] & (!\soc_inst|pix1|word_address [14] & 
+// !\soc_inst|pix1|word_address [15])) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [13]),
+	.datab(!\soc_inst|pix1|word_address [14]),
 	.datac(!\soc_inst|pix1|word_address [15]),
-	.datad(!\soc_inst|pix1|word_address [14]),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .lut_mask = 64'h000000000A000A00;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .lut_mask = 64'h0000000080808080;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y6_N56
+// Location: FF_X31_Y9_N26
 dffeas \soc_inst|pix1|word_address[12] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
@@ -111057,9 +111621,9 @@ defparam \soc_inst|pix1|word_address[12] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[12] .power_up = "low";
 // synopsys translate_on
 
-// Location: M10K_X41_Y15_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ),
+// Location: M10K_X49_Y18_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -111075,8 +111639,8 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
@@ -111085,74 +111649,55 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .ram_block_type = "M20K";
-// synopsys translate_on
-
-// Location: FF_X30_Y15_N23
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add1~21_sumout ),
-	.asdata(vcc),
-	.clrn(vcc),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] .power_up = "low";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N33
+// Location: LABCELL_X46_Y16_N15
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout  = ( \soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [13] & (!\soc_inst|pix1|word_address [15] & 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout )) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|word_address [14] & 
+// !\soc_inst|pix1|word_address [15])) ) )
 
 	.dataa(!\soc_inst|pix1|word_address [13]),
-	.datab(!\soc_inst|pix1|word_address [15]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+	.datab(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|word_address [15]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [14]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -111162,11 +111707,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode30
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .lut_mask = 64'h0000000000880088;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .lut_mask = 64'h0000000020202020;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y12_N0
+// Location: M10K_X58_Y16_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout ),
 	.portare(vcc),
@@ -111184,8 +111729,8 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
@@ -111231,18 +111776,18 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_read_e
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y11_N51
+// Location: LABCELL_X46_Y16_N12
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|word_address [13] & (!\soc_inst|pix1|word_address [15] & 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout )) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( (\soc_inst|pix1|word_address [13] & (!\soc_inst|pix1|word_address [14] & 
+// !\soc_inst|pix1|word_address [15])) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|pix1|word_address [13]),
+	.dataa(!\soc_inst|pix1|word_address [13]),
+	.datab(!\soc_inst|pix1|word_address [14]),
 	.datac(!\soc_inst|pix1|word_address [15]),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [14]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -111252,11 +111797,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode30
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .lut_mask = 64'h0030003000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .lut_mask = 64'h0000000040404040;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X14_Y13_N0
+// Location: M10K_X41_Y18_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout ),
 	.portare(vcc),
@@ -111274,12 +111819,12 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count [1],\raz_inst|H_count [0]}),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
@@ -111310,514 +111855,273 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_addres
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_address_width = 13;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_data_out_clear = "none";
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .ram_block_type = "M20K";
-// synopsys translate_on
-
-// Location: LABCELL_X22_Y11_N48
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & 
-// !\soc_inst|pix1|word_address [15])) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|pix1|word_address [13]),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
-	.datad(!\soc_inst|pix1|word_address [15]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [14]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .lut_mask = 64'h0000000003000300;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X26_Y11_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .ram_block_type = "M20K";
-// synopsys translate_on
-
-// Location: LABCELL_X22_Y11_N42
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( !\soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [13] & 
-// !\soc_inst|pix1|word_address [15]) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|pix1|word_address [13]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [15]),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
-	.dataf(!\soc_inst|pix1|word_address [14]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .lut_mask = 64'h0000CC0000000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X14_Y14_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .ram_block_type = "M20K";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y15_N42
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .lut_mask = 64'h05052277AFAF2277;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y15_N36
-cyclonev_lcell_comb \raz_inst|Red~0 (
-// Equation(s):
-// \raz_inst|Red~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) # 
-// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  & ( 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout )))) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|Red~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Red~0 .extended_lut = "off";
-defparam \raz_inst|Red~0 .lut_mask = 64'h01510000ABFBAAAA;
-defparam \raz_inst|Red~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y15_N48
-cyclonev_lcell_comb \raz_inst|always0~0 (
-// Equation(s):
-// \raz_inst|always0~0_combout  = ( \raz_inst|Add0~33_sumout  & ( (\raz_inst|Add0~41_sumout  & (!\raz_inst|LessThan0~3_combout  & \raz_inst|Add0~37_sumout )) ) )
-
-	.dataa(gnd),
-	.datab(!\raz_inst|Add0~41_sumout ),
-	.datac(!\raz_inst|LessThan0~3_combout ),
-	.datad(!\raz_inst|Add0~37_sumout ),
-	.datae(gnd),
-	.dataf(!\raz_inst|Add0~33_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|always0~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|always0~0 .extended_lut = "off";
-defparam \raz_inst|always0~0 .lut_mask = 64'h0000000000300030;
-defparam \raz_inst|always0~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y15_N39
-cyclonev_lcell_comb \raz_inst|LessThan4~0 (
-// Equation(s):
-// \raz_inst|LessThan4~0_combout  = ( !\raz_inst|LessThan0~3_combout  & ( ((\raz_inst|Add0~25_sumout  & \raz_inst|Add0~29_sumout )) # (\raz_inst|Add0~21_sumout ) ) )
-
-	.dataa(!\raz_inst|Add0~25_sumout ),
-	.datab(gnd),
-	.datac(!\raz_inst|Add0~21_sumout ),
-	.datad(!\raz_inst|Add0~29_sumout ),
-	.datae(gnd),
-	.dataf(!\raz_inst|LessThan0~3_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|LessThan4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|LessThan4~0 .extended_lut = "off";
-defparam \raz_inst|LessThan4~0 .lut_mask = 64'h0F5F0F5F00000000;
-defparam \raz_inst|LessThan4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y15_N45
-cyclonev_lcell_comb \raz_inst|always0~1 (
-// Equation(s):
-// \raz_inst|always0~1_combout  = ( \raz_inst|LessThan4~0_combout  & ( \raz_inst|Add0~13_sumout  & ( ((\raz_inst|Add0~5_sumout  & ((\raz_inst|Add0~17_sumout ) # (\raz_inst|always0~0_combout )))) # (\raz_inst|Add0~9_sumout ) ) ) ) # ( 
-// !\raz_inst|LessThan4~0_combout  & ( \raz_inst|Add0~13_sumout  & ( ((\raz_inst|Add0~5_sumout  & \raz_inst|Add0~17_sumout )) # (\raz_inst|Add0~9_sumout ) ) ) )
-
-	.dataa(!\raz_inst|always0~0_combout ),
-	.datab(!\raz_inst|Add0~9_sumout ),
-	.datac(!\raz_inst|Add0~5_sumout ),
-	.datad(!\raz_inst|Add0~17_sumout ),
-	.datae(!\raz_inst|LessThan4~0_combout ),
-	.dataf(!\raz_inst|Add0~13_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|always0~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|always0~1 .extended_lut = "off";
-defparam \raz_inst|always0~1 .lut_mask = 64'h00000000333F373F;
-defparam \raz_inst|always0~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N39
-cyclonev_lcell_comb \raz_inst|LessThan8~2 (
+// Location: LABCELL_X46_Y16_N45
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 (
 // Equation(s):
-// \raz_inst|LessThan8~2_combout  = ( !\raz_inst|Add1~21_sumout  & ( !\raz_inst|Add1~17_sumout  ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( (\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|word_address [14] & 
+// !\soc_inst|pix1|word_address [15])) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|Add1~17_sumout ),
+	.dataa(!\soc_inst|pix1|word_address [13]),
+	.datab(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|word_address [15]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\raz_inst|Add1~21_sumout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan8~2_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan8~2 .extended_lut = "off";
-defparam \raz_inst|LessThan8~2 .lut_mask = 64'hFF00FF0000000000;
-defparam \raz_inst|LessThan8~2 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .lut_mask = 64'h0000000010101010;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N36
-cyclonev_lcell_comb \raz_inst|LessThan8~3 (
-// Equation(s):
-// \raz_inst|LessThan8~3_combout  = ( \raz_inst|LessThan8~2_combout  & ( \raz_inst|Equal0~3_combout  & ( (!\raz_inst|V_count [9] & ((!\raz_inst|V_count [10]) # ((\raz_inst|Equal0~1_combout  & \raz_inst|Equal0~0_combout )))) # (\raz_inst|V_count [9] & 
-// (((\raz_inst|Equal0~1_combout  & \raz_inst|Equal0~0_combout )))) ) ) ) # ( !\raz_inst|LessThan8~2_combout  & ( \raz_inst|Equal0~3_combout  & ( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & ((!\raz_inst|Equal0~1_combout ) # 
-// (!\raz_inst|Equal0~0_combout )))) ) ) ) # ( \raz_inst|LessThan8~2_combout  & ( !\raz_inst|Equal0~3_combout  & ( (!\raz_inst|V_count [9] & !\raz_inst|V_count [10]) ) ) ) # ( !\raz_inst|LessThan8~2_combout  & ( !\raz_inst|Equal0~3_combout  & ( 
-// (!\raz_inst|V_count [9] & !\raz_inst|V_count [10]) ) ) )
-
-	.dataa(!\raz_inst|V_count [9]),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(!\raz_inst|Equal0~1_combout ),
-	.datad(!\raz_inst|Equal0~0_combout ),
-	.datae(!\raz_inst|LessThan8~2_combout ),
-	.dataf(!\raz_inst|Equal0~3_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|LessThan8~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: M10K_X41_Y19_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count [1],\raz_inst|H_count [0]}),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \raz_inst|LessThan8~3 .extended_lut = "off";
-defparam \raz_inst|LessThan8~3 .lut_mask = 64'h888888888880888F;
-defparam \raz_inst|LessThan8~3 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N30
-cyclonev_lcell_comb \raz_inst|Equal0~2 (
+// Location: LABCELL_X45_Y16_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 (
 // Equation(s):
-// \raz_inst|Equal0~2_combout  = ( \raz_inst|Add0~5_sumout  & ( \raz_inst|Add0~13_sumout  & ( (!\raz_inst|LessThan0~3_combout  & (!\raz_inst|Add0~9_sumout  & (\raz_inst|Equal0~1_combout  & !\raz_inst|Add0~1_sumout ))) ) ) )
-
-	.dataa(!\raz_inst|LessThan0~3_combout ),
-	.datab(!\raz_inst|Add0~9_sumout ),
-	.datac(!\raz_inst|Equal0~1_combout ),
-	.datad(!\raz_inst|Add0~1_sumout ),
-	.datae(!\raz_inst|Add0~5_sumout ),
-	.dataf(!\raz_inst|Add0~13_sumout ),
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout  & ( 
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout  & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout  & 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0])))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0])) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout )))) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ))))) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|Equal0~2_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|Equal0~2 .extended_lut = "off";
-defparam \raz_inst|Equal0~2 .lut_mask = 64'h0000000000000800;
-defparam \raz_inst|Equal0~2 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .lut_mask = 64'h20702A7A25752F7F;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N42
-cyclonev_lcell_comb \raz_inst|LessThan8~1 (
+// Location: LABCELL_X46_Y16_N36
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 (
 // Equation(s):
-// \raz_inst|LessThan8~1_combout  = ( \raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~2_combout  & ( (\raz_inst|Add1~13_sumout  & \raz_inst|Add1~9_sumout ) ) ) ) # ( !\raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [8] & 
-// \raz_inst|V_count [7]) ) ) ) # ( \raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [8] & \raz_inst|V_count [7]) ) ) ) # ( !\raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [8] & 
-// \raz_inst|V_count [7]) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [13] & 
+// \soc_inst|pix1|word_address [15])) ) )
 
-	.dataa(!\raz_inst|Add1~13_sumout ),
-	.datab(!\raz_inst|V_count [8]),
-	.datac(!\raz_inst|V_count [7]),
-	.datad(!\raz_inst|Add1~9_sumout ),
-	.datae(!\raz_inst|Equal0~0_combout ),
-	.dataf(!\raz_inst|Equal0~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|word_address [13]),
+	.datad(!\soc_inst|pix1|word_address [15]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan8~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan8~1 .extended_lut = "off";
-defparam \raz_inst|LessThan8~1 .lut_mask = 64'h0303030303030055;
-defparam \raz_inst|LessThan8~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .lut_mask = 64'h0000000000C000C0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N48
-cyclonev_lcell_comb \raz_inst|LessThan8~0 (
-// Equation(s):
-// \raz_inst|LessThan8~0_combout  = ( \raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~2_combout  & ( (\raz_inst|Add1~1_sumout  & \raz_inst|Add1~5_sumout ) ) ) ) # ( !\raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [6] & 
-// \raz_inst|V_count [5]) ) ) ) # ( \raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [6] & \raz_inst|V_count [5]) ) ) ) # ( !\raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [6] & 
-// \raz_inst|V_count [5]) ) ) )
-
-	.dataa(!\raz_inst|V_count [6]),
-	.datab(!\raz_inst|V_count [5]),
-	.datac(!\raz_inst|Add1~1_sumout ),
-	.datad(!\raz_inst|Add1~5_sumout ),
-	.datae(!\raz_inst|Equal0~0_combout ),
-	.dataf(!\raz_inst|Equal0~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|LessThan8~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: M10K_X41_Y16_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \raz_inst|LessThan8~0 .extended_lut = "off";
-defparam \raz_inst|LessThan8~0 .lut_mask = 64'h111111111111000F;
-defparam \raz_inst|LessThan8~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N24
-cyclonev_lcell_comb \raz_inst|LessThan8~4 (
+// Location: LABCELL_X45_Y16_N24
+cyclonev_lcell_comb \raz_inst|Red~0 (
 // Equation(s):
-// \raz_inst|LessThan8~4_combout  = ( \raz_inst|LessThan8~1_combout  & ( \raz_inst|LessThan8~0_combout  & ( (\raz_inst|always0~4_combout  & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout ))) ) ) ) # ( !\raz_inst|LessThan8~1_combout  & ( 
-// \raz_inst|LessThan8~0_combout  & ( ((\raz_inst|always0~4_combout  & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) # (\raz_inst|LessThan8~3_combout ) ) ) ) # ( \raz_inst|LessThan8~1_combout  & ( !\raz_inst|LessThan8~0_combout  & ( 
-// ((\raz_inst|always0~4_combout  & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) # (\raz_inst|LessThan8~3_combout ) ) ) ) # ( !\raz_inst|LessThan8~1_combout  & ( !\raz_inst|LessThan8~0_combout  & ( ((\raz_inst|always0~4_combout  & 
-// ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) # (\raz_inst|LessThan8~3_combout ) ) ) )
+// \raz_inst|Red~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout )))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout )))) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// (((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ))) ) ) )
 
-	.dataa(!\raz_inst|always0~1_combout ),
-	.datab(!\raz_inst|always0~4_combout ),
-	.datac(!\raz_inst|LessThan8~3_combout ),
-	.datad(!\raz_inst|Add0~1_sumout ),
-	.datae(!\raz_inst|LessThan8~1_combout ),
-	.dataf(!\raz_inst|LessThan8~0_combout ),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan8~4_combout ),
+	.combout(\raz_inst|Red~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan8~4 .extended_lut = "off";
-defparam \raz_inst|LessThan8~4 .lut_mask = 64'h1F3F1F3F1F3F1133;
-defparam \raz_inst|LessThan8~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y15_N26
-dffeas \raz_inst|video_on_V (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|LessThan8~4_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|video_on_V~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|video_on_V .is_wysiwyg = "true";
-defparam \raz_inst|video_on_V .power_up = "low";
+defparam \raz_inst|Red~0 .extended_lut = "off";
+defparam \raz_inst|Red~0 .lut_mask = 64'h01F10BFB00F000F0;
+defparam \raz_inst|Red~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N21
+// Location: LABCELL_X46_Y12_N0
 cyclonev_lcell_comb \raz_inst|LessThan7~0 (
 // Equation(s):
-// \raz_inst|LessThan7~0_combout  = ( \raz_inst|Add0~13_sumout  & ( ((!\raz_inst|Add0~1_sumout  & (!\raz_inst|Add0~9_sumout  & !\raz_inst|Add0~5_sumout ))) # (\raz_inst|LessThan0~3_combout ) ) ) # ( !\raz_inst|Add0~13_sumout  & ( (!\raz_inst|Add0~1_sumout ) 
-// # (\raz_inst|LessThan0~3_combout ) ) )
+// \raz_inst|LessThan7~0_combout  = ( \raz_inst|LessThan0~3_combout  ) # ( !\raz_inst|LessThan0~3_combout  & ( (!\raz_inst|Add0~1_sumout  & ((!\raz_inst|Add0~13_sumout ) # ((!\raz_inst|Add0~9_sumout  & !\raz_inst|Add0~5_sumout )))) ) )
 
-	.dataa(!\raz_inst|LessThan0~3_combout ),
-	.datab(!\raz_inst|Add0~1_sumout ),
+	.dataa(!\raz_inst|Add0~1_sumout ),
+	.datab(!\raz_inst|Add0~13_sumout ),
 	.datac(!\raz_inst|Add0~9_sumout ),
 	.datad(!\raz_inst|Add0~5_sumout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|Add0~13_sumout ),
+	.dataf(!\raz_inst|LessThan0~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -111827,11 +112131,11 @@ cyclonev_lcell_comb \raz_inst|LessThan7~0 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|LessThan7~0 .extended_lut = "off";
-defparam \raz_inst|LessThan7~0 .lut_mask = 64'hDDDDDDDDD555D555;
+defparam \raz_inst|LessThan7~0 .lut_mask = 64'hA888A888FFFFFFFF;
 defparam \raz_inst|LessThan7~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y15_N22
+// Location: FF_X46_Y12_N2
 dffeas \raz_inst|video_on_H (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|LessThan7~0_combout ),
@@ -111850,414 +112154,330 @@ defparam \raz_inst|video_on_H .is_wysiwyg = "true";
 defparam \raz_inst|video_on_H .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N15
-cyclonev_lcell_comb \raz_inst|VGA_BLANK_N (
+// Location: LABCELL_X46_Y12_N3
+cyclonev_lcell_comb \raz_inst|LessThan8~2 (
 // Equation(s):
-// \raz_inst|VGA_BLANK_N~combout  = ( \raz_inst|video_on_H~q  & ( \raz_inst|video_on_V~q  ) )
+// \raz_inst|LessThan8~2_combout  = ( !\raz_inst|Add1~21_sumout  & ( !\raz_inst|Add1~17_sumout  ) )
 
-	.dataa(!\raz_inst|video_on_V~q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\raz_inst|Add1~17_sumout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|video_on_H~q ),
+	.dataf(!\raz_inst|Add1~21_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|VGA_BLANK_N~combout ),
+	.combout(\raz_inst|LessThan8~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|VGA_BLANK_N .extended_lut = "off";
-defparam \raz_inst|VGA_BLANK_N .lut_mask = 64'h0000000055555555;
-defparam \raz_inst|VGA_BLANK_N .shared_arith = "off";
+defparam \raz_inst|LessThan8~2 .extended_lut = "off";
+defparam \raz_inst|LessThan8~2 .lut_mask = 64'hFF00FF0000000000;
+defparam \raz_inst|LessThan8~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N57
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 (
+// Location: LABCELL_X46_Y12_N54
+cyclonev_lcell_comb \raz_inst|LessThan8~3 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  = ( !\soc_inst|pix1|word_address [18] & ( (!\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|write_enable~q  & !\soc_inst|pix1|word_address [15])) ) )
+// \raz_inst|LessThan8~3_combout  = ( \raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~3_combout  & ( (!\raz_inst|Equal0~1_combout  & (((!\raz_inst|V_count [9] & !\raz_inst|V_count [10])))) # (\raz_inst|Equal0~1_combout  & (\raz_inst|LessThan8~2_combout )) ) 
+// ) ) # ( !\raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~3_combout  & ( (!\raz_inst|V_count [9] & !\raz_inst|V_count [10]) ) ) ) # ( \raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~3_combout  & ( (!\raz_inst|V_count [9] & !\raz_inst|V_count [10]) ) ) ) 
+// # ( !\raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~3_combout  & ( (!\raz_inst|V_count [9] & !\raz_inst|V_count [10]) ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [13]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|write_enable~q ),
-	.datad(!\soc_inst|pix1|word_address [15]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [18]),
+	.dataa(!\raz_inst|LessThan8~2_combout ),
+	.datab(!\raz_inst|V_count [9]),
+	.datac(!\raz_inst|Equal0~1_combout ),
+	.datad(!\raz_inst|V_count [10]),
+	.datae(!\raz_inst|Equal0~0_combout ),
+	.dataf(!\raz_inst|Equal0~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.combout(\raz_inst|LessThan8~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .lut_mask = 64'h0A000A0000000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .shared_arith = "off";
+defparam \raz_inst|LessThan8~3 .extended_lut = "off";
+defparam \raz_inst|LessThan8~3 .lut_mask = 64'hCC00CC00CC00C505;
+defparam \raz_inst|LessThan8~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N0
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 (
+// Location: MLABCELL_X47_Y12_N21
+cyclonev_lcell_comb \raz_inst|always0~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & 
-// \soc_inst|pix1|word_address [16])) ) )
+// \raz_inst|always0~0_combout  = ( !\raz_inst|LessThan0~3_combout  & ( (\raz_inst|Add0~37_sumout  & (\raz_inst|Add0~41_sumout  & \raz_inst|Add0~33_sumout )) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(!\raz_inst|Add0~37_sumout ),
+	.datac(!\raz_inst|Add0~41_sumout ),
+	.datad(!\raz_inst|Add0~33_sumout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.dataf(!\raz_inst|LessThan0~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
+	.combout(\raz_inst|always0~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .lut_mask = 64'h0000000002020202;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .shared_arith = "off";
+defparam \raz_inst|always0~0 .extended_lut = "off";
+defparam \raz_inst|always0~0 .lut_mask = 64'h0003000300000000;
+defparam \raz_inst|always0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y13_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .ram_block_type = "M20K";
-// synopsys translate_on
+// Location: MLABCELL_X47_Y12_N18
+cyclonev_lcell_comb \raz_inst|LessThan4~0 (
+// Equation(s):
+// \raz_inst|LessThan4~0_combout  = ( \raz_inst|Add0~29_sumout  & ( (!\raz_inst|LessThan0~3_combout  & ((\raz_inst|Add0~21_sumout ) # (\raz_inst|Add0~25_sumout ))) ) ) # ( !\raz_inst|Add0~29_sumout  & ( (!\raz_inst|LessThan0~3_combout  & 
+// \raz_inst|Add0~21_sumout ) ) )
 
-// Location: FF_X30_Y15_N19
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add1~17_sumout ),
-	.asdata(vcc),
-	.clrn(vcc),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\raz_inst|LessThan0~3_combout ),
+	.datab(gnd),
+	.datac(!\raz_inst|Add0~25_sumout ),
+	.datad(!\raz_inst|Add0~21_sumout ),
+	.datae(gnd),
+	.dataf(!\raz_inst|Add0~29_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\raz_inst|LessThan4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE .power_up = "low";
+defparam \raz_inst|LessThan4~0 .extended_lut = "off";
+defparam \raz_inst|LessThan4~0 .lut_mask = 64'h00AA00AA0AAA0AAA;
+defparam \raz_inst|LessThan4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N12
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 (
+// Location: MLABCELL_X47_Y12_N24
+cyclonev_lcell_comb \raz_inst|always0~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  = ( \soc_inst|pix1|write_enable~q  & ( (!\soc_inst|pix1|word_address [18] & (\soc_inst|pix1|word_address [13] & !\soc_inst|pix1|word_address [15])) ) )
+// \raz_inst|always0~1_combout  = ( \raz_inst|always0~0_combout  & ( \raz_inst|LessThan4~0_combout  & ( (\raz_inst|Add0~13_sumout  & ((\raz_inst|Add0~5_sumout ) # (\raz_inst|Add0~9_sumout ))) ) ) ) # ( !\raz_inst|always0~0_combout  & ( 
+// \raz_inst|LessThan4~0_combout  & ( (\raz_inst|Add0~13_sumout  & (((\raz_inst|Add0~5_sumout  & \raz_inst|Add0~17_sumout )) # (\raz_inst|Add0~9_sumout ))) ) ) ) # ( \raz_inst|always0~0_combout  & ( !\raz_inst|LessThan4~0_combout  & ( 
+// (\raz_inst|Add0~13_sumout  & (((\raz_inst|Add0~5_sumout  & \raz_inst|Add0~17_sumout )) # (\raz_inst|Add0~9_sumout ))) ) ) ) # ( !\raz_inst|always0~0_combout  & ( !\raz_inst|LessThan4~0_combout  & ( (\raz_inst|Add0~13_sumout  & (((\raz_inst|Add0~5_sumout  
+// & \raz_inst|Add0~17_sumout )) # (\raz_inst|Add0~9_sumout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|pix1|word_address [18]),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(!\soc_inst|pix1|word_address [15]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|write_enable~q ),
+	.dataa(!\raz_inst|Add0~13_sumout ),
+	.datab(!\raz_inst|Add0~9_sumout ),
+	.datac(!\raz_inst|Add0~5_sumout ),
+	.datad(!\raz_inst|Add0~17_sumout ),
+	.datae(!\raz_inst|always0~0_combout ),
+	.dataf(!\raz_inst|LessThan4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.combout(\raz_inst|always0~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .lut_mask = 64'h000000000C000C00;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .shared_arith = "off";
+defparam \raz_inst|always0~1 .extended_lut = "off";
+defparam \raz_inst|always0~1 .lut_mask = 64'h1115111511151515;
+defparam \raz_inst|always0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N39
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 (
+// Location: LABCELL_X46_Y12_N48
+cyclonev_lcell_comb \raz_inst|Equal0~2 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & 
-// \soc_inst|pix1|word_address [16])) ) )
+// \raz_inst|Equal0~2_combout  = ( !\raz_inst|Add0~9_sumout  & ( \raz_inst|Add0~5_sumout  & ( (\raz_inst|Equal0~1_combout  & (\raz_inst|Add0~13_sumout  & (!\raz_inst|Add0~1_sumout  & !\raz_inst|LessThan0~3_combout ))) ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [16]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.dataa(!\raz_inst|Equal0~1_combout ),
+	.datab(!\raz_inst|Add0~13_sumout ),
+	.datac(!\raz_inst|Add0~1_sumout ),
+	.datad(!\raz_inst|LessThan0~3_combout ),
+	.datae(!\raz_inst|Add0~9_sumout ),
+	.dataf(!\raz_inst|Add0~5_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ),
+	.combout(\raz_inst|Equal0~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .lut_mask = 64'h0000000000110011;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .shared_arith = "off";
+defparam \raz_inst|Equal0~2 .extended_lut = "off";
+defparam \raz_inst|Equal0~2 .lut_mask = 64'h0000000010000000;
+defparam \raz_inst|Equal0~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y14_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+// Location: LABCELL_X45_Y12_N42
+cyclonev_lcell_comb \raz_inst|LessThan8~0 (
+// Equation(s):
+// \raz_inst|LessThan8~0_combout  = ( \raz_inst|Equal0~2_combout  & ( \raz_inst|Equal0~0_combout  & ( (\raz_inst|Add1~1_sumout  & \raz_inst|Add1~5_sumout ) ) ) ) # ( !\raz_inst|Equal0~2_combout  & ( \raz_inst|Equal0~0_combout  & ( (\raz_inst|V_count [5] & 
+// \raz_inst|V_count [6]) ) ) ) # ( \raz_inst|Equal0~2_combout  & ( !\raz_inst|Equal0~0_combout  & ( (\raz_inst|V_count [5] & \raz_inst|V_count [6]) ) ) ) # ( !\raz_inst|Equal0~2_combout  & ( !\raz_inst|Equal0~0_combout  & ( (\raz_inst|V_count [5] & 
+// \raz_inst|V_count [6]) ) ) )
+
+	.dataa(!\raz_inst|V_count [5]),
+	.datab(!\raz_inst|V_count [6]),
+	.datac(!\raz_inst|Add1~1_sumout ),
+	.datad(!\raz_inst|Add1~5_sumout ),
+	.datae(!\raz_inst|Equal0~2_combout ),
+	.dataf(!\raz_inst|Equal0~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\raz_inst|LessThan8~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .ram_block_type = "M20K";
+defparam \raz_inst|LessThan8~0 .extended_lut = "off";
+defparam \raz_inst|LessThan8~0 .lut_mask = 64'h111111111111000F;
+defparam \raz_inst|LessThan8~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N9
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 (
+// Location: LABCELL_X45_Y12_N54
+cyclonev_lcell_comb \raz_inst|LessThan8~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & 
-// \soc_inst|pix1|word_address [16])) ) )
+// \raz_inst|LessThan8~1_combout  = ( \raz_inst|Equal0~2_combout  & ( \raz_inst|Equal0~0_combout  & ( (\raz_inst|Add1~9_sumout  & \raz_inst|Add1~13_sumout ) ) ) ) # ( !\raz_inst|Equal0~2_combout  & ( \raz_inst|Equal0~0_combout  & ( (\raz_inst|V_count [7] & 
+// \raz_inst|V_count [8]) ) ) ) # ( \raz_inst|Equal0~2_combout  & ( !\raz_inst|Equal0~0_combout  & ( (\raz_inst|V_count [7] & \raz_inst|V_count [8]) ) ) ) # ( !\raz_inst|Equal0~2_combout  & ( !\raz_inst|Equal0~0_combout  & ( (\raz_inst|V_count [7] & 
+// \raz_inst|V_count [8]) ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [16]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.dataa(!\raz_inst|V_count [7]),
+	.datab(!\raz_inst|V_count [8]),
+	.datac(!\raz_inst|Add1~9_sumout ),
+	.datad(!\raz_inst|Add1~13_sumout ),
+	.datae(!\raz_inst|Equal0~2_combout ),
+	.dataf(!\raz_inst|Equal0~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ),
+	.combout(\raz_inst|LessThan8~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .lut_mask = 64'h0000000000220022;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .shared_arith = "off";
+defparam \raz_inst|LessThan8~1 .extended_lut = "off";
+defparam \raz_inst|LessThan8~1 .lut_mask = 64'h111111111111000F;
+defparam \raz_inst|LessThan8~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y16_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+// Location: LABCELL_X46_Y12_N24
+cyclonev_lcell_comb \raz_inst|LessThan8~4 (
+// Equation(s):
+// \raz_inst|LessThan8~4_combout  = ( \raz_inst|LessThan8~0_combout  & ( \raz_inst|LessThan8~1_combout  & ( (\raz_inst|always0~4_combout  & ((\raz_inst|always0~1_combout ) # (\raz_inst|Add0~1_sumout ))) ) ) ) # ( !\raz_inst|LessThan8~0_combout  & ( 
+// \raz_inst|LessThan8~1_combout  & ( ((\raz_inst|always0~4_combout  & ((\raz_inst|always0~1_combout ) # (\raz_inst|Add0~1_sumout )))) # (\raz_inst|LessThan8~3_combout ) ) ) ) # ( \raz_inst|LessThan8~0_combout  & ( !\raz_inst|LessThan8~1_combout  & ( 
+// ((\raz_inst|always0~4_combout  & ((\raz_inst|always0~1_combout ) # (\raz_inst|Add0~1_sumout )))) # (\raz_inst|LessThan8~3_combout ) ) ) ) # ( !\raz_inst|LessThan8~0_combout  & ( !\raz_inst|LessThan8~1_combout  & ( ((\raz_inst|always0~4_combout  & 
+// ((\raz_inst|always0~1_combout ) # (\raz_inst|Add0~1_sumout )))) # (\raz_inst|LessThan8~3_combout ) ) ) )
+
+	.dataa(!\raz_inst|Add0~1_sumout ),
+	.datab(!\raz_inst|always0~4_combout ),
+	.datac(!\raz_inst|LessThan8~3_combout ),
+	.datad(!\raz_inst|always0~1_combout ),
+	.datae(!\raz_inst|LessThan8~0_combout ),
+	.dataf(!\raz_inst|LessThan8~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\raz_inst|LessThan8~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .ram_block_type = "M20K";
+defparam \raz_inst|LessThan8~4 .extended_lut = "off";
+defparam \raz_inst|LessThan8~4 .lut_mask = 64'h1F3F1F3F1F3F1133;
+defparam \raz_inst|LessThan8~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y15_N22
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE (
+// Location: FF_X46_Y12_N26
+dffeas \raz_inst|video_on_V (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add1~21_sumout ),
+	.d(\raz_inst|LessThan8~4_combout ),
 	.asdata(vcc),
-	.clrn(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+	.q(\raz_inst|video_on_V~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE .power_up = "low";
+defparam \raz_inst|video_on_V .is_wysiwyg = "true";
+defparam \raz_inst|video_on_V .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N3
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 (
+// Location: LABCELL_X46_Y12_N9
+cyclonev_lcell_comb \raz_inst|VGA_BLANK_N (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout  = (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & 
-// \soc_inst|pix1|word_address [16])))
+// \raz_inst|VGA_BLANK_N~combout  = ( \raz_inst|video_on_V~q  & ( \raz_inst|video_on_H~q  ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\raz_inst|video_on_H~q ),
+	.datae(gnd),
+	.dataf(!\raz_inst|video_on_V~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\raz_inst|VGA_BLANK_N~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \raz_inst|VGA_BLANK_N .extended_lut = "off";
+defparam \raz_inst|VGA_BLANK_N .lut_mask = 64'h0000000000FF00FF;
+defparam \raz_inst|VGA_BLANK_N .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y16_N3
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  = ( \soc_inst|pix1|word_address [13] & ( (!\soc_inst|pix1|word_address [18] & (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|write_enable~q  & \soc_inst|pix1|word_address 
+// [15]))) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [18]),
+	.datab(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|write_enable~q ),
+	.datad(!\soc_inst|pix1|word_address [15]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .lut_mask = 64'h0000000000080008;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y15_N33
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & \soc_inst|pix1|word_address [16]) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(!\soc_inst|pix1|word_address [16]),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .lut_mask = 64'h0001000100010001;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .lut_mask = 64'h0000000000550055;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y19_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ),
+// Location: M10K_X49_Y10_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -112273,154 +112493,105 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .ram_block_type = "M20K";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y17_N48
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ))) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .lut_mask = 64'h447703034477CFCF;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y15_N25
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add1~13_sumout ),
-	.asdata(vcc),
-	.clrn(vcc),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE .power_up = "low";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N9
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 (
+// Location: LABCELL_X45_Y16_N18
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  = ( \soc_inst|pix1|write_enable~q  & ( (!\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [13] & (!\soc_inst|pix1|word_address [18] & \soc_inst|pix1|word_address 
-// [15]))) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  = ( \soc_inst|pix1|word_address [15] & ( \soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|write_enable~q  & !\soc_inst|pix1|word_address [18]) ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [13]),
+	.dataa(!\soc_inst|pix1|write_enable~q ),
+	.datab(gnd),
 	.datac(!\soc_inst|pix1|word_address [18]),
-	.datad(!\soc_inst|pix1|word_address [15]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|write_enable~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|word_address [15]),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .lut_mask = 64'h0000000000800080;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .lut_mask = 64'h0000000000005050;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N21
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 (
+// Location: LABCELL_X45_Y15_N21
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout  = ( \soc_inst|pix1|word_address [17] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( \soc_inst|pix1|word_address [16] ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout  = ( \soc_inst|pix1|word_address [16] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & 
+// \soc_inst|pix1|word_address [17]) ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
+	.dataa(!\soc_inst|pix1|word_address [14]),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|pix1|word_address [17]),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [17]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+	.datae(!\soc_inst|pix1|word_address [16]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .lut_mask = 64'h0000000000005555;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .lut_mask = 64'h0000000000000505;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y13_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
+// Location: M10K_X38_Y12_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -112436,64 +112607,64 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count[2]~DUPLICATE_q ,\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N15
+// Location: LABCELL_X46_Y16_N54
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  = ( !\soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|write_enable~q  & (!\soc_inst|pix1|word_address [18] & \soc_inst|pix1|word_address [15])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  = ( \soc_inst|pix1|write_enable~q  & ( (!\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|word_address [15] & !\soc_inst|pix1|word_address [18])) ) )
 
-	.dataa(!\soc_inst|pix1|write_enable~q ),
-	.datab(!\soc_inst|pix1|word_address [18]),
-	.datac(!\soc_inst|pix1|word_address [15]),
+	.dataa(!\soc_inst|pix1|word_address [13]),
+	.datab(!\soc_inst|pix1|word_address [15]),
+	.datac(!\soc_inst|pix1|word_address [18]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [13]),
+	.dataf(!\soc_inst|pix1|write_enable~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -112503,22 +112674,22 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode27
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .lut_mask = 64'h0404040400000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .lut_mask = 64'h0000000020202020;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N0
+// Location: LABCELL_X46_Y16_N21
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout  = (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & (\soc_inst|pix1|word_address [16] & 
-// \soc_inst|pix1|word_address [17])))
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & (\soc_inst|pix1|word_address [16] & 
+// \soc_inst|pix1|word_address [17])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+	.datab(gnd),
 	.datac(!\soc_inst|pix1|word_address [16]),
 	.datad(!\soc_inst|pix1|word_address [17]),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|pix1|word_address [14]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -112528,11 +112699,30 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode30
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .lut_mask = 64'h0001000100010001;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .lut_mask = 64'h0000000000050005;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y16_N0
+// Location: FF_X31_Y14_N43
+dffeas \soc_inst|pix1|word_address[7] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\soc_inst|pix1|always0~0_combout ),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|word_address [7]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[7] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: M10K_X41_Y14_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ),
 	.portare(vcc),
@@ -112590,179 +112780,65 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_data_w
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_first_address = 0;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_first_bit_number = 0;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .ram_block_type = "M20K";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y15_N54
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  = ( \soc_inst|pix1|write_enable~q  & ( (\soc_inst|pix1|word_address [13] & (!\soc_inst|pix1|word_address [18] & (!\soc_inst|pix1|word_address [14] & \soc_inst|pix1|word_address 
-// [15]))) ) )
-
-	.dataa(!\soc_inst|pix1|word_address [13]),
-	.datab(!\soc_inst|pix1|word_address [18]),
-	.datac(!\soc_inst|pix1|word_address [14]),
-	.datad(!\soc_inst|pix1|word_address [15]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|write_enable~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .lut_mask = 64'h0000000000400040;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y15_N45
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout  = (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  & (\soc_inst|pix1|word_address [17] & \soc_inst|pix1|word_address [16]))
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [16]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .lut_mask = 64'h0011001100110011;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X38_Y14_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N48
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 (
+// Location: LABCELL_X46_Y16_N0
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  = ( !\soc_inst|pix1|word_address [18] & ( (\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|write_enable~q  & \soc_inst|pix1|word_address [15])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  = ( \soc_inst|pix1|write_enable~q  & ( (!\soc_inst|pix1|word_address [18] & (!\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [13] & \soc_inst|pix1|word_address 
+// [15]))) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [13]),
-	.datab(!\soc_inst|pix1|write_enable~q ),
-	.datac(gnd),
+	.dataa(!\soc_inst|pix1|word_address [18]),
+	.datab(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|word_address [13]),
 	.datad(!\soc_inst|pix1|word_address [15]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [18]),
+	.dataf(!\soc_inst|pix1|write_enable~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .lut_mask = 64'h0011001100000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .lut_mask = 64'h0000000000800080;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N42
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 (
+// Location: MLABCELL_X47_Y16_N57
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & 
-// \soc_inst|pix1|word_address [16])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout  = ( \soc_inst|pix1|word_address [17] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( \soc_inst|pix1|word_address [16] ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [17]),
+	.dataa(gnd),
+	.datab(gnd),
 	.datac(!\soc_inst|pix1|word_address [16]),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+	.datae(!\soc_inst|pix1|word_address [17]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .lut_mask = 64'h0000000001010101;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .lut_mask = 64'h0000000000000F0F;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y17_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ),
+// Location: M10K_X41_Y12_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -112778,70 +112854,70 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count[2]~DUPLICATE_q ,\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N18
+// Location: MLABCELL_X39_Y12_N24
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ) ) ) ) # ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ))) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ))) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout )) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout  & \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) ) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout ),
 	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -112851,216 +112927,131 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .lut_mask = 64'h4747474700CC33FF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .lut_mask = 64'h0055FF550F330F33;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N39
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 (
+// Location: LABCELL_X42_Y12_N27
+cyclonev_lcell_comb \soc_inst|pix1|Add1~9 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [16] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & 
-// \soc_inst|pix1|word_address [17])) ) )
+// \soc_inst|pix1|Add1~9_sumout  = SUM(( \raz_inst|V_count [7] ) + ( \soc_inst|pix1|Add1~15  ) + ( \soc_inst|pix1|Add1~14  ))
+// \soc_inst|pix1|Add1~10  = CARRY(( \raz_inst|V_count [7] ) + ( \soc_inst|pix1|Add1~15  ) + ( \soc_inst|pix1|Add1~14  ))
+// \soc_inst|pix1|Add1~11  = SHARE(GND)
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [7]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add1~14 ),
+	.sharein(\soc_inst|pix1|Add1~15 ),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~9_sumout ),
+	.cout(\soc_inst|pix1|Add1~10 ),
+	.shareout(\soc_inst|pix1|Add1~11 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~9 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~9 .lut_mask = 64'h0000000000000F0F;
+defparam \soc_inst|pix1|Add1~9 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N51
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~feeder (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~feeder_combout  = ( \soc_inst|pix1|Add1~9_sumout  )
+
+	.dataa(gnd),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [17]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [14]),
+	.dataf(!\soc_inst|pix1|Add1~9_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .lut_mask = 64'h0000000000220022;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~feeder .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y19_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X39_Y12_N52
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~feeder_combout ),
+	.asdata(vcc),
+	.clrn(vcc),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N42
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 (
+// Location: LABCELL_X46_Y16_N6
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout  = (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  & (\soc_inst|pix1|word_address [17] & !\soc_inst|pix1|word_address [16]))
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  = ( !\soc_inst|pix1|word_address [18] & ( (!\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|write_enable~q  & \soc_inst|pix1|word_address [13])) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|word_address [16]),
+	.dataa(!\soc_inst|pix1|word_address [15]),
+	.datab(!\soc_inst|pix1|write_enable~q ),
+	.datac(!\soc_inst|pix1|word_address [13]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|pix1|word_address [18]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .lut_mask = 64'h1010101010101010;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X26_Y18_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .lut_mask = 64'h0202020200000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N51
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 (
+// Location: LABCELL_X46_Y15_N21
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [16] & \soc_inst|pix1|word_address [17]) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout  = ( !\soc_inst|pix1|word_address [16] & ( !\soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|word_address [17] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|pix1|word_address [17]),
 	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(!\soc_inst|pix1|word_address [17]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.datae(!\soc_inst|pix1|word_address [16]),
+	.dataf(!\soc_inst|pix1|word_address [14]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .lut_mask = 64'h0055000000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y12_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ),
+// Location: M10K_X41_Y8_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113076,81 +113067,105 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N33
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 (
+// Location: LABCELL_X46_Y16_N9
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  = ( !\soc_inst|pix1|word_address [13] & ( (!\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|write_enable~q  & !\soc_inst|pix1|word_address [18])) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [15]),
+	.datab(!\soc_inst|pix1|write_enable~q ),
+	.datac(!\soc_inst|pix1|word_address [18]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .lut_mask = 64'h2020202000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y15_N15
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & 
 // !\soc_inst|pix1|word_address [16])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [17]),
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
 	.datac(gnd),
 	.datad(!\soc_inst|pix1|word_address [16]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|word_address [14]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .lut_mask = 64'h0000000011001100;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .lut_mask = 64'h0000000011001100;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y21_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
+// Location: M10K_X41_Y11_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113166,111 +113181,81 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .ram_block_type = "M20K";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y17_N30
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout  & !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) ) ) ) # ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout )) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout )) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .lut_mask = 64'h0F550F55330033FF;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N6
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 (
+// Location: LABCELL_X46_Y15_N57
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & (!\soc_inst|pix1|word_address [14] & 
-// !\soc_inst|pix1|word_address [16])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout  = ( \soc_inst|pix1|word_address [17] & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [16] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|word_address [14]),
-	.datad(!\soc_inst|pix1|word_address [16]),
+	.dataa(!\soc_inst|pix1|word_address [14]),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|word_address [17]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .lut_mask = 64'h0000000030003000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .lut_mask = 64'h0000000000440044;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y12_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ),
+// Location: M10K_X38_Y9_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113286,64 +113271,64 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N12
+// Location: LABCELL_X46_Y15_N24
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & 
-// !\soc_inst|pix1|word_address [16])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout  = ( !\soc_inst|pix1|word_address [16] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [14] & 
+// \soc_inst|pix1|word_address [17]) ) ) )
 
 	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|word_address [16]),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|word_address [17]),
 	.datad(gnd),
-	.datae(gnd),
+	.datae(!\soc_inst|pix1|word_address [16]),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -113354,11 +113339,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode28
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .lut_mask = 64'h0000000020202020;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .lut_mask = 64'h000000000A0A0000;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y20_N0
+// Location: M10K_X41_Y7_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
 	.portare(vcc),
@@ -113376,12 +113361,12 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
@@ -113423,34 +113408,63 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_e
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N36
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 (
+// Location: MLABCELL_X39_Y12_N36
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & 
-// !\soc_inst|pix1|word_address [16])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ) ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .lut_mask = 64'h0505AFAF22772277;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y15_N48
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & !\soc_inst|pix1|word_address [16]) ) )
+
+	.dataa(gnd),
 	.datab(!\soc_inst|pix1|word_address [17]),
 	.datac(!\soc_inst|pix1|word_address [16]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .lut_mask = 64'h0000000010101010;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .lut_mask = 64'h0000000030303030;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y20_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ),
+// Location: M10K_X49_Y14_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113466,8 +113480,8 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
@@ -113476,71 +113490,70 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N15
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 (
+// Location: MLABCELL_X47_Y16_N48
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout  = (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & 
-// !\soc_inst|pix1|word_address [16])))
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout  = ( \soc_inst|pix1|word_address [17] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( !\soc_inst|pix1|word_address [16] ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
-	.datad(!\soc_inst|pix1|word_address [16]),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|word_address [17]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .lut_mask = 64'h0100010001000100;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y20_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ),
+// Location: M10K_X49_Y12_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113556,184 +113569,81 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count [1],\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .ram_block_type = "M20K";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y17_N36
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout  ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout  ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout  ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .lut_mask = 64'h333300FF55550F0F;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N27
-cyclonev_lcell_comb \soc_inst|pix1|Add1~9 (
+// Location: LABCELL_X45_Y15_N12
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|Add1~9_sumout  = SUM(( \raz_inst|V_count [7] ) + ( \soc_inst|pix1|Add1~15  ) + ( \soc_inst|pix1|Add1~14  ))
-// \soc_inst|pix1|Add1~10  = CARRY(( \raz_inst|V_count [7] ) + ( \soc_inst|pix1|Add1~15  ) + ( \soc_inst|pix1|Add1~14  ))
-// \soc_inst|pix1|Add1~11  = SHARE(GND)
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout  = ( !\soc_inst|pix1|word_address [16] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & 
+// \soc_inst|pix1|word_address [14]) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|V_count [7]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|pix1|Add1~14 ),
-	.sharein(\soc_inst|pix1|Add1~15 ),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add1~9_sumout ),
-	.cout(\soc_inst|pix1|Add1~10 ),
-	.shareout(\soc_inst|pix1|Add1~11 ));
-// synopsys translate_off
-defparam \soc_inst|pix1|Add1~9 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~9 .lut_mask = 64'h00000000000000FF;
-defparam \soc_inst|pix1|Add1~9 .shared_arith = "on";
-// synopsys translate_on
-
-// Location: FF_X30_Y15_N28
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add1~9_sumout ),
-	.asdata(vcc),
-	.clrn(vcc),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y17_N12
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .lut_mask = 64'h0033CCFF47474747;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X35_Y17_N21
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] & 
-// !\soc_inst|pix1|word_address [16])) ) )
-
-	.dataa(!\soc_inst|pix1|word_address [14]),
 	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [16]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.datac(!\soc_inst|pix1|word_address [14]),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|word_address [16]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 .lut_mask = 64'h0000000088008800;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .lut_mask = 64'h0000000003030000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X14_Y16_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout ),
+// Location: M10K_X38_Y17_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113749,80 +113659,81 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count [1],\raz_inst|H_count [0]}),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N33
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 (
+// Location: LABCELL_X46_Y16_N18
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout  = (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  & (!\soc_inst|pix1|word_address [17] & !\soc_inst|pix1|word_address [16]))
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout  = ( !\soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & (\soc_inst|pix1|word_address [14] & 
+// \soc_inst|pix1|word_address [17])) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [16]),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+	.datab(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|word_address [17]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|pix1|word_address [16]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 .lut_mask = 64'h4400440044004400;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .lut_mask = 64'h0101010100000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y15_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout ),
+// Location: M10K_X49_Y16_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113838,8 +113749,8 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
@@ -113848,71 +113759,99 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y16_N54
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout  ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout  ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout  ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout  ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .lut_mask = 64'h3333555500FF0F0F;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N24
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 (
+// Location: LABCELL_X46_Y15_N45
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|word_address [16] & 
-// !\soc_inst|pix1|word_address [14])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & 
+// \soc_inst|pix1|word_address [16])) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(!\soc_inst|pix1|word_address [14]),
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|word_address [16]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|word_address [14]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .lut_mask = 64'h000000000C000C00;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X14_Y17_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ),
+// Location: M10K_X41_Y10_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113928,80 +113867,81 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N30
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 (
+// Location: LABCELL_X46_Y15_N54
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout  = ( \soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  & !\soc_inst|pix1|word_address [17]) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout  = ( \soc_inst|pix1|word_address [17] & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & 
+// \soc_inst|pix1|word_address [16])) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|pix1|word_address [14]),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|word_address [16]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [16]),
+	.dataf(!\soc_inst|pix1|word_address [17]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .lut_mask = 64'h0000000044444444;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y15_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ),
+// Location: M10K_X38_Y11_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114017,111 +113957,81 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .ram_block_type = "M20K";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y17_N0
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & ( 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ) ) ) ) # ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ))) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ))) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .lut_mask = 64'h227722770A0A5F5F;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N54
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 (
+// Location: LABCELL_X46_Y15_N12
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] & 
-// !\soc_inst|pix1|word_address [16])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & (!\soc_inst|pix1|word_address [14] & 
+// \soc_inst|pix1|word_address [16])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(gnd),
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|word_address [14]),
+	.datad(!\soc_inst|pix1|word_address [16]),
 	.datae(gnd),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .lut_mask = 64'h0000000040404040;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y13_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ),
+// Location: M10K_X38_Y10_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114137,81 +114047,81 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N3
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 (
+// Location: LABCELL_X46_Y15_N0
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout  = ( !\soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & 
-// !\soc_inst|pix1|word_address [17])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout  = ( \soc_inst|pix1|word_address [17] & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & 
+// \soc_inst|pix1|word_address [16])) ) )
 
 	.dataa(!\soc_inst|pix1|word_address [14]),
 	.datab(gnd),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
-	.datad(!\soc_inst|pix1|word_address [17]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|word_address [16]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [16]),
+	.dataf(!\soc_inst|pix1|word_address [17]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .lut_mask = 64'h0500050000000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y17_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ),
+// Location: M10K_X41_Y9_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114227,81 +114137,145 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N36
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 (
+// Location: MLABCELL_X39_Y12_N18
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout  & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout  & !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) ) ) ) # ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout )) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout )) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .lut_mask = 64'h0F330F33550055FF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout )))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2])) # (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ))) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
+// (((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout  & !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2])))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
+// (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2])) # (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout  & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2])))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout  & !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2])))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2])))) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .lut_mask = 64'h0C110CDD3F113FDD;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y15_N0
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & (\soc_inst|pix1|word_address [16] & 
-// !\soc_inst|pix1|word_address [17])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout  = ( !\soc_inst|pix1|word_address [16] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [17] & 
+// \soc_inst|pix1|word_address [14]) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(!\soc_inst|pix1|word_address [17]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [14]),
+	.datab(!\soc_inst|pix1|word_address [17]),
+	.datac(!\soc_inst|pix1|word_address [14]),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|word_address [16]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .lut_mask = 64'h0000000003000300;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 .lut_mask = 64'h000000000C0C0000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
 // Location: M10K_X38_Y19_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ),
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114317,81 +114291,81 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count [1],\raz_inst|H_count [0]}),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N57
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 (
+// Location: LABCELL_X46_Y15_N39
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout  = (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & 
-// \soc_inst|pix1|word_address [16])))
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [16] & (!\soc_inst|pix1|word_address [17] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout )) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
+	.dataa(!\soc_inst|pix1|word_address [16]),
 	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
-	.datad(!\soc_inst|pix1|word_address [16]),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|pix1|word_address [14]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .lut_mask = 64'h0004000400040004;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .lut_mask = 64'h0000000000880088;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y16_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ),
+// Location: M10K_X49_Y9_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114407,98 +114381,64 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .ram_block_type = "M20K";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y17_N6
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( 
-// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout )))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])))) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
-// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ))))) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .lut_mask = 64'h407043734C7C4F7F;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N45
+// Location: LABCELL_X45_Y15_N30
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] & 
-// \soc_inst|pix1|word_address [16])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout  = ( \soc_inst|pix1|word_address [16] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [17] & 
+// \soc_inst|pix1|word_address [14]) ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
+	.dataa(gnd),
 	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [16]),
-	.datae(gnd),
+	.datac(!\soc_inst|pix1|word_address [14]),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|word_address [16]),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -114509,11 +114449,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode28
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .lut_mask = 64'h0000000000440044;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .lut_mask = 64'h0000000000000C0C;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y18_N0
+// Location: M10K_X38_Y15_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout ),
 	.portare(vcc),
@@ -114531,8 +114471,8 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
@@ -114578,18 +114518,18 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_e
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N18
+// Location: LABCELL_X46_Y16_N39
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] & 
-// \soc_inst|pix1|word_address [16])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout  = ( \soc_inst|pix1|word_address [16] & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|word_address [14] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout )) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(gnd),
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(!\soc_inst|pix1|word_address [14]),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|word_address [16]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -114599,11 +114539,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode28
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .lut_mask = 64'h0000000004040404;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .lut_mask = 64'h0000000000220022;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y21_N0
+// Location: M10K_X49_Y19_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ),
 	.portare(vcc),
@@ -114621,8 +114561,8 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
@@ -114668,34 +114608,67 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_e
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N27
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 (
+// Location: LABCELL_X45_Y16_N6
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout  = (!\soc_inst|pix1|word_address [16] & (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & 
-// \soc_inst|pix1|word_address [14])))
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & ( 
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & 
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ))) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout )))) ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
-	.datad(!\soc_inst|pix1|word_address [14]),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .lut_mask = 64'h1D001D331DCC1DFF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y15_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [17] & !\soc_inst|pix1|word_address [16]) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|word_address [16]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .lut_mask = 64'h0008000800080008;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 .lut_mask = 64'h00000000A0A0A0A0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X14_Y19_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ),
+// Location: M10K_X41_Y15_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114711,8 +114684,8 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
@@ -114721,71 +114694,71 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N30
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 (
+// Location: LABCELL_X46_Y15_N36
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] & 
-// !\soc_inst|pix1|word_address [16])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|word_address [16] & (!\soc_inst|pix1|word_address [17] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout )) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
+	.dataa(!\soc_inst|pix1|word_address [16]),
 	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|word_address [14]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 .lut_mask = 64'h0000000040404040;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .lut_mask = 64'h0404040400000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y17_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout ),
+// Location: M10K_X49_Y11_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114801,93 +114774,276 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count [1],\raz_inst|H_count[0]~DUPLICATE_q }),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N24
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 (
+// Location: LABCELL_X46_Y15_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout )) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout  = ( !\soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  & 
+// !\soc_inst|pix1|word_address [16])) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|word_address [16]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [14]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .lut_mask = 64'h00CC33FF1D1D1D1D;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 .lut_mask = 64'h0A000A0000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N51
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 (
+// Location: M10K_X49_Y13_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count [1],\raz_inst|H_count [0]}),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y15_N6
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] & 
-// \soc_inst|pix1|word_address [16])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout  = ( \soc_inst|pix1|word_address [16] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  & ( !\soc_inst|pix1|word_address [17] ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [14]),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(!\soc_inst|pix1|word_address [17]),
-	.datad(!\soc_inst|pix1|word_address [16]),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|word_address [16]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X58_Y15_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y16_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout )))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ))) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout )))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]))) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .lut_mask = 64'h101CD0DC131FD3DF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y16_N48
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|word_address [16] & 
+// !\soc_inst|pix1|word_address [14])) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|word_address [14]),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
 	.datag(gnd),
@@ -114899,11 +115055,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode27
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .lut_mask = 64'h0000000020202020;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y21_N0
+// Location: M10K_X38_Y16_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout ),
 	.portare(vcc),
@@ -114920,9 +115076,9 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 (
 	.clr0(gnd),
 	.clr1(gnd),
 	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
@@ -114968,16 +115124,16 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_read_en
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N6
+// Location: MLABCELL_X47_Y16_N9
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( (\soc_inst|pix1|word_address [16] & !\soc_inst|pix1|word_address [17]) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout  = ( !\soc_inst|pix1|word_address [17] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( \soc_inst|pix1|word_address [16] ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(!\soc_inst|pix1|word_address [17]),
-	.datae(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|word_address [17]),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -114988,11 +115144,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode28
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .lut_mask = 64'h000000000F0F0000;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X14_Y15_N0
+// Location: M10K_X58_Y14_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout ),
 	.portare(vcc),
@@ -115010,8 +115166,8 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
@@ -115057,7 +115213,96 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_e
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N48
+// Location: MLABCELL_X47_Y16_N12
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout  = ( !\soc_inst|pix1|word_address [17] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( !\soc_inst|pix1|word_address [16] ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|word_address [17]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .lut_mask = 64'h00000000CCCC0000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X58_Y17_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y15_N3
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 (
 // Equation(s):
 // \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] & 
@@ -115065,8 +115310,8 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode26
 
 	.dataa(!\soc_inst|pix1|word_address [14]),
 	.datab(!\soc_inst|pix1|word_address [17]),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|word_address [16]),
 	.datae(gnd),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
 	.datag(gnd),
@@ -115078,11 +115323,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode26
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .lut_mask = 64'h0000000080808080;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .lut_mask = 64'h0000000088008800;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y18_N0
+// Location: M10K_X41_Y17_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout ),
 	.portare(vcc),
@@ -115100,12 +115345,12 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
-\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+\raz_inst|H_count [2],\raz_inst|H_count [1],\raz_inst|H_count [0]}),
 	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
@@ -115147,33 +115392,338 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_en
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y14_N51
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 (
+// Location: LABCELL_X45_Y16_N0
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout )) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout )))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout  & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout )))) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ))))) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .lut_mask = 64'h00473347CC47FF47;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y16_N33
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|word_address [14] & 
+// \soc_inst|pix1|word_address [16])) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|word_address [16]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .lut_mask = 64'h0000000002020202;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X58_Y18_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y15_N51
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout  = ( !\soc_inst|pix1|word_address [16] & ( (!\soc_inst|pix1|word_address [17] & \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & 
+// !\soc_inst|pix1|word_address [16])) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|pix1|word_address [17]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|word_address [16]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [14]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X49_Y15_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y16_N24
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & ( !\soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|word_address [14] & 
+// !\soc_inst|pix1|word_address [17]) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|pix1|word_address [14]),
 	.datac(!\soc_inst|pix1|word_address [17]),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|word_address [16]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .lut_mask = 64'h0000303000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y18_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count [1],\raz_inst|H_count [0]}),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y16_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout  = ( \soc_inst|pix1|word_address [16] & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|word_address [14] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout )) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(!\soc_inst|pix1|word_address [14]),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
 	.datae(gnd),
 	.dataf(!\soc_inst|pix1|word_address [16]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .lut_mask = 64'h00F000F000000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .lut_mask = 64'h0000000000220022;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y14_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout ),
+// Location: M10K_X49_Y17_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -115189,8 +115739,8 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 (
 	.clr1(gnd),
 	.nerror(vcc),
 	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address[7]~DUPLICATE_q ,\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],
+\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
 	.portabyteenamasks(1'b1),
 	.portbdatain(1'b0),
 	.portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
@@ -115199,94 +115749,94 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .ram_block_type = "M20K";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N42
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 (
+// Location: LABCELL_X45_Y16_N48
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout )))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ))))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ))))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ))))) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout )) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout )) ) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .lut_mask = 64'h04158C9D2637AEBF;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .lut_mask = 64'h33550F0033550FFF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N54
+// Location: LABCELL_X45_Y16_N12
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & 
-// ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout  & \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ),
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0])) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout  & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout )))) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115296,11 +115846,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .lut_mask = 64'h0055330FFF55330F;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .lut_mask = 64'h010BA1AB515BF1FB;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N30
+// Location: LABCELL_X42_Y12_N30
 cyclonev_lcell_comb \soc_inst|pix1|Add1~5 (
 // Equation(s):
 // \soc_inst|pix1|Add1~5_sumout  = SUM(( \raz_inst|V_count [8] ) + ( \soc_inst|pix1|Add1~11  ) + ( \soc_inst|pix1|Add1~10  ))
@@ -115308,8 +115858,8 @@ cyclonev_lcell_comb \soc_inst|pix1|Add1~5 (
 // \soc_inst|pix1|Add1~7  = SHARE(GND)
 
 	.dataa(gnd),
-	.datab(!\raz_inst|V_count [8]),
-	.datac(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [8]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
@@ -115322,11 +115872,11 @@ cyclonev_lcell_comb \soc_inst|pix1|Add1~5 (
 	.shareout(\soc_inst|pix1|Add1~7 ));
 // synopsys translate_off
 defparam \soc_inst|pix1|Add1~5 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~5 .lut_mask = 64'h0000000000003333;
+defparam \soc_inst|pix1|Add1~5 .lut_mask = 64'h0000000000000F0F;
 defparam \soc_inst|pix1|Add1~5 .shared_arith = "on";
 // synopsys translate_on
 
-// Location: FF_X30_Y15_N31
+// Location: FF_X42_Y12_N31
 dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|pix1|Add1~5_sumout ),
@@ -115345,7 +115895,7 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] .is_wysiwyg
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N33
+// Location: LABCELL_X42_Y12_N33
 cyclonev_lcell_comb \soc_inst|pix1|Add1~1 (
 // Equation(s):
 // \soc_inst|pix1|Add1~1_sumout  = SUM(( GND ) + ( \soc_inst|pix1|Add1~7  ) + ( \soc_inst|pix1|Add1~6  ))
@@ -115369,7 +115919,7 @@ defparam \soc_inst|pix1|Add1~1 .lut_mask = 64'h0000000000000000;
 defparam \soc_inst|pix1|Add1~1 .shared_arith = "on";
 // synopsys translate_on
 
-// Location: FF_X30_Y15_N35
+// Location: FF_X42_Y12_N34
 dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|pix1|Add1~1_sumout ),
@@ -115388,32 +115938,13 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] .is_wysiwyg
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y15_N29
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add1~9_sumout ),
-	.asdata(vcc),
-	.clrn(vcc),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y15_N48
+// Location: LABCELL_X45_Y16_N36
 cyclonev_lcell_comb \raz_inst|Red~1 (
 // Equation(s):
 // \raz_inst|Red~1_combout  = ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4] & ( (\raz_inst|VGA_BLANK_N~combout  & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5] & 
-// (((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5] & (\raz_inst|Red~0_combout  & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE_q 
-// ))))) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4] & ( ((\raz_inst|VGA_BLANK_N~combout  & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout  & 
-// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]))))) ) )
+// (((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5] & (\raz_inst|Red~0_combout  & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]))))) ) ) # 
+// ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4] & ( ((\raz_inst|VGA_BLANK_N~combout  & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout  & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]))))) ) 
+// )
 
 	.dataa(!\raz_inst|Red~0_combout ),
 	.datab(!\raz_inst|VGA_BLANK_N~combout ),
@@ -115421,7 +115952,7 @@ cyclonev_lcell_comb \raz_inst|Red~1 (
 	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout ),
 	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4]),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]),
-	.datag(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE_q ),
+	.datag(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
 	.cin(gnd),
 	.sharein(gnd),
 	.combout(\raz_inst|Red~1_combout ),
@@ -115434,17 +115965,17 @@ defparam \raz_inst|Red~1 .lut_mask = 64'h0033030310100000;
 defparam \raz_inst|Red~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N21
+// Location: MLABCELL_X47_Y12_N3
 cyclonev_lcell_comb \raz_inst|always0~6 (
 // Equation(s):
-// \raz_inst|always0~6_combout  = ( \raz_inst|Add0~41_sumout  & ( \raz_inst|Add0~37_sumout  ) ) # ( \raz_inst|Add0~41_sumout  & ( !\raz_inst|Add0~37_sumout  & ( \raz_inst|Add0~21_sumout  ) ) )
+// \raz_inst|always0~6_combout  = ( \raz_inst|Add0~21_sumout  & ( \raz_inst|Add0~41_sumout  ) ) # ( !\raz_inst|Add0~21_sumout  & ( \raz_inst|Add0~41_sumout  & ( \raz_inst|Add0~37_sumout  ) ) )
 
-	.dataa(!\raz_inst|Add0~21_sumout ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\raz_inst|Add0~41_sumout ),
-	.dataf(!\raz_inst|Add0~37_sumout ),
+	.datad(!\raz_inst|Add0~37_sumout ),
+	.datae(!\raz_inst|Add0~21_sumout ),
+	.dataf(!\raz_inst|Add0~41_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115454,22 +115985,22 @@ cyclonev_lcell_comb \raz_inst|always0~6 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~6 .extended_lut = "off";
-defparam \raz_inst|always0~6 .lut_mask = 64'h000055550000FFFF;
+defparam \raz_inst|always0~6 .lut_mask = 64'h0000000000FFFFFF;
 defparam \raz_inst|always0~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N54
+// Location: MLABCELL_X47_Y12_N6
 cyclonev_lcell_comb \raz_inst|always0~5 (
 // Equation(s):
-// \raz_inst|always0~5_combout  = ( \raz_inst|Add0~41_sumout  & ( \raz_inst|Add0~29_sumout  & ( (!\raz_inst|LessThan0~3_combout  & (((\raz_inst|Add0~25_sumout ) # (\raz_inst|Add0~21_sumout )) # (\raz_inst|Add0~37_sumout ))) ) ) ) # ( \raz_inst|Add0~41_sumout 
-//  & ( !\raz_inst|Add0~29_sumout  & ( (!\raz_inst|LessThan0~3_combout  & ((\raz_inst|Add0~21_sumout ) # (\raz_inst|Add0~37_sumout ))) ) ) )
+// \raz_inst|always0~5_combout  = ( \raz_inst|Add0~37_sumout  & ( \raz_inst|Add0~41_sumout  & ( !\raz_inst|LessThan0~3_combout  ) ) ) # ( !\raz_inst|Add0~37_sumout  & ( \raz_inst|Add0~41_sumout  & ( (!\raz_inst|LessThan0~3_combout  & 
+// (((\raz_inst|Add0~29_sumout  & \raz_inst|Add0~25_sumout )) # (\raz_inst|Add0~21_sumout ))) ) ) )
 
-	.dataa(!\raz_inst|LessThan0~3_combout ),
-	.datab(!\raz_inst|Add0~37_sumout ),
-	.datac(!\raz_inst|Add0~21_sumout ),
-	.datad(!\raz_inst|Add0~25_sumout ),
-	.datae(!\raz_inst|Add0~41_sumout ),
-	.dataf(!\raz_inst|Add0~29_sumout ),
+	.dataa(!\raz_inst|Add0~21_sumout ),
+	.datab(!\raz_inst|Add0~29_sumout ),
+	.datac(!\raz_inst|Add0~25_sumout ),
+	.datad(!\raz_inst|LessThan0~3_combout ),
+	.datae(!\raz_inst|Add0~37_sumout ),
+	.dataf(!\raz_inst|Add0~41_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115479,23 +116010,24 @@ cyclonev_lcell_comb \raz_inst|always0~5 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~5 .extended_lut = "off";
-defparam \raz_inst|always0~5 .lut_mask = 64'h00002A2A00002AAA;
+defparam \raz_inst|always0~5 .lut_mask = 64'h000000005700FF00;
 defparam \raz_inst|always0~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N24
+// Location: MLABCELL_X47_Y12_N12
 cyclonev_lcell_comb \raz_inst|always0~7 (
 // Equation(s):
-// \raz_inst|always0~7_combout  = ( \raz_inst|Equal0~3_combout  & ( \raz_inst|LessThan0~3_combout  & ( !\raz_inst|always0~5_combout  ) ) ) # ( !\raz_inst|Equal0~3_combout  & ( \raz_inst|LessThan0~3_combout  ) ) # ( \raz_inst|Equal0~3_combout  & ( 
-// !\raz_inst|LessThan0~3_combout  & ( (!\raz_inst|Add0~17_sumout  & (((!\raz_inst|always0~5_combout  & !\raz_inst|Add0~33_sumout )))) # (\raz_inst|Add0~17_sumout  & (\raz_inst|always0~6_combout  & ((\raz_inst|Add0~33_sumout )))) ) ) ) # ( 
-// !\raz_inst|Equal0~3_combout  & ( !\raz_inst|LessThan0~3_combout  ) )
+// \raz_inst|always0~7_combout  = ( \raz_inst|always0~6_combout  & ( \raz_inst|always0~5_combout  & ( (!\raz_inst|Equal0~3_combout ) # ((\raz_inst|Add0~17_sumout  & (\raz_inst|Add0~33_sumout  & !\raz_inst|LessThan0~3_combout ))) ) ) ) # ( 
+// !\raz_inst|always0~6_combout  & ( \raz_inst|always0~5_combout  & ( !\raz_inst|Equal0~3_combout  ) ) ) # ( \raz_inst|always0~6_combout  & ( !\raz_inst|always0~5_combout  & ( (!\raz_inst|Equal0~3_combout ) # ((!\raz_inst|Add0~17_sumout  $ 
+// (\raz_inst|Add0~33_sumout )) # (\raz_inst|LessThan0~3_combout )) ) ) ) # ( !\raz_inst|always0~6_combout  & ( !\raz_inst|always0~5_combout  & ( (!\raz_inst|Equal0~3_combout ) # (((!\raz_inst|Add0~17_sumout  & !\raz_inst|Add0~33_sumout )) # 
+// (\raz_inst|LessThan0~3_combout )) ) ) )
 
-	.dataa(!\raz_inst|always0~6_combout ),
-	.datab(!\raz_inst|Add0~17_sumout ),
-	.datac(!\raz_inst|always0~5_combout ),
-	.datad(!\raz_inst|Add0~33_sumout ),
-	.datae(!\raz_inst|Equal0~3_combout ),
-	.dataf(!\raz_inst|LessThan0~3_combout ),
+	.dataa(!\raz_inst|Add0~17_sumout ),
+	.datab(!\raz_inst|Equal0~3_combout ),
+	.datac(!\raz_inst|Add0~33_sumout ),
+	.datad(!\raz_inst|LessThan0~3_combout ),
+	.datae(!\raz_inst|always0~6_combout ),
+	.dataf(!\raz_inst|always0~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115505,21 +116037,21 @@ cyclonev_lcell_comb \raz_inst|always0~7 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~7 .extended_lut = "off";
-defparam \raz_inst|always0~7 .lut_mask = 64'hFFFFC011FFFFF0F0;
+defparam \raz_inst|always0~7 .lut_mask = 64'hECFFEDFFCCCCCDCC;
 defparam \raz_inst|always0~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N42
+// Location: LABCELL_X46_Y12_N12
 cyclonev_lcell_comb \raz_inst|VGA_HS~0 (
 // Equation(s):
 // \raz_inst|VGA_HS~0_combout  = ( !tick_count[0] & ( \KEY[2]~input_o  ) )
 
 	.dataa(gnd),
-	.datab(!\KEY[2]~input_o ),
-	.datac(gnd),
+	.datab(gnd),
+	.datac(!\KEY[2]~input_o ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!tick_count[0]),
+	.datae(!tick_count[0]),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115529,11 +116061,11 @@ cyclonev_lcell_comb \raz_inst|VGA_HS~0 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|VGA_HS~0 .extended_lut = "off";
-defparam \raz_inst|VGA_HS~0 .lut_mask = 64'h3333333300000000;
+defparam \raz_inst|VGA_HS~0 .lut_mask = 64'h0F0F00000F0F0000;
 defparam \raz_inst|VGA_HS~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y15_N25
+// Location: FF_X47_Y12_N14
 dffeas \raz_inst|VGA_HS (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|always0~7_combout ),
@@ -115552,14 +116084,14 @@ defparam \raz_inst|VGA_HS .is_wysiwyg = "true";
 defparam \raz_inst|VGA_HS .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y15_N57
+// Location: LABCELL_X45_Y12_N36
 cyclonev_lcell_comb \raz_inst|always0~9 (
 // Equation(s):
 // \raz_inst|always0~9_combout  = ( !\raz_inst|V_count [4] & ( !\raz_inst|V_count [1] $ (!\raz_inst|V_count [0]) ) )
 
-	.dataa(!\raz_inst|V_count [1]),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\raz_inst|V_count [1]),
 	.datad(!\raz_inst|V_count [0]),
 	.datae(gnd),
 	.dataf(!\raz_inst|V_count [4]),
@@ -115572,21 +116104,21 @@ cyclonev_lcell_comb \raz_inst|always0~9 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~9 .extended_lut = "off";
-defparam \raz_inst|always0~9 .lut_mask = 64'h55AA55AA00000000;
+defparam \raz_inst|always0~9 .lut_mask = 64'h0FF00FF000000000;
 defparam \raz_inst|always0~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N57
+// Location: LABCELL_X46_Y12_N6
 cyclonev_lcell_comb \raz_inst|always0~10 (
 // Equation(s):
-// \raz_inst|always0~10_combout  = ( !\raz_inst|V_count [10] & ( (\raz_inst|V_count [3] & (\raz_inst|V_count [2] & (\raz_inst|always0~9_combout  & !\raz_inst|V_count [9]))) ) )
+// \raz_inst|always0~10_combout  = ( !\raz_inst|V_count [9] & ( (!\raz_inst|V_count [10] & (\raz_inst|V_count [3] & (\raz_inst|V_count [2] & \raz_inst|always0~9_combout ))) ) )
 
-	.dataa(!\raz_inst|V_count [3]),
-	.datab(!\raz_inst|V_count [2]),
-	.datac(!\raz_inst|always0~9_combout ),
-	.datad(!\raz_inst|V_count [9]),
+	.dataa(!\raz_inst|V_count [10]),
+	.datab(!\raz_inst|V_count [3]),
+	.datac(!\raz_inst|V_count [2]),
+	.datad(!\raz_inst|always0~9_combout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|V_count [10]),
+	.dataf(!\raz_inst|V_count [9]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115596,21 +116128,22 @@ cyclonev_lcell_comb \raz_inst|always0~10 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~10 .extended_lut = "off";
-defparam \raz_inst|always0~10 .lut_mask = 64'h0100010000000000;
+defparam \raz_inst|always0~10 .lut_mask = 64'h0002000200000000;
 defparam \raz_inst|always0~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y15_N36
+// Location: LABCELL_X45_Y12_N39
 cyclonev_lcell_comb \raz_inst|always0~8 (
 // Equation(s):
-// \raz_inst|always0~8_combout  = ( \raz_inst|Add1~29_sumout  & ( (\raz_inst|Add1~25_sumout  & (!\raz_inst|Add1~33_sumout  & (!\raz_inst|Add1~41_sumout  $ (!\raz_inst|Add1~37_sumout )))) ) )
+// \raz_inst|always0~8_combout  = ( \raz_inst|Add1~41_sumout  & ( (!\raz_inst|Add1~37_sumout  & (!\raz_inst|Add1~33_sumout  & (\raz_inst|Add1~29_sumout  & \raz_inst|Add1~25_sumout ))) ) ) # ( !\raz_inst|Add1~41_sumout  & ( (\raz_inst|Add1~37_sumout  & 
+// (!\raz_inst|Add1~33_sumout  & (\raz_inst|Add1~29_sumout  & \raz_inst|Add1~25_sumout ))) ) )
 
-	.dataa(!\raz_inst|Add1~25_sumout ),
+	.dataa(!\raz_inst|Add1~37_sumout ),
 	.datab(!\raz_inst|Add1~33_sumout ),
-	.datac(!\raz_inst|Add1~41_sumout ),
-	.datad(!\raz_inst|Add1~37_sumout ),
+	.datac(!\raz_inst|Add1~29_sumout ),
+	.datad(!\raz_inst|Add1~25_sumout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|Add1~29_sumout ),
+	.dataf(!\raz_inst|Add1~41_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115620,23 +116153,23 @@ cyclonev_lcell_comb \raz_inst|always0~8 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~8 .extended_lut = "off";
-defparam \raz_inst|always0~8 .lut_mask = 64'h0000000004400440;
+defparam \raz_inst|always0~8 .lut_mask = 64'h0004000400080008;
 defparam \raz_inst|always0~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N0
+// Location: LABCELL_X46_Y12_N36
 cyclonev_lcell_comb \raz_inst|always0~11 (
 // Equation(s):
-// \raz_inst|always0~11_combout  = ( \raz_inst|Equal0~1_combout  & ( \raz_inst|Equal0~0_combout  & ( (!\raz_inst|Equal0~3_combout  & (\raz_inst|always0~10_combout )) # (\raz_inst|Equal0~3_combout  & (((\raz_inst|always0~8_combout  & 
-// \raz_inst|LessThan8~2_combout )))) ) ) ) # ( !\raz_inst|Equal0~1_combout  & ( \raz_inst|Equal0~0_combout  & ( \raz_inst|always0~10_combout  ) ) ) # ( \raz_inst|Equal0~1_combout  & ( !\raz_inst|Equal0~0_combout  & ( \raz_inst|always0~10_combout  ) ) ) # ( 
-// !\raz_inst|Equal0~1_combout  & ( !\raz_inst|Equal0~0_combout  & ( \raz_inst|always0~10_combout  ) ) )
+// \raz_inst|always0~11_combout  = ( \raz_inst|always0~8_combout  & ( \raz_inst|Equal0~3_combout  & ( (!\raz_inst|Equal0~1_combout  & (((\raz_inst|always0~10_combout )))) # (\raz_inst|Equal0~1_combout  & ((!\raz_inst|Equal0~0_combout  & 
+// ((\raz_inst|always0~10_combout ))) # (\raz_inst|Equal0~0_combout  & (\raz_inst|LessThan8~2_combout )))) ) ) ) # ( !\raz_inst|always0~8_combout  & ( \raz_inst|Equal0~3_combout  & ( (\raz_inst|always0~10_combout  & ((!\raz_inst|Equal0~1_combout ) # 
+// (!\raz_inst|Equal0~0_combout ))) ) ) ) # ( \raz_inst|always0~8_combout  & ( !\raz_inst|Equal0~3_combout  & ( \raz_inst|always0~10_combout  ) ) ) # ( !\raz_inst|always0~8_combout  & ( !\raz_inst|Equal0~3_combout  & ( \raz_inst|always0~10_combout  ) ) )
 
-	.dataa(!\raz_inst|Equal0~3_combout ),
+	.dataa(!\raz_inst|LessThan8~2_combout ),
 	.datab(!\raz_inst|always0~10_combout ),
-	.datac(!\raz_inst|always0~8_combout ),
-	.datad(!\raz_inst|LessThan8~2_combout ),
-	.datae(!\raz_inst|Equal0~1_combout ),
-	.dataf(!\raz_inst|Equal0~0_combout ),
+	.datac(!\raz_inst|Equal0~1_combout ),
+	.datad(!\raz_inst|Equal0~0_combout ),
+	.datae(!\raz_inst|always0~8_combout ),
+	.dataf(!\raz_inst|Equal0~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115646,22 +116179,22 @@ cyclonev_lcell_comb \raz_inst|always0~11 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~11 .extended_lut = "off";
-defparam \raz_inst|always0~11 .lut_mask = 64'h3333333333332227;
+defparam \raz_inst|always0~11 .lut_mask = 64'h3333333333303335;
 defparam \raz_inst|always0~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N54
+// Location: LABCELL_X46_Y12_N30
 cyclonev_lcell_comb \raz_inst|always0~12 (
 // Equation(s):
-// \raz_inst|always0~12_combout  = ( \raz_inst|LessThan8~1_combout  & ( \raz_inst|LessThan8~0_combout  & ( (!\raz_inst|always0~11_combout ) # ((\raz_inst|always0~4_combout  & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) ) ) ) # ( 
-// !\raz_inst|LessThan8~1_combout  & ( \raz_inst|LessThan8~0_combout  ) ) # ( \raz_inst|LessThan8~1_combout  & ( !\raz_inst|LessThan8~0_combout  ) ) # ( !\raz_inst|LessThan8~1_combout  & ( !\raz_inst|LessThan8~0_combout  ) )
+// \raz_inst|always0~12_combout  = ( \raz_inst|LessThan8~0_combout  & ( \raz_inst|LessThan8~1_combout  & ( (!\raz_inst|always0~11_combout ) # ((\raz_inst|always0~4_combout  & ((\raz_inst|always0~1_combout ) # (\raz_inst|Add0~1_sumout )))) ) ) ) # ( 
+// !\raz_inst|LessThan8~0_combout  & ( \raz_inst|LessThan8~1_combout  ) ) # ( \raz_inst|LessThan8~0_combout  & ( !\raz_inst|LessThan8~1_combout  ) ) # ( !\raz_inst|LessThan8~0_combout  & ( !\raz_inst|LessThan8~1_combout  ) )
 
-	.dataa(!\raz_inst|always0~1_combout ),
+	.dataa(!\raz_inst|Add0~1_sumout ),
 	.datab(!\raz_inst|always0~4_combout ),
 	.datac(!\raz_inst|always0~11_combout ),
-	.datad(!\raz_inst|Add0~1_sumout ),
-	.datae(!\raz_inst|LessThan8~1_combout ),
-	.dataf(!\raz_inst|LessThan8~0_combout ),
+	.datad(!\raz_inst|always0~1_combout ),
+	.datae(!\raz_inst|LessThan8~0_combout ),
+	.dataf(!\raz_inst|LessThan8~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115675,7 +116208,7 @@ defparam \raz_inst|always0~12 .lut_mask = 64'hFFFFFFFFFFFFF1F3;
 defparam \raz_inst|always0~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y15_N56
+// Location: FF_X46_Y12_N31
 dffeas \raz_inst|VGA_VS (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|always0~12_combout ),
@@ -115694,7 +116227,7 @@ defparam \raz_inst|VGA_VS .is_wysiwyg = "true";
 defparam \raz_inst|VGA_VS .power_up = "low";
 // synopsys translate_on
 
-// Location: IOIBUF_X89_Y25_N4
+// Location: IOIBUF_X40_Y0_N18
 cyclonev_io_ibuf \KEY[3]~input (
 	.i(KEY[3]),
 	.ibar(gnd),
@@ -115705,7 +116238,7 @@ defparam \KEY[3]~input .bus_hold = "false";
 defparam \KEY[3]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: LABCELL_X7_Y11_N3
+// Location: LABCELL_X56_Y34_N3
 cyclonev_lcell_comb \~QUARTUS_CREATED_GND~I (
 // Equation(s):
 
diff --git a/simulation/modelsim/de1_soc_wrapper_modelsim.xrf b/simulation/modelsim/de1_soc_wrapper_modelsim.xrf
index 565d01c4cd8f2c3258ec124ec17deec9484458bc..66638536683a3f54740d118ab37f7dd60b694e48 100644
--- a/simulation/modelsim/de1_soc_wrapper_modelsim.xrf
+++ b/simulation/modelsim/de1_soc_wrapper_modelsim.xrf
@@ -149,350 +149,492 @@ instance = comp, \tick_count[24] , tick_count[24], de1_soc_wrapper, 1
 instance = comp, \Add0~1 , Add0~1, de1_soc_wrapper, 1
 instance = comp, \tick_count[25] , tick_count[25], de1_soc_wrapper, 1
 instance = comp, \heartbeat~0 , heartbeat~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M66wx4 , soc_inst|m0_1|u_logic|M66wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jppvx4~0 , soc_inst|m0_1|u_logic|Jppvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tki2z4 , soc_inst|m0_1|u_logic|Tki2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ptgwx4~0 , soc_inst|m0_1|u_logic|Ptgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilpvx4~0 , soc_inst|m0_1|u_logic|Ilpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Itgwx4~0 , soc_inst|m0_1|u_logic|Itgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|mux_sel[2] , soc_inst|interconnect_1|mux_sel[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[25]~1 , soc_inst|interconnect_1|HRDATA[25]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A4t2z4 , soc_inst|m0_1|u_logic|A4t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4 , soc_inst|m0_1|u_logic|Ffj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE , soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Orewx4~0 , soc_inst|m0_1|u_logic|Orewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sy52z4~0 , soc_inst|m0_1|u_logic|Sy52z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Huqvx4~0 , soc_inst|m0_1|u_logic|Huqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzxvx4 , soc_inst|m0_1|u_logic|Kzxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4 , soc_inst|m0_1|u_logic|Nsk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8t2z4 , soc_inst|m0_1|u_logic|L8t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ucqvx4 , soc_inst|m0_1|u_logic|Ucqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7jwx4 , soc_inst|m0_1|u_logic|T7jwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhxvx4 , soc_inst|m0_1|u_logic|Xhxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icyvx4~0 , soc_inst|m0_1|u_logic|Icyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfd2z4~0 , soc_inst|m0_1|u_logic|Kfd2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcyvx4 , soc_inst|m0_1|u_logic|Pcyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ark2z4 , soc_inst|m0_1|u_logic|Ark2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfdwx4~0 , soc_inst|m0_1|u_logic|Qfdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duc2z4~0 , soc_inst|m0_1|u_logic|Duc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ncqvx4~0 , soc_inst|m0_1|u_logic|Ncqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pkxvx4~0 , soc_inst|m0_1|u_logic|Pkxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8d2z4~0 , soc_inst|m0_1|u_logic|R8d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P7d2z4~0 , soc_inst|m0_1|u_logic|P7d2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ju5wx4 , soc_inst|m0_1|u_logic|Ju5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vbovx4~0 , soc_inst|m0_1|u_logic|Vbovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9t2z4~feeder , soc_inst|m0_1|u_logic|Y9t2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9t2z4 , soc_inst|m0_1|u_logic|Y9t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~1 , soc_inst|m0_1|u_logic|Hdh2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wq5wx4 , soc_inst|m0_1|u_logic|Wq5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2lwx4~0 , soc_inst|m0_1|u_logic|G2lwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Howvx4~0 , soc_inst|m0_1|u_logic|Howvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2lwx4 , soc_inst|m0_1|u_logic|G2lwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~0 , soc_inst|m0_1|u_logic|Rbi3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wmc2z4~0 , soc_inst|m0_1|u_logic|Wmc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7fwx4~0 , soc_inst|m0_1|u_logic|L7fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Socwx4~0 , soc_inst|m0_1|u_logic|Socwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L5d2z4~0 , soc_inst|m0_1|u_logic|L5d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5d2z4~0 , soc_inst|m0_1|u_logic|Z5d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~2 , soc_inst|m0_1|u_logic|Mrsvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jppvx4~0 , soc_inst|m0_1|u_logic|Jppvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2mwx4~0 , soc_inst|m0_1|u_logic|I2mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B73wx4 , soc_inst|m0_1|u_logic|B73wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G1mwx4~0 , soc_inst|m0_1|u_logic|G1mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A4c2z4~0 , soc_inst|m0_1|u_logic|A4c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~0 , soc_inst|m0_1|u_logic|Bpzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0mwx4~0 , soc_inst|m0_1|u_logic|Z0mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1vvx4~0 , soc_inst|m0_1|u_logic|B1vvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~0 , soc_inst|m0_1|u_logic|Hdh2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qaqvx4~0 , soc_inst|m0_1|u_logic|Qaqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aok2z4 , soc_inst|m0_1|u_logic|Aok2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G97wx4~0 , soc_inst|m0_1|u_logic|G97wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P2mwx4~0 , soc_inst|m0_1|u_logic|P2mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pa7wx4~0 , soc_inst|m0_1|u_logic|Pa7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwrite_o~0 , soc_inst|m0_1|u_logic|hwrite_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~1 , soc_inst|m0_1|u_logic|Dcrwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~0 , soc_inst|m0_1|u_logic|Dcrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xx2wx4 , soc_inst|m0_1|u_logic|Xx2wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~2 , soc_inst|m0_1|u_logic|Dcrwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wdqvx4~0 , soc_inst|m0_1|u_logic|Wdqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A4t2z4 , soc_inst|m0_1|u_logic|A4t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~2 , soc_inst|m0_1|u_logic|Mhc2z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~3 , soc_inst|m0_1|u_logic|Mhc2z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzxvx4 , soc_inst|m0_1|u_logic|Kzxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wmc2z4~0 , soc_inst|m0_1|u_logic|Wmc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~2 , soc_inst|m0_1|u_logic|Mhc2z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~4 , soc_inst|m0_1|u_logic|Mhc2z4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O9qvx4~0 , soc_inst|m0_1|u_logic|O9qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rsqvx4~0 , soc_inst|m0_1|u_logic|Rsqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ag4wx4~0 , soc_inst|m0_1|u_logic|Ag4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkxvx4~0 , soc_inst|m0_1|u_logic|Wkxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4~0 , soc_inst|m0_1|u_logic|Mtqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sy2wx4~0 , soc_inst|m0_1|u_logic|Sy2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~0 , soc_inst|m0_1|u_logic|Bpzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P03wx4~0 , soc_inst|m0_1|u_logic|P03wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Og4wx4~0 , soc_inst|m0_1|u_logic|Og4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4 , soc_inst|m0_1|u_logic|Mtqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kgc2z4~0 , soc_inst|m0_1|u_logic|Kgc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~4 , soc_inst|m0_1|u_logic|Dcrwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~3 , soc_inst|m0_1|u_logic|Dcrwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~0 , soc_inst|m0_1|u_logic|Fuhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mac2z4~0 , soc_inst|m0_1|u_logic|Mac2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~5 , soc_inst|m0_1|u_logic|Dcrwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X77wx4 , soc_inst|m0_1|u_logic|X77wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G0w2z4 , soc_inst|m0_1|u_logic|G0w2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Nxqvx4~0 , soc_inst|m0_1|u_logic|Nxqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1rvx4~0 , soc_inst|m0_1|u_logic|H1rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp3wx4~0 , soc_inst|m0_1|u_logic|Qp3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jp3wx4 , soc_inst|m0_1|u_logic|Jp3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9pvx4~0 , soc_inst|m0_1|u_logic|M9pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Howvx4~0 , soc_inst|m0_1|u_logic|Howvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xkfwx4~0 , soc_inst|m0_1|u_logic|Xkfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y8pvx4~0 , soc_inst|m0_1|u_logic|Y8pvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S5pvx4 , soc_inst|m0_1|u_logic|S5pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxx2z4 , soc_inst|m0_1|u_logic|Hxx2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yghvx4~0 , soc_inst|m0_1|u_logic|Yghvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Tyx2z4 , soc_inst|m0_1|u_logic|Tyx2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ibrwx4~0 , soc_inst|m0_1|u_logic|Ibrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxx2z4 , soc_inst|m0_1|u_logic|Hxx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|B8c2z4~0 , soc_inst|m0_1|u_logic|B8c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vaw2z4 , soc_inst|m0_1|u_logic|Vaw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bpsvx4~0 , soc_inst|m0_1|u_logic|Bpsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xnrvx4~0 , soc_inst|m0_1|u_logic|Xnrvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jvqvx4~1 , soc_inst|m0_1|u_logic|Jvqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|write_cycle , soc_inst|ram_1|write_cycle, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wpsvx4~0 , soc_inst|m0_1|u_logic|Wpsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H4nwx4 , soc_inst|m0_1|u_logic|H4nwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9t2z4 , soc_inst|m0_1|u_logic|Y9t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~0 , soc_inst|m0_1|u_logic|F5mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Egkwx4~0 , soc_inst|m0_1|u_logic|Egkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O9qvx4~0 , soc_inst|m0_1|u_logic|O9qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sy2wx4~0 , soc_inst|m0_1|u_logic|Sy2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O76wx4 , soc_inst|m0_1|u_logic|O76wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A76wx4~0 , soc_inst|m0_1|u_logic|A76wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W46wx4~0 , soc_inst|m0_1|u_logic|W46wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G36wx4~0 , soc_inst|m0_1|u_logic|G36wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|write_cycle~0 , soc_inst|ram_1|write_cycle~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|write_cycle~DUPLICATE , soc_inst|ram_1|write_cycle~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~1 , soc_inst|m0_1|u_logic|Hdh2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5vvx4 , soc_inst|m0_1|u_logic|J5vvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4w2z4 , soc_inst|m0_1|u_logic|S4w2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|I1c2z4 , soc_inst|m0_1|u_logic|I1c2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wpsvx4~0 , soc_inst|m0_1|u_logic|Wpsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A0zvx4~0 , soc_inst|m0_1|u_logic|A0zvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|C9yvx4 , soc_inst|m0_1|u_logic|C9yvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ncqvx4~0 , soc_inst|m0_1|u_logic|Ncqvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|P1c2z4~0 , soc_inst|m0_1|u_logic|P1c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z7fwx4~0 , soc_inst|m0_1|u_logic|Z7fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhiwx4~0 , soc_inst|m0_1|u_logic|Xhiwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G0c2z4~0 , soc_inst|m0_1|u_logic|G0c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zzb2z4~0 , soc_inst|m0_1|u_logic|Zzb2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z7fwx4~0 , soc_inst|m0_1|u_logic|Z7fwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~0 , soc_inst|m0_1|u_logic|Jyb2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhiwx4~0 , soc_inst|m0_1|u_logic|Xhiwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~1 , soc_inst|m0_1|u_logic|Jyb2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~2 , soc_inst|m0_1|u_logic|Jyb2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE , soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O092z4~0 , soc_inst|m0_1|u_logic|O092z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K1z2z4 , soc_inst|m0_1|u_logic|K1z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bxcwx4~0 , soc_inst|m0_1|u_logic|Bxcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lu6wx4~0 , soc_inst|m0_1|u_logic|Lu6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E6nwx4~0 , soc_inst|m0_1|u_logic|E6nwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8rwx4~0 , soc_inst|m0_1|u_logic|Q8rwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|mux_sel[2]~feeder , soc_inst|interconnect_1|mux_sel[2]~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|mux_sel[2] , soc_inst|interconnect_1|mux_sel[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[25]~1 , soc_inst|interconnect_1|HRDATA[25]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~0 , soc_inst|switches_1|half_word_address~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z1ewx4~0 , soc_inst|m0_1|u_logic|Z1ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkxvx4~0 , soc_inst|m0_1|u_logic|Wkxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~1 , soc_inst|m0_1|u_logic|Rfpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X4pvx4 , soc_inst|m0_1|u_logic|X4pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~0 , soc_inst|m0_1|u_logic|J4pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~1 , soc_inst|m0_1|u_logic|J4pvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dfd2z4 , soc_inst|m0_1|u_logic|Dfd2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa7wx4~0 , soc_inst|m0_1|u_logic|Wa7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4 , soc_inst|m0_1|u_logic|Pdi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~0 , soc_inst|m0_1|u_logic|Eyhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffxvx4~0 , soc_inst|m0_1|u_logic|Ffxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfovx4 , soc_inst|m0_1|u_logic|Wfovx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Slnvx4~0 , soc_inst|m0_1|u_logic|Slnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xnrvx4~0 , soc_inst|m0_1|u_logic|Xnrvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Edovx4 , soc_inst|m0_1|u_logic|Edovx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|T1y2z4 , soc_inst|m0_1|u_logic|T1y2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jcw2z4 , soc_inst|m0_1|u_logic|Jcw2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Llnvx4~0 , soc_inst|m0_1|u_logic|Llnvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Llnvx4 , soc_inst|m0_1|u_logic|Llnvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Socwx4~0 , soc_inst|m0_1|u_logic|Socwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~0 , soc_inst|m0_1|u_logic|Lhyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxc2z4 , soc_inst|m0_1|u_logic|Qxc2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~1 , soc_inst|m0_1|u_logic|Lhyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ps3wx4~0 , soc_inst|m0_1|u_logic|Ps3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X8zvx4 , soc_inst|m0_1|u_logic|X8zvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~0 , soc_inst|m0_1|u_logic|Evcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~1 , soc_inst|m0_1|u_logic|Evcwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T3ovx4~0 , soc_inst|m0_1|u_logic|T3ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4 , soc_inst|m0_1|u_logic|Qdj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wxcwx4~0 , soc_inst|m0_1|u_logic|Wxcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~0 , soc_inst|m0_1|u_logic|Sknwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kswwx4~0 , soc_inst|m0_1|u_logic|Kswwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rngwx4 , soc_inst|m0_1|u_logic|Rngwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jbhwx4~0 , soc_inst|m0_1|u_logic|Jbhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ry5wx4~0 , soc_inst|m0_1|u_logic|Ry5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~0 , soc_inst|m0_1|u_logic|hprot_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~1 , soc_inst|m0_1|u_logic|hprot_o~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T1xvx4~0 , soc_inst|m0_1|u_logic|T1xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na6wx4~0 , soc_inst|m0_1|u_logic|Na6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wdxvx4~0 , soc_inst|m0_1|u_logic|Wdxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yy5wx4~0 , soc_inst|m0_1|u_logic|Yy5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qx52z4~0 , soc_inst|m0_1|u_logic|Qx52z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~4 , soc_inst|m0_1|u_logic|hprot_o~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~2 , soc_inst|m0_1|u_logic|hprot_o~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sy52z4~0 , soc_inst|m0_1|u_logic|Sy52z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~3 , soc_inst|m0_1|u_logic|hprot_o~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~5 , soc_inst|m0_1|u_logic|hprot_o~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5qvx4 , soc_inst|m0_1|u_logic|U5qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wxp2z4 , soc_inst|m0_1|u_logic|Wxp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W28wx4~0 , soc_inst|m0_1|u_logic|W28wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1pvx4~0 , soc_inst|m0_1|u_logic|R1pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jux2z4 , soc_inst|m0_1|u_logic|Jux2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kryvx4~0 , soc_inst|m0_1|u_logic|Kryvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K0qvx4 , soc_inst|m0_1|u_logic|K0qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Shyvx4~0 , soc_inst|m0_1|u_logic|Shyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pmgwx4~0 , soc_inst|m0_1|u_logic|Pmgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ez8wx4~0 , soc_inst|m0_1|u_logic|Ez8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmawx4~0 , soc_inst|m0_1|u_logic|Rmawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jucwx4~0 , soc_inst|m0_1|u_logic|Jucwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Otcwx4~0 , soc_inst|m0_1|u_logic|Otcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~0 , soc_inst|m0_1|u_logic|Fuawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~1 , soc_inst|m0_1|u_logic|Fuawx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|H4ovx4~0 , soc_inst|m0_1|u_logic|H4ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~0 , soc_inst|m0_1|u_logic|Evcwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fzcwx4~0 , soc_inst|m0_1|u_logic|Fzcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T3ovx4~0 , soc_inst|m0_1|u_logic|T3ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~1 , soc_inst|m0_1|u_logic|Evcwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wzawx4 , soc_inst|m0_1|u_logic|Wzawx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~0 , soc_inst|m0_1|u_logic|Glnwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~0 , soc_inst|m0_1|u_logic|Fuhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8t2z4 , soc_inst|m0_1|u_logic|L8t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qaqvx4~0 , soc_inst|m0_1|u_logic|Qaqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E6nwx4~0 , soc_inst|m0_1|u_logic|E6nwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G36wx4~0 , soc_inst|m0_1|u_logic|G36wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfdwx4~0 , soc_inst|m0_1|u_logic|Qfdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mn3wx4~0 , soc_inst|m0_1|u_logic|Mn3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ucqvx4 , soc_inst|m0_1|u_logic|Ucqvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X77wx4 , soc_inst|m0_1|u_logic|X77wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Una2z4~0 , soc_inst|m0_1|u_logic|Una2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~1 , soc_inst|m0_1|u_logic|C5c2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~0 , soc_inst|m0_1|u_logic|C5c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H0zvx4~0 , soc_inst|m0_1|u_logic|H0zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z6c2z4~0 , soc_inst|m0_1|u_logic|Z6c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~2 , soc_inst|m0_1|u_logic|C5c2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~0 , soc_inst|m0_1|u_logic|Hdh2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~0 , soc_inst|m0_1|u_logic|Ppsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~1 , soc_inst|m0_1|u_logic|Ppsvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~2 , soc_inst|m0_1|u_logic|Ppsvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4 , soc_inst|m0_1|u_logic|Ppsvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~0 , soc_inst|m0_1|u_logic|S6ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhxvx4 , soc_inst|m0_1|u_logic|Xhxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X5gwx4~0 , soc_inst|m0_1|u_logic|X5gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~0 , soc_inst|m0_1|u_logic|D4mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~0 , soc_inst|m0_1|u_logic|J4pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~1 , soc_inst|m0_1|u_logic|J4pvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X4pvx4 , soc_inst|m0_1|u_logic|X4pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z1ewx4~0 , soc_inst|m0_1|u_logic|Z1ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahwvx4~0 , soc_inst|m0_1|u_logic|Ahwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2yvx4 , soc_inst|m0_1|u_logic|C2yvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohwvx4 , soc_inst|m0_1|u_logic|Ohwvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z3yvx4 , soc_inst|m0_1|u_logic|Z3yvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ukpvx4 , soc_inst|m0_1|u_logic|Ukpvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~0 , soc_inst|m0_1|u_logic|Rmpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rngwx4 , soc_inst|m0_1|u_logic|Rngwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~1 , soc_inst|m0_1|u_logic|Rmpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvewx4~0 , soc_inst|m0_1|u_logic|Wvewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H5fwx4~0 , soc_inst|m0_1|u_logic|H5fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icyvx4~0 , soc_inst|m0_1|u_logic|Icyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpqvx4~0 , soc_inst|m0_1|u_logic|Zpqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwqvx4~0 , soc_inst|m0_1|u_logic|Lwqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|read_enable~0 , soc_inst|switches_1|read_enable~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|read_enable , soc_inst|switches_1|read_enable, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~37 , soc_inst|interconnect_1|HRDATA[1]~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~2 , soc_inst|m0_1|u_logic|Evcwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa7wx4~0 , soc_inst|m0_1|u_logic|Wa7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G97wx4~2 , soc_inst|m0_1|u_logic|G97wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Donvx4~0 , soc_inst|m0_1|u_logic|Donvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Donvx4~1 , soc_inst|m0_1|u_logic|Donvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G97wx4~1 , soc_inst|m0_1|u_logic|G97wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Donvx4~2 , soc_inst|m0_1|u_logic|Donvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J3iwx4~0 , soc_inst|m0_1|u_logic|J3iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[0] , soc_inst|ram_1|saved_word_address[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[0]~0 , soc_inst|ram_1|memory.raddr_a[0]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bnnvx4 , soc_inst|m0_1|u_logic|Bnnvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Viy2z4 , soc_inst|m0_1|u_logic|Viy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vapvx4 , soc_inst|m0_1|u_logic|Vapvx4, de1_soc_wrapper, 1
-instance = comp, \SW[2]~input , SW[2]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][2]~feeder , soc_inst|switches_1|switch_store[0][2]~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~1 , soc_inst|m0_1|u_logic|Mddwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~0 , soc_inst|m0_1|u_logic|Mddwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~0 , soc_inst|m0_1|u_logic|Kcdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jfdwx4~0 , soc_inst|m0_1|u_logic|Jfdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~1 , soc_inst|m0_1|u_logic|Kcdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W19wx4~0 , soc_inst|m0_1|u_logic|W19wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pm9wx4~0 , soc_inst|m0_1|u_logic|Pm9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y29wx4 , soc_inst|m0_1|u_logic|Y29wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ilpvx4~0 , soc_inst|m0_1|u_logic|Ilpvx4~0, de1_soc_wrapper, 1
+instance = comp, \SW[3]~input , SW[3]~input, de1_soc_wrapper, 1
 instance = comp, \KEY[0]~input , KEY[0]~input, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|last_buttons[0]~1 , soc_inst|switches_1|last_buttons[0]~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|last_buttons[0] , soc_inst|switches_1|last_buttons[0], de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|always0~1 , soc_inst|switches_1|always0~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][2] , soc_inst|switches_1|switch_store[0][2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~1 , soc_inst|m0_1|u_logic|Bpzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][3] , soc_inst|switches_1|switch_store[0][3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~2 , soc_inst|m0_1|u_logic|Evcwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~1 , soc_inst|m0_1|u_logic|Xwawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~2 , soc_inst|m0_1|u_logic|Xwawx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~3 , soc_inst|m0_1|u_logic|Xwawx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~0 , soc_inst|m0_1|u_logic|Xwawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L4bwx4~0 , soc_inst|m0_1|u_logic|L4bwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|hsize_o~0 , soc_inst|m0_1|u_logic|hsize_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~0 , soc_inst|switches_1|half_word_address~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|byte2~0 , soc_inst|ram_1|byte2~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[2] , soc_inst|ram_1|byte_select[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[2]~DUPLICATE , soc_inst|ram_1|byte_select[2]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|read_enable~0 , soc_inst|switches_1|read_enable~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|read_enable , soc_inst|switches_1|read_enable, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address[1]~DUPLICATE , soc_inst|switches_1|half_word_address[1]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[8]~5 , soc_inst|interconnect_1|HRDATA[8]~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[24]~6 , soc_inst|interconnect_1|HRDATA[24]~6, de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|HRDATA[20]~7 , soc_inst|interconnect_1|HRDATA[20]~7, de1_soc_wrapper, 1
-instance = comp, \SW[5]~input , SW[5]~input, de1_soc_wrapper, 1
+instance = comp, \SW[1]~input , SW[1]~input, de1_soc_wrapper, 1
 instance = comp, \KEY[1]~input , KEY[1]~input, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|last_buttons[1]~0 , soc_inst|switches_1|last_buttons[1]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|last_buttons[1] , soc_inst|switches_1|last_buttons[1], de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|always0~0 , soc_inst|switches_1|always0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][5] , soc_inst|switches_1|switch_store[1][5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W28wx4~0 , soc_inst|m0_1|u_logic|W28wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Egkwx4~0 , soc_inst|m0_1|u_logic|Egkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~3 , soc_inst|m0_1|u_logic|Df3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~4 , soc_inst|m0_1|u_logic|Df3wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp3wx4~0 , soc_inst|m0_1|u_logic|Qp3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jp3wx4 , soc_inst|m0_1|u_logic|Jp3wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xiwvx4~0 , soc_inst|m0_1|u_logic|Xiwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][1] , soc_inst|switches_1|switch_store[1][1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|write_cycle , soc_inst|ram_1|write_cycle, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[0] , soc_inst|ram_1|saved_word_address[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[0]~0 , soc_inst|ram_1|memory.raddr_a[0]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0pvx4~0 , soc_inst|m0_1|u_logic|P0pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xx93z4 , soc_inst|m0_1|u_logic|Xx93z4, de1_soc_wrapper, 1
+instance = comp, \SW[7]~input , SW[7]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][7] , soc_inst|switches_1|switch_store[0][7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[7] , soc_inst|m0_1|u_logic|hwdata_o[7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[7]~4 , soc_inst|ram_1|data_to_memory[7]~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J3iwx4~0 , soc_inst|m0_1|u_logic|J3iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ocfwx4~0 , soc_inst|m0_1|u_logic|Ocfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1d2z4~0 , soc_inst|m0_1|u_logic|R1d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E4iwx4~0 , soc_inst|m0_1|u_logic|E4iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2lwx4~0 , soc_inst|m0_1|u_logic|G2lwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bxcwx4~0 , soc_inst|m0_1|u_logic|Bxcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lu6wx4~0 , soc_inst|m0_1|u_logic|Lu6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Srgwx4~0 , soc_inst|m0_1|u_logic|Srgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzyvx4~0 , soc_inst|m0_1|u_logic|Fzyvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Csewx4~0 , soc_inst|m0_1|u_logic|Csewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V1yvx4~0 , soc_inst|m0_1|u_logic|V1yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5vvx4 , soc_inst|m0_1|u_logic|J5vvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5qvx4 , soc_inst|m0_1|u_logic|U5qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W0pvx4 , soc_inst|m0_1|u_logic|W0pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~2 , soc_inst|m0_1|u_logic|Xwawx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~1 , soc_inst|m0_1|u_logic|Xwawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~3 , soc_inst|m0_1|u_logic|Xwawx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~0 , soc_inst|m0_1|u_logic|Xwawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtrwx4~0 , soc_inst|m0_1|u_logic|Qtrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dplwx4~0 , soc_inst|m0_1|u_logic|Dplwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cllwx4~0 , soc_inst|m0_1|u_logic|Cllwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mk6wx4~0 , soc_inst|m0_1|u_logic|Mk6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G27wx4~0 , soc_inst|m0_1|u_logic|G27wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~0 , soc_inst|m0_1|u_logic|X3xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~1 , soc_inst|m0_1|u_logic|X3xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~3 , soc_inst|m0_1|u_logic|U6wvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~4 , soc_inst|m0_1|u_logic|U6wvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~1 , soc_inst|m0_1|u_logic|U6wvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvewx4~0 , soc_inst|m0_1|u_logic|Wvewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H5fwx4~0 , soc_inst|m0_1|u_logic|H5fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7swx4~0 , soc_inst|m0_1|u_logic|J7swx4~0, de1_soc_wrapper, 1
+instance = comp, \SW[5]~input , SW[5]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][5] , soc_inst|switches_1|switch_store[1][5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H0dwx4~0 , soc_inst|m0_1|u_logic|H0dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4 , soc_inst|m0_1|u_logic|Cyq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~2 , soc_inst|m0_1|u_logic|Z4bwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y5dwx4~0 , soc_inst|m0_1|u_logic|Y5dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uwyvx4~0 , soc_inst|m0_1|u_logic|Uwyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~0 , soc_inst|m0_1|u_logic|W4dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~1 , soc_inst|m0_1|u_logic|W4dwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I4dwx4~0 , soc_inst|m0_1|u_logic|I4dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~0 , soc_inst|m0_1|u_logic|Z4bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O0dwx4~0 , soc_inst|m0_1|u_logic|O0dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xucwx4~0 , soc_inst|m0_1|u_logic|Xucwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxc2z4~0 , soc_inst|m0_1|u_logic|Cxc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~0 , soc_inst|m0_1|u_logic|Fbfwx4~0, de1_soc_wrapper, 1
+instance = comp, \SW[0]~input , SW[0]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][0] , soc_inst|switches_1|switch_store[1][0], de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qsewx4~0 , soc_inst|m0_1|u_logic|Qsewx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|P7wvx4~0 , soc_inst|m0_1|u_logic|P7wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qslwx4~0 , soc_inst|m0_1|u_logic|Qslwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fyrwx4~0 , soc_inst|m0_1|u_logic|Fyrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fyrwx4~1 , soc_inst|m0_1|u_logic|Fyrwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Surwx4~0 , soc_inst|m0_1|u_logic|Surwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~0 , soc_inst|m0_1|u_logic|Dghvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gvrwx4~0 , soc_inst|m0_1|u_logic|Gvrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0pvx4~0 , soc_inst|m0_1|u_logic|P0pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~0 , soc_inst|m0_1|u_logic|Qnkvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~1 , soc_inst|m0_1|u_logic|Qnkvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Efp2z4 , soc_inst|m0_1|u_logic|Efp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxc2z4~0 , soc_inst|m0_1|u_logic|Cxc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~0 , soc_inst|m0_1|u_logic|Kuc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vwc2z4~0 , soc_inst|m0_1|u_logic|Vwc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~0 , soc_inst|m0_1|u_logic|Awc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~1 , soc_inst|m0_1|u_logic|Awc2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~0 , soc_inst|m0_1|u_logic|K6yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][7] , soc_inst|switches_1|switch_store[1][7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~37 , soc_inst|m0_1|u_logic|Add2~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~57 , soc_inst|m0_1|u_logic|Add2~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~0 , soc_inst|m0_1|u_logic|Glhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T1d3z4 , soc_inst|m0_1|u_logic|T1d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ps3wx4~0 , soc_inst|m0_1|u_logic|Ps3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~0 , soc_inst|m0_1|u_logic|Lhyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxc2z4 , soc_inst|m0_1|u_logic|Qxc2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~1 , soc_inst|m0_1|u_logic|Lhyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~2 , soc_inst|m0_1|u_logic|Lhyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE , soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rsqvx4~0 , soc_inst|m0_1|u_logic|Rsqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1rvx4~0 , soc_inst|m0_1|u_logic|H1rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7w2z4 , soc_inst|m0_1|u_logic|U7w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~0 , soc_inst|m0_1|u_logic|Cr0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~1 , soc_inst|m0_1|u_logic|Cr0xx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~0 , soc_inst|m0_1|u_logic|Q5vvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kofwx4~0 , soc_inst|m0_1|u_logic|Kofwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9i2z4 , soc_inst|m0_1|u_logic|H9i2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk4wx4 , soc_inst|m0_1|u_logic|Bk4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nqy2z4 , soc_inst|m0_1|u_logic|Nqy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W7hwx4~0 , soc_inst|m0_1|u_logic|W7hwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~0 , soc_inst|m0_1|u_logic|Poa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~0 , soc_inst|m0_1|u_logic|Ik4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~1 , soc_inst|m0_1|u_logic|Ik4wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Si4wx4~0 , soc_inst|m0_1|u_logic|Si4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~0 , soc_inst|m0_1|u_logic|Pd4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~1 , soc_inst|m0_1|u_logic|Pd4wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~2 , soc_inst|m0_1|u_logic|Pd4wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~1 , soc_inst|m0_1|u_logic|Q5vvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7mvx4~0 , soc_inst|m0_1|u_logic|Q7mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE , soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~0 , soc_inst|m0_1|u_logic|Glnwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ukpvx4 , soc_inst|m0_1|u_logic|Ukpvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2yvx4 , soc_inst|m0_1|u_logic|C2yvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z3yvx4 , soc_inst|m0_1|u_logic|Z3yvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~0 , soc_inst|m0_1|u_logic|Rmpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahwvx4~0 , soc_inst|m0_1|u_logic|Ahwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohwvx4 , soc_inst|m0_1|u_logic|Ohwvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~1 , soc_inst|m0_1|u_logic|Rmpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yplwx4~0 , soc_inst|m0_1|u_logic|Yplwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dplwx4~0 , soc_inst|m0_1|u_logic|Dplwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vopvx4~0 , soc_inst|m0_1|u_logic|Vopvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A1yvx4~0 , soc_inst|m0_1|u_logic|A1yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnpvx4~0 , soc_inst|m0_1|u_logic|Mnpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~4 , soc_inst|m0_1|u_logic|Kfpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vnxvx4~0 , soc_inst|m0_1|u_logic|Vnxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xipvx4~0 , soc_inst|m0_1|u_logic|Xipvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gxxvx4~0 , soc_inst|m0_1|u_logic|Gxxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ljpvx4~0 , soc_inst|m0_1|u_logic|Ljpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jipvx4~0 , soc_inst|m0_1|u_logic|Jipvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|DataValid~1 , soc_inst|switches_1|DataValid~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|DataValid[0] , soc_inst|switches_1|DataValid[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~20 , soc_inst|interconnect_1|HRDATA[1]~20, de1_soc_wrapper, 1
-instance = comp, \SW[0]~input , SW[0]~input, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|switch_store[0][0] , soc_inst|switches_1|switch_store[0][0], de1_soc_wrapper, 1
-instance = comp, \SW[3]~input , SW[3]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][3] , soc_inst|switches_1|switch_store[1][3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~1 , soc_inst|m0_1|u_logic|Gzvvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~0 , soc_inst|m0_1|u_logic|Gzvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~2 , soc_inst|m0_1|u_logic|Gzvvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgnvx4~0 , soc_inst|m0_1|u_logic|Pgnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I793z4 , soc_inst|m0_1|u_logic|I793z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fskvx4~0 , soc_inst|m0_1|u_logic|Fskvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U593z4 , soc_inst|m0_1|u_logic|U593z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ut0xx4~0 , soc_inst|m0_1|u_logic|Ut0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address[0] , soc_inst|switches_1|half_word_address[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[1]~37 , soc_inst|interconnect_1|HRDATA[1]~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[1]~20 , soc_inst|interconnect_1|HRDATA[1]~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~5 , soc_inst|m0_1|u_logic|hwdata_o~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[0]~27 , soc_inst|ram_1|data_to_memory[0]~27, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[5] , soc_inst|ram_1|saved_word_address[5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[5]~5 , soc_inst|ram_1|memory.raddr_a[5]~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[6] , soc_inst|ram_1|saved_word_address[6], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[6]~6 , soc_inst|ram_1|memory.raddr_a[6]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Szr2z4 , soc_inst|m0_1|u_logic|Szr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohivx4~0 , soc_inst|m0_1|u_logic|Ohivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~53 , soc_inst|m0_1|u_logic|Add2~53, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~49 , soc_inst|m0_1|u_logic|Add2~49, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~45 , soc_inst|m0_1|u_logic|Add2~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~0 , soc_inst|m0_1|u_logic|Bfhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C8rwx4~0 , soc_inst|m0_1|u_logic|C8rwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlnwx4~0 , soc_inst|m0_1|u_logic|Nlnwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oldwx4~0 , soc_inst|m0_1|u_logic|Oldwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lcowx4~0 , soc_inst|m0_1|u_logic|Lcowx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Oi2wx4~0 , soc_inst|m0_1|u_logic|Oi2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~0 , soc_inst|m0_1|u_logic|Cr0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ut0xx4~0 , soc_inst|m0_1|u_logic|Ut0xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Oi2wx4~1 , soc_inst|m0_1|u_logic|Oi2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A4c2z4~0 , soc_inst|m0_1|u_logic|A4c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zy2wx4~0 , soc_inst|m0_1|u_logic|Zy2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Enrwx4~0 , soc_inst|m0_1|u_logic|Enrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V2iwx4~0 , soc_inst|m0_1|u_logic|V2iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Herwx4~0 , soc_inst|m0_1|u_logic|Herwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Herwx4~1 , soc_inst|m0_1|u_logic|Herwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~0 , soc_inst|m0_1|u_logic|Yafwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~1 , soc_inst|m0_1|u_logic|Yafwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~2 , soc_inst|m0_1|u_logic|Yafwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V1yvx4~0 , soc_inst|m0_1|u_logic|V1yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rjrwx4~0 , soc_inst|m0_1|u_logic|Rjrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~0 , soc_inst|m0_1|u_logic|Qllwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mkrwx4 , soc_inst|m0_1|u_logic|Mkrwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J3xvx4 , soc_inst|m0_1|u_logic|J3xvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M66wx4 , soc_inst|m0_1|u_logic|M66wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~3 , soc_inst|m0_1|u_logic|Yafwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~4 , soc_inst|m0_1|u_logic|Yafwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~5 , soc_inst|m0_1|u_logic|Yafwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~0 , soc_inst|m0_1|u_logic|Ggswx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2lwx4 , soc_inst|m0_1|u_logic|G2lwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~1 , soc_inst|m0_1|u_logic|Ggswx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~2 , soc_inst|m0_1|u_logic|Ggswx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4 , soc_inst|m0_1|u_logic|Yaz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~1 , soc_inst|m0_1|u_logic|Qj2wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~0 , soc_inst|m0_1|u_logic|Qj2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ro0xx4~0 , soc_inst|m0_1|u_logic|Ro0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~2 , soc_inst|m0_1|u_logic|Qj2wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fw0xx4~0 , soc_inst|m0_1|u_logic|Fw0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ax0xx4~0 , soc_inst|m0_1|u_logic|Ax0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~0 , soc_inst|m0_1|u_logic|Vi2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~1 , soc_inst|m0_1|u_logic|Vi2wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vb2wx4~0 , soc_inst|m0_1|u_logic|Vb2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hw2wx4~0 , soc_inst|m0_1|u_logic|Hw2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xr0xx4 , soc_inst|m0_1|u_logic|Xr0xx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jq2wx4~0 , soc_inst|m0_1|u_logic|Jq2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Nz2wx4~0 , soc_inst|m0_1|u_logic|Nz2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zy2wx4~0 , soc_inst|m0_1|u_logic|Zy2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~0 , soc_inst|m0_1|u_logic|Fh2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xx2wx4 , soc_inst|m0_1|u_logic|Xx2wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It2wx4~0 , soc_inst|m0_1|u_logic|It2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey2wx4~0 , soc_inst|m0_1|u_logic|Ey2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ru2wx4~0 , soc_inst|m0_1|u_logic|Ru2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bt2wx4~0 , soc_inst|m0_1|u_logic|Bt2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~5 , soc_inst|m0_1|u_logic|Fh2wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L53wx4~2 , soc_inst|m0_1|u_logic|L53wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L53wx4~0 , soc_inst|m0_1|u_logic|L53wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L53wx4~1 , soc_inst|m0_1|u_logic|L53wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L53wx4~3 , soc_inst|m0_1|u_logic|L53wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~1 , soc_inst|m0_1|u_logic|Fh2wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Op2wx4~0 , soc_inst|m0_1|u_logic|Op2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~2 , soc_inst|m0_1|u_logic|Fh2wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It2wx4~0 , soc_inst|m0_1|u_logic|It2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~3 , soc_inst|m0_1|u_logic|Fh2wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~4 , soc_inst|m0_1|u_logic|Fh2wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L53wx4~2 , soc_inst|m0_1|u_logic|L53wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B73wx4 , soc_inst|m0_1|u_logic|B73wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hw2wx4~0 , soc_inst|m0_1|u_logic|Hw2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L53wx4~0 , soc_inst|m0_1|u_logic|L53wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L53wx4~1 , soc_inst|m0_1|u_logic|L53wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L53wx4~3 , soc_inst|m0_1|u_logic|L53wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey2wx4~0 , soc_inst|m0_1|u_logic|Ey2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ru2wx4~0 , soc_inst|m0_1|u_logic|Ru2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bt2wx4~0 , soc_inst|m0_1|u_logic|Bt2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~5 , soc_inst|m0_1|u_logic|Fh2wx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xc2wx4~0 , soc_inst|m0_1|u_logic|Xc2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~0 , soc_inst|m0_1|u_logic|Ge2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~1 , soc_inst|m0_1|u_logic|Yafwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~0 , soc_inst|m0_1|u_logic|Yafwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~2 , soc_inst|m0_1|u_logic|Yafwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nkpvx4~0 , soc_inst|m0_1|u_logic|Nkpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7swx4~0 , soc_inst|m0_1|u_logic|J7swx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pkxvx4~0 , soc_inst|m0_1|u_logic|Pkxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~3 , soc_inst|m0_1|u_logic|Yafwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~4 , soc_inst|m0_1|u_logic|Yafwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~0 , soc_inst|m0_1|u_logic|Qllwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nqy2z4 , soc_inst|m0_1|u_logic|Nqy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4fwx4~0 , soc_inst|m0_1|u_logic|M4fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rjrwx4~0 , soc_inst|m0_1|u_logic|Rjrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mkrwx4 , soc_inst|m0_1|u_logic|Mkrwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J3xvx4 , soc_inst|m0_1|u_logic|J3xvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~5 , soc_inst|m0_1|u_logic|Yafwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4 , soc_inst|m0_1|u_logic|Sjj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|My6wx4~0 , soc_inst|m0_1|u_logic|My6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vnxvx4~0 , soc_inst|m0_1|u_logic|Vnxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~0 , soc_inst|m0_1|u_logic|K6yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~1 , soc_inst|m0_1|u_logic|K6yvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~2 , soc_inst|m0_1|u_logic|K6yvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~3 , soc_inst|m0_1|u_logic|K6yvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~4 , soc_inst|m0_1|u_logic|K6yvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X8kwx4~0 , soc_inst|m0_1|u_logic|X8kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~5 , soc_inst|m0_1|u_logic|K6yvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~7 , soc_inst|m0_1|u_logic|K6yvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2mwx4~0 , soc_inst|m0_1|u_logic|I2mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~8 , soc_inst|m0_1|u_logic|K6yvx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zzfwx4~0 , soc_inst|m0_1|u_logic|Zzfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tuwvx4~0 , soc_inst|m0_1|u_logic|Tuwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T1xvx4~0 , soc_inst|m0_1|u_logic|T1xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~6 , soc_inst|m0_1|u_logic|K6yvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~9 , soc_inst|m0_1|u_logic|K6yvx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~10 , soc_inst|m0_1|u_logic|K6yvx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|If2wx4~0 , soc_inst|m0_1|u_logic|If2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vb2wx4 , soc_inst|m0_1|u_logic|Vb2wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zoy2z4 , soc_inst|m0_1|u_logic|Zoy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~1 , soc_inst|m0_1|u_logic|Kxkwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~0 , soc_inst|m0_1|u_logic|Kxkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fyrwx4~0 , soc_inst|m0_1|u_logic|Fyrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fyrwx4~1 , soc_inst|m0_1|u_logic|Fyrwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Surwx4~0 , soc_inst|m0_1|u_logic|Surwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qslwx4~0 , soc_inst|m0_1|u_logic|Qslwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~0 , soc_inst|m0_1|u_logic|Dghvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtrwx4~0 , soc_inst|m0_1|u_logic|Qtrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dsqvx4 , soc_inst|m0_1|u_logic|Dsqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gvrwx4~0 , soc_inst|m0_1|u_logic|Gvrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwqvx4~0 , soc_inst|m0_1|u_logic|Lwqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][5] , soc_inst|switches_1|switch_store[0][5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[5]~28 , soc_inst|interconnect_1|HRDATA[5]~28, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jvqvx4~1 , soc_inst|m0_1|u_logic|Jvqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yanvx4~0 , soc_inst|m0_1|u_logic|Yanvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F0y2z4 , soc_inst|m0_1|u_logic|F0y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ctrwx4~0 , soc_inst|m0_1|u_logic|Ctrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ctrwx4~1 , soc_inst|m0_1|u_logic|Ctrwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cllwx4~0 , soc_inst|m0_1|u_logic|Cllwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6z2z4 , soc_inst|m0_1|u_logic|I6z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kghvx4~0 , soc_inst|m0_1|u_logic|Kghvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE , soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~1 , soc_inst|m0_1|u_logic|Dghvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W7z2z4 , soc_inst|m0_1|u_logic|W7z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~0 , soc_inst|m0_1|u_logic|Wfhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~1 , soc_inst|m0_1|u_logic|Wfhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~2 , soc_inst|m0_1|u_logic|Wfhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K9z2z4 , soc_inst|m0_1|u_logic|K9z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~0 , soc_inst|m0_1|u_logic|Tykwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~1 , soc_inst|m0_1|u_logic|Tykwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~2 , soc_inst|m0_1|u_logic|Kxkwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~1 , soc_inst|m0_1|u_logic|Qj2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~0 , soc_inst|m0_1|u_logic|Qj2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jucwx4~0 , soc_inst|m0_1|u_logic|Jucwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ro0xx4~0 , soc_inst|m0_1|u_logic|Ro0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~2 , soc_inst|m0_1|u_logic|Qj2wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fw0xx4~0 , soc_inst|m0_1|u_logic|Fw0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ax0xx4~0 , soc_inst|m0_1|u_logic|Ax0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~0 , soc_inst|m0_1|u_logic|Vi2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~1 , soc_inst|m0_1|u_logic|Vi2wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~1 , soc_inst|m0_1|u_logic|Ge2wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~2 , soc_inst|m0_1|u_logic|Ge2wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1d2z4~0 , soc_inst|m0_1|u_logic|R1d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Keiwx4~0 , soc_inst|m0_1|u_logic|Keiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Celwx4~0 , soc_inst|m0_1|u_logic|Celwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Celwx4~1 , soc_inst|m0_1|u_logic|Celwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~0 , soc_inst|m0_1|u_logic|Fbfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~1 , soc_inst|m0_1|u_logic|Fbfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E4iwx4~0 , soc_inst|m0_1|u_logic|E4iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Enrwx4~0 , soc_inst|m0_1|u_logic|Enrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V2iwx4~0 , soc_inst|m0_1|u_logic|V2iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Herwx4~0 , soc_inst|m0_1|u_logic|Herwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Herwx4~1 , soc_inst|m0_1|u_logic|Herwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vb2wx4~0 , soc_inst|m0_1|u_logic|Vb2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xr0xx4 , soc_inst|m0_1|u_logic|Xr0xx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|If2wx4~0 , soc_inst|m0_1|u_logic|If2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vb2wx4 , soc_inst|m0_1|u_logic|Vb2wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fw1wx4~0 , soc_inst|m0_1|u_logic|Fw1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rafwx4~0 , soc_inst|m0_1|u_logic|Rafwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rni2z4 , soc_inst|m0_1|u_logic|Rni2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ob2wx4~0 , soc_inst|m0_1|u_logic|Ob2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ob2wx4 , soc_inst|m0_1|u_logic|Ob2wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~0 , soc_inst|m0_1|u_logic|P3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~0 , soc_inst|m0_1|u_logic|Vhwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~1 , soc_inst|m0_1|u_logic|Vhwvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~0 , soc_inst|m0_1|u_logic|K8wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~1 , soc_inst|m0_1|u_logic|K8wvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~2 , soc_inst|m0_1|u_logic|K8wvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oowvx4~0 , soc_inst|m0_1|u_logic|Oowvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejwvx4~0 , soc_inst|m0_1|u_logic|Ejwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~0 , soc_inst|m0_1|u_logic|R8wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~1 , soc_inst|m0_1|u_logic|R8wvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9wvx4~0 , soc_inst|m0_1|u_logic|F9wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~1 , soc_inst|m0_1|u_logic|P3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Auk2z4 , soc_inst|m0_1|u_logic|Auk2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yg2wx4~0 , soc_inst|m0_1|u_logic|Yg2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xly2z4 , soc_inst|m0_1|u_logic|Xly2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~0 , soc_inst|m0_1|u_logic|D6yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~1 , soc_inst|m0_1|u_logic|D6yvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V8yvx4~0 , soc_inst|m0_1|u_logic|V8yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~2 , soc_inst|m0_1|u_logic|D6yvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3d3z4 , soc_inst|m0_1|u_logic|H3d3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yg2wx4 , soc_inst|m0_1|u_logic|Yg2wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xc2wx4 , soc_inst|m0_1|u_logic|Xc2wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mw1wx4~0 , soc_inst|m0_1|u_logic|Mw1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu1wx4~0 , soc_inst|m0_1|u_logic|Wu1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G02wx4~0 , soc_inst|m0_1|u_logic|G02wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE , soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uwyvx4~0 , soc_inst|m0_1|u_logic|Uwyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hx1wx4~0 , soc_inst|m0_1|u_logic|Hx1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ax1wx4~0 , soc_inst|m0_1|u_logic|Ax1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4 , soc_inst|m0_1|u_logic|Gmm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rv1wx4~0 , soc_inst|m0_1|u_logic|Rv1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rv1wx4~1 , soc_inst|m0_1|u_logic|Rv1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvu2z4 , soc_inst|m0_1|u_logic|Rvu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|If2wx4~1 , soc_inst|m0_1|u_logic|If2wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|If2wx4~2 , soc_inst|m0_1|u_logic|If2wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hx1wx4~1 , soc_inst|m0_1|u_logic|Hx1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Unm2z4 , soc_inst|m0_1|u_logic|Unm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kv1wx4~0 , soc_inst|m0_1|u_logic|Kv1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4~1 , soc_inst|m0_1|u_logic|Q8ywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svk2z4 , soc_inst|m0_1|u_logic|Svk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tw1wx4~0 , soc_inst|m0_1|u_logic|Tw1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tw1wx4~1 , soc_inst|m0_1|u_logic|Tw1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ii63z4 , soc_inst|m0_1|u_logic|Ii63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~1 , soc_inst|m0_1|u_logic|Hfyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~0 , soc_inst|m0_1|u_logic|Hfyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~2 , soc_inst|m0_1|u_logic|Hfyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imt2z4 , soc_inst|m0_1|u_logic|Imt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dv1wx4~0 , soc_inst|m0_1|u_logic|Dv1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skm2z4 , soc_inst|m0_1|u_logic|Skm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr73z4~feeder , soc_inst|m0_1|u_logic|Rr73z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~2 , soc_inst|m0_1|u_logic|Wcyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~1 , soc_inst|m0_1|u_logic|Wcyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~0 , soc_inst|m0_1|u_logic|Wcyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~3 , soc_inst|m0_1|u_logic|Wcyvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE , soc_inst|m0_1|u_logic|Rr73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4~0 , soc_inst|m0_1|u_logic|Q8ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4 , soc_inst|m0_1|u_logic|Q8ywx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4ywx4~0 , soc_inst|m0_1|u_logic|W4ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D5ywx4~0 , soc_inst|m0_1|u_logic|D5ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D31wx4~0 , soc_inst|m0_1|u_logic|D31wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjlwx4~0 , soc_inst|m0_1|u_logic|Fjlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~0 , soc_inst|m0_1|u_logic|Qs7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~1 , soc_inst|m0_1|u_logic|Qs7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Phlwx4~0 , soc_inst|m0_1|u_logic|Phlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gjt2z4 , soc_inst|m0_1|u_logic|Gjt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po73z4 , soc_inst|m0_1|u_logic|Po73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~2 , soc_inst|m0_1|u_logic|Bywwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psu2z4 , soc_inst|m0_1|u_logic|Psu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qml2z4 , soc_inst|m0_1|u_logic|Qml2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~3 , soc_inst|m0_1|u_logic|Bywwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Grl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Spl2z4 , soc_inst|m0_1|u_logic|Spl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~1 , soc_inst|m0_1|u_logic|Bywwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eol2z4 , soc_inst|m0_1|u_logic|Eol2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~0 , soc_inst|m0_1|u_logic|Bywwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4 , soc_inst|m0_1|u_logic|Bywwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Q77wx4~0 , soc_inst|m0_1|u_logic|Q77wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H0zvx4~0 , soc_inst|m0_1|u_logic|H0zvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~0 , soc_inst|m0_1|u_logic|Cuyvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yyyvx4 , soc_inst|m0_1|u_logic|Yyyvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~1 , soc_inst|m0_1|u_logic|Cuyvx4~1, de1_soc_wrapper, 1
@@ -504,2595 +646,2467 @@ instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~0 , soc_inst|m0_1|u_logic|M1j2z4~
 instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~3 , soc_inst|m0_1|u_logic|M1j2z4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~1 , soc_inst|m0_1|u_logic|M1j2z4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~2 , soc_inst|m0_1|u_logic|M1j2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1j2z4 , soc_inst|m0_1|u_logic|M1j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE , soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C51xx4~0 , soc_inst|m0_1|u_logic|C51xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mw1wx4~0 , soc_inst|m0_1|u_logic|Mw1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu1wx4~0 , soc_inst|m0_1|u_logic|Wu1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G02wx4~0 , soc_inst|m0_1|u_logic|G02wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pu1wx4 , soc_inst|m0_1|u_logic|Pu1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G02wx4 , soc_inst|m0_1|u_logic|G02wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcz2z4 , soc_inst|m0_1|u_logic|Mcz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mvm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mvm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wqm2z4 , soc_inst|m0_1|u_logic|Wqm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G493z4 , soc_inst|m0_1|u_logic|G493z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipm2z4 , soc_inst|m0_1|u_logic|Ipm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~0 , soc_inst|m0_1|u_logic|Qowwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R283z4 , soc_inst|m0_1|u_logic|R283z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It63z4 , soc_inst|m0_1|u_logic|It63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixt2z4 , soc_inst|m0_1|u_logic|Ixt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ksm2z4~feeder , soc_inst|m0_1|u_logic|Ksm2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ksm2z4 , soc_inst|m0_1|u_logic|Ksm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~1 , soc_inst|m0_1|u_logic|Qowwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qowwx4 , soc_inst|m0_1|u_logic|Qowwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y21xx4~0 , soc_inst|m0_1|u_logic|Y21xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U593z4 , soc_inst|m0_1|u_logic|U593z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fskvx4~0 , soc_inst|m0_1|u_logic|Fskvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U593z4~DUPLICATE , soc_inst|m0_1|u_logic|U593z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yv1wx4~0 , soc_inst|m0_1|u_logic|Yv1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fw1wx4~0 , soc_inst|m0_1|u_logic|Fw1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yv1wx4~1 , soc_inst|m0_1|u_logic|Yv1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wd13z4 , soc_inst|m0_1|u_logic|Wd13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|If2wx4~1 , soc_inst|m0_1|u_logic|If2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|If2wx4~2 , soc_inst|m0_1|u_logic|If2wx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ydyvx4 , soc_inst|m0_1|u_logic|Ydyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn23z4 , soc_inst|m0_1|u_logic|Fn23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~1 , soc_inst|m0_1|u_logic|Sj62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pl62z4~0 , soc_inst|m0_1|u_logic|Pl62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fw1wx4~1 , soc_inst|m0_1|u_logic|Fw1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow33z4 , soc_inst|m0_1|u_logic|Ow33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H133z4 , soc_inst|m0_1|u_logic|H133z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Meyvx4 , soc_inst|m0_1|u_logic|Meyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE , soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yv1wx4~1 , soc_inst|m0_1|u_logic|Yv1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yr13z4 , soc_inst|m0_1|u_logic|Yr13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~2 , soc_inst|m0_1|u_logic|Uvzvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mw1wx4~1 , soc_inst|m0_1|u_logic|Mw1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X553z4 , soc_inst|m0_1|u_logic|X553z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~0 , soc_inst|m0_1|u_logic|Sj62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ue9wx4~0 , soc_inst|m0_1|u_logic|Ue9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zj53z4 , soc_inst|m0_1|u_logic|Zj53z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wu1wx4~1 , soc_inst|m0_1|u_logic|Wu1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ikz2z4 , soc_inst|m0_1|u_logic|Ikz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtz2z4 , soc_inst|m0_1|u_logic|Rtz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fw1wx4~1 , soc_inst|m0_1|u_logic|Fw1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qa43z4 , soc_inst|m0_1|u_logic|Qa43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~1 , soc_inst|m0_1|u_logic|Uvzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~0 , soc_inst|m0_1|u_logic|Uvzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4 , soc_inst|m0_1|u_logic|Uvzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X8zvx4 , soc_inst|m0_1|u_logic|X8zvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D1awx4~0 , soc_inst|m0_1|u_logic|D1awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lny2z4 , soc_inst|m0_1|u_logic|Lny2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~0 , soc_inst|m0_1|u_logic|Uz9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~1 , soc_inst|m0_1|u_logic|Uz9wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4 , soc_inst|m0_1|u_logic|Wzy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Meyvx4 , soc_inst|m0_1|u_logic|Meyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~2 , soc_inst|m0_1|u_logic|Sj62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~3 , soc_inst|m0_1|u_logic|Sj62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hx1wx4~0 , soc_inst|m0_1|u_logic|Hx1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hx1wx4~1 , soc_inst|m0_1|u_logic|Hx1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Grl2z4 , soc_inst|m0_1|u_logic|Grl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ax1wx4~0 , soc_inst|m0_1|u_logic|Ax1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Spl2z4 , soc_inst|m0_1|u_logic|Spl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~1 , soc_inst|m0_1|u_logic|Bywwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rv1wx4~0 , soc_inst|m0_1|u_logic|Rv1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rv1wx4~1 , soc_inst|m0_1|u_logic|Rv1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psu2z4 , soc_inst|m0_1|u_logic|Psu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kv1wx4~0 , soc_inst|m0_1|u_logic|Kv1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qml2z4 , soc_inst|m0_1|u_logic|Qml2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~3 , soc_inst|m0_1|u_logic|Bywwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~1 , soc_inst|m0_1|u_logic|Hfyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~0 , soc_inst|m0_1|u_logic|Hfyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~2 , soc_inst|m0_1|u_logic|Hfyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gjt2z4 , soc_inst|m0_1|u_logic|Gjt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~0 , soc_inst|m0_1|u_logic|Wcyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~1 , soc_inst|m0_1|u_logic|Wcyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~2 , soc_inst|m0_1|u_logic|Wcyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~3 , soc_inst|m0_1|u_logic|Wcyvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po73z4 , soc_inst|m0_1|u_logic|Po73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~2 , soc_inst|m0_1|u_logic|Bywwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tw1wx4~0 , soc_inst|m0_1|u_logic|Tw1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tw1wx4~1 , soc_inst|m0_1|u_logic|Tw1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf63z4 , soc_inst|m0_1|u_logic|Gf63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dv1wx4~0 , soc_inst|m0_1|u_logic|Dv1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eol2z4 , soc_inst|m0_1|u_logic|Eol2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~0 , soc_inst|m0_1|u_logic|Bywwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4 , soc_inst|m0_1|u_logic|Bywwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yonvx4~0 , soc_inst|m0_1|u_logic|Yonvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Shyvx4~0 , soc_inst|m0_1|u_logic|Shyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pmgwx4~0 , soc_inst|m0_1|u_logic|Pmgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ez8wx4~0 , soc_inst|m0_1|u_logic|Ez8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Elnvx4~0 , soc_inst|m0_1|u_logic|Elnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J6i2z4 , soc_inst|m0_1|u_logic|J6i2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xknvx4~0 , soc_inst|m0_1|u_logic|Xknvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kop2z4 , soc_inst|m0_1|u_logic|Kop2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~53 , soc_inst|m0_1|u_logic|Add2~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~49 , soc_inst|m0_1|u_logic|Add2~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~45 , soc_inst|m0_1|u_logic|Add2~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~0 , soc_inst|m0_1|u_logic|Bfhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~1 , soc_inst|m0_1|u_logic|Mddwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~0 , soc_inst|m0_1|u_logic|Mddwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jfdwx4~0 , soc_inst|m0_1|u_logic|Jfdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~0 , soc_inst|m0_1|u_logic|Kcdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~1 , soc_inst|m0_1|u_logic|Kcdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W19wx4~0 , soc_inst|m0_1|u_logic|W19wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pm9wx4~0 , soc_inst|m0_1|u_logic|Pm9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y29wx4 , soc_inst|m0_1|u_logic|Y29wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~0 , soc_inst|m0_1|u_logic|Kzbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~0 , soc_inst|m0_1|u_logic|W4dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y5dwx4~0 , soc_inst|m0_1|u_logic|Y5dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~1 , soc_inst|m0_1|u_logic|W4dwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D1awx4~0 , soc_inst|m0_1|u_logic|D1awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2s2z4~feeder , soc_inst|m0_1|u_logic|U2s2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2s2z4 , soc_inst|m0_1|u_logic|U2s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy43z4 , soc_inst|m0_1|u_logic|Cy43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE , soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~2 , soc_inst|m0_1|u_logic|Vf5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L763z4 , soc_inst|m0_1|u_logic|L763z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|To33z4 , soc_inst|m0_1|u_logic|To33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~3 , soc_inst|m0_1|u_logic|Vf5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kf23z4 , soc_inst|m0_1|u_logic|Kf23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W5s2z4 , soc_inst|m0_1|u_logic|W5s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~0 , soc_inst|m0_1|u_logic|Vf5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rpe3z4 , soc_inst|m0_1|u_logic|Rpe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hue3z4 , soc_inst|m0_1|u_logic|Hue3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fre3z4 , soc_inst|m0_1|u_logic|Fre3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N71xx4~0 , soc_inst|m0_1|u_logic|N71xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y21xx4~0 , soc_inst|m0_1|u_logic|Y21xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~4 , soc_inst|m0_1|u_logic|Vf5wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I4s2z4 , soc_inst|m0_1|u_logic|I4s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~1 , soc_inst|m0_1|u_logic|Vf5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq83z4 , soc_inst|m0_1|u_logic|Dq83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duv2z4 , soc_inst|m0_1|u_logic|Duv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~6 , soc_inst|m0_1|u_logic|Vf5wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pu1wx4 , soc_inst|m0_1|u_logic|Pu1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tse3z4 , soc_inst|m0_1|u_logic|Tse3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug73z4 , soc_inst|m0_1|u_logic|Ug73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxc3z4 , soc_inst|m0_1|u_logic|Cxc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~5 , soc_inst|m0_1|u_logic|Vf5wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S61xx4~0 , soc_inst|m0_1|u_logic|S61xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~7 , soc_inst|m0_1|u_logic|Vf5wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~8 , soc_inst|m0_1|u_logic|Vf5wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~1 , soc_inst|m0_1|u_logic|Kzbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2t2z4 , soc_inst|m0_1|u_logic|I2t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~0 , soc_inst|m0_1|u_logic|Lk9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wxp2z4 , soc_inst|m0_1|u_logic|Wxp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lq03z4 , soc_inst|m0_1|u_logic|Lq03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~2 , soc_inst|m0_1|u_logic|Qp62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mvm2z4 , soc_inst|m0_1|u_logic|Mvm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE , soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~0 , soc_inst|m0_1|u_logic|Qp62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ytm2z4 , soc_inst|m0_1|u_logic|Ytm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nr62z4~0 , soc_inst|m0_1|u_logic|Nr62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ue9wx4~0 , soc_inst|m0_1|u_logic|Ue9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~1 , soc_inst|m0_1|u_logic|Qp62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~3 , soc_inst|m0_1|u_logic|Qp62z4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|C3w2z4 , soc_inst|m0_1|u_logic|C3w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~0 , soc_inst|m0_1|u_logic|Omyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~1 , soc_inst|m0_1|u_logic|Omyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~0 , soc_inst|m0_1|u_logic|B2uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfuwx4 , soc_inst|m0_1|u_logic|Wfuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7pwx4 , soc_inst|m0_1|u_logic|K7pwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0uvx4 , soc_inst|m0_1|u_logic|Z0uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE , soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H6tvx4~0 , soc_inst|m0_1|u_logic|H6tvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T4uvx4~0 , soc_inst|m0_1|u_logic|T4uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Txtvx4~0 , soc_inst|m0_1|u_logic|Txtvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ab9wx4~0 , soc_inst|m0_1|u_logic|Ab9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A1yvx4~0 , soc_inst|m0_1|u_logic|A1yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnpvx4~0 , soc_inst|m0_1|u_logic|Mnpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~0 , soc_inst|m0_1|u_logic|Fmqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dsqvx4 , soc_inst|m0_1|u_logic|Dsqvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~0 , soc_inst|m0_1|u_logic|Irqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~1 , soc_inst|m0_1|u_logic|Irqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~1 , soc_inst|m0_1|u_logic|Fmqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hhpvx4~0 , soc_inst|m0_1|u_logic|Hhpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gxxvx4~0 , soc_inst|m0_1|u_logic|Gxxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ljpvx4~0 , soc_inst|m0_1|u_logic|Ljpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xipvx4~0 , soc_inst|m0_1|u_logic|Xipvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Onqvx4~0 , soc_inst|m0_1|u_logic|Onqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yplwx4~0 , soc_inst|m0_1|u_logic|Yplwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vopvx4~0 , soc_inst|m0_1|u_logic|Vopvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~2 , soc_inst|m0_1|u_logic|Fmqvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~3 , soc_inst|m0_1|u_logic|Fmqvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~0 , soc_inst|m0_1|u_logic|Rfpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~2 , soc_inst|m0_1|u_logic|Rfpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffxvx4~0 , soc_inst|m0_1|u_logic|Ffxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~3 , soc_inst|m0_1|u_logic|Rfpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~4 , soc_inst|m0_1|u_logic|Rfpvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~1 , soc_inst|m0_1|u_logic|Rfpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G27wx4~1 , soc_inst|m0_1|u_logic|G27wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ae6wx4~0 , soc_inst|m0_1|u_logic|Ae6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~1 , soc_inst|m0_1|u_logic|Bkxvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~2 , soc_inst|m0_1|u_logic|Bkxvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9swx4~0 , soc_inst|m0_1|u_logic|U9swx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S8swx4~0 , soc_inst|m0_1|u_logic|S8swx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~0 , soc_inst|m0_1|u_logic|Bkxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4 , soc_inst|m0_1|u_logic|Bkxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~5 , soc_inst|m0_1|u_logic|Rfpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzl2z4 , soc_inst|m0_1|u_logic|Fzl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~0 , soc_inst|m0_1|u_logic|Ejawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc73z4 , soc_inst|m0_1|u_logic|Cc73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE , soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sa23z4 , soc_inst|m0_1|u_logic|Sa23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~6 , soc_inst|m0_1|u_logic|Ze1wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qc1xx4~0 , soc_inst|m0_1|u_logic|Qc1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z9dwx4~0 , soc_inst|m0_1|u_logic|Z9dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jk0xx4~0 , soc_inst|m0_1|u_logic|Jk0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xkfwx4~0 , soc_inst|m0_1|u_logic|Xkfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kryvx4~0 , soc_inst|m0_1|u_logic|Kryvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj0xx4 , soc_inst|m0_1|u_logic|Aj0xx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujqvx4~0 , soc_inst|m0_1|u_logic|Ujqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gjqvx4~0 , soc_inst|m0_1|u_logic|Gjqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xdnvx4~0 , soc_inst|m0_1|u_logic|Xdnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thm2z4 , soc_inst|m0_1|u_logic|Thm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~0 , soc_inst|m0_1|u_logic|G5qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfd2z4~0 , soc_inst|m0_1|u_logic|Kfd2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dfd2z4 , soc_inst|m0_1|u_logic|Dfd2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qobwx4~0 , soc_inst|m0_1|u_logic|Qobwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R29wx4~0 , soc_inst|m0_1|u_logic|R29wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1bvx4 , soc_inst|m0_1|u_logic|E1bvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zznvx4~0 , soc_inst|m0_1|u_logic|Zznvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~0 , soc_inst|m0_1|u_logic|Vxnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8rwx4~0 , soc_inst|m0_1|u_logic|Q8rwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~1 , soc_inst|m0_1|u_logic|R7iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fhc2z4~0 , soc_inst|m0_1|u_logic|Fhc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~2 , soc_inst|m0_1|u_logic|Zqpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~0 , soc_inst|m0_1|u_logic|Zqpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~1 , soc_inst|m0_1|u_logic|Zqpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P37wx4~1 , soc_inst|m0_1|u_logic|P37wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wxcwx4~0 , soc_inst|m0_1|u_logic|Wxcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P37wx4~0 , soc_inst|m0_1|u_logic|P37wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~3 , soc_inst|m0_1|u_logic|Zqpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K0qvx4 , soc_inst|m0_1|u_logic|K0qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wspvx4 , soc_inst|m0_1|u_logic|Wspvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lqpvx4~0 , soc_inst|m0_1|u_logic|Lqpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE , soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K0u2z4 , soc_inst|m0_1|u_logic|K0u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T583z4 , soc_inst|m0_1|u_logic|T583z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kw63z4 , soc_inst|m0_1|u_logic|Kw63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4~1 , soc_inst|m0_1|u_logic|Ixxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE , soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T9v2z4 , soc_inst|m0_1|u_logic|T9v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE , soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ka93z4 , soc_inst|m0_1|u_logic|Ka93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4~0 , soc_inst|m0_1|u_logic|Ixxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4 , soc_inst|m0_1|u_logic|Ixxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svxwx4~0 , soc_inst|m0_1|u_logic|Svxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vy7wx4~0 , soc_inst|m0_1|u_logic|Vy7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S1ewx4~0 , soc_inst|m0_1|u_logic|S1ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W6iwx4 , soc_inst|m0_1|u_logic|W6iwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lz93z4 , soc_inst|m0_1|u_logic|Lz93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jknvx4~0 , soc_inst|m0_1|u_logic|Jknvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE , soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ts5wx4~0 , soc_inst|m0_1|u_logic|Ts5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9ovx4 , soc_inst|m0_1|u_logic|D9ovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yz4wx4 , soc_inst|m0_1|u_logic|Yz4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4 , soc_inst|m0_1|u_logic|Wuq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yauvx4~0 , soc_inst|m0_1|u_logic|Yauvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wq5wx4 , soc_inst|m0_1|u_logic|Wq5wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Muawx4~0 , soc_inst|m0_1|u_logic|Muawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Efp2z4 , soc_inst|m0_1|u_logic|Efp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8v2z4 , soc_inst|m0_1|u_logic|F8v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gip2z4 , soc_inst|m0_1|u_logic|Gip2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~3 , soc_inst|m0_1|u_logic|Qxuwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wyt2z4 , soc_inst|m0_1|u_logic|Wyt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F483z4 , soc_inst|m0_1|u_logic|F483z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~2 , soc_inst|m0_1|u_logic|Qxuwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sgp2z4 , soc_inst|m0_1|u_logic|Sgp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W893z4 , soc_inst|m0_1|u_logic|W893z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~1 , soc_inst|m0_1|u_logic|Qxuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu63z4 , soc_inst|m0_1|u_logic|Wu63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujp2z4 , soc_inst|m0_1|u_logic|Ujp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~0 , soc_inst|m0_1|u_logic|Qxuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4 , soc_inst|m0_1|u_logic|Qxuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~0 , soc_inst|m0_1|u_logic|Bjkvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~1 , soc_inst|m0_1|u_logic|Bjkvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ovc3z4 , soc_inst|m0_1|u_logic|Ovc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nl53z4 , soc_inst|m0_1|u_logic|Nl53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec43z4 , soc_inst|m0_1|u_logic|Ec43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~0 , soc_inst|m0_1|u_logic|Qw62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fvz2z4 , soc_inst|m0_1|u_logic|Fvz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zr03z4~feeder , soc_inst|m0_1|u_logic|Zr03z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE , soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~2 , soc_inst|m0_1|u_logic|Qw62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wmp2z4 , soc_inst|m0_1|u_logic|Wmp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V233z4~DUPLICATE , soc_inst|m0_1|u_logic|V233z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mt13z4 , soc_inst|m0_1|u_logic|Mt13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~1 , soc_inst|m0_1|u_logic|Qw62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ilp2z4 , soc_inst|m0_1|u_logic|Ilp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny62z4~0 , soc_inst|m0_1|u_logic|Ny62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~3 , soc_inst|m0_1|u_logic|Qw62z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mpnvx4~0 , soc_inst|m0_1|u_logic|Mpnvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Tecwx4~0 , soc_inst|m0_1|u_logic|Tecwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE , soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~2 , soc_inst|m0_1|u_logic|Z4bwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~0 , soc_inst|m0_1|u_logic|Z4bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I4dwx4~0 , soc_inst|m0_1|u_logic|I4dwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Afcwx4~0 , soc_inst|m0_1|u_logic|Afcwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ydcwx4~0 , soc_inst|m0_1|u_logic|Ydcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[8]~5 , soc_inst|interconnect_1|HRDATA[8]~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[7]~9 , soc_inst|interconnect_1|HRDATA[7]~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[7]~10 , soc_inst|interconnect_1|HRDATA[7]~10, de1_soc_wrapper, 1
-instance = comp, \SW[4]~input , SW[4]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][4] , soc_inst|switches_1|switch_store[0][4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[4]~23 , soc_inst|interconnect_1|HRDATA[4]~23, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mis2z4~0 , soc_inst|m0_1|u_logic|Mis2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T2owx4~0 , soc_inst|m0_1|u_logic|T2owx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qwowx4 , soc_inst|m0_1|u_logic|Qwowx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vytvx4 , soc_inst|m0_1|u_logic|Vytvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mis2z4 , soc_inst|m0_1|u_logic|Mis2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ts5wx4~0 , soc_inst|m0_1|u_logic|Ts5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9ovx4 , soc_inst|m0_1|u_logic|D9ovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1w2z4 , soc_inst|m0_1|u_logic|R1w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Trq2z4 , soc_inst|m0_1|u_logic|Trq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ijcwx4~0 , soc_inst|m0_1|u_logic|Ijcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C8rwx4~0 , soc_inst|m0_1|u_logic|C8rwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wccwx4~0 , soc_inst|m0_1|u_logic|Wccwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~1 , soc_inst|m0_1|u_logic|Bpzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz8wx4 , soc_inst|m0_1|u_logic|Zz8wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fyzvx4~0 , soc_inst|m0_1|u_logic|Fyzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~97 , soc_inst|m0_1|u_logic|Add5~97, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~109 , soc_inst|m0_1|u_logic|Add5~109, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yxzvx4~0 , soc_inst|m0_1|u_logic|Yxzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE , soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~4 , soc_inst|m0_1|u_logic|Eo5wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~3 , soc_inst|m0_1|u_logic|Eo5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~0 , soc_inst|m0_1|u_logic|Eo5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1j2z4 , soc_inst|m0_1|u_logic|M1j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wmp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~6 , soc_inst|m0_1|u_logic|Eo5wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zr03z4 , soc_inst|m0_1|u_logic|Zr03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V233z4 , soc_inst|m0_1|u_logic|V233z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~5 , soc_inst|m0_1|u_logic|Eo5wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~1 , soc_inst|m0_1|u_logic|Eo5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~2 , soc_inst|m0_1|u_logic|Eo5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~1 , soc_inst|m0_1|u_logic|Sknwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~0 , soc_inst|m0_1|u_logic|H9iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S8ewx4~0 , soc_inst|m0_1|u_logic|S8ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yilwx4~0 , soc_inst|m0_1|u_logic|Yilwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~2 , soc_inst|m0_1|u_logic|Sknwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6nwx4 , soc_inst|m0_1|u_logic|S6nwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imnwx4 , soc_inst|m0_1|u_logic|Imnwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~1 , soc_inst|m0_1|u_logic|H9iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8iwx4~0 , soc_inst|m0_1|u_logic|F8iwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|V9iwx4~0 , soc_inst|m0_1|u_logic|V9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lcowx4~0 , soc_inst|m0_1|u_logic|Lcowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G0w2z4 , soc_inst|m0_1|u_logic|G0w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~0 , soc_inst|m0_1|u_logic|Qppvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Muawx4~0 , soc_inst|m0_1|u_logic|Muawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U09wx4~0 , soc_inst|m0_1|u_logic|U09wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Otcwx4~0 , soc_inst|m0_1|u_logic|Otcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~0 , soc_inst|m0_1|u_logic|Fuawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~1 , soc_inst|m0_1|u_logic|Fuawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lz8wx4~0 , soc_inst|m0_1|u_logic|Lz8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~1 , soc_inst|m0_1|u_logic|Qppvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D31wx4~0 , soc_inst|m0_1|u_logic|D31wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixh3z4~feeder , soc_inst|m0_1|u_logic|Ixh3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixh3z4 , soc_inst|m0_1|u_logic|Ixh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvh3z4~feeder , soc_inst|m0_1|u_logic|Tvh3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvh3z4 , soc_inst|m0_1|u_logic|Tvh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~4 , soc_inst|m0_1|u_logic|Nn0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G123z4 , soc_inst|m0_1|u_logic|G123z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecp2z4 , soc_inst|m0_1|u_logic|Ecp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~0 , soc_inst|m0_1|u_logic|Nn0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M0i3z4 , soc_inst|m0_1|u_logic|M0i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nr2xx4~0 , soc_inst|m0_1|u_logic|Nr2xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjlwx4~0 , soc_inst|m0_1|u_logic|Fjlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wai2z4 , soc_inst|m0_1|u_logic|Wai2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glj2z4~feeder , soc_inst|m0_1|u_logic|Glj2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glj2z4 , soc_inst|m0_1|u_logic|Glj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~0 , soc_inst|m0_1|u_logic|O3ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~1 , soc_inst|m0_1|u_logic|O3ivx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V1l2z4 , soc_inst|m0_1|u_logic|V1l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ta1xx4~0 , soc_inst|m0_1|u_logic|Ta1xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U71xx4~0 , soc_inst|m0_1|u_logic|U71xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~1 , soc_inst|m0_1|u_logic|Nd3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T253z4~DUPLICATE , soc_inst|m0_1|u_logic|T253z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE , soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ld1xx4~0 , soc_inst|m0_1|u_logic|Ld1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sd1xx4~0 , soc_inst|m0_1|u_logic|Sd1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~3 , soc_inst|m0_1|u_logic|Nd3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4~feeder , soc_inst|m0_1|u_logic|Lpu2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~6 , soc_inst|m0_1|u_logic|Nd3wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll73z4 , soc_inst|m0_1|u_logic|Ll73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2j2z4 , soc_inst|m0_1|u_logic|X2j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xti2z4 , soc_inst|m0_1|u_logic|Xti2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~5 , soc_inst|m0_1|u_logic|Nd3wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~7 , soc_inst|m0_1|u_logic|Nd3wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ehz2z4 , soc_inst|m0_1|u_logic|Ehz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yd03z4 , soc_inst|m0_1|u_logic|Yd03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~4 , soc_inst|m0_1|u_logic|Nd3wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Koj2z4~feeder , soc_inst|m0_1|u_logic|Koj2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Koj2z4 , soc_inst|m0_1|u_logic|Koj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kt33z4 , soc_inst|m0_1|u_logic|Kt33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V41xx4~0 , soc_inst|m0_1|u_logic|V41xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ab1xx4~0 , soc_inst|m0_1|u_logic|Ab1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~2 , soc_inst|m0_1|u_logic|Nd3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sa13z4 , soc_inst|m0_1|u_logic|Sa13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jc1xx4~0 , soc_inst|m0_1|u_logic|Jc1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y91xx4~0 , soc_inst|m0_1|u_logic|Y91xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~0 , soc_inst|m0_1|u_logic|Nd3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4 , soc_inst|m0_1|u_logic|Nd3wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~0 , soc_inst|m0_1|u_logic|H9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S8ewx4~0 , soc_inst|m0_1|u_logic|S8ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~1 , soc_inst|m0_1|u_logic|H9iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djywx4~0 , soc_inst|m0_1|u_logic|Djywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lstwx4~0 , soc_inst|m0_1|u_logic|Lstwx4~0, de1_soc_wrapper, 1
-instance = comp, \SW[7]~input , SW[7]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][7] , soc_inst|switches_1|switch_store[0][7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[7] , soc_inst|m0_1|u_logic|hwdata_o[7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[7]~4 , soc_inst|ram_1|data_to_memory[7]~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[6] , soc_inst|ram_1|saved_word_address[6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[6]~6 , soc_inst|ram_1|memory.raddr_a[6]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[7] , soc_inst|ram_1|saved_word_address[7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[7]~7 , soc_inst|ram_1|memory.raddr_a[7]~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mof3z4 , soc_inst|m0_1|u_logic|Mof3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu23z4~feeder , soc_inst|m0_1|u_logic|Zu23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu23z4 , soc_inst|m0_1|u_logic|Zu23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd53z4~feeder , soc_inst|m0_1|u_logic|Rd53z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE , soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~3 , soc_inst|m0_1|u_logic|Pdbwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kiq2z4 , soc_inst|m0_1|u_logic|Kiq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql13z4 , soc_inst|m0_1|u_logic|Ql13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~1 , soc_inst|m0_1|u_logic|Pdbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skh3z4 , soc_inst|m0_1|u_logic|Skh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djh3z4 , soc_inst|m0_1|u_logic|Djh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~5 , soc_inst|m0_1|u_logic|Pdbwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgq2z4 , soc_inst|m0_1|u_logic|Vgq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[24]~17 , soc_inst|interconnect_1|HRDATA[24]~17, de1_soc_wrapper, 1
+instance = comp, \SW[9]~input , SW[9]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][9] , soc_inst|switches_1|switch_store[1][9], de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|saved_word_address[8] , soc_inst|ram_1|saved_word_address[8], de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|memory.raddr_a[8]~8 , soc_inst|ram_1|memory.raddr_a[8]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~45 , soc_inst|m0_1|u_logic|Add3~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~41 , soc_inst|m0_1|u_logic|Add3~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~37 , soc_inst|m0_1|u_logic|Add3~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~81 , soc_inst|m0_1|u_logic|Add3~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzivx4~0 , soc_inst|m0_1|u_logic|Wzivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wce3z4 , soc_inst|m0_1|u_logic|Wce3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hvivx4~0 , soc_inst|m0_1|u_logic|Hvivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rkd3z4 , soc_inst|m0_1|u_logic|Rkd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R99wx4~0 , soc_inst|m0_1|u_logic|R99wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsd3z4 , soc_inst|m0_1|u_logic|Lsd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4~feeder , soc_inst|m0_1|u_logic|Pvd3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4 , soc_inst|m0_1|u_logic|Pvd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~6 , soc_inst|m0_1|u_logic|Gm1wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE , soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aud3z4 , soc_inst|m0_1|u_logic|Aud3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~7 , soc_inst|m0_1|u_logic|Gm1wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~8 , soc_inst|m0_1|u_logic|Gm1wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hpd3z4 , soc_inst|m0_1|u_logic|Hpd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~3 , soc_inst|m0_1|u_logic|Gm1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8e3z4 , soc_inst|m0_1|u_logic|F8e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6e3z4~feeder , soc_inst|m0_1|u_logic|Q6e3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6e3z4 , soc_inst|m0_1|u_logic|Q6e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~2 , soc_inst|m0_1|u_logic|Gm1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wqd3z4 , soc_inst|m0_1|u_logic|Wqd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Exd3z4 , soc_inst|m0_1|u_logic|Exd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~0 , soc_inst|m0_1|u_logic|Gm1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uo5xx4~0 , soc_inst|m0_1|u_logic|Uo5xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0e3z4~feeder , soc_inst|m0_1|u_logic|I0e3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0e3z4 , soc_inst|m0_1|u_logic|I0e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X1e3z4~feeder , soc_inst|m0_1|u_logic|X1e3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X1e3z4 , soc_inst|m0_1|u_logic|X1e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~1 , soc_inst|m0_1|u_logic|Gm1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE , soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M3e3z4 , soc_inst|m0_1|u_logic|M3e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~4 , soc_inst|m0_1|u_logic|Gm1wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~5 , soc_inst|m0_1|u_logic|Gm1wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R99wx4~1 , soc_inst|m0_1|u_logic|R99wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~1 , soc_inst|m0_1|u_logic|Xk1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~0 , soc_inst|m0_1|u_logic|Xk1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4 , soc_inst|m0_1|u_logic|Gm1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~1 , soc_inst|m0_1|u_logic|Aj1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~0 , soc_inst|m0_1|u_logic|S3cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rds2z4 , soc_inst|m0_1|u_logic|Rds2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D432z4~0 , soc_inst|m0_1|u_logic|D432z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE , soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc23z4 , soc_inst|m0_1|u_logic|Hc23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~0 , soc_inst|m0_1|u_logic|Zh5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql33z4 , soc_inst|m0_1|u_logic|Ql33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I463z4~DUPLICATE , soc_inst|m0_1|u_logic|I463z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~3 , soc_inst|m0_1|u_logic|Zh5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B613z4 , soc_inst|m0_1|u_logic|B613z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H903z4~DUPLICATE , soc_inst|m0_1|u_logic|H903z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~4 , soc_inst|m0_1|u_logic|Zh5wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4~feeder , soc_inst|m0_1|u_logic|Z8s2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4 , soc_inst|m0_1|u_logic|Z8s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~1 , soc_inst|m0_1|u_logic|Zh5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7s2z4 , soc_inst|m0_1|u_logic|K7s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu43z4~feeder , soc_inst|m0_1|u_logic|Zu43z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu43z4 , soc_inst|m0_1|u_logic|Zu43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~2 , soc_inst|m0_1|u_logic|Zh5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~5 , soc_inst|m0_1|u_logic|Zh5wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~9 , soc_inst|m0_1|u_logic|Zh5wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~2 , soc_inst|m0_1|u_logic|Do1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~1 , soc_inst|m0_1|u_logic|Do1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~0 , soc_inst|m0_1|u_logic|Do1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~113 , soc_inst|m0_1|u_logic|Add5~113, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~105 , soc_inst|m0_1|u_logic|Add5~105, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~2 , soc_inst|m0_1|u_logic|Glnwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pn1wx4~0 , soc_inst|m0_1|u_logic|Pn1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arv2z4 , soc_inst|m0_1|u_logic|Arv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~7 , soc_inst|m0_1|u_logic|Zh5wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An83z4 , soc_inst|m0_1|u_logic|An83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd73z4 , soc_inst|m0_1|u_logic|Rd73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gt93z4 , soc_inst|m0_1|u_logic|Gt93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~6 , soc_inst|m0_1|u_logic|Zh5wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~8 , soc_inst|m0_1|u_logic|Zh5wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~1 , soc_inst|m0_1|u_logic|S3cwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~45 , soc_inst|m0_1|u_logic|Add5~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~2 , soc_inst|m0_1|u_logic|Aj1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlnwx4~0 , soc_inst|m0_1|u_logic|Nlnwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecowx4 , soc_inst|m0_1|u_logic|Ecowx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[19]~14 , soc_inst|m0_1|u_logic|hwdata_o[19]~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5ovx4 , soc_inst|m0_1|u_logic|C5ovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8m2z4 , soc_inst|m0_1|u_logic|L8m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6owx4 , soc_inst|m0_1|u_logic|G6owx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~0 , soc_inst|m0_1|u_logic|Rilwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[9] , soc_inst|ram_1|saved_word_address[9], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[9]~9 , soc_inst|ram_1|memory.raddr_a[9]~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~41 , soc_inst|m0_1|u_logic|Add2~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~85 , soc_inst|m0_1|u_logic|Add2~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~81 , soc_inst|m0_1|u_logic|Add2~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~0 , soc_inst|m0_1|u_logic|Ekhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T4uvx4~0 , soc_inst|m0_1|u_logic|T4uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txtvx4~0 , soc_inst|m0_1|u_logic|Txtvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~0 , soc_inst|m0_1|u_logic|F4nvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|A5uvx4~0 , soc_inst|m0_1|u_logic|A5uvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|T5tvx4 , soc_inst|m0_1|u_logic|T5tvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Tna3z4 , soc_inst|m0_1|u_logic|Tna3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Aea3z4~0 , soc_inst|m0_1|u_logic|Aea3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H6tvx4~0 , soc_inst|m0_1|u_logic|H6tvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5ovx4 , soc_inst|m0_1|u_logic|C5ovx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Aea3z4 , soc_inst|m0_1|u_logic|Aea3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4~0 , soc_inst|m0_1|u_logic|Nfb3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4 , soc_inst|m0_1|u_logic|Nfb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[4] , soc_inst|m0_1|u_logic|hwdata_o[4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Taa3z4~0 , soc_inst|m0_1|u_logic|Taa3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Taa3z4 , soc_inst|m0_1|u_logic|Taa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gza3z4 , soc_inst|m0_1|u_logic|Gza3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~94 , soc_inst|m0_1|u_logic|Add0~94, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~33 , soc_inst|m0_1|u_logic|Add0~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C4b3z4 , soc_inst|m0_1|u_logic|C4b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4~0 , soc_inst|m0_1|u_logic|Qfa3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4 , soc_inst|m0_1|u_logic|Qfa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xsmvx4~0 , soc_inst|m0_1|u_logic|Xsmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE , soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~21 , soc_inst|m0_1|u_logic|Add0~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gha3z4~0 , soc_inst|m0_1|u_logic|Gha3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gha3z4 , soc_inst|m0_1|u_logic|Gha3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qsmvx4~0 , soc_inst|m0_1|u_logic|Qsmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M2b3z4 , soc_inst|m0_1|u_logic|M2b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~57 , soc_inst|m0_1|u_logic|Add0~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W0b3z4 , soc_inst|m0_1|u_logic|W0b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~20 , soc_inst|m0_1|u_logic|hwdata_o~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wia3z4 , soc_inst|m0_1|u_logic|Wia3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsmvx4~0 , soc_inst|m0_1|u_logic|Jsmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE , soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~41 , soc_inst|m0_1|u_logic|Add0~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Csmvx4~0 , soc_inst|m0_1|u_logic|Csmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~65 , soc_inst|m0_1|u_logic|Add0~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[5] , soc_inst|m0_1|u_logic|hwdata_o[5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mka3z4 , soc_inst|m0_1|u_logic|Mka3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vrmvx4~0 , soc_inst|m0_1|u_logic|Vrmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxa3z4 , soc_inst|m0_1|u_logic|Qxa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~89 , soc_inst|m0_1|u_logic|Add0~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtzvx4~0 , soc_inst|m0_1|u_logic|Qtzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~0 , soc_inst|m0_1|u_logic|Oszvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~1 , soc_inst|m0_1|u_logic|Luzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~0 , soc_inst|m0_1|u_logic|Luzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~0 , soc_inst|m0_1|u_logic|Omyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~1 , soc_inst|m0_1|u_logic|Omyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4~0 , soc_inst|m0_1|u_logic|Pcd3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4 , soc_inst|m0_1|u_logic|Pcd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE , soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5a3z4 , soc_inst|m0_1|u_logic|U5a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5tvx4~0 , soc_inst|m0_1|u_logic|M5tvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Txa2z4~0 , soc_inst|m0_1|u_logic|Txa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yz4wx4 , soc_inst|m0_1|u_logic|Yz4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zyhvx4~0 , soc_inst|m0_1|u_logic|Zyhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rym2z4 , soc_inst|m0_1|u_logic|Rym2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zyovx4 , soc_inst|m0_1|u_logic|Zyovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4~0 , soc_inst|m0_1|u_logic|Tqc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4 , soc_inst|m0_1|u_logic|Tqc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~1 , soc_inst|m0_1|u_logic|M1pwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~0 , soc_inst|m0_1|u_logic|Kss2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0uvx4 , soc_inst|m0_1|u_logic|E0uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qztvx4 , soc_inst|m0_1|u_logic|Qztvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kss2z4 , soc_inst|m0_1|u_logic|Kss2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~0 , soc_inst|m0_1|u_logic|M1pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~2 , soc_inst|m0_1|u_logic|M1pwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~3 , soc_inst|m0_1|u_logic|M1pwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~4 , soc_inst|m0_1|u_logic|M1pwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nl43z4 , soc_inst|m0_1|u_logic|Nl43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arn2z4 , soc_inst|m0_1|u_logic|Arn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~2 , soc_inst|m0_1|u_logic|St0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K103z4~feeder , soc_inst|m0_1|u_logic|K103z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K103z4 , soc_inst|m0_1|u_logic|K103z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey03z4~feeder , soc_inst|m0_1|u_logic|Ey03z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey03z4 , soc_inst|m0_1|u_logic|Ey03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~4 , soc_inst|m0_1|u_logic|St0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V223z4 , soc_inst|m0_1|u_logic|V223z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eun2z4~feeder , soc_inst|m0_1|u_logic|Eun2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eun2z4 , soc_inst|m0_1|u_logic|Eun2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~0 , soc_inst|m0_1|u_logic|St0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jq1xx4~0 , soc_inst|m0_1|u_logic|Jq1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S2r2z4 , soc_inst|m0_1|u_logic|S2r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~3 , soc_inst|m0_1|u_logic|Bdwwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1r2z4 , soc_inst|m0_1|u_logic|E1r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~1 , soc_inst|m0_1|u_logic|Bdwwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4r2z4 , soc_inst|m0_1|u_logic|G4r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~0 , soc_inst|m0_1|u_logic|Bdwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~2 , soc_inst|m0_1|u_logic|Bdwwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4 , soc_inst|m0_1|u_logic|Bdwwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I30wx4~1 , soc_inst|m0_1|u_logic|I30wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~0 , soc_inst|m0_1|u_logic|K4mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~1 , soc_inst|m0_1|u_logic|K4mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw93z4 , soc_inst|m0_1|u_logic|Jw93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X6m2z4 , soc_inst|m0_1|u_logic|X6m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf43z4 , soc_inst|m0_1|u_logic|Gf43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE , soc_inst|m0_1|u_logic|Po53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~0 , soc_inst|m0_1|u_logic|D7bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X533z4 , soc_inst|m0_1|u_logic|X533z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow13z4 , soc_inst|m0_1|u_logic|Ow13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~1 , soc_inst|m0_1|u_logic|D7bwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5m2z4~feeder , soc_inst|m0_1|u_logic|J5m2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5m2z4 , soc_inst|m0_1|u_logic|J5m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9bwx4~0 , soc_inst|m0_1|u_logic|A9bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bv03z4 , soc_inst|m0_1|u_logic|Bv03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hyz2z4 , soc_inst|m0_1|u_logic|Hyz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~2 , soc_inst|m0_1|u_logic|D7bwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~3 , soc_inst|m0_1|u_logic|D7bwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aqnvx4~0 , soc_inst|m0_1|u_logic|Aqnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O2bwx4~0 , soc_inst|m0_1|u_logic|O2bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I30wx4~0 , soc_inst|m0_1|u_logic|I30wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|If33z4~DUPLICATE , soc_inst|m0_1|u_logic|If33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE , soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~3 , soc_inst|m0_1|u_logic|W21wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6nwx4 , soc_inst|m0_1|u_logic|S6nwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imnwx4 , soc_inst|m0_1|u_logic|Imnwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~0 , soc_inst|m0_1|u_logic|Qs7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~1 , soc_inst|m0_1|u_logic|Qs7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8iwx4~0 , soc_inst|m0_1|u_logic|F8iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jca3z4~0 , soc_inst|m0_1|u_logic|Jca3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jca3z4 , soc_inst|m0_1|u_logic|Jca3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tjlwx4~0 , soc_inst|m0_1|u_logic|Tjlwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pmnwx4 , soc_inst|m0_1|u_logic|Pmnwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E5awx4~0 , soc_inst|m0_1|u_logic|E5awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE , soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~73 , soc_inst|m0_1|u_logic|Add2~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~69 , soc_inst|m0_1|u_logic|Add2~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~65 , soc_inst|m0_1|u_logic|Add2~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~0 , soc_inst|m0_1|u_logic|Ldhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9awx4~0 , soc_inst|m0_1|u_logic|M9awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgg3z4 , soc_inst|m0_1|u_logic|Vgg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~3 , soc_inst|m0_1|u_logic|Hk0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xi2xx4~0 , soc_inst|m0_1|u_logic|Xi2xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Olg3z4 , soc_inst|m0_1|u_logic|Olg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wrg3z4 , soc_inst|m0_1|u_logic|Wrg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~0 , soc_inst|m0_1|u_logic|Hk0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sog3z4 , soc_inst|m0_1|u_logic|Sog3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4 , soc_inst|m0_1|u_logic|Ccg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nag3z4 , soc_inst|m0_1|u_logic|Nag3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dng3z4 , soc_inst|m0_1|u_logic|Dng3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~0 , soc_inst|m0_1|u_logic|Dmvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfg3z4 , soc_inst|m0_1|u_logic|Gfg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rdg3z4 , soc_inst|m0_1|u_logic|Rdg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~1 , soc_inst|m0_1|u_logic|Dmvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4 , soc_inst|m0_1|u_logic|Dmvwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kig3z4 , soc_inst|m0_1|u_logic|Kig3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~0 , soc_inst|m0_1|u_logic|Xu82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avg3z4 , soc_inst|m0_1|u_logic|Avg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ltg3z4 , soc_inst|m0_1|u_logic|Ltg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~2 , soc_inst|m0_1|u_logic|Xu82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyg3z4 , soc_inst|m0_1|u_logic|Eyg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4 , soc_inst|m0_1|u_logic|Zjg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~1 , soc_inst|m0_1|u_logic|Xu82z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uw82z4~0 , soc_inst|m0_1|u_logic|Uw82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~3 , soc_inst|m0_1|u_logic|Xu82z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fj0wx4~0 , soc_inst|m0_1|u_logic|Fj0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~0 , soc_inst|m0_1|u_logic|Sknwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~1 , soc_inst|m0_1|u_logic|Sknwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yilwx4~0 , soc_inst|m0_1|u_logic|Yilwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~2 , soc_inst|m0_1|u_logic|Sknwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zetwx4 , soc_inst|m0_1|u_logic|Zetwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xuxwx4 , soc_inst|m0_1|u_logic|Xuxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mouwx4~0 , soc_inst|m0_1|u_logic|Mouwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T2owx4~1 , soc_inst|m0_1|u_logic|T2owx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~77 , soc_inst|m0_1|u_logic|Add3~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U72wx4~0 , soc_inst|m0_1|u_logic|U72wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jwf3z4 , soc_inst|m0_1|u_logic|Jwf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~109 , soc_inst|m0_1|u_logic|Add2~109, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ab9wx4~0 , soc_inst|m0_1|u_logic|Ab9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~0 , soc_inst|m0_1|u_logic|Ciawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj83z4 , soc_inst|m0_1|u_logic|Wj83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi33z4 , soc_inst|m0_1|u_logic|Mi33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~7 , soc_inst|m0_1|u_logic|Hc1wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y91xx4~0 , soc_inst|m0_1|u_logic|Y91xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4 , soc_inst|m0_1|u_logic|Hnr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na73z4~feeder , soc_inst|m0_1|u_logic|Na73z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na73z4 , soc_inst|m0_1|u_logic|Na73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~6 , soc_inst|m0_1|u_logic|Hc1wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE , soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D923z4 , soc_inst|m0_1|u_logic|D923z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~8 , soc_inst|m0_1|u_logic|Hc1wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~1 , soc_inst|m0_1|u_logic|Ciawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bnnvx4 , soc_inst|m0_1|u_logic|Bnnvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~25 , soc_inst|m0_1|u_logic|Add2~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~17 , soc_inst|m0_1|u_logic|Add2~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~0 , soc_inst|m0_1|u_logic|Bmhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~0 , soc_inst|m0_1|u_logic|Amyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~1 , soc_inst|m0_1|u_logic|Amyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~2 , soc_inst|m0_1|u_logic|Amyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ykyvx4~0 , soc_inst|m0_1|u_logic|Ykyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~0 , soc_inst|m0_1|u_logic|Rw7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hbv2z4 , soc_inst|m0_1|u_logic|Hbv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2m2z4 , soc_inst|m0_1|u_logic|H2m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~3 , soc_inst|m0_1|u_logic|Ebbwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1u2z4 , soc_inst|m0_1|u_logic|Y1u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H783z4 , soc_inst|m0_1|u_logic|H783z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~2 , soc_inst|m0_1|u_logic|Ebbwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE , soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx63z4 , soc_inst|m0_1|u_logic|Yx63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~0 , soc_inst|m0_1|u_logic|Ebbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T0m2z4 , soc_inst|m0_1|u_logic|T0m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yb93z4 , soc_inst|m0_1|u_logic|Yb93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~1 , soc_inst|m0_1|u_logic|Ebbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4 , soc_inst|m0_1|u_logic|Ebbwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~0 , soc_inst|m0_1|u_logic|Jmdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~1 , soc_inst|m0_1|u_logic|Rw7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2t2z4 , soc_inst|m0_1|u_logic|I2t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~0 , soc_inst|m0_1|u_logic|Lk9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ld1xx4~0 , soc_inst|m0_1|u_logic|Ld1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hq33z4 , soc_inst|m0_1|u_logic|Hq33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE , soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S61xx4~0 , soc_inst|m0_1|u_logic|S61xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ii73z4 , soc_inst|m0_1|u_logic|Ii73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qc1xx4~0 , soc_inst|m0_1|u_logic|Qc1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z863z4 , soc_inst|m0_1|u_logic|Z863z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~2 , soc_inst|m0_1|u_logic|P12wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg23z4~feeder , soc_inst|m0_1|u_logic|Yg23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg23z4 , soc_inst|m0_1|u_logic|Yg23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz43z4~feeder , soc_inst|m0_1|u_logic|Qz43z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE , soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~1 , soc_inst|m0_1|u_logic|P12wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~3 , soc_inst|m0_1|u_logic|P12wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E913z4 , soc_inst|m0_1|u_logic|E913z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~7 , soc_inst|m0_1|u_logic|P12wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qyc3z4 , soc_inst|m0_1|u_logic|Qyc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvv2z4 , soc_inst|m0_1|u_logic|Rvv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kc03z4 , soc_inst|m0_1|u_logic|Kc03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~6 , soc_inst|m0_1|u_logic|P12wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cvr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cvr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~4 , soc_inst|m0_1|u_logic|P12wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4 , soc_inst|m0_1|u_logic|Eyr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asr2z4 , soc_inst|m0_1|u_logic|Asr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Otr2z4 , soc_inst|m0_1|u_logic|Otr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~5 , soc_inst|m0_1|u_logic|P12wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~0 , soc_inst|m0_1|u_logic|P12wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4 , soc_inst|m0_1|u_logic|P12wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~1 , soc_inst|m0_1|u_logic|Lk9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgnvx4~0 , soc_inst|m0_1|u_logic|Pgnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I793z4 , soc_inst|m0_1|u_logic|I793z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz43z4 , soc_inst|m0_1|u_logic|Qz43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~0 , soc_inst|m0_1|u_logic|Kn9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~1 , soc_inst|m0_1|u_logic|Kn9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qwr2z4 , soc_inst|m0_1|u_logic|Qwr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hp9wx4~0 , soc_inst|m0_1|u_logic|Hp9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE , soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~2 , soc_inst|m0_1|u_logic|Kn9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~3 , soc_inst|m0_1|u_logic|Kn9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F32wx4~0 , soc_inst|m0_1|u_logic|F32wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~1 , soc_inst|m0_1|u_logic|Zz1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcz2z4 , soc_inst|m0_1|u_logic|Mcz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pl62z4~0 , soc_inst|m0_1|u_logic|Pl62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wd13z4 , soc_inst|m0_1|u_logic|Wd13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn23z4 , soc_inst|m0_1|u_logic|Fn23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~1 , soc_inst|m0_1|u_logic|Sj62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ikz2z4 , soc_inst|m0_1|u_logic|Ikz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~2 , soc_inst|m0_1|u_logic|Sj62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X553z4 , soc_inst|m0_1|u_logic|X553z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow33z4 , soc_inst|m0_1|u_logic|Ow33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~0 , soc_inst|m0_1|u_logic|Sj62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~3 , soc_inst|m0_1|u_logic|Sj62z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yonvx4~0 , soc_inst|m0_1|u_logic|Yonvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~0 , soc_inst|m0_1|u_logic|Tuawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~1 , soc_inst|m0_1|u_logic|Tuawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~37 , soc_inst|m0_1|u_logic|Add5~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~81 , soc_inst|m0_1|u_logic|Add5~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~41 , soc_inst|m0_1|u_logic|Add5~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~2 , soc_inst|m0_1|u_logic|Zz1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I7owx4 , soc_inst|m0_1|u_logic|I7owx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6owx4 , soc_inst|m0_1|u_logic|G6owx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5tvx4~0 , soc_inst|m0_1|u_logic|M5tvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zyovx4 , soc_inst|m0_1|u_logic|Zyovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4~0 , soc_inst|m0_1|u_logic|Ztc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4 , soc_inst|m0_1|u_logic|Ztc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Trq2z4 , soc_inst|m0_1|u_logic|Trq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K9ovx4~0 , soc_inst|m0_1|u_logic|K9ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T2ivx4~0 , soc_inst|m0_1|u_logic|T2ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahowx4~0 , soc_inst|m0_1|u_logic|Ahowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tgowx4~0 , soc_inst|m0_1|u_logic|Tgowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~0 , soc_inst|m0_1|u_logic|Tlyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Plx2z4 , soc_inst|m0_1|u_logic|Plx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~105 , soc_inst|m0_1|u_logic|Add3~105, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~97 , soc_inst|m0_1|u_logic|Add3~97, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~93 , soc_inst|m0_1|u_logic|Add3~93, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~89 , soc_inst|m0_1|u_logic|Add3~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~85 , soc_inst|m0_1|u_logic|Add3~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~69 , soc_inst|m0_1|u_logic|Add3~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~65 , soc_inst|m0_1|u_logic|Add3~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~0 , soc_inst|m0_1|u_logic|Jtdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bf93z4 , soc_inst|m0_1|u_logic|Bf93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Anq2z4 , soc_inst|m0_1|u_logic|Anq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~1 , soc_inst|m0_1|u_logic|D9uwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5u2z4 , soc_inst|m0_1|u_logic|B5u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE , soc_inst|m0_1|u_logic|Ka83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~2 , soc_inst|m0_1|u_logic|D9uwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Poq2z4 , soc_inst|m0_1|u_logic|Poq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kev2z4 , soc_inst|m0_1|u_logic|Kev2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~3 , soc_inst|m0_1|u_logic|D9uwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eqq2z4 , soc_inst|m0_1|u_logic|Eqq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B173z4~DUPLICATE , soc_inst|m0_1|u_logic|B173z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~0 , soc_inst|m0_1|u_logic|D9uwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4 , soc_inst|m0_1|u_logic|D9uwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE , soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R21xx4~0 , soc_inst|m0_1|u_logic|R21xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1q2z4 , soc_inst|m0_1|u_logic|B1q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmv2z4 , soc_inst|m0_1|u_logic|Hmv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~1 , soc_inst|m0_1|u_logic|S71wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xg33z4~feeder , soc_inst|m0_1|u_logic|Xg33z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE , soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hi83z4 , soc_inst|m0_1|u_logic|Hi83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~0 , soc_inst|m0_1|u_logic|S71wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4 , soc_inst|m0_1|u_logic|Ycu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~4 , soc_inst|m0_1|u_logic|S71wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|No93z4 , soc_inst|m0_1|u_logic|No93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~3 , soc_inst|m0_1|u_logic|S71wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X213z4 , soc_inst|m0_1|u_logic|X213z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D603z4 , soc_inst|m0_1|u_logic|D603z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~2 , soc_inst|m0_1|u_logic|S71wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~5 , soc_inst|m0_1|u_logic|S71wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uup2z4 , soc_inst|m0_1|u_logic|Uup2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mgawx4~0 , soc_inst|m0_1|u_logic|Mgawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mgawx4~1 , soc_inst|m0_1|u_logic|Mgawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dkr2z4 , soc_inst|m0_1|u_logic|Dkr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L4jvx4~0 , soc_inst|m0_1|u_logic|L4jvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfr2z4 , soc_inst|m0_1|u_logic|Kfr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc73z4 , soc_inst|m0_1|u_logic|Cc73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~0 , soc_inst|m0_1|u_logic|H2wwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE , soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~1 , soc_inst|m0_1|u_logic|H2wwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpv2z4 , soc_inst|m0_1|u_logic|Lpv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vdr2z4 , soc_inst|m0_1|u_logic|Vdr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~3 , soc_inst|m0_1|u_logic|H2wwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgu2z4 , soc_inst|m0_1|u_logic|Cgu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll83z4 , soc_inst|m0_1|u_logic|Ll83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~2 , soc_inst|m0_1|u_logic|H2wwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4 , soc_inst|m0_1|u_logic|H2wwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|M413z4~DUPLICATE , soc_inst|m0_1|u_logic|M413z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S703z4~feeder , soc_inst|m0_1|u_logic|S703z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S703z4 , soc_inst|m0_1|u_logic|S703z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~2 , soc_inst|m0_1|u_logic|U9a2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk33z4~DUPLICATE , soc_inst|m0_1|u_logic|Bk33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa23z4 , soc_inst|m0_1|u_logic|Sa23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~1 , soc_inst|m0_1|u_logic|U9a2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oir2z4 , soc_inst|m0_1|u_logic|Oir2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zgr2z4 , soc_inst|m0_1|u_logic|Zgr2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rba2z4~0 , soc_inst|m0_1|u_logic|Rba2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk33z4 , soc_inst|m0_1|u_logic|Bk33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~1 , soc_inst|m0_1|u_logic|U9a2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kt43z4 , soc_inst|m0_1|u_logic|Kt43z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|T263z4 , soc_inst|m0_1|u_logic|T263z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kt43z4 , soc_inst|m0_1|u_logic|Kt43z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~0 , soc_inst|m0_1|u_logic|U9a2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~3 , soc_inst|m0_1|u_logic|U9a2z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE , soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgu2z4 , soc_inst|m0_1|u_logic|Cgu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~2 , soc_inst|m0_1|u_logic|H2wwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfr2z4 , soc_inst|m0_1|u_logic|Kfr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~0 , soc_inst|m0_1|u_logic|H2wwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vdr2z4 , soc_inst|m0_1|u_logic|Vdr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpv2z4 , soc_inst|m0_1|u_logic|Lpv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~3 , soc_inst|m0_1|u_logic|H2wwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr93z4 , soc_inst|m0_1|u_logic|Rr93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gcr2z4 , soc_inst|m0_1|u_logic|Gcr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~1 , soc_inst|m0_1|u_logic|H2wwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4 , soc_inst|m0_1|u_logic|H2wwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pg1wx4~0 , soc_inst|m0_1|u_logic|Pg1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cqovx4 , soc_inst|m0_1|u_logic|Cqovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[10] , soc_inst|ram_1|saved_word_address[10], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[10]~10 , soc_inst|ram_1|memory.raddr_a[10]~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~105 , soc_inst|m0_1|u_logic|Add3~105, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0g3z4 , soc_inst|m0_1|u_logic|Z0g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4 , soc_inst|m0_1|u_logic|Hnr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE , soc_inst|m0_1|u_logic|Na73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~6 , soc_inst|m0_1|u_logic|Hc1wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D923z4~DUPLICATE , soc_inst|m0_1|u_logic|D923z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi33z4 , soc_inst|m0_1|u_logic|Mi33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj83z4~feeder , soc_inst|m0_1|u_logic|Wj83z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj83z4 , soc_inst|m0_1|u_logic|Wj83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~7 , soc_inst|m0_1|u_logic|Hc1wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~8 , soc_inst|m0_1|u_logic|Hc1wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O2g3z4 , soc_inst|m0_1|u_logic|O2g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X94xx4~0 , soc_inst|m0_1|u_logic|X94xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzf3z4 , soc_inst|m0_1|u_logic|Kzf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnv2z4 , soc_inst|m0_1|u_logic|Wnv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~3 , soc_inst|m0_1|u_logic|Hc1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vxf3z4 , soc_inst|m0_1|u_logic|Vxf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE , soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~2 , soc_inst|m0_1|u_logic|Hc1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lqr2z4 , soc_inst|m0_1|u_logic|Lqr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~4 , soc_inst|m0_1|u_logic|Hc1wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E163z4 , soc_inst|m0_1|u_logic|E163z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cq93z4 , soc_inst|m0_1|u_logic|Cq93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~1 , soc_inst|m0_1|u_logic|Hc1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wor2z4 , soc_inst|m0_1|u_logic|Wor2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~0 , soc_inst|m0_1|u_logic|Hc1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~5 , soc_inst|m0_1|u_logic|Hc1wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4 , soc_inst|m0_1|u_logic|Hc1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~0 , soc_inst|m0_1|u_logic|Ciawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~1 , soc_inst|m0_1|u_logic|Ciawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B91wx4~1 , soc_inst|m0_1|u_logic|B91wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8e3z4 , soc_inst|m0_1|u_logic|F8e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6e3z4 , soc_inst|m0_1|u_logic|Q6e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~2 , soc_inst|m0_1|u_logic|Gm1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5e3z4 , soc_inst|m0_1|u_logic|B5e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE , soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~4 , soc_inst|m0_1|u_logic|Gm1wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Snd3z4 , soc_inst|m0_1|u_logic|Snd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hpd3z4 , soc_inst|m0_1|u_logic|Hpd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~3 , soc_inst|m0_1|u_logic|Gm1wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uo5xx4~0 , soc_inst|m0_1|u_logic|Uo5xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0e3z4 , soc_inst|m0_1|u_logic|I0e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X1e3z4 , soc_inst|m0_1|u_logic|X1e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~1 , soc_inst|m0_1|u_logic|Gm1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wqd3z4 , soc_inst|m0_1|u_logic|Wqd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Exd3z4 , soc_inst|m0_1|u_logic|Exd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~0 , soc_inst|m0_1|u_logic|Gm1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~5 , soc_inst|m0_1|u_logic|Gm1wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4 , soc_inst|m0_1|u_logic|Gm1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~1 , soc_inst|m0_1|u_logic|Aj1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hvivx4~0 , soc_inst|m0_1|u_logic|Hvivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rkd3z4 , soc_inst|m0_1|u_logic|Rkd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE , soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I463z4 , soc_inst|m0_1|u_logic|I463z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu43z4~feeder , soc_inst|m0_1|u_logic|Zu43z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE , soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~0 , soc_inst|m0_1|u_logic|Uga2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rds2z4 , soc_inst|m0_1|u_logic|Rds2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4 , soc_inst|m0_1|u_logic|Dcs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ria2z4~0 , soc_inst|m0_1|u_logic|Ria2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE , soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql33z4 , soc_inst|m0_1|u_logic|Ql33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~1 , soc_inst|m0_1|u_logic|Uga2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B613z4 , soc_inst|m0_1|u_logic|B613z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H903z4 , soc_inst|m0_1|u_logic|H903z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~2 , soc_inst|m0_1|u_logic|Uga2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~3 , soc_inst|m0_1|u_logic|Uga2z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oas2z4 , soc_inst|m0_1|u_logic|Oas2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd73z4 , soc_inst|m0_1|u_logic|Rd73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~0 , soc_inst|m0_1|u_logic|Pjqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7s2z4 , soc_inst|m0_1|u_logic|K7s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gt93z4 , soc_inst|m0_1|u_logic|Gt93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~1 , soc_inst|m0_1|u_logic|Pjqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An83z4 , soc_inst|m0_1|u_logic|An83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhu2z4 , soc_inst|m0_1|u_logic|Rhu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~2 , soc_inst|m0_1|u_logic|Pjqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4 , soc_inst|m0_1|u_logic|Z8s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arv2z4 , soc_inst|m0_1|u_logic|Arv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~3 , soc_inst|m0_1|u_logic|Pjqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4 , soc_inst|m0_1|u_logic|Pjqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxnvx4~0 , soc_inst|m0_1|u_logic|Hxnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~0 , soc_inst|m0_1|u_logic|Kzbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~1 , soc_inst|m0_1|u_logic|Kzbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~113 , soc_inst|m0_1|u_logic|Add5~113, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~105 , soc_inst|m0_1|u_logic|Add5~105, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~7 , soc_inst|m0_1|u_logic|Zh5wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE , soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~6 , soc_inst|m0_1|u_logic|Zh5wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~8 , soc_inst|m0_1|u_logic|Zh5wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~9 , soc_inst|m0_1|u_logic|Zh5wx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~2 , soc_inst|m0_1|u_logic|Do1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~1 , soc_inst|m0_1|u_logic|Do1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~0 , soc_inst|m0_1|u_logic|Do1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~2 , soc_inst|m0_1|u_logic|Glnwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pn1wx4~0 , soc_inst|m0_1|u_logic|Pn1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc23z4~feeder , soc_inst|m0_1|u_logic|Hc23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc23z4 , soc_inst|m0_1|u_logic|Hc23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~0 , soc_inst|m0_1|u_logic|Zh5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D432z4~0 , soc_inst|m0_1|u_logic|D432z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~3 , soc_inst|m0_1|u_logic|Zh5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~4 , soc_inst|m0_1|u_logic|Zh5wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu43z4 , soc_inst|m0_1|u_logic|Zu43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~2 , soc_inst|m0_1|u_logic|Zh5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rkd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Rkd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~1 , soc_inst|m0_1|u_logic|Zh5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~5 , soc_inst|m0_1|u_logic|Zh5wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~0 , soc_inst|m0_1|u_logic|S3cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~1 , soc_inst|m0_1|u_logic|S3cwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~45 , soc_inst|m0_1|u_logic|Add5~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~2 , soc_inst|m0_1|u_logic|Aj1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~1 , soc_inst|m0_1|u_logic|Xk1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~0 , soc_inst|m0_1|u_logic|Xk1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~0 , soc_inst|m0_1|u_logic|Aj1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aud3z4 , soc_inst|m0_1|u_logic|Aud3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~7 , soc_inst|m0_1|u_logic|Gm1wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsd3z4 , soc_inst|m0_1|u_logic|Lsd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9e3z4 , soc_inst|m0_1|u_logic|U9e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4 , soc_inst|m0_1|u_logic|Pvd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyd3z4 , soc_inst|m0_1|u_logic|Tyd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~6 , soc_inst|m0_1|u_logic|Gm1wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~8 , soc_inst|m0_1|u_logic|Gm1wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R99wx4~0 , soc_inst|m0_1|u_logic|R99wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R99wx4~1 , soc_inst|m0_1|u_logic|R99wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add5~13 , soc_inst|m0_1|u_logic|Add5~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gcr2z4 , soc_inst|m0_1|u_logic|Gcr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr93z4 , soc_inst|m0_1|u_logic|Rr93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~3 , soc_inst|m0_1|u_logic|Ze1wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk33z4 , soc_inst|m0_1|u_logic|Bk33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~0 , soc_inst|m0_1|u_logic|Ze1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~4 , soc_inst|m0_1|u_logic|Ze1wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M413z4 , soc_inst|m0_1|u_logic|M413z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~2 , soc_inst|m0_1|u_logic|Ze1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dy4xx4~0 , soc_inst|m0_1|u_logic|Dy4xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~1 , soc_inst|m0_1|u_logic|Ze1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~5 , soc_inst|m0_1|u_logic|Ze1wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4 , soc_inst|m0_1|u_logic|Ze1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nf1wx4~1 , soc_inst|m0_1|u_logic|Nf1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~0 , soc_inst|m0_1|u_logic|Qd1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~1 , soc_inst|m0_1|u_logic|Qd1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE , soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE , soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~6 , soc_inst|m0_1|u_logic|Ze1wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~7 , soc_inst|m0_1|u_logic|Ze1wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~8 , soc_inst|m0_1|u_logic|Ze1wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~0 , soc_inst|m0_1|u_logic|Ejawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~1 , soc_inst|m0_1|u_logic|Ejawx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add5~17 , soc_inst|m0_1|u_logic|Add5~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B91wx4~2 , soc_inst|m0_1|u_logic|B91wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~1 , soc_inst|m0_1|u_logic|Ya1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~0 , soc_inst|m0_1|u_logic|Ya1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B91wx4~0 , soc_inst|m0_1|u_logic|B91wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr43z4 , soc_inst|m0_1|u_logic|Vr43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~0 , soc_inst|m0_1|u_logic|I3a2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~2 , soc_inst|m0_1|u_logic|I3a2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D923z4 , soc_inst|m0_1|u_logic|D923z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~1 , soc_inst|m0_1|u_logic|I3a2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE , soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5a2z4~0 , soc_inst|m0_1|u_logic|F5a2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~3 , soc_inst|m0_1|u_logic|I3a2z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~3 , soc_inst|m0_1|u_logic|Zkuwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na73z4 , soc_inst|m0_1|u_logic|Na73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~61 , soc_inst|m0_1|u_logic|Add5~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~4 , soc_inst|m0_1|u_logic|haddr_o~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdjvx4~0 , soc_inst|m0_1|u_logic|Pdjvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7q2z4 , soc_inst|m0_1|u_logic|J7q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xg33z4 , soc_inst|m0_1|u_logic|Xg33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O723z4 , soc_inst|m0_1|u_logic|O723z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~1 , soc_inst|m0_1|u_logic|Ww92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5q2z4 , soc_inst|m0_1|u_logic|U5q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X213z4~DUPLICATE , soc_inst|m0_1|u_logic|X213z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~2 , soc_inst|m0_1|u_logic|Ww92z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gq43z4 , soc_inst|m0_1|u_logic|Gq43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pz53z4 , soc_inst|m0_1|u_logic|Pz53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~0 , soc_inst|m0_1|u_logic|Ww92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4q2z4 , soc_inst|m0_1|u_logic|F4q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ty92z4~0 , soc_inst|m0_1|u_logic|Ty92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~3 , soc_inst|m0_1|u_logic|Ww92z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4 , soc_inst|m0_1|u_logic|Q2q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~0 , soc_inst|m0_1|u_logic|Hmqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~2 , soc_inst|m0_1|u_logic|Hmqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~3 , soc_inst|m0_1|u_logic|Hmqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mzp2z4 , soc_inst|m0_1|u_logic|Mzp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~1 , soc_inst|m0_1|u_logic|Hmqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4 , soc_inst|m0_1|u_logic|Hmqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C61wx4~0 , soc_inst|m0_1|u_logic|C61wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J61wx4~1 , soc_inst|m0_1|u_logic|J61wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J61wx4~0 , soc_inst|m0_1|u_logic|J61wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O51wx4~0 , soc_inst|m0_1|u_logic|O51wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M41wx4~0 , soc_inst|m0_1|u_logic|M41wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xuxwx4 , soc_inst|m0_1|u_logic|Xuxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yjzvx4~0 , soc_inst|m0_1|u_logic|Yjzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sta2z4~0 , soc_inst|m0_1|u_logic|Sta2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4 , soc_inst|m0_1|u_logic|Uaj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~0 , soc_inst|m0_1|u_logic|M5mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S5b3z4 , soc_inst|m0_1|u_logic|S5b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R3uvx4~0 , soc_inst|m0_1|u_logic|R3uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ta1xx4~0 , soc_inst|m0_1|u_logic|Ta1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K2k2z4 , soc_inst|m0_1|u_logic|K2k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~2 , soc_inst|m0_1|u_logic|Hihvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~1 , soc_inst|m0_1|u_logic|Duuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duu2z4 , soc_inst|m0_1|u_logic|Duu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4 , soc_inst|m0_1|u_logic|Dtj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~3 , soc_inst|m0_1|u_logic|Duuwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ukt2z4 , soc_inst|m0_1|u_logic|Ukt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq73z4 , soc_inst|m0_1|u_logic|Dq73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~2 , soc_inst|m0_1|u_logic|Duuwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug63z4 , soc_inst|m0_1|u_logic|Ug63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ruj2z4 , soc_inst|m0_1|u_logic|Ruj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~0 , soc_inst|m0_1|u_logic|Duuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4 , soc_inst|m0_1|u_logic|Duuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kw7wx4~0 , soc_inst|m0_1|u_logic|Kw7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~1 , soc_inst|m0_1|u_logic|Jmdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~1 , soc_inst|m0_1|u_logic|Fkdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~1 , soc_inst|m0_1|u_logic|B2uvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4~0 , soc_inst|m0_1|u_logic|Mcc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4 , soc_inst|m0_1|u_logic|Mcc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ruvvx4~0 , soc_inst|m0_1|u_logic|Ruvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M2ivx4~0 , soc_inst|m0_1|u_logic|M2ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vac3z4 , soc_inst|m0_1|u_logic|Vac3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~0 , soc_inst|m0_1|u_logic|Q6twx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~1 , soc_inst|m0_1|u_logic|Q6twx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4~0 , soc_inst|m0_1|u_logic|Qfa3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4 , soc_inst|m0_1|u_logic|Qfa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~94 , soc_inst|m0_1|u_logic|Add0~94, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~33 , soc_inst|m0_1|u_logic|Add0~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xsmvx4~0 , soc_inst|m0_1|u_logic|Xsmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C4b3z4 , soc_inst|m0_1|u_logic|C4b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~0 , soc_inst|m0_1|u_logic|Rhfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~1 , soc_inst|m0_1|u_logic|Rhfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~2 , soc_inst|m0_1|u_logic|Rhfwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Neu2z4 , soc_inst|m0_1|u_logic|Neu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~2 , soc_inst|m0_1|u_logic|Zkuwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lqr2z4 , soc_inst|m0_1|u_logic|Lqr2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~0 , soc_inst|m0_1|u_logic|Zkuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnv2z4 , soc_inst|m0_1|u_logic|Wnv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wor2z4 , soc_inst|m0_1|u_logic|Wor2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~3 , soc_inst|m0_1|u_logic|Zkuwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cq93z4 , soc_inst|m0_1|u_logic|Cq93z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~1 , soc_inst|m0_1|u_logic|Zkuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Neu2z4 , soc_inst|m0_1|u_logic|Neu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE , soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~2 , soc_inst|m0_1|u_logic|Zkuwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4 , soc_inst|m0_1|u_logic|Zkuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ra1wx4~0 , soc_inst|m0_1|u_logic|Ra1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~5 , soc_inst|m0_1|u_logic|haddr_o~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[11] , soc_inst|ram_1|saved_word_address[11], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[11]~11 , soc_inst|ram_1|memory.raddr_a[11]~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte3~0 , soc_inst|ram_1|byte3~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[3] , soc_inst|ram_1|byte_select[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3awx4~0 , soc_inst|m0_1|u_logic|O3awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kih2z4~0 , soc_inst|m0_1|u_logic|Kih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ehcwx4~0 , soc_inst|m0_1|u_logic|Ehcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmawx4~0 , soc_inst|m0_1|u_logic|Rmawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~0 , soc_inst|m0_1|u_logic|Mdzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ducvx4 , soc_inst|m0_1|u_logic|Ducvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whh2z4~0 , soc_inst|m0_1|u_logic|Whh2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wqm2z4 , soc_inst|m0_1|u_logic|Wqm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6v2z4 , soc_inst|m0_1|u_logic|R6v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~3 , soc_inst|m0_1|u_logic|Svqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixt2z4 , soc_inst|m0_1|u_logic|Ixt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R283z4 , soc_inst|m0_1|u_logic|R283z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~2 , soc_inst|m0_1|u_logic|Svqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ksm2z4 , soc_inst|m0_1|u_logic|Ksm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It63z4 , soc_inst|m0_1|u_logic|It63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~0 , soc_inst|m0_1|u_logic|Svqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G493z4 , soc_inst|m0_1|u_logic|G493z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipm2z4 , soc_inst|m0_1|u_logic|Ipm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~1 , soc_inst|m0_1|u_logic|Svqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4 , soc_inst|m0_1|u_logic|Svqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wyt2z4 , soc_inst|m0_1|u_logic|Wyt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F483z4 , soc_inst|m0_1|u_logic|F483z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~2 , soc_inst|m0_1|u_logic|Qxuwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gip2z4~feeder , soc_inst|m0_1|u_logic|Gip2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gip2z4 , soc_inst|m0_1|u_logic|Gip2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8v2z4 , soc_inst|m0_1|u_logic|F8v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~3 , soc_inst|m0_1|u_logic|Qxuwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W893z4 , soc_inst|m0_1|u_logic|W893z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sgp2z4 , soc_inst|m0_1|u_logic|Sgp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~1 , soc_inst|m0_1|u_logic|Qxuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu63z4 , soc_inst|m0_1|u_logic|Wu63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujp2z4 , soc_inst|m0_1|u_logic|Ujp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~0 , soc_inst|m0_1|u_logic|Qxuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4 , soc_inst|m0_1|u_logic|Qxuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~0 , soc_inst|m0_1|u_logic|Rw7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~1 , soc_inst|m0_1|u_logic|Rw7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvv2z4 , soc_inst|m0_1|u_logic|Rvv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~3 , soc_inst|m0_1|u_logic|Lr9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asr2z4 , soc_inst|m0_1|u_logic|Asr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qyc3z4 , soc_inst|m0_1|u_logic|Qyc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~1 , soc_inst|m0_1|u_logic|Lr9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imu2z4 , soc_inst|m0_1|u_logic|Imu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE , soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~2 , soc_inst|m0_1|u_logic|Lr9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ii73z4 , soc_inst|m0_1|u_logic|Ii73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cvr2z4 , soc_inst|m0_1|u_logic|Cvr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~0 , soc_inst|m0_1|u_logic|Lr9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4 , soc_inst|m0_1|u_logic|Lr9wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~0 , soc_inst|m0_1|u_logic|Fkdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhu2z4 , soc_inst|m0_1|u_logic|Rhu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An83z4~DUPLICATE , soc_inst|m0_1|u_logic|An83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~2 , soc_inst|m0_1|u_logic|Pjqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~1 , soc_inst|m0_1|u_logic|Pjqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE , soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~3 , soc_inst|m0_1|u_logic|Pjqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oas2z4 , soc_inst|m0_1|u_logic|Oas2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~0 , soc_inst|m0_1|u_logic|Pjqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4 , soc_inst|m0_1|u_logic|Pjqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~0 , soc_inst|m0_1|u_logic|Nodwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~1 , soc_inst|m0_1|u_logic|Nodwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I7owx4 , soc_inst|m0_1|u_logic|I7owx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2twx4~0 , soc_inst|m0_1|u_logic|I2twx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4~0 , soc_inst|m0_1|u_logic|Qfc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4 , soc_inst|m0_1|u_logic|Qfc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzdwx4~0 , soc_inst|m0_1|u_logic|Vzdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psh3z4 , soc_inst|m0_1|u_logic|Psh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi23z4~feeder , soc_inst|m0_1|u_logic|Mi23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE , soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Naq2z4 , soc_inst|m0_1|u_logic|Naq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj73z4~feeder , soc_inst|m0_1|u_logic|Wj73z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj73z4 , soc_inst|m0_1|u_logic|Wj73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~6 , soc_inst|m0_1|u_logic|Z62wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr33z4~feeder , soc_inst|m0_1|u_logic|Vr33z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr33z4 , soc_inst|m0_1|u_logic|Vr33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ft83z4~DUPLICATE , soc_inst|m0_1|u_logic|Ft83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~7 , soc_inst|m0_1|u_logic|Z62wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~8 , soc_inst|m0_1|u_logic|Z62wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lph3z4 , soc_inst|m0_1|u_logic|Lph3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E153z4~feeder , soc_inst|m0_1|u_logic|E153z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E153z4 , soc_inst|m0_1|u_logic|E153z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~2 , soc_inst|m0_1|u_logic|Z62wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnu2z4 , soc_inst|m0_1|u_logic|Wnu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~4 , soc_inst|m0_1|u_logic|Z62wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Euh3z4~feeder , soc_inst|m0_1|u_logic|Euh3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Euh3z4 , soc_inst|m0_1|u_logic|Euh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T04xx4~0 , soc_inst|m0_1|u_logic|T04xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fxv2z4 , soc_inst|m0_1|u_logic|Fxv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arh3z4 , soc_inst|m0_1|u_logic|Arh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~3 , soc_inst|m0_1|u_logic|Z62wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccq2z4 , soc_inst|m0_1|u_logic|Ccq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi23z4 , soc_inst|m0_1|u_logic|Mi23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr33z4~DUPLICATE , soc_inst|m0_1|u_logic|Vr33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~1 , soc_inst|m0_1|u_logic|Du9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~2 , soc_inst|m0_1|u_logic|Du9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aw9wx4~0 , soc_inst|m0_1|u_logic|Aw9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na63z4 , soc_inst|m0_1|u_logic|Na63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~0 , soc_inst|m0_1|u_logic|Du9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~3 , soc_inst|m0_1|u_logic|Du9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P82wx4~0 , soc_inst|m0_1|u_logic|P82wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~0 , soc_inst|m0_1|u_logic|Ns9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~1 , soc_inst|m0_1|u_logic|Ns9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~65 , soc_inst|m0_1|u_logic|Add5~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~3 , soc_inst|m0_1|u_logic|haddr_o~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zcivx4~0 , soc_inst|m0_1|u_logic|Zcivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y8q2z4 , soc_inst|m0_1|u_logic|Y8q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~0 , soc_inst|m0_1|u_logic|Z62wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0d3z4 , soc_inst|m0_1|u_logic|E0d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~1 , soc_inst|m0_1|u_logic|Z62wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~5 , soc_inst|m0_1|u_logic|Z62wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4 , soc_inst|m0_1|u_logic|Z62wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N72wx4~0 , soc_inst|m0_1|u_logic|N72wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~0 , soc_inst|m0_1|u_logic|Q52wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~1 , soc_inst|m0_1|u_logic|Q52wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rdq2z4 , soc_inst|m0_1|u_logic|Rdq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE , soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~0 , soc_inst|m0_1|u_logic|Ey9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ft83z4 , soc_inst|m0_1|u_logic|Ft83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~2 , soc_inst|m0_1|u_logic|Ey9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~3 , soc_inst|m0_1|u_logic|Ey9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~1 , soc_inst|m0_1|u_logic|Ey9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4 , soc_inst|m0_1|u_logic|Ey9wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cao2z4 , soc_inst|m0_1|u_logic|Cao2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE , soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~7 , soc_inst|m0_1|u_logic|W21wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sg83z4 , soc_inst|m0_1|u_logic|Sg83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z52xx4~0 , soc_inst|m0_1|u_logic|Z52xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~8 , soc_inst|m0_1|u_logic|W21wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jbu2z4 , soc_inst|m0_1|u_logic|Jbu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skv2z4 , soc_inst|m0_1|u_logic|Skv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~0 , soc_inst|m0_1|u_logic|W21wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ro43z4~feeder , soc_inst|m0_1|u_logic|Ro43z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ro43z4 , soc_inst|m0_1|u_logic|Ro43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5o2z4~feeder , soc_inst|m0_1|u_logic|J5o2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE , soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~2 , soc_inst|m0_1|u_logic|W21wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I113z4 , soc_inst|m0_1|u_logic|I113z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O403z4 , soc_inst|m0_1|u_logic|O403z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~5 , soc_inst|m0_1|u_logic|W21wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6o2z4 , soc_inst|m0_1|u_logic|Y6o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|If33z4 , soc_inst|m0_1|u_logic|If33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z523z4 , soc_inst|m0_1|u_logic|Z523z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~1 , soc_inst|m0_1|u_logic|Kq92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4 , soc_inst|m0_1|u_logic|Rbo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ay53z4 , soc_inst|m0_1|u_logic|Ay53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~0 , soc_inst|m0_1|u_logic|Kq92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hs92z4~0 , soc_inst|m0_1|u_logic|Hs92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~2 , soc_inst|m0_1|u_logic|Kq92z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~3 , soc_inst|m0_1|u_logic|Kq92z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U11wx4~0 , soc_inst|m0_1|u_logic|U11wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~69 , soc_inst|m0_1|u_logic|Add5~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vpovx4 , soc_inst|m0_1|u_logic|Vpovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eijvx4~0 , soc_inst|m0_1|u_logic|Eijvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ym93z4 , soc_inst|m0_1|u_logic|Ym93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~4 , soc_inst|m0_1|u_logic|W21wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~3 , soc_inst|m0_1|u_logic|W21wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE , soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~1 , soc_inst|m0_1|u_logic|W21wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~6 , soc_inst|m0_1|u_logic|W21wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~0 , soc_inst|m0_1|u_logic|Kfawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~1 , soc_inst|m0_1|u_logic|Kfawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G11wx4~1 , soc_inst|m0_1|u_logic|G11wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G11wx4~0 , soc_inst|m0_1|u_logic|G11wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4 , soc_inst|m0_1|u_logic|W21wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~1 , soc_inst|m0_1|u_logic|Qz0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~2 , soc_inst|m0_1|u_logic|Qz0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecowx4 , soc_inst|m0_1|u_logic|Ecowx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[11] , soc_inst|ram_1|saved_word_address[11], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[11]~11 , soc_inst|ram_1|memory.raddr_a[11]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbmvx4~0 , soc_inst|m0_1|u_logic|Rbmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V3o2z4 , soc_inst|m0_1|u_logic|V3o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K3uvx4~0 , soc_inst|m0_1|u_logic|K3uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W2uvx4 , soc_inst|m0_1|u_logic|W2uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aqp2z4 , soc_inst|m0_1|u_logic|Aqp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qrp2z4 , soc_inst|m0_1|u_logic|Qrp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE , soc_inst|m0_1|u_logic|Zad3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~4 , soc_inst|m0_1|u_logic|hwdata_o~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE , soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G10xx4~0 , soc_inst|m0_1|u_logic|G10xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G10xx4~1 , soc_inst|m0_1|u_logic|G10xx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I90xx4~1 , soc_inst|m0_1|u_logic|I90xx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I90xx4~2 , soc_inst|m0_1|u_logic|I90xx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bec3z4 , soc_inst|m0_1|u_logic|Bec3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Okn2z4 , soc_inst|m0_1|u_logic|Okn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X563z4 , soc_inst|m0_1|u_logic|X563z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa03z4 , soc_inst|m0_1|u_logic|Wa03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn33z4 , soc_inst|m0_1|u_logic|Fn33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q713z4 , soc_inst|m0_1|u_logic|Q713z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE , soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~0 , soc_inst|m0_1|u_logic|K4mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~1 , soc_inst|m0_1|u_logic|K4mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw93z4 , soc_inst|m0_1|u_logic|Jw93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wd23z4~feeder , soc_inst|m0_1|u_logic|Wd23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE , soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~2 , soc_inst|m0_1|u_logic|Sh5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cmn2z4 , soc_inst|m0_1|u_logic|Cmn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow43z4 , soc_inst|m0_1|u_logic|Ow43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~1 , soc_inst|m0_1|u_logic|Sh5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~3 , soc_inst|m0_1|u_logic|Sh5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vu93z4 , soc_inst|m0_1|u_logic|Vu93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psv2z4 , soc_inst|m0_1|u_logic|Psv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4~feeder , soc_inst|m0_1|u_logic|Mhn2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4 , soc_inst|m0_1|u_logic|Mhn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~0 , soc_inst|m0_1|u_logic|Q1ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po83z4~feeder , soc_inst|m0_1|u_logic|Po83z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE , soc_inst|m0_1|u_logic|Po83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gju2z4 , soc_inst|m0_1|u_logic|Gju2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf73z4~feeder , soc_inst|m0_1|u_logic|Gf73z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf73z4 , soc_inst|m0_1|u_logic|Gf73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~1 , soc_inst|m0_1|u_logic|Q1ywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4 , soc_inst|m0_1|u_logic|Q1ywx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~0 , soc_inst|m0_1|u_logic|Sh5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[2] , soc_inst|m0_1|u_logic|hwdata_o[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bec3z4~0 , soc_inst|m0_1|u_logic|Bec3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE , soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ckuvx4~0 , soc_inst|m0_1|u_logic|Ckuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F2ivx4~0 , soc_inst|m0_1|u_logic|F2ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pxb3z4 , soc_inst|m0_1|u_logic|Pxb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pguvx4~0 , soc_inst|m0_1|u_logic|Pguvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y1ivx4~0 , soc_inst|m0_1|u_logic|Y1ivx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hub3z4 , soc_inst|m0_1|u_logic|Hub3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~0 , soc_inst|m0_1|u_logic|Ihlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][3] , soc_inst|switches_1|switch_store[0][3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[3]~20 , soc_inst|ram_1|data_to_memory[3]~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~0 , soc_inst|m0_1|u_logic|Ny3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Knvvx4~0 , soc_inst|m0_1|u_logic|Knvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[27]~19 , soc_inst|ram_1|data_to_memory[27]~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[3]~26 , soc_inst|interconnect_1|HRDATA[3]~26, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~1 , soc_inst|m0_1|u_logic|Ihlwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~2 , soc_inst|m0_1|u_logic|Ihlwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~3 , soc_inst|m0_1|u_logic|Ihlwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~0 , soc_inst|m0_1|u_logic|Qfzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~1 , soc_inst|m0_1|u_logic|Qfzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hrcvx4 , soc_inst|m0_1|u_logic|Hrcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdtwx4 , soc_inst|m0_1|u_logic|Qdtwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3z2z4 , soc_inst|m0_1|u_logic|C3z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7cwx4~0 , soc_inst|m0_1|u_logic|T7cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Phlwx4~0 , soc_inst|m0_1|u_logic|Phlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T31xx4~0 , soc_inst|m0_1|u_logic|T31xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5v2z4 , soc_inst|m0_1|u_logic|C5v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvt2z4 , soc_inst|m0_1|u_logic|Tvt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R91xx4~0 , soc_inst|m0_1|u_logic|R91xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~0 , soc_inst|m0_1|u_logic|Eacwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C183z4 , soc_inst|m0_1|u_logic|C183z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Joi3z4 , soc_inst|m0_1|u_logic|Joi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Umi3z4 , soc_inst|m0_1|u_logic|Umi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tr63z4 , soc_inst|m0_1|u_logic|Tr63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~7 , soc_inst|m0_1|u_logic|Eacwx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~8 , soc_inst|m0_1|u_logic|Eacwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vmj2z4~feeder , soc_inst|m0_1|u_logic|Vmj2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vmj2z4 , soc_inst|m0_1|u_logic|Vmj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~4 , soc_inst|m0_1|u_logic|Eacwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jq13z4 , soc_inst|m0_1|u_logic|Jq13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9j2z4 , soc_inst|m0_1|u_logic|F9j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~1 , soc_inst|m0_1|u_logic|Eacwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B943z4 , soc_inst|m0_1|u_logic|B943z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpj2z4 , soc_inst|m0_1|u_logic|Zpj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~2 , soc_inst|m0_1|u_logic|Eacwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sz23z4 , soc_inst|m0_1|u_logic|Sz23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ki53z4 , soc_inst|m0_1|u_logic|Ki53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~3 , soc_inst|m0_1|u_logic|Eacwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE , soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fli3z4 , soc_inst|m0_1|u_logic|Fli3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~5 , soc_inst|m0_1|u_logic|Eacwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~6 , soc_inst|m0_1|u_logic|Eacwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~9 , soc_inst|m0_1|u_logic|Eacwx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rih2z4~0 , soc_inst|m0_1|u_logic|Rih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~61 , soc_inst|m0_1|u_logic|Add3~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~57 , soc_inst|m0_1|u_logic|Add3~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~101 , soc_inst|m0_1|u_logic|Add3~101, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~113 , soc_inst|m0_1|u_logic|Add3~113, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y92wx4 , soc_inst|m0_1|u_logic|Y92wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6j2z4 , soc_inst|m0_1|u_logic|B6j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8ivx4~0 , soc_inst|m0_1|u_logic|K8ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE , soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE , soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qji3z4 , soc_inst|m0_1|u_logic|Qji3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~2 , soc_inst|m0_1|u_logic|P582z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~1 , soc_inst|m0_1|u_logic|P582z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~0 , soc_inst|m0_1|u_logic|P582z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M782z4~0 , soc_inst|m0_1|u_logic|M782z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~3 , soc_inst|m0_1|u_logic|P582z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtnvx4~0 , soc_inst|m0_1|u_logic|Gtnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q9cwx4~0 , soc_inst|m0_1|u_logic|Q9cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ancvx4 , soc_inst|m0_1|u_logic|Ancvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~125 , soc_inst|m0_1|u_logic|Add5~125, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~121 , soc_inst|m0_1|u_logic|Add5~121, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yqzvx4~0 , soc_inst|m0_1|u_logic|Yqzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R3uvx4~0 , soc_inst|m0_1|u_logic|R3uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbmvx4~0 , soc_inst|m0_1|u_logic|Rbmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V3o2z4 , soc_inst|m0_1|u_logic|V3o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owgvx4~0 , soc_inst|m0_1|u_logic|Owgvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ywi2z4 , soc_inst|m0_1|u_logic|Ywi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6mwx4~0 , soc_inst|m0_1|u_logic|Q6mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6n2z4 , soc_inst|m0_1|u_logic|R6n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T83xx4~0 , soc_inst|m0_1|u_logic|T83xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq53z4 , soc_inst|m0_1|u_logic|Dq53z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|L733z4 , soc_inst|m0_1|u_logic|L733z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq53z4~feeder , soc_inst|m0_1|u_logic|Dq53z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE , soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~3 , soc_inst|m0_1|u_logic|Wa0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug43z4 , soc_inst|m0_1|u_logic|Ug43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0n2z4~feeder , soc_inst|m0_1|u_logic|J0n2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0n2z4 , soc_inst|m0_1|u_logic|J0n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~2 , soc_inst|m0_1|u_logic|Wa0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw03z4 , soc_inst|m0_1|u_logic|Pw03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzz2z4 , soc_inst|m0_1|u_logic|Vzz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~4 , soc_inst|m0_1|u_logic|Wa0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1n2z4 , soc_inst|m0_1|u_logic|Y1n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~1 , soc_inst|m0_1|u_logic|Wa0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy13z4 , soc_inst|m0_1|u_logic|Cy13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6n2z4 , soc_inst|m0_1|u_logic|R6n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T83xx4~0 , soc_inst|m0_1|u_logic|T83xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N3n2z4 , soc_inst|m0_1|u_logic|N3n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy13z4 , soc_inst|m0_1|u_logic|Cy13z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~0 , soc_inst|m0_1|u_logic|Wa0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~5 , soc_inst|m0_1|u_logic|Wa0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4 , soc_inst|m0_1|u_logic|Wa0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[22]~3 , soc_inst|m0_1|u_logic|hwdata_o[22]~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K3uvx4~0 , soc_inst|m0_1|u_logic|K3uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W2uvx4 , soc_inst|m0_1|u_logic|W2uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X9n2z4 , soc_inst|m0_1|u_logic|X9n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~0 , soc_inst|m0_1|u_logic|Yhnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~113 , soc_inst|m0_1|u_logic|Add2~113, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~77 , soc_inst|m0_1|u_logic|Add2~77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~29 , soc_inst|m0_1|u_logic|Add2~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~21 , soc_inst|m0_1|u_logic|Add2~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~9 , soc_inst|m0_1|u_logic|Add2~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~13 , soc_inst|m0_1|u_logic|Add2~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~0 , soc_inst|m0_1|u_logic|Mhhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~1 , soc_inst|m0_1|u_logic|Mhhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~2 , soc_inst|m0_1|u_logic|Mhhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vvx2z4 , soc_inst|m0_1|u_logic|Vvx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~1 , soc_inst|m0_1|u_logic|Yhnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cqo2z4 , soc_inst|m0_1|u_logic|Cqo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq73z4 , soc_inst|m0_1|u_logic|Dq73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~2 , soc_inst|m0_1|u_logic|Duuwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ruj2z4 , soc_inst|m0_1|u_logic|Ruj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE , soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~0 , soc_inst|m0_1|u_logic|Duuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fwj2z4 , soc_inst|m0_1|u_logic|Fwj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~1 , soc_inst|m0_1|u_logic|Duuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4 , soc_inst|m0_1|u_logic|Dtj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~3 , soc_inst|m0_1|u_logic|Duuwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4 , soc_inst|m0_1|u_logic|Duuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvu2z4 , soc_inst|m0_1|u_logic|Rvu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~3 , soc_inst|m0_1|u_logic|Cawwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Unm2z4 , soc_inst|m0_1|u_logic|Unm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4~feeder , soc_inst|m0_1|u_logic|Gmm2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~1 , soc_inst|m0_1|u_logic|Cawwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ii63z4 , soc_inst|m0_1|u_logic|Ii63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skm2z4 , soc_inst|m0_1|u_logic|Skm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~0 , soc_inst|m0_1|u_logic|Cawwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr73z4 , soc_inst|m0_1|u_logic|Rr73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~2 , soc_inst|m0_1|u_logic|Cawwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4 , soc_inst|m0_1|u_logic|Cawwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~0 , soc_inst|m0_1|u_logic|Jiowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fxu2z4 , soc_inst|m0_1|u_logic|Fxu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~3 , soc_inst|m0_1|u_logic|Saqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE , soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rro2z4~feeder , soc_inst|m0_1|u_logic|Rro2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rro2z4 , soc_inst|m0_1|u_logic|Rro2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~1 , soc_inst|m0_1|u_logic|Saqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnt2z4 , soc_inst|m0_1|u_logic|Wnt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~2 , soc_inst|m0_1|u_logic|Saqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj63z4~feeder , soc_inst|m0_1|u_logic|Wj63z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj63z4 , soc_inst|m0_1|u_logic|Wj63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vuo2z4 , soc_inst|m0_1|u_logic|Vuo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~0 , soc_inst|m0_1|u_logic|Saqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4 , soc_inst|m0_1|u_logic|Saqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~0 , soc_inst|m0_1|u_logic|Kepwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~1 , soc_inst|m0_1|u_logic|Kepwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~0 , soc_inst|m0_1|u_logic|Qmdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~0 , soc_inst|m0_1|u_logic|Xmdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~1 , soc_inst|m0_1|u_logic|Xmdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7ewx4~0 , soc_inst|m0_1|u_logic|J7ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2uvx4~0 , soc_inst|m0_1|u_logic|I2uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1a3z4 , soc_inst|m0_1|u_logic|B1a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Repwx4~0 , soc_inst|m0_1|u_logic|Repwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jxs2z4 , soc_inst|m0_1|u_logic|Jxs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aqp2z4 , soc_inst|m0_1|u_logic|Aqp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Repwx4~1 , soc_inst|m0_1|u_logic|Repwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lns2z4 , soc_inst|m0_1|u_logic|Lns2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L0uvx4 , soc_inst|m0_1|u_logic|L0uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6l2z4 , soc_inst|m0_1|u_logic|Q6l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Repwx4~2 , soc_inst|m0_1|u_logic|Repwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ncpwx4~0 , soc_inst|m0_1|u_logic|Ncpwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9iwx4~0 , soc_inst|m0_1|u_logic|A9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mof3z4 , soc_inst|m0_1|u_logic|Mof3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmf3z4 , soc_inst|m0_1|u_logic|Xmf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~3 , soc_inst|m0_1|u_logic|Icxwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bqf3z4 , soc_inst|m0_1|u_logic|Bqf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ldf3z4 , soc_inst|m0_1|u_logic|Ldf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~2 , soc_inst|m0_1|u_logic|Icxwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aff3z4 , soc_inst|m0_1|u_logic|Aff3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~0 , soc_inst|m0_1|u_logic|Icxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wbf3z4 , soc_inst|m0_1|u_logic|Wbf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Orj2z4 , soc_inst|m0_1|u_logic|Orj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~1 , soc_inst|m0_1|u_logic|Icxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4 , soc_inst|m0_1|u_logic|Icxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~57 , soc_inst|m0_1|u_logic|Add3~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~101 , soc_inst|m0_1|u_logic|Add3~101, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5n2z4 , soc_inst|m0_1|u_logic|C5n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj82z4~0 , soc_inst|m0_1|u_logic|Wj82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq53z4 , soc_inst|m0_1|u_logic|Dq53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ug43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~0 , soc_inst|m0_1|u_logic|Zh82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~1 , soc_inst|m0_1|u_logic|Zh82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzz2z4 , soc_inst|m0_1|u_logic|Vzz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw03z4 , soc_inst|m0_1|u_logic|Pw03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~2 , soc_inst|m0_1|u_logic|Zh82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~3 , soc_inst|m0_1|u_logic|Zh82z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N90wx4~0 , soc_inst|m0_1|u_logic|N90wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E5awx4~0 , soc_inst|m0_1|u_logic|E5awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V883z4 , soc_inst|m0_1|u_logic|V883z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Md93z4 , soc_inst|m0_1|u_logic|Md93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~1 , soc_inst|m0_1|u_logic|G4qwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcv2z4 , soc_inst|m0_1|u_logic|Vcv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~3 , soc_inst|m0_1|u_logic|G4qwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mz63z4 , soc_inst|m0_1|u_logic|Mz63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~0 , soc_inst|m0_1|u_logic|G4qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~6 , soc_inst|m0_1|u_logic|Wa0wx4~6, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|M3u2z4 , soc_inst|m0_1|u_logic|M3u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~2 , soc_inst|m0_1|u_logic|G4qwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4 , soc_inst|m0_1|u_logic|G4qwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~0 , soc_inst|m0_1|u_logic|Asdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~0 , soc_inst|m0_1|u_logic|Nvdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~1 , soc_inst|m0_1|u_logic|Asdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpt2z4 , soc_inst|m0_1|u_logic|Lpt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE , soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~2 , soc_inst|m0_1|u_logic|Eruwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw83z4 , soc_inst|m0_1|u_logic|Jw83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fio2z4 , soc_inst|m0_1|u_logic|Fio2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~1 , soc_inst|m0_1|u_logic|Eruwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4~feeder , soc_inst|m0_1|u_logic|Ujo2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4 , soc_inst|m0_1|u_logic|Ujo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uyu2z4 , soc_inst|m0_1|u_logic|Uyu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~3 , soc_inst|m0_1|u_logic|Eruwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll63z4~feeder , soc_inst|m0_1|u_logic|Ll63z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll63z4 , soc_inst|m0_1|u_logic|Ll63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~0 , soc_inst|m0_1|u_logic|Eruwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4 , soc_inst|m0_1|u_logic|Eruwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kjk2z4 , soc_inst|m0_1|u_logic|Kjk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkk2z4 , soc_inst|m0_1|u_logic|Zkk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~0 , soc_inst|m0_1|u_logic|F8wwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rht2z4 , soc_inst|m0_1|u_logic|Rht2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd63z4~feeder , soc_inst|m0_1|u_logic|Rd63z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE , soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An73z4 , soc_inst|m0_1|u_logic|An73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~1 , soc_inst|m0_1|u_logic|F8wwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8wwx4 , soc_inst|m0_1|u_logic|F8wwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Beowx4~0 , soc_inst|m0_1|u_logic|Beowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V0k2z4 , soc_inst|m0_1|u_logic|V0k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K2k2z4 , soc_inst|m0_1|u_logic|K2k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1v2z4 , soc_inst|m0_1|u_logic|Y1v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nz83z4 , soc_inst|m0_1|u_logic|Nz83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~0 , soc_inst|m0_1|u_logic|Feqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pst2z4 , soc_inst|m0_1|u_logic|Pst2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z3k2z4 , soc_inst|m0_1|u_logic|Z3k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po63z4 , soc_inst|m0_1|u_logic|Po63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE , soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~1 , soc_inst|m0_1|u_logic|Feqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Feqwx4 , soc_inst|m0_1|u_logic|Feqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgq2z4 , soc_inst|m0_1|u_logic|Vgq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0v2z4 , soc_inst|m0_1|u_logic|J0v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx83z4 , soc_inst|m0_1|u_logic|Yx83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~0 , soc_inst|m0_1|u_logic|Fexwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kiq2z4 , soc_inst|m0_1|u_logic|Kiq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An63z4~DUPLICATE , soc_inst|m0_1|u_logic|An63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Art2z4 , soc_inst|m0_1|u_logic|Art2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw73z4 , soc_inst|m0_1|u_logic|Jw73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~1 , soc_inst|m0_1|u_logic|Fexwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fexwx4 , soc_inst|m0_1|u_logic|Fexwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~0 , soc_inst|m0_1|u_logic|Zudwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~1 , soc_inst|m0_1|u_logic|Zudwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE , soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bus2z4 , soc_inst|m0_1|u_logic|Bus2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avowx4~0 , soc_inst|m0_1|u_logic|Avowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G8n2z4 , soc_inst|m0_1|u_logic|G8n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dks2z4 , soc_inst|m0_1|u_logic|Dks2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avowx4~1 , soc_inst|m0_1|u_logic|Avowx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avowx4~2 , soc_inst|m0_1|u_logic|Avowx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ddi3z4 , soc_inst|m0_1|u_logic|Ddi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[20]~16 , soc_inst|m0_1|u_logic|hwdata_o[20]~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I1h3z4 , soc_inst|m0_1|u_logic|I1h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F473z4 , soc_inst|m0_1|u_logic|F473z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fi93z4 , soc_inst|m0_1|u_logic|Fi93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~6 , soc_inst|m0_1|u_logic|St0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvn2z4 , soc_inst|m0_1|u_logic|Tvn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Od83z4 , soc_inst|m0_1|u_logic|Od83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE , soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohv2z4 , soc_inst|m0_1|u_logic|Ohv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~7 , soc_inst|m0_1|u_logic|St0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~8 , soc_inst|m0_1|u_logic|St0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4 , soc_inst|m0_1|u_logic|St0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[18]~13 , soc_inst|m0_1|u_logic|hwdata_o[18]~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xyn2z4 , soc_inst|m0_1|u_logic|Xyn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~1 , soc_inst|m0_1|u_logic|Add0~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~73 , soc_inst|m0_1|u_logic|Add0~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sg83z4 , soc_inst|m0_1|u_logic|Sg83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z52xx4~0 , soc_inst|m0_1|u_logic|Z52xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cao2z4 , soc_inst|m0_1|u_logic|Cao2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J773z4 , soc_inst|m0_1|u_logic|J773z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE , soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~7 , soc_inst|m0_1|u_logic|W21wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~8 , soc_inst|m0_1|u_logic|W21wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4 , soc_inst|m0_1|u_logic|W21wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O24wx4~0 , soc_inst|m0_1|u_logic|O24wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gdo2z4 , soc_inst|m0_1|u_logic|Gdo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Womvx4~0 , soc_inst|m0_1|u_logic|Womvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xeo2z4 , soc_inst|m0_1|u_logic|Xeo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~29 , soc_inst|m0_1|u_logic|Add0~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~85 , soc_inst|m0_1|u_logic|Add3~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vcv2z4 , soc_inst|m0_1|u_logic|Vcv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~7 , soc_inst|m0_1|u_logic|Wa0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~8 , soc_inst|m0_1|u_logic|Wa0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E5awx4~1 , soc_inst|m0_1|u_logic|E5awx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K1z2z4 , soc_inst|m0_1|u_logic|K1z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6awx4~0 , soc_inst|m0_1|u_logic|U6awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ka83z4 , soc_inst|m0_1|u_logic|Ka83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~7 , soc_inst|m0_1|u_logic|Ce0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebh3z4 , soc_inst|m0_1|u_logic|Ebh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B173z4 , soc_inst|m0_1|u_logic|B173z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~6 , soc_inst|m0_1|u_logic|Ce0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~8 , soc_inst|m0_1|u_logic|Ce0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6awx4~1 , soc_inst|m0_1|u_logic|U6awx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9awx4~0 , soc_inst|m0_1|u_logic|M9awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rdg3z4 , soc_inst|m0_1|u_logic|Rdg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gfg3z4 , soc_inst|m0_1|u_logic|Gfg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nag3z4 , soc_inst|m0_1|u_logic|Nag3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~6 , soc_inst|m0_1|u_logic|Hk0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hqg3z4 , soc_inst|m0_1|u_logic|Hqg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dng3z4 , soc_inst|m0_1|u_logic|Dng3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~7 , soc_inst|m0_1|u_logic|Hk0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~8 , soc_inst|m0_1|u_logic|Hk0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kig3z4 , soc_inst|m0_1|u_logic|Kig3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4 , soc_inst|m0_1|u_logic|Ccg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~2 , soc_inst|m0_1|u_logic|Hk0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Olg3z4 , soc_inst|m0_1|u_logic|Olg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~0 , soc_inst|m0_1|u_logic|Hk0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~3 , soc_inst|m0_1|u_logic|Hk0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyg3z4 , soc_inst|m0_1|u_logic|Eyg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xi2xx4~0 , soc_inst|m0_1|u_logic|Xi2xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avg3z4~feeder , soc_inst|m0_1|u_logic|Avg3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avg3z4 , soc_inst|m0_1|u_logic|Avg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ltg3z4 , soc_inst|m0_1|u_logic|Ltg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~4 , soc_inst|m0_1|u_logic|Hk0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE , soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~61 , soc_inst|m0_1|u_logic|Add3~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~0 , soc_inst|m0_1|u_logic|Oaawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht53z4 , soc_inst|m0_1|u_logic|Ht53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pa33z4 , soc_inst|m0_1|u_logic|Pa33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~3 , soc_inst|m0_1|u_logic|Nn0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj43z4 , soc_inst|m0_1|u_logic|Yj43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9p2z4 , soc_inst|m0_1|u_logic|A9p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~2 , soc_inst|m0_1|u_logic|Nn0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixh3z4 , soc_inst|m0_1|u_logic|Ixh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvh3z4 , soc_inst|m0_1|u_logic|Tvh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~4 , soc_inst|m0_1|u_logic|Nn0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M0i3z4 , soc_inst|m0_1|u_logic|M0i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nr2xx4~0 , soc_inst|m0_1|u_logic|Nr2xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~1 , soc_inst|m0_1|u_logic|Nn0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G123z4 , soc_inst|m0_1|u_logic|G123z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecp2z4 , soc_inst|m0_1|u_logic|Ecp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~0 , soc_inst|m0_1|u_logic|Nn0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~5 , soc_inst|m0_1|u_logic|Nn0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qg93z4 , soc_inst|m0_1|u_logic|Qg93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q273z4 , soc_inst|m0_1|u_logic|Q273z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~6 , soc_inst|m0_1|u_logic|Nn0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE , soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xyh3z4 , soc_inst|m0_1|u_logic|Xyh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6u2z4 , soc_inst|m0_1|u_logic|Q6u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zfv2z4 , soc_inst|m0_1|u_logic|Zfv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~7 , soc_inst|m0_1|u_logic|Nn0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~8 , soc_inst|m0_1|u_logic|Nn0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~1 , soc_inst|m0_1|u_logic|Oaawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey03z4 , soc_inst|m0_1|u_logic|Ey03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K103z4~DUPLICATE , soc_inst|m0_1|u_logic|K103z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~4 , soc_inst|m0_1|u_logic|St0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nl43z4 , soc_inst|m0_1|u_logic|Nl43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arn2z4 , soc_inst|m0_1|u_logic|Arn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~2 , soc_inst|m0_1|u_logic|St0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec33z4 , soc_inst|m0_1|u_logic|Ec33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu53z4 , soc_inst|m0_1|u_logic|Wu53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~3 , soc_inst|m0_1|u_logic|St0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psn2z4 , soc_inst|m0_1|u_logic|Psn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df83z4 , soc_inst|m0_1|u_logic|Df83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D1p2z4~feeder , soc_inst|m0_1|u_logic|D1p2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE , soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uj93z4 , soc_inst|m0_1|u_logic|Uj93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U573z4~feeder , soc_inst|m0_1|u_logic|U573z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U573z4 , soc_inst|m0_1|u_logic|U573z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~6 , soc_inst|m0_1|u_logic|Yw0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE , soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~7 , soc_inst|m0_1|u_logic|Yw0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~8 , soc_inst|m0_1|u_logic|Yw0wx4~8, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gdawx4~0 , soc_inst|m0_1|u_logic|Gdawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K423z4 , soc_inst|m0_1|u_logic|K423z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ozo2z4 , soc_inst|m0_1|u_logic|Ozo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~0 , soc_inst|m0_1|u_logic|Yw0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE , soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M92xx4~0 , soc_inst|m0_1|u_logic|M92xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lw53z4 , soc_inst|m0_1|u_logic|Lw53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE , soc_inst|m0_1|u_logic|Td33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~3 , soc_inst|m0_1|u_logic|Yw0wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Tz03z4 , soc_inst|m0_1|u_logic|Tz03z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z203z4~feeder , soc_inst|m0_1|u_logic|Z203z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z203z4 , soc_inst|m0_1|u_logic|Z203z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~4 , soc_inst|m0_1|u_logic|Yw0wx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zxo2z4 , soc_inst|m0_1|u_logic|Zxo2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~1 , soc_inst|m0_1|u_logic|Yw0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cn43z4~feeder , soc_inst|m0_1|u_logic|Cn43z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cn43z4 , soc_inst|m0_1|u_logic|Cn43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4~feeder , soc_inst|m0_1|u_logic|Kwo2z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4 , soc_inst|m0_1|u_logic|Kwo2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~2 , soc_inst|m0_1|u_logic|Yw0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Td33z4 , soc_inst|m0_1|u_logic|Td33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lw53z4 , soc_inst|m0_1|u_logic|Lw53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~3 , soc_inst|m0_1|u_logic|Yw0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ozo2z4~feeder , soc_inst|m0_1|u_logic|Ozo2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ozo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ozo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K423z4~feeder , soc_inst|m0_1|u_logic|K423z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K423z4 , soc_inst|m0_1|u_logic|K423z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~0 , soc_inst|m0_1|u_logic|Yw0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S2p2z4~feeder , soc_inst|m0_1|u_logic|S2p2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S2p2z4 , soc_inst|m0_1|u_logic|S2p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M92xx4~0 , soc_inst|m0_1|u_logic|M92xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~5 , soc_inst|m0_1|u_logic|Yw0wx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gdawx4~1 , soc_inst|m0_1|u_logic|Gdawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~93 , soc_inst|m0_1|u_logic|Add3~93, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~97 , soc_inst|m0_1|u_logic|Add3~97, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~4 , soc_inst|m0_1|u_logic|haddr_o~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdjvx4~0 , soc_inst|m0_1|u_logic|Pdjvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7q2z4 , soc_inst|m0_1|u_logic|J7q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psh3z4 , soc_inst|m0_1|u_logic|Psh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi23z4 , soc_inst|m0_1|u_logic|Mi23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ft83z4 , soc_inst|m0_1|u_logic|Ft83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr33z4 , soc_inst|m0_1|u_logic|Vr33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~7 , soc_inst|m0_1|u_logic|Z62wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Naq2z4~feeder , soc_inst|m0_1|u_logic|Naq2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj73z4 , soc_inst|m0_1|u_logic|Wj73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~6 , soc_inst|m0_1|u_logic|Z62wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~8 , soc_inst|m0_1|u_logic|Z62wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arh3z4 , soc_inst|m0_1|u_logic|Arh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~3 , soc_inst|m0_1|u_logic|Z62wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnu2z4 , soc_inst|m0_1|u_logic|Wnu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rdq2z4 , soc_inst|m0_1|u_logic|Rdq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~4 , soc_inst|m0_1|u_logic|Z62wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na63z4 , soc_inst|m0_1|u_logic|Na63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~1 , soc_inst|m0_1|u_logic|Z62wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E153z4~DUPLICATE , soc_inst|m0_1|u_logic|E153z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lph3z4~feeder , soc_inst|m0_1|u_logic|Lph3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lph3z4 , soc_inst|m0_1|u_logic|Lph3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~2 , soc_inst|m0_1|u_logic|Z62wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T04xx4~0 , soc_inst|m0_1|u_logic|T04xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccq2z4 , soc_inst|m0_1|u_logic|Ccq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~0 , soc_inst|m0_1|u_logic|Z62wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~5 , soc_inst|m0_1|u_logic|Z62wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4 , soc_inst|m0_1|u_logic|Z62wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~0 , soc_inst|m0_1|u_logic|Ns9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~1 , soc_inst|m0_1|u_logic|Ns9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N72wx4~0 , soc_inst|m0_1|u_logic|N72wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mgawx4~0 , soc_inst|m0_1|u_logic|Mgawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J61wx4~1 , soc_inst|m0_1|u_logic|J61wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J61wx4~0 , soc_inst|m0_1|u_logic|J61wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O51wx4~0 , soc_inst|m0_1|u_logic|O51wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M41wx4~0 , soc_inst|m0_1|u_logic|M41wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE , soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~2 , soc_inst|m0_1|u_logic|Ai9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Snd3z4 , soc_inst|m0_1|u_logic|Snd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~1 , soc_inst|m0_1|u_logic|Ai9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5e3z4 , soc_inst|m0_1|u_logic|B5e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~0 , soc_inst|m0_1|u_logic|Ai9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE , soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~3 , soc_inst|m0_1|u_logic|Ai9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4 , soc_inst|m0_1|u_logic|Ai9wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~0 , soc_inst|m0_1|u_logic|Sndwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~0 , soc_inst|m0_1|u_logic|C0ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~1 , soc_inst|m0_1|u_logic|Sndwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~0 , soc_inst|m0_1|u_logic|Tkdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Godwx4~0 , soc_inst|m0_1|u_logic|Godwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~1 , soc_inst|m0_1|u_logic|Tkdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J9d3z4 , soc_inst|m0_1|u_logic|J9d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xdb3z4 , soc_inst|m0_1|u_logic|Xdb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7b3z4 , soc_inst|m0_1|u_logic|J7b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gcb3z4 , soc_inst|m0_1|u_logic|Gcb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pab3z4~feeder , soc_inst|m0_1|u_logic|Pab3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pab3z4 , soc_inst|m0_1|u_logic|Pab3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4~0 , soc_inst|m0_1|u_logic|Jkc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4 , soc_inst|m0_1|u_logic|Jkc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jruvx4~0 , soc_inst|m0_1|u_logic|Jruvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE , soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D1ivx4~0 , soc_inst|m0_1|u_logic|D1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4c3z4 , soc_inst|m0_1|u_logic|F4c3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~0 , soc_inst|m0_1|u_logic|Wkpwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~1 , soc_inst|m0_1|u_logic|Wkpwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~2 , soc_inst|m0_1|u_logic|Wkpwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~3 , soc_inst|m0_1|u_logic|Wkpwx4~3, de1_soc_wrapper, 1
-instance = comp, \SW[6]~input , SW[6]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][6]~feeder , soc_inst|switches_1|switch_store[0][6]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][6] , soc_inst|switches_1|switch_store[0][6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~36 , soc_inst|interconnect_1|HRDATA[6]~36, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~0 , soc_inst|m0_1|u_logic|O9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~1 , soc_inst|m0_1|u_logic|O9iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X61wx4~0 , soc_inst|m0_1|u_logic|X61wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X61wx4~1 , soc_inst|m0_1|u_logic|X61wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M41wx4~1 , soc_inst|m0_1|u_logic|M41wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y873z4~feeder , soc_inst|m0_1|u_logic|Y873z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y873z4 , soc_inst|m0_1|u_logic|Y873z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4q2z4 , soc_inst|m0_1|u_logic|F4q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O723z4~feeder , soc_inst|m0_1|u_logic|O723z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O723z4~DUPLICATE , soc_inst|m0_1|u_logic|O723z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gq43z4 , soc_inst|m0_1|u_logic|Gq43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~6 , soc_inst|m0_1|u_logic|S71wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pz53z4~feeder , soc_inst|m0_1|u_logic|Pz53z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pz53z4 , soc_inst|m0_1|u_logic|Pz53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~7 , soc_inst|m0_1|u_logic|S71wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~8 , soc_inst|m0_1|u_logic|S71wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mgawx4~1 , soc_inst|m0_1|u_logic|Mgawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~61 , soc_inst|m0_1|u_logic|Add5~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~65 , soc_inst|m0_1|u_logic|Add5~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~0 , soc_inst|m0_1|u_logic|Q52wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~1 , soc_inst|m0_1|u_logic|Q52wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0d3z4 , soc_inst|m0_1|u_logic|E0d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Naq2z4 , soc_inst|m0_1|u_logic|Naq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~1 , soc_inst|m0_1|u_logic|Ey9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~0 , soc_inst|m0_1|u_logic|Ey9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~2 , soc_inst|m0_1|u_logic|Ey9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fxv2z4 , soc_inst|m0_1|u_logic|Fxv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~3 , soc_inst|m0_1|u_logic|Ey9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4 , soc_inst|m0_1|u_logic|Ey9wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Euh3z4 , soc_inst|m0_1|u_logic|Euh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E153z4 , soc_inst|m0_1|u_logic|E153z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE , soc_inst|m0_1|u_logic|Na63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~0 , soc_inst|m0_1|u_logic|Du9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~2 , soc_inst|m0_1|u_logic|Du9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aw9wx4~0 , soc_inst|m0_1|u_logic|Aw9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~1 , soc_inst|m0_1|u_logic|Du9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~3 , soc_inst|m0_1|u_logic|Du9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P82wx4~0 , soc_inst|m0_1|u_logic|P82wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~3 , soc_inst|m0_1|u_logic|haddr_o~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zcivx4~0 , soc_inst|m0_1|u_logic|Zcivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y8q2z4 , soc_inst|m0_1|u_logic|Y8q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|If33z4 , soc_inst|m0_1|u_logic|If33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z523z4 , soc_inst|m0_1|u_logic|Z523z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~1 , soc_inst|m0_1|u_logic|Kq92z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4 , soc_inst|m0_1|u_logic|Rbo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ay53z4 , soc_inst|m0_1|u_logic|Ay53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ro43z4 , soc_inst|m0_1|u_logic|Ro43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~0 , soc_inst|m0_1|u_logic|Kq92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O403z4~DUPLICATE , soc_inst|m0_1|u_logic|O403z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I113z4 , soc_inst|m0_1|u_logic|I113z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~2 , soc_inst|m0_1|u_logic|Kq92z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hs92z4~0 , soc_inst|m0_1|u_logic|Hs92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~3 , soc_inst|m0_1|u_logic|Kq92z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U11wx4~0 , soc_inst|m0_1|u_logic|U11wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~69 , soc_inst|m0_1|u_logic|Add5~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~73 , soc_inst|m0_1|u_logic|Add5~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bv0wx4 , soc_inst|m0_1|u_logic|Bv0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tmjvx4~0 , soc_inst|m0_1|u_logic|Tmjvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H4p2z4 , soc_inst|m0_1|u_logic|H4p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9u2z4 , soc_inst|m0_1|u_logic|U9u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE , soc_inst|m0_1|u_logic|Df83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U573z4~DUPLICATE , soc_inst|m0_1|u_logic|U573z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~1 , soc_inst|m0_1|u_logic|Xcuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djv2z4 , soc_inst|m0_1|u_logic|Djv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE , soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~0 , soc_inst|m0_1|u_logic|Xcuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4 , soc_inst|m0_1|u_logic|Xcuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~0 , soc_inst|m0_1|u_logic|Yj92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S2p2z4 , soc_inst|m0_1|u_logic|S2p2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|D1p2z4 , soc_inst|m0_1|u_logic|D1p2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vl92z4~0 , soc_inst|m0_1|u_logic|Vl92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K423z4~DUPLICATE , soc_inst|m0_1|u_logic|K423z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Td33z4 , soc_inst|m0_1|u_logic|Td33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~0 , soc_inst|m0_1|u_logic|Yj92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE , soc_inst|m0_1|u_logic|Td33z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~1 , soc_inst|m0_1|u_logic|Yj92z4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~2 , soc_inst|m0_1|u_logic|Yj92z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~3 , soc_inst|m0_1|u_logic|Yj92z4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hy0wx4~0 , soc_inst|m0_1|u_logic|Hy0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fx0wx4~0 , soc_inst|m0_1|u_logic|Fx0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~1 , soc_inst|m0_1|u_logic|Iv0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~0 , soc_inst|m0_1|u_logic|Iv0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df83z4 , soc_inst|m0_1|u_logic|Df83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE , soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~7 , soc_inst|m0_1|u_logic|Yw0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE , soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uj93z4 , soc_inst|m0_1|u_logic|Uj93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U573z4 , soc_inst|m0_1|u_logic|U573z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~6 , soc_inst|m0_1|u_logic|Yw0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~8 , soc_inst|m0_1|u_logic|Yw0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4 , soc_inst|m0_1|u_logic|Yw0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[17]~17 , soc_inst|m0_1|u_logic|hwdata_o[17]~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B2i3z4 , soc_inst|m0_1|u_logic|B2i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pomvx4~0 , soc_inst|m0_1|u_logic|Pomvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3i3z4 , soc_inst|m0_1|u_logic|S3i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~17 , soc_inst|m0_1|u_logic|Add0~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iomvx4~0 , soc_inst|m0_1|u_logic|Iomvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O0o2z4 , soc_inst|m0_1|u_logic|O0o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~53 , soc_inst|m0_1|u_logic|Add0~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~45 , soc_inst|m0_1|u_logic|Add0~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Unmvx4~0 , soc_inst|m0_1|u_logic|Unmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z2h3z4 , soc_inst|m0_1|u_logic|Z2h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~69 , soc_inst|m0_1|u_logic|Add0~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Llq2z4 , soc_inst|m0_1|u_logic|Llq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Poq2z4 , soc_inst|m0_1|u_logic|Poq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~1 , soc_inst|m0_1|u_logic|Ce0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rz13z4 , soc_inst|m0_1|u_logic|Rz13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~0 , soc_inst|m0_1|u_logic|Ce0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ji43z4 , soc_inst|m0_1|u_logic|Ji43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~2 , soc_inst|m0_1|u_logic|Ce0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D03xx4~0 , soc_inst|m0_1|u_logic|D03xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A933z4 , soc_inst|m0_1|u_logic|A933z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sr53z4 , soc_inst|m0_1|u_logic|Sr53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~3 , soc_inst|m0_1|u_logic|Ce0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P9h3z4 , soc_inst|m0_1|u_logic|P9h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A8h3z4 , soc_inst|m0_1|u_logic|A8h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~4 , soc_inst|m0_1|u_logic|Ce0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~5 , soc_inst|m0_1|u_logic|Ce0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5u2z4 , soc_inst|m0_1|u_logic|B5u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~7 , soc_inst|m0_1|u_logic|Ce0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ka83z4 , soc_inst|m0_1|u_logic|Ka83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B173z4 , soc_inst|m0_1|u_logic|B173z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bf93z4 , soc_inst|m0_1|u_logic|Bf93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~6 , soc_inst|m0_1|u_logic|Ce0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebh3z4 , soc_inst|m0_1|u_logic|Ebh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~8 , soc_inst|m0_1|u_logic|Ce0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4 , soc_inst|m0_1|u_logic|Ce0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[21]~15 , soc_inst|m0_1|u_logic|hwdata_o[21]~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ieh3z4 , soc_inst|m0_1|u_logic|Ieh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nnmvx4~0 , soc_inst|m0_1|u_logic|Nnmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ogo2z4 , soc_inst|m0_1|u_logic|Ogo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~85 , soc_inst|m0_1|u_logic|Add0~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cma3z4~0 , soc_inst|m0_1|u_logic|Cma3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cma3z4 , soc_inst|m0_1|u_logic|Cma3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gnmvx4~0 , soc_inst|m0_1|u_logic|Gnmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~0 , soc_inst|m0_1|u_logic|Y7iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~1 , soc_inst|m0_1|u_logic|Y7iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~2 , soc_inst|m0_1|u_logic|Y7iwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E9zvx4~0 , soc_inst|m0_1|u_logic|E9zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E9zvx4~1 , soc_inst|m0_1|u_logic|E9zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~0 , soc_inst|m0_1|u_logic|E1ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~1 , soc_inst|m0_1|u_logic|E1ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~0 , soc_inst|m0_1|u_logic|Kqdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~1 , soc_inst|m0_1|u_logic|Wwdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~0 , soc_inst|m0_1|u_logic|Z78wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4~feeder , soc_inst|m0_1|u_logic|Ycu2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4 , soc_inst|m0_1|u_logic|Ycu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hi83z4 , soc_inst|m0_1|u_logic|Hi83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~2 , soc_inst|m0_1|u_logic|Hmqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1q2z4 , soc_inst|m0_1|u_logic|B1q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmv2z4 , soc_inst|m0_1|u_logic|Hmv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~3 , soc_inst|m0_1|u_logic|Hmqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~0 , soc_inst|m0_1|u_logic|Hmqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mzp2z4 , soc_inst|m0_1|u_logic|Mzp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|No93z4 , soc_inst|m0_1|u_logic|No93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~1 , soc_inst|m0_1|u_logic|Hmqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4 , soc_inst|m0_1|u_logic|Hmqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~0 , soc_inst|m0_1|u_logic|Mydwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~1 , soc_inst|m0_1|u_logic|C0ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~0 , soc_inst|m0_1|u_logic|Zndwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzdwx4~0 , soc_inst|m0_1|u_logic|Vzdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzdwx4~1 , soc_inst|m0_1|u_logic|Vzdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~1 , soc_inst|m0_1|u_logic|Zndwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~0 , soc_inst|m0_1|u_logic|Djdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~2 , soc_inst|m0_1|u_logic|Wwdwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~1 , soc_inst|m0_1|u_logic|Mydwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~1 , soc_inst|m0_1|u_logic|Yxdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~2 , soc_inst|m0_1|u_logic|D9uwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Anq2z4 , soc_inst|m0_1|u_logic|Anq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~1 , soc_inst|m0_1|u_logic|D9uwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kev2z4 , soc_inst|m0_1|u_logic|Kev2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~3 , soc_inst|m0_1|u_logic|D9uwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eqq2z4 , soc_inst|m0_1|u_logic|Eqq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~0 , soc_inst|m0_1|u_logic|D9uwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4 , soc_inst|m0_1|u_logic|D9uwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~0 , soc_inst|m0_1|u_logic|Qtdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~1 , soc_inst|m0_1|u_logic|Qtdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tq7wx4~0 , soc_inst|m0_1|u_logic|Tq7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Godwx4~1 , soc_inst|m0_1|u_logic|Godwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S08wx4~0 , soc_inst|m0_1|u_logic|S08wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~0 , soc_inst|m0_1|u_logic|Wwdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~1 , soc_inst|m0_1|u_logic|Z78wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~4 , soc_inst|m0_1|u_logic|Z78wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~1 , soc_inst|m0_1|u_logic|Qmdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~3 , soc_inst|m0_1|u_logic|Djdwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Widwx4~0 , soc_inst|m0_1|u_logic|Widwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~1 , soc_inst|m0_1|u_logic|Jiowx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B28wx4~0 , soc_inst|m0_1|u_logic|B28wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~1 , soc_inst|m0_1|u_logic|Fkdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fq7wx4~0 , soc_inst|m0_1|u_logic|Fq7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~1 , soc_inst|m0_1|u_logic|Djdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~2 , soc_inst|m0_1|u_logic|Djdwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~3 , soc_inst|m0_1|u_logic|Z78wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~1 , soc_inst|m0_1|u_logic|Nvdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~1 , soc_inst|m0_1|u_logic|Uvdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~2 , soc_inst|m0_1|u_logic|Kqdwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dqdwx4~0 , soc_inst|m0_1|u_logic|Dqdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~0 , soc_inst|m0_1|u_logic|Xtdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~1 , soc_inst|m0_1|u_logic|Xtdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~3 , soc_inst|m0_1|u_logic|Kqdwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U18wx4~0 , soc_inst|m0_1|u_logic|U18wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yvtwx4~0 , soc_inst|m0_1|u_logic|Yvtwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fwtwx4~0 , soc_inst|m0_1|u_logic|Fwtwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~0 , soc_inst|m0_1|u_logic|Xs7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~1 , soc_inst|m0_1|u_logic|Xs7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~1 , soc_inst|m0_1|u_logic|Kqdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~2 , soc_inst|m0_1|u_logic|Z78wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~5 , soc_inst|m0_1|u_logic|Z78wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Beowx4~1 , soc_inst|m0_1|u_logic|Beowx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~0 , soc_inst|m0_1|u_logic|Q7ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~1 , soc_inst|m0_1|u_logic|Q7ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kvtwx4 , soc_inst|m0_1|u_logic|Kvtwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~0 , soc_inst|m0_1|u_logic|Gftwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kw7wx4~0 , soc_inst|m0_1|u_logic|Kw7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kw7wx4~1 , soc_inst|m0_1|u_logic|Kw7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iutwx4~0 , soc_inst|m0_1|u_logic|Iutwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cuxwx4~0 , soc_inst|m0_1|u_logic|Cuxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hr7wx4~0 , soc_inst|m0_1|u_logic|Hr7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X7ewx4~0 , soc_inst|m0_1|u_logic|X7ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A6ewx4~0 , soc_inst|m0_1|u_logic|A6ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~1 , soc_inst|m0_1|u_logic|Gftwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5ewx4 , soc_inst|m0_1|u_logic|F5ewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~0 , soc_inst|m0_1|u_logic|W3ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~1 , soc_inst|m0_1|u_logic|W3ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~6 , soc_inst|m0_1|u_logic|Z78wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wpcvx4 , soc_inst|m0_1|u_logic|Wpcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nz73z4 , soc_inst|m0_1|u_logic|Nz73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Igl2z4 , soc_inst|m0_1|u_logic|Igl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C193z4 , soc_inst|m0_1|u_logic|C193z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eq63z4 , soc_inst|m0_1|u_logic|Eq63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~5 , soc_inst|m0_1|u_logic|Kqzvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eut2z4 , soc_inst|m0_1|u_logic|Eut2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~6 , soc_inst|m0_1|u_logic|Kqzvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~7 , soc_inst|m0_1|u_logic|Kqzvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Edl2z4 , soc_inst|m0_1|u_logic|Edl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~1 , soc_inst|m0_1|u_logic|Kqzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M743z4 , soc_inst|m0_1|u_logic|M743z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pbl2z4 , soc_inst|m0_1|u_logic|Pbl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~2 , soc_inst|m0_1|u_logic|Kqzvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vg53z4 , soc_inst|m0_1|u_logic|Vg53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dy23z4 , soc_inst|m0_1|u_logic|Dy23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~3 , soc_inst|m0_1|u_logic|Kqzvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Csz2z4 , soc_inst|m0_1|u_logic|Csz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhl2z4 , soc_inst|m0_1|u_logic|Xhl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wo03z4 , soc_inst|m0_1|u_logic|Wo03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~4 , soc_inst|m0_1|u_logic|Kqzvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tel2z4 , soc_inst|m0_1|u_logic|Tel2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uo13z4 , soc_inst|m0_1|u_logic|Uo13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~0 , soc_inst|m0_1|u_logic|Kqzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4 , soc_inst|m0_1|u_logic|Kqzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4awx4~0 , soc_inst|m0_1|u_logic|J4awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~57 , soc_inst|m0_1|u_logic|Add5~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~5 , soc_inst|m0_1|u_logic|Add5~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dih2z4~0 , soc_inst|m0_1|u_logic|Dih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ovcvx4 , soc_inst|m0_1|u_logic|Ovcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~117 , soc_inst|m0_1|u_logic|Add5~117, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~9 , soc_inst|m0_1|u_logic|Add5~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Szr2z4 , soc_inst|m0_1|u_logic|Szr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4 , soc_inst|m0_1|u_logic|Eyr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qwr2z4 , soc_inst|m0_1|u_logic|Qwr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hp9wx4~0 , soc_inst|m0_1|u_logic|Hp9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z863z4 , soc_inst|m0_1|u_logic|Z863z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz43z4 , soc_inst|m0_1|u_logic|Qz43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~0 , soc_inst|m0_1|u_logic|Kn9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kc03z4 , soc_inst|m0_1|u_logic|Kc03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E913z4 , soc_inst|m0_1|u_logic|E913z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~2 , soc_inst|m0_1|u_logic|Kn9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE , soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hq33z4 , soc_inst|m0_1|u_logic|Hq33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~1 , soc_inst|m0_1|u_logic|Kn9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~3 , soc_inst|m0_1|u_logic|Kn9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F32wx4~0 , soc_inst|m0_1|u_logic|F32wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9z2z4 , soc_inst|m0_1|u_logic|K9z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~0 , soc_inst|m0_1|u_logic|Tuawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~1 , soc_inst|m0_1|u_logic|Tuawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~0 , soc_inst|m0_1|u_logic|Hnbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4 , soc_inst|m0_1|u_logic|Qzq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~1 , soc_inst|m0_1|u_logic|Z4bwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~1 , soc_inst|m0_1|u_logic|Hnbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~29 , soc_inst|m0_1|u_logic|Add5~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~93 , soc_inst|m0_1|u_logic|Add5~93, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~101 , soc_inst|m0_1|u_logic|Add5~101, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~33 , soc_inst|m0_1|u_logic|Add5~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~97 , soc_inst|m0_1|u_logic|Add5~97, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~109 , soc_inst|m0_1|u_logic|Add5~109, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~37 , soc_inst|m0_1|u_logic|Add5~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~81 , soc_inst|m0_1|u_logic|Add5~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~41 , soc_inst|m0_1|u_logic|Add5~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~0 , soc_inst|m0_1|u_logic|Do8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jf92z4~0 , soc_inst|m0_1|u_logic|Jf92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~73 , soc_inst|m0_1|u_logic|Add5~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bv0wx4 , soc_inst|m0_1|u_logic|Bv0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tmjvx4~0 , soc_inst|m0_1|u_logic|Tmjvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H4p2z4 , soc_inst|m0_1|u_logic|H4p2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ixn2z4 , soc_inst|m0_1|u_logic|Ixn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE , soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvn2z4 , soc_inst|m0_1|u_logic|Tvn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jf92z4~0 , soc_inst|m0_1|u_logic|Jf92z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Md92z4~0 , soc_inst|m0_1|u_logic|Md92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec33z4 , soc_inst|m0_1|u_logic|Ec33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V223z4 , soc_inst|m0_1|u_logic|V223z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Md92z4~1 , soc_inst|m0_1|u_logic|Md92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K103z4 , soc_inst|m0_1|u_logic|K103z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Md92z4~2 , soc_inst|m0_1|u_logic|Md92z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Md92z4~3 , soc_inst|m0_1|u_logic|Md92z4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qs0wx4~0 , soc_inst|m0_1|u_logic|Qs0wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add5~21 , soc_inst|m0_1|u_logic|Add5~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6awx4~0 , soc_inst|m0_1|u_logic|U6awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6awx4~1 , soc_inst|m0_1|u_logic|U6awx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~0 , soc_inst|m0_1|u_logic|Oaawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zb83z4 , soc_inst|m0_1|u_logic|Zb83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE , soc_inst|m0_1|u_logic|Q273z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qg93z4 , soc_inst|m0_1|u_logic|Qg93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~6 , soc_inst|m0_1|u_logic|Nn0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zfv2z4 , soc_inst|m0_1|u_logic|Zfv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~7 , soc_inst|m0_1|u_logic|Nn0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~8 , soc_inst|m0_1|u_logic|Nn0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~1 , soc_inst|m0_1|u_logic|Oaawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE , soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE , soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~0 , soc_inst|m0_1|u_logic|A792z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xyh3z4 , soc_inst|m0_1|u_logic|Xyh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X892z4~0 , soc_inst|m0_1|u_logic|X892z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pa33z4 , soc_inst|m0_1|u_logic|Pa33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~1 , soc_inst|m0_1|u_logic|A792z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~2 , soc_inst|m0_1|u_logic|A792z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~3 , soc_inst|m0_1|u_logic|A792z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wo0wx4~0 , soc_inst|m0_1|u_logic|Wo0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fq0wx4 , soc_inst|m0_1|u_logic|Fq0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Irjvx4~0 , soc_inst|m0_1|u_logic|Irjvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W5p2z4 , soc_inst|m0_1|u_logic|W5p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~1 , soc_inst|m0_1|u_logic|St0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq1xx4~0 , soc_inst|m0_1|u_logic|Jq1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eun2z4 , soc_inst|m0_1|u_logic|Eun2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~0 , soc_inst|m0_1|u_logic|St0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~5 , soc_inst|m0_1|u_logic|St0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~0 , soc_inst|m0_1|u_logic|Ecawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Od83z4 , soc_inst|m0_1|u_logic|Od83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE , soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~7 , soc_inst|m0_1|u_logic|St0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F473z4 , soc_inst|m0_1|u_logic|F473z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fi93z4 , soc_inst|m0_1|u_logic|Fi93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~6 , soc_inst|m0_1|u_logic|St0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~8 , soc_inst|m0_1|u_logic|St0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~1 , soc_inst|m0_1|u_logic|Ecawx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add5~49 , soc_inst|m0_1|u_logic|Add5~49, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add5~53 , soc_inst|m0_1|u_logic|Add5~53, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug0wx4 , soc_inst|m0_1|u_logic|Ug0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M0kvx4~0 , soc_inst|m0_1|u_logic|M0kvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tzg3z4 , soc_inst|m0_1|u_logic|Tzg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~1 , soc_inst|m0_1|u_logic|Hk0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~5 , soc_inst|m0_1|u_logic|Hk0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9awx4~1 , soc_inst|m0_1|u_logic|M9awx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add5~25 , soc_inst|m0_1|u_logic|Add5~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~1 , soc_inst|m0_1|u_logic|Do8wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~2 , soc_inst|m0_1|u_logic|Do8wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~3 , soc_inst|m0_1|u_logic|Do8wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~4 , soc_inst|m0_1|u_logic|Do8wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~0 , soc_inst|m0_1|u_logic|Phh2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE , soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk23z4 , soc_inst|m0_1|u_logic|Bk23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~1 , soc_inst|m0_1|u_logic|H972z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pfz2z4 , soc_inst|m0_1|u_logic|Pfz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~2 , soc_inst|m0_1|u_logic|H972z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T253z4 , soc_inst|m0_1|u_logic|T253z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~0 , soc_inst|m0_1|u_logic|H972z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eb72z4~0 , soc_inst|m0_1|u_logic|Eb72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~3 , soc_inst|m0_1|u_logic|H972z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A67wx4~0 , soc_inst|m0_1|u_logic|A67wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zwcvx4 , soc_inst|m0_1|u_logic|Zwcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~77 , soc_inst|m0_1|u_logic|Add5~77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~0 , soc_inst|m0_1|u_logic|N88wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[11]~3 , soc_inst|interconnect_1|HRDATA[11]~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[12]~13 , soc_inst|ram_1|data_to_memory[12]~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[28]~14 , soc_inst|ram_1|data_to_memory[28]~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[12]~22 , soc_inst|interconnect_1|HRDATA[12]~22, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~0 , soc_inst|m0_1|u_logic|Xrmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~1 , soc_inst|m0_1|u_logic|Xrmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4~0 , soc_inst|m0_1|u_logic|Dpc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4 , soc_inst|m0_1|u_logic|Dpc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bsvwx4~0 , soc_inst|m0_1|u_logic|Bsvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~2 , soc_inst|m0_1|u_logic|Xrmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~1 , soc_inst|m0_1|u_logic|B2uvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U1uvx4 , soc_inst|m0_1|u_logic|U1uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Adt2z4 , soc_inst|m0_1|u_logic|Adt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxuvx4~0 , soc_inst|m0_1|u_logic|Oxuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1ivx4~0 , soc_inst|m0_1|u_logic|R1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipb3z4 , soc_inst|m0_1|u_logic|Ipb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~1 , soc_inst|m0_1|u_logic|Add5~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C70wx4 , soc_inst|m0_1|u_logic|C70wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q9kvx4~0 , soc_inst|m0_1|u_logic|Q9kvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zfh3z4 , soc_inst|m0_1|u_logic|Zfh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~1 , soc_inst|m0_1|u_logic|Wa0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~4 , soc_inst|m0_1|u_logic|Wa0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug43z4 , soc_inst|m0_1|u_logic|Ug43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0n2z4 , soc_inst|m0_1|u_logic|J0n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~2 , soc_inst|m0_1|u_logic|Wa0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~5 , soc_inst|m0_1|u_logic|Wa0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4 , soc_inst|m0_1|u_logic|Wa0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[22]~3 , soc_inst|m0_1|u_logic|hwdata_o[22]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fed3z4 , soc_inst|m0_1|u_logic|Fed3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~0 , soc_inst|m0_1|u_logic|D0wwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~1 , soc_inst|m0_1|u_logic|D0wwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B90xx4~0 , soc_inst|m0_1|u_logic|B90xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tb0xx4~0 , soc_inst|m0_1|u_logic|Tb0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hdzwx4~0 , soc_inst|m0_1|u_logic|Hdzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Douvx4~0 , soc_inst|m0_1|u_logic|Douvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W0ivx4~0 , soc_inst|m0_1|u_logic|W0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X0c3z4 , soc_inst|m0_1|u_logic|X0c3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4~0 , soc_inst|m0_1|u_logic|Ylc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4 , soc_inst|m0_1|u_logic|Ylc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jruvx4~0 , soc_inst|m0_1|u_logic|Jruvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D1ivx4~0 , soc_inst|m0_1|u_logic|D1ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4c3z4 , soc_inst|m0_1|u_logic|F4c3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4 , soc_inst|m0_1|u_logic|Jkc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4~0 , soc_inst|m0_1|u_logic|Jkc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7pwx4 , soc_inst|m0_1|u_logic|K7pwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L0uvx4 , soc_inst|m0_1|u_logic|L0uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6l2z4 , soc_inst|m0_1|u_logic|Q6l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE , soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H8l2z4 , soc_inst|m0_1|u_logic|H8l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE , soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A50xx4~0 , soc_inst|m0_1|u_logic|A50xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ayzwx4 , soc_inst|m0_1|u_logic|Ayzwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~1 , soc_inst|m0_1|u_logic|Jjuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[5] , soc_inst|m0_1|u_logic|hwdata_o[5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uic3z4~0 , soc_inst|m0_1|u_logic|Uic3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uic3z4 , soc_inst|m0_1|u_logic|Uic3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iuuvx4~0 , soc_inst|m0_1|u_logic|Iuuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K1ivx4~0 , soc_inst|m0_1|u_logic|K1ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N7c3z4 , soc_inst|m0_1|u_logic|N7c3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fhc3z4~0 , soc_inst|m0_1|u_logic|Fhc3z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fhc3z4 , soc_inst|m0_1|u_logic|Fhc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~0 , soc_inst|m0_1|u_logic|Dewwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~1 , soc_inst|m0_1|u_logic|Dewwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~0 , soc_inst|m0_1|u_logic|Gtmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~1 , soc_inst|m0_1|u_logic|Gtmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~2 , soc_inst|m0_1|u_logic|Gtmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE , soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][4] , soc_inst|switches_1|switch_store[1][4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjvwx4~0 , soc_inst|m0_1|u_logic|Sjvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~0 , soc_inst|m0_1|u_logic|Ntmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~1 , soc_inst|m0_1|u_logic|Ntmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~0 , soc_inst|m0_1|u_logic|Wzpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~0 , soc_inst|m0_1|u_logic|Lsmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~1 , soc_inst|m0_1|u_logic|Lsmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~1 , soc_inst|m0_1|u_logic|Wzpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D47wx4~0 , soc_inst|m0_1|u_logic|D47wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zxpvx4~0 , soc_inst|m0_1|u_logic|Zxpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~1 , soc_inst|m0_1|u_logic|Phh2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S17wx4~0 , soc_inst|m0_1|u_logic|S17wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~0 , soc_inst|m0_1|u_logic|Rhnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~1 , soc_inst|m0_1|u_logic|Rhnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Idk2z4 , soc_inst|m0_1|u_logic|Idk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnawx4~0 , soc_inst|m0_1|u_logic|Mnawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~0 , soc_inst|m0_1|u_logic|C3qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~15 , soc_inst|m0_1|u_logic|N88wx4~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~0 , soc_inst|m0_1|u_logic|Ox1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~2 , soc_inst|m0_1|u_logic|N88wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~3 , soc_inst|m0_1|u_logic|N88wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nf1wx4~0 , soc_inst|m0_1|u_logic|Nf1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rjzvx4~0 , soc_inst|m0_1|u_logic|Rjzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~4 , soc_inst|m0_1|u_logic|N88wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~5 , soc_inst|m0_1|u_logic|N88wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~1 , soc_inst|m0_1|u_logic|Ox1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wsawx4~0 , soc_inst|m0_1|u_logic|Wsawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~6 , soc_inst|m0_1|u_logic|N88wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~3 , soc_inst|m0_1|u_logic|Cr1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~0 , soc_inst|m0_1|u_logic|G6d3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d3z4 , soc_inst|m0_1|u_logic|G6d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[9]~6 , soc_inst|m0_1|u_logic|hwdata_o[9]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxe3z4 , soc_inst|m0_1|u_logic|Kxe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aze3z4 , soc_inst|m0_1|u_logic|Aze3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~9 , soc_inst|m0_1|u_logic|Add0~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~77 , soc_inst|m0_1|u_logic|Add0~77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[8]~7 , soc_inst|m0_1|u_logic|hwdata_o[8]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3f3z4 , soc_inst|m0_1|u_logic|W3f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Armvx4~0 , soc_inst|m0_1|u_logic|Armvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5f3z4 , soc_inst|m0_1|u_logic|M5f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~25 , soc_inst|m0_1|u_logic|Add0~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqmvx4~0 , soc_inst|m0_1|u_logic|Tqmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE , soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mxa2z4~0 , soc_inst|m0_1|u_logic|Mxa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0ivx4~0 , soc_inst|m0_1|u_logic|I0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9l2z4 , soc_inst|m0_1|u_logic|Y9l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vve3z4 , soc_inst|m0_1|u_logic|Vve3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vve3z4~0 , soc_inst|m0_1|u_logic|Vve3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~0 , soc_inst|m0_1|u_logic|Khfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[8]~15 , soc_inst|interconnect_1|HRDATA[8]~15, de1_soc_wrapper, 1
-instance = comp, \SW[9]~input , SW[9]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][9] , soc_inst|switches_1|switch_store[0][9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[9]~16 , soc_inst|interconnect_1|HRDATA[9]~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~1 , soc_inst|m0_1|u_logic|Khfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~2 , soc_inst|m0_1|u_logic|Khfwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~3 , soc_inst|m0_1|u_logic|Khfwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~0 , soc_inst|m0_1|u_logic|Vq1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~1 , soc_inst|m0_1|u_logic|Vq1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4 , soc_inst|m0_1|u_logic|Vq1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~1 , soc_inst|m0_1|u_logic|G6d3z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE , soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffbwx4~0 , soc_inst|m0_1|u_logic|Ffbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~2 , soc_inst|m0_1|u_logic|Cr1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~0 , soc_inst|m0_1|u_logic|Cr1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~1 , soc_inst|m0_1|u_logic|Uozvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~0 , soc_inst|m0_1|u_logic|Uozvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~0 , soc_inst|m0_1|u_logic|L9zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~2 , soc_inst|m0_1|u_logic|L9zvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~1 , soc_inst|m0_1|u_logic|L9zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4 , soc_inst|m0_1|u_logic|L9zvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~13 , soc_inst|m0_1|u_logic|N88wx4~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~1 , soc_inst|m0_1|u_logic|Z80wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~0 , soc_inst|m0_1|u_logic|Z80wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~19 , soc_inst|m0_1|u_logic|N88wx4~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~21 , soc_inst|m0_1|u_logic|N88wx4~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~8 , soc_inst|m0_1|u_logic|N88wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~7 , soc_inst|m0_1|u_logic|N88wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~20 , soc_inst|m0_1|u_logic|N88wx4~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~18 , soc_inst|m0_1|u_logic|N88wx4~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~9 , soc_inst|m0_1|u_logic|N88wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ri0wx4~1 , soc_inst|m0_1|u_logic|Ri0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ri0wx4~0 , soc_inst|m0_1|u_logic|Ri0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Znzvx4~0 , soc_inst|m0_1|u_logic|Znzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~0 , soc_inst|m0_1|u_logic|G79wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~2 , soc_inst|m0_1|u_logic|G79wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dv8wx4~0 , soc_inst|m0_1|u_logic|Dv8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~1 , soc_inst|m0_1|u_logic|G79wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~3 , soc_inst|m0_1|u_logic|G79wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~4 , soc_inst|m0_1|u_logic|G79wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~5 , soc_inst|m0_1|u_logic|G79wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~6 , soc_inst|m0_1|u_logic|G79wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~7 , soc_inst|m0_1|u_logic|G79wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~10 , soc_inst|m0_1|u_logic|N88wx4~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~3 , soc_inst|m0_1|u_logic|Ee8wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~0 , soc_inst|m0_1|u_logic|Ee8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~2 , soc_inst|m0_1|u_logic|Ee8wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~1 , soc_inst|m0_1|u_logic|Ee8wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~11 , soc_inst|m0_1|u_logic|N88wx4~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~12 , soc_inst|m0_1|u_logic|N88wx4~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nyawx4~0 , soc_inst|m0_1|u_logic|Nyawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~17 , soc_inst|m0_1|u_logic|N88wx4~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wccwx4~0 , soc_inst|m0_1|u_logic|Wccwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fyzvx4~0 , soc_inst|m0_1|u_logic|Fyzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~1 , soc_inst|m0_1|u_logic|N88wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~14 , soc_inst|m0_1|u_logic|N88wx4~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~16 , soc_inst|m0_1|u_logic|N88wx4~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~7 , soc_inst|m0_1|u_logic|Z78wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S9zvx4~0 , soc_inst|m0_1|u_logic|S9zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R38wx4~0 , soc_inst|m0_1|u_logic|R38wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R38wx4~1 , soc_inst|m0_1|u_logic|R38wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qb3wx4 , soc_inst|m0_1|u_logic|Qb3wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z9zvx4~0 , soc_inst|m0_1|u_logic|Z9zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Igi2z4 , soc_inst|m0_1|u_logic|Igi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4 , soc_inst|m0_1|u_logic|Rhi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~1 , soc_inst|m0_1|u_logic|Add2~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~0 , soc_inst|m0_1|u_logic|Tvhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~1 , soc_inst|m0_1|u_logic|Tvhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~2 , soc_inst|m0_1|u_logic|Tvhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Omk2z4 , soc_inst|m0_1|u_logic|Omk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Velvx4~0 , soc_inst|m0_1|u_logic|Velvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Velvx4~1 , soc_inst|m0_1|u_logic|Velvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr23z4~feeder , soc_inst|m0_1|u_logic|Vr23z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr23z4 , soc_inst|m0_1|u_logic|Vr23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi13z4 , soc_inst|m0_1|u_logic|Mi13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~1 , soc_inst|m0_1|u_logic|Ec62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na53z4~feeder , soc_inst|m0_1|u_logic|Na53z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na53z4 , soc_inst|m0_1|u_logic|Na53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E143z4~feeder , soc_inst|m0_1|u_logic|E143z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E143z4 , soc_inst|m0_1|u_logic|E143z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~0 , soc_inst|m0_1|u_logic|Ec62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8i3z4 , soc_inst|m0_1|u_logic|N8i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Be62z4~0 , soc_inst|m0_1|u_logic|Be62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cai3z4 , soc_inst|m0_1|u_logic|Cai3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5i3z4 , soc_inst|m0_1|u_logic|J5i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6i3z4 , soc_inst|m0_1|u_logic|Y6i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~2 , soc_inst|m0_1|u_logic|Ec62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~3 , soc_inst|m0_1|u_logic|Ec62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8zvx4~0 , soc_inst|m0_1|u_logic|Q8zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C8zvx4~0 , soc_inst|m0_1|u_logic|C8zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~0 , soc_inst|m0_1|u_logic|F6zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~1 , soc_inst|m0_1|u_logic|F6zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ft73z4~feeder , soc_inst|m0_1|u_logic|Ft73z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ft73z4 , soc_inst|m0_1|u_logic|Ft73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~2 , soc_inst|m0_1|u_logic|O7zvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gto2z4 , soc_inst|m0_1|u_logic|Gto2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~4 , soc_inst|m0_1|u_logic|O7zvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~1 , soc_inst|m0_1|u_logic|O7zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~3 , soc_inst|m0_1|u_logic|O7zvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~5 , soc_inst|m0_1|u_logic|O7zvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~6 , soc_inst|m0_1|u_logic|O7zvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE , soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu83z4 , soc_inst|m0_1|u_logic|Uu83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~7 , soc_inst|m0_1|u_logic|O7zvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~8 , soc_inst|m0_1|u_logic|O7zvx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~0 , soc_inst|m0_1|u_logic|O7zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4 , soc_inst|m0_1|u_logic|O7zvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~2 , soc_inst|m0_1|u_logic|hwdata_o~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE , soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyywx4~0 , soc_inst|m0_1|u_logic|Tyywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE , soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uqi2z4 , soc_inst|m0_1|u_logic|Uqi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hzywx4~0 , soc_inst|m0_1|u_logic|Hzywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~18 , soc_inst|m0_1|u_logic|hwdata_o~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hzj2z4 , soc_inst|m0_1|u_logic|Hzj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~0 , soc_inst|m0_1|u_logic|M5mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S5b3z4 , soc_inst|m0_1|u_logic|S5b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~10 , soc_inst|m0_1|u_logic|hwdata_o~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ynvvx4 , soc_inst|m0_1|u_logic|Ynvvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~1 , soc_inst|m0_1|u_logic|M5mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bec3z4~0 , soc_inst|m0_1|u_logic|Bec3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bec3z4 , soc_inst|m0_1|u_logic|Bec3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ckuvx4~0 , soc_inst|m0_1|u_logic|Ckuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F2ivx4~0 , soc_inst|m0_1|u_logic|F2ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pxb3z4 , soc_inst|m0_1|u_logic|Pxb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~0 , soc_inst|m0_1|u_logic|D0wwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~1 , soc_inst|m0_1|u_logic|D0wwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I90xx4~0 , soc_inst|m0_1|u_logic|I90xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iuuvx4~0 , soc_inst|m0_1|u_logic|Iuuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K1ivx4~0 , soc_inst|m0_1|u_logic|K1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE , soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uic3z4~0 , soc_inst|m0_1|u_logic|Uic3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uic3z4 , soc_inst|m0_1|u_logic|Uic3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmb3z4 , soc_inst|m0_1|u_logic|Bmb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Axm2z4~0 , soc_inst|m0_1|u_logic|Axm2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Axm2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xdb3z4 , soc_inst|m0_1|u_logic|Xdb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wzvwx4~0 , soc_inst|m0_1|u_logic|Wzvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipb3z4 , soc_inst|m0_1|u_logic|Ipb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxuvx4~0 , soc_inst|m0_1|u_logic|Oxuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1ivx4~0 , soc_inst|m0_1|u_logic|R1ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wzvwx4~1 , soc_inst|m0_1|u_logic|Wzvwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~0 , soc_inst|m0_1|u_logic|Jjuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Douvx4~0 , soc_inst|m0_1|u_logic|Douvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W0ivx4~0 , soc_inst|m0_1|u_logic|W0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X0c3z4 , soc_inst|m0_1|u_logic|X0c3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4~0 , soc_inst|m0_1|u_logic|Ylc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4 , soc_inst|m0_1|u_logic|Ylc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4l2z4 , soc_inst|m0_1|u_logic|Z4l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE , soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A50xx4~0 , soc_inst|m0_1|u_logic|A50xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ayzwx4 , soc_inst|m0_1|u_logic|Ayzwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~1 , soc_inst|m0_1|u_logic|Jjuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE , soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9ovx4~0 , soc_inst|m0_1|u_logic|K9ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T2ivx4~0 , soc_inst|m0_1|u_logic|T2ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gxk2z4 , soc_inst|m0_1|u_logic|Gxk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4 , soc_inst|m0_1|u_logic|Mcc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4~0 , soc_inst|m0_1|u_logic|Mcc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zad3z4 , soc_inst|m0_1|u_logic|Zad3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ruvvx4~0 , soc_inst|m0_1|u_logic|Ruvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M2ivx4~0 , soc_inst|m0_1|u_logic|M2ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G10xx4~0 , soc_inst|m0_1|u_logic|G10xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4~0 , soc_inst|m0_1|u_logic|Ztc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4 , soc_inst|m0_1|u_logic|Ztc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G10xx4~1 , soc_inst|m0_1|u_logic|G10xx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fb0xx4~0 , soc_inst|m0_1|u_logic|Fb0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S00xx4~0 , soc_inst|m0_1|u_logic|S00xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I90xx4~1 , soc_inst|m0_1|u_logic|I90xx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tb0xx4~0 , soc_inst|m0_1|u_logic|Tb0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B90xx4~0 , soc_inst|m0_1|u_logic|B90xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cjuwx4~0 , soc_inst|m0_1|u_logic|Cjuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~1 , soc_inst|m0_1|u_logic|Wvzwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwywx4~0 , soc_inst|m0_1|u_logic|Pwywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qrp2z4 , soc_inst|m0_1|u_logic|Qrp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hdzwx4~0 , soc_inst|m0_1|u_logic|Hdzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Usl2z4 , soc_inst|m0_1|u_logic|Usl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N10xx4~0 , soc_inst|m0_1|u_logic|N10xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~0 , soc_inst|m0_1|u_logic|Wvzwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|F40xx4~0 , soc_inst|m0_1|u_logic|F40xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N10xx4~0 , soc_inst|m0_1|u_logic|N10xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Adzwx4~0 , soc_inst|m0_1|u_logic|Adzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~0 , soc_inst|m0_1|u_logic|Wvzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I90xx4~2 , soc_inst|m0_1|u_logic|I90xx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|A6zwx4~0 , soc_inst|m0_1|u_logic|A6zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4 , soc_inst|m0_1|u_logic|Wuq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yauvx4~0 , soc_inst|m0_1|u_logic|Yauvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzhvx4~0 , soc_inst|m0_1|u_logic|Gzhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqzwx4~0 , soc_inst|m0_1|u_logic|Tqzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsa2z4~0 , soc_inst|m0_1|u_logic|Jsa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Syhvx4~0 , soc_inst|m0_1|u_logic|Syhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lul2z4 , soc_inst|m0_1|u_logic|Lul2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4 , soc_inst|m0_1|u_logic|Jsc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4~0 , soc_inst|m0_1|u_logic|Jsc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cps2z4 , soc_inst|m0_1|u_logic|Cps2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uls2z4 , soc_inst|m0_1|u_logic|Uls2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~0 , soc_inst|m0_1|u_logic|Xwvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~1 , soc_inst|m0_1|u_logic|Xwvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~1 , soc_inst|m0_1|u_logic|Arzwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgs2z4 , soc_inst|m0_1|u_logic|Vgs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tib3z4 , soc_inst|m0_1|u_logic|Tib3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dizwx4~0 , soc_inst|m0_1|u_logic|Dizwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kizwx4~0 , soc_inst|m0_1|u_logic|Kizwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fczwx4~0 , soc_inst|m0_1|u_logic|Fczwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lee3z4 , soc_inst|m0_1|u_logic|Lee3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[11]~8 , soc_inst|m0_1|u_logic|hwdata_o[11]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lee3z4~0 , soc_inst|m0_1|u_logic|Lee3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE , soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|K9vvx4~0 , soc_inst|m0_1|u_logic|K9vvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uzhvx4~0 , soc_inst|m0_1|u_logic|Uzhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ble3z4 , soc_inst|m0_1|u_logic|Ble3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lee3z4~0 , soc_inst|m0_1|u_logic|Lee3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lee3z4 , soc_inst|m0_1|u_logic|Lee3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[10]~9 , soc_inst|m0_1|u_logic|hwdata_o[10]~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wva2z4~0 , soc_inst|m0_1|u_logic|Wva2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B0ivx4~0 , soc_inst|m0_1|u_logic|B0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipn2z4 , soc_inst|m0_1|u_logic|Ipn2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Nnc3z4~0 , soc_inst|m0_1|u_logic|Nnc3z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Nnc3z4 , soc_inst|m0_1|u_logic|Nnc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Azs2z4 , soc_inst|m0_1|u_logic|Azs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wva2z4~0 , soc_inst|m0_1|u_logic|Wva2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B0ivx4~0 , soc_inst|m0_1|u_logic|B0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0uvx4 , soc_inst|m0_1|u_logic|E0uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qztvx4 , soc_inst|m0_1|u_logic|Qztvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Svs2z4 , soc_inst|m0_1|u_logic|Svs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bus2z4 , soc_inst|m0_1|u_logic|Bus2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jxs2z4 , soc_inst|m0_1|u_logic|Jxs2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gyvwx4~0 , soc_inst|m0_1|u_logic|Gyvwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gyvwx4~1 , soc_inst|m0_1|u_logic|Gyvwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~0 , soc_inst|m0_1|u_logic|B6pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vve3z4~0 , soc_inst|m0_1|u_logic|Vve3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vve3z4 , soc_inst|m0_1|u_logic|Vve3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mxa2z4~0 , soc_inst|m0_1|u_logic|Mxa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0ivx4~0 , soc_inst|m0_1|u_logic|I0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9l2z4 , soc_inst|m0_1|u_logic|Y9l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[8]~7 , soc_inst|m0_1|u_logic|hwdata_o[8]~7, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|H2f3z4~0 , soc_inst|m0_1|u_logic|H2f3z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|H2f3z4 , soc_inst|m0_1|u_logic|H2f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T8f3z4 , soc_inst|m0_1|u_logic|T8f3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mhvvx4~0 , soc_inst|m0_1|u_logic|Mhvvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|P0ivx4~0 , soc_inst|m0_1|u_logic|P0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE , soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqs2z4 , soc_inst|m0_1|u_logic|Tqs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T8f3z4 , soc_inst|m0_1|u_logic|T8f3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kkb3z4 , soc_inst|m0_1|u_logic|Kkb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~0 , soc_inst|m0_1|u_logic|Kss2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gcb3z4 , soc_inst|m0_1|u_logic|Gcb3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Whzwx4~0 , soc_inst|m0_1|u_logic|Whzwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Whzwx4~1 , soc_inst|m0_1|u_logic|Whzwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fjzwx4~0 , soc_inst|m0_1|u_logic|Fjzwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qlzwx4~0 , soc_inst|m0_1|u_logic|Qlzwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yizwx4~0 , soc_inst|m0_1|u_logic|Yizwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mczwx4~0 , soc_inst|m0_1|u_logic|Mczwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~1 , soc_inst|m0_1|u_logic|B6pwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~3 , soc_inst|m0_1|u_logic|B6pwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iazwx4~0 , soc_inst|m0_1|u_logic|Iazwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7zwx4~0 , soc_inst|m0_1|u_logic|J7zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihzwx4~0 , soc_inst|m0_1|u_logic|Ihzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Clzwx4~0 , soc_inst|m0_1|u_logic|Clzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5zwx4~0 , soc_inst|m0_1|u_logic|T5zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~2 , soc_inst|m0_1|u_logic|B6pwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H6zwx4~0 , soc_inst|m0_1|u_logic|H6zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ozywx4~0 , soc_inst|m0_1|u_logic|Ozywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0zwx4~0 , soc_inst|m0_1|u_logic|J0zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~0 , soc_inst|m0_1|u_logic|Vzywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kbzwx4~0 , soc_inst|m0_1|u_logic|Kbzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jzzwx4~0 , soc_inst|m0_1|u_logic|Jzzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzzwx4~0 , soc_inst|m0_1|u_logic|Qzzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Czzwx4~0 , soc_inst|m0_1|u_logic|Czzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T2owx4~0 , soc_inst|m0_1|u_logic|T2owx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qwowx4 , soc_inst|m0_1|u_logic|Qwowx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vytvx4 , soc_inst|m0_1|u_logic|Vytvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4~0 , soc_inst|m0_1|u_logic|Tqc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4 , soc_inst|m0_1|u_logic|Tqc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txa2z4~0 , soc_inst|m0_1|u_logic|Txa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zyhvx4~0 , soc_inst|m0_1|u_logic|Zyhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rym2z4 , soc_inst|m0_1|u_logic|Rym2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dks2z4 , soc_inst|m0_1|u_logic|Dks2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lns2z4 , soc_inst|m0_1|u_logic|Lns2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4~0 , soc_inst|m0_1|u_logic|Jsc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4 , soc_inst|m0_1|u_logic|Jsc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uls2z4 , soc_inst|m0_1|u_logic|Uls2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsa2z4~0 , soc_inst|m0_1|u_logic|Jsa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Syhvx4~0 , soc_inst|m0_1|u_logic|Syhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lul2z4 , soc_inst|m0_1|u_logic|Lul2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~0 , soc_inst|m0_1|u_logic|Xwvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~1 , soc_inst|m0_1|u_logic|Xwvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kizwx4~0 , soc_inst|m0_1|u_logic|Kizwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~1 , soc_inst|m0_1|u_logic|Arzwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tib3z4 , soc_inst|m0_1|u_logic|Tib3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[12]~19 , soc_inst|m0_1|u_logic|hwdata_o[12]~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4~0 , soc_inst|m0_1|u_logic|Dpc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4 , soc_inst|m0_1|u_logic|Dpc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kwa2z4~0 , soc_inst|m0_1|u_logic|Kwa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oar2z4 , soc_inst|m0_1|u_logic|Oar2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nzhvx4~0 , soc_inst|m0_1|u_logic|Nzhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE , soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pab3z4 , soc_inst|m0_1|u_logic|Pab3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mis2z4~0 , soc_inst|m0_1|u_logic|Mis2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4g3z4 , soc_inst|m0_1|u_logic|D4g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4g3z4~0 , soc_inst|m0_1|u_logic|D4g3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE , soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~0 , soc_inst|m0_1|u_logic|Zxvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~1 , soc_inst|m0_1|u_logic|Zxvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dizwx4~0 , soc_inst|m0_1|u_logic|Dizwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqzwx4~0 , soc_inst|m0_1|u_logic|Tqzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fczwx4~0 , soc_inst|m0_1|u_logic|Fczwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~1 , soc_inst|m0_1|u_logic|B6pwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihzwx4~0 , soc_inst|m0_1|u_logic|Ihzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Clzwx4~0 , soc_inst|m0_1|u_logic|Clzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5zwx4~0 , soc_inst|m0_1|u_logic|T5zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~2 , soc_inst|m0_1|u_logic|B6pwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~3 , soc_inst|m0_1|u_logic|B6pwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iazwx4~0 , soc_inst|m0_1|u_logic|Iazwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~0 , soc_inst|m0_1|u_logic|Arzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pazwx4 , soc_inst|m0_1|u_logic|Pazwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7zwx4~0 , soc_inst|m0_1|u_logic|J7zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H6zwx4~0 , soc_inst|m0_1|u_logic|H6zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~0 , soc_inst|m0_1|u_logic|G2zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0zwx4~0 , soc_inst|m0_1|u_logic|J0zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fb0xx4~0 , soc_inst|m0_1|u_logic|Fb0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S00xx4~0 , soc_inst|m0_1|u_logic|S00xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kbzwx4~0 , soc_inst|m0_1|u_logic|Kbzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jzzwx4~0 , soc_inst|m0_1|u_logic|Jzzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzzwx4~0 , soc_inst|m0_1|u_logic|Qzzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Czzwx4~0 , soc_inst|m0_1|u_logic|Czzwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|R4zwx4~0 , soc_inst|m0_1|u_logic|R4zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~0 , soc_inst|m0_1|u_logic|Vzywx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~1 , soc_inst|m0_1|u_logic|Vzywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C0zwx4~0 , soc_inst|m0_1|u_logic|C0zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2uvx4~0 , soc_inst|m0_1|u_logic|I2uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE , soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~0 , soc_inst|m0_1|u_logic|Ny3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Knvvx4~0 , soc_inst|m0_1|u_logic|Knvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sx3wx4~0 , soc_inst|m0_1|u_logic|Sx3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imvvx4~0 , soc_inst|m0_1|u_logic|Imvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wbk2z4 , soc_inst|m0_1|u_logic|Wbk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~0 , soc_inst|m0_1|u_logic|T5mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~1 , soc_inst|m0_1|u_logic|T5mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X9n2z4 , soc_inst|m0_1|u_logic|X9n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE , soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4pwx4~0 , soc_inst|m0_1|u_logic|S4pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hzywx4~0 , soc_inst|m0_1|u_logic|Hzywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyywx4~0 , soc_inst|m0_1|u_logic|Tyywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwywx4~0 , soc_inst|m0_1|u_logic|Pwywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ozywx4~0 , soc_inst|m0_1|u_logic|Ozywx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gvywx4~0 , soc_inst|m0_1|u_logic|Gvywx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|E5owx4~0 , soc_inst|m0_1|u_logic|E5owx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C0zwx4~0 , soc_inst|m0_1|u_logic|C0zwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~0 , soc_inst|m0_1|u_logic|X2rvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~0 , soc_inst|m0_1|u_logic|Pjyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahowx4~0 , soc_inst|m0_1|u_logic|Ahowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tgowx4~0 , soc_inst|m0_1|u_logic|Tgowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~0 , soc_inst|m0_1|u_logic|Tlyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~1 , soc_inst|m0_1|u_logic|Tlyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rkyvx4~0 , soc_inst|m0_1|u_logic|Rkyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[8]~28 , soc_inst|ram_1|data_to_memory[8]~28, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[8]~15 , soc_inst|interconnect_1|HRDATA[8]~15, de1_soc_wrapper, 1
 instance = comp, \SW[8]~input , SW[8]~input, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|switch_store[0][8] , soc_inst|switches_1|switch_store[0][8], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[8]~28 , soc_inst|ram_1|data_to_memory[8]~28, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|HRDATA[8]~33 , soc_inst|interconnect_1|HRDATA[8]~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE , soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~21 , soc_inst|m0_1|u_logic|Add0~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gha3z4~0 , soc_inst|m0_1|u_logic|Gha3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gha3z4 , soc_inst|m0_1|u_logic|Gha3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qsmvx4~0 , soc_inst|m0_1|u_logic|Qsmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M2b3z4 , soc_inst|m0_1|u_logic|M2b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~57 , soc_inst|m0_1|u_logic|Add0~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wia3z4 , soc_inst|m0_1|u_logic|Wia3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsmvx4~0 , soc_inst|m0_1|u_logic|Jsmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W0b3z4 , soc_inst|m0_1|u_logic|W0b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~41 , soc_inst|m0_1|u_logic|Add0~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Taa3z4~0 , soc_inst|m0_1|u_logic|Taa3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Taa3z4 , soc_inst|m0_1|u_logic|Taa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Csmvx4~0 , soc_inst|m0_1|u_logic|Csmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gza3z4 , soc_inst|m0_1|u_logic|Gza3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~65 , soc_inst|m0_1|u_logic|Add0~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mka3z4 , soc_inst|m0_1|u_logic|Mka3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vrmvx4~0 , soc_inst|m0_1|u_logic|Vrmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxa3z4 , soc_inst|m0_1|u_logic|Qxa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~89 , soc_inst|m0_1|u_logic|Add0~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7b3z4~0 , soc_inst|m0_1|u_logic|J7b3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7b3z4 , soc_inst|m0_1|u_logic|J7b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ormvx4~0 , soc_inst|m0_1|u_logic|Ormvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z8b3z4 , soc_inst|m0_1|u_logic|Z8b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~9 , soc_inst|m0_1|u_logic|Add0~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4~0 , soc_inst|m0_1|u_logic|Nfb3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4 , soc_inst|m0_1|u_logic|Nfb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hrmvx4~0 , soc_inst|m0_1|u_logic|Hrmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dhb3z4 , soc_inst|m0_1|u_logic|Dhb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~77 , soc_inst|m0_1|u_logic|Add0~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3f3z4 , soc_inst|m0_1|u_logic|W3f3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Armvx4~0 , soc_inst|m0_1|u_logic|Armvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5f3z4 , soc_inst|m0_1|u_logic|M5f3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE , soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~0 , soc_inst|m0_1|u_logic|Hmyvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~1 , soc_inst|m0_1|u_logic|Hmyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~0 , soc_inst|m0_1|u_logic|Mydwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~0 , soc_inst|m0_1|u_logic|C0ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~1 , soc_inst|m0_1|u_logic|C0ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ksbwx4~0 , soc_inst|m0_1|u_logic|Ksbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~1 , soc_inst|m0_1|u_logic|Ox1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~0 , soc_inst|m0_1|u_logic|Ox1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iu1wx4~0 , soc_inst|m0_1|u_logic|Iu1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W5s2z4 , soc_inst|m0_1|u_logic|W5s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug73z4 , soc_inst|m0_1|u_logic|Ug73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~0 , soc_inst|m0_1|u_logic|Pybwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duv2z4 , soc_inst|m0_1|u_logic|Duv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I4s2z4 , soc_inst|m0_1|u_logic|I4s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~3 , soc_inst|m0_1|u_logic|Pybwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE , soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uku2z4 , soc_inst|m0_1|u_logic|Uku2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~2 , soc_inst|m0_1|u_logic|Pybwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U2s2z4 , soc_inst|m0_1|u_logic|U2s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxc3z4~feeder , soc_inst|m0_1|u_logic|Cxc3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxc3z4 , soc_inst|m0_1|u_logic|Cxc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~1 , soc_inst|m0_1|u_logic|Pybwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4 , soc_inst|m0_1|u_logic|Pybwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Godwx4~0 , soc_inst|m0_1|u_logic|Godwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE , soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~3 , soc_inst|m0_1|u_logic|Ai9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~1 , soc_inst|m0_1|u_logic|Ai9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M3e3z4 , soc_inst|m0_1|u_logic|M3e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~2 , soc_inst|m0_1|u_logic|Ai9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE , soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~0 , soc_inst|m0_1|u_logic|Ai9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4 , soc_inst|m0_1|u_logic|Ai9wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~0 , soc_inst|m0_1|u_logic|Sndwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Godwx4~1 , soc_inst|m0_1|u_logic|Godwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S08wx4~0 , soc_inst|m0_1|u_logic|S08wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~2 , soc_inst|m0_1|u_logic|Hmyvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|O3pvx4~0 , soc_inst|m0_1|u_logic|O3pvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|O3pvx4~1 , soc_inst|m0_1|u_logic|O3pvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rqzvx4~0 , soc_inst|m0_1|u_logic|Rqzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R293z4~feeder , soc_inst|m0_1|u_logic|R293z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R293z4 , soc_inst|m0_1|u_logic|R293z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~1 , soc_inst|m0_1|u_logic|Mnvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE , soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vmj2z4 , soc_inst|m0_1|u_logic|Vmj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5v2z4 , soc_inst|m0_1|u_logic|C5v2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~3 , soc_inst|m0_1|u_logic|Mnvwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C183z4~DUPLICATE , soc_inst|m0_1|u_logic|C183z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvt2z4 , soc_inst|m0_1|u_logic|Tvt2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~2 , soc_inst|m0_1|u_logic|Mnvwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE , soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE , soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~0 , soc_inst|m0_1|u_logic|Mnvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpj2z4 , soc_inst|m0_1|u_logic|Zpj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R293z4 , soc_inst|m0_1|u_logic|R293z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~1 , soc_inst|m0_1|u_logic|Mnvwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4 , soc_inst|m0_1|u_logic|Mnvwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~0 , soc_inst|m0_1|u_logic|Mrdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~1 , soc_inst|m0_1|u_logic|Mrdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~0 , soc_inst|m0_1|u_logic|Jymwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~1 , soc_inst|m0_1|u_logic|Jymwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N7c3z4 , soc_inst|m0_1|u_logic|N7c3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~0 , soc_inst|m0_1|u_logic|Cymwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~1 , soc_inst|m0_1|u_logic|Cymwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~2 , soc_inst|m0_1|u_logic|Cymwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~3 , soc_inst|m0_1|u_logic|Cymwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qe0wx4~0 , soc_inst|m0_1|u_logic|Qe0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qe0wx4 , soc_inst|m0_1|u_logic|Qe0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Je0wx4~0 , soc_inst|m0_1|u_logic|Je0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~1 , soc_inst|m0_1|u_logic|Mc0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~0 , soc_inst|m0_1|u_logic|Mc0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tch3z4 , soc_inst|m0_1|u_logic|Tch3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iq82z4~0 , soc_inst|m0_1|u_logic|Iq82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~1 , soc_inst|m0_1|u_logic|Lo82z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~2 , soc_inst|m0_1|u_logic|Lo82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~0 , soc_inst|m0_1|u_logic|Lo82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~3 , soc_inst|m0_1|u_logic|Lo82z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lf0wx4~0 , soc_inst|m0_1|u_logic|Lf0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~1 , soc_inst|m0_1|u_logic|Add5~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~61 , soc_inst|m0_1|u_logic|Add2~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~105 , soc_inst|m0_1|u_logic|Add2~105, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rih2z4~0 , soc_inst|m0_1|u_logic|Rih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ancvx4 , soc_inst|m0_1|u_logic|Ancvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7cwx4~0 , soc_inst|m0_1|u_logic|T7cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4j2z4 , soc_inst|m0_1|u_logic|M4j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bf9wx4~0 , soc_inst|m0_1|u_logic|Bf9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pgf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eif3z4 , soc_inst|m0_1|u_logic|Eif3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~0 , soc_inst|m0_1|u_logic|Bc82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uuf3z4 , soc_inst|m0_1|u_logic|Uuf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qrf3z4 , soc_inst|m0_1|u_logic|Qrf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ftf3z4 , soc_inst|m0_1|u_logic|Ftf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~2 , soc_inst|m0_1|u_logic|Bc82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ilf3z4 , soc_inst|m0_1|u_logic|Ilf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tjf3z4 , soc_inst|m0_1|u_logic|Tjf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~1 , soc_inst|m0_1|u_logic|Bc82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~3 , soc_inst|m0_1|u_logic|Bc82z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~4 , soc_inst|m0_1|u_logic|Bc82z4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ntnvx4~0 , soc_inst|m0_1|u_logic|Ntnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~125 , soc_inst|m0_1|u_logic|Add5~125, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~121 , soc_inst|m0_1|u_logic|Add5~121, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add2~117 , soc_inst|m0_1|u_logic|Add2~117, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~0 , soc_inst|m0_1|u_logic|Zdhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~0 , soc_inst|m0_1|u_logic|Oa3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~1 , soc_inst|m0_1|u_logic|Oa3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4 , soc_inst|m0_1|u_logic|Oa3wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~1 , soc_inst|m0_1|u_logic|Zdhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kaf3z4 , soc_inst|m0_1|u_logic|Kaf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~113 , soc_inst|m0_1|u_logic|Add2~113, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Duhvx4~0 , soc_inst|m0_1|u_logic|Duhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3pvx4 , soc_inst|m0_1|u_logic|O3pvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Duhvx4~1 , soc_inst|m0_1|u_logic|Duhvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xyk2z4 , soc_inst|m0_1|u_logic|Xyk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~113 , soc_inst|m0_1|u_logic|Add3~113, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add3~109 , soc_inst|m0_1|u_logic|Add3~109, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y1pvx4 , soc_inst|m0_1|u_logic|Y1pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7j2z4 , soc_inst|m0_1|u_logic|Q7j2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vjnvx4~0 , soc_inst|m0_1|u_logic|Vjnvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vjnvx4~1 , soc_inst|m0_1|u_logic|Vjnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7j2z4 , soc_inst|m0_1|u_logic|Q7j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE , soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Py72z4~1 , soc_inst|m0_1|u_logic|Py72z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE , soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Py72z4~2 , soc_inst|m0_1|u_logic|Py72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Py72z4~0 , soc_inst|m0_1|u_logic|Py72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M082z4~0 , soc_inst|m0_1|u_logic|M082z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Py72z4~3 , soc_inst|m0_1|u_logic|Py72z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nozvx4~0 , soc_inst|m0_1|u_logic|Nozvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Locvx4 , soc_inst|m0_1|u_logic|Locvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~0 , soc_inst|m0_1|u_logic|Xmzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~1 , soc_inst|m0_1|u_logic|Xmzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3v2z4 , soc_inst|m0_1|u_logic|N3v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~0 , soc_inst|m0_1|u_logic|U7uwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~1 , soc_inst|m0_1|u_logic|U7uwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U7uwx4 , soc_inst|m0_1|u_logic|U7uwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~0 , soc_inst|m0_1|u_logic|Uvdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gvdwx4~0 , soc_inst|m0_1|u_logic|Gvdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5ewx4~0 , soc_inst|m0_1|u_logic|M5ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~0 , soc_inst|m0_1|u_logic|Pgfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~1 , soc_inst|m0_1|u_logic|Pgfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~0 , soc_inst|m0_1|u_logic|Ppzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~1 , soc_inst|m0_1|u_logic|Ppzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~2 , soc_inst|m0_1|u_logic|Oihvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~1 , soc_inst|m0_1|u_logic|Oihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~0 , soc_inst|m0_1|u_logic|Oihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpx2z4 , soc_inst|m0_1|u_logic|Zpx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~73 , soc_inst|m0_1|u_logic|Add3~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rnovx4 , soc_inst|m0_1|u_logic|Rnovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C1lvx4~0 , soc_inst|m0_1|u_logic|C1lvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lgi3z4 , soc_inst|m0_1|u_logic|Lgi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE , soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow23z4~feeder , soc_inst|m0_1|u_logic|Ow23z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow23z4 , soc_inst|m0_1|u_logic|Ow23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn13z4~feeder , soc_inst|m0_1|u_logic|Fn13z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn13z4 , soc_inst|m0_1|u_logic|Fn13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~1 , soc_inst|m0_1|u_logic|Ds72z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X543z4 , soc_inst|m0_1|u_logic|X543z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~0 , soc_inst|m0_1|u_logic|Ds72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hn03z4 , soc_inst|m0_1|u_logic|Hn03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nqz2z4 , soc_inst|m0_1|u_logic|Nqz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~2 , soc_inst|m0_1|u_logic|Ds72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5k2z4 , soc_inst|m0_1|u_logic|O5k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Au72z4~0 , soc_inst|m0_1|u_logic|Au72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~3 , soc_inst|m0_1|u_logic|Ds72z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hlzvx4~0 , soc_inst|m0_1|u_logic|Hlzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rjzvx4~1 , soc_inst|m0_1|u_logic|Rjzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uhzvx4~1 , soc_inst|m0_1|u_logic|Uhzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uhzvx4~0 , soc_inst|m0_1|u_logic|Uhzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Joi3z4 , soc_inst|m0_1|u_logic|Joi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Umi3z4 , soc_inst|m0_1|u_logic|Umi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M782z4~0 , soc_inst|m0_1|u_logic|M782z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sz23z4 , soc_inst|m0_1|u_logic|Sz23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq13z4 , soc_inst|m0_1|u_logic|Jq13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~1 , soc_inst|m0_1|u_logic|P582z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fli3z4 , soc_inst|m0_1|u_logic|Fli3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE , soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~2 , soc_inst|m0_1|u_logic|P582z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ki53z4 , soc_inst|m0_1|u_logic|Ki53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B943z4~feeder , soc_inst|m0_1|u_logic|B943z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B943z4 , soc_inst|m0_1|u_logic|B943z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~0 , soc_inst|m0_1|u_logic|P582z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~3 , soc_inst|m0_1|u_logic|P582z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtnvx4~0 , soc_inst|m0_1|u_logic|Gtnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q9cwx4~0 , soc_inst|m0_1|u_logic|Q9cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yqzvx4~0 , soc_inst|m0_1|u_logic|Yqzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rqzvx4~0 , soc_inst|m0_1|u_logic|Rqzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C183z4 , soc_inst|m0_1|u_logic|C183z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R91xx4~0 , soc_inst|m0_1|u_logic|R91xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T31xx4~0 , soc_inst|m0_1|u_logic|T31xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~0 , soc_inst|m0_1|u_logic|Eacwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tr63z4 , soc_inst|m0_1|u_logic|Tr63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~7 , soc_inst|m0_1|u_logic|Eacwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE , soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~8 , soc_inst|m0_1|u_logic|Eacwx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE , soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9j2z4 , soc_inst|m0_1|u_logic|F9j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~1 , soc_inst|m0_1|u_logic|Eacwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~3 , soc_inst|m0_1|u_logic|Eacwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~4 , soc_inst|m0_1|u_logic|Eacwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B943z4~DUPLICATE , soc_inst|m0_1|u_logic|B943z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~2 , soc_inst|m0_1|u_logic|Eacwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qji3z4 , soc_inst|m0_1|u_logic|Qji3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~5 , soc_inst|m0_1|u_logic|Eacwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~6 , soc_inst|m0_1|u_logic|Eacwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~9 , soc_inst|m0_1|u_logic|Eacwx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~1 , soc_inst|m0_1|u_logic|Ny3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[24]~26 , soc_inst|ram_1|data_to_memory[24]~26, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][8] , soc_inst|switches_1|switch_store[1][8], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[24]~31 , soc_inst|interconnect_1|HRDATA[24]~31, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rkyvx4~0 , soc_inst|m0_1|u_logic|Rkyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I21wx4~0 , soc_inst|m0_1|u_logic|I21wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I21wx4 , soc_inst|m0_1|u_logic|I21wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~0 , soc_inst|m0_1|u_logic|Qz0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J773z4 , soc_inst|m0_1|u_logic|J773z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8o2z4 , soc_inst|m0_1|u_logic|N8o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~0 , soc_inst|m0_1|u_logic|Nrvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~2 , soc_inst|m0_1|u_logic|Nrvwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~3 , soc_inst|m0_1|u_logic|Nrvwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5o2z4 , soc_inst|m0_1|u_logic|J5o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jl93z4 , soc_inst|m0_1|u_logic|Jl93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~1 , soc_inst|m0_1|u_logic|Nrvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4 , soc_inst|m0_1|u_logic|Nrvwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~0 , soc_inst|m0_1|u_logic|Yxdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~1 , soc_inst|m0_1|u_logic|Yxdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~0 , soc_inst|m0_1|u_logic|Zndwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~0 , soc_inst|m0_1|u_logic|Nodwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~1 , soc_inst|m0_1|u_logic|Zndwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxe3z4 , soc_inst|m0_1|u_logic|Kxe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~25 , soc_inst|m0_1|u_logic|Add0~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqmvx4~0 , soc_inst|m0_1|u_logic|Tqmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aze3z4 , soc_inst|m0_1|u_logic|Aze3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2twx4~0 , soc_inst|m0_1|u_logic|I2twx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~0 , soc_inst|m0_1|u_logic|Khfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~1 , soc_inst|m0_1|u_logic|Khfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~2 , soc_inst|m0_1|u_logic|Khfwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~3 , soc_inst|m0_1|u_logic|Khfwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~0 , soc_inst|m0_1|u_logic|Ppzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~1 , soc_inst|m0_1|u_logic|Ppzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~2 , soc_inst|m0_1|u_logic|Oihvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~77 , soc_inst|m0_1|u_logic|Add2~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~73 , soc_inst|m0_1|u_logic|Add3~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rnovx4 , soc_inst|m0_1|u_logic|Rnovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C1lvx4~0 , soc_inst|m0_1|u_logic|C1lvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lgi3z4 , soc_inst|m0_1|u_logic|Lgi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE , soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Py72z4~1 , soc_inst|m0_1|u_logic|Py72z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhl2z4 , soc_inst|m0_1|u_logic|Xhl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M743z4 , soc_inst|m0_1|u_logic|M743z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE , soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Py72z4~0 , soc_inst|m0_1|u_logic|Py72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE , soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Csz2z4 , soc_inst|m0_1|u_logic|Csz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Py72z4~2 , soc_inst|m0_1|u_logic|Py72z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Igl2z4 , soc_inst|m0_1|u_logic|Igl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M082z4~0 , soc_inst|m0_1|u_logic|M082z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Py72z4~3 , soc_inst|m0_1|u_logic|Py72z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eq63z4~feeder , soc_inst|m0_1|u_logic|Eq63z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eq63z4 , soc_inst|m0_1|u_logic|Eq63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE , soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE , soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~1 , soc_inst|m0_1|u_logic|U7uwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3v2z4 , soc_inst|m0_1|u_logic|N3v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pbl2z4 , soc_inst|m0_1|u_logic|Pbl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C193z4 , soc_inst|m0_1|u_logic|C193z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Edl2z4 , soc_inst|m0_1|u_logic|Edl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~0 , soc_inst|m0_1|u_logic|U7uwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7uwx4 , soc_inst|m0_1|u_logic|U7uwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nozvx4~0 , soc_inst|m0_1|u_logic|Nozvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Znzvx4~0 , soc_inst|m0_1|u_logic|Znzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~0 , soc_inst|m0_1|u_logic|Xmzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~1 , soc_inst|m0_1|u_logic|Uozvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~0 , soc_inst|m0_1|u_logic|Uozvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~1 , soc_inst|m0_1|u_logic|Xmzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dy23z4 , soc_inst|m0_1|u_logic|Dy23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vg53z4 , soc_inst|m0_1|u_logic|Vg53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~3 , soc_inst|m0_1|u_logic|Kqzvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Csz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Csz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wo03z4 , soc_inst|m0_1|u_logic|Wo03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N71xx4~0 , soc_inst|m0_1|u_logic|N71xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~4 , soc_inst|m0_1|u_logic|Kqzvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~1 , soc_inst|m0_1|u_logic|Kqzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ab1xx4~0 , soc_inst|m0_1|u_logic|Ab1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V41xx4~0 , soc_inst|m0_1|u_logic|V41xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~2 , soc_inst|m0_1|u_logic|Kqzvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tel2z4 , soc_inst|m0_1|u_logic|Tel2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uo13z4 , soc_inst|m0_1|u_logic|Uo13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jc1xx4~0 , soc_inst|m0_1|u_logic|Jc1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~0 , soc_inst|m0_1|u_logic|Kqzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz73z4 , soc_inst|m0_1|u_logic|Nz73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~5 , soc_inst|m0_1|u_logic|Kqzvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eut2z4 , soc_inst|m0_1|u_logic|Eut2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~6 , soc_inst|m0_1|u_logic|Kqzvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~7 , soc_inst|m0_1|u_logic|Kqzvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4 , soc_inst|m0_1|u_logic|Kqzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4awx4~0 , soc_inst|m0_1|u_logic|J4awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Locvx4 , soc_inst|m0_1|u_logic|Locvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~57 , soc_inst|m0_1|u_logic|Add5~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~1 , soc_inst|m0_1|u_logic|Oihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~0 , soc_inst|m0_1|u_logic|Oihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpx2z4 , soc_inst|m0_1|u_logic|Zpx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~29 , soc_inst|m0_1|u_logic|Add2~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X543z4~DUPLICATE , soc_inst|m0_1|u_logic|X543z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gf53z4 , soc_inst|m0_1|u_logic|Gf53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~0 , soc_inst|m0_1|u_logic|Ds72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nqz2z4 , soc_inst|m0_1|u_logic|Nqz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE , soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~2 , soc_inst|m0_1|u_logic|Ds72z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7k2z4 , soc_inst|m0_1|u_logic|D7k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn13z4~feeder , soc_inst|m0_1|u_logic|Fn13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn13z4 , soc_inst|m0_1|u_logic|Fn13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow23z4 , soc_inst|m0_1|u_logic|Ow23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~1 , soc_inst|m0_1|u_logic|Ds72z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5k2z4~DUPLICATE , soc_inst|m0_1|u_logic|O5k2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Au72z4~0 , soc_inst|m0_1|u_logic|Au72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~3 , soc_inst|m0_1|u_logic|Ds72z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hlzvx4~0 , soc_inst|m0_1|u_logic|Hlzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wpcvx4 , soc_inst|m0_1|u_logic|Wpcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3awx4~0 , soc_inst|m0_1|u_logic|H3awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~5 , soc_inst|m0_1|u_logic|Add5~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~1 , soc_inst|m0_1|u_logic|Hihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~0 , soc_inst|m0_1|u_logic|Hihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lrx2z4 , soc_inst|m0_1|u_logic|Lrx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~21 , soc_inst|m0_1|u_logic|Add3~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nhzvx4 , soc_inst|m0_1|u_logic|Nhzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5lvx4~0 , soc_inst|m0_1|u_logic|R5lvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S8k2z4 , soc_inst|m0_1|u_logic|S8k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~1 , soc_inst|m0_1|u_logic|Djzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~3 , soc_inst|m0_1|u_logic|Djzvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE , soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~0 , soc_inst|m0_1|u_logic|Djzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X543z4 , soc_inst|m0_1|u_logic|X543z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V0k2z4 , soc_inst|m0_1|u_logic|V0k2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~2 , soc_inst|m0_1|u_logic|Djzvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yx73z4 , soc_inst|m0_1|u_logic|Yx73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~6 , soc_inst|m0_1|u_logic|Djzvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE , soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE , soc_inst|m0_1|u_logic|Po63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5k2z4 , soc_inst|m0_1|u_logic|O5k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz83z4 , soc_inst|m0_1|u_logic|Nz83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po63z4 , soc_inst|m0_1|u_logic|Po63z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~5 , soc_inst|m0_1|u_logic|Djzvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pst2z4 , soc_inst|m0_1|u_logic|Pst2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~6 , soc_inst|m0_1|u_logic|Djzvx4~6, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~7 , soc_inst|m0_1|u_logic|Djzvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~1 , soc_inst|m0_1|u_logic|Djzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE , soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7k2z4 , soc_inst|m0_1|u_logic|D7k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z3k2z4 , soc_inst|m0_1|u_logic|Z3k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~0 , soc_inst|m0_1|u_logic|Djzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE , soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hn03z4 , soc_inst|m0_1|u_logic|Hn03z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~4 , soc_inst|m0_1|u_logic|Djzvx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Djzvx4 , soc_inst|m0_1|u_logic|Djzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3awx4~0 , soc_inst|m0_1|u_logic|H3awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~89 , soc_inst|m0_1|u_logic|Add5~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zbbwx4~0 , soc_inst|m0_1|u_logic|Zbbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~0 , soc_inst|m0_1|u_logic|Cfzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~1 , soc_inst|m0_1|u_logic|Cfzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE , soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~0 , soc_inst|m0_1|u_logic|Pdbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmh3z4 , soc_inst|m0_1|u_logic|Hmh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An63z4 , soc_inst|m0_1|u_logic|An63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE , soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~7 , soc_inst|m0_1|u_logic|Pdbwx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~8 , soc_inst|m0_1|u_logic|Pdbwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE , soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd53z4 , soc_inst|m0_1|u_logic|Rd53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~3 , soc_inst|m0_1|u_logic|Pdbwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I443z4 , soc_inst|m0_1|u_logic|I443z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4 , soc_inst|m0_1|u_logic|Gfq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~2 , soc_inst|m0_1|u_logic|Pdbwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~4 , soc_inst|m0_1|u_logic|Pdbwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql13z4 , soc_inst|m0_1|u_logic|Ql13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~1 , soc_inst|m0_1|u_logic|Pdbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skh3z4 , soc_inst|m0_1|u_logic|Skh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djh3z4 , soc_inst|m0_1|u_logic|Djh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~5 , soc_inst|m0_1|u_logic|Pdbwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~6 , soc_inst|m0_1|u_logic|Pdbwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4 , soc_inst|m0_1|u_logic|Pdbwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yih2z4~0 , soc_inst|m0_1|u_logic|Yih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~85 , soc_inst|m0_1|u_logic|Add5~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~1 , soc_inst|m0_1|u_logic|Mdzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fdzvx4~0 , soc_inst|m0_1|u_logic|Fdzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jlo2z4~feeder , soc_inst|m0_1|u_logic|Jlo2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~10 , soc_inst|m0_1|u_logic|hwdata_o~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ynvvx4 , soc_inst|m0_1|u_logic|Ynvvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~18 , soc_inst|m0_1|u_logic|hwdata_o~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~1 , soc_inst|m0_1|u_logic|M5mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hzj2z4 , soc_inst|m0_1|u_logic|Hzj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[26]~8 , soc_inst|ram_1|data_to_memory[26]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[2]~7 , soc_inst|ram_1|data_to_memory[2]~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7qwx4~0 , soc_inst|m0_1|u_logic|T7qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~0 , soc_inst|m0_1|u_logic|Jkmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F7qwx4 , soc_inst|m0_1|u_logic|F7qwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rro2z4 , soc_inst|m0_1|u_logic|Rro2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uu83z4 , soc_inst|m0_1|u_logic|Uu83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~1 , soc_inst|m0_1|u_logic|Saqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vuo2z4 , soc_inst|m0_1|u_logic|Vuo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj63z4 , soc_inst|m0_1|u_logic|Wj63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~0 , soc_inst|m0_1|u_logic|Saqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gto2z4~feeder , soc_inst|m0_1|u_logic|Gto2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gto2z4 , soc_inst|m0_1|u_logic|Gto2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~3 , soc_inst|m0_1|u_logic|Saqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ft73z4 , soc_inst|m0_1|u_logic|Ft73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~2 , soc_inst|m0_1|u_logic|Saqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4 , soc_inst|m0_1|u_logic|Saqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~0 , soc_inst|m0_1|u_logic|Kepwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejm2z4 , soc_inst|m0_1|u_logic|Ejm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~3 , soc_inst|m0_1|u_logic|Cawwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr73z4 , soc_inst|m0_1|u_logic|Rr73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~2 , soc_inst|m0_1|u_logic|Cawwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~0 , soc_inst|m0_1|u_logic|Cawwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~1 , soc_inst|m0_1|u_logic|Cawwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4 , soc_inst|m0_1|u_logic|Cawwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~0 , soc_inst|m0_1|u_logic|Jiowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~1 , soc_inst|m0_1|u_logic|Kepwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jlo2z4 , soc_inst|m0_1|u_logic|Jlo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk13z4~feeder , soc_inst|m0_1|u_logic|Bk13z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE , soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk13z4 , soc_inst|m0_1|u_logic|Bk13z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~0 , soc_inst|m0_1|u_logic|Rtpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4 , soc_inst|m0_1|u_logic|Ujo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~1 , soc_inst|m0_1|u_logic|Rtpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fio2z4~feeder , soc_inst|m0_1|u_logic|Fio2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fio2z4 , soc_inst|m0_1|u_logic|Fio2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|T243z4 , soc_inst|m0_1|u_logic|T243z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~2 , soc_inst|m0_1|u_logic|Rtpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE , soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc53z4 , soc_inst|m0_1|u_logic|Cc53z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kt23z4 , soc_inst|m0_1|u_logic|Kt23z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~3 , soc_inst|m0_1|u_logic|Rtpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~1 , soc_inst|m0_1|u_logic|Rtpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yoz2z4 , soc_inst|m0_1|u_logic|Yoz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Noo2z4 , soc_inst|m0_1|u_logic|Noo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sl03z4 , soc_inst|m0_1|u_logic|Sl03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~4 , soc_inst|m0_1|u_logic|Rtpvx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uu73z4 , soc_inst|m0_1|u_logic|Uu73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uyu2z4 , soc_inst|m0_1|u_logic|Uyu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~6 , soc_inst|m0_1|u_logic|Rtpvx4~6, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ymo2z4 , soc_inst|m0_1|u_logic|Ymo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw83z4 , soc_inst|m0_1|u_logic|Jw83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE , soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~5 , soc_inst|m0_1|u_logic|Rtpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~6 , soc_inst|m0_1|u_logic|Rtpvx4~6, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~7 , soc_inst|m0_1|u_logic|Rtpvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sl03z4 , soc_inst|m0_1|u_logic|Sl03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yoz2z4 , soc_inst|m0_1|u_logic|Yoz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~4 , soc_inst|m0_1|u_logic|Rtpvx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4 , soc_inst|m0_1|u_logic|Rtpvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~12 , soc_inst|m0_1|u_logic|hwdata_o~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[29]~22 , soc_inst|ram_1|data_to_memory[29]~22, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[13]~21 , soc_inst|ram_1|data_to_memory[13]~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~0 , soc_inst|m0_1|u_logic|Hxmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~1 , soc_inst|m0_1|u_logic|Hxmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~0 , soc_inst|m0_1|u_logic|Mb1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~1 , soc_inst|m0_1|u_logic|Mb1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~81 , soc_inst|m0_1|u_logic|Add2~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~109 , soc_inst|m0_1|u_logic|Add2~109, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~1 , soc_inst|m0_1|u_logic|Nehvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~0 , soc_inst|m0_1|u_logic|Nehvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tme3z4 , soc_inst|m0_1|u_logic|Tme3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9jvx4~0 , soc_inst|m0_1|u_logic|A9jvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Slr2z4 , soc_inst|m0_1|u_logic|Slr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ty92z4~0 , soc_inst|m0_1|u_logic|Ty92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5q2z4 , soc_inst|m0_1|u_logic|U5q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D603z4 , soc_inst|m0_1|u_logic|D603z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X213z4 , soc_inst|m0_1|u_logic|X213z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~2 , soc_inst|m0_1|u_logic|Ww92z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~0 , soc_inst|m0_1|u_logic|Ww92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O723z4 , soc_inst|m0_1|u_logic|O723z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xg33z4 , soc_inst|m0_1|u_logic|Xg33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~1 , soc_inst|m0_1|u_logic|Ww92z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~3 , soc_inst|m0_1|u_logic|Ww92z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C61wx4~0 , soc_inst|m0_1|u_logic|C61wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~101 , soc_inst|m0_1|u_logic|Add2~101, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rix2z4 , soc_inst|m0_1|u_logic|Rix2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~0 , soc_inst|m0_1|u_logic|Xjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~1 , soc_inst|m0_1|u_logic|Xjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~89 , soc_inst|m0_1|u_logic|Add3~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~69 , soc_inst|m0_1|u_logic|Add3~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~65 , soc_inst|m0_1|u_logic|Add3~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug0wx4 , soc_inst|m0_1|u_logic|Ug0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M0kvx4~0 , soc_inst|m0_1|u_logic|M0kvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tzg3z4 , soc_inst|m0_1|u_logic|Tzg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~1 , soc_inst|m0_1|u_logic|Hk0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~2 , soc_inst|m0_1|u_logic|Hk0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~4 , soc_inst|m0_1|u_logic|Hk0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~5 , soc_inst|m0_1|u_logic|Hk0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4 , soc_inst|m0_1|u_logic|Hk0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wh0wx4~0 , soc_inst|m0_1|u_logic|Wh0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~0 , soc_inst|m0_1|u_logic|Bh0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ia0wx4 , soc_inst|m0_1|u_logic|Ia0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4~0 , soc_inst|m0_1|u_logic|Tj0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4 , soc_inst|m0_1|u_logic|Tj0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~1 , soc_inst|m0_1|u_logic|Bh0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4 , soc_inst|m0_1|u_logic|Pwg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hqg3z4 , soc_inst|m0_1|u_logic|Hqg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~7 , soc_inst|m0_1|u_logic|Hk0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~6 , soc_inst|m0_1|u_logic|Hk0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~8 , soc_inst|m0_1|u_logic|Hk0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9awx4~1 , soc_inst|m0_1|u_logic|M9awx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tjlwx4~0 , soc_inst|m0_1|u_logic|Tjlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~1 , soc_inst|m0_1|u_logic|Ldhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B9g3z4 , soc_inst|m0_1|u_logic|B9g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~0 , soc_inst|m0_1|u_logic|Gehvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~1 , soc_inst|m0_1|u_logic|Gehvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Foe3z4 , soc_inst|m0_1|u_logic|Foe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fc0wx4 , soc_inst|m0_1|u_logic|Fc0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5kvx4~0 , soc_inst|m0_1|u_logic|B5kvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L733z4~DUPLICATE , soc_inst|m0_1|u_logic|L733z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~1 , soc_inst|m0_1|u_logic|Zh82z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~0 , soc_inst|m0_1|u_logic|Zh82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~2 , soc_inst|m0_1|u_logic|Zh82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5n2z4 , soc_inst|m0_1|u_logic|C5n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj82z4~0 , soc_inst|m0_1|u_logic|Wj82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~3 , soc_inst|m0_1|u_logic|Zh82z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N90wx4~0 , soc_inst|m0_1|u_logic|N90wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J70wx4~1 , soc_inst|m0_1|u_logic|J70wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J70wx4~2 , soc_inst|m0_1|u_logic|J70wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4~0 , soc_inst|m0_1|u_logic|Ba0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4 , soc_inst|m0_1|u_logic|Ba0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J70wx4~0 , soc_inst|m0_1|u_logic|J70wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V883z4 , soc_inst|m0_1|u_logic|V883z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~7 , soc_inst|m0_1|u_logic|Wa0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~6 , soc_inst|m0_1|u_logic|Wa0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~8 , soc_inst|m0_1|u_logic|Wa0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E5awx4~1 , soc_inst|m0_1|u_logic|E5awx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~0 , soc_inst|m0_1|u_logic|Vihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~1 , soc_inst|m0_1|u_logic|Vihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nox2z4 , soc_inst|m0_1|u_logic|Nox2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C70wx4 , soc_inst|m0_1|u_logic|C70wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q9kvx4~0 , soc_inst|m0_1|u_logic|Q9kvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zfh3z4 , soc_inst|m0_1|u_logic|Zfh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bf9wx4~0 , soc_inst|m0_1|u_logic|Bf9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4j2z4 , soc_inst|m0_1|u_logic|M4j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE , soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgf3z4 , soc_inst|m0_1|u_logic|Pgf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~0 , soc_inst|m0_1|u_logic|Bc82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tjf3z4 , soc_inst|m0_1|u_logic|Tjf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilf3z4 , soc_inst|m0_1|u_logic|Ilf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~1 , soc_inst|m0_1|u_logic|Bc82z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ftf3z4 , soc_inst|m0_1|u_logic|Ftf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qrf3z4 , soc_inst|m0_1|u_logic|Qrf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~2 , soc_inst|m0_1|u_logic|Bc82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uuf3z4 , soc_inst|m0_1|u_logic|Uuf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~3 , soc_inst|m0_1|u_logic|Bc82z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~4 , soc_inst|m0_1|u_logic|Bc82z4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ntnvx4~0 , soc_inst|m0_1|u_logic|Ntnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6cwx4~0 , soc_inst|m0_1|u_logic|D6cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Va3wx4~0 , soc_inst|m0_1|u_logic|Va3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fa2wx4~0 , soc_inst|m0_1|u_logic|Fa2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fpi2z4 , soc_inst|m0_1|u_logic|Fpi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~0 , soc_inst|m0_1|u_logic|R6cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S652z4~0 , soc_inst|m0_1|u_logic|S652z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W852z4~0 , soc_inst|m0_1|u_logic|W852z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G752z4~0 , soc_inst|m0_1|u_logic|G752z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P852z4~0 , soc_inst|m0_1|u_logic|P852z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~4 , soc_inst|m0_1|u_logic|R6cwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE , soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~1 , soc_inst|m0_1|u_logic|R6cwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I852z4~0 , soc_inst|m0_1|u_logic|I852z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M352z4~0 , soc_inst|m0_1|u_logic|M352z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T352z4~0 , soc_inst|m0_1|u_logic|T352z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C552z4~0 , soc_inst|m0_1|u_logic|C552z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O452z4~0 , soc_inst|m0_1|u_logic|O452z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~3 , soc_inst|m0_1|u_logic|R6cwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eif3z4 , soc_inst|m0_1|u_logic|Eif3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~2 , soc_inst|m0_1|u_logic|R6cwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~5 , soc_inst|m0_1|u_logic|R6cwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[23]~0 , soc_inst|ram_1|data_to_memory[23]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V4ovx4~0 , soc_inst|m0_1|u_logic|V4ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4 , soc_inst|m0_1|u_logic|Vfd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~0 , soc_inst|m0_1|u_logic|R6xwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~1 , soc_inst|m0_1|u_logic|R6xwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~2 , soc_inst|m0_1|u_logic|R6xwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jca3z4~0 , soc_inst|m0_1|u_logic|Jca3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jca3z4 , soc_inst|m0_1|u_logic|Jca3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~5 , soc_inst|m0_1|u_logic|Add0~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zmmvx4~0 , soc_inst|m0_1|u_logic|Zmmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uei3z4 , soc_inst|m0_1|u_logic|Uei3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][7] , soc_inst|switches_1|switch_store[1][7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[23]~3 , soc_inst|ram_1|data_to_memory[23]~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[23]~8 , soc_inst|interconnect_1|HRDATA[23]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Walwx4~0 , soc_inst|m0_1|u_logic|Walwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Walwx4~1 , soc_inst|m0_1|u_logic|Walwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U72wx4~0 , soc_inst|m0_1|u_logic|U72wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jwf3z4 , soc_inst|m0_1|u_logic|Jwf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~97 , soc_inst|m0_1|u_logic|Add2~97, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~1 , soc_inst|m0_1|u_logic|Sdhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~2 , soc_inst|m0_1|u_logic|Sdhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~0 , soc_inst|m0_1|u_logic|Sdhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~93 , soc_inst|m0_1|u_logic|Add2~93, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~0 , soc_inst|m0_1|u_logic|Qjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I21wx4~0 , soc_inst|m0_1|u_logic|I21wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I21wx4 , soc_inst|m0_1|u_logic|I21wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~1 , soc_inst|m0_1|u_logic|Qjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dkx2z4 , soc_inst|m0_1|u_logic|Dkx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vpovx4 , soc_inst|m0_1|u_logic|Vpovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eijvx4~0 , soc_inst|m0_1|u_logic|Eijvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ym93z4 , soc_inst|m0_1|u_logic|Ym93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~4 , soc_inst|m0_1|u_logic|W21wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skv2z4~feeder , soc_inst|m0_1|u_logic|Skv2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skv2z4 , soc_inst|m0_1|u_logic|Skv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jbu2z4 , soc_inst|m0_1|u_logic|Jbu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~0 , soc_inst|m0_1|u_logic|W21wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5o2z4 , soc_inst|m0_1|u_logic|J5o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~2 , soc_inst|m0_1|u_logic|W21wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8o2z4 , soc_inst|m0_1|u_logic|N8o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~1 , soc_inst|m0_1|u_logic|W21wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O403z4 , soc_inst|m0_1|u_logic|O403z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~5 , soc_inst|m0_1|u_logic|W21wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~6 , soc_inst|m0_1|u_logic|W21wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~0 , soc_inst|m0_1|u_logic|Kfawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~1 , soc_inst|m0_1|u_logic|Kfawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G11wx4~1 , soc_inst|m0_1|u_logic|G11wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G11wx4~0 , soc_inst|m0_1|u_logic|G11wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~1 , soc_inst|m0_1|u_logic|Qz0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~2 , soc_inst|m0_1|u_logic|Qz0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~0 , soc_inst|m0_1|u_logic|Qz0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6o2z4 , soc_inst|m0_1|u_logic|Y6o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~3 , soc_inst|m0_1|u_logic|Nrvwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~0 , soc_inst|m0_1|u_logic|Nrvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jl93z4 , soc_inst|m0_1|u_logic|Jl93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~1 , soc_inst|m0_1|u_logic|Nrvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE , soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~2 , soc_inst|m0_1|u_logic|Nrvwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4 , soc_inst|m0_1|u_logic|Nrvwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~0 , soc_inst|m0_1|u_logic|Yxdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~0 , soc_inst|m0_1|u_logic|X0ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~1 , soc_inst|m0_1|u_logic|X0ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9a3z4 , soc_inst|m0_1|u_logic|C9a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wspvx4 , soc_inst|m0_1|u_logic|Wspvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P37wx4~1 , soc_inst|m0_1|u_logic|P37wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P37wx4~0 , soc_inst|m0_1|u_logic|P37wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~0 , soc_inst|m0_1|u_logic|Zqpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~1 , soc_inst|m0_1|u_logic|Zqpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhc2z4~0 , soc_inst|m0_1|u_logic|Fhc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~2 , soc_inst|m0_1|u_logic|Zqpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~3 , soc_inst|m0_1|u_logic|Zqpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lqpvx4~0 , soc_inst|m0_1|u_logic|Lqpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J00wx4~0 , soc_inst|m0_1|u_logic|J00wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~0 , soc_inst|m0_1|u_logic|Gpcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~1 , soc_inst|m0_1|u_logic|Gpcwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J00wx4~1 , soc_inst|m0_1|u_logic|J00wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L6nwx4 , soc_inst|m0_1|u_logic|L6nwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wjyvx4~0 , soc_inst|m0_1|u_logic|Wjyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~0 , soc_inst|m0_1|u_logic|Asdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~1 , soc_inst|m0_1|u_logic|Xtdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4 , soc_inst|m0_1|u_logic|Nn0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[19]~14 , soc_inst|m0_1|u_logic|hwdata_o[19]~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8m2z4 , soc_inst|m0_1|u_logic|L8m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4 , soc_inst|m0_1|u_logic|Yw0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[17]~17 , soc_inst|m0_1|u_logic|hwdata_o[17]~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B2i3z4 , soc_inst|m0_1|u_logic|B2i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gdo2z4 , soc_inst|m0_1|u_logic|Gdo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bge3z4~feeder , soc_inst|m0_1|u_logic|Bge3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bge3z4 , soc_inst|m0_1|u_logic|Bge3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add0~13 , soc_inst|m0_1|u_logic|Add0~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mqmvx4~0 , soc_inst|m0_1|u_logic|Mqmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zva3z4 , soc_inst|m0_1|u_logic|Zva3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add0~49 , soc_inst|m0_1|u_logic|Add0~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bge3z4 , soc_inst|m0_1|u_logic|Bge3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fqmvx4~0 , soc_inst|m0_1|u_logic|Fqmvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|She3z4 , soc_inst|m0_1|u_logic|She3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~1 , soc_inst|m0_1|u_logic|Whlwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~0 , soc_inst|m0_1|u_logic|Whlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~2 , soc_inst|m0_1|u_logic|Whlwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~3 , soc_inst|m0_1|u_logic|Whlwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L6nwx4 , soc_inst|m0_1|u_logic|L6nwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wjyvx4~0 , soc_inst|m0_1|u_logic|Wjyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~0 , soc_inst|m0_1|u_logic|U0vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~1 , soc_inst|m0_1|u_logic|Amyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~0 , soc_inst|m0_1|u_logic|Amyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~2 , soc_inst|m0_1|u_logic|Amyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ykyvx4~0 , soc_inst|m0_1|u_logic|Ykyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~1 , soc_inst|m0_1|u_logic|U0vvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~2 , soc_inst|m0_1|u_logic|U0vvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I30wx4~2 , soc_inst|m0_1|u_logic|I30wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE , soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hbv2z4 , soc_inst|m0_1|u_logic|Hbv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~3 , soc_inst|m0_1|u_logic|Ebbwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T0m2z4 , soc_inst|m0_1|u_logic|T0m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yb93z4 , soc_inst|m0_1|u_logic|Yb93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~1 , soc_inst|m0_1|u_logic|Ebbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1u2z4 , soc_inst|m0_1|u_logic|Y1u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H783z4 , soc_inst|m0_1|u_logic|H783z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~2 , soc_inst|m0_1|u_logic|Ebbwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx63z4 , soc_inst|m0_1|u_logic|Yx63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V3m2z4 , soc_inst|m0_1|u_logic|V3m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~0 , soc_inst|m0_1|u_logic|Ebbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4 , soc_inst|m0_1|u_logic|Ebbwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~0 , soc_inst|m0_1|u_logic|Jmdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~1 , soc_inst|m0_1|u_logic|Jmdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~0 , soc_inst|m0_1|u_logic|Q6twx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~1 , soc_inst|m0_1|u_logic|Q6twx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~0 , soc_inst|m0_1|u_logic|Rhfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~1 , soc_inst|m0_1|u_logic|Rhfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~2 , soc_inst|m0_1|u_logic|Rhfwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4~0 , soc_inst|m0_1|u_logic|Mx0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4 , soc_inst|m0_1|u_logic|Mx0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~89 , soc_inst|m0_1|u_logic|Add2~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~0 , soc_inst|m0_1|u_logic|Jjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~1 , soc_inst|m0_1|u_logic|Jjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Plx2z4 , soc_inst|m0_1|u_logic|Plx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~0 , soc_inst|m0_1|u_logic|Cjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][2] , soc_inst|switches_1|switch_store[1][2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[18]~6 , soc_inst|ram_1|data_to_memory[18]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[10]~5 , soc_inst|ram_1|data_to_memory[10]~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[18]~13 , soc_inst|interconnect_1|HRDATA[18]~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~0 , soc_inst|m0_1|u_logic|Ajmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~1 , soc_inst|m0_1|u_logic|Ajmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~2 , soc_inst|m0_1|u_logic|Ajmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~0 , soc_inst|m0_1|u_logic|Qkmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[10]~12 , soc_inst|interconnect_1|HRDATA[10]~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~1 , soc_inst|m0_1|u_logic|Qkmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~2 , soc_inst|m0_1|u_logic|Qkmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~3 , soc_inst|m0_1|u_logic|Qkmwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Et0wx4~0 , soc_inst|m0_1|u_logic|Et0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Et0wx4 , soc_inst|m0_1|u_logic|Et0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~1 , soc_inst|m0_1|u_logic|Cjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bnx2z4 , soc_inst|m0_1|u_logic|Bnx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fq0wx4 , soc_inst|m0_1|u_logic|Fq0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Irjvx4~0 , soc_inst|m0_1|u_logic|Irjvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W5p2z4 , soc_inst|m0_1|u_logic|W5p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~1 , soc_inst|m0_1|u_logic|St0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu53z4 , soc_inst|m0_1|u_logic|Wu53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~3 , soc_inst|m0_1|u_logic|St0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~5 , soc_inst|m0_1|u_logic|St0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~0 , soc_inst|m0_1|u_logic|Ecawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~1 , soc_inst|m0_1|u_logic|Ecawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~1 , soc_inst|m0_1|u_logic|Cs0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~0 , soc_inst|m0_1|u_logic|Cs0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~1 , soc_inst|m0_1|u_logic|Mq0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~2 , soc_inst|m0_1|u_logic|Mq0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~0 , soc_inst|m0_1|u_logic|Mq0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psn2z4 , soc_inst|m0_1|u_logic|Psn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~0 , soc_inst|m0_1|u_logic|H1qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8u2z4 , soc_inst|m0_1|u_logic|F8u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~1 , soc_inst|m0_1|u_logic|H1qwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1qwx4 , soc_inst|m0_1|u_logic|H1qwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~0 , soc_inst|m0_1|u_logic|Eudwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~1 , soc_inst|m0_1|u_logic|Eudwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[30]~29 , soc_inst|ram_1|data_to_memory[30]~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qapwx4~0 , soc_inst|m0_1|u_logic|Qapwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~0 , soc_inst|m0_1|u_logic|D7iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~1 , soc_inst|m0_1|u_logic|D7iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~0 , soc_inst|m0_1|u_logic|Zuzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~1 , soc_inst|m0_1|u_logic|Zuzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~1 , soc_inst|m0_1|u_logic|Oszvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mvm2z4 , soc_inst|m0_1|u_logic|Mvm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ytm2z4 , soc_inst|m0_1|u_logic|Ytm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G493z4~DUPLICATE , soc_inst|m0_1|u_logic|G493z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~0 , soc_inst|m0_1|u_logic|Qowwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It63z4~DUPLICATE , soc_inst|m0_1|u_logic|It63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~1 , soc_inst|m0_1|u_logic|Qowwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qowwx4 , soc_inst|m0_1|u_logic|Qowwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H133z4 , soc_inst|m0_1|u_logic|H133z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yr13z4 , soc_inst|m0_1|u_logic|Yr13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lq03z4 , soc_inst|m0_1|u_logic|Lq03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~2 , soc_inst|m0_1|u_logic|Uvzvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zj53z4 , soc_inst|m0_1|u_logic|Zj53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtz2z4 , soc_inst|m0_1|u_logic|Rtz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE , soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~1 , soc_inst|m0_1|u_logic|Uvzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~0 , soc_inst|m0_1|u_logic|Uvzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4 , soc_inst|m0_1|u_logic|Uvzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~4 , soc_inst|m0_1|u_logic|hwdata_o~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7b3z4~0 , soc_inst|m0_1|u_logic|J7b3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE , soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ormvx4~0 , soc_inst|m0_1|u_logic|Ormvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z8b3z4 , soc_inst|m0_1|u_logic|Z8b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hrmvx4~0 , soc_inst|m0_1|u_logic|Hrmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dhb3z4 , soc_inst|m0_1|u_logic|Dhb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~1 , soc_inst|m0_1|u_logic|Oytvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~3 , soc_inst|m0_1|u_logic|Oytvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~2 , soc_inst|m0_1|u_logic|Oytvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~4 , soc_inst|m0_1|u_logic|Oytvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE , soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~0 , soc_inst|m0_1|u_logic|Oytvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4 , soc_inst|m0_1|u_logic|Oytvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Etmvx4~0 , soc_inst|m0_1|u_logic|Etmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F2o2z4 , soc_inst|m0_1|u_logic|F2o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mxtvx4 , soc_inst|m0_1|u_logic|Mxtvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~37 , soc_inst|m0_1|u_logic|Add0~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7a3z4 , soc_inst|m0_1|u_logic|L7a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ypmvx4~0 , soc_inst|m0_1|u_logic|Ypmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iua3z4 , soc_inst|m0_1|u_logic|Iua3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~61 , soc_inst|m0_1|u_logic|Add0~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5g3z4 , soc_inst|m0_1|u_logic|T5g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rpmvx4~0 , soc_inst|m0_1|u_logic|Rpmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7g3z4 , soc_inst|m0_1|u_logic|K7g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~81 , soc_inst|m0_1|u_logic|Add0~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5a3z4 , soc_inst|m0_1|u_logic|U5a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kpmvx4~0 , soc_inst|m0_1|u_logic|Kpmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rsa3z4 , soc_inst|m0_1|u_logic|Rsa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~1 , soc_inst|m0_1|u_logic|Add0~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4a3z4~0 , soc_inst|m0_1|u_logic|D4a3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4a3z4 , soc_inst|m0_1|u_logic|D4a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dpmvx4~0 , soc_inst|m0_1|u_logic|Dpmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ara3z4 , soc_inst|m0_1|u_logic|Ara3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~73 , soc_inst|m0_1|u_logic|Add0~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Womvx4~0 , soc_inst|m0_1|u_logic|Womvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xeo2z4 , soc_inst|m0_1|u_logic|Xeo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~29 , soc_inst|m0_1|u_logic|Add0~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pomvx4~0 , soc_inst|m0_1|u_logic|Pomvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S3i3z4 , soc_inst|m0_1|u_logic|S3i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~17 , soc_inst|m0_1|u_logic|Add0~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4 , soc_inst|m0_1|u_logic|St0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[18]~13 , soc_inst|m0_1|u_logic|hwdata_o[18]~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xyn2z4 , soc_inst|m0_1|u_logic|Xyn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iomvx4~0 , soc_inst|m0_1|u_logic|Iomvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O0o2z4 , soc_inst|m0_1|u_logic|O0o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~53 , soc_inst|m0_1|u_logic|Add0~53, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bomvx4~0 , soc_inst|m0_1|u_logic|Bomvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jpa3z4 , soc_inst|m0_1|u_logic|Jpa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~1 , soc_inst|m0_1|u_logic|Rilwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~2 , soc_inst|m0_1|u_logic|Rilwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~0 , soc_inst|m0_1|u_logic|Ll1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~1 , soc_inst|m0_1|u_logic|Ll1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~0 , soc_inst|m0_1|u_logic|Aj1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ibe3z4 , soc_inst|m0_1|u_logic|Ibe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~2 , soc_inst|m0_1|u_logic|Cc9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9e3z4 , soc_inst|m0_1|u_logic|U9e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ge9wx4~0 , soc_inst|m0_1|u_logic|Ge9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~0 , soc_inst|m0_1|u_logic|Cc9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyd3z4 , soc_inst|m0_1|u_logic|Tyd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~1 , soc_inst|m0_1|u_logic|Cc9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~3 , soc_inst|m0_1|u_logic|Cc9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qk1wx4~0 , soc_inst|m0_1|u_logic|Qk1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owovx4 , soc_inst|m0_1|u_logic|Owovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[9] , soc_inst|ram_1|saved_word_address[9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[9]~9 , soc_inst|ram_1|memory.raddr_a[9]~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[7]~11 , soc_inst|interconnect_1|HRDATA[7]~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~0 , soc_inst|m0_1|u_logic|Wywwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~1 , soc_inst|m0_1|u_logic|Wywwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~2 , soc_inst|m0_1|u_logic|Wywwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~3 , soc_inst|m0_1|u_logic|Wywwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G9lwx4~0 , soc_inst|m0_1|u_logic|G9lwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~0 , soc_inst|m0_1|u_logic|R5zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~1 , soc_inst|m0_1|u_logic|R5zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~2 , soc_inst|m0_1|u_logic|R5zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~45 , soc_inst|m0_1|u_logic|Add0~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4 , soc_inst|m0_1|u_logic|Hk0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[20]~16 , soc_inst|m0_1|u_logic|hwdata_o[20]~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I1h3z4 , soc_inst|m0_1|u_logic|I1h3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Unmvx4~0 , soc_inst|m0_1|u_logic|Unmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z2h3z4 , soc_inst|m0_1|u_logic|Z2h3z4, de1_soc_wrapper, 1
+instance = comp, \SW[4]~input , SW[4]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][4] , soc_inst|switches_1|switch_store[1][4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjvwx4~0 , soc_inst|m0_1|u_logic|Sjvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~0 , soc_inst|m0_1|u_logic|Ntmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~1 , soc_inst|m0_1|u_logic|Ntmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[28]~14 , soc_inst|ram_1|data_to_memory[28]~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[12]~13 , soc_inst|ram_1|data_to_memory[12]~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~0 , soc_inst|m0_1|u_logic|Lsmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Beowx4~1 , soc_inst|m0_1|u_logic|Beowx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X7ewx4~0 , soc_inst|m0_1|u_logic|X7ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~1 , soc_inst|m0_1|u_logic|Lsmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~0 , soc_inst|m0_1|u_logic|Qmdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~1 , soc_inst|m0_1|u_logic|Qmdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U1uvx4 , soc_inst|m0_1|u_logic|U1uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Adt2z4 , soc_inst|m0_1|u_logic|Adt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~0 , soc_inst|m0_1|u_logic|Dewwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~1 , soc_inst|m0_1|u_logic|Dewwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~0 , soc_inst|m0_1|u_logic|Gtmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~1 , soc_inst|m0_1|u_logic|Gtmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~2 , soc_inst|m0_1|u_logic|Gtmwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~0 , soc_inst|m0_1|u_logic|Leuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~1 , soc_inst|m0_1|u_logic|Leuvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C00wx4~0 , soc_inst|m0_1|u_logic|C00wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ka93z4 , soc_inst|m0_1|u_logic|Ka93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S2r2z4 , soc_inst|m0_1|u_logic|S2r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T9v2z4 , soc_inst|m0_1|u_logic|T9v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1r2z4 , soc_inst|m0_1|u_logic|E1r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4~0 , soc_inst|m0_1|u_logic|Ixxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4r2z4 , soc_inst|m0_1|u_logic|G4r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K0u2z4 , soc_inst|m0_1|u_logic|K0u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kw63z4 , soc_inst|m0_1|u_logic|Kw63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T583z4 , soc_inst|m0_1|u_logic|T583z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4~1 , soc_inst|m0_1|u_logic|Ixxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4 , soc_inst|m0_1|u_logic|Ixxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svxwx4~0 , soc_inst|m0_1|u_logic|Svxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~0 , soc_inst|m0_1|u_logic|Mj7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~1 , soc_inst|m0_1|u_logic|Mj7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf63z4 , soc_inst|m0_1|u_logic|Gf63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~1 , soc_inst|m0_1|u_logic|Xowwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Grl2z4 , soc_inst|m0_1|u_logic|Grl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~0 , soc_inst|m0_1|u_logic|Xowwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xowwx4 , soc_inst|m0_1|u_logic|Xowwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~0 , soc_inst|m0_1|u_logic|Ok7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jl7wx4~0 , soc_inst|m0_1|u_logic|Jl7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~0 , soc_inst|m0_1|u_logic|Gftwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kw7wx4~1 , soc_inst|m0_1|u_logic|Kw7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cuxwx4~0 , soc_inst|m0_1|u_logic|Cuxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzdwx4~1 , soc_inst|m0_1|u_logic|Vzdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fq7wx4~0 , soc_inst|m0_1|u_logic|Fq7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tq7wx4~0 , soc_inst|m0_1|u_logic|Tq7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~0 , soc_inst|m0_1|u_logic|Uvdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~1 , soc_inst|m0_1|u_logic|Uvdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fwtwx4~0 , soc_inst|m0_1|u_logic|Fwtwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~0 , soc_inst|m0_1|u_logic|Xs7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~1 , soc_inst|m0_1|u_logic|Xs7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Et7wx4~0 , soc_inst|m0_1|u_logic|Et7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U18wx4~0 , soc_inst|m0_1|u_logic|U18wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nu7wx4~0 , soc_inst|m0_1|u_logic|Nu7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~2 , soc_inst|m0_1|u_logic|Dtpvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Po7wx4~0 , soc_inst|m0_1|u_logic|Po7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hr7wx4~0 , soc_inst|m0_1|u_logic|Hr7wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fc7wx4~0 , soc_inst|m0_1|u_logic|Fc7wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fc7wx4~1 , soc_inst|m0_1|u_logic|Fc7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cb3wx4~0 , soc_inst|m0_1|u_logic|Cb3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gci2z4 , soc_inst|m0_1|u_logic|Gci2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~0 , soc_inst|m0_1|u_logic|Y5zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~1 , soc_inst|m0_1|u_logic|Y5zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~2 , soc_inst|m0_1|u_logic|Y5zvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J3qvx4~0 , soc_inst|m0_1|u_logic|J3qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc63z4 , soc_inst|m0_1|u_logic|Cc63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~0 , soc_inst|m0_1|u_logic|Dtpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Koj2z4 , soc_inst|m0_1|u_logic|Koj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kt33z4 , soc_inst|m0_1|u_logic|Kt33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~2 , soc_inst|m0_1|u_logic|Nd3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa13z4 , soc_inst|m0_1|u_logic|Sa13z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Isi2z4 , soc_inst|m0_1|u_logic|Isi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~0 , soc_inst|m0_1|u_logic|N3ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4 , soc_inst|m0_1|u_logic|Lpu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~3 , soc_inst|m0_1|u_logic|N3ywx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgt2z4 , soc_inst|m0_1|u_logic|Cgt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~2 , soc_inst|m0_1|u_logic|N3ywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~1 , soc_inst|m0_1|u_logic|N3ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4 , soc_inst|m0_1|u_logic|N3ywx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2ewx4~0 , soc_inst|m0_1|u_logic|U2ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M7qwx4~0 , soc_inst|m0_1|u_logic|M7qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~0 , soc_inst|m0_1|u_logic|Mjlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~1 , soc_inst|m0_1|u_logic|Mjlwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4~0 , soc_inst|m0_1|u_logic|Bo0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4 , soc_inst|m0_1|u_logic|Bo0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zjq2z4 , soc_inst|m0_1|u_logic|Zjq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~0 , soc_inst|m0_1|u_logic|Ithvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~1 , soc_inst|m0_1|u_logic|Ithvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql0wx4 , soc_inst|m0_1|u_logic|Ql0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xvjvx4~0 , soc_inst|m0_1|u_logic|Xvjvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7p2z4 , soc_inst|m0_1|u_logic|L7p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~1 , soc_inst|m0_1|u_logic|Nn0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht53z4 , soc_inst|m0_1|u_logic|Ht53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE , soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~3 , soc_inst|m0_1|u_logic|Nn0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj43z4 , soc_inst|m0_1|u_logic|Yj43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9p2z4 , soc_inst|m0_1|u_logic|A9p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~2 , soc_inst|m0_1|u_logic|Nn0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~5 , soc_inst|m0_1|u_logic|Nn0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4 , soc_inst|m0_1|u_logic|Nn0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Un0wx4~0 , soc_inst|m0_1|u_logic|Un0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~1 , soc_inst|m0_1|u_logic|Xl0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~0 , soc_inst|m0_1|u_logic|Xl0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6u2z4 , soc_inst|m0_1|u_logic|Q6u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q273z4 , soc_inst|m0_1|u_logic|Q273z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE , soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~1 , soc_inst|m0_1|u_logic|Bjxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pap2z4 , soc_inst|m0_1|u_logic|Pap2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~0 , soc_inst|m0_1|u_logic|Bjxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4 , soc_inst|m0_1|u_logic|Bjxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~0 , soc_inst|m0_1|u_logic|Jtdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~1 , soc_inst|m0_1|u_logic|Jtdwx4~1, de1_soc_wrapper, 1
-instance = comp, \SW[1]~input , SW[1]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][1] , soc_inst|switches_1|switch_store[1][1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mbtwx4~0 , soc_inst|m0_1|u_logic|Mbtwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~0 , soc_inst|m0_1|u_logic|Bgfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~1 , soc_inst|m0_1|u_logic|Bgfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~0 , soc_inst|m0_1|u_logic|C2rvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~1 , soc_inst|m0_1|u_logic|C2rvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~2 , soc_inst|m0_1|u_logic|C2rvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~2 , soc_inst|m0_1|u_logic|Qppvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ukt2z4 , soc_inst|m0_1|u_logic|Ukt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug63z4 , soc_inst|m0_1|u_logic|Ug63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE , soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~1 , soc_inst|m0_1|u_logic|V7ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Txj2z4 , soc_inst|m0_1|u_logic|Txj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duu2z4 , soc_inst|m0_1|u_logic|Duu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~0 , soc_inst|m0_1|u_logic|V7ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V7ywx4 , soc_inst|m0_1|u_logic|V7ywx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A7ywx4~0 , soc_inst|m0_1|u_logic|A7ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D5ywx4~0 , soc_inst|m0_1|u_logic|D5ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F7qwx4 , soc_inst|m0_1|u_logic|F7qwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[26]~8 , soc_inst|ram_1|data_to_memory[26]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7qwx4~0 , soc_inst|m0_1|u_logic|T7qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~0 , soc_inst|m0_1|u_logic|Jkmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~1 , soc_inst|m0_1|u_logic|Jkmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yjzvx4~0 , soc_inst|m0_1|u_logic|Yjzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yjzvx4~1 , soc_inst|m0_1|u_logic|Yjzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~2 , soc_inst|m0_1|u_logic|Hihvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~1 , soc_inst|m0_1|u_logic|Hihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~0 , soc_inst|m0_1|u_logic|Hihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lrx2z4 , soc_inst|m0_1|u_logic|Lrx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~21 , soc_inst|m0_1|u_logic|Add3~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nhzvx4 , soc_inst|m0_1|u_logic|Nhzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5lvx4~0 , soc_inst|m0_1|u_logic|R5lvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S8k2z4 , soc_inst|m0_1|u_logic|S8k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~0 , soc_inst|m0_1|u_logic|Fm72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4 , soc_inst|m0_1|u_logic|Wnh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~0 , soc_inst|m0_1|u_logic|Nd3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE , soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pfz2z4 , soc_inst|m0_1|u_logic|Pfz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ehz2z4 , soc_inst|m0_1|u_logic|Ehz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~4 , soc_inst|m0_1|u_logic|Nd3wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~1 , soc_inst|m0_1|u_logic|Sndwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J9d3z4 , soc_inst|m0_1|u_logic|J9d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~0 , soc_inst|m0_1|u_logic|Wkpwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~1 , soc_inst|m0_1|u_logic|Wkpwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~2 , soc_inst|m0_1|u_logic|Wkpwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~3 , soc_inst|m0_1|u_logic|Wkpwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~0 , soc_inst|m0_1|u_logic|O9iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~1 , soc_inst|m0_1|u_logic|O9iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~0 , soc_inst|m0_1|u_logic|Nvdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~1 , soc_inst|m0_1|u_logic|Asdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avowx4~0 , soc_inst|m0_1|u_logic|Avowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avowx4~1 , soc_inst|m0_1|u_logic|Avowx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avowx4~2 , soc_inst|m0_1|u_logic|Avowx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cma3z4~0 , soc_inst|m0_1|u_logic|Cma3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cma3z4 , soc_inst|m0_1|u_logic|Cma3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~0 , soc_inst|m0_1|u_logic|Y7iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~1 , soc_inst|m0_1|u_logic|Y7iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~2 , soc_inst|m0_1|u_logic|Y7iwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E9zvx4~0 , soc_inst|m0_1|u_logic|E9zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E9zvx4~1 , soc_inst|m0_1|u_logic|E9zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~21 , soc_inst|m0_1|u_logic|Add2~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~9 , soc_inst|m0_1|u_logic|Add2~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~13 , soc_inst|m0_1|u_logic|Add2~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~1 , soc_inst|m0_1|u_logic|Add2~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~0 , soc_inst|m0_1|u_logic|Tvhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~1 , soc_inst|m0_1|u_logic|Tvhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~2 , soc_inst|m0_1|u_logic|Tvhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Omk2z4 , soc_inst|m0_1|u_logic|Omk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~5 , soc_inst|m0_1|u_logic|Add2~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~0 , soc_inst|m0_1|u_logic|Wthvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~2 , soc_inst|m0_1|u_logic|R5zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yd03z4 , soc_inst|m0_1|u_logic|Yd03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~2 , soc_inst|m0_1|u_logic|H972z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2j2z4 , soc_inst|m0_1|u_logic|X2j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eb72z4~0 , soc_inst|m0_1|u_logic|Eb72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T253z4 , soc_inst|m0_1|u_logic|T253z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kt33z4~DUPLICATE , soc_inst|m0_1|u_logic|Kt33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~0 , soc_inst|m0_1|u_logic|H972z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE , soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~1 , soc_inst|m0_1|u_logic|H972z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~3 , soc_inst|m0_1|u_logic|H972z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A67wx4~0 , soc_inst|m0_1|u_logic|A67wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zwcvx4 , soc_inst|m0_1|u_logic|Zwcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dih2z4~0 , soc_inst|m0_1|u_logic|Dih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ducvx4 , soc_inst|m0_1|u_logic|Ducvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kih2z4~0 , soc_inst|m0_1|u_logic|Kih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whh2z4~0 , soc_inst|m0_1|u_logic|Whh2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sscvx4 , soc_inst|m0_1|u_logic|Sscvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yih2z4~0 , soc_inst|m0_1|u_logic|Yih2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~2 , soc_inst|m0_1|u_logic|Fm72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu23z4 , soc_inst|m0_1|u_logic|Zu23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE , soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4 , soc_inst|m0_1|u_logic|Wnh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE , soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~1 , soc_inst|m0_1|u_logic|Fm72z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmh3z4 , soc_inst|m0_1|u_logic|Hmh3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Co72z4~0 , soc_inst|m0_1|u_logic|Co72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I443z4 , soc_inst|m0_1|u_logic|I443z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd53z4 , soc_inst|m0_1|u_logic|Rd53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~0 , soc_inst|m0_1|u_logic|Fm72z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~3 , soc_inst|m0_1|u_logic|Fm72z4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lsnvx4~0 , soc_inst|m0_1|u_logic|Lsnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hrcvx4 , soc_inst|m0_1|u_logic|Hrcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~89 , soc_inst|m0_1|u_logic|Add5~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~85 , soc_inst|m0_1|u_logic|Add5~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~117 , soc_inst|m0_1|u_logic|Add5~117, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~9 , soc_inst|m0_1|u_logic|Add5~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~77 , soc_inst|m0_1|u_logic|Add5~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~1 , soc_inst|m0_1|u_logic|Wthvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0l2z4 , soc_inst|m0_1|u_logic|J0l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~0 , soc_inst|m0_1|u_logic|O3ivx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add3~17 , soc_inst|m0_1|u_logic|Add3~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vezvx4 , soc_inst|m0_1|u_logic|Vezvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Galvx4~0 , soc_inst|m0_1|u_logic|Galvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hak2z4 , soc_inst|m0_1|u_logic|Hak2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aez2z4 , soc_inst|m0_1|u_logic|Aez2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu33z4 , soc_inst|m0_1|u_logic|Zu33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I453z4 , soc_inst|m0_1|u_logic|I453z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~0 , soc_inst|m0_1|u_logic|Tf72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql23z4 , soc_inst|m0_1|u_logic|Ql23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc13z4~feeder , soc_inst|m0_1|u_logic|Hc13z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc13z4 , soc_inst|m0_1|u_logic|Hc13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~1 , soc_inst|m0_1|u_logic|Tf72z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4~feeder , soc_inst|m0_1|u_logic|Tiz2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE , soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~2 , soc_inst|m0_1|u_logic|Tf72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rek2z4 , soc_inst|m0_1|u_logic|Rek2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qh72z4~0 , soc_inst|m0_1|u_logic|Qh72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~3 , soc_inst|m0_1|u_logic|Tf72z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Esnvx4~0 , soc_inst|m0_1|u_logic|Esnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sscvx4 , soc_inst|m0_1|u_logic|Sscvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~1 , soc_inst|m0_1|u_logic|C3qvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~13 , soc_inst|m0_1|u_logic|Add3~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~9 , soc_inst|m0_1|u_logic|Add3~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~5 , soc_inst|m0_1|u_logic|Add3~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~1 , soc_inst|m0_1|u_logic|Add3~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~0 , soc_inst|m0_1|u_logic|haddr_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~1 , soc_inst|m0_1|u_logic|Phh2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~0 , soc_inst|m0_1|u_logic|Y5zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~1 , soc_inst|m0_1|u_logic|Y5zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~2 , soc_inst|m0_1|u_logic|Y5zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cb3wx4~0 , soc_inst|m0_1|u_logic|Cb3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R38wx4~0 , soc_inst|m0_1|u_logic|R38wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R38wx4~1 , soc_inst|m0_1|u_logic|R38wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qb3wx4 , soc_inst|m0_1|u_logic|Qb3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z9zvx4~0 , soc_inst|m0_1|u_logic|Z9zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gci2z4 , soc_inst|m0_1|u_logic|Gci2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~1 , soc_inst|m0_1|u_logic|O3ivx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V1l2z4 , soc_inst|m0_1|u_logic|V1l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glj2z4 , soc_inst|m0_1|u_logic|Glj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~1 , soc_inst|m0_1|u_logic|Nd3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T253z4~DUPLICATE , soc_inst|m0_1|u_logic|T253z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk23z4 , soc_inst|m0_1|u_logic|Bk23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~3 , soc_inst|m0_1|u_logic|Nd3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2j2z4~DUPLICATE , soc_inst|m0_1|u_logic|X2j2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll73z4 , soc_inst|m0_1|u_logic|Ll73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgt2z4 , soc_inst|m0_1|u_logic|Cgt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~6 , soc_inst|m0_1|u_logic|Nd3wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc63z4~feeder , soc_inst|m0_1|u_logic|Cc63z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc63z4 , soc_inst|m0_1|u_logic|Cc63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xti2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xti2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~5 , soc_inst|m0_1|u_logic|Nd3wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~7 , soc_inst|m0_1|u_logic|Nd3wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4 , soc_inst|m0_1|u_logic|Nd3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~0 , soc_inst|m0_1|u_logic|Phh2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~129 , soc_inst|m0_1|u_logic|Add5~129, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~1 , soc_inst|m0_1|u_logic|Dtpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~0 , soc_inst|m0_1|u_logic|Zei2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~1 , soc_inst|m0_1|u_logic|Zei2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zei2z4 , soc_inst|m0_1|u_logic|Zei2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~0 , soc_inst|m0_1|u_logic|Mdzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ehcwx4~0 , soc_inst|m0_1|u_logic|Ehcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~1 , soc_inst|m0_1|u_logic|Mdzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fdzvx4~0 , soc_inst|m0_1|u_logic|Fdzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpt2z4 , soc_inst|m0_1|u_logic|Lpt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE , soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~2 , soc_inst|m0_1|u_logic|Eruwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll63z4 , soc_inst|m0_1|u_logic|Ll63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~0 , soc_inst|m0_1|u_logic|Eruwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~3 , soc_inst|m0_1|u_logic|Eruwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE , soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~1 , soc_inst|m0_1|u_logic|Eruwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4 , soc_inst|m0_1|u_logic|Eruwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkk2z4 , soc_inst|m0_1|u_logic|Zkk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aru2z4 , soc_inst|m0_1|u_logic|Aru2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kjk2z4~feeder , soc_inst|m0_1|u_logic|Kjk2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kjk2z4 , soc_inst|m0_1|u_logic|Kjk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~0 , soc_inst|m0_1|u_logic|F8wwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vhk2z4 , soc_inst|m0_1|u_logic|Vhk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~0 , soc_inst|m0_1|u_logic|Izpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggk2z4 , soc_inst|m0_1|u_logic|Ggk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~1 , soc_inst|m0_1|u_logic|Izpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nf03z4 , soc_inst|m0_1|u_logic|Nf03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4 , soc_inst|m0_1|u_logic|Tiz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~4 , soc_inst|m0_1|u_logic|Izpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An73z4~DUPLICATE , soc_inst|m0_1|u_logic|An73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rht2z4 , soc_inst|m0_1|u_logic|Rht2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rd63z4 , soc_inst|m0_1|u_logic|Rd63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~5 , soc_inst|m0_1|u_logic|Izpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aru2z4 , soc_inst|m0_1|u_logic|Aru2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~6 , soc_inst|m0_1|u_logic|Izpvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~7 , soc_inst|m0_1|u_logic|Izpvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE , soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~3 , soc_inst|m0_1|u_logic|Izpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~2 , soc_inst|m0_1|u_logic|Izpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4 , soc_inst|m0_1|u_logic|Izpvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sx3wx4~0 , soc_inst|m0_1|u_logic|Sx3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imvvx4~0 , soc_inst|m0_1|u_logic|Imvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~0 , soc_inst|m0_1|u_logic|T5mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~1 , soc_inst|m0_1|u_logic|T5mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wbk2z4 , soc_inst|m0_1|u_logic|Wbk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwywx4~0 , soc_inst|m0_1|u_logic|Wwywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6pwx4~0 , soc_inst|m0_1|u_logic|I6pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N4rvx4~0 , soc_inst|m0_1|u_logic|N4rvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mbnvx4~0 , soc_inst|m0_1|u_logic|Mbnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtp2z4 , soc_inst|m0_1|u_logic|Gtp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8mvx4~0 , soc_inst|m0_1|u_logic|L8mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cam2z4 , soc_inst|m0_1|u_logic|Cam2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kwa2z4~0 , soc_inst|m0_1|u_logic|Kwa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nzhvx4~0 , soc_inst|m0_1|u_logic|Nzhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oar2z4 , soc_inst|m0_1|u_logic|Oar2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~0 , soc_inst|m0_1|u_logic|Zxvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~1 , soc_inst|m0_1|u_logic|Zxvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~0 , soc_inst|m0_1|u_logic|Arzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pazwx4 , soc_inst|m0_1|u_logic|Pazwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~0 , soc_inst|m0_1|u_logic|G2zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~1 , soc_inst|m0_1|u_logic|G2zwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W5rvx4 , soc_inst|m0_1|u_logic|W5rvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fbnvx4~0 , soc_inst|m0_1|u_logic|Fbnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owq2z4 , soc_inst|m0_1|u_logic|Owq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~0 , soc_inst|m0_1|u_logic|Leuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~1 , soc_inst|m0_1|u_logic|Leuvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pamvx4~0 , soc_inst|m0_1|u_logic|Pamvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~0 , soc_inst|m0_1|u_logic|Bjkvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~1 , soc_inst|m0_1|u_logic|Bjkvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ovc3z4 , soc_inst|m0_1|u_logic|Ovc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nl53z4 , soc_inst|m0_1|u_logic|Nl53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec43z4 , soc_inst|m0_1|u_logic|Ec43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~0 , soc_inst|m0_1|u_logic|Qw62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wmp2z4 , soc_inst|m0_1|u_logic|Wmp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE , soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V233z4 , soc_inst|m0_1|u_logic|V233z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~1 , soc_inst|m0_1|u_logic|Qw62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny62z4~0 , soc_inst|m0_1|u_logic|Ny62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zr03z4 , soc_inst|m0_1|u_logic|Zr03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fvz2z4 , soc_inst|m0_1|u_logic|Fvz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~2 , soc_inst|m0_1|u_logic|Qw62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~3 , soc_inst|m0_1|u_logic|Qw62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mpnvx4~0 , soc_inst|m0_1|u_logic|Mpnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~0 , soc_inst|m0_1|u_logic|Vcuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~1 , soc_inst|m0_1|u_logic|Vcuvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yxzvx4~0 , soc_inst|m0_1|u_logic|Yxzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilp2z4 , soc_inst|m0_1|u_logic|Ilp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~6 , soc_inst|m0_1|u_logic|Eo5wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mt13z4 , soc_inst|m0_1|u_logic|Mt13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V233z4~DUPLICATE , soc_inst|m0_1|u_logic|V233z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~5 , soc_inst|m0_1|u_logic|Eo5wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~1 , soc_inst|m0_1|u_logic|Eo5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~3 , soc_inst|m0_1|u_logic|Eo5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~4 , soc_inst|m0_1|u_logic|Eo5wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~0 , soc_inst|m0_1|u_logic|Eo5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~2 , soc_inst|m0_1|u_logic|Eo5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~1 , soc_inst|m0_1|u_logic|F8wwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8wwx4 , soc_inst|m0_1|u_logic|F8wwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Beowx4~0 , soc_inst|m0_1|u_logic|Beowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~1 , soc_inst|m0_1|u_logic|Zudwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A6ewx4~0 , soc_inst|m0_1|u_logic|A6ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~1 , soc_inst|m0_1|u_logic|Jkmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yjzvx4~1 , soc_inst|m0_1|u_logic|Yjzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rjzvx4~1 , soc_inst|m0_1|u_logic|Rjzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uhzvx4~1 , soc_inst|m0_1|u_logic|Uhzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uhzvx4~0 , soc_inst|m0_1|u_logic|Uhzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE , soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE , soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~1 , soc_inst|m0_1|u_logic|Feqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1v2z4 , soc_inst|m0_1|u_logic|Y1v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE , soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~0 , soc_inst|m0_1|u_logic|Feqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Feqwx4 , soc_inst|m0_1|u_logic|Feqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~0 , soc_inst|m0_1|u_logic|Zudwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~1 , soc_inst|m0_1|u_logic|Nvdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~0 , soc_inst|m0_1|u_logic|Q7ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~1 , soc_inst|m0_1|u_logic|Q7ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kvtwx4 , soc_inst|m0_1|u_logic|Kvtwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iutwx4~0 , soc_inst|m0_1|u_logic|Iutwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~1 , soc_inst|m0_1|u_logic|Xmdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7ewx4~0 , soc_inst|m0_1|u_logic|J7ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~1 , soc_inst|m0_1|u_logic|Gftwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zetwx4 , soc_inst|m0_1|u_logic|Zetwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdtwx4 , soc_inst|m0_1|u_logic|Qdtwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5ewx4~0 , soc_inst|m0_1|u_logic|M5ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mouwx4~0 , soc_inst|m0_1|u_logic|Mouwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5ewx4 , soc_inst|m0_1|u_logic|F5ewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~0 , soc_inst|m0_1|u_logic|W3ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~1 , soc_inst|m0_1|u_logic|W3ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~0 , soc_inst|m0_1|u_logic|E1ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~1 , soc_inst|m0_1|u_logic|Mydwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~0 , soc_inst|m0_1|u_logic|Wwdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~0 , soc_inst|m0_1|u_logic|Z78wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~1 , soc_inst|m0_1|u_logic|Jtdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~0 , soc_inst|m0_1|u_logic|Kqdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~1 , soc_inst|m0_1|u_logic|Wwdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~0 , soc_inst|m0_1|u_logic|Djdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~2 , soc_inst|m0_1|u_logic|Wwdwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~1 , soc_inst|m0_1|u_logic|Z78wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~4 , soc_inst|m0_1|u_logic|Z78wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~2 , soc_inst|m0_1|u_logic|Kqdwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~1 , soc_inst|m0_1|u_logic|Kqdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dqdwx4~0 , soc_inst|m0_1|u_logic|Dqdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~3 , soc_inst|m0_1|u_logic|Kqdwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~2 , soc_inst|m0_1|u_logic|Z78wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~1 , soc_inst|m0_1|u_logic|Djdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~3 , soc_inst|m0_1|u_logic|Djdwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Widwx4~0 , soc_inst|m0_1|u_logic|Widwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~2 , soc_inst|m0_1|u_logic|Djdwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~3 , soc_inst|m0_1|u_logic|Z78wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~5 , soc_inst|m0_1|u_logic|Z78wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~6 , soc_inst|m0_1|u_logic|Z78wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~0 , soc_inst|m0_1|u_logic|Do8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~1 , soc_inst|m0_1|u_logic|Do8wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~2 , soc_inst|m0_1|u_logic|Do8wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~3 , soc_inst|m0_1|u_logic|Do8wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~4 , soc_inst|m0_1|u_logic|Do8wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~0 , soc_inst|m0_1|u_logic|N88wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6cwx4~0 , soc_inst|m0_1|u_logic|D6cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Va3wx4~0 , soc_inst|m0_1|u_logic|Va3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O2bwx4~0 , soc_inst|m0_1|u_logic|O2bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I30wx4~0 , soc_inst|m0_1|u_logic|I30wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~15 , soc_inst|m0_1|u_logic|N88wx4~15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zbbwx4~0 , soc_inst|m0_1|u_logic|Zbbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~0 , soc_inst|m0_1|u_logic|Cfzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thm2z4 , soc_inst|m0_1|u_logic|Thm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~0 , soc_inst|m0_1|u_logic|G5qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~1 , soc_inst|m0_1|u_logic|Ya1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~0 , soc_inst|m0_1|u_logic|Ya1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Igi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~0 , soc_inst|m0_1|u_logic|L9zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~2 , soc_inst|m0_1|u_logic|L9zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~1 , soc_inst|m0_1|u_logic|L9zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4 , soc_inst|m0_1|u_logic|L9zvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~1 , soc_inst|m0_1|u_logic|Luzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~0 , soc_inst|m0_1|u_logic|Luzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~13 , soc_inst|m0_1|u_logic|N88wx4~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~1 , soc_inst|m0_1|u_logic|Z4bwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qobwx4~0 , soc_inst|m0_1|u_logic|Qobwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~0 , soc_inst|m0_1|u_logic|Hnbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~1 , soc_inst|m0_1|u_logic|Hnbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R29wx4~0 , soc_inst|m0_1|u_logic|R29wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U09wx4~0 , soc_inst|m0_1|u_logic|U09wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L753z4 , soc_inst|m0_1|u_logic|L753z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE , soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~0 , soc_inst|m0_1|u_logic|Punvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE , soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|To23z4 , soc_inst|m0_1|u_logic|To23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~1 , soc_inst|m0_1|u_logic|Punvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wlz2z4 , soc_inst|m0_1|u_logic|Wlz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qi03z4 , soc_inst|m0_1|u_logic|Qi03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~2 , soc_inst|m0_1|u_logic|Punvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~3 , soc_inst|m0_1|u_logic|Punvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X5gwx4~0 , soc_inst|m0_1|u_logic|X5gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~0 , soc_inst|m0_1|u_logic|D4mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~1 , soc_inst|m0_1|u_logic|D4mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~2 , soc_inst|m0_1|u_logic|D4mvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iwp2z4 , soc_inst|m0_1|u_logic|Iwp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~4 , soc_inst|m0_1|u_logic|Punvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1bvx4 , soc_inst|m0_1|u_logic|E1bvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~0 , soc_inst|m0_1|u_logic|Qynvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~1 , soc_inst|m0_1|u_logic|Qynvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zznvx4~0 , soc_inst|m0_1|u_logic|Zznvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~0 , soc_inst|m0_1|u_logic|Vxnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~1 , soc_inst|m0_1|u_logic|Vxnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~134 , soc_inst|m0_1|u_logic|Add5~134, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~29 , soc_inst|m0_1|u_logic|Add5~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~93 , soc_inst|m0_1|u_logic|Add5~93, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~101 , soc_inst|m0_1|u_logic|Add5~101, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~3 , soc_inst|m0_1|u_logic|Cr1wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P03wx4~0 , soc_inst|m0_1|u_logic|P03wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~0 , soc_inst|m0_1|u_logic|G6d3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~1 , soc_inst|m0_1|u_logic|G6d3z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d3z4 , soc_inst|m0_1|u_logic|G6d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffbwx4~0 , soc_inst|m0_1|u_logic|Ffbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~2 , soc_inst|m0_1|u_logic|Cr1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~0 , soc_inst|m0_1|u_logic|Cr1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nyawx4~0 , soc_inst|m0_1|u_logic|Nyawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~1 , soc_inst|m0_1|u_logic|Z80wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~0 , soc_inst|m0_1|u_logic|Z80wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~18 , soc_inst|m0_1|u_logic|N88wx4~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~21 , soc_inst|m0_1|u_logic|N88wx4~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~19 , soc_inst|m0_1|u_logic|N88wx4~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~7 , soc_inst|m0_1|u_logic|N88wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~8 , soc_inst|m0_1|u_logic|N88wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~20 , soc_inst|m0_1|u_logic|N88wx4~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~9 , soc_inst|m0_1|u_logic|N88wx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~1 , soc_inst|m0_1|u_logic|Cs0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~0 , soc_inst|m0_1|u_logic|Cs0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~4 , soc_inst|m0_1|u_logic|G79wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~5 , soc_inst|m0_1|u_logic|G79wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~6 , soc_inst|m0_1|u_logic|G79wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~7 , soc_inst|m0_1|u_logic|G79wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~10 , soc_inst|m0_1|u_logic|N88wx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~0 , soc_inst|m0_1|u_logic|Ee8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~3 , soc_inst|m0_1|u_logic|Ee8wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~2 , soc_inst|m0_1|u_logic|Ee8wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~1 , soc_inst|m0_1|u_logic|Ee8wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~0 , soc_inst|m0_1|u_logic|G79wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~2 , soc_inst|m0_1|u_logic|G79wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dv8wx4~0 , soc_inst|m0_1|u_logic|Dv8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~1 , soc_inst|m0_1|u_logic|G79wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C8zvx4~0 , soc_inst|m0_1|u_logic|C8zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~3 , soc_inst|m0_1|u_logic|G79wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~11 , soc_inst|m0_1|u_logic|N88wx4~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~12 , soc_inst|m0_1|u_logic|N88wx4~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~17 , soc_inst|m0_1|u_logic|N88wx4~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~1 , soc_inst|m0_1|u_logic|N88wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wsawx4~0 , soc_inst|m0_1|u_logic|Wsawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~2 , soc_inst|m0_1|u_logic|N88wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~3 , soc_inst|m0_1|u_logic|N88wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rjzvx4~0 , soc_inst|m0_1|u_logic|Rjzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nf1wx4~0 , soc_inst|m0_1|u_logic|Nf1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~4 , soc_inst|m0_1|u_logic|N88wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~5 , soc_inst|m0_1|u_logic|N88wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~6 , soc_inst|m0_1|u_logic|N88wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~14 , soc_inst|m0_1|u_logic|N88wx4~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~16 , soc_inst|m0_1|u_logic|N88wx4~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~7 , soc_inst|m0_1|u_logic|Z78wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S9zvx4~0 , soc_inst|m0_1|u_logic|S9zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Igi2z4 , soc_inst|m0_1|u_logic|Igi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4 , soc_inst|m0_1|u_logic|Rhi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Velvx4~0 , soc_inst|m0_1|u_logic|Velvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Velvx4~1 , soc_inst|m0_1|u_logic|Velvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cai3z4 , soc_inst|m0_1|u_logic|Cai3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6i3z4 , soc_inst|m0_1|u_logic|Y6i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5i3z4~feeder , soc_inst|m0_1|u_logic|J5i3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5i3z4 , soc_inst|m0_1|u_logic|J5i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~2 , soc_inst|m0_1|u_logic|Ec62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E143z4~feeder , soc_inst|m0_1|u_logic|E143z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E143z4 , soc_inst|m0_1|u_logic|E143z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na53z4 , soc_inst|m0_1|u_logic|Na53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~0 , soc_inst|m0_1|u_logic|Ec62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8i3z4 , soc_inst|m0_1|u_logic|N8i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Be62z4~0 , soc_inst|m0_1|u_logic|Be62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi13z4 , soc_inst|m0_1|u_logic|Mi13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr23z4 , soc_inst|m0_1|u_logic|Vr23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~1 , soc_inst|m0_1|u_logic|Ec62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~3 , soc_inst|m0_1|u_logic|Ec62z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8zvx4~0 , soc_inst|m0_1|u_logic|Q8zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ovcvx4 , soc_inst|m0_1|u_logic|Ovcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~0 , soc_inst|m0_1|u_logic|F6zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~1 , soc_inst|m0_1|u_logic|F6zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fxu2z4 , soc_inst|m0_1|u_logic|Fxu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnt2z4 , soc_inst|m0_1|u_logic|Wnt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~0 , soc_inst|m0_1|u_logic|O7zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE , soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~3 , soc_inst|m0_1|u_logic|O7zvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~1 , soc_inst|m0_1|u_logic|O7zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~2 , soc_inst|m0_1|u_logic|O7zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~4 , soc_inst|m0_1|u_logic|O7zvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE , soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~5 , soc_inst|m0_1|u_logic|O7zvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~6 , soc_inst|m0_1|u_logic|O7zvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~7 , soc_inst|m0_1|u_logic|O7zvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~8 , soc_inst|m0_1|u_logic|O7zvx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4 , soc_inst|m0_1|u_logic|O7zvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~2 , soc_inst|m0_1|u_logic|hwdata_o~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhd3z4 , soc_inst|m0_1|u_logic|Lhd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Repwx4~0 , soc_inst|m0_1|u_logic|Repwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Repwx4~1 , soc_inst|m0_1|u_logic|Repwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Repwx4~2 , soc_inst|m0_1|u_logic|Repwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ncpwx4~0 , soc_inst|m0_1|u_logic|Ncpwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9iwx4~0 , soc_inst|m0_1|u_logic|A9iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X61wx4~0 , soc_inst|m0_1|u_logic|X61wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X61wx4~1 , soc_inst|m0_1|u_logic|X61wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M41wx4~1 , soc_inst|m0_1|u_logic|M41wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y873z4 , soc_inst|m0_1|u_logic|Y873z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4q2z4~DUPLICATE , soc_inst|m0_1|u_logic|F4q2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE , soc_inst|m0_1|u_logic|Pz53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~7 , soc_inst|m0_1|u_logic|S71wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O723z4~DUPLICATE , soc_inst|m0_1|u_logic|O723z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~6 , soc_inst|m0_1|u_logic|S71wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~8 , soc_inst|m0_1|u_logic|S71wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4 , soc_inst|m0_1|u_logic|S71wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bq5wx4~0 , soc_inst|m0_1|u_logic|Bq5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4~0 , soc_inst|m0_1|u_logic|Pcd3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4 , soc_inst|m0_1|u_logic|Pcd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5a3z4~DUPLICATE , soc_inst|m0_1|u_logic|U5a3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mis2z4 , soc_inst|m0_1|u_logic|Mis2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~1 , soc_inst|m0_1|u_logic|M1pwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~0 , soc_inst|m0_1|u_logic|M1pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~2 , soc_inst|m0_1|u_logic|M1pwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~3 , soc_inst|m0_1|u_logic|M1pwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~4 , soc_inst|m0_1|u_logic|M1pwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[30]~29 , soc_inst|ram_1|data_to_memory[30]~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qapwx4~0 , soc_inst|m0_1|u_logic|Qapwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~0 , soc_inst|m0_1|u_logic|D7iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~1 , soc_inst|m0_1|u_logic|D7iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4~0 , soc_inst|m0_1|u_logic|Ba0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4 , soc_inst|m0_1|u_logic|Ba0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J70wx4~1 , soc_inst|m0_1|u_logic|J70wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J70wx4~2 , soc_inst|m0_1|u_logic|J70wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J70wx4~0 , soc_inst|m0_1|u_logic|J70wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1n2z4 , soc_inst|m0_1|u_logic|Y1n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~3 , soc_inst|m0_1|u_logic|G4qwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~2 , soc_inst|m0_1|u_logic|G4qwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE , soc_inst|m0_1|u_logic|N3n2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~0 , soc_inst|m0_1|u_logic|G4qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~1 , soc_inst|m0_1|u_logic|G4qwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4 , soc_inst|m0_1|u_logic|G4qwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~0 , soc_inst|m0_1|u_logic|Qtdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~1 , soc_inst|m0_1|u_logic|Qtdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~0 , soc_inst|m0_1|u_logic|Rilwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][3] , soc_inst|switches_1|switch_store[1][3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[19]~18 , soc_inst|ram_1|data_to_memory[19]~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[11]~17 , soc_inst|ram_1|data_to_memory[11]~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[19]~25 , soc_inst|interconnect_1|HRDATA[19]~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~1 , soc_inst|m0_1|u_logic|Rilwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~2 , soc_inst|m0_1|u_logic|Rilwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4~0 , soc_inst|m0_1|u_logic|Bo0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4 , soc_inst|m0_1|u_logic|Bo0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Un0wx4~0 , soc_inst|m0_1|u_logic|Un0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~1 , soc_inst|m0_1|u_logic|Xl0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~0 , soc_inst|m0_1|u_logic|Xl0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pap2z4 , soc_inst|m0_1|u_logic|Pap2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zfv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zfv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE , soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~0 , soc_inst|m0_1|u_logic|Bjxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zb83z4 , soc_inst|m0_1|u_logic|Zb83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~1 , soc_inst|m0_1|u_logic|Bjxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4 , soc_inst|m0_1|u_logic|Bjxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X892z4~0 , soc_inst|m0_1|u_logic|X892z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE , soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~0 , soc_inst|m0_1|u_logic|A792z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ixh3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~2 , soc_inst|m0_1|u_logic|A792z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE , soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~1 , soc_inst|m0_1|u_logic|A792z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~3 , soc_inst|m0_1|u_logic|A792z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wo0wx4~0 , soc_inst|m0_1|u_logic|Wo0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql0wx4 , soc_inst|m0_1|u_logic|Ql0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xvjvx4~0 , soc_inst|m0_1|u_logic|Xvjvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7p2z4 , soc_inst|m0_1|u_logic|L7p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~2 , soc_inst|m0_1|u_logic|Xu82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgg3z4 , soc_inst|m0_1|u_logic|Vgg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~0 , soc_inst|m0_1|u_logic|Xu82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4 , soc_inst|m0_1|u_logic|Zjg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~1 , soc_inst|m0_1|u_logic|Xu82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4 , soc_inst|m0_1|u_logic|Pwg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uw82z4~0 , soc_inst|m0_1|u_logic|Uw82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~3 , soc_inst|m0_1|u_logic|Xu82z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fj0wx4~0 , soc_inst|m0_1|u_logic|Fj0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ri0wx4~1 , soc_inst|m0_1|u_logic|Ri0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ri0wx4~0 , soc_inst|m0_1|u_logic|Ri0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wh0wx4~0 , soc_inst|m0_1|u_logic|Wh0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~0 , soc_inst|m0_1|u_logic|Bh0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4~0 , soc_inst|m0_1|u_logic|Tj0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4 , soc_inst|m0_1|u_logic|Tj0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ia0wx4 , soc_inst|m0_1|u_logic|Ia0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~1 , soc_inst|m0_1|u_logic|Bh0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wrg3z4 , soc_inst|m0_1|u_logic|Wrg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~1 , soc_inst|m0_1|u_logic|Dmvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sog3z4 , soc_inst|m0_1|u_logic|Sog3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~0 , soc_inst|m0_1|u_logic|Dmvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4 , soc_inst|m0_1|u_logic|Dmvwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~0 , soc_inst|m0_1|u_logic|Xtdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~1 , soc_inst|m0_1|u_logic|Eudwx4~1, de1_soc_wrapper, 1
+instance = comp, \SW[2]~input , SW[2]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][2] , soc_inst|switches_1|switch_store[1][2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[18]~6 , soc_inst|ram_1|data_to_memory[18]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[10]~5 , soc_inst|ram_1|data_to_memory[10]~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[18]~13 , soc_inst|interconnect_1|HRDATA[18]~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~0 , soc_inst|m0_1|u_logic|Ajmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~1 , soc_inst|m0_1|u_logic|Ajmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~2 , soc_inst|m0_1|u_logic|Ajmwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~0 , soc_inst|m0_1|u_logic|Zluvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~1 , soc_inst|m0_1|u_logic|Zluvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~2 , soc_inst|m0_1|u_logic|Zluvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~1 , soc_inst|m0_1|u_logic|Cr1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yfn2z4 , soc_inst|m0_1|u_logic|Yfn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE , soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~0 , soc_inst|m0_1|u_logic|Ylbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po83z4 , soc_inst|m0_1|u_logic|Po83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajn2z4 , soc_inst|m0_1|u_logic|Ajn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~1 , soc_inst|m0_1|u_logic|Ylbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4 , soc_inst|m0_1|u_logic|Ylbwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~0 , soc_inst|m0_1|u_logic|Xmdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~1 , soc_inst|m0_1|u_logic|Jiowx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B28wx4~0 , soc_inst|m0_1|u_logic|B28wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~1 , soc_inst|m0_1|u_logic|Tlyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K22wx4~1 , soc_inst|m0_1|u_logic|K22wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K22wx4~0 , soc_inst|m0_1|u_logic|K22wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~0 , soc_inst|m0_1|u_logic|Zz1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~3 , soc_inst|m0_1|u_logic|Lr9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cvr2z4 , soc_inst|m0_1|u_logic|Cvr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~0 , soc_inst|m0_1|u_logic|Lr9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~1 , soc_inst|m0_1|u_logic|Lr9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr83z4 , soc_inst|m0_1|u_logic|Rr83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imu2z4 , soc_inst|m0_1|u_logic|Imu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~2 , soc_inst|m0_1|u_logic|Lr9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4 , soc_inst|m0_1|u_logic|Lr9wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~0 , soc_inst|m0_1|u_logic|Fkdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~1 , soc_inst|m0_1|u_logic|Nodwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wia3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wia3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~0 , soc_inst|m0_1|u_logic|Ihlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~1 , soc_inst|m0_1|u_logic|Ihlwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~2 , soc_inst|m0_1|u_logic|Ihlwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~3 , soc_inst|m0_1|u_logic|Ihlwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~1 , soc_inst|m0_1|u_logic|U0vvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~0 , soc_inst|m0_1|u_logic|U0vvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~2 , soc_inst|m0_1|u_logic|U0vvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~1 , soc_inst|m0_1|u_logic|Bmhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G7x2z4 , soc_inst|m0_1|u_logic|G7x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~29 , soc_inst|m0_1|u_logic|Add3~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~25 , soc_inst|m0_1|u_logic|Add3~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~33 , soc_inst|m0_1|u_logic|Add3~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~53 , soc_inst|m0_1|u_logic|Add3~53, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~49 , soc_inst|m0_1|u_logic|Add3~49, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~45 , soc_inst|m0_1|u_logic|Add3~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~41 , soc_inst|m0_1|u_logic|Add3~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~37 , soc_inst|m0_1|u_logic|Add3~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~81 , soc_inst|m0_1|u_logic|Add3~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~77 , soc_inst|m0_1|u_logic|Add3~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~5 , soc_inst|m0_1|u_logic|haddr_o~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9jvx4~0 , soc_inst|m0_1|u_logic|A9jvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Slr2z4 , soc_inst|m0_1|u_logic|Slr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr43z4 , soc_inst|m0_1|u_logic|Vr43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E163z4~DUPLICATE , soc_inst|m0_1|u_logic|E163z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~0 , soc_inst|m0_1|u_logic|I3a2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0g3z4 , soc_inst|m0_1|u_logic|Z0g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5a2z4~0 , soc_inst|m0_1|u_logic|F5a2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O2g3z4 , soc_inst|m0_1|u_logic|O2g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~1 , soc_inst|m0_1|u_logic|I3a2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vxf3z4 , soc_inst|m0_1|u_logic|Vxf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzf3z4 , soc_inst|m0_1|u_logic|Kzf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~2 , soc_inst|m0_1|u_logic|I3a2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~3 , soc_inst|m0_1|u_logic|I3a2z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ra1wx4~0 , soc_inst|m0_1|u_logic|Ra1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~1 , soc_inst|m0_1|u_logic|Nehvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~0 , soc_inst|m0_1|u_logic|Nehvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tme3z4 , soc_inst|m0_1|u_logic|Tme3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~101 , soc_inst|m0_1|u_logic|Add2~101, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~0 , soc_inst|m0_1|u_logic|Xjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~1 , soc_inst|m0_1|u_logic|Xjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rix2z4 , soc_inst|m0_1|u_logic|Rix2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~97 , soc_inst|m0_1|u_logic|Add2~97, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~1 , soc_inst|m0_1|u_logic|Sdhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~2 , soc_inst|m0_1|u_logic|Sdhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~0 , soc_inst|m0_1|u_logic|Sdhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~93 , soc_inst|m0_1|u_logic|Add2~93, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~0 , soc_inst|m0_1|u_logic|Qjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~1 , soc_inst|m0_1|u_logic|Qjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dkx2z4 , soc_inst|m0_1|u_logic|Dkx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~89 , soc_inst|m0_1|u_logic|Add2~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~0 , soc_inst|m0_1|u_logic|Jjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~1 , soc_inst|m0_1|u_logic|Jjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Plx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~73 , soc_inst|m0_1|u_logic|Add2~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~0 , soc_inst|m0_1|u_logic|Cjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~1 , soc_inst|m0_1|u_logic|Cjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bnx2z4 , soc_inst|m0_1|u_logic|Bnx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~69 , soc_inst|m0_1|u_logic|Add2~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjq2z4 , soc_inst|m0_1|u_logic|Zjq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~0 , soc_inst|m0_1|u_logic|Ithvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~1 , soc_inst|m0_1|u_logic|Ithvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~65 , soc_inst|m0_1|u_logic|Add2~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~0 , soc_inst|m0_1|u_logic|Ldhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~1 , soc_inst|m0_1|u_logic|Ldhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B9g3z4 , soc_inst|m0_1|u_logic|B9g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fc0wx4 , soc_inst|m0_1|u_logic|Fc0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5kvx4~0 , soc_inst|m0_1|u_logic|B5kvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Llq2z4 , soc_inst|m0_1|u_logic|Llq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tch3z4 , soc_inst|m0_1|u_logic|Tch3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ji43z4 , soc_inst|m0_1|u_logic|Ji43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sr53z4 , soc_inst|m0_1|u_logic|Sr53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~0 , soc_inst|m0_1|u_logic|Lo82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A8h3z4 , soc_inst|m0_1|u_logic|A8h3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~2 , soc_inst|m0_1|u_logic|Lo82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rz13z4 , soc_inst|m0_1|u_logic|Rz13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A933z4 , soc_inst|m0_1|u_logic|A933z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~1 , soc_inst|m0_1|u_logic|Lo82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iq82z4~0 , soc_inst|m0_1|u_logic|Iq82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~3 , soc_inst|m0_1|u_logic|Lo82z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lf0wx4~0 , soc_inst|m0_1|u_logic|Lf0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Je0wx4~0 , soc_inst|m0_1|u_logic|Je0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~1 , soc_inst|m0_1|u_logic|Mc0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~0 , soc_inst|m0_1|u_logic|Mc0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P9h3z4 , soc_inst|m0_1|u_logic|P9h3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~4 , soc_inst|m0_1|u_logic|Ce0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~0 , soc_inst|m0_1|u_logic|Ce0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~1 , soc_inst|m0_1|u_logic|Ce0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE , soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~3 , soc_inst|m0_1|u_logic|Ce0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~2 , soc_inst|m0_1|u_logic|Ce0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D03xx4~0 , soc_inst|m0_1|u_logic|D03xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~5 , soc_inst|m0_1|u_logic|Ce0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4 , soc_inst|m0_1|u_logic|Ce0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[21]~15 , soc_inst|m0_1|u_logic|hwdata_o[21]~15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ieh3z4 , soc_inst|m0_1|u_logic|Ieh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~69 , soc_inst|m0_1|u_logic|Add0~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nnmvx4~0 , soc_inst|m0_1|u_logic|Nnmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ogo2z4 , soc_inst|m0_1|u_logic|Ogo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~85 , soc_inst|m0_1|u_logic|Add0~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE , soc_inst|m0_1|u_logic|Cma3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gnmvx4~0 , soc_inst|m0_1|u_logic|Gnmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ddi3z4 , soc_inst|m0_1|u_logic|Ddi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~5 , soc_inst|m0_1|u_logic|Add0~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zmmvx4~0 , soc_inst|m0_1|u_logic|Zmmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uei3z4 , soc_inst|m0_1|u_logic|Uei3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~0 , soc_inst|m0_1|u_logic|Oytvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~2 , soc_inst|m0_1|u_logic|Oytvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~3 , soc_inst|m0_1|u_logic|Oytvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~4 , soc_inst|m0_1|u_logic|Oytvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~1 , soc_inst|m0_1|u_logic|Oytvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4 , soc_inst|m0_1|u_logic|Oytvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Etmvx4~0 , soc_inst|m0_1|u_logic|Etmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F2o2z4 , soc_inst|m0_1|u_logic|F2o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mxtvx4 , soc_inst|m0_1|u_logic|Mxtvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9a3z4 , soc_inst|m0_1|u_logic|C9a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mqmvx4~0 , soc_inst|m0_1|u_logic|Mqmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zva3z4 , soc_inst|m0_1|u_logic|Zva3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipn2z4 , soc_inst|m0_1|u_logic|Ipn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~0 , soc_inst|m0_1|u_logic|Qkmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9a3z4~DUPLICATE , soc_inst|m0_1|u_logic|C9a3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~1 , soc_inst|m0_1|u_logic|Qkmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~2 , soc_inst|m0_1|u_logic|Qkmwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~3 , soc_inst|m0_1|u_logic|Qkmwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Et0wx4~0 , soc_inst|m0_1|u_logic|Et0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Et0wx4 , soc_inst|m0_1|u_logic|Et0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~1 , soc_inst|m0_1|u_logic|Mq0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~2 , soc_inst|m0_1|u_logic|Mq0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~0 , soc_inst|m0_1|u_logic|Mq0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8u2z4 , soc_inst|m0_1|u_logic|F8u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Od83z4~DUPLICATE , soc_inst|m0_1|u_logic|Od83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~1 , soc_inst|m0_1|u_logic|H1qwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohv2z4 , soc_inst|m0_1|u_logic|Ohv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE , soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~0 , soc_inst|m0_1|u_logic|H1qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1qwx4 , soc_inst|m0_1|u_logic|H1qwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~0 , soc_inst|m0_1|u_logic|Eudwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~1 , soc_inst|m0_1|u_logic|E1ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[12]~22 , soc_inst|interconnect_1|HRDATA[12]~22, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~0 , soc_inst|m0_1|u_logic|Xrmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~1 , soc_inst|m0_1|u_logic|Xrmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~2 , soc_inst|m0_1|u_logic|Arzwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~0 , soc_inst|m0_1|u_logic|Kkrvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5pwx4~0 , soc_inst|m0_1|u_logic|U5pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~2 , soc_inst|m0_1|u_logic|Jjuwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cjuwx4~0 , soc_inst|m0_1|u_logic|Cjuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~2 , soc_inst|m0_1|u_logic|Kkrvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~3 , soc_inst|m0_1|u_logic|Kkrvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Viuwx4~0 , soc_inst|m0_1|u_logic|Viuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~1 , soc_inst|m0_1|u_logic|Kkrvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~4 , soc_inst|m0_1|u_logic|B6pwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6pwx4~0 , soc_inst|m0_1|u_logic|I6pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~4 , soc_inst|m0_1|u_logic|Kkrvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~5 , soc_inst|m0_1|u_logic|Kkrvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~6 , soc_inst|m0_1|u_logic|Kkrvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bsvwx4~0 , soc_inst|m0_1|u_logic|Bsvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~2 , soc_inst|m0_1|u_logic|Xrmwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~0 , soc_inst|m0_1|u_logic|Uf1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~1 , soc_inst|m0_1|u_logic|Uf1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~1 , soc_inst|m0_1|u_logic|Ekhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhx2z4 , soc_inst|m0_1|u_logic|Fhx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cqovx4 , soc_inst|m0_1|u_logic|Cqovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[10] , soc_inst|ram_1|saved_word_address[10], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[10]~10 , soc_inst|ram_1|memory.raddr_a[10]~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[25]~11 , soc_inst|ram_1|data_to_memory[25]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[1]~12 , soc_inst|ram_1|data_to_memory[1]~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[25]~18 , soc_inst|interconnect_1|HRDATA[25]~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~0 , soc_inst|m0_1|u_logic|Pgfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~1 , soc_inst|m0_1|u_logic|Pgfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4~0 , soc_inst|m0_1|u_logic|Mx0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4 , soc_inst|m0_1|u_logic|Mx0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fx0wx4~0 , soc_inst|m0_1|u_logic|Fx0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~1 , soc_inst|m0_1|u_logic|Iv0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~0 , soc_inst|m0_1|u_logic|Iv0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9u2z4 , soc_inst|m0_1|u_logic|U9u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ozo2z4 , soc_inst|m0_1|u_logic|Ozo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~1 , soc_inst|m0_1|u_logic|Xcuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djv2z4 , soc_inst|m0_1|u_logic|Djv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zxo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~0 , soc_inst|m0_1|u_logic|Xcuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4 , soc_inst|m0_1|u_logic|Xcuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~0 , soc_inst|m0_1|u_logic|X0ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~1 , soc_inst|m0_1|u_logic|X0ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[11]~24 , soc_inst|interconnect_1|HRDATA[11]~24, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~1 , soc_inst|m0_1|u_logic|Whlwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~0 , soc_inst|m0_1|u_logic|Whlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~2 , soc_inst|m0_1|u_logic|Whlwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~3 , soc_inst|m0_1|u_logic|Whlwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~0 , soc_inst|m0_1|u_logic|Qfzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~1 , soc_inst|m0_1|u_logic|Qfzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~2 , soc_inst|m0_1|u_logic|Aihvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~1 , soc_inst|m0_1|u_logic|Aihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~0 , soc_inst|m0_1|u_logic|Aihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xsx2z4 , soc_inst|m0_1|u_logic|Xsx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vezvx4 , soc_inst|m0_1|u_logic|Vezvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Galvx4~0 , soc_inst|m0_1|u_logic|Galvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hak2z4 , soc_inst|m0_1|u_logic|Hak2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~4 , soc_inst|m0_1|u_logic|Pdbwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4 , soc_inst|m0_1|u_logic|Gfq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~2 , soc_inst|m0_1|u_logic|Pdbwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~6 , soc_inst|m0_1|u_logic|Pdbwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Art2z4 , soc_inst|m0_1|u_logic|Art2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0v2z4 , soc_inst|m0_1|u_logic|J0v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~0 , soc_inst|m0_1|u_logic|Pdbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An63z4 , soc_inst|m0_1|u_logic|An63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx83z4 , soc_inst|m0_1|u_logic|Yx83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~7 , soc_inst|m0_1|u_logic|Pdbwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~8 , soc_inst|m0_1|u_logic|Pdbwx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4 , soc_inst|m0_1|u_logic|Pdbwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~1 , soc_inst|m0_1|u_logic|Cfzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw73z4 , soc_inst|m0_1|u_logic|Jw73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~1 , soc_inst|m0_1|u_logic|Fexwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~0 , soc_inst|m0_1|u_logic|Fexwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fexwx4 , soc_inst|m0_1|u_logic|Fexwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yvtwx4~0 , soc_inst|m0_1|u_logic|Yvtwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gvdwx4~0 , soc_inst|m0_1|u_logic|Gvdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~0 , soc_inst|m0_1|u_logic|Jymwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~1 , soc_inst|m0_1|u_logic|Jymwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~0 , soc_inst|m0_1|u_logic|Cymwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~1 , soc_inst|m0_1|u_logic|Cymwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~2 , soc_inst|m0_1|u_logic|Cymwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~3 , soc_inst|m0_1|u_logic|Cymwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qe0wx4~0 , soc_inst|m0_1|u_logic|Qe0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qe0wx4 , soc_inst|m0_1|u_logic|Qe0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~61 , soc_inst|m0_1|u_logic|Add2~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~0 , soc_inst|m0_1|u_logic|Gehvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~1 , soc_inst|m0_1|u_logic|Gehvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Foe3z4 , soc_inst|m0_1|u_logic|Foe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~105 , soc_inst|m0_1|u_logic|Add2~105, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~0 , soc_inst|m0_1|u_logic|Vihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~1 , soc_inst|m0_1|u_logic|Vihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nox2z4 , soc_inst|m0_1|u_logic|Nox2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~0 , soc_inst|m0_1|u_logic|Zdhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4 , soc_inst|m0_1|u_logic|Oa3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~1 , soc_inst|m0_1|u_logic|Zdhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kaf3z4 , soc_inst|m0_1|u_logic|Kaf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y92wx4 , soc_inst|m0_1|u_logic|Y92wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8ivx4~0 , soc_inst|m0_1|u_logic|K8ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6j2z4 , soc_inst|m0_1|u_logic|B6j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~1 , soc_inst|m0_1|u_logic|R6cwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldf3z4~feeder , soc_inst|m0_1|u_logic|Ldf3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldf3z4 , soc_inst|m0_1|u_logic|Ldf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I852z4~0 , soc_inst|m0_1|u_logic|I852z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bqf3z4 , soc_inst|m0_1|u_logic|Bqf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S652z4~0 , soc_inst|m0_1|u_logic|S652z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE , soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W852z4~0 , soc_inst|m0_1|u_logic|W852z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmf3z4 , soc_inst|m0_1|u_logic|Xmf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G752z4~0 , soc_inst|m0_1|u_logic|G752z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aff3z4 , soc_inst|m0_1|u_logic|Aff3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P852z4~0 , soc_inst|m0_1|u_logic|P852z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~4 , soc_inst|m0_1|u_logic|R6cwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Orj2z4 , soc_inst|m0_1|u_logic|Orj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~2 , soc_inst|m0_1|u_logic|R6cwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fpi2z4 , soc_inst|m0_1|u_logic|Fpi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~0 , soc_inst|m0_1|u_logic|R6cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O452z4~0 , soc_inst|m0_1|u_logic|O452z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgf3z4 , soc_inst|m0_1|u_logic|Pgf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C552z4~0 , soc_inst|m0_1|u_logic|C552z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M352z4~0 , soc_inst|m0_1|u_logic|M352z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T352z4~0 , soc_inst|m0_1|u_logic|T352z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~3 , soc_inst|m0_1|u_logic|R6cwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~5 , soc_inst|m0_1|u_logic|R6cwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[23]~0 , soc_inst|ram_1|data_to_memory[23]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V4ovx4~0 , soc_inst|m0_1|u_logic|V4ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4 , soc_inst|m0_1|u_logic|Vfd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4l2z4 , soc_inst|m0_1|u_logic|Z4l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uqi2z4 , soc_inst|m0_1|u_logic|Uqi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~0 , soc_inst|m0_1|u_logic|R6xwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~1 , soc_inst|m0_1|u_logic|R6xwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~2 , soc_inst|m0_1|u_logic|R6xwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE , soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Walwx4~0 , soc_inst|m0_1|u_logic|Walwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Walwx4~1 , soc_inst|m0_1|u_logic|Walwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~0 , soc_inst|m0_1|u_logic|R5zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~1 , soc_inst|m0_1|u_logic|R5zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J3qvx4~0 , soc_inst|m0_1|u_logic|J3qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4 , soc_inst|m0_1|u_logic|Lpu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~3 , soc_inst|m0_1|u_logic|N3ywx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xti2z4 , soc_inst|m0_1|u_logic|Xti2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~1 , soc_inst|m0_1|u_logic|N3ywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~2 , soc_inst|m0_1|u_logic|N3ywx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~0 , soc_inst|m0_1|u_logic|N3ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4 , soc_inst|m0_1|u_logic|N3ywx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U2ewx4~0 , soc_inst|m0_1|u_logic|U2ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M7qwx4~0 , soc_inst|m0_1|u_logic|M7qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~12 , soc_inst|m0_1|u_logic|hwdata_o~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[29]~22 , soc_inst|ram_1|data_to_memory[29]~22, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[13]~21 , soc_inst|ram_1|data_to_memory[13]~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~0 , soc_inst|m0_1|u_logic|Hxmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~1 , soc_inst|m0_1|u_logic|Hxmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~0 , soc_inst|m0_1|u_logic|Mb1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~1 , soc_inst|m0_1|u_logic|Mb1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B91wx4~1 , soc_inst|m0_1|u_logic|B91wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B91wx4~2 , soc_inst|m0_1|u_logic|B91wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B91wx4~0 , soc_inst|m0_1|u_logic|B91wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vxf3z4~feeder , soc_inst|m0_1|u_logic|Vxf3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~2 , soc_inst|m0_1|u_logic|Hc1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~4 , soc_inst|m0_1|u_logic|Hc1wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~3 , soc_inst|m0_1|u_logic|Hc1wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E163z4 , soc_inst|m0_1|u_logic|E163z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~1 , soc_inst|m0_1|u_logic|Hc1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~0 , soc_inst|m0_1|u_logic|Hc1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE , soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X94xx4~0 , soc_inst|m0_1|u_logic|X94xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~5 , soc_inst|m0_1|u_logic|Hc1wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4 , soc_inst|m0_1|u_logic|Hc1wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[13]~11 , soc_inst|m0_1|u_logic|hwdata_o[13]~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4g3z4~0 , soc_inst|m0_1|u_logic|D4g3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4g3z4 , soc_inst|m0_1|u_logic|D4g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzhvx4~0 , soc_inst|m0_1|u_logic|Gzhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Geuwx4~0 , soc_inst|m0_1|u_logic|Geuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~2 , soc_inst|m0_1|u_logic|Jjuwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5pwx4~0 , soc_inst|m0_1|u_logic|U5pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~1 , soc_inst|m0_1|u_logic|Kzqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Viuwx4~0 , soc_inst|m0_1|u_logic|Viuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~4 , soc_inst|m0_1|u_logic|B6pwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~2 , soc_inst|m0_1|u_logic|Kzqvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~0 , soc_inst|m0_1|u_logic|Kzqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5g3z4 , soc_inst|m0_1|u_logic|T5g3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|HRDATA[13]~27 , soc_inst|interconnect_1|HRDATA[13]~27, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~0 , soc_inst|m0_1|u_logic|Twmwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~1 , soc_inst|m0_1|u_logic|Twmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~2 , soc_inst|m0_1|u_logic|Kzqvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~1 , soc_inst|m0_1|u_logic|Kzqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~0 , soc_inst|m0_1|u_logic|Kzqvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~2 , soc_inst|m0_1|u_logic|Twmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~0 , soc_inst|m0_1|u_logic|Bspvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~1 , soc_inst|m0_1|u_logic|Bspvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~0 , soc_inst|m0_1|u_logic|Xowwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~1 , soc_inst|m0_1|u_logic|Xowwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xowwx4 , soc_inst|m0_1|u_logic|Xowwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~0 , soc_inst|m0_1|u_logic|Ok7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~0 , soc_inst|m0_1|u_logic|Mj7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jl7wx4~0 , soc_inst|m0_1|u_logic|Jl7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Et7wx4~0 , soc_inst|m0_1|u_logic|Et7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nu7wx4~0 , soc_inst|m0_1|u_logic|Nu7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~1 , soc_inst|m0_1|u_logic|Mj7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~2 , soc_inst|m0_1|u_logic|Dtpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~0 , soc_inst|m0_1|u_logic|Dtpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~129 , soc_inst|m0_1|u_logic|Add5~129, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~1 , soc_inst|m0_1|u_logic|Dtpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~0 , soc_inst|m0_1|u_logic|Zei2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~1 , soc_inst|m0_1|u_logic|Zei2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zei2z4 , soc_inst|m0_1|u_logic|Zei2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~0 , soc_inst|m0_1|u_logic|Qynvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~1 , soc_inst|m0_1|u_logic|Qynvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~1 , soc_inst|m0_1|u_logic|Vxnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~134 , soc_inst|m0_1|u_logic|Add5~134, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~2 , soc_inst|m0_1|u_logic|G5qvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~1 , soc_inst|m0_1|u_logic|G5qvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejm2z4 , soc_inst|m0_1|u_logic|Ejm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4 , soc_inst|m0_1|u_logic|Gmm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4~1 , soc_inst|m0_1|u_logic|Q8ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imt2z4 , soc_inst|m0_1|u_logic|Imt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4~0 , soc_inst|m0_1|u_logic|Q8ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4 , soc_inst|m0_1|u_logic|Q8ywx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4ywx4~0 , soc_inst|m0_1|u_logic|W4ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mzxwx4~0 , soc_inst|m0_1|u_logic|Mzxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oldwx4~0 , soc_inst|m0_1|u_logic|Oldwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE , soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~0 , soc_inst|m0_1|u_logic|Vcuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~1 , soc_inst|m0_1|u_logic|Vcuvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wamvx4~0 , soc_inst|m0_1|u_logic|Wamvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4 , soc_inst|m0_1|u_logic|Tdp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~0 , soc_inst|m0_1|u_logic|Qnkvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~1 , soc_inst|m0_1|u_logic|Qnkvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Euzvx4~0 , soc_inst|m0_1|u_logic|Euzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtzvx4~0 , soc_inst|m0_1|u_logic|Qtzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~0 , soc_inst|m0_1|u_logic|Oszvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~1 , soc_inst|m0_1|u_logic|Oszvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6v2z4 , soc_inst|m0_1|u_logic|R6v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~3 , soc_inst|m0_1|u_logic|Svqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~2 , soc_inst|m0_1|u_logic|Svqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~1 , soc_inst|m0_1|u_logic|Svqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~0 , soc_inst|m0_1|u_logic|Svqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4 , soc_inst|m0_1|u_logic|Svqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~0 , soc_inst|m0_1|u_logic|Tkdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~1 , soc_inst|m0_1|u_logic|Tkdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][2] , soc_inst|switches_1|switch_store[0][2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[2]~14 , soc_inst|interconnect_1|HRDATA[2]~14, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mbt2z4 , soc_inst|m0_1|u_logic|Mbt2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yrqwx4~0 , soc_inst|m0_1|u_logic|Yrqwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~0 , soc_inst|m0_1|u_logic|Ojmwx4~0, de1_soc_wrapper, 1
@@ -3100,267 +3114,302 @@ instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~1 , soc_inst|m0_1|u_logic|Ojmwx4~
 instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~2 , soc_inst|m0_1|u_logic|Ojmwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wn1wx4~0 , soc_inst|m0_1|u_logic|Wn1wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wn1wx4~1 , soc_inst|m0_1|u_logic|Wn1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~41 , soc_inst|m0_1|u_logic|Add2~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4 , soc_inst|m0_1|u_logic|Ufx2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~1 , soc_inst|m0_1|u_logic|Lkhvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~0 , soc_inst|m0_1|u_logic|Lkhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4 , soc_inst|m0_1|u_logic|Ufx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~85 , soc_inst|m0_1|u_logic|Add2~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~1 , soc_inst|m0_1|u_logic|Uehvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~0 , soc_inst|m0_1|u_logic|Uehvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gmd3z4 , soc_inst|m0_1|u_logic|Gmd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fhx2z4 , soc_inst|m0_1|u_logic|Fhx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~0 , soc_inst|m0_1|u_logic|Ekhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~0 , soc_inst|m0_1|u_logic|Uf1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~1 , soc_inst|m0_1|u_logic|Uf1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~1 , soc_inst|m0_1|u_logic|Ekhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L4jvx4~0 , soc_inst|m0_1|u_logic|L4jvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dkr2z4 , soc_inst|m0_1|u_logic|Dkr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~7 , soc_inst|m0_1|u_logic|Ze1wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~8 , soc_inst|m0_1|u_logic|Ze1wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~1 , soc_inst|m0_1|u_logic|Ejawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nf1wx4~1 , soc_inst|m0_1|u_logic|Nf1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~0 , soc_inst|m0_1|u_logic|Qd1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~1 , soc_inst|m0_1|u_logic|Qd1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oir2z4 , soc_inst|m0_1|u_logic|Oir2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dy4xx4~0 , soc_inst|m0_1|u_logic|Dy4xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~4 , soc_inst|m0_1|u_logic|Ze1wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE , soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~3 , soc_inst|m0_1|u_logic|Ze1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~1 , soc_inst|m0_1|u_logic|Ze1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M413z4 , soc_inst|m0_1|u_logic|M413z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~2 , soc_inst|m0_1|u_logic|Ze1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll83z4 , soc_inst|m0_1|u_logic|Ll83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~0 , soc_inst|m0_1|u_logic|Ze1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~5 , soc_inst|m0_1|u_logic|Ze1wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4 , soc_inst|m0_1|u_logic|Ze1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[12]~19 , soc_inst|m0_1|u_logic|hwdata_o[12]~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7a3z4 , soc_inst|m0_1|u_logic|L7a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~37 , soc_inst|m0_1|u_logic|Add0~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ypmvx4~0 , soc_inst|m0_1|u_logic|Ypmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iua3z4 , soc_inst|m0_1|u_logic|Iua3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~61 , soc_inst|m0_1|u_logic|Add0~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rpmvx4~0 , soc_inst|m0_1|u_logic|Rpmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7g3z4 , soc_inst|m0_1|u_logic|K7g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~81 , soc_inst|m0_1|u_logic|Add0~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kpmvx4~0 , soc_inst|m0_1|u_logic|Kpmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rsa3z4 , soc_inst|m0_1|u_logic|Rsa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4a3z4~0 , soc_inst|m0_1|u_logic|D4a3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4a3z4 , soc_inst|m0_1|u_logic|D4a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dpmvx4~0 , soc_inst|m0_1|u_logic|Dpmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ara3z4 , soc_inst|m0_1|u_logic|Ara3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jxovx4 , soc_inst|m0_1|u_logic|Jxovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qknvx4~0 , soc_inst|m0_1|u_logic|Qknvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffs2z4 , soc_inst|m0_1|u_logic|Ffs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T2owx4~1 , soc_inst|m0_1|u_logic|T2owx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[3] , soc_inst|ram_1|byte_select[3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[27]~19 , soc_inst|ram_1|data_to_memory[27]~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~0 , soc_inst|m0_1|u_logic|Mjlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~1 , soc_inst|m0_1|u_logic|Mjlwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~0 , soc_inst|m0_1|u_logic|Ll1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~1 , soc_inst|m0_1|u_logic|Ll1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gmd3z4 , soc_inst|m0_1|u_logic|Gmd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~1 , soc_inst|m0_1|u_logic|Uehvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~0 , soc_inst|m0_1|u_logic|Uehvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzivx4~0 , soc_inst|m0_1|u_logic|Wzivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wce3z4 , soc_inst|m0_1|u_logic|Wce3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ibe3z4 , soc_inst|m0_1|u_logic|Ibe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~1 , soc_inst|m0_1|u_logic|Cc9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~2 , soc_inst|m0_1|u_logic|Cc9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ge9wx4~0 , soc_inst|m0_1|u_logic|Ge9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~0 , soc_inst|m0_1|u_logic|Cc9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~3 , soc_inst|m0_1|u_logic|Cc9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qk1wx4~0 , soc_inst|m0_1|u_logic|Qk1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Owovx4 , soc_inst|m0_1|u_logic|Owovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~8 , soc_inst|m0_1|u_logic|Nlovx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~0 , soc_inst|m0_1|u_logic|Nlovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~5 , soc_inst|m0_1|u_logic|Nlovx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~3 , soc_inst|m0_1|u_logic|Nlovx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~1 , soc_inst|m0_1|u_logic|Nlovx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~2 , soc_inst|m0_1|u_logic|Nlovx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~4 , soc_inst|m0_1|u_logic|Nlovx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~6 , soc_inst|m0_1|u_logic|Nlovx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~7 , soc_inst|m0_1|u_logic|Nlovx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xknvx4~0 , soc_inst|m0_1|u_logic|Xknvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kop2z4 , soc_inst|m0_1|u_logic|Kop2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N1uvx4 , soc_inst|m0_1|u_logic|N1uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0uvx4 , soc_inst|m0_1|u_logic|Z0uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE , soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ara3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ara3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~1 , soc_inst|m0_1|u_logic|Wjxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqs2z4 , soc_inst|m0_1|u_logic|Tqs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgs2z4 , soc_inst|m0_1|u_logic|Vgs2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~0 , soc_inst|m0_1|u_logic|Wjxwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~2 , soc_inst|m0_1|u_logic|Wjxwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~3 , soc_inst|m0_1|u_logic|Wjxwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~4 , soc_inst|m0_1|u_logic|Wjxwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[15]~2 , soc_inst|ram_1|data_to_memory[15]~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~0 , soc_inst|m0_1|u_logic|hwdata_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[31]~1 , soc_inst|ram_1|data_to_memory[31]~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[31]~1 , soc_inst|ram_1|data_to_memory[31]~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|HRDATA[15]~4 , soc_inst|interconnect_1|HRDATA[15]~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U9lwx4~0 , soc_inst|m0_1|u_logic|U9lwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U9lwx4~1 , soc_inst|m0_1|u_logic|U9lwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mtwwx4~0 , soc_inst|m0_1|u_logic|Mtwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~2 , soc_inst|m0_1|u_logic|Zz1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~1 , soc_inst|m0_1|u_logic|Zz1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K22wx4~1 , soc_inst|m0_1|u_logic|K22wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K22wx4~0 , soc_inst|m0_1|u_logic|K22wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~0 , soc_inst|m0_1|u_logic|Zz1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE , soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E913z4~DUPLICATE , soc_inst|m0_1|u_logic|E913z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~7 , soc_inst|m0_1|u_logic|P12wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~4 , soc_inst|m0_1|u_logic|P12wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Otr2z4 , soc_inst|m0_1|u_logic|Otr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~5 , soc_inst|m0_1|u_logic|P12wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~6 , soc_inst|m0_1|u_logic|P12wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~0 , soc_inst|m0_1|u_logic|P12wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr83z4 , soc_inst|m0_1|u_logic|Rr83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE , soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yg23z4 , soc_inst|m0_1|u_logic|Yg23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~1 , soc_inst|m0_1|u_logic|P12wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE , soc_inst|m0_1|u_logic|Z863z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~2 , soc_inst|m0_1|u_logic|P12wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~3 , soc_inst|m0_1|u_logic|P12wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4 , soc_inst|m0_1|u_logic|P12wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~1 , soc_inst|m0_1|u_logic|Lk9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~0 , soc_inst|m0_1|u_logic|Oa3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~1 , soc_inst|m0_1|u_logic|Oa3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fa2wx4~0 , soc_inst|m0_1|u_logic|Fa2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wbf3z4 , soc_inst|m0_1|u_logic|Wbf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~1 , soc_inst|m0_1|u_logic|Icxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~0 , soc_inst|m0_1|u_logic|Icxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~3 , soc_inst|m0_1|u_logic|Icxwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~2 , soc_inst|m0_1|u_logic|Icxwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4 , soc_inst|m0_1|u_logic|Icxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~0 , soc_inst|m0_1|u_logic|Mrdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~1 , soc_inst|m0_1|u_logic|Mrdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mbtwx4~0 , soc_inst|m0_1|u_logic|Mbtwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~0 , soc_inst|m0_1|u_logic|Bgfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~1 , soc_inst|m0_1|u_logic|Bgfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~0 , soc_inst|m0_1|u_logic|Vq1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~1 , soc_inst|m0_1|u_logic|Vq1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4 , soc_inst|m0_1|u_logic|Vq1wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~1 , soc_inst|m0_1|u_logic|Bfhvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|V4d3z4 , soc_inst|m0_1|u_logic|V4d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xxovx4 , soc_inst|m0_1|u_logic|Xxovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE , soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Dmivx4~0 , soc_inst|m0_1|u_logic|Dmivx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Dmivx4~1 , soc_inst|m0_1|u_logic|Dmivx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G1s2z4 , soc_inst|m0_1|u_logic|G1s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4 , soc_inst|m0_1|u_logic|Dcs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ria2z4~0 , soc_inst|m0_1|u_logic|Ria2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H903z4 , soc_inst|m0_1|u_logic|H903z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~2 , soc_inst|m0_1|u_logic|Uga2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~1 , soc_inst|m0_1|u_logic|Uga2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE , soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I463z4 , soc_inst|m0_1|u_logic|I463z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~0 , soc_inst|m0_1|u_logic|Uga2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~3 , soc_inst|m0_1|u_logic|Uga2z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxnvx4~0 , soc_inst|m0_1|u_logic|Hxnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jxovx4 , soc_inst|m0_1|u_logic|Jxovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qknvx4~0 , soc_inst|m0_1|u_logic|Qknvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffs2z4 , soc_inst|m0_1|u_logic|Ffs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~0 , soc_inst|m0_1|u_logic|F4nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~1 , soc_inst|m0_1|u_logic|F4nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K3l2z4 , soc_inst|m0_1|u_logic|K3l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ux4wx4~0 , soc_inst|m0_1|u_logic|Ux4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P2a3z4 , soc_inst|m0_1|u_logic|P2a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Inb2z4 , soc_inst|m0_1|u_logic|Inb2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~3 , soc_inst|m0_1|u_logic|Vsywx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~1 , soc_inst|m0_1|u_logic|Vsywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjd3z4 , soc_inst|m0_1|u_logic|Bjd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~0 , soc_inst|m0_1|u_logic|Vsywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~4 , soc_inst|m0_1|u_logic|Vsywx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7d3z4 , soc_inst|m0_1|u_logic|T7d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~5 , soc_inst|m0_1|u_logic|Vsywx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~2 , soc_inst|m0_1|u_logic|Vsywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~6 , soc_inst|m0_1|u_logic|Vsywx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xtywx4~0 , soc_inst|m0_1|u_logic|Xtywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~1 , soc_inst|m0_1|u_logic|Ypa2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8b2z4 , soc_inst|m0_1|u_logic|N8b2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~0 , soc_inst|m0_1|u_logic|Ypa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C34wx4~0 , soc_inst|m0_1|u_logic|C34wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C34wx4 , soc_inst|m0_1|u_logic|C34wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~1 , soc_inst|m0_1|u_logic|Cr0xx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~0 , soc_inst|m0_1|u_logic|F5mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~0 , soc_inst|m0_1|u_logic|Q5vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kofwx4~0 , soc_inst|m0_1|u_logic|Kofwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk4wx4 , soc_inst|m0_1|u_logic|Bk4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Si4wx4~0 , soc_inst|m0_1|u_logic|Si4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~0 , soc_inst|m0_1|u_logic|Pd4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~1 , soc_inst|m0_1|u_logic|Pd4wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9i2z4 , soc_inst|m0_1|u_logic|H9i2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lny2z4 , soc_inst|m0_1|u_logic|Lny2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W7hwx4~0 , soc_inst|m0_1|u_logic|W7hwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~0 , soc_inst|m0_1|u_logic|Poa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~0 , soc_inst|m0_1|u_logic|Ik4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4 , soc_inst|m0_1|u_logic|Qdj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~1 , soc_inst|m0_1|u_logic|Ik4wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~2 , soc_inst|m0_1|u_logic|Pd4wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~1 , soc_inst|m0_1|u_logic|Q5vvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7mvx4~0 , soc_inst|m0_1|u_logic|Q7mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U7w2z4 , soc_inst|m0_1|u_logic|U7w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~1 , soc_inst|m0_1|u_logic|Kkrvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~2 , soc_inst|m0_1|u_logic|Arzwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~0 , soc_inst|m0_1|u_logic|Kkrvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~2 , soc_inst|m0_1|u_logic|Kkrvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~3 , soc_inst|m0_1|u_logic|Kkrvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~4 , soc_inst|m0_1|u_logic|Kkrvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~5 , soc_inst|m0_1|u_logic|Kkrvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~6 , soc_inst|m0_1|u_logic|Kkrvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kyi2z4 , soc_inst|m0_1|u_logic|Kyi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rpe3z4 , soc_inst|m0_1|u_logic|Rpe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fre3z4 , soc_inst|m0_1|u_logic|Fre3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~2 , soc_inst|m0_1|u_logic|Oubwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hue3z4 , soc_inst|m0_1|u_logic|Hue3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy43z4 , soc_inst|m0_1|u_logic|Cy43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L763z4 , soc_inst|m0_1|u_logic|L763z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~0 , soc_inst|m0_1|u_logic|Oubwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf23z4~feeder , soc_inst|m0_1|u_logic|Kf23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE , soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|To33z4~DUPLICATE , soc_inst|m0_1|u_logic|To33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~1 , soc_inst|m0_1|u_logic|Oubwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwbwx4~0 , soc_inst|m0_1|u_logic|Lwbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~3 , soc_inst|m0_1|u_logic|Oubwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Konvx4~0 , soc_inst|m0_1|u_logic|Konvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xxovx4 , soc_inst|m0_1|u_logic|Xxovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[7] , soc_inst|ram_1|saved_word_address[7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[7]~7 , soc_inst|ram_1|memory.raddr_a[7]~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[0]~32 , soc_inst|interconnect_1|HRDATA[0]~32, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vcnvx4~0 , soc_inst|m0_1|u_logic|Vcnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kyi2z4 , soc_inst|m0_1|u_logic|Kyi2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~0 , soc_inst|m0_1|u_logic|C9rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~0 , soc_inst|m0_1|u_logic|Kfpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~0 , soc_inst|m0_1|u_logic|Irqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hhpvx4~0 , soc_inst|m0_1|u_logic|Hhpvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~1 , soc_inst|m0_1|u_logic|Kfpvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~2 , soc_inst|m0_1|u_logic|Kfpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~0 , soc_inst|m0_1|u_logic|Kfpvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~3 , soc_inst|m0_1|u_logic|Kfpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~4 , soc_inst|m0_1|u_logic|Kfpvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jipvx4~0 , soc_inst|m0_1|u_logic|Jipvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~5 , soc_inst|m0_1|u_logic|Kfpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz8wx4 , soc_inst|m0_1|u_logic|Zz8wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J00wx4~0 , soc_inst|m0_1|u_logic|J00wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~0 , soc_inst|m0_1|u_logic|Gpcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~1 , soc_inst|m0_1|u_logic|Gpcwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J00wx4~1 , soc_inst|m0_1|u_logic|J00wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C00wx4~0 , soc_inst|m0_1|u_logic|C00wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bn53z4 , soc_inst|m0_1|u_logic|Bn53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5r2z4 , soc_inst|m0_1|u_logic|U5r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twz2z4 , soc_inst|m0_1|u_logic|Twz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J433z4 , soc_inst|m0_1|u_logic|J433z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av13z4 , soc_inst|m0_1|u_logic|Av13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nt03z4 , soc_inst|m0_1|u_logic|Nt03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~2 , soc_inst|m0_1|u_logic|Am5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I7r2z4 , soc_inst|m0_1|u_logic|I7r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sd43z4 , soc_inst|m0_1|u_logic|Sd43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~3 , soc_inst|m0_1|u_logic|Am5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~0 , soc_inst|m0_1|u_logic|Am5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~1 , soc_inst|m0_1|u_logic|Am5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H0dwx4~0 , soc_inst|m0_1|u_logic|H0dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O0dwx4~0 , soc_inst|m0_1|u_logic|O0dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xucwx4~0 , soc_inst|m0_1|u_logic|Xucwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~25 , soc_inst|m0_1|u_logic|Add2~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~17 , soc_inst|m0_1|u_logic|Add2~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~33 , soc_inst|m0_1|u_logic|Add2~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~0 , soc_inst|m0_1|u_logic|Ulhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~1 , soc_inst|m0_1|u_logic|Ulhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8x2z4 , soc_inst|m0_1|u_logic|R8x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~29 , soc_inst|m0_1|u_logic|Add3~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~25 , soc_inst|m0_1|u_logic|Add3~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~33 , soc_inst|m0_1|u_logic|Add3~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~53 , soc_inst|m0_1|u_logic|Add3~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~49 , soc_inst|m0_1|u_logic|Add3~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4qvx4 , soc_inst|m0_1|u_logic|S4qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[5] , soc_inst|ram_1|saved_word_address[5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[5]~5 , soc_inst|ram_1|memory.raddr_a[5]~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[19]~18 , soc_inst|ram_1|data_to_memory[19]~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[19]~25 , soc_inst|interconnect_1|HRDATA[19]~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jky2z4 , soc_inst|m0_1|u_logic|Jky2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~0 , soc_inst|m0_1|u_logic|E7nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vphvx4~0 , soc_inst|m0_1|u_logic|Vphvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oiw2z4 , soc_inst|m0_1|u_logic|Oiw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~1 , soc_inst|m0_1|u_logic|E7nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~2 , soc_inst|m0_1|u_logic|E7nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~0 , soc_inst|m0_1|u_logic|Fjswx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Emewx4~0 , soc_inst|m0_1|u_logic|Emewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvswx4~0 , soc_inst|m0_1|u_logic|Wvswx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~1 , soc_inst|m0_1|u_logic|Fjswx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T1d3z4 , soc_inst|m0_1|u_logic|T1d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4 , soc_inst|m0_1|u_logic|Qzq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~0 , soc_inst|m0_1|u_logic|Ylwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~1 , soc_inst|m0_1|u_logic|Ylwwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~1 , soc_inst|m0_1|u_logic|Ok7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Manwx4~0 , soc_inst|m0_1|u_logic|Manwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwdwx4~0 , soc_inst|m0_1|u_logic|Pwdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~1 , soc_inst|m0_1|u_logic|Glnwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~1 , soc_inst|m0_1|u_logic|Skhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~0 , soc_inst|m0_1|u_logic|Skhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jex2z4 , soc_inst|m0_1|u_logic|Jex2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z6ovx4 , soc_inst|m0_1|u_logic|Z6ovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nmnvx4~0 , soc_inst|m0_1|u_logic|Nmnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mjl2z4 , soc_inst|m0_1|u_logic|Mjl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~0 , soc_inst|m0_1|u_logic|B2uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfuwx4 , soc_inst|m0_1|u_logic|Wfuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Owgvx4~0 , soc_inst|m0_1|u_logic|Owgvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ywi2z4 , soc_inst|m0_1|u_logic|Ywi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6mwx4~0 , soc_inst|m0_1|u_logic|Q6mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~1 , soc_inst|m0_1|u_logic|X2rvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~2 , soc_inst|m0_1|u_logic|X2rvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tbnvx4~0 , soc_inst|m0_1|u_logic|Tbnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lbn2z4 , soc_inst|m0_1|u_logic|Lbn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9mvx4~0 , soc_inst|m0_1|u_logic|U9mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rryvx4~0 , soc_inst|m0_1|u_logic|Rryvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Upyvx4~0 , soc_inst|m0_1|u_logic|Upyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R3mwx4~0 , soc_inst|m0_1|u_logic|R3mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pet2z4 , soc_inst|m0_1|u_logic|Pet2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~0 , soc_inst|m0_1|u_logic|Nen2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~1 , soc_inst|m0_1|u_logic|Nen2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nen2z4 , soc_inst|m0_1|u_logic|Nen2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~0 , soc_inst|m0_1|u_logic|Qppvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lz8wx4~0 , soc_inst|m0_1|u_logic|Lz8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~1 , soc_inst|m0_1|u_logic|Qppvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~0 , soc_inst|m0_1|u_logic|C2rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~1 , soc_inst|m0_1|u_logic|C2rvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~2 , soc_inst|m0_1|u_logic|C2rvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~2 , soc_inst|m0_1|u_logic|Qppvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fwj2z4 , soc_inst|m0_1|u_logic|Fwj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txj2z4 , soc_inst|m0_1|u_logic|Txj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~0 , soc_inst|m0_1|u_logic|V7ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE , soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~1 , soc_inst|m0_1|u_logic|V7ywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V7ywx4 , soc_inst|m0_1|u_logic|V7ywx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A7ywx4~0 , soc_inst|m0_1|u_logic|A7ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mzxwx4~0 , soc_inst|m0_1|u_logic|Mzxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9nwx4~0 , soc_inst|m0_1|u_logic|Y9nwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~0 , soc_inst|m0_1|u_logic|Kkyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~0 , soc_inst|m0_1|u_logic|Zuzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~1 , soc_inst|m0_1|u_logic|Zuzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~1 , soc_inst|m0_1|u_logic|Glhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nbx2z4 , soc_inst|m0_1|u_logic|Nbx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hszvx4 , soc_inst|m0_1|u_logic|Hszvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[4] , soc_inst|ram_1|saved_word_address[4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[4]~4 , soc_inst|ram_1|memory.raddr_a[4]~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[2] , soc_inst|ram_1|byte_select[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[23]~3 , soc_inst|ram_1|data_to_memory[23]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[23]~8 , soc_inst|interconnect_1|HRDATA[23]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tohvx4~0 , soc_inst|m0_1|u_logic|Tohvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sow2z4 , soc_inst|m0_1|u_logic|Sow2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~1 , soc_inst|m0_1|u_logic|C6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~0 , soc_inst|m0_1|u_logic|C6nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~2 , soc_inst|m0_1|u_logic|C6nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|My6wx4~0 , soc_inst|m0_1|u_logic|My6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~1 , soc_inst|m0_1|u_logic|K6yvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~2 , soc_inst|m0_1|u_logic|K6yvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xiwvx4~0 , soc_inst|m0_1|u_logic|Xiwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~3 , soc_inst|m0_1|u_logic|K6yvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~4 , soc_inst|m0_1|u_logic|K6yvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X8kwx4~0 , soc_inst|m0_1|u_logic|X8kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~5 , soc_inst|m0_1|u_logic|K6yvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zzfwx4~0 , soc_inst|m0_1|u_logic|Zzfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tuwvx4~0 , soc_inst|m0_1|u_logic|Tuwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~6 , soc_inst|m0_1|u_logic|K6yvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~7 , soc_inst|m0_1|u_logic|K6yvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~8 , soc_inst|m0_1|u_logic|K6yvx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~9 , soc_inst|m0_1|u_logic|K6yvx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~10 , soc_inst|m0_1|u_logic|K6yvx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE , soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|L61xx4~0 , soc_inst|m0_1|u_logic|L61xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hq23z4 , soc_inst|m0_1|u_logic|Hq23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z853z4 , soc_inst|m0_1|u_logic|Z853z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Knz2z4 , soc_inst|m0_1|u_logic|Knz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~2 , soc_inst|m0_1|u_logic|Zhyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~1 , soc_inst|m0_1|u_logic|Zhyvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qz33z4~feeder , soc_inst|m0_1|u_logic|Qz33z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qz33z4 , soc_inst|m0_1|u_logic|Qz33z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yg13z4~feeder , soc_inst|m0_1|u_logic|Yg13z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yg13z4 , soc_inst|m0_1|u_logic|Yg13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg13z4~DUPLICATE , soc_inst|m0_1|u_logic|Yg13z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~0 , soc_inst|m0_1|u_logic|Zhyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hq23z4 , soc_inst|m0_1|u_logic|Hq23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE , soc_inst|m0_1|u_logic|Z853z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~2 , soc_inst|m0_1|u_logic|Zhyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~1 , soc_inst|m0_1|u_logic|Zhyvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4 , soc_inst|m0_1|u_logic|Zhyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~5 , soc_inst|m0_1|u_logic|hwdata_o~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[0]~27 , soc_inst|ram_1|data_to_memory[0]~27, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[0]~32 , soc_inst|interconnect_1|HRDATA[0]~32, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~0 , soc_inst|m0_1|u_logic|Qdnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O24wx4~0 , soc_inst|m0_1|u_logic|O24wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|data_to_memory[16]~25 , soc_inst|ram_1|data_to_memory[16]~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~1 , soc_inst|m0_1|u_logic|Ny3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[24]~26 , soc_inst|ram_1|data_to_memory[24]~26, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][0] , soc_inst|switches_1|switch_store[1][0], de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|HRDATA[16]~30 , soc_inst|interconnect_1|HRDATA[16]~30, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qqhvx4~0 , soc_inst|m0_1|u_logic|Qqhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ydw2z4 , soc_inst|m0_1|u_logic|Ydw2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~1 , soc_inst|m0_1|u_logic|Qdnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~0 , soc_inst|m0_1|u_logic|Qdnvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~2 , soc_inst|m0_1|u_logic|Qdnvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yzi2z4 , soc_inst|m0_1|u_logic|Yzi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Keiwx4~0 , soc_inst|m0_1|u_logic|Keiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Celwx4~0 , soc_inst|m0_1|u_logic|Celwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Celwx4~1 , soc_inst|m0_1|u_logic|Celwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~1 , soc_inst|m0_1|u_logic|Fbfwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|A2iwx4~0 , soc_inst|m0_1|u_logic|A2iwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|A2iwx4~1 , soc_inst|m0_1|u_logic|A2iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4 , soc_inst|m0_1|u_logic|Sjj2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mvc2z4 , soc_inst|m0_1|u_logic|Mvc2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~1 , soc_inst|m0_1|u_logic|Awc2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vwc2z4~0 , soc_inst|m0_1|u_logic|Vwc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~0 , soc_inst|m0_1|u_logic|Kuc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~0 , soc_inst|m0_1|u_logic|Awc2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~1 , soc_inst|m0_1|u_logic|Kuc2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qa43z4 , soc_inst|m0_1|u_logic|Qa43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~0 , soc_inst|m0_1|u_logic|Qp62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H133z4~DUPLICATE , soc_inst|m0_1|u_logic|H133z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~1 , soc_inst|m0_1|u_logic|Qp62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~2 , soc_inst|m0_1|u_logic|Qp62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nr62z4~0 , soc_inst|m0_1|u_logic|Nr62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~3 , soc_inst|m0_1|u_logic|Qp62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Euzvx4~0 , soc_inst|m0_1|u_logic|Euzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hszvx4 , soc_inst|m0_1|u_logic|Hszvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[4] , soc_inst|ram_1|saved_word_address[4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[4]~4 , soc_inst|ram_1|memory.raddr_a[4]~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~1 , soc_inst|m0_1|u_logic|Xhbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wd23z4 , soc_inst|m0_1|u_logic|Wd23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~3 , soc_inst|m0_1|u_logic|Xhbwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE , soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~2 , soc_inst|m0_1|u_logic|Xhbwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~0 , soc_inst|m0_1|u_logic|Xhbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qrnvx4~0 , soc_inst|m0_1|u_logic|Qrnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asbvx4 , soc_inst|m0_1|u_logic|Asbvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~33 , soc_inst|m0_1|u_logic|Add5~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~33 , soc_inst|m0_1|u_logic|Add2~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~0 , soc_inst|m0_1|u_logic|Ulhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~1 , soc_inst|m0_1|u_logic|Ulhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8x2z4 , soc_inst|m0_1|u_logic|R8x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~0 , soc_inst|m0_1|u_logic|Nlhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~1 , soc_inst|m0_1|u_logic|Nlhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cax2z4 , soc_inst|m0_1|u_logic|Cax2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rxzvx4 , soc_inst|m0_1|u_logic|Rxzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[3] , soc_inst|ram_1|saved_word_address[3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[3]~3 , soc_inst|ram_1|memory.raddr_a[3]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[21]~24 , soc_inst|ram_1|data_to_memory[21]~24, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[5]~23 , soc_inst|ram_1|data_to_memory[5]~23, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[21]~29 , soc_inst|interconnect_1|HRDATA[21]~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hphvx4~0 , soc_inst|m0_1|u_logic|Hphvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qlw2z4 , soc_inst|m0_1|u_logic|Qlw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~1 , soc_inst|m0_1|u_logic|Q6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~0 , soc_inst|m0_1|u_logic|Q6nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~2 , soc_inst|m0_1|u_logic|Q6nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~2 , soc_inst|m0_1|u_logic|U6wvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~5 , soc_inst|m0_1|u_logic|U6wvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~0 , soc_inst|m0_1|u_logic|U6wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~0 , soc_inst|m0_1|u_logic|Q3xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~1 , soc_inst|m0_1|u_logic|Q3xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~6 , soc_inst|m0_1|u_logic|U6wvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~7 , soc_inst|m0_1|u_logic|U6wvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wpkwx4~0 , soc_inst|m0_1|u_logic|Wpkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~1 , soc_inst|m0_1|u_logic|Hklwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5wvx4~0 , soc_inst|m0_1|u_logic|Z5wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~0 , soc_inst|m0_1|u_logic|I3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~1 , soc_inst|m0_1|u_logic|K8wvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~0 , soc_inst|m0_1|u_logic|K8wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~0 , soc_inst|m0_1|u_logic|Vhwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~1 , soc_inst|m0_1|u_logic|Vhwvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~2 , soc_inst|m0_1|u_logic|K8wvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndwvx4~0 , soc_inst|m0_1|u_logic|Ndwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~1 , soc_inst|m0_1|u_logic|I3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE , soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~0 , soc_inst|m0_1|u_logic|E4xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V8yvx4~0 , soc_inst|m0_1|u_logic|V8yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~0 , soc_inst|m0_1|u_logic|D6yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~1 , soc_inst|m0_1|u_logic|D6yvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~2 , soc_inst|m0_1|u_logic|D6yvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3d3z4 , soc_inst|m0_1|u_logic|H3d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sd1xx4~0 , soc_inst|m0_1|u_logic|Sd1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5r2z4 , soc_inst|m0_1|u_logic|U5r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bn53z4 , soc_inst|m0_1|u_logic|Bn53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twz2z4 , soc_inst|m0_1|u_logic|Twz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I7r2z4 , soc_inst|m0_1|u_logic|I7r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sd43z4 , soc_inst|m0_1|u_logic|Sd43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~3 , soc_inst|m0_1|u_logic|Am5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nt03z4 , soc_inst|m0_1|u_logic|Nt03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J433z4~DUPLICATE , soc_inst|m0_1|u_logic|J433z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av13z4 , soc_inst|m0_1|u_logic|Av13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~2 , soc_inst|m0_1|u_logic|Am5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~0 , soc_inst|m0_1|u_logic|Am5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~1 , soc_inst|m0_1|u_logic|Am5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[4] , soc_inst|m0_1|u_logic|hwdata_o[4], de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|data_to_memory[20]~16 , soc_inst|ram_1|data_to_memory[20]~16, de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|data_to_memory[4]~15 , soc_inst|ram_1|data_to_memory[4]~15, de1_soc_wrapper, 1
@@ -3369,277 +3418,595 @@ instance = comp, \soc_inst|m0_1|u_logic|Ckw2z4 , soc_inst|m0_1|u_logic|Ckw2z4, d
 instance = comp, \soc_inst|m0_1|u_logic|Pxrvx4~0 , soc_inst|m0_1|u_logic|Pxrvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|X6nvx4~0 , soc_inst|m0_1|u_logic|X6nvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|X6nvx4~1 , soc_inst|m0_1|u_logic|X6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ctrwx4~0 , soc_inst|m0_1|u_logic|Ctrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ctrwx4~1 , soc_inst|m0_1|u_logic|Ctrwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kghvx4~0 , soc_inst|m0_1|u_logic|Kghvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6z2z4 , soc_inst|m0_1|u_logic|I6z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~1 , soc_inst|m0_1|u_logic|Dghvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W7z2z4 , soc_inst|m0_1|u_logic|W7z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~0 , soc_inst|m0_1|u_logic|Uz9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~1 , soc_inst|m0_1|u_logic|Uz9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~37 , soc_inst|m0_1|u_logic|Add2~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~57 , soc_inst|m0_1|u_logic|Add2~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nbx2z4 , soc_inst|m0_1|u_logic|Nbx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~0 , soc_inst|m0_1|u_logic|Glhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~1 , soc_inst|m0_1|u_logic|Glhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~1 , soc_inst|m0_1|u_logic|Zkhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xly2z4 , soc_inst|m0_1|u_logic|Xly2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~0 , soc_inst|m0_1|u_logic|Rblwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~1 , soc_inst|m0_1|u_logic|Rblwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~2 , soc_inst|m0_1|u_logic|Rblwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fgm2z4 , soc_inst|m0_1|u_logic|Fgm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T583z4~DUPLICATE , soc_inst|m0_1|u_logic|T583z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~2 , soc_inst|m0_1|u_logic|Bdwwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~1 , soc_inst|m0_1|u_logic|Bdwwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~3 , soc_inst|m0_1|u_logic|Bdwwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~0 , soc_inst|m0_1|u_logic|Bdwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4 , soc_inst|m0_1|u_logic|Bdwwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE , soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~0 , soc_inst|m0_1|u_logic|C372z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J433z4 , soc_inst|m0_1|u_logic|J433z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~1 , soc_inst|m0_1|u_logic|C372z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z472z4~0 , soc_inst|m0_1|u_logic|Z472z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~2 , soc_inst|m0_1|u_logic|C372z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~3 , soc_inst|m0_1|u_logic|C372z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tpnvx4~0 , soc_inst|m0_1|u_logic|Tpnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yuovx4 , soc_inst|m0_1|u_logic|Yuovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[2] , soc_inst|ram_1|saved_word_address[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[2]~2 , soc_inst|ram_1|memory.raddr_a[2]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[7]~11 , soc_inst|interconnect_1|HRDATA[7]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~0 , soc_inst|m0_1|u_logic|Wywwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~1 , soc_inst|m0_1|u_logic|Wywwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~2 , soc_inst|m0_1|u_logic|Wywwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~3 , soc_inst|m0_1|u_logic|Wywwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G9lwx4~0 , soc_inst|m0_1|u_logic|G9lwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|W4zvx4~0 , soc_inst|m0_1|u_logic|W4zvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|W4zvx4~1 , soc_inst|m0_1|u_logic|W4zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~0 , soc_inst|m0_1|u_logic|Zkhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ycx2z4 , soc_inst|m0_1|u_logic|Ycx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z6ovx4 , soc_inst|m0_1|u_logic|Z6ovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~3 , soc_inst|m0_1|u_logic|Nlovx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~1 , soc_inst|m0_1|u_logic|Nlovx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~2 , soc_inst|m0_1|u_logic|Nlovx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~4 , soc_inst|m0_1|u_logic|Nlovx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~6 , soc_inst|m0_1|u_logic|Nlovx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~5 , soc_inst|m0_1|u_logic|Nlovx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~8 , soc_inst|m0_1|u_logic|Nlovx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~0 , soc_inst|m0_1|u_logic|Nlovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~7 , soc_inst|m0_1|u_logic|Nlovx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jknvx4~0 , soc_inst|m0_1|u_logic|Jknvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lz93z4 , soc_inst|m0_1|u_logic|Lz93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N1uvx4 , soc_inst|m0_1|u_logic|N1uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H8l2z4 , soc_inst|m0_1|u_logic|H8l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~1 , soc_inst|m0_1|u_logic|Zkhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~0 , soc_inst|m0_1|u_logic|Zkhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ycx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4qvx4 , soc_inst|m0_1|u_logic|S4qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Elnvx4~0 , soc_inst|m0_1|u_logic|Elnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J6i2z4 , soc_inst|m0_1|u_logic|J6i2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4~0 , soc_inst|m0_1|u_logic|Qfc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4 , soc_inst|m0_1|u_logic|Qfc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I90xx4~0 , soc_inst|m0_1|u_logic|I90xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~1 , soc_inst|m0_1|u_logic|Wvzwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~1 , soc_inst|m0_1|u_logic|G2zwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N4rvx4~0 , soc_inst|m0_1|u_logic|N4rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtp2z4 , soc_inst|m0_1|u_logic|Gtp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mbnvx4~0 , soc_inst|m0_1|u_logic|Mbnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gtp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8mvx4~0 , soc_inst|m0_1|u_logic|L8mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cam2z4 , soc_inst|m0_1|u_logic|Cam2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~0 , soc_inst|m0_1|u_logic|Mekvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~1 , soc_inst|m0_1|u_logic|Mekvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE , soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X6m2z4 , soc_inst|m0_1|u_logic|X6m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow13z4 , soc_inst|m0_1|u_logic|Ow13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X533z4~DUPLICATE , soc_inst|m0_1|u_logic|X533z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~1 , soc_inst|m0_1|u_logic|D7bwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyz2z4~feeder , soc_inst|m0_1|u_logic|Hyz2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bv03z4 , soc_inst|m0_1|u_logic|Bv03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~2 , soc_inst|m0_1|u_logic|D7bwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5m2z4~feeder , soc_inst|m0_1|u_logic|J5m2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5m2z4 , soc_inst|m0_1|u_logic|J5m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9bwx4~0 , soc_inst|m0_1|u_logic|A9bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf43z4 , soc_inst|m0_1|u_logic|Gf43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po53z4 , soc_inst|m0_1|u_logic|Po53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~0 , soc_inst|m0_1|u_logic|D7bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~3 , soc_inst|m0_1|u_logic|D7bwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aqnvx4~0 , soc_inst|m0_1|u_logic|Aqnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekovx4 , soc_inst|m0_1|u_logic|Ekovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[1] , soc_inst|ram_1|saved_word_address[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[1]~1 , soc_inst|ram_1|memory.raddr_a[1]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[17]~10 , soc_inst|ram_1|data_to_memory[17]~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jqhvx4~0 , soc_inst|m0_1|u_logic|Jqhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mfw2z4 , soc_inst|m0_1|u_logic|Mfw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pqrvx4~0 , soc_inst|m0_1|u_logic|Pqrvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rxl2z4 , soc_inst|m0_1|u_logic|Rxl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~0 , soc_inst|m0_1|u_logic|S7nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~1 , soc_inst|m0_1|u_logic|S7nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~1 , soc_inst|m0_1|u_logic|Irqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~1 , soc_inst|m0_1|u_logic|Fmqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpqvx4~0 , soc_inst|m0_1|u_logic|Zpqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~0 , soc_inst|m0_1|u_logic|Fmqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jvxvx4 , soc_inst|m0_1|u_logic|Jvxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vnqvx4~0 , soc_inst|m0_1|u_logic|Vnqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Onqvx4~0 , soc_inst|m0_1|u_logic|Onqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~2 , soc_inst|m0_1|u_logic|Fmqvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~3 , soc_inst|m0_1|u_logic|Fmqvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4bwx4~0 , soc_inst|m0_1|u_logic|S4bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q3bwx4~0 , soc_inst|m0_1|u_logic|Q3bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I30wx4~1 , soc_inst|m0_1|u_logic|I30wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I30wx4~2 , soc_inst|m0_1|u_logic|I30wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE , soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE , soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE , soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~0 , soc_inst|m0_1|u_logic|Fzxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V3m2z4 , soc_inst|m0_1|u_logic|V3m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~1 , soc_inst|m0_1|u_logic|Fzxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4 , soc_inst|m0_1|u_logic|Fzxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X533z4 , soc_inst|m0_1|u_logic|X533z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4~2 , soc_inst|m0_1|u_logic|R40wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyz2z4 , soc_inst|m0_1|u_logic|Hyz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4~1 , soc_inst|m0_1|u_logic|R40wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4~0 , soc_inst|m0_1|u_logic|R40wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4 , soc_inst|m0_1|u_logic|R40wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~20 , soc_inst|m0_1|u_logic|hwdata_o~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[3]~20 , soc_inst|ram_1|data_to_memory[3]~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[3]~26 , soc_inst|interconnect_1|HRDATA[3]~26, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jky2z4 , soc_inst|m0_1|u_logic|Jky2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~0 , soc_inst|m0_1|u_logic|E7nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vphvx4~0 , soc_inst|m0_1|u_logic|Vphvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oiw2z4 , soc_inst|m0_1|u_logic|Oiw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~1 , soc_inst|m0_1|u_logic|E7nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~2 , soc_inst|m0_1|u_logic|E7nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~0 , soc_inst|m0_1|u_logic|Fjswx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Emewx4~0 , soc_inst|m0_1|u_logic|Emewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvswx4~0 , soc_inst|m0_1|u_logic|Wvswx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~1 , soc_inst|m0_1|u_logic|Fjswx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE , soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|To33z4 , soc_inst|m0_1|u_logic|To33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~3 , soc_inst|m0_1|u_logic|Vf5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE , soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~2 , soc_inst|m0_1|u_logic|Vf5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~4 , soc_inst|m0_1|u_logic|Vf5wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf23z4 , soc_inst|m0_1|u_logic|Kf23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~0 , soc_inst|m0_1|u_logic|Vf5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~1 , soc_inst|m0_1|u_logic|Vf5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~5 , soc_inst|m0_1|u_logic|Vf5wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tse3z4 , soc_inst|m0_1|u_logic|Tse3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~6 , soc_inst|m0_1|u_logic|Vf5wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq83z4 , soc_inst|m0_1|u_logic|Dq83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~7 , soc_inst|m0_1|u_logic|Vf5wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~8 , soc_inst|m0_1|u_logic|Vf5wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[9]~6 , soc_inst|m0_1|u_logic|hwdata_o[9]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[9]~9 , soc_inst|ram_1|data_to_memory[9]~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][9] , soc_inst|switches_1|switch_store[0][9], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[9]~16 , soc_inst|interconnect_1|HRDATA[9]~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~0 , soc_inst|m0_1|u_logic|O5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~21 , soc_inst|m0_1|u_logic|Add1~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~25 , soc_inst|m0_1|u_logic|Add1~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~4 , soc_inst|m0_1|u_logic|C9rvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~3 , soc_inst|m0_1|u_logic|C9rvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~1 , soc_inst|m0_1|u_logic|C9rvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~2 , soc_inst|m0_1|u_logic|C9rvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W9nvx4~0 , soc_inst|m0_1|u_logic|W9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7y2z4 , soc_inst|m0_1|u_logic|Y7y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fohvx4~0 , soc_inst|m0_1|u_logic|Fohvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Urw2z4 , soc_inst|m0_1|u_logic|Urw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~1 , soc_inst|m0_1|u_logic|O5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~2 , soc_inst|m0_1|u_logic|O5nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pty2z4 , soc_inst|m0_1|u_logic|Pty2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9wvx4~0 , soc_inst|m0_1|u_logic|F9wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~0 , soc_inst|m0_1|u_logic|P3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~1 , soc_inst|m0_1|u_logic|P3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Auk2z4 , soc_inst|m0_1|u_logic|Auk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~1 , soc_inst|m0_1|u_logic|E4xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~0 , soc_inst|m0_1|u_logic|B3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oowvx4~0 , soc_inst|m0_1|u_logic|Oowvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejwvx4~0 , soc_inst|m0_1|u_logic|Ejwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~0 , soc_inst|m0_1|u_logic|Wlwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~1 , soc_inst|m0_1|u_logic|Wlwvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3z2z4 , soc_inst|m0_1|u_logic|C3z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~1 , soc_inst|m0_1|u_logic|B3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE , soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ijcwx4~0 , soc_inst|m0_1|u_logic|Ijcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3awx4~0 , soc_inst|m0_1|u_logic|O3awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnawx4~0 , soc_inst|m0_1|u_logic|Mnawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~0 , soc_inst|m0_1|u_logic|C3qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~0 , soc_inst|m0_1|u_logic|Wzpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~1 , soc_inst|m0_1|u_logic|Wzpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~1 , soc_inst|m0_1|u_logic|C3qvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu33z4~feeder , soc_inst|m0_1|u_logic|Zu33z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu33z4 , soc_inst|m0_1|u_logic|Zu33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~2 , soc_inst|m0_1|u_logic|Izpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I453z4~DUPLICATE , soc_inst|m0_1|u_logic|I453z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql23z4~feeder , soc_inst|m0_1|u_logic|Ql23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql23z4 , soc_inst|m0_1|u_logic|Ql23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~3 , soc_inst|m0_1|u_logic|Izpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggk2z4 , soc_inst|m0_1|u_logic|Ggk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~1 , soc_inst|m0_1|u_logic|Izpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc13z4~feeder , soc_inst|m0_1|u_logic|Hc13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc13z4 , soc_inst|m0_1|u_logic|Hc13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~0 , soc_inst|m0_1|u_logic|Izpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An73z4 , soc_inst|m0_1|u_logic|An73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rek2z4 , soc_inst|m0_1|u_logic|Rek2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~6 , soc_inst|m0_1|u_logic|Izpvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~5 , soc_inst|m0_1|u_logic|Izpvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~7 , soc_inst|m0_1|u_logic|Izpvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nf03z4 , soc_inst|m0_1|u_logic|Nf03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~4 , soc_inst|m0_1|u_logic|Izpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4 , soc_inst|m0_1|u_logic|Izpvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D47wx4~0 , soc_inst|m0_1|u_logic|D47wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxpvx4~0 , soc_inst|m0_1|u_logic|Zxpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Idk2z4 , soc_inst|m0_1|u_logic|Idk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S17wx4~0 , soc_inst|m0_1|u_logic|S17wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~0 , soc_inst|m0_1|u_logic|Rhnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~1 , soc_inst|m0_1|u_logic|Rhnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~0 , soc_inst|m0_1|u_logic|Khnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~1 , soc_inst|m0_1|u_logic|Khnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohh3z4 , soc_inst|m0_1|u_logic|Ohh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qh72z4~0 , soc_inst|m0_1|u_logic|Qh72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4 , soc_inst|m0_1|u_logic|Tiz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~2 , soc_inst|m0_1|u_logic|Tf72z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I453z4 , soc_inst|m0_1|u_logic|I453z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~0 , soc_inst|m0_1|u_logic|Tf72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aez2z4 , soc_inst|m0_1|u_logic|Aez2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE , soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~1 , soc_inst|m0_1|u_logic|Tf72z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~3 , soc_inst|m0_1|u_logic|Tf72z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Esnvx4~0 , soc_inst|m0_1|u_logic|Esnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V2qvx4 , soc_inst|m0_1|u_logic|V2qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~2 , soc_inst|m0_1|u_logic|S6ovx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~3 , soc_inst|m0_1|u_logic|S6ovx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~1 , soc_inst|m0_1|u_logic|F4nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K3l2z4 , soc_inst|m0_1|u_logic|K3l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ux4wx4~0 , soc_inst|m0_1|u_logic|Ux4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjd3z4 , soc_inst|m0_1|u_logic|Bjd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P2a3z4 , soc_inst|m0_1|u_logic|P2a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cps2z4 , soc_inst|m0_1|u_logic|Cps2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~0 , soc_inst|m0_1|u_logic|S9ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Azs2z4 , soc_inst|m0_1|u_logic|Azs2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~1 , soc_inst|m0_1|u_logic|S9ywx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~2 , soc_inst|m0_1|u_logic|S9ywx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Otxwx4~0 , soc_inst|m0_1|u_logic|Otxwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Palwx4~0 , soc_inst|m0_1|u_logic|Palwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kswwx4~0 , soc_inst|m0_1|u_logic|Kswwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ttwwx4~0 , soc_inst|m0_1|u_logic|Ttwwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|B8nwx4~0 , soc_inst|m0_1|u_logic|B8nwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|B8nwx4~1 , soc_inst|m0_1|u_logic|B8nwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~2 , soc_inst|m0_1|u_logic|Aihvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~1 , soc_inst|m0_1|u_logic|Aihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~0 , soc_inst|m0_1|u_logic|Aihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xsx2z4 , soc_inst|m0_1|u_logic|Xsx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~13 , soc_inst|m0_1|u_logic|Add3~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V2qvx4 , soc_inst|m0_1|u_logic|V2qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~0 , soc_inst|m0_1|u_logic|Khnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~1 , soc_inst|m0_1|u_logic|Khnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohh3z4 , soc_inst|m0_1|u_logic|Ohh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~2 , soc_inst|m0_1|u_logic|N662z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk13z4 , soc_inst|m0_1|u_logic|Bk13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~1 , soc_inst|m0_1|u_logic|N662z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K862z4~0 , soc_inst|m0_1|u_logic|K862z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc53z4 , soc_inst|m0_1|u_logic|Cc53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~0 , soc_inst|m0_1|u_logic|N662z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~3 , soc_inst|m0_1|u_logic|N662z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrnvx4~0 , soc_inst|m0_1|u_logic|Xrnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~9 , soc_inst|m0_1|u_logic|Add3~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29] , soc_inst|m0_1|u_logic|haddr_o[29], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~2 , soc_inst|m0_1|u_logic|S6ovx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~3 , soc_inst|m0_1|u_logic|S6ovx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nmnvx4~0 , soc_inst|m0_1|u_logic|Nmnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mjl2z4 , soc_inst|m0_1|u_logic|Mjl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B7owx4 , soc_inst|m0_1|u_logic|B7owx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~1 , soc_inst|m0_1|u_logic|Pjyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~2 , soc_inst|m0_1|u_logic|Pjyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~0 , soc_inst|m0_1|u_logic|F9pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~1 , soc_inst|m0_1|u_logic|F9pvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~1 , soc_inst|m0_1|u_logic|Kkyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ocnvx4~0 , soc_inst|m0_1|u_logic|Ocnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE , soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~0 , soc_inst|m0_1|u_logic|X7mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~1 , soc_inst|m0_1|u_logic|X7mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6w2z4 , soc_inst|m0_1|u_logic|I6w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~1 , soc_inst|m0_1|u_logic|F5mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~2 , soc_inst|m0_1|u_logic|F5mvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5x2z4 , soc_inst|m0_1|u_logic|U5x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lefwx4~0 , soc_inst|m0_1|u_logic|Lefwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~0 , soc_inst|m0_1|u_logic|Nlhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~1 , soc_inst|m0_1|u_logic|Nlhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cax2z4 , soc_inst|m0_1|u_logic|Cax2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rxzvx4 , soc_inst|m0_1|u_logic|Rxzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[3] , soc_inst|ram_1|saved_word_address[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[3]~3 , soc_inst|ram_1|memory.raddr_a[3]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~2 , soc_inst|m0_1|u_logic|G5qvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~1 , soc_inst|m0_1|u_logic|G5qvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ek03z4 , soc_inst|m0_1|u_logic|Ek03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Knz2z4 , soc_inst|m0_1|u_logic|Knz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~2 , soc_inst|m0_1|u_logic|Oxnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg13z4 , soc_inst|m0_1|u_logic|Yg13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~1 , soc_inst|m0_1|u_logic|Oxnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z853z4 , soc_inst|m0_1|u_logic|Z853z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~0 , soc_inst|m0_1|u_logic|Oxnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~3 , soc_inst|m0_1|u_logic|Oxnvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N5qvx4~0 , soc_inst|m0_1|u_logic|N5qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte1~0 , soc_inst|ram_1|byte1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[1] , soc_inst|ram_1|byte_select[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[14]~30 , soc_inst|ram_1|data_to_memory[14]~30, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[30]~34 , soc_inst|interconnect_1|HRDATA[30]~34, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wmhvx4~0 , soc_inst|m0_1|u_logic|Wmhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzw2z4 , soc_inst|m0_1|u_logic|Qzw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~0 , soc_inst|m0_1|u_logic|M4nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8nvx4~0 , soc_inst|m0_1|u_logic|N8nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fey2z4 , soc_inst|m0_1|u_logic|Fey2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~1 , soc_inst|m0_1|u_logic|M4nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~2 , soc_inst|m0_1|u_logic|M4nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE , soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md6wx4~0 , soc_inst|m0_1|u_logic|Md6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~0 , soc_inst|m0_1|u_logic|Dc6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ae6wx4~0 , soc_inst|m0_1|u_logic|Ae6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~1 , soc_inst|m0_1|u_logic|Dc6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~0 , soc_inst|m0_1|u_logic|Mhgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iikwx4~0 , soc_inst|m0_1|u_logic|Iikwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gpjwx4~0 , soc_inst|m0_1|u_logic|Gpjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ua6wx4~0 , soc_inst|m0_1|u_logic|Ua6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~0 , soc_inst|m0_1|u_logic|Q86wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~1 , soc_inst|m0_1|u_logic|Q86wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~0 , soc_inst|m0_1|u_logic|Bkxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xf6wx4~0 , soc_inst|m0_1|u_logic|Xf6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uv6wx4 , soc_inst|m0_1|u_logic|Uv6wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dj6wx4~0 , soc_inst|m0_1|u_logic|Dj6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qf6wx4~0 , soc_inst|m0_1|u_logic|Qf6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uijwx4~0 , soc_inst|m0_1|u_logic|Uijwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~2 , soc_inst|m0_1|u_logic|Q86wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~3 , soc_inst|m0_1|u_logic|Q86wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~4 , soc_inst|m0_1|u_logic|Q86wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~5 , soc_inst|m0_1|u_logic|Q86wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~6 , soc_inst|m0_1|u_logic|Q86wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~2 , soc_inst|m0_1|u_logic|Jm6wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G27wx4~2 , soc_inst|m0_1|u_logic|G27wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~1 , soc_inst|m0_1|u_logic|Jm6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~3 , soc_inst|m0_1|u_logic|Jm6wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ad7wx4~0 , soc_inst|m0_1|u_logic|Ad7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~4 , soc_inst|m0_1|u_logic|Jm6wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyewx4 , soc_inst|m0_1|u_logic|Hyewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~0 , soc_inst|m0_1|u_logic|Jm6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~5 , soc_inst|m0_1|u_logic|Jm6wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P28wx4 , soc_inst|m0_1|u_logic|P28wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Blwvx4~0 , soc_inst|m0_1|u_logic|Blwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~6 , soc_inst|m0_1|u_logic|Jm6wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~1 , soc_inst|m0_1|u_logic|Q07wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~0 , soc_inst|m0_1|u_logic|Xt6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~0 , soc_inst|m0_1|u_logic|Q07wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X07wx4~0 , soc_inst|m0_1|u_logic|X07wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~1 , soc_inst|m0_1|u_logic|Xt6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~7 , soc_inst|m0_1|u_logic|Jm6wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~1 , soc_inst|m0_1|u_logic|Eyhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Donvx4~0 , soc_inst|m0_1|u_logic|Donvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G97wx4~2 , soc_inst|m0_1|u_logic|G97wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Donvx4~1 , soc_inst|m0_1|u_logic|Donvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G97wx4~1 , soc_inst|m0_1|u_logic|G97wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Donvx4~2 , soc_inst|m0_1|u_logic|Donvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~0 , soc_inst|m0_1|u_logic|Ojnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~1 , soc_inst|m0_1|u_logic|Ojnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~2 , soc_inst|m0_1|u_logic|Ojnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z7i2z4 , soc_inst|m0_1|u_logic|Z7i2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~0 , soc_inst|m0_1|u_logic|Rbi3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H362z4~0 , soc_inst|m0_1|u_logic|H362z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29]~2 , soc_inst|m0_1|u_logic|haddr_o[29]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~1 , soc_inst|m0_1|u_logic|Rbi3z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4 , soc_inst|m0_1|u_logic|Rbi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ueovx4~0 , soc_inst|m0_1|u_logic|Ueovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vapvx4 , soc_inst|m0_1|u_logic|Vapvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dvy2z4 , soc_inst|m0_1|u_logic|Dvy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcsvx4~0 , soc_inst|m0_1|u_logic|Dcsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~0 , soc_inst|m0_1|u_logic|H5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ynhvx4~0 , soc_inst|m0_1|u_logic|Ynhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Itw2z4 , soc_inst|m0_1|u_logic|Itw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~1 , soc_inst|m0_1|u_logic|H5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~2 , soc_inst|m0_1|u_logic|Rfpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~3 , soc_inst|m0_1|u_logic|Rfpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~4 , soc_inst|m0_1|u_logic|Rfpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~0 , soc_inst|m0_1|u_logic|Rfpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9swx4~0 , soc_inst|m0_1|u_logic|U9swx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S8swx4~0 , soc_inst|m0_1|u_logic|S8swx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G27wx4~1 , soc_inst|m0_1|u_logic|G27wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~1 , soc_inst|m0_1|u_logic|Bkxvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~2 , soc_inst|m0_1|u_logic|Bkxvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4 , soc_inst|m0_1|u_logic|Bkxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~5 , soc_inst|m0_1|u_logic|Rfpvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4 , soc_inst|m0_1|u_logic|Zcn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tzxwx4~0 , soc_inst|m0_1|u_logic|Tzxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pkwwx4~0 , soc_inst|m0_1|u_logic|Pkwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S1ewx4~0 , soc_inst|m0_1|u_logic|S1ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W6iwx4 , soc_inst|m0_1|u_logic|W6iwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~0 , soc_inst|m0_1|u_logic|Bspvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~1 , soc_inst|m0_1|u_logic|Bspvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~0 , soc_inst|m0_1|u_logic|Mhhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~1 , soc_inst|m0_1|u_logic|Mhhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~2 , soc_inst|m0_1|u_logic|Mhhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vvx2z4 , soc_inst|m0_1|u_logic|Vvx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Va62z4 , soc_inst|m0_1|u_logic|Va62z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|htrans_o[1]~0 , soc_inst|m0_1|u_logic|htrans_o[1]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~1 , soc_inst|switches_1|half_word_address~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~3 , soc_inst|switches_1|half_word_address~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address[0]~DUPLICATE , soc_inst|switches_1|half_word_address[0]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[7]~9 , soc_inst|interconnect_1|HRDATA[7]~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[7]~10 , soc_inst|interconnect_1|HRDATA[7]~10, de1_soc_wrapper, 1
+instance = comp, \SW[6]~input , SW[6]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][6] , soc_inst|switches_1|switch_store[0][6], de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|data_to_memory[22]~31 , soc_inst|ram_1|data_to_memory[22]~31, de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[6]~32 , soc_inst|ram_1|data_to_memory[6]~32, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][6] , soc_inst|switches_1|switch_store[1][6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[22]~35 , soc_inst|interconnect_1|HRDATA[22]~35, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~0 , soc_inst|m0_1|u_logic|J6nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aphvx4~0 , soc_inst|m0_1|u_logic|Aphvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Enw2z4 , soc_inst|m0_1|u_logic|Enw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~3 , soc_inst|m0_1|u_logic|C9rvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~4 , soc_inst|m0_1|u_logic|C9rvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~1 , soc_inst|m0_1|u_logic|C9rvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~2 , soc_inst|m0_1|u_logic|C9rvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[6]~36 , soc_inst|interconnect_1|HRDATA[6]~36, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~34 , soc_inst|m0_1|u_logic|Add1~34, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add1~5 , soc_inst|m0_1|u_logic|Add1~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ranvx4~0 , soc_inst|m0_1|u_logic|Ranvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3y2z4 , soc_inst|m0_1|u_logic|I3y2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add1~9 , soc_inst|m0_1|u_logic|Add1~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4y2z4 , soc_inst|m0_1|u_logic|W4y2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kanvx4~0 , soc_inst|m0_1|u_logic|Kanvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE , soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~21 , soc_inst|m0_1|u_logic|Add1~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4y2z4 , soc_inst|m0_1|u_logic|W4y2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Danvx4~0 , soc_inst|m0_1|u_logic|Danvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|K6y2z4 , soc_inst|m0_1|u_logic|K6y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~1 , soc_inst|m0_1|u_logic|Add1~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~17 , soc_inst|m0_1|u_logic|Add1~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U8nvx4~0 , soc_inst|m0_1|u_logic|U8nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdm2z4 , soc_inst|m0_1|u_logic|Bdm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oylwx4~0 , soc_inst|m0_1|u_logic|Oylwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~25 , soc_inst|m0_1|u_logic|Add1~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W9nvx4~0 , soc_inst|m0_1|u_logic|W9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7y2z4 , soc_inst|m0_1|u_logic|Y7y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~29 , soc_inst|m0_1|u_logic|Add1~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P9nvx4~0 , soc_inst|m0_1|u_logic|P9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9y2z4 , soc_inst|m0_1|u_logic|M9y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oylwx4~1 , soc_inst|m0_1|u_logic|Oylwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~34 , soc_inst|m0_1|u_logic|Add1~34, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ranvx4~0 , soc_inst|m0_1|u_logic|Ranvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3y2z4 , soc_inst|m0_1|u_logic|I3y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~1 , soc_inst|m0_1|u_logic|J6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~2 , soc_inst|m0_1|u_logic|J6nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zoy2z4 , soc_inst|m0_1|u_logic|Zoy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ho3wx4~0 , soc_inst|m0_1|u_logic|Ho3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~1 , soc_inst|m0_1|u_logic|Df3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~0 , soc_inst|m0_1|u_logic|Df3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~2 , soc_inst|m0_1|u_logic|Df3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wpkwx4~0 , soc_inst|m0_1|u_logic|Wpkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~6 , soc_inst|m0_1|u_logic|Df3wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~7 , soc_inst|m0_1|u_logic|Df3wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~5 , soc_inst|m0_1|u_logic|Df3wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~8 , soc_inst|m0_1|u_logic|Df3wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~9 , soc_inst|m0_1|u_logic|Df3wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1pvx4~0 , soc_inst|m0_1|u_logic|R1pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~0 , soc_inst|m0_1|u_logic|Mekvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~1 , soc_inst|m0_1|u_logic|Mekvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xx93z4 , soc_inst|m0_1|u_logic|Xx93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~0 , soc_inst|m0_1|u_logic|C372z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~1 , soc_inst|m0_1|u_logic|C372z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~2 , soc_inst|m0_1|u_logic|C372z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z472z4~0 , soc_inst|m0_1|u_logic|Z472z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~3 , soc_inst|m0_1|u_logic|C372z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tpnvx4~0 , soc_inst|m0_1|u_logic|Tpnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yuovx4 , soc_inst|m0_1|u_logic|Yuovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[2] , soc_inst|ram_1|saved_word_address[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[2]~2 , soc_inst|ram_1|memory.raddr_a[2]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[21]~24 , soc_inst|ram_1|data_to_memory[21]~24, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[21]~29 , soc_inst|interconnect_1|HRDATA[21]~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hphvx4~0 , soc_inst|m0_1|u_logic|Hphvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qlw2z4 , soc_inst|m0_1|u_logic|Qlw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~1 , soc_inst|m0_1|u_logic|Q6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~0 , soc_inst|m0_1|u_logic|Q6nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~2 , soc_inst|m0_1|u_logic|Q6nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jvxvx4 , soc_inst|m0_1|u_logic|Jvxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vnqvx4~0 , soc_inst|m0_1|u_logic|Vnqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mohvx4~0 , soc_inst|m0_1|u_logic|Mohvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gqw2z4 , soc_inst|m0_1|u_logic|Gqw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~1 , soc_inst|m0_1|u_logic|V5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~0 , soc_inst|m0_1|u_logic|V5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~2 , soc_inst|m0_1|u_logic|V5nvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bsy2z4 , soc_inst|m0_1|u_logic|Bsy2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y7xvx4 , soc_inst|m0_1|u_logic|Y7xvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gqxvx4 , soc_inst|m0_1|u_logic|Gqxvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Irxvx4~0 , soc_inst|m0_1|u_logic|Irxvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zpxvx4~0 , soc_inst|m0_1|u_logic|Zpxvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hnxvx4~0 , soc_inst|m0_1|u_logic|Hnxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4 , soc_inst|m0_1|u_logic|Zcn2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mmxvx4~0 , soc_inst|m0_1|u_logic|Mmxvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~1 , soc_inst|m0_1|u_logic|Sbxvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~2 , soc_inst|m0_1|u_logic|Sbxvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gokwx4~0 , soc_inst|m0_1|u_logic|Gokwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~0 , soc_inst|m0_1|u_logic|Sbxvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~3 , soc_inst|m0_1|u_logic|Sbxvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uup2z4 , soc_inst|m0_1|u_logic|Uup2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2m2z4 , soc_inst|m0_1|u_logic|H2m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~0 , soc_inst|m0_1|u_logic|Fzxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H783z4~DUPLICATE , soc_inst|m0_1|u_logic|H783z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE , soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE , soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~1 , soc_inst|m0_1|u_logic|Fzxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4 , soc_inst|m0_1|u_logic|Fzxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wxxwx4~0 , soc_inst|m0_1|u_logic|Wxxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9nwx4~0 , soc_inst|m0_1|u_logic|Y9nwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~0 , soc_inst|m0_1|u_logic|Kkyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~1 , soc_inst|m0_1|u_logic|Zluvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~0 , soc_inst|m0_1|u_logic|Zluvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~2 , soc_inst|m0_1|u_logic|Zluvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9mvx4~0 , soc_inst|m0_1|u_logic|U9mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4 , soc_inst|m0_1|u_logic|Uaj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rryvx4~0 , soc_inst|m0_1|u_logic|Rryvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Upyvx4~0 , soc_inst|m0_1|u_logic|Upyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R3mwx4~0 , soc_inst|m0_1|u_logic|R3mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pet2z4 , soc_inst|m0_1|u_logic|Pet2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~0 , soc_inst|m0_1|u_logic|Nen2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~1 , soc_inst|m0_1|u_logic|Nen2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nen2z4 , soc_inst|m0_1|u_logic|Nen2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~1 , soc_inst|m0_1|u_logic|Cr1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Okn2z4 , soc_inst|m0_1|u_logic|Okn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X563z4 , soc_inst|m0_1|u_logic|X563z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE , soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yfn2z4 , soc_inst|m0_1|u_logic|Yfn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~0 , soc_inst|m0_1|u_logic|Q1ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf73z4 , soc_inst|m0_1|u_logic|Gf73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po83z4 , soc_inst|m0_1|u_logic|Po83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gju2z4 , soc_inst|m0_1|u_logic|Gju2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajn2z4 , soc_inst|m0_1|u_logic|Ajn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~1 , soc_inst|m0_1|u_logic|Q1ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4 , soc_inst|m0_1|u_logic|Q1ywx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa03z4 , soc_inst|m0_1|u_logic|Wa03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn33z4 , soc_inst|m0_1|u_logic|Fn33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q713z4 , soc_inst|m0_1|u_logic|Q713z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wd23z4 , soc_inst|m0_1|u_logic|Wd23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~2 , soc_inst|m0_1|u_logic|Sh5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~1 , soc_inst|m0_1|u_logic|Sh5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~3 , soc_inst|m0_1|u_logic|Sh5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~0 , soc_inst|m0_1|u_logic|Sh5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[2] , soc_inst|m0_1|u_logic|hwdata_o[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[2]~7 , soc_inst|ram_1|data_to_memory[2]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[2]~14 , soc_inst|interconnect_1|HRDATA[2]~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vy7wx4~0 , soc_inst|m0_1|u_logic|Vy7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr7wx4~0 , soc_inst|m0_1|u_logic|Vr7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~0 , soc_inst|m0_1|u_logic|R7iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~1 , soc_inst|m0_1|u_logic|R7iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~0 , soc_inst|m0_1|u_logic|Thhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~1 , soc_inst|m0_1|u_logic|Thhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~2 , soc_inst|m0_1|u_logic|Thhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Msyvx4 , soc_inst|m0_1|u_logic|Msyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~2 , soc_inst|m0_1|u_logic|Jyb2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Una2z4~0 , soc_inst|m0_1|u_logic|Una2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~0 , soc_inst|m0_1|u_logic|Ppsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~1 , soc_inst|m0_1|u_logic|Ppsvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~0 , soc_inst|m0_1|u_logic|Amjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mn3wx4~0 , soc_inst|m0_1|u_logic|Mn3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~0 , soc_inst|m0_1|u_logic|C5c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~1 , soc_inst|m0_1|u_logic|C5c2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z6c2z4~0 , soc_inst|m0_1|u_logic|Z6c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~2 , soc_inst|m0_1|u_logic|C5c2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~2 , soc_inst|m0_1|u_logic|Ppsvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~0 , soc_inst|m0_1|u_logic|Scpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8b2z4 , soc_inst|m0_1|u_logic|N8b2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G8n2z4 , soc_inst|m0_1|u_logic|G8n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~4 , soc_inst|m0_1|u_logic|Luywx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kss2z4 , soc_inst|m0_1|u_logic|Kss2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~3 , soc_inst|m0_1|u_logic|Luywx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Axm2z4 , soc_inst|m0_1|u_logic|Axm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~0 , soc_inst|m0_1|u_logic|Luywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~2 , soc_inst|m0_1|u_logic|Luywx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1a3z4 , soc_inst|m0_1|u_logic|B1a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~5 , soc_inst|m0_1|u_logic|Luywx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~1 , soc_inst|m0_1|u_logic|Luywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~6 , soc_inst|m0_1|u_logic|Luywx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zad3z4 , soc_inst|m0_1|u_logic|Zad3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~3 , soc_inst|m0_1|u_logic|Vsywx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~1 , soc_inst|m0_1|u_logic|Vsywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Usl2z4 , soc_inst|m0_1|u_logic|Usl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7d3z4 , soc_inst|m0_1|u_logic|T7d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~5 , soc_inst|m0_1|u_logic|Vsywx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~4 , soc_inst|m0_1|u_logic|Vsywx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~0 , soc_inst|m0_1|u_logic|Vsywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmb3z4 , soc_inst|m0_1|u_logic|Bmb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~2 , soc_inst|m0_1|u_logic|Vsywx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~6 , soc_inst|m0_1|u_logic|Vsywx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~0 , soc_inst|m0_1|u_logic|Ypa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xtywx4~0 , soc_inst|m0_1|u_logic|Xtywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~1 , soc_inst|m0_1|u_logic|Ypa2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~0 , soc_inst|m0_1|u_logic|Z5pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It52z4~2 , soc_inst|m0_1|u_logic|It52z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte0~0 , soc_inst|ram_1|byte0~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[0] , soc_inst|ram_1|byte_select[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[6]~32 , soc_inst|ram_1|data_to_memory[6]~32, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][6] , soc_inst|switches_1|switch_store[1][6], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[22]~35 , soc_inst|interconnect_1|HRDATA[22]~35, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aphvx4~0 , soc_inst|m0_1|u_logic|Aphvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Enw2z4 , soc_inst|m0_1|u_logic|Enw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~1 , soc_inst|m0_1|u_logic|J6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~0 , soc_inst|m0_1|u_logic|J6nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~2 , soc_inst|m0_1|u_logic|J6nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4fwx4~0 , soc_inst|m0_1|u_logic|M4fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vskwx4~0 , soc_inst|m0_1|u_logic|Vskwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H06wx4~0 , soc_inst|m0_1|u_logic|H06wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V76wx4~0 , soc_inst|m0_1|u_logic|V76wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V76wx4~1 , soc_inst|m0_1|u_logic|V76wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D56wx4~0 , soc_inst|m0_1|u_logic|D56wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mz5wx4~0 , soc_inst|m0_1|u_logic|Mz5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~1 , soc_inst|m0_1|u_logic|P0hwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Px5wx4 , soc_inst|m0_1|u_logic|Px5wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uw5wx4~0 , soc_inst|m0_1|u_logic|Uw5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~0 , soc_inst|m0_1|u_logic|Xu5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~1 , soc_inst|m0_1|u_logic|Xu5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~2 , soc_inst|m0_1|u_logic|Xu5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~3 , soc_inst|m0_1|u_logic|Xu5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4 , soc_inst|m0_1|u_logic|Xu5wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wai2z4 , soc_inst|m0_1|u_logic|Wai2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djywx4~0 , soc_inst|m0_1|u_logic|Djywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lstwx4~0 , soc_inst|m0_1|u_logic|Lstwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B7owx4 , soc_inst|m0_1|u_logic|B7owx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~1 , soc_inst|m0_1|u_logic|Pjyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~2 , soc_inst|m0_1|u_logic|Pjyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~0 , soc_inst|m0_1|u_logic|F9pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~1 , soc_inst|m0_1|u_logic|F9pvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~1 , soc_inst|m0_1|u_logic|Kkyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ocnvx4~0 , soc_inst|m0_1|u_logic|Ocnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1w2z4 , soc_inst|m0_1|u_logic|R1w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~1 , soc_inst|m0_1|u_logic|F5mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~2 , soc_inst|m0_1|u_logic|F5mvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5x2z4 , soc_inst|m0_1|u_logic|U5x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~0 , soc_inst|m0_1|u_logic|X7mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~1 , soc_inst|m0_1|u_logic|X7mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6w2z4 , soc_inst|m0_1|u_logic|I6w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lefwx4~0 , soc_inst|m0_1|u_logic|Lefwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxhvx4~0 , soc_inst|m0_1|u_logic|Cxhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxhvx4~1 , soc_inst|m0_1|u_logic|Cxhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fcj2z4 , soc_inst|m0_1|u_logic|Fcj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipsvx4~0 , soc_inst|m0_1|u_logic|Ipsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It52z4~0 , soc_inst|m0_1|u_logic|It52z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It52z4~1 , soc_inst|m0_1|u_logic|It52z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7mwx4 , soc_inst|m0_1|u_logic|E7mwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vaw2z4 , soc_inst|m0_1|u_logic|Vaw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bpsvx4~0 , soc_inst|m0_1|u_logic|Bpsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~1 , soc_inst|m0_1|u_logic|Scpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~2 , soc_inst|m0_1|u_logic|Scpvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~0 , soc_inst|m0_1|u_logic|L7nvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cqhvx4~0 , soc_inst|m0_1|u_logic|Cqhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ahw2z4 , soc_inst|m0_1|u_logic|Ahw2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~1 , soc_inst|m0_1|u_logic|L7nvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~2 , soc_inst|m0_1|u_logic|L7nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L4bwx4~0 , soc_inst|m0_1|u_logic|L4bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4bwx4~0 , soc_inst|m0_1|u_logic|S4bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q3bwx4~0 , soc_inst|m0_1|u_logic|Q3bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~0 , soc_inst|m0_1|u_logic|Bmhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~1 , soc_inst|m0_1|u_logic|Bmhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G7x2z4 , soc_inst|m0_1|u_logic|G7x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekovx4 , soc_inst|m0_1|u_logic|Ekovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[1]~feeder , soc_inst|ram_1|saved_word_address[1]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[1] , soc_inst|ram_1|saved_word_address[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[1]~1 , soc_inst|ram_1|memory.raddr_a[1]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[17]~10 , soc_inst|ram_1|data_to_memory[17]~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[9]~9 , soc_inst|ram_1|data_to_memory[9]~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jqhvx4~0 , soc_inst|m0_1|u_logic|Jqhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mfw2z4 , soc_inst|m0_1|u_logic|Mfw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pqrvx4~0 , soc_inst|m0_1|u_logic|Pqrvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~0 , soc_inst|m0_1|u_logic|S7nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~1 , soc_inst|m0_1|u_logic|S7nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rxl2z4 , soc_inst|m0_1|u_logic|Rxl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~0 , soc_inst|m0_1|u_logic|Rblwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~1 , soc_inst|m0_1|u_logic|Rblwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~2 , soc_inst|m0_1|u_logic|Rblwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fgm2z4 , soc_inst|m0_1|u_logic|Fgm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE , soc_inst|m0_1|u_logic|Po83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~1 , soc_inst|m0_1|u_logic|Ylbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psv2z4 , soc_inst|m0_1|u_logic|Psv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vu93z4 , soc_inst|m0_1|u_logic|Vu93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4 , soc_inst|m0_1|u_logic|Mhn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~0 , soc_inst|m0_1|u_logic|Ylbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4 , soc_inst|m0_1|u_logic|Ylbwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cmn2z4 , soc_inst|m0_1|u_logic|Cmn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE , soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~2 , soc_inst|m0_1|u_logic|Xhbwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~1 , soc_inst|m0_1|u_logic|Xhbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow43z4 , soc_inst|m0_1|u_logic|Ow43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~3 , soc_inst|m0_1|u_logic|Xhbwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~0 , soc_inst|m0_1|u_logic|Xhbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qrnvx4~0 , soc_inst|m0_1|u_logic|Qrnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asbvx4 , soc_inst|m0_1|u_logic|Asbvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Viy2z4 , soc_inst|m0_1|u_logic|Viy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzl2z4 , soc_inst|m0_1|u_logic|Fzl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~1 , soc_inst|m0_1|u_logic|Z4xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~2 , soc_inst|m0_1|u_logic|Z4xvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6xvx4~0 , soc_inst|m0_1|u_logic|I6xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~0 , soc_inst|m0_1|u_logic|Z4xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~3 , soc_inst|m0_1|u_logic|Z4xvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z9dwx4~0 , soc_inst|m0_1|u_logic|Z9dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jk0xx4~0 , soc_inst|m0_1|u_logic|Jk0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj0xx4 , soc_inst|m0_1|u_logic|Aj0xx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gjqvx4~0 , soc_inst|m0_1|u_logic|Gjqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujqvx4~0 , soc_inst|m0_1|u_logic|Ujqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xdnvx4~0 , soc_inst|m0_1|u_logic|Xdnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Thm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C34wx4~0 , soc_inst|m0_1|u_logic|C34wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C34wx4 , soc_inst|m0_1|u_logic|C34wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zx3wx4~0 , soc_inst|m0_1|u_logic|Zx3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H6mvx4~0 , soc_inst|m0_1|u_logic|H6mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4 , soc_inst|m0_1|u_logic|Uyv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwywx4~0 , soc_inst|m0_1|u_logic|Wwywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~2 , soc_inst|m0_1|u_logic|C6mwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rqywx4~0 , soc_inst|m0_1|u_logic|Rqywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~0 , soc_inst|m0_1|u_logic|C6mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~3 , soc_inst|m0_1|u_logic|C6mwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Abovx4~0 , soc_inst|m0_1|u_logic|Abovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jvqvx4~0 , soc_inst|m0_1|u_logic|Jvqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jnrvx4~0 , soc_inst|m0_1|u_logic|Jnrvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jhy2z4 , soc_inst|m0_1|u_logic|Jhy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pfovx4~0 , soc_inst|m0_1|u_logic|Pfovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~29 , soc_inst|m0_1|u_logic|Add1~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~13 , soc_inst|m0_1|u_logic|Add1~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I9nvx4~0 , soc_inst|m0_1|u_logic|I9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bby2z4 , soc_inst|m0_1|u_logic|Bby2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oesvx4~0 , soc_inst|m0_1|u_logic|Oesvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~0 , soc_inst|m0_1|u_logic|A5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rnhvx4~0 , soc_inst|m0_1|u_logic|Rnhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xuw2z4 , soc_inst|m0_1|u_logic|Xuw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~1 , soc_inst|m0_1|u_logic|A5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Swy2z4 , soc_inst|m0_1|u_logic|Swy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nkpvx4~0 , soc_inst|m0_1|u_logic|Nkpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~0 , soc_inst|m0_1|u_logic|Df3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ho3wx4~0 , soc_inst|m0_1|u_logic|Ho3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~1 , soc_inst|m0_1|u_logic|Df3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~2 , soc_inst|m0_1|u_logic|Df3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~3 , soc_inst|m0_1|u_logic|Df3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~4 , soc_inst|m0_1|u_logic|Df3wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~5 , soc_inst|m0_1|u_logic|Df3wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~6 , soc_inst|m0_1|u_logic|Df3wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~7 , soc_inst|m0_1|u_logic|Df3wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~8 , soc_inst|m0_1|u_logic|Df3wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~9 , soc_inst|m0_1|u_logic|Df3wx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W0pvx4 , soc_inst|m0_1|u_logic|W0pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~0 , soc_inst|m0_1|u_logic|Yhnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~1 , soc_inst|m0_1|u_logic|Yhnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cqo2z4 , soc_inst|m0_1|u_logic|Cqo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Noo2z4 , soc_inst|m0_1|u_logic|Noo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE , soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T243z4~DUPLICATE , soc_inst|m0_1|u_logic|T243z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~0 , soc_inst|m0_1|u_logic|N662z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE , soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~1 , soc_inst|m0_1|u_logic|N662z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K862z4~0 , soc_inst|m0_1|u_logic|K862z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~2 , soc_inst|m0_1|u_logic|N662z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~3 , soc_inst|m0_1|u_logic|N662z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrnvx4~0 , soc_inst|m0_1|u_logic|Xrnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29] , soc_inst|m0_1|u_logic|haddr_o[29], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|LessThan1~0 , soc_inst|interconnect_1|LessThan1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 , soc_inst|interconnect_1|HSEL_SIGNALS[1]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|mux_sel[1] , soc_inst|interconnect_1|mux_sel[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|Equal1~0 , soc_inst|interconnect_1|Equal1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][4] , soc_inst|switches_1|switch_store[0][4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[4]~23 , soc_inst|interconnect_1|HRDATA[4]~23, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W5rvx4 , soc_inst|m0_1|u_logic|W5rvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fbnvx4~0 , soc_inst|m0_1|u_logic|Fbnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Owq2z4 , soc_inst|m0_1|u_logic|Owq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pamvx4~0 , soc_inst|m0_1|u_logic|Pamvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ye4wx4 , soc_inst|m0_1|u_logic|Ye4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE , soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zdc2z4~0 , soc_inst|m0_1|u_logic|Zdc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~0 , soc_inst|m0_1|u_logic|Mhc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyy2z4 , soc_inst|m0_1|u_logic|Hyy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekc2z4~0 , soc_inst|m0_1|u_logic|Ekc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skc2z4~0 , soc_inst|m0_1|u_logic|Skc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~1 , soc_inst|m0_1|u_logic|Mhc2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~6 , soc_inst|m0_1|u_logic|Dcrwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qaiwx4~0 , soc_inst|m0_1|u_logic|Qaiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xdfwx4 , soc_inst|m0_1|u_logic|Xdfwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~0 , soc_inst|m0_1|u_logic|Imhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~1 , soc_inst|m0_1|u_logic|Imhvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|J4x2z4 , soc_inst|m0_1|u_logic|J4x2z4, de1_soc_wrapper, 1
@@ -3651,417 +4018,236 @@ instance = comp, \soc_inst|interconnect_1|HRDATA[1]~19 , soc_inst|interconnect_1
 instance = comp, \soc_inst|switches_1|DataValid~0 , soc_inst|switches_1|DataValid~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|DataValid[1] , soc_inst|switches_1|DataValid[1], de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|switch_store[0][1] , soc_inst|switches_1|switch_store[0][1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[1]~12 , soc_inst|ram_1|data_to_memory[1]~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[25]~11 , soc_inst|ram_1|data_to_memory[25]~11, de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|HRDATA[1]~21 , soc_inst|interconnect_1|HRDATA[1]~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hcnvx4~0 , soc_inst|m0_1|u_logic|Hcnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dwl2z4 , soc_inst|m0_1|u_logic|Dwl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Acnvx4~0 , soc_inst|m0_1|u_logic|Acnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE , soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sta2z4~0 , soc_inst|m0_1|u_logic|Sta2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4 , soc_inst|m0_1|u_logic|Uyv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zx3wx4~0 , soc_inst|m0_1|u_logic|Zx3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H6mvx4~0 , soc_inst|m0_1|u_logic|H6mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4pwx4~0 , soc_inst|m0_1|u_logic|S4pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~1 , soc_inst|m0_1|u_logic|X2rvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~2 , soc_inst|m0_1|u_logic|X2rvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tbnvx4~0 , soc_inst|m0_1|u_logic|Tbnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lbn2z4 , soc_inst|m0_1|u_logic|Lbn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~0 , soc_inst|m0_1|u_logic|Z4xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~1 , soc_inst|m0_1|u_logic|Z4xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~2 , soc_inst|m0_1|u_logic|Z4xvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6xvx4~0 , soc_inst|m0_1|u_logic|I6xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~3 , soc_inst|m0_1|u_logic|Z4xvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tzxwx4~0 , soc_inst|m0_1|u_logic|Tzxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pkwwx4~0 , soc_inst|m0_1|u_logic|Pkwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr7wx4~0 , soc_inst|m0_1|u_logic|Vr7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~0 , soc_inst|m0_1|u_logic|R7iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3pvx4 , soc_inst|m0_1|u_logic|O3pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~0 , soc_inst|m0_1|u_logic|Ojnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~1 , soc_inst|m0_1|u_logic|Ojnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~2 , soc_inst|m0_1|u_logic|Ojnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z7i2z4 , soc_inst|m0_1|u_logic|Z7i2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iwp2z4 , soc_inst|m0_1|u_logic|Iwp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~1 , soc_inst|m0_1|u_logic|D4mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~2 , soc_inst|m0_1|u_logic|D4mvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~1 , soc_inst|m0_1|u_logic|Oxnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ek03z4 , soc_inst|m0_1|u_logic|Ek03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~2 , soc_inst|m0_1|u_logic|Oxnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE , soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~0 , soc_inst|m0_1|u_logic|Oxnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~3 , soc_inst|m0_1|u_logic|Oxnvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N5qvx4~0 , soc_inst|m0_1|u_logic|N5qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~1 , soc_inst|m0_1|u_logic|S6ovx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Va62z4 , soc_inst|m0_1|u_logic|Va62z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29]~2 , soc_inst|m0_1|u_logic|haddr_o[29]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H362z4~0 , soc_inst|m0_1|u_logic|H362z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|htrans_o[1]~0 , soc_inst|m0_1|u_logic|htrans_o[1]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~1 , soc_inst|switches_1|half_word_address~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~3 , soc_inst|switches_1|half_word_address~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address[0] , soc_inst|switches_1|half_word_address[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[24]~6 , soc_inst|interconnect_1|HRDATA[24]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[24]~17 , soc_inst|interconnect_1|HRDATA[24]~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][9] , soc_inst|switches_1|switch_store[1][9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[25]~18 , soc_inst|interconnect_1|HRDATA[25]~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~0 , soc_inst|m0_1|u_logic|O5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fohvx4~0 , soc_inst|m0_1|u_logic|Fohvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Urw2z4 , soc_inst|m0_1|u_logic|Urw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~1 , soc_inst|m0_1|u_logic|O5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~2 , soc_inst|m0_1|u_logic|O5nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pty2z4 , soc_inst|m0_1|u_logic|Pty2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dj6wx4~0 , soc_inst|m0_1|u_logic|Dj6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vskwx4~0 , soc_inst|m0_1|u_logic|Vskwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H06wx4~0 , soc_inst|m0_1|u_logic|H06wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V76wx4~0 , soc_inst|m0_1|u_logic|V76wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V76wx4~1 , soc_inst|m0_1|u_logic|V76wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D56wx4~0 , soc_inst|m0_1|u_logic|D56wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O76wx4 , soc_inst|m0_1|u_logic|O76wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yy5wx4~0 , soc_inst|m0_1|u_logic|Yy5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~1 , soc_inst|m0_1|u_logic|P0hwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~1 , soc_inst|m0_1|u_logic|Xu5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Px5wx4 , soc_inst|m0_1|u_logic|Px5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G27wx4~2 , soc_inst|m0_1|u_logic|G27wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uw5wx4~0 , soc_inst|m0_1|u_logic|Uw5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ry5wx4~0 , soc_inst|m0_1|u_logic|Ry5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mz5wx4~0 , soc_inst|m0_1|u_logic|Mz5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~0 , soc_inst|m0_1|u_logic|Xu5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~2 , soc_inst|m0_1|u_logic|Xu5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~3 , soc_inst|m0_1|u_logic|Xu5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A76wx4~0 , soc_inst|m0_1|u_logic|A76wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W46wx4~0 , soc_inst|m0_1|u_logic|W46wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4 , soc_inst|m0_1|u_logic|Xu5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~0 , soc_inst|m0_1|u_logic|Ylwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~1 , soc_inst|m0_1|u_logic|Ylwwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~1 , soc_inst|m0_1|u_logic|Ok7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Manwx4~0 , soc_inst|m0_1|u_logic|Manwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwdwx4~0 , soc_inst|m0_1|u_logic|Pwdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~1 , soc_inst|m0_1|u_logic|Glnwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~1 , soc_inst|m0_1|u_logic|Skhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~0 , soc_inst|m0_1|u_logic|Skhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jex2z4 , soc_inst|m0_1|u_logic|Jex2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohivx4~0 , soc_inst|m0_1|u_logic|Ohivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwbwx4~0 , soc_inst|m0_1|u_logic|Lwbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE , soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|To33z4~DUPLICATE , soc_inst|m0_1|u_logic|To33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~1 , soc_inst|m0_1|u_logic|Oubwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE , soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~2 , soc_inst|m0_1|u_logic|Oubwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~0 , soc_inst|m0_1|u_logic|Oubwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~3 , soc_inst|m0_1|u_logic|Oubwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Konvx4~0 , soc_inst|m0_1|u_logic|Konvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ksbwx4~0 , soc_inst|m0_1|u_logic|Ksbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iu1wx4~0 , soc_inst|m0_1|u_logic|Iu1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uku2z4 , soc_inst|m0_1|u_logic|Uku2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE , soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~2 , soc_inst|m0_1|u_logic|Pybwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~1 , soc_inst|m0_1|u_logic|Pybwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~3 , soc_inst|m0_1|u_logic|Pybwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~0 , soc_inst|m0_1|u_logic|Pybwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4 , soc_inst|m0_1|u_logic|Pybwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tdg2z4 , soc_inst|m0_1|u_logic|Tdg2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aeg2z4 , soc_inst|m0_1|u_logic|Aeg2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vff2z4 , soc_inst|m0_1|u_logic|Vff2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jhe2z4 , soc_inst|m0_1|u_logic|Jhe2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qhe2z4 , soc_inst|m0_1|u_logic|Qhe2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hhd2z4 , soc_inst|m0_1|u_logic|Hhd2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohd2z4 , soc_inst|m0_1|u_logic|Ohd2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~4 , soc_inst|m0_1|u_logic|Mgd2z4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgf2z4 , soc_inst|m0_1|u_logic|Cgf2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~0 , soc_inst|m0_1|u_logic|Mgd2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~2 , soc_inst|m0_1|u_logic|Lhyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4~0 , soc_inst|m0_1|u_logic|Z4qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4 , soc_inst|m0_1|u_logic|Z4qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cll2z4 , soc_inst|m0_1|u_logic|Cll2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ch03z4 , soc_inst|m0_1|u_logic|Ch03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~2 , soc_inst|m0_1|u_logic|Ht5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~1 , soc_inst|m0_1|u_logic|Ht5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~3 , soc_inst|m0_1|u_logic|Ht5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~0 , soc_inst|m0_1|u_logic|Ht5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[15]~1 , soc_inst|m0_1|u_logic|hwdata_o[15]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[15]~2 , soc_inst|ram_1|data_to_memory[15]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hcnvx4~0 , soc_inst|m0_1|u_logic|Hcnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dwl2z4 , soc_inst|m0_1|u_logic|Dwl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Acnvx4~0 , soc_inst|m0_1|u_logic|Acnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE , soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qnyvx4~0 , soc_inst|m0_1|u_logic|Qnyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U4z2z4 , soc_inst|m0_1|u_logic|U4z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~0 , soc_inst|m0_1|u_logic|Vllvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~1 , soc_inst|m0_1|u_logic|Vllvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE , soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~0 , soc_inst|m0_1|u_logic|Htyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy33z4 , soc_inst|m0_1|u_logic|Cy33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~1 , soc_inst|m0_1|u_logic|Htyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf13z4 , soc_inst|m0_1|u_logic|Kf13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~2 , soc_inst|m0_1|u_logic|Htyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~3 , soc_inst|m0_1|u_logic|Htyvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[1] , soc_inst|m0_1|u_logic|hwdata_o[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R0t2z4 , soc_inst|m0_1|u_logic|R0t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rexvx4~0 , soc_inst|m0_1|u_logic|Rexvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4 , soc_inst|m0_1|u_logic|Ppsvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~0 , soc_inst|m0_1|u_logic|S6ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~1 , soc_inst|m0_1|u_logic|S6ovx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|always1~0 , soc_inst|ram_1|always1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|read_cycle~0 , soc_inst|ram_1|read_cycle~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|read_cycle , soc_inst|ram_1|read_cycle, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[11]~3 , soc_inst|interconnect_1|HRDATA[11]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[10]~12 , soc_inst|interconnect_1|HRDATA[10]~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P9nvx4~0 , soc_inst|m0_1|u_logic|P9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9y2z4 , soc_inst|m0_1|u_logic|M9y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~1 , soc_inst|m0_1|u_logic|Add1~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~17 , soc_inst|m0_1|u_logic|Add1~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U8nvx4~0 , soc_inst|m0_1|u_logic|U8nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdm2z4 , soc_inst|m0_1|u_logic|Bdm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oylwx4~0 , soc_inst|m0_1|u_logic|Oylwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oylwx4~1 , soc_inst|m0_1|u_logic|Oylwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|By4wx4 , soc_inst|m0_1|u_logic|By4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6t2z4 , soc_inst|m0_1|u_logic|Y6t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aekwx4~0 , soc_inst|m0_1|u_logic|Aekwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C4d2z4~0 , soc_inst|m0_1|u_logic|C4d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3d2z4~0 , soc_inst|m0_1|u_logic|O3d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~1 , soc_inst|m0_1|u_logic|Mrsvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d2z4~0 , soc_inst|m0_1|u_logic|G6d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~3 , soc_inst|m0_1|u_logic|Mrsvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~0 , soc_inst|m0_1|u_logic|Mrsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~4 , soc_inst|m0_1|u_logic|Mrsvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~0 , soc_inst|m0_1|u_logic|Gzvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~1 , soc_inst|m0_1|u_logic|Gzvvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~2 , soc_inst|m0_1|u_logic|Gzvvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O092z4~0 , soc_inst|m0_1|u_logic|O092z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T50wx4~0 , soc_inst|m0_1|u_logic|T50wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte3~0 , soc_inst|ram_1|byte3~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[3]~DUPLICATE , soc_inst|ram_1|byte_select[3]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[29]~0 , soc_inst|interconnect_1|HRDATA[29]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|HRDATA[31]~2 , soc_inst|interconnect_1|HRDATA[31]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~0 , soc_inst|m0_1|u_logic|Hjnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pmhvx4~0 , soc_inst|m0_1|u_logic|Pmhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F1x2z4 , soc_inst|m0_1|u_logic|F1x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nbm2z4 , soc_inst|m0_1|u_logic|Nbm2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G8nvx4~0 , soc_inst|m0_1|u_logic|G8nvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ufy2z4 , soc_inst|m0_1|u_logic|Ufy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pmhvx4~0 , soc_inst|m0_1|u_logic|Pmhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F1x2z4 , soc_inst|m0_1|u_logic|F1x2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~1 , soc_inst|m0_1|u_logic|Hjnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~0 , soc_inst|m0_1|u_logic|Hjnvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~2 , soc_inst|m0_1|u_logic|Hjnvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U2x2z4 , soc_inst|m0_1|u_logic|U2x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Srgwx4~0 , soc_inst|m0_1|u_logic|Srgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzyvx4~0 , soc_inst|m0_1|u_logic|Fzyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mk6wx4~0 , soc_inst|m0_1|u_logic|Mk6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~0 , soc_inst|m0_1|u_logic|X3xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~1 , soc_inst|m0_1|u_logic|X3xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pa7wx4~0 , soc_inst|m0_1|u_logic|Pa7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~0 , soc_inst|m0_1|u_logic|Q3xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~1 , soc_inst|m0_1|u_logic|Q3xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na6wx4~0 , soc_inst|m0_1|u_logic|Na6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~0 , soc_inst|m0_1|u_logic|U6wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~3 , soc_inst|m0_1|u_logic|U6wvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~4 , soc_inst|m0_1|u_logic|U6wvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~1 , soc_inst|m0_1|u_logic|U6wvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~2 , soc_inst|m0_1|u_logic|U6wvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~5 , soc_inst|m0_1|u_logic|U6wvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~6 , soc_inst|m0_1|u_logic|U6wvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~7 , soc_inst|m0_1|u_logic|U6wvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~0 , soc_inst|m0_1|u_logic|W3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~1 , soc_inst|m0_1|u_logic|W3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE , soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~1 , soc_inst|m0_1|u_logic|E4xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~0 , soc_inst|m0_1|u_logic|B3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~0 , soc_inst|m0_1|u_logic|Wlwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~1 , soc_inst|m0_1|u_logic|Wlwvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~1 , soc_inst|m0_1|u_logic|B3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE , soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~0 , soc_inst|m0_1|u_logic|E4xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~1 , soc_inst|m0_1|u_logic|Hklwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~2 , soc_inst|m0_1|u_logic|Hklwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~3 , soc_inst|m0_1|u_logic|Hklwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jeewx4 , soc_inst|m0_1|u_logic|Jeewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zmlwx4~0 , soc_inst|m0_1|u_logic|Zmlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~0 , soc_inst|m0_1|u_logic|Hklwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~4 , soc_inst|m0_1|u_logic|Hklwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bthvx4~0 , soc_inst|m0_1|u_logic|Bthvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4 , soc_inst|m0_1|u_logic|Cyq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~0 , soc_inst|m0_1|u_logic|Tykwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~1 , soc_inst|m0_1|u_logic|Tykwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~0 , soc_inst|m0_1|u_logic|Kxkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~1 , soc_inst|m0_1|u_logic|Kxkwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~2 , soc_inst|m0_1|u_logic|Kxkwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svk2z4 , soc_inst|m0_1|u_logic|Svk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C51xx4~0 , soc_inst|m0_1|u_logic|C51xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE , soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE , soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po53z4 , soc_inst|m0_1|u_logic|Po53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4~2 , soc_inst|m0_1|u_logic|R40wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE , soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4~1 , soc_inst|m0_1|u_logic|R40wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4~0 , soc_inst|m0_1|u_logic|R40wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4 , soc_inst|m0_1|u_logic|R40wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[11]~8 , soc_inst|m0_1|u_logic|hwdata_o[11]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[11]~17 , soc_inst|ram_1|data_to_memory[11]~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[11]~24 , soc_inst|interconnect_1|HRDATA[11]~24, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~13 , soc_inst|m0_1|u_logic|Add1~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I9nvx4~0 , soc_inst|m0_1|u_logic|I9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bby2z4 , soc_inst|m0_1|u_logic|Bby2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~2 , soc_inst|m0_1|u_logic|Lwiwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~3 , soc_inst|m0_1|u_logic|Lwiwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~1 , soc_inst|m0_1|u_logic|Lwiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q2jwx4~0 , soc_inst|m0_1|u_logic|Q2jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~0 , soc_inst|m0_1|u_logic|Iyiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~1 , soc_inst|m0_1|u_logic|Iyiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~0 , soc_inst|m0_1|u_logic|Lwiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eajwx4~0 , soc_inst|m0_1|u_logic|Eajwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q9jwx4~0 , soc_inst|m0_1|u_logic|Q9jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~4 , soc_inst|m0_1|u_logic|Lwiwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6jwx4~0 , soc_inst|m0_1|u_logic|R6jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~0 , soc_inst|m0_1|u_logic|Q6fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~1 , soc_inst|m0_1|u_logic|Q6fwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~5 , soc_inst|m0_1|u_logic|Lwiwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~0 , soc_inst|m0_1|u_logic|Ubjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~1 , soc_inst|m0_1|u_logic|Ubjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S3jwx4~0 , soc_inst|m0_1|u_logic|S3jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2jwx4~0 , soc_inst|m0_1|u_logic|X2jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hvhwx4~0 , soc_inst|m0_1|u_logic|Hvhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhjwx4~0 , soc_inst|m0_1|u_logic|Lhjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ehjwx4~0 , soc_inst|m0_1|u_logic|Ehjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~0 , soc_inst|m0_1|u_logic|Ofjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~1 , soc_inst|m0_1|u_logic|Ofjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~6 , soc_inst|m0_1|u_logic|Lwiwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~0 , soc_inst|m0_1|u_logic|Pyiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~1 , soc_inst|m0_1|u_logic|Pyiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fvhvx4~0 , soc_inst|m0_1|u_logic|Fvhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Npk2z4 , soc_inst|m0_1|u_logic|Npk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vbovx4~0 , soc_inst|m0_1|u_logic|Vbovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zlnvx4~0 , soc_inst|m0_1|u_logic|Zlnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|B9nvx4~0 , soc_inst|m0_1|u_logic|B9nvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qcy2z4 , soc_inst|m0_1|u_logic|Qcy2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Knhvx4~0 , soc_inst|m0_1|u_logic|Knhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mww2z4 , soc_inst|m0_1|u_logic|Mww2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zgsvx4~0 , soc_inst|m0_1|u_logic|Zgsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hyy2z4 , soc_inst|m0_1|u_logic|Hyy2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|T4nvx4~0 , soc_inst|m0_1|u_logic|T4nvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|T4nvx4~1 , soc_inst|m0_1|u_logic|T4nvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ocfwx4~0 , soc_inst|m0_1|u_logic|Ocfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rafwx4~0 , soc_inst|m0_1|u_logic|Rafwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rni2z4 , soc_inst|m0_1|u_logic|Rni2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE , soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L753z4 , soc_inst|m0_1|u_logic|L753z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~0 , soc_inst|m0_1|u_logic|Punvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qi03z4 , soc_inst|m0_1|u_logic|Qi03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wlz2z4 , soc_inst|m0_1|u_logic|Wlz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~2 , soc_inst|m0_1|u_logic|Punvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kf13z4 , soc_inst|m0_1|u_logic|Kf13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|To23z4 , soc_inst|m0_1|u_logic|To23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~1 , soc_inst|m0_1|u_logic|Punvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~3 , soc_inst|m0_1|u_logic|Punvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~4 , soc_inst|m0_1|u_logic|Punvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T50wx4~0 , soc_inst|m0_1|u_logic|T50wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte1~0 , soc_inst|ram_1|byte1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[1] , soc_inst|ram_1|byte_select[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[14]~30 , soc_inst|ram_1|data_to_memory[14]~30, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[30]~34 , soc_inst|interconnect_1|HRDATA[30]~34, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wmhvx4~0 , soc_inst|m0_1|u_logic|Wmhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzw2z4 , soc_inst|m0_1|u_logic|Qzw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~0 , soc_inst|m0_1|u_logic|M4nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8nvx4~0 , soc_inst|m0_1|u_logic|N8nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fey2z4 , soc_inst|m0_1|u_logic|Fey2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~1 , soc_inst|m0_1|u_logic|M4nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~2 , soc_inst|m0_1|u_logic|M4nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE , soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~0 , soc_inst|m0_1|u_logic|Mhgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iikwx4~0 , soc_inst|m0_1|u_logic|Iikwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md6wx4~0 , soc_inst|m0_1|u_logic|Md6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~0 , soc_inst|m0_1|u_logic|Dc6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~1 , soc_inst|m0_1|u_logic|Dc6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8d2z4~0 , soc_inst|m0_1|u_logic|R8d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uijwx4~0 , soc_inst|m0_1|u_logic|Uijwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qf6wx4~0 , soc_inst|m0_1|u_logic|Qf6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uv6wx4 , soc_inst|m0_1|u_logic|Uv6wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~2 , soc_inst|m0_1|u_logic|Q86wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~3 , soc_inst|m0_1|u_logic|Q86wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~0 , soc_inst|m0_1|u_logic|R8wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~1 , soc_inst|m0_1|u_logic|R8wvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~0 , soc_inst|m0_1|u_logic|W3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~1 , soc_inst|m0_1|u_logic|W3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE , soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~0 , soc_inst|m0_1|u_logic|Fjewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~1 , soc_inst|m0_1|u_logic|Fjewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ivewx4 , soc_inst|m0_1|u_logic|Ivewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7fwx4~0 , soc_inst|m0_1|u_logic|E7fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~5 , soc_inst|m0_1|u_logic|Woewx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~1 , soc_inst|m0_1|u_logic|Woewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~3 , soc_inst|m0_1|u_logic|Woewx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~4 , soc_inst|m0_1|u_logic|Woewx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~2 , soc_inst|m0_1|u_logic|Woewx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~6 , soc_inst|m0_1|u_logic|Woewx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~7 , soc_inst|m0_1|u_logic|Woewx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~8 , soc_inst|m0_1|u_logic|Woewx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ugewx4~0 , soc_inst|m0_1|u_logic|Ugewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R3fwx4~0 , soc_inst|m0_1|u_logic|R3fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~0 , soc_inst|m0_1|u_logic|E0fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~1 , soc_inst|m0_1|u_logic|E0fwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~2 , soc_inst|m0_1|u_logic|E0fwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~0 , soc_inst|m0_1|u_logic|Dwewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~1 , soc_inst|m0_1|u_logic|Dwewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bvewx4~0 , soc_inst|m0_1|u_logic|Bvewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~0 , soc_inst|m0_1|u_logic|Woewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~9 , soc_inst|m0_1|u_logic|Woewx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxhvx4~0 , soc_inst|m0_1|u_logic|Qxhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Emi2z4 , soc_inst|m0_1|u_logic|Emi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ptgwx4~0 , soc_inst|m0_1|u_logic|Ptgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Etlwx4~0 , soc_inst|m0_1|u_logic|Etlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~0 , soc_inst|m0_1|u_logic|Xslwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~1 , soc_inst|m0_1|u_logic|Xslwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~2 , soc_inst|m0_1|u_logic|Xslwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~3 , soc_inst|m0_1|u_logic|Xslwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~4 , soc_inst|m0_1|u_logic|Xslwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ushvx4~0 , soc_inst|m0_1|u_logic|Ushvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5t2z4 , soc_inst|m0_1|u_logic|O5t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Idiwx4~0 , soc_inst|m0_1|u_logic|Idiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ws3wx4~0 , soc_inst|m0_1|u_logic|Ws3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~3 , soc_inst|m0_1|u_logic|Sbiwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ttiwx4~0 , soc_inst|m0_1|u_logic|Ttiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ttiwx4~1 , soc_inst|m0_1|u_logic|Ttiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~4 , soc_inst|m0_1|u_logic|Sbiwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Agiwx4~0 , soc_inst|m0_1|u_logic|Agiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yeiwx4~0 , soc_inst|m0_1|u_logic|Yeiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~5 , soc_inst|m0_1|u_logic|Sbiwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~3 , soc_inst|m0_1|u_logic|Wkiwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~2 , soc_inst|m0_1|u_logic|Wkiwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~5 , soc_inst|m0_1|u_logic|Wkiwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~0 , soc_inst|m0_1|u_logic|Wkiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~1 , soc_inst|m0_1|u_logic|Wkiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~4 , soc_inst|m0_1|u_logic|Wkiwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~0 , soc_inst|m0_1|u_logic|Sbiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~1 , soc_inst|m0_1|u_logic|Sbiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hohwx4~0 , soc_inst|m0_1|u_logic|Hohwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~2 , soc_inst|m0_1|u_logic|Sbiwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~6 , soc_inst|m0_1|u_logic|Sbiwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mvhvx4 , soc_inst|m0_1|u_logic|Mvhvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mtwwx4~0 , soc_inst|m0_1|u_logic|Mtwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4~0 , soc_inst|m0_1|u_logic|Z4qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4 , soc_inst|m0_1|u_logic|Z4qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cll2z4 , soc_inst|m0_1|u_logic|Cll2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ch03z4 , soc_inst|m0_1|u_logic|Ch03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~2 , soc_inst|m0_1|u_logic|Ht5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~1 , soc_inst|m0_1|u_logic|Ht5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~3 , soc_inst|m0_1|u_logic|Ht5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~0 , soc_inst|m0_1|u_logic|Ht5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[15]~1 , soc_inst|m0_1|u_logic|hwdata_o[15]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Inb2z4 , soc_inst|m0_1|u_logic|Inb2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~7 , soc_inst|m0_1|u_logic|Vsywx4~7, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~1 , soc_inst|m0_1|u_logic|C6mwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rqywx4~0 , soc_inst|m0_1|u_logic|Rqywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~2 , soc_inst|m0_1|u_logic|C6mwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|V5mwx4~0 , soc_inst|m0_1|u_logic|V5mwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G9w2z4 , soc_inst|m0_1|u_logic|G9w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xf6wx4~0 , soc_inst|m0_1|u_logic|Xf6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ua6wx4~0 , soc_inst|m0_1|u_logic|Ua6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~0 , soc_inst|m0_1|u_logic|Q86wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gpjwx4~0 , soc_inst|m0_1|u_logic|Gpjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~1 , soc_inst|m0_1|u_logic|Q86wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~4 , soc_inst|m0_1|u_logic|Q86wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~5 , soc_inst|m0_1|u_logic|Q86wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~6 , soc_inst|m0_1|u_logic|Q86wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~1 , soc_inst|m0_1|u_logic|Jm6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~2 , soc_inst|m0_1|u_logic|Jm6wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~3 , soc_inst|m0_1|u_logic|Jm6wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~0 , soc_inst|m0_1|u_logic|Eyhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ad7wx4~0 , soc_inst|m0_1|u_logic|Ad7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P28wx4 , soc_inst|m0_1|u_logic|P28wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~4 , soc_inst|m0_1|u_logic|Jm6wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hyewx4 , soc_inst|m0_1|u_logic|Hyewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~0 , soc_inst|m0_1|u_logic|Jm6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~5 , soc_inst|m0_1|u_logic|Jm6wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~6 , soc_inst|m0_1|u_logic|Jm6wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~0 , soc_inst|m0_1|u_logic|Xt6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~1 , soc_inst|m0_1|u_logic|Q07wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X07wx4~0 , soc_inst|m0_1|u_logic|X07wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~0 , soc_inst|m0_1|u_logic|Q07wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~1 , soc_inst|m0_1|u_logic|Xt6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~7 , soc_inst|m0_1|u_logic|Jm6wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~1 , soc_inst|m0_1|u_logic|Eyhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4 , soc_inst|m0_1|u_logic|Pdi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxhvx4~0 , soc_inst|m0_1|u_logic|Cxhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxhvx4~1 , soc_inst|m0_1|u_logic|Cxhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcj2z4 , soc_inst|m0_1|u_logic|Fcj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~0 , soc_inst|m0_1|u_logic|Vllvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qnyvx4~0 , soc_inst|m0_1|u_logic|Qnyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~1 , soc_inst|m0_1|u_logic|Vllvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U4z2z4 , soc_inst|m0_1|u_logic|U4z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~0 , soc_inst|m0_1|u_logic|Htyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy33z4 , soc_inst|m0_1|u_logic|Cy33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~1 , soc_inst|m0_1|u_logic|Htyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L753z4~DUPLICATE , soc_inst|m0_1|u_logic|L753z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~2 , soc_inst|m0_1|u_logic|Htyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~3 , soc_inst|m0_1|u_logic|Htyvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[1] , soc_inst|m0_1|u_logic|hwdata_o[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R0t2z4 , soc_inst|m0_1|u_logic|R0t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rexvx4~0 , soc_inst|m0_1|u_logic|Rexvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~0 , soc_inst|m0_1|u_logic|Scpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~0 , soc_inst|m0_1|u_logic|Z5pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It52z4~0 , soc_inst|m0_1|u_logic|It52z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It52z4~1 , soc_inst|m0_1|u_logic|It52z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It52z4~2 , soc_inst|m0_1|u_logic|It52z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte0~0 , soc_inst|ram_1|byte0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[0] , soc_inst|ram_1|byte_select[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[5]~23 , soc_inst|ram_1|data_to_memory[5]~23, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][5] , soc_inst|switches_1|switch_store[0][5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[5]~28 , soc_inst|interconnect_1|HRDATA[5]~28, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yanvx4~0 , soc_inst|m0_1|u_logic|Yanvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F0y2z4 , soc_inst|m0_1|u_logic|F0y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wamvx4~0 , soc_inst|m0_1|u_logic|Wamvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4 , soc_inst|m0_1|u_logic|Tdp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ye4wx4 , soc_inst|m0_1|u_logic|Ye4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4w2z4 , soc_inst|m0_1|u_logic|S4w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zdc2z4~0 , soc_inst|m0_1|u_logic|Zdc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skc2z4~0 , soc_inst|m0_1|u_logic|Skc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekc2z4~0 , soc_inst|m0_1|u_logic|Ekc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~0 , soc_inst|m0_1|u_logic|Mhc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~1 , soc_inst|m0_1|u_logic|Mhc2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~1 , soc_inst|m0_1|u_logic|Dcrwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~0 , soc_inst|m0_1|u_logic|Dcrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~2 , soc_inst|m0_1|u_logic|Dcrwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~4 , soc_inst|m0_1|u_logic|Dcrwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~3 , soc_inst|m0_1|u_logic|Dcrwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mac2z4~0 , soc_inst|m0_1|u_logic|Mac2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kgc2z4~0 , soc_inst|m0_1|u_logic|Kgc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~5 , soc_inst|m0_1|u_logic|Dcrwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~6 , soc_inst|m0_1|u_logic|Dcrwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qaiwx4~0 , soc_inst|m0_1|u_logic|Qaiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H4nwx4 , soc_inst|m0_1|u_logic|H4nwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~5 , soc_inst|m0_1|u_logic|Add2~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~0 , soc_inst|m0_1|u_logic|Wthvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~1 , soc_inst|m0_1|u_logic|Wthvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0l2z4 , soc_inst|m0_1|u_logic|J0l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~5 , soc_inst|m0_1|u_logic|Add3~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~1 , soc_inst|m0_1|u_logic|Add3~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~1 , soc_inst|m0_1|u_logic|Rbi3z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4 , soc_inst|m0_1|u_logic|Rbi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ueovx4~0 , soc_inst|m0_1|u_logic|Ueovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qbpvx4~0 , soc_inst|m0_1|u_logic|Qbpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tohvx4~0 , soc_inst|m0_1|u_logic|Tohvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sow2z4 , soc_inst|m0_1|u_logic|Sow2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~1 , soc_inst|m0_1|u_logic|C6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~0 , soc_inst|m0_1|u_logic|C6nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~2 , soc_inst|m0_1|u_logic|C6nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5wvx4~0 , soc_inst|m0_1|u_logic|Z5wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~0 , soc_inst|m0_1|u_logic|I3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndwvx4~0 , soc_inst|m0_1|u_logic|Ndwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~1 , soc_inst|m0_1|u_logic|I3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE , soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~1 , soc_inst|m0_1|u_logic|Ggswx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~0 , soc_inst|m0_1|u_logic|Ggswx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~2 , soc_inst|m0_1|u_logic|Ggswx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4 , soc_inst|m0_1|u_logic|Yaz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4 , soc_inst|m0_1|u_logic|Q2q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~4 , soc_inst|m0_1|u_logic|S71wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~3 , soc_inst|m0_1|u_logic|S71wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE , soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R21xx4~0 , soc_inst|m0_1|u_logic|R21xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~1 , soc_inst|m0_1|u_logic|S71wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D603z4~DUPLICATE , soc_inst|m0_1|u_logic|D603z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~2 , soc_inst|m0_1|u_logic|S71wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE , soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~0 , soc_inst|m0_1|u_logic|S71wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~5 , soc_inst|m0_1|u_logic|S71wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4 , soc_inst|m0_1|u_logic|S71wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bq5wx4~0 , soc_inst|m0_1|u_logic|Bq5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Axm2z4~0 , soc_inst|m0_1|u_logic|Axm2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Axm2z4 , soc_inst|m0_1|u_logic|Axm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~0 , soc_inst|m0_1|u_logic|Luywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~4 , soc_inst|m0_1|u_logic|Luywx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhd3z4 , soc_inst|m0_1|u_logic|Lhd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~1 , soc_inst|m0_1|u_logic|Luywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~3 , soc_inst|m0_1|u_logic|Luywx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~5 , soc_inst|m0_1|u_logic|Luywx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fed3z4 , soc_inst|m0_1|u_logic|Fed3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~2 , soc_inst|m0_1|u_logic|Luywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~6 , soc_inst|m0_1|u_logic|Luywx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~0 , soc_inst|m0_1|u_logic|C6mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~3 , soc_inst|m0_1|u_logic|C6mwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Abovx4~0 , soc_inst|m0_1|u_logic|Abovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zlnvx4~0 , soc_inst|m0_1|u_logic|Zlnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nbm2z4 , soc_inst|m0_1|u_logic|Nbm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|By4wx4 , soc_inst|m0_1|u_logic|By4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6t2z4 , soc_inst|m0_1|u_logic|Y6t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0mwx4~0 , soc_inst|m0_1|u_logic|Z0mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~2 , soc_inst|m0_1|u_logic|hprot_o~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~3 , soc_inst|m0_1|u_logic|hprot_o~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~1 , soc_inst|m0_1|u_logic|hprot_o~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jbhwx4~0 , soc_inst|m0_1|u_logic|Jbhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qx52z4~0 , soc_inst|m0_1|u_logic|Qx52z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~4 , soc_inst|m0_1|u_logic|hprot_o~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~5 , soc_inst|m0_1|u_logic|hprot_o~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7mwx4 , soc_inst|m0_1|u_logic|E7mwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|always1~0 , soc_inst|ram_1|always1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|write_cycle~0 , soc_inst|ram_1|write_cycle~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|write_cycle~DUPLICATE , soc_inst|ram_1|write_cycle~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rnhvx4~0 , soc_inst|m0_1|u_logic|Rnhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xuw2z4 , soc_inst|m0_1|u_logic|Xuw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oesvx4~0 , soc_inst|m0_1|u_logic|Oesvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~0 , soc_inst|m0_1|u_logic|A5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~1 , soc_inst|m0_1|u_logic|A5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Swy2z4 , soc_inst|m0_1|u_logic|Swy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahhwx4~0 , soc_inst|m0_1|u_logic|Ahhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Krjwx4~0 , soc_inst|m0_1|u_logic|Krjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E2kwx4~0 , soc_inst|m0_1|u_logic|E2kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~0 , soc_inst|m0_1|u_logic|Htjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~1 , soc_inst|m0_1|u_logic|Htjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~2 , soc_inst|m0_1|u_logic|Htjwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|My6wx4~1 , soc_inst|m0_1|u_logic|My6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zvjwx4~0 , soc_inst|m0_1|u_logic|Zvjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xujwx4~0 , soc_inst|m0_1|u_logic|Xujwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~3 , soc_inst|m0_1|u_logic|Htjwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qujwx4~0 , soc_inst|m0_1|u_logic|Qujwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Drjwx4~0 , soc_inst|m0_1|u_logic|Drjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tsjwx4~0 , soc_inst|m0_1|u_logic|Tsjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~1 , soc_inst|m0_1|u_logic|Amjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~2 , soc_inst|m0_1|u_logic|Amjwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D5kwx4~0 , soc_inst|m0_1|u_logic|D5kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~3 , soc_inst|m0_1|u_logic|Amjwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~4 , soc_inst|m0_1|u_logic|Amjwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~5 , soc_inst|m0_1|u_logic|Amjwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4 , soc_inst|m0_1|u_logic|Amjwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zzb2z4~0 , soc_inst|m0_1|u_logic|Zzb2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~1 , soc_inst|m0_1|u_logic|I0hwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~0 , soc_inst|m0_1|u_logic|I0hwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~0 , soc_inst|m0_1|u_logic|P0hwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zygwx4~0 , soc_inst|m0_1|u_logic|Zygwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~0 , soc_inst|m0_1|u_logic|Tvgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~1 , soc_inst|m0_1|u_logic|Tvgwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~0 , soc_inst|m0_1|u_logic|Bfgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Itgwx4~0 , soc_inst|m0_1|u_logic|Itgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~1 , soc_inst|m0_1|u_logic|Poa2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekgwx4~0 , soc_inst|m0_1|u_logic|Ekgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~14 , soc_inst|m0_1|u_logic|Bfgwx4~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~13 , soc_inst|m0_1|u_logic|Bfgwx4~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~15 , soc_inst|m0_1|u_logic|Bfgwx4~15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~0 , soc_inst|m0_1|u_logic|Togwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~1 , soc_inst|m0_1|u_logic|Togwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~2 , soc_inst|m0_1|u_logic|Togwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~3 , soc_inst|m0_1|u_logic|Togwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~16 , soc_inst|m0_1|u_logic|Bfgwx4~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kugwx4~0 , soc_inst|m0_1|u_logic|Kugwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahhwx4~0 , soc_inst|m0_1|u_logic|Ahhwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~2 , soc_inst|m0_1|u_logic|Bfgwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~3 , soc_inst|m0_1|u_logic|Bfgwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ugewx4~0 , soc_inst|m0_1|u_logic|Ugewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~1 , soc_inst|m0_1|u_logic|Mhgwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thgwx4~0 , soc_inst|m0_1|u_logic|Thgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hahwx4~0 , soc_inst|m0_1|u_logic|Hahwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~1 , soc_inst|m0_1|u_logic|Bfgwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~2 , soc_inst|m0_1|u_logic|P0hwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bhewx4~0 , soc_inst|m0_1|u_logic|Bhewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~4 , soc_inst|m0_1|u_logic|Bfgwx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~18 , soc_inst|m0_1|u_logic|Bfgwx4~18, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~3 , soc_inst|m0_1|u_logic|P0hwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~10 , soc_inst|m0_1|u_logic|Bfgwx4~10, de1_soc_wrapper, 1
@@ -4071,61 +4257,43 @@ instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~7 , soc_inst|m0_1|u_logic|Bfgwx4~
 instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~8 , soc_inst|m0_1|u_logic|Bfgwx4~8, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~9 , soc_inst|m0_1|u_logic|Bfgwx4~9, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~11 , soc_inst|m0_1|u_logic|Bfgwx4~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thgwx4~0 , soc_inst|m0_1|u_logic|Thgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hahwx4~0 , soc_inst|m0_1|u_logic|Hahwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~1 , soc_inst|m0_1|u_logic|Mhgwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~1 , soc_inst|m0_1|u_logic|Bfgwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~2 , soc_inst|m0_1|u_logic|P0hwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bhewx4~0 , soc_inst|m0_1|u_logic|Bhewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~4 , soc_inst|m0_1|u_logic|Bfgwx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~12 , soc_inst|m0_1|u_logic|Bfgwx4~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kugwx4~0 , soc_inst|m0_1|u_logic|Kugwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~13 , soc_inst|m0_1|u_logic|Bfgwx4~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekgwx4~0 , soc_inst|m0_1|u_logic|Ekgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~1 , soc_inst|m0_1|u_logic|Poa2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~14 , soc_inst|m0_1|u_logic|Bfgwx4~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~15 , soc_inst|m0_1|u_logic|Bfgwx4~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~1 , soc_inst|m0_1|u_logic|Togwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~2 , soc_inst|m0_1|u_logic|Togwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~0 , soc_inst|m0_1|u_logic|Togwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~3 , soc_inst|m0_1|u_logic|Togwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~16 , soc_inst|m0_1|u_logic|Bfgwx4~16, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~17 , soc_inst|m0_1|u_logic|Bfgwx4~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~1 , soc_inst|m0_1|u_logic|I0hwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zygwx4~0 , soc_inst|m0_1|u_logic|Zygwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~0 , soc_inst|m0_1|u_logic|Tvgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~1 , soc_inst|m0_1|u_logic|Tvgwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~0 , soc_inst|m0_1|u_logic|P0hwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~0 , soc_inst|m0_1|u_logic|Bfgwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4 , soc_inst|m0_1|u_logic|Bfgwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sgj2z4 , soc_inst|m0_1|u_logic|Sgj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~0 , soc_inst|m0_1|u_logic|Qr42z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~1 , soc_inst|m0_1|u_logic|Qr42z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6qvx4~0 , soc_inst|m0_1|u_logic|I6qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nfnvx4~0 , soc_inst|m0_1|u_logic|Nfnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE , soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G1mwx4~0 , soc_inst|m0_1|u_logic|G1mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P2mwx4~0 , soc_inst|m0_1|u_logic|P2mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwrite_o~0 , soc_inst|m0_1|u_logic|hwrite_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|read_cycle~0 , soc_inst|ram_1|read_cycle~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|read_cycle , soc_inst|ram_1|read_cycle, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[29]~0 , soc_inst|interconnect_1|HRDATA[29]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~0 , soc_inst|m0_1|u_logic|Ajnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dnhvx4~0 , soc_inst|m0_1|u_logic|Dnhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Byw2z4 , soc_inst|m0_1|u_logic|Byw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~1 , soc_inst|m0_1|u_logic|Ajnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~2 , soc_inst|m0_1|u_logic|Ajnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qem2z4 , soc_inst|m0_1|u_logic|Qem2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~1 , soc_inst|m0_1|u_logic|Qllwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~2 , soc_inst|m0_1|u_logic|Qllwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~3 , soc_inst|m0_1|u_logic|Qllwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~4 , soc_inst|m0_1|u_logic|Qllwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~1 , soc_inst|m0_1|u_logic|Wfhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~0 , soc_inst|m0_1|u_logic|Wfhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~2 , soc_inst|m0_1|u_logic|Wfhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE , soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~0 , soc_inst|m0_1|u_logic|Fjewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~1 , soc_inst|m0_1|u_logic|Fjewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Huqvx4~0 , soc_inst|m0_1|u_logic|Huqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Og4wx4~0 , soc_inst|m0_1|u_logic|Og4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4~0 , soc_inst|m0_1|u_logic|Mtqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ag4wx4~0 , soc_inst|m0_1|u_logic|Ag4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4 , soc_inst|m0_1|u_logic|Mtqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cdnvx4~0 , soc_inst|m0_1|u_logic|Cdnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE , soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~4 , soc_inst|m0_1|u_logic|Fuhwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~1 , soc_inst|m0_1|u_logic|Fuhwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K0iwx4~0 , soc_inst|m0_1|u_logic|K0iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K0iwx4~1 , soc_inst|m0_1|u_logic|K0iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~2 , soc_inst|m0_1|u_logic|Fuhwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~3 , soc_inst|m0_1|u_logic|Fuhwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~5 , soc_inst|m0_1|u_logic|Fuhwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xphwx4~0 , soc_inst|m0_1|u_logic|Xphwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~2 , soc_inst|m0_1|u_logic|Rmhwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~0 , soc_inst|m0_1|u_logic|Rmhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~1 , soc_inst|m0_1|u_logic|Rmhwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~3 , soc_inst|m0_1|u_logic|Rmhwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~4 , soc_inst|m0_1|u_logic|Rmhwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~5 , soc_inst|m0_1|u_logic|Rmhwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjhwx4~0 , soc_inst|m0_1|u_logic|Sjhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tghwx4~0 , soc_inst|m0_1|u_logic|Tghwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejhwx4 , soc_inst|m0_1|u_logic|Ejhwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~0 , soc_inst|m0_1|u_logic|Ndhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~1 , soc_inst|m0_1|u_logic|Ndhwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~2 , soc_inst|m0_1|u_logic|Ndhwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fghwx4 , soc_inst|m0_1|u_logic|Fghwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~3 , soc_inst|m0_1|u_logic|Ndhwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~4 , soc_inst|m0_1|u_logic|Ndhwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4 , soc_inst|m0_1|u_logic|Ndhwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fij2z4 , soc_inst|m0_1|u_logic|Fij2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vqfwx4~0 , soc_inst|m0_1|u_logic|Vqfwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~0 , soc_inst|m0_1|u_logic|Ajfwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~1 , soc_inst|m0_1|u_logic|Ajfwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zlfwx4~0 , soc_inst|m0_1|u_logic|Zlfwx4~0, de1_soc_wrapper, 1
@@ -4136,302 +4304,154 @@ instance = comp, \soc_inst|m0_1|u_logic|Lsfwx4~1 , soc_inst|m0_1|u_logic|Lsfwx4~
 instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~3 , soc_inst|m0_1|u_logic|Ajfwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~4 , soc_inst|m0_1|u_logic|Ajfwx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~5 , soc_inst|m0_1|u_logic|Ajfwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vqfwx4~0 , soc_inst|m0_1|u_logic|Vqfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~0 , soc_inst|m0_1|u_logic|Rvfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~1 , soc_inst|m0_1|u_logic|B1gwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K2gwx4~0 , soc_inst|m0_1|u_logic|K2gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~0 , soc_inst|m0_1|u_logic|B1gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~2 , soc_inst|m0_1|u_logic|B1gwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|L6gwx4~0 , soc_inst|m0_1|u_logic|L6gwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~1 , soc_inst|m0_1|u_logic|Rvfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~0 , soc_inst|m0_1|u_logic|Rvfwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~4 , soc_inst|m0_1|u_logic|Rvfwx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~2 , soc_inst|m0_1|u_logic|Rvfwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cyfwx4~0 , soc_inst|m0_1|u_logic|Cyfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~1 , soc_inst|m0_1|u_logic|B1gwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K2gwx4~0 , soc_inst|m0_1|u_logic|K2gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~0 , soc_inst|m0_1|u_logic|B1gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~2 , soc_inst|m0_1|u_logic|B1gwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccgwx4~0 , soc_inst|m0_1|u_logic|Ccgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E6gwx4~0 , soc_inst|m0_1|u_logic|E6gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E6gwx4~1 , soc_inst|m0_1|u_logic|E6gwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y9gwx4~0 , soc_inst|m0_1|u_logic|Y9gwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|K9gwx4~0 , soc_inst|m0_1|u_logic|K9gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccgwx4~0 , soc_inst|m0_1|u_logic|Ccgwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|D9gwx4~0 , soc_inst|m0_1|u_logic|D9gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E6gwx4~0 , soc_inst|m0_1|u_logic|E6gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E6gwx4~1 , soc_inst|m0_1|u_logic|E6gwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~3 , soc_inst|m0_1|u_logic|Rvfwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4 , soc_inst|m0_1|u_logic|Ajfwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4 , soc_inst|m0_1|u_logic|Ffj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wdxvx4~0 , soc_inst|m0_1|u_logic|Wdxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~0 , soc_inst|m0_1|u_logic|Amjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D5kwx4~0 , soc_inst|m0_1|u_logic|D5kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~2 , soc_inst|m0_1|u_logic|Amjwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~3 , soc_inst|m0_1|u_logic|Amjwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~1 , soc_inst|m0_1|u_logic|Amjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~4 , soc_inst|m0_1|u_logic|Amjwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~5 , soc_inst|m0_1|u_logic|Amjwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tsjwx4~0 , soc_inst|m0_1|u_logic|Tsjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R3fwx4~0 , soc_inst|m0_1|u_logic|R3fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zvjwx4~0 , soc_inst|m0_1|u_logic|Zvjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|My6wx4~1 , soc_inst|m0_1|u_logic|My6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xujwx4~0 , soc_inst|m0_1|u_logic|Xujwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E2kwx4~0 , soc_inst|m0_1|u_logic|E2kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~0 , soc_inst|m0_1|u_logic|Htjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~1 , soc_inst|m0_1|u_logic|Htjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~2 , soc_inst|m0_1|u_logic|Htjwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~3 , soc_inst|m0_1|u_logic|Htjwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qujwx4~0 , soc_inst|m0_1|u_logic|Qujwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Drjwx4~0 , soc_inst|m0_1|u_logic|Drjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Krjwx4~0 , soc_inst|m0_1|u_logic|Krjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4 , soc_inst|m0_1|u_logic|Amjwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ark2z4 , soc_inst|m0_1|u_logic|Ark2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A0zvx4~0 , soc_inst|m0_1|u_logic|A0zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hohwx4~0 , soc_inst|m0_1|u_logic|Hohwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xphwx4~0 , soc_inst|m0_1|u_logic|Xphwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~1 , soc_inst|m0_1|u_logic|Rmhwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~2 , soc_inst|m0_1|u_logic|Rmhwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~0 , soc_inst|m0_1|u_logic|Rmhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~3 , soc_inst|m0_1|u_logic|Rmhwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~4 , soc_inst|m0_1|u_logic|Rmhwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~5 , soc_inst|m0_1|u_logic|Rmhwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~4 , soc_inst|m0_1|u_logic|Fuhwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K0iwx4~0 , soc_inst|m0_1|u_logic|K0iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K0iwx4~1 , soc_inst|m0_1|u_logic|K0iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~1 , soc_inst|m0_1|u_logic|Fuhwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~2 , soc_inst|m0_1|u_logic|Fuhwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~3 , soc_inst|m0_1|u_logic|Fuhwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~5 , soc_inst|m0_1|u_logic|Fuhwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjhwx4~0 , soc_inst|m0_1|u_logic|Sjhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tghwx4~0 , soc_inst|m0_1|u_logic|Tghwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fghwx4 , soc_inst|m0_1|u_logic|Fghwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejhwx4 , soc_inst|m0_1|u_logic|Ejhwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~0 , soc_inst|m0_1|u_logic|Ndhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~1 , soc_inst|m0_1|u_logic|Ndhwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~2 , soc_inst|m0_1|u_logic|Ndhwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~3 , soc_inst|m0_1|u_logic|Ndhwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~4 , soc_inst|m0_1|u_logic|Ndhwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4 , soc_inst|m0_1|u_logic|Ndhwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fij2z4 , soc_inst|m0_1|u_logic|Fij2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1vvx4~0 , soc_inst|m0_1|u_logic|B1vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~0 , soc_inst|m0_1|u_logic|hprot_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~0 , soc_inst|m0_1|u_logic|Mrsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C4d2z4~0 , soc_inst|m0_1|u_logic|C4d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3d2z4~0 , soc_inst|m0_1|u_logic|O3d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~1 , soc_inst|m0_1|u_logic|Mrsvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d2z4~0 , soc_inst|m0_1|u_logic|G6d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5d2z4~0 , soc_inst|m0_1|u_logic|Z5d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L5d2z4~0 , soc_inst|m0_1|u_logic|L5d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P7d2z4~0 , soc_inst|m0_1|u_logic|P7d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7fwx4~0 , soc_inst|m0_1|u_logic|L7fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~2 , soc_inst|m0_1|u_logic|Mrsvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aekwx4~0 , soc_inst|m0_1|u_logic|Aekwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~3 , soc_inst|m0_1|u_logic|Mrsvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~4 , soc_inst|m0_1|u_logic|Mrsvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~0 , soc_inst|m0_1|u_logic|haddr_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|LessThan0~0 , soc_inst|interconnect_1|LessThan0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|mux_sel[0] , soc_inst|interconnect_1|mux_sel[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|Equal1~0 , soc_inst|interconnect_1|Equal1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][8] , soc_inst|switches_1|switch_store[1][8], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[24]~31 , soc_inst|interconnect_1|HRDATA[24]~31, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mohvx4~0 , soc_inst|m0_1|u_logic|Mohvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gqw2z4 , soc_inst|m0_1|u_logic|Gqw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~1 , soc_inst|m0_1|u_logic|V5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~0 , soc_inst|m0_1|u_logic|V5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~2 , soc_inst|m0_1|u_logic|V5nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~0 , soc_inst|m0_1|u_logic|Fkkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~1 , soc_inst|m0_1|u_logic|Fkkwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pikwx4~0 , soc_inst|m0_1|u_logic|Pikwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Askwx4~1 , soc_inst|m0_1|u_logic|Askwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~2 , soc_inst|m0_1|u_logic|Mkkwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~1 , soc_inst|m0_1|u_logic|Mkkwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~0 , soc_inst|m0_1|u_logic|Qr42z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~1 , soc_inst|m0_1|u_logic|Qr42z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6qvx4~0 , soc_inst|m0_1|u_logic|I6qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nfnvx4~0 , soc_inst|m0_1|u_logic|Nfnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE , soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Akewx4~1 , soc_inst|m0_1|u_logic|Akewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yiewx4~0 , soc_inst|m0_1|u_logic|Yiewx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lgkwx4~0 , soc_inst|m0_1|u_logic|Lgkwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Unewx4~0 , soc_inst|m0_1|u_logic|Unewx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Unewx4 , soc_inst|m0_1|u_logic|Unewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~7 , soc_inst|m0_1|u_logic|T6kwx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Askwx4~0 , soc_inst|m0_1|u_logic|Askwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~8 , soc_inst|m0_1|u_logic|T6kwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8kwx4~0 , soc_inst|m0_1|u_logic|Q8kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~4 , soc_inst|m0_1|u_logic|T6kwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~0 , soc_inst|m0_1|u_logic|Mkkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hekwx4~0 , soc_inst|m0_1|u_logic|Hekwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~2 , soc_inst|m0_1|u_logic|T6kwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~3 , soc_inst|m0_1|u_logic|T6kwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bbkwx4~0 , soc_inst|m0_1|u_logic|Bbkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~1 , soc_inst|m0_1|u_logic|T6kwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~5 , soc_inst|m0_1|u_logic|T6kwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~0 , soc_inst|m0_1|u_logic|T6kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~6 , soc_inst|m0_1|u_logic|T6kwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ruhvx4~0 , soc_inst|m0_1|u_logic|Ruhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9pvx4~0 , soc_inst|m0_1|u_logic|M9pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xdfwx4 , soc_inst|m0_1|u_logic|Xdfwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~0 , soc_inst|m0_1|u_logic|Thhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~1 , soc_inst|m0_1|u_logic|Thhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~2 , soc_inst|m0_1|u_logic|Thhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jux2z4 , soc_inst|m0_1|u_logic|Jux2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Msyvx4 , soc_inst|m0_1|u_logic|Msyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hvhwx4~0 , soc_inst|m0_1|u_logic|Hvhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~0 , soc_inst|m0_1|u_logic|Ubjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~1 , soc_inst|m0_1|u_logic|Ubjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3jwx4~0 , soc_inst|m0_1|u_logic|S3jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2jwx4~0 , soc_inst|m0_1|u_logic|X2jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ehjwx4~0 , soc_inst|m0_1|u_logic|Ehjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~0 , soc_inst|m0_1|u_logic|Ofjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhjwx4~0 , soc_inst|m0_1|u_logic|Lhjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~1 , soc_inst|m0_1|u_logic|Ofjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~6 , soc_inst|m0_1|u_logic|Lwiwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q2jwx4~0 , soc_inst|m0_1|u_logic|Q2jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~0 , soc_inst|m0_1|u_logic|Iyiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~1 , soc_inst|m0_1|u_logic|Iyiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~0 , soc_inst|m0_1|u_logic|Lwiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~1 , soc_inst|m0_1|u_logic|Lwiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eajwx4~0 , soc_inst|m0_1|u_logic|Eajwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q9jwx4~0 , soc_inst|m0_1|u_logic|Q9jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~2 , soc_inst|m0_1|u_logic|Lwiwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~3 , soc_inst|m0_1|u_logic|Lwiwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~4 , soc_inst|m0_1|u_logic|Lwiwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7jwx4 , soc_inst|m0_1|u_logic|T7jwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6jwx4~0 , soc_inst|m0_1|u_logic|R6jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~0 , soc_inst|m0_1|u_logic|Q6fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~1 , soc_inst|m0_1|u_logic|Q6fwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~5 , soc_inst|m0_1|u_logic|Lwiwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~0 , soc_inst|m0_1|u_logic|Pyiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~1 , soc_inst|m0_1|u_logic|Pyiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fvhvx4~0 , soc_inst|m0_1|u_logic|Fvhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Npk2z4 , soc_inst|m0_1|u_logic|Npk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y8pvx4~0 , soc_inst|m0_1|u_logic|Y8pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipsvx4~0 , soc_inst|m0_1|u_logic|Ipsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~1 , soc_inst|m0_1|u_logic|Scpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~2 , soc_inst|m0_1|u_logic|Scpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfovx4 , soc_inst|m0_1|u_logic|Wfovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jvqvx4~0 , soc_inst|m0_1|u_logic|Jvqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jnrvx4~0 , soc_inst|m0_1|u_logic|Jnrvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jhy2z4 , soc_inst|m0_1|u_logic|Jhy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pfovx4~0 , soc_inst|m0_1|u_logic|Pfovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ynhvx4~0 , soc_inst|m0_1|u_logic|Ynhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Itw2z4 , soc_inst|m0_1|u_logic|Itw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcsvx4~0 , soc_inst|m0_1|u_logic|Dcsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~0 , soc_inst|m0_1|u_logic|H5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~1 , soc_inst|m0_1|u_logic|H5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dvy2z4 , soc_inst|m0_1|u_logic|Dvy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G27wx4~0 , soc_inst|m0_1|u_logic|G27wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Blwvx4~0 , soc_inst|m0_1|u_logic|Blwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~0 , soc_inst|m0_1|u_logic|Pw6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~1 , soc_inst|m0_1|u_logic|Pw6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~0 , soc_inst|m0_1|u_logic|Sfewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~1 , soc_inst|m0_1|u_logic|Sfewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jeewx4 , soc_inst|m0_1|u_logic|Jeewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~0 , soc_inst|m0_1|u_logic|Fcewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~1 , soc_inst|m0_1|u_logic|Fcewx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~2 , soc_inst|m0_1|u_logic|H3ivx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~3 , soc_inst|m0_1|u_logic|H3ivx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ws3wx4~0 , soc_inst|m0_1|u_logic|Ws3wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~0 , soc_inst|m0_1|u_logic|H3ivx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~0 , soc_inst|m0_1|u_logic|Av3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~2 , soc_inst|m0_1|u_logic|Av3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~3 , soc_inst|m0_1|u_logic|Av3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~4 , soc_inst|m0_1|u_logic|Av3wx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~1 , soc_inst|m0_1|u_logic|Av3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vac3z4 , soc_inst|m0_1|u_logic|Vac3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gxk2z4 , soc_inst|m0_1|u_logic|Gxk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~5 , soc_inst|m0_1|u_logic|Av3wx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~6 , soc_inst|m0_1|u_logic|Av3wx4~6, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~7 , soc_inst|m0_1|u_logic|Av3wx4~7, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~8 , soc_inst|m0_1|u_logic|Av3wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~5 , soc_inst|m0_1|u_logic|Av3wx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~9 , soc_inst|m0_1|u_logic|Av3wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~3 , soc_inst|m0_1|u_logic|Ny3wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~2 , soc_inst|m0_1|u_logic|Ny3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~3 , soc_inst|m0_1|u_logic|Ny3wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~4 , soc_inst|m0_1|u_logic|Ny3wx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~5 , soc_inst|m0_1|u_logic|Ny3wx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~10 , soc_inst|m0_1|u_logic|Av3wx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~2 , soc_inst|m0_1|u_logic|Av3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~3 , soc_inst|m0_1|u_logic|Av3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~4 , soc_inst|m0_1|u_logic|Av3wx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~11 , soc_inst|m0_1|u_logic|Av3wx4~11, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~1 , soc_inst|m0_1|u_logic|H3ivx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~4 , soc_inst|m0_1|u_logic|H3ivx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gji2z4 , soc_inst|m0_1|u_logic|Gji2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~0 , soc_inst|m0_1|u_logic|Pw6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~1 , soc_inst|m0_1|u_logic|Pw6wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lfewx4 , soc_inst|m0_1|u_logic|Lfewx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~2 , soc_inst|m0_1|u_logic|Pw6wx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~3 , soc_inst|m0_1|u_logic|Pw6wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~0 , soc_inst|m0_1|u_logic|Fcewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~1 , soc_inst|m0_1|u_logic|Fcewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~0 , soc_inst|m0_1|u_logic|Sfewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~1 , soc_inst|m0_1|u_logic|Sfewx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~4 , soc_inst|m0_1|u_logic|Pw6wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Akewx4~1 , soc_inst|m0_1|u_logic|Akewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yiewx4~0 , soc_inst|m0_1|u_logic|Yiewx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~5 , soc_inst|m0_1|u_logic|Pw6wx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vz6wx4 , soc_inst|m0_1|u_logic|Vz6wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4 , soc_inst|m0_1|u_logic|Pw6wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pcyvx4 , soc_inst|m0_1|u_logic|Pcyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duc2z4~0 , soc_inst|m0_1|u_logic|Duc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~0 , soc_inst|m0_1|u_logic|Y1d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tki2z4 , soc_inst|m0_1|u_logic|Tki2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qbpvx4~0 , soc_inst|m0_1|u_logic|Qbpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dnhvx4~0 , soc_inst|m0_1|u_logic|Dnhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Byw2z4 , soc_inst|m0_1|u_logic|Byw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~1 , soc_inst|m0_1|u_logic|Ajnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~0 , soc_inst|m0_1|u_logic|Ajnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~2 , soc_inst|m0_1|u_logic|Ajnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qem2z4 , soc_inst|m0_1|u_logic|Qem2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~1 , soc_inst|m0_1|u_logic|Qllwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~2 , soc_inst|m0_1|u_logic|Qllwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~3 , soc_inst|m0_1|u_logic|Qllwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~4 , soc_inst|m0_1|u_logic|Qllwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~2 , soc_inst|m0_1|u_logic|Hklwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~3 , soc_inst|m0_1|u_logic|Hklwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zmlwx4~0 , soc_inst|m0_1|u_logic|Zmlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~0 , soc_inst|m0_1|u_logic|Hklwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~4 , soc_inst|m0_1|u_logic|Hklwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bthvx4~0 , soc_inst|m0_1|u_logic|Bthvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tdg2z4 , soc_inst|m0_1|u_logic|Tdg2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aeg2z4 , soc_inst|m0_1|u_logic|Aeg2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vff2z4 , soc_inst|m0_1|u_logic|Vff2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hhd2z4 , soc_inst|m0_1|u_logic|Hhd2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qhe2z4 , soc_inst|m0_1|u_logic|Qhe2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jhe2z4 , soc_inst|m0_1|u_logic|Jhe2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohd2z4 , soc_inst|m0_1|u_logic|Ohd2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~4 , soc_inst|m0_1|u_logic|Mgd2z4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgf2z4 , soc_inst|m0_1|u_logic|Cgf2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~0 , soc_inst|m0_1|u_logic|Mgd2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~1 , soc_inst|m0_1|u_logic|Y1d2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~0 , soc_inst|m0_1|u_logic|Y1d2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~2 , soc_inst|m0_1|u_logic|Y1d2z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|K1wvx4 , soc_inst|m0_1|u_logic|K1wvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|haddr_o~1 , soc_inst|m0_1|u_logic|haddr_o~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|LessThan1~0 , soc_inst|interconnect_1|LessThan1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 , soc_inst|interconnect_1|HSEL_SIGNALS[1]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|mux_sel[1] , soc_inst|interconnect_1|mux_sel[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|LessThan0~0 , soc_inst|interconnect_1|LessThan0~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|mux_sel[0] , soc_inst|interconnect_1|mux_sel[0], de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|HREADY~0 , soc_inst|interconnect_1|HREADY~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cdnvx4~0 , soc_inst|m0_1|u_logic|Cdnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE , soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ivewx4 , soc_inst|m0_1|u_logic|Ivewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7fwx4~0 , soc_inst|m0_1|u_logic|E7fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~0 , soc_inst|m0_1|u_logic|Dwewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~1 , soc_inst|m0_1|u_logic|Dwewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bvewx4~0 , soc_inst|m0_1|u_logic|Bvewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~0 , soc_inst|m0_1|u_logic|Woewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~2 , soc_inst|m0_1|u_logic|Woewx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~5 , soc_inst|m0_1|u_logic|Woewx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~3 , soc_inst|m0_1|u_logic|Woewx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~1 , soc_inst|m0_1|u_logic|Woewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~4 , soc_inst|m0_1|u_logic|Woewx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~6 , soc_inst|m0_1|u_logic|Woewx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~7 , soc_inst|m0_1|u_logic|Woewx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~8 , soc_inst|m0_1|u_logic|Woewx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~0 , soc_inst|m0_1|u_logic|E0fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~1 , soc_inst|m0_1|u_logic|E0fwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~2 , soc_inst|m0_1|u_logic|E0fwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~9 , soc_inst|m0_1|u_logic|Woewx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxhvx4~0 , soc_inst|m0_1|u_logic|Qxhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Emi2z4 , soc_inst|m0_1|u_logic|Emi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~0 , soc_inst|m0_1|u_logic|Xslwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~1 , soc_inst|m0_1|u_logic|Xslwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~2 , soc_inst|m0_1|u_logic|Xslwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~3 , soc_inst|m0_1|u_logic|Xslwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~4 , soc_inst|m0_1|u_logic|Xslwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Etlwx4~0 , soc_inst|m0_1|u_logic|Etlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ushvx4~0 , soc_inst|m0_1|u_logic|Ushvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5t2z4 , soc_inst|m0_1|u_logic|O5t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~0 , soc_inst|m0_1|u_logic|Sbiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~1 , soc_inst|m0_1|u_logic|Sbiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~2 , soc_inst|m0_1|u_logic|Sbiwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~0 , soc_inst|m0_1|u_logic|Wkiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~1 , soc_inst|m0_1|u_logic|Wkiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~2 , soc_inst|m0_1|u_logic|Wkiwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~5 , soc_inst|m0_1|u_logic|Wkiwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~3 , soc_inst|m0_1|u_logic|Wkiwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~4 , soc_inst|m0_1|u_logic|Wkiwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Idiwx4~0 , soc_inst|m0_1|u_logic|Idiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~3 , soc_inst|m0_1|u_logic|Sbiwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ttiwx4~0 , soc_inst|m0_1|u_logic|Ttiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ttiwx4~1 , soc_inst|m0_1|u_logic|Ttiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~4 , soc_inst|m0_1|u_logic|Sbiwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Agiwx4~0 , soc_inst|m0_1|u_logic|Agiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yeiwx4~0 , soc_inst|m0_1|u_logic|Yeiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~5 , soc_inst|m0_1|u_logic|Sbiwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~6 , soc_inst|m0_1|u_logic|Sbiwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mvhvx4 , soc_inst|m0_1|u_logic|Mvhvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aok2z4 , soc_inst|m0_1|u_logic|Aok2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G97wx4~0 , soc_inst|m0_1|u_logic|G97wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~1 , soc_inst|m0_1|u_logic|Z5pvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~0 , soc_inst|m0_1|u_logic|T6kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8kwx4~0 , soc_inst|m0_1|u_logic|Q8kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~4 , soc_inst|m0_1|u_logic|T6kwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~0 , soc_inst|m0_1|u_logic|Mkkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bbkwx4~0 , soc_inst|m0_1|u_logic|Bbkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~1 , soc_inst|m0_1|u_logic|T6kwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~2 , soc_inst|m0_1|u_logic|T6kwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hekwx4~0 , soc_inst|m0_1|u_logic|Hekwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~3 , soc_inst|m0_1|u_logic|T6kwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~5 , soc_inst|m0_1|u_logic|T6kwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~6 , soc_inst|m0_1|u_logic|T6kwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~0 , soc_inst|m0_1|u_logic|Fkkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~1 , soc_inst|m0_1|u_logic|Fkkwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~1 , soc_inst|m0_1|u_logic|Mkkwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~2 , soc_inst|m0_1|u_logic|Mkkwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~7 , soc_inst|m0_1|u_logic|T6kwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pikwx4~0 , soc_inst|m0_1|u_logic|Pikwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Askwx4~1 , soc_inst|m0_1|u_logic|Askwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Askwx4~0 , soc_inst|m0_1|u_logic|Askwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~8 , soc_inst|m0_1|u_logic|T6kwx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ruhvx4~0 , soc_inst|m0_1|u_logic|Ruhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4 , soc_inst|m0_1|u_logic|Nsk2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Q5c2z4~0 , soc_inst|m0_1|u_logic|Q5c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~1 , soc_inst|m0_1|u_logic|Z5pvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~2 , soc_inst|m0_1|u_logic|Z5pvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~3 , soc_inst|m0_1|u_logic|Z5pvx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~4 , soc_inst|m0_1|u_logic|Z5pvx4~4, de1_soc_wrapper, 1
 instance = comp, \running~feeder , running~feeder, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add1~37 , raz_inst|Add1~37, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[2]~DUPLICATE , raz_inst|H_count[2]~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~25 , raz_inst|Add0~25, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[0]~DUPLICATE , raz_inst|H_count[0]~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~29 , raz_inst|Add0~29, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[1] , raz_inst|H_count[1], de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[1]~DUPLICATE , raz_inst|H_count[1]~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~21 , raz_inst|Add0~21, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[2] , raz_inst|H_count[2], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~37 , raz_inst|Add0~37, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[3] , raz_inst|H_count[3], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~41 , raz_inst|Add0~41, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[4] , raz_inst|H_count[4], de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[1] , raz_inst|H_count[1], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~33 , raz_inst|Add0~33, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[5] , raz_inst|H_count[5], de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan0~0 , raz_inst|LessThan0~0, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~17 , raz_inst|Add0~17, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[6] , raz_inst|H_count[6], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~5 , raz_inst|Add0~5, de1_soc_wrapper, 1
@@ -4439,20 +4459,22 @@ instance = comp, \raz_inst|H_count[7] , raz_inst|H_count[7], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~9 , raz_inst|Add0~9, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[8] , raz_inst|H_count[8], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~13 , raz_inst|Add0~13, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~1 , raz_inst|Add0~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[10] , raz_inst|H_count[10], de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[1]~DUPLICATE , raz_inst|H_count[1]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan0~0 , raz_inst|LessThan0~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[9] , raz_inst|H_count[9], de1_soc_wrapper, 1
 instance = comp, \raz_inst|LessThan0~2 , raz_inst|LessThan0~2, de1_soc_wrapper, 1
 instance = comp, \raz_inst|LessThan0~1 , raz_inst|LessThan0~1, de1_soc_wrapper, 1
 instance = comp, \raz_inst|LessThan0~3 , raz_inst|LessThan0~3, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[9] , raz_inst|H_count[9], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~1 , raz_inst|Add1~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~9 , raz_inst|Add1~9, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Equal0~3 , raz_inst|Equal0~3, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[10] , raz_inst|H_count[10], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~1 , raz_inst|Add0~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~33 , raz_inst|Add1~33, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~5 , raz_inst|Add1~5, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Equal0~1 , raz_inst|Equal0~1, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Equal0~0 , raz_inst|Equal0~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~3 , raz_inst|Equal0~3, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Equal0~4 , raz_inst|Equal0~4, de1_soc_wrapper, 1
+instance = comp, \raz_inst|V_count[5] , raz_inst|V_count[5], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~1 , raz_inst|Add1~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|V_count[6] , raz_inst|V_count[6], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~9 , raz_inst|Add1~9, de1_soc_wrapper, 1
 instance = comp, \raz_inst|V_count[7] , raz_inst|V_count[7], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add1~13 , raz_inst|Add1~13, de1_soc_wrapper, 1
 instance = comp, \raz_inst|V_count[8] , raz_inst|V_count[8], de1_soc_wrapper, 1
@@ -4475,11 +4497,7 @@ instance = comp, \raz_inst|Add1~25 , raz_inst|Add1~25, de1_soc_wrapper, 1
 instance = comp, \raz_inst|V_count[2] , raz_inst|V_count[2], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add1~29 , raz_inst|Add1~29, de1_soc_wrapper, 1
 instance = comp, \raz_inst|V_count[3] , raz_inst|V_count[3], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~33 , raz_inst|Add1~33, de1_soc_wrapper, 1
 instance = comp, \raz_inst|V_count[4] , raz_inst|V_count[4], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~5 , raz_inst|Add1~5, de1_soc_wrapper, 1
-instance = comp, \raz_inst|V_count[5] , raz_inst|V_count[5], de1_soc_wrapper, 1
-instance = comp, \raz_inst|V_count[6] , raz_inst|V_count[6], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|Add1~25 , soc_inst|pix1|Add1~25, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|Add1~29 , soc_inst|pix1|Add1~29, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|Add1~33 , soc_inst|pix1|Add1~33, de1_soc_wrapper, 1
@@ -4487,18 +4505,17 @@ instance = comp, \soc_inst|pix1|Add1~37 , soc_inst|pix1|Add1~37, de1_soc_wrapper
 instance = comp, \soc_inst|pix1|Add1~41 , soc_inst|pix1|Add1~41, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|Add1~45 , soc_inst|pix1|Add1~45, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|Add1~17 , soc_inst|pix1|Add1~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~21 , soc_inst|pix1|Add1~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~13 , soc_inst|pix1|Add1~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~feeder , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|always0~0 , soc_inst|pix1|always0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[15] , soc_inst|pix1|word_address[15], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[13] , soc_inst|pix1|word_address[13], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|write_enable , soc_inst|pix1|write_enable, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[16] , soc_inst|pix1|word_address[16], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[15] , soc_inst|pix1|word_address[15], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[14] , soc_inst|pix1|word_address[14], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[17] , soc_inst|pix1|word_address[17], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[16] , soc_inst|pix1|word_address[16], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|write_enable , soc_inst|pix1|write_enable, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[18] , soc_inst|pix1|word_address[18], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[14] , soc_inst|pix1|word_address[14], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[0] , soc_inst|pix1|word_address[0], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[1] , soc_inst|pix1|word_address[1], de1_soc_wrapper, 1
@@ -4507,131 +4524,133 @@ instance = comp, \soc_inst|pix1|word_address[3] , soc_inst|pix1|word_address[3],
 instance = comp, \soc_inst|pix1|word_address[4] , soc_inst|pix1|word_address[4], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[5] , soc_inst|pix1|word_address[5], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[6] , soc_inst|pix1|word_address[6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[7] , soc_inst|pix1|word_address[7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[7]~DUPLICATE , soc_inst|pix1|word_address[7]~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[8] , soc_inst|pix1|word_address[8], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[9] , soc_inst|pix1|word_address[9], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[10] , soc_inst|pix1|word_address[10], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[11] , soc_inst|pix1|word_address[11], de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[0] , raz_inst|H_count[0], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[12] , soc_inst|pix1|word_address[12], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~21 , soc_inst|pix1|Add1~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~13 , soc_inst|pix1|Add1~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~feeder , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~feeder , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[12] , soc_inst|pix1|word_address[12], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Red~0 , raz_inst|Red~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan7~0 , raz_inst|LessThan7~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|video_on_H , raz_inst|video_on_H, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~2 , raz_inst|LessThan8~2, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~3 , raz_inst|LessThan8~3, de1_soc_wrapper, 1
 instance = comp, \raz_inst|always0~0 , raz_inst|always0~0, de1_soc_wrapper, 1
 instance = comp, \raz_inst|LessThan4~0 , raz_inst|LessThan4~0, de1_soc_wrapper, 1
 instance = comp, \raz_inst|always0~1 , raz_inst|always0~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan8~2 , raz_inst|LessThan8~2, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan8~3 , raz_inst|LessThan8~3, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Equal0~2 , raz_inst|Equal0~2, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan8~1 , raz_inst|LessThan8~1, de1_soc_wrapper, 1
 instance = comp, \raz_inst|LessThan8~0 , raz_inst|LessThan8~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~1 , raz_inst|LessThan8~1, de1_soc_wrapper, 1
 instance = comp, \raz_inst|LessThan8~4 , raz_inst|LessThan8~4, de1_soc_wrapper, 1
 instance = comp, \raz_inst|video_on_V , raz_inst|video_on_V, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan7~0 , raz_inst|LessThan7~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|video_on_H , raz_inst|video_on_H, de1_soc_wrapper, 1
 instance = comp, \raz_inst|VGA_BLANK_N , raz_inst|VGA_BLANK_N, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[7] , soc_inst|pix1|word_address[7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~9 , soc_inst|pix1|Add1~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~feeder , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~9 , soc_inst|pix1|Add1~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|Add1~5 , soc_inst|pix1|Add1~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|Add1~1 , soc_inst|pix1|Add1~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Red~1 , raz_inst|Red~1, de1_soc_wrapper, 1
 instance = comp, \raz_inst|always0~6 , raz_inst|always0~6, de1_soc_wrapper, 1
 instance = comp, \raz_inst|always0~5 , raz_inst|always0~5, de1_soc_wrapper, 1